diff --git a/benchmarks/new_opencl/bfs/Makefile b/benchmarks/new_opencl/bfs/Makefile index 6c877d51..9bf33d90 100644 --- a/benchmarks/new_opencl/bfs/Makefile +++ b/benchmarks/new_opencl/bfs/Makefile @@ -1,6 +1,6 @@ -RISCV_TOOL_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops) -POCLCC_PATH ?= $(wildcard ~/dev/pocl/drops_vortex_cc) -POCLRT_PATH ?= $(wildcard ..) +LLVM_LIB_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops/lib) +POCLCC_PATH ?= $(wildcard ../compiler) +POCLRT_PATH ?= $(wildcard ../runtime) DRIVER_PATH ?= $(wildcard ../../../driver/sw) CXXFLAGS += -std=c++11 -O0 -g -fpermissive -Wall -Wextra -pedantic -Wfatal-errors @@ -16,7 +16,7 @@ SRCS = main.cc all: $(PROJECT) kernel.pocl: kernel.cl - POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl + POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(LLVM_LIB_PATH):$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl $(PROJECT): $(SRCS) $(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@ diff --git a/benchmarks/new_opencl/compiler/bin/poclcc b/benchmarks/new_opencl/compiler/bin/poclcc new file mode 100755 index 00000000..0b2e0875 Binary files /dev/null and b/benchmarks/new_opencl/compiler/bin/poclcc differ diff --git a/benchmarks/new_opencl/compiler/lib/libOpenCL.so b/benchmarks/new_opencl/compiler/lib/libOpenCL.so new file mode 100644 index 00000000..70df4b33 Binary files /dev/null and b/benchmarks/new_opencl/compiler/lib/libOpenCL.so differ diff --git a/benchmarks/new_opencl/compiler/lib/libOpenCL.so.2 b/benchmarks/new_opencl/compiler/lib/libOpenCL.so.2 new file mode 100644 index 00000000..70df4b33 Binary files /dev/null and b/benchmarks/new_opencl/compiler/lib/libOpenCL.so.2 differ diff --git a/benchmarks/new_opencl/compiler/lib/libOpenCL.so.2.5.0 b/benchmarks/new_opencl/compiler/lib/libOpenCL.so.2.5.0 new file mode 100644 index 00000000..70df4b33 Binary files /dev/null and b/benchmarks/new_opencl/compiler/lib/libOpenCL.so.2.5.0 differ diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/_builtin_renames.h b/benchmarks/new_opencl/compiler/share/pocl/include/_builtin_renames.h new file mode 100644 index 00000000..afe26cd3 --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/_builtin_renames.h @@ -0,0 +1,193 @@ +/* pocl/_kernel_renames.h - Rename OpenCL builtin functions to avoid name + clashes with libm functions which are called in implementation. + + Copyright (c) 2011-2013 Erik Schnetter + Perimeter Institute for Theoretical Physics + Copyright (c) 2011-2017 Pekka Jääskeläinen / TUT + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. +*/ + +#ifndef _KERNEL_RENAMES_H +#define _KERNEL_RENAMES_H + +/* Move built-in declarations and libm functions out of the way. + (There should be a better way of doing so. These functions are + built-in math functions for OpenCL (see Clang's "Builtins.def"). + Functions defined in libc or libm may also + interfere with OpenCL's functions, since their prototypes will be + wrong. */ +#define abs _cl_abs +#define abs_diff _cl_abs_diff +#define acos _cl_acos +#define acosh _cl_acosh +#define acospi _cl_acospi +#define add_sat _cl_add_sat +#define all _cl_all +#define any _cl_any +#define asin _cl_asin +#define asinh _cl_asinh +#define asinpi _cl_asinpi +#define atan _cl_atan +#define atan2 _cl_atan2 +#define atan2pi _cl_atan2pi +#define atanh _cl_atanh +#define atanpi _cl_atanpi +#define bitselect _cl_bitselect +#define cbrt _cl_cbrt +#define ceil _cl_ceil +#define clamp _cl_clamp +#define clz _cl_clz +#define copysign _cl_copysign +#define cos _cl_cos +#define cosh _cl_cosh +#define cospi _cl_cospi +#define cross _cl_cross +#define degrees _cl_degrees +#define distance _cl_distance +#define dot _cl_dot +#define erf _cl_erf +#define erfc _cl_erfc +#define exp _cl_exp +#define exp10 _cl_exp10 +#define exp2 _cl_exp2 +#define expm1 _cl_expm1 +#define fabs _cl_fabs +#define fast_distance _cl_fast_distance +#define fast_length _cl_fast_length +#define fast_normalize _cl_fast_normalize +#define fdim _cl_fdim +#define floor _cl_floor +#define fma _cl_fma +#define fmax _cl_fmax +#define fmin _cl_fmin +#define fmod _cl_fmod +#define fract _cl_fract +#define frexp _cl_frexp +#define hadd _cl_hadd +#define half_cos _cl_half_cos +#define half_divide _cl_half_divide +#define half_exp _cl_half_exp +#define half_exp10 _cl_half_exp10 +#define half_exp2 _cl_half_exp2 +#define half_log _cl_half_log +#define half_log10 _cl_half_log10 +#define half_log2 _cl_half_log2 +#define half_powr _cl_half_powr +#define half_recip _cl_half_recip +#define half_rsqrt _cl_half_rsqrt +#define half_sin _cl_half_sin +#define half_sqrt _cl_half_sqrt +#define half_tan _cl_half_tan +#define hypot _cl_hypot +#define ilogb _cl_ilogb +#define isequal _cl_isequal +#define isfinite _cl_isfinite +#define isgreater _cl_isgreater +#define isgreaterequal _cl_isgreaterequal +#define isinf _cl_isinf +#define isless _cl_isless +#define islessequal _cl_islessequal +#define islessgreater _cl_islessgreater +#define isnan _cl_isnan +#define isnormal _cl_isnormal +#define isnotequal _cl_isnotequal +#define isordered _cl_isordered +#define isunordered _cl_isunordered +#define ldexp _cl_ldexp +#define length _cl_length +#define lgamma _cl_lgamma +#define lgamma_r _cl_lgamma_r +#define log _cl_log +#define log10 _cl_log10 +#define log1p _cl_log1p +#define log2 _cl_log2 +#define logb _cl_logb +#define mad _cl_mad +#define mad24 _cl_mad24 +#define mad_hi _cl_mad_hi +#define mad_sat _cl_mad_sat +#define max _cl_max +#define maxmag _cl_maxmag +#define min _cl_min +#define minmag _cl_minmag +#define mix _cl_mix +#define modf _cl_modf +#define mul24 _cl_mul24 +#define mul_hi _cl_mul_hi +#define nan _cl_nan +#define native_cos _cl_native_cos +#define native_divide _cl_native_divide +#define native_exp _cl_native_exp +#define native_exp10 _cl_native_exp10 +#define native_exp2 _cl_native_exp2 +#define native_log _cl_native_log +#define native_log10 _cl_native_log10 +#define native_log2 _cl_native_log2 +#define native_powr _cl_native_powr +#define native_recip _cl_native_recip +#define native_rsqrt _cl_native_rsqrt +#define native_sin _cl_native_sin +#define native_sqrt _cl_native_sqrt +#define native_tan _cl_native_tan +#define nextafter _cl_nextafter +#define normalize _cl_normalize +#define popcount _cl_popcount +#define pow _cl_pow +#define pown _cl_pown +#define powr _cl_powr +#define radians _cl_radians +#define remainder _cl_remainder +#define remquo _cl_remquo +#define rhadd _cl_rhadd +#define rint _cl_rint +#define rootn _cl_rootn +#define rotate _cl_rotate +#define round _cl_round +#define rsqrt _cl_rsqrt +#define select _cl_select +#define sign _cl_sign +#define signbit _cl_signbit +#define sin _cl_sin +#define sincos _cl_sincos +#define sinh _cl_sinh +#define sinpi _cl_sinpi +#define smoothstep _cl_smoothstep +#define sqrt _cl_sqrt +#define step _cl_step +#define sub_sat _cl_sub_sat +#define tan _cl_tan +#define tanh _cl_tanh +#define tanpi _cl_tanpi +#define tgamma _cl_tgamma +#define trunc _cl_trunc +#define upsample _cl_upsample +#define atom_add atomic_add +#define atom_sub atomic_sub +#define atom_xchg atomic_xchg +#define atom_inc atomic_inc +#define atom_dec atomic_dec +#define atom_cmpxchg atomic_cmpxchg +#define atom_min atomic_min +#define atom_max atomic_max +#define atom_and atomic_and +#define atom_or atomic_or +#define atom_xor atomic_xor + +#endif diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/_clang_opencl.h b/benchmarks/new_opencl/compiler/share/pocl/include/_clang_opencl.h new file mode 100644 index 00000000..09923186 --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/_clang_opencl.h @@ -0,0 +1,91 @@ +/* This file includes opencl-c.h from Clang and fixes a few pocl extras. + + Copyright (c) 2011-2017 Pekka Jääskeläinen / TUT + Copyright (c) 2017 Michal Babej / Tampere University of Technology + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. +*/ + +#ifndef _OPENCL_H_ +/* Use the declarations shipped with Clang. */ +/* Check for _OPENCL_H already here because the kernel compiler loads the + header beforehand, but cannot find the file due to include paths not + set up. */ +#include + +/* Missing declarations from opencl-c.h. Some of the geometric builtins are + defined only up to 4 vectors, but we implement them all: */ +#ifdef cl_khr_fp16 +#pragma OPENCL EXTENSION cl_khr_fp16 : enable +half _CL_OVERLOADABLE _CL_READNONE length (half8 p); +half _CL_OVERLOADABLE _CL_READNONE length (half16 p); + +half _CL_OVERLOADABLE _CL_READNONE fast_length (half8 p); +half _CL_OVERLOADABLE _CL_READNONE fast_length (half16 p); + +half8 _CL_OVERLOADABLE _CL_READNONE normalize (half8 p); +half16 _CL_OVERLOADABLE _CL_READNONE normalize (half16 p); + +half8 _CL_OVERLOADABLE _CL_READNONE fast_normalize (half8 p); +half16 _CL_OVERLOADABLE _CL_READNONE fast_normalize (half16 p); + +half _CL_OVERLOADABLE _CL_READNONE dot (half8 p0, half8 p1); +half _CL_OVERLOADABLE _CL_READNONE dot (half16 p0, half16 p1); +#endif + +float _CL_OVERLOADABLE _CL_READNONE length (float8 p); +float _CL_OVERLOADABLE _CL_READNONE length (float16 p); + +float _CL_OVERLOADABLE _CL_READNONE fast_length (float8 p); +float _CL_OVERLOADABLE _CL_READNONE fast_length (float16 p); + +float8 _CL_OVERLOADABLE _CL_READNONE normalize (float8 p); +float16 _CL_OVERLOADABLE _CL_READNONE normalize (float16 p); + +float8 _CL_OVERLOADABLE _CL_READNONE fast_normalize (float8 p); +float16 _CL_OVERLOADABLE _CL_READNONE fast_normalize (float16 p); + +float _CL_OVERLOADABLE _CL_READNONE dot (float8 p0, float8 p1); +float _CL_OVERLOADABLE _CL_READNONE dot (float16 p0, float16 p1); + +#ifdef cl_khr_fp64 +#pragma OPENCL EXTENSION cl_khr_fp64 : enable + +double _CL_OVERLOADABLE _CL_READNONE length (double8 p); +double _CL_OVERLOADABLE _CL_READNONE length (double16 p); + +double _CL_OVERLOADABLE _CL_READNONE fast_length (double p); +double _CL_OVERLOADABLE _CL_READNONE fast_length (double2 p); +double _CL_OVERLOADABLE _CL_READNONE fast_length (double3 p); +double _CL_OVERLOADABLE _CL_READNONE fast_length (double4 p); +double _CL_OVERLOADABLE _CL_READNONE fast_length (double8 p); +double _CL_OVERLOADABLE _CL_READNONE fast_length (double16 p); + +double8 _CL_OVERLOADABLE _CL_READNONE normalize (double8 p); +double16 _CL_OVERLOADABLE _CL_READNONE normalize (double16 p); + +double8 _CL_OVERLOADABLE _CL_READNONE fast_normalize (double8 p); +double16 _CL_OVERLOADABLE _CL_READNONE fast_normalize (double16 p); + +double _CL_OVERLOADABLE _CL_READNONE dot (double8 p0, double8 p1); +double _CL_OVERLOADABLE _CL_READNONE dot (double16 p0, double16 p1); + +#endif + +#endif \ No newline at end of file diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/_enable_all_exts.h b/benchmarks/new_opencl/compiler/share/pocl/include/_enable_all_exts.h new file mode 100644 index 00000000..409565ba --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/_enable_all_exts.h @@ -0,0 +1,58 @@ +/* Enable all extensions known to pocl, which a device supports. + * This is required at the start of include/_kernel.h for prototypes, + * then at kernel lib compilation phase (because _kernel.h disables + * everything at the end). + */ + +/* OpenCL 1.0-only extensions */ + +#if (__OPENCL_C_VERSION__ < 110) + +#ifdef cl_khr_global_int32_base_atomics +# pragma OPENCL EXTENSION cl_khr_global_int32_base_atomics : enable +#endif + +#ifdef cl_khr_global_int32_extended_atomics +# pragma OPENCL EXTENSION cl_khr_global_int32_extended_atomics : enable +#endif + +#ifdef cl_khr_local_int32_base_atomics +# pragma OPENCL EXTENSION cl_khr_local_int32_base_atomics : enable +#endif + +#ifdef cl_khr_local_int32_extended_atomics +# pragma OPENCL EXTENSION cl_khr_local_int32_extended_atomics : enable +#endif + +#ifdef cl_khr_byte_addressable_store +# pragma OPENCL EXTENSION cl_khr_byte_addressable_store : enable +#endif + +#endif + + +/* all versions */ +#ifdef cl_khr_fp16 +# pragma OPENCL EXTENSION cl_khr_fp16: enable +#endif + +#ifdef cl_khr_fp64 +# pragma OPENCL EXTENSION cl_khr_fp64: enable +#endif + +#ifdef cl_khr_int64_base_atomics +# pragma OPENCL EXTENSION cl_khr_int64_base_atomics : enable +#endif + +#ifdef cl_khr_int64_extended_atomics +# pragma OPENCL EXTENSION cl_khr_int64_extended_atomics : enable +#endif + +#if (__clang_major__ > 4) + +#ifdef cl_khr_3d_image_writes +# pragma OPENCL EXTENSION cl_khr_3d_image_writes : enable +#endif + +#endif + diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/_kernel.h b/benchmarks/new_opencl/compiler/share/pocl/include/_kernel.h new file mode 100644 index 00000000..427794e3 --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/_kernel.h @@ -0,0 +1,233 @@ +/* pocl/_kernel.h - OpenCL types and runtime library + functions declarations. This should be included only from OpenCL C files. + + Copyright (c) 2011 Universidad Rey Juan Carlos + Copyright (c) 2011-2017 Pekka Jääskeläinen / TUT + Copyright (c) 2011-2013 Erik Schnetter + Perimeter Institute for Theoretical Physics + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. +*/ + +/* If the -cl-std build option is not specified, the highest OpenCL C 1.x + * language version supported by each device is used as the version of + * OpenCL C when compiling the program for each device. + */ +#ifndef __OPENCL_C_VERSION__ +#define __OPENCL_C_VERSION__ 120 +#endif + +#if (__OPENCL_C_VERSION__ > 99) +#define CL_VERSION_1_0 100 +#endif + +#if (__OPENCL_C_VERSION__ > 109) +#define CL_VERSION_1_1 110 +#endif + +#if (__OPENCL_C_VERSION__ > 119) +#define CL_VERSION_1_2 120 +#endif + +#if (__OPENCL_C_VERSION__ > 199) +#define CL_VERSION_2_0 200 +#endif + +#include "_enable_all_exts.h" + +#include "_builtin_renames.h" + +/* Define some feature test macros to help write generic code. These are used + * mostly in _pocl_opencl.h header + some .cl files in kernel library */ + +#ifdef cl_khr_int64 +# define __IF_INT64(x) x +#else +# define __IF_INT64(x) +#endif +#ifdef cl_khr_fp16 +# define __IF_FP16(x) x +#else +# define __IF_FP16(x) +#endif +#ifdef cl_khr_fp64 +# define __IF_FP64(x) x +#else +# define __IF_FP64(x) +#endif +#ifdef cl_khr_int64_base_atomics +#define __IF_BA64(x) x +#else +#define __IF_BA64(x) +#endif +#ifdef cl_khr_int64_extended_atomics +#define __IF_EA64(x) x +#else +#define __IF_EA64(x) +#endif + +/****************************************************************************/ + +/* Function/type attributes supported by Clang/SPIR */ +#if __has_attribute(__always_inline__) +# define _CL_ALWAYSINLINE __attribute__((__always_inline__)) +#else +# define _CL_ALWAYSINLINE +#endif +#if __has_attribute(__noinline__) +# define _CL_NOINLINE __attribute__((__noinline__)) +#else +# define _CL_NOINLINE +#endif +#if __has_attribute(__overloadable__) +# define _CL_OVERLOADABLE __attribute__((__overloadable__)) +#else +# define _CL_OVERLOADABLE +#endif +#if __has_attribute(__pure__) +# define _CL_READONLY __attribute__((__pure__)) +#else +# define _CL_READONLY +#endif +#if __has_attribute(__const__) +# define _CL_READNONE __attribute__((__const__)) +#else +# define _CL_READNONE +#endif +#if __has_attribute(convergent) +# define _CL_CONVERGENT __attribute__((convergent)) +#else +# define _CL_CONVERGENT +#endif + +/************************ setup Clang version macros ******************/ + +#if (__clang_major__ == 6) + +# undef LLVM_6_0 +# define LLVM_6_0 + +#elif (__clang_major__ == 7) + +# undef LLVM_7_0 +# define LLVM_7_0 + +#elif (__clang_major__ == 8) + +# undef LLVM_8_0 +# define LLVM_8_0 + +#elif (__clang_major__ == 9) + +# undef LLVM_9_0 +# define LLVM_9_0 + +#elif (__clang_major__ == 10) + +# undef LLVM_10_0 +# define LLVM_10_0 + +#else + +#error Unsupported Clang/LLVM version. + +#endif + +#ifndef LLVM_10_0 +#define LLVM_OLDER_THAN_10_0 1 + +#ifndef LLVM_9_0 +#define LLVM_OLDER_THAN_9_0 1 + +#ifndef LLVM_8_0 +#define LLVM_OLDER_THAN_8_0 1 + +#ifndef LLVM_7_0 +#define LLVM_OLDER_THAN_7_0 1 + +#ifndef LLVM_6_0 +#define LLVM_OLDER_THAN_6_0 1 + +#endif +#endif +#endif +#endif +#endif + +/****************************************************************************/ + +/* A static assert statement to catch inconsistencies at build time */ +#if __has_extension(__c_static_assert__) +# define _CL_STATIC_ASSERT(_t, _x) _Static_assert(_x, #_t) +#else +# define _CL_STATIC_ASSERT(_t, _x) typedef int __cl_ai##_t[(x) ? 1 : -1]; +#endif + +/****************************************************************************/ + +#define IMG_RO_AQ __read_only +#define IMG_WO_AQ __write_only + +#if (__OPENCL_C_VERSION__ > 199) +#define CLANG_HAS_RW_IMAGES +#define IMG_RW_AQ __read_write +#else +#undef CLANG_HAS_RW_IMAGES +#define IMG_RW_AQ __RW_IMAGES_UNSUPPORTED_BEFORE_CL_20 +#endif + +/****************************************************************************/ +/* use Clang opencl header for definitions. */ + +#ifdef POCL_DEVICE_ADDRESS_BITS + +/* If we wish to override the Clang set __SIZE_TYPE__ for this target, + let's do it here so the opencl-c.h sets size_t to the wanted type. */ + +#ifdef __SIZE_TYPE__ +#undef __SIZE_TYPE__ +#endif + +#if POCL_DEVICE_ADDRESS_BITS == 32 +#define __SIZE_TYPE__ uint +#elif POCL_DEVICE_ADDRESS_BITS == 64 +#define __SIZE_TYPE__ ulong +#else +#error Unsupported POCL_DEVICE_ADDRESS_BITS value. +#endif + +#endif + +#include "_clang_opencl.h" + +/****************************************************************************/ + +/* GNU's libm seems to use INT_MIN here while the Clang's header uses + INT_MAX. Both are allowed by the OpenCL specs, but we want them to + be unified to avoid failing tests. */ +#undef FP_ILOGBNAN +#undef FP_ILOGB0 +#define FP_ILOGBNAN INT_MIN +#define FP_ILOGB0 INT_MIN + +/****************************************************************************/ + +#include "pocl_image_types.h" + +#pragma OPENCL EXTENSION all : disable diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/_kernel_c.h b/benchmarks/new_opencl/compiler/share/pocl/include/_kernel_c.h new file mode 100644 index 00000000..ddda5bbc --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/_kernel_c.h @@ -0,0 +1,189 @@ +/* pocl/_kernel_c.h - C compatible OpenCL types and runtime library + functions declarations for kernel builtin implementations using C. + + Copyright (c) 2011 Universidad Rey Juan Carlos + Copyright (c) 2011-2017 Pekka Jääskeläinen / TUT + Copyright (c) 2011-2013 Erik Schnetter + Perimeter Institute for Theoretical Physics + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. +*/ +/** + * Header that can be implemented in C compiled implementations of + * built-in functions to introduce the OpenCL C compatible types etc. + */ +#ifndef _KERNEL_C_H +#define _KERNEL_C_H + +#include "pocl_types.h" + +#include "_kernel_constants.h" + +/* Function/type attributes supported by Clang/SPIR */ +#if __has_attribute(__always_inline__) +# define _CL_ALWAYSINLINE __attribute__((__always_inline__)) +#else +# define _CL_ALWAYSINLINE +#endif +#if __has_attribute(__noinline__) +# define _CL_NOINLINE __attribute__((__noinline__)) +#else +# define _CL_NOINLINE +#endif +#if __has_attribute(__overloadable__) +# define _CL_OVERLOADABLE __attribute__((__overloadable__)) +#else +# define _CL_OVERLOADABLE +#endif +#if __has_attribute(__pure__) +# define _CL_READONLY __attribute__((__pure__)) +#else +# define _CL_READONLY +#endif +#if __has_attribute(__const__) +# define _CL_READNONE __attribute__((__const__)) +#else +# define _CL_READNONE +#endif +#if __has_attribute(convergent) +# define _CL_CONVERGENT __attribute__((convergent)) +#else +# define _CL_CONVERGENT +#endif + + +typedef char char2 __attribute__((__ext_vector_type__(2))); +typedef char char3 __attribute__((__ext_vector_type__(3))); +typedef char char4 __attribute__((__ext_vector_type__(4))); +typedef char char8 __attribute__((__ext_vector_type__(8))); +typedef char char16 __attribute__((__ext_vector_type__(16))); + +typedef uchar uchar2 __attribute__((__ext_vector_type__(2))); +typedef uchar uchar3 __attribute__((__ext_vector_type__(3))); +typedef uchar uchar4 __attribute__((__ext_vector_type__(4))); +typedef uchar uchar8 __attribute__((__ext_vector_type__(8))); +typedef uchar uchar16 __attribute__((__ext_vector_type__(16))); + +typedef short short2 __attribute__((__ext_vector_type__(2))); +typedef short short3 __attribute__((__ext_vector_type__(3))); +typedef short short4 __attribute__((__ext_vector_type__(4))); +typedef short short8 __attribute__((__ext_vector_type__(8))); +typedef short short16 __attribute__((__ext_vector_type__(16))); + +typedef ushort ushort2 __attribute__((__ext_vector_type__(2))); +typedef ushort ushort3 __attribute__((__ext_vector_type__(3))); +typedef ushort ushort4 __attribute__((__ext_vector_type__(4))); +typedef ushort ushort8 __attribute__((__ext_vector_type__(8))); +typedef ushort ushort16 __attribute__((__ext_vector_type__(16))); + +typedef int int2 __attribute__((__ext_vector_type__(2))); +typedef int int3 __attribute__((__ext_vector_type__(3))); +typedef int int4 __attribute__((__ext_vector_type__(4))); +typedef int int8 __attribute__((__ext_vector_type__(8))); +typedef int int16 __attribute__((__ext_vector_type__(16))); + +typedef uint uint2 __attribute__((__ext_vector_type__(2))); +typedef uint uint3 __attribute__((__ext_vector_type__(3))); +typedef uint uint4 __attribute__((__ext_vector_type__(4))); +typedef uint uint8 __attribute__((__ext_vector_type__(8))); +typedef uint uint16 __attribute__((__ext_vector_type__(16))); + +#if defined(__CBUILD__) && defined(cl_khr_fp16) +/* NOTE: the Clang's __fp16 does not work robustly in C mode, + it might produce invalid code at least with half vectors. + Using the native 'half' type in OpenCL C mode works better. */ +typedef __fp16 half; +#endif + +typedef half half2 __attribute__((__ext_vector_type__(2))); +typedef half half3 __attribute__((__ext_vector_type__(3))); +typedef half half4 __attribute__((__ext_vector_type__(4))); +typedef half half8 __attribute__((__ext_vector_type__(8))); +typedef half half16 __attribute__((__ext_vector_type__(16))); + +typedef float float2 __attribute__((__ext_vector_type__(2))); +typedef float float3 __attribute__((__ext_vector_type__(3))); +typedef float float4 __attribute__((__ext_vector_type__(4))); +typedef float float8 __attribute__((__ext_vector_type__(8))); +typedef float float16 __attribute__((__ext_vector_type__(16))); + +#ifdef cl_khr_fp64 +# ifndef __CBUILD__ +# pragma OPENCL EXTENSION cl_khr_fp64 : enable +# endif +typedef double double2 __attribute__((__ext_vector_type__(2))); +typedef double double3 __attribute__((__ext_vector_type__(3))); +typedef double double4 __attribute__((__ext_vector_type__(4))); +typedef double double8 __attribute__((__ext_vector_type__(8))); +typedef double double16 __attribute__((__ext_vector_type__(16))); +#endif + +#ifdef cl_khr_int64 +typedef long long2 __attribute__((__ext_vector_type__(2))); +typedef long long3 __attribute__((__ext_vector_type__(3))); +typedef long long4 __attribute__((__ext_vector_type__(4))); +typedef long long8 __attribute__((__ext_vector_type__(8))); +typedef long long16 __attribute__((__ext_vector_type__(16))); + +typedef ulong ulong2 __attribute__((__ext_vector_type__(2))); +typedef ulong ulong3 __attribute__((__ext_vector_type__(3))); +typedef ulong ulong4 __attribute__((__ext_vector_type__(4))); +typedef ulong ulong8 __attribute__((__ext_vector_type__(8))); +typedef ulong ulong16 __attribute__((__ext_vector_type__(16))); +#endif + +#if defined(__TCE__) + +#define POCL_ADDRESS_SPACE_PRIVATE 0 +#define POCL_ADDRESS_SPACE_GLOBAL 1 +#define POCL_ADDRESS_SPACE_LOCAL 3 +#define POCL_ADDRESS_SPACE_CONSTANT 2 +#define POCL_ADDRESS_SPACE_GENERIC 6 + +#endif + +typedef uint cl_mem_fence_flags; + +/* Integer Constants */ + +#if defined(__CBUILD__) + +#define CHAR_BIT 8 +#define CHAR_MAX SCHAR_MAX +#define CHAR_MIN SCHAR_MIN +#define INT_MAX 2147483647 +#define INT_MIN (-2147483647 - 1) +#ifdef cl_khr_int64 +#define LONG_MAX 0x7fffffffffffffffL +#define LONG_MIN (-0x7fffffffffffffffL - 1) +#endif +#define SCHAR_MAX 127 +#define SCHAR_MIN (-127 - 1) +#define SHRT_MAX 32767 +#define SHRT_MIN (-32767 - 1) +#define UCHAR_MAX 255 +#define USHRT_MAX 65535 +#define UINT_MAX 0xffffffff +#ifdef cl_khr_int64 +#define ULONG_MAX 0xffffffffffffffffUL +#endif + +#endif /* __CBUILD__ */ + +#endif diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/_kernel_constants.h b/benchmarks/new_opencl/compiler/share/pocl/include/_kernel_constants.h new file mode 100644 index 00000000..e45ebdb7 --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/_kernel_constants.h @@ -0,0 +1,93 @@ +/* pocl/_kernel_constants.h - C compatible OpenCL types and runtime library + constants declarations. + + Copyright (c) 2011 Universidad Rey Juan Carlos + Copyright (c) 2011-2013 Pekka Jääskeläinen / TUT + Copyright (c) 2011-2013 Erik Schnetter + Perimeter Institute for Theoretical Physics + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. +*/ +/** + * Header that can be implemented in C compiled implementations of + * built-in functions to introduce the OpenCL C compatible constants. + */ +#ifndef _KERNEL_CONSTANTS_H +#define _KERNEL_CONSTANTS_H + +/* clang's header defines these */ +#ifndef _OPENCL_H_ + +/* cl_channel_order */ +#define CLK_R 0x10B0 +#define CLK_A 0x10B1 +#define CLK_RG 0x10B2 +#define CLK_RA 0x10B3 +#define CLK_RGB 0x10B4 +#define CLK_RGBA 0x10B5 +#define CLK_BGRA 0x10B6 +#define CLK_ARGB 0x10B7 +#define CLK_INTENSITY 0x10B8 +#define CLK_LUMINANCE 0x10B9 +#define CLK_Rx 0x10BA +#define CLK_RGx 0x10BB +#define CLK_RGBx 0x10BC +#define CLK_DEPTH 0x10BD +#define CLK_DEPTH_STENCIL 0x10BE + +/* cl_channel_type */ +#define CLK_SNORM_INT8 0x10D0 +#define CLK_SNORM_INT16 0x10D1 +#define CLK_UNORM_INT8 0x10D2 +#define CLK_UNORM_INT16 0x10D3 +#define CLK_UNORM_SHORT_565 0x10D4 +#define CLK_UNORM_SHORT_555 0x10D5 +#define CLK_UNORM_INT_101010 0x10D6 +#define CLK_SIGNED_INT8 0x10D7 +#define CLK_SIGNED_INT16 0x10D8 +#define CLK_SIGNED_INT32 0x10D9 +#define CLK_UNSIGNED_INT8 0x10DA +#define CLK_UNSIGNED_INT16 0x10DB +#define CLK_UNSIGNED_INT32 0x10DC +#define CLK_HALF_FLOAT 0x10DD +#define CLK_FLOAT 0x10DE +#define CLK_UNORM_INT24 0x10DF + +/* cl_addressing _mode */ +#define CLK_ADDRESS_NONE 0x00 +#define CLK_ADDRESS_CLAMP_TO_EDGE 0x02 +#define CLK_ADDRESS_CLAMP 0x04 +#define CLK_ADDRESS_REPEAT 0x06 +#define CLK_ADDRESS_MIRRORED_REPEAT 0x08 + +/* cl_sampler_info */ +#define CLK_NORMALIZED_COORDS_FALSE 0x00 +#define CLK_NORMALIZED_COORDS_TRUE 0x01 + +/* filter_mode */ +#define CLK_FILTER_NEAREST 0x10 +#define CLK_FILTER_LINEAR 0x20 + +/* barrier() flags */ +#define CLK_LOCAL_MEM_FENCE 0x01 +#define CLK_GLOBAL_MEM_FENCE 0x02 + +#endif + +#endif diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/opencl-c-base.h b/benchmarks/new_opencl/compiler/share/pocl/include/opencl-c-base.h new file mode 100644 index 00000000..430e07d3 --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/opencl-c-base.h @@ -0,0 +1,571 @@ +//===----- opencl-c-base.h - OpenCL C language base definitions -----------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _OPENCL_BASE_H_ +#define _OPENCL_BASE_H_ + +// built-in scalar data types: + +/** + * An unsigned 8-bit integer. + */ +typedef unsigned char uchar; + +/** + * An unsigned 16-bit integer. + */ +typedef unsigned short ushort; + +/** + * An unsigned 32-bit integer. + */ +typedef unsigned int uint; + +/** + * An unsigned 64-bit integer. + */ +typedef unsigned long ulong; + +/** + * The unsigned integer type of the result of the sizeof operator. This + * is a 32-bit unsigned integer if CL_DEVICE_ADDRESS_BITS + * defined in table 4.3 is 32-bits and is a 64-bit unsigned integer if + * CL_DEVICE_ADDRESS_BITS is 64-bits. + */ +typedef __SIZE_TYPE__ size_t; + +/** + * A signed integer type that is the result of subtracting two pointers. + * This is a 32-bit signed integer if CL_DEVICE_ADDRESS_BITS + * defined in table 4.3 is 32-bits and is a 64-bit signed integer if + * CL_DEVICE_ADDRESS_BITS is 64-bits. + */ +typedef __PTRDIFF_TYPE__ ptrdiff_t; + +/** + * A signed integer type with the property that any valid pointer to + * void can be converted to this type, then converted back to pointer + * to void, and the result will compare equal to the original pointer. + */ +typedef __INTPTR_TYPE__ intptr_t; + +/** + * An unsigned integer type with the property that any valid pointer to + * void can be converted to this type, then converted back to pointer + * to void, and the result will compare equal to the original pointer. + */ +typedef __UINTPTR_TYPE__ uintptr_t; + +// built-in vector data types: +typedef char char2 __attribute__((ext_vector_type(2))); +typedef char char3 __attribute__((ext_vector_type(3))); +typedef char char4 __attribute__((ext_vector_type(4))); +typedef char char8 __attribute__((ext_vector_type(8))); +typedef char char16 __attribute__((ext_vector_type(16))); +typedef uchar uchar2 __attribute__((ext_vector_type(2))); +typedef uchar uchar3 __attribute__((ext_vector_type(3))); +typedef uchar uchar4 __attribute__((ext_vector_type(4))); +typedef uchar uchar8 __attribute__((ext_vector_type(8))); +typedef uchar uchar16 __attribute__((ext_vector_type(16))); +typedef short short2 __attribute__((ext_vector_type(2))); +typedef short short3 __attribute__((ext_vector_type(3))); +typedef short short4 __attribute__((ext_vector_type(4))); +typedef short short8 __attribute__((ext_vector_type(8))); +typedef short short16 __attribute__((ext_vector_type(16))); +typedef ushort ushort2 __attribute__((ext_vector_type(2))); +typedef ushort ushort3 __attribute__((ext_vector_type(3))); +typedef ushort ushort4 __attribute__((ext_vector_type(4))); +typedef ushort ushort8 __attribute__((ext_vector_type(8))); +typedef ushort ushort16 __attribute__((ext_vector_type(16))); +typedef int int2 __attribute__((ext_vector_type(2))); +typedef int int3 __attribute__((ext_vector_type(3))); +typedef int int4 __attribute__((ext_vector_type(4))); +typedef int int8 __attribute__((ext_vector_type(8))); +typedef int int16 __attribute__((ext_vector_type(16))); +typedef uint uint2 __attribute__((ext_vector_type(2))); +typedef uint uint3 __attribute__((ext_vector_type(3))); +typedef uint uint4 __attribute__((ext_vector_type(4))); +typedef uint uint8 __attribute__((ext_vector_type(8))); +typedef uint uint16 __attribute__((ext_vector_type(16))); +typedef long long2 __attribute__((ext_vector_type(2))); +typedef long long3 __attribute__((ext_vector_type(3))); +typedef long long4 __attribute__((ext_vector_type(4))); +typedef long long8 __attribute__((ext_vector_type(8))); +typedef long long16 __attribute__((ext_vector_type(16))); +typedef ulong ulong2 __attribute__((ext_vector_type(2))); +typedef ulong ulong3 __attribute__((ext_vector_type(3))); +typedef ulong ulong4 __attribute__((ext_vector_type(4))); +typedef ulong ulong8 __attribute__((ext_vector_type(8))); +typedef ulong ulong16 __attribute__((ext_vector_type(16))); +typedef float float2 __attribute__((ext_vector_type(2))); +typedef float float3 __attribute__((ext_vector_type(3))); +typedef float float4 __attribute__((ext_vector_type(4))); +typedef float float8 __attribute__((ext_vector_type(8))); +typedef float float16 __attribute__((ext_vector_type(16))); +#ifdef cl_khr_fp16 +#pragma OPENCL EXTENSION cl_khr_fp16 : enable +typedef half half2 __attribute__((ext_vector_type(2))); +typedef half half3 __attribute__((ext_vector_type(3))); +typedef half half4 __attribute__((ext_vector_type(4))); +typedef half half8 __attribute__((ext_vector_type(8))); +typedef half half16 __attribute__((ext_vector_type(16))); +#endif +#ifdef cl_khr_fp64 +#if __OPENCL_C_VERSION__ < CL_VERSION_1_2 +#pragma OPENCL EXTENSION cl_khr_fp64 : enable +#endif +typedef double double2 __attribute__((ext_vector_type(2))); +typedef double double3 __attribute__((ext_vector_type(3))); +typedef double double4 __attribute__((ext_vector_type(4))); +typedef double double8 __attribute__((ext_vector_type(8))); +typedef double double16 __attribute__((ext_vector_type(16))); +#endif + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#define NULL ((void*)0) +#endif + +/** + * Value of maximum non-infinite single-precision floating-point + * number. + */ +#define MAXFLOAT 0x1.fffffep127f + +/** + * A positive float constant expression. HUGE_VALF evaluates + * to +infinity. Used as an error value returned by the built-in + * math functions. + */ +#define HUGE_VALF (__builtin_huge_valf()) + +/** + * A positive double constant expression. HUGE_VAL evaluates + * to +infinity. Used as an error value returned by the built-in + * math functions. + */ +#define HUGE_VAL (__builtin_huge_val()) + +/** + * A constant expression of type float representing positive or + * unsigned infinity. + */ +#define INFINITY (__builtin_inff()) + +/** + * A constant expression of type float representing a quiet NaN. + */ +#define NAN as_float(INT_MAX) + +#define FP_ILOGB0 INT_MIN +#define FP_ILOGBNAN INT_MAX + +#define FLT_DIG 6 +#define FLT_MANT_DIG 24 +#define FLT_MAX_10_EXP +38 +#define FLT_MAX_EXP +128 +#define FLT_MIN_10_EXP -37 +#define FLT_MIN_EXP -125 +#define FLT_RADIX 2 +#define FLT_MAX 0x1.fffffep127f +#define FLT_MIN 0x1.0p-126f +#define FLT_EPSILON 0x1.0p-23f + +#define M_E_F 2.71828182845904523536028747135266250f +#define M_LOG2E_F 1.44269504088896340735992468100189214f +#define M_LOG10E_F 0.434294481903251827651128918916605082f +#define M_LN2_F 0.693147180559945309417232121458176568f +#define M_LN10_F 2.30258509299404568401799145468436421f +#define M_PI_F 3.14159265358979323846264338327950288f +#define M_PI_2_F 1.57079632679489661923132169163975144f +#define M_PI_4_F 0.785398163397448309615660845819875721f +#define M_1_PI_F 0.318309886183790671537767526745028724f +#define M_2_PI_F 0.636619772367581343075535053490057448f +#define M_2_SQRTPI_F 1.12837916709551257389615890312154517f +#define M_SQRT2_F 1.41421356237309504880168872420969808f +#define M_SQRT1_2_F 0.707106781186547524400844362104849039f + +#define DBL_DIG 15 +#define DBL_MANT_DIG 53 +#define DBL_MAX_10_EXP +308 +#define DBL_MAX_EXP +1024 +#define DBL_MIN_10_EXP -307 +#define DBL_MIN_EXP -1021 +#define DBL_RADIX 2 +#define DBL_MAX 0x1.fffffffffffffp1023 +#define DBL_MIN 0x1.0p-1022 +#define DBL_EPSILON 0x1.0p-52 + +#define M_E 0x1.5bf0a8b145769p+1 +#define M_LOG2E 0x1.71547652b82fep+0 +#define M_LOG10E 0x1.bcb7b1526e50ep-2 +#define M_LN2 0x1.62e42fefa39efp-1 +#define M_LN10 0x1.26bb1bbb55516p+1 +#define M_PI 0x1.921fb54442d18p+1 +#define M_PI_2 0x1.921fb54442d18p+0 +#define M_PI_4 0x1.921fb54442d18p-1 +#define M_1_PI 0x1.45f306dc9c883p-2 +#define M_2_PI 0x1.45f306dc9c883p-1 +#define M_2_SQRTPI 0x1.20dd750429b6dp+0 +#define M_SQRT2 0x1.6a09e667f3bcdp+0 +#define M_SQRT1_2 0x1.6a09e667f3bcdp-1 + +#ifdef cl_khr_fp16 + +#define HALF_DIG 3 +#define HALF_MANT_DIG 11 +#define HALF_MAX_10_EXP +4 +#define HALF_MAX_EXP +16 +#define HALF_MIN_10_EXP -4 +#define HALF_MIN_EXP -13 +#define HALF_RADIX 2 +#define HALF_MAX ((0x1.ffcp15h)) +#define HALF_MIN ((0x1.0p-14h)) +#define HALF_EPSILON ((0x1.0p-10h)) + +#define M_E_H 2.71828182845904523536028747135266250h +#define M_LOG2E_H 1.44269504088896340735992468100189214h +#define M_LOG10E_H 0.434294481903251827651128918916605082h +#define M_LN2_H 0.693147180559945309417232121458176568h +#define M_LN10_H 2.30258509299404568401799145468436421h +#define M_PI_H 3.14159265358979323846264338327950288h +#define M_PI_2_H 1.57079632679489661923132169163975144h +#define M_PI_4_H 0.785398163397448309615660845819875721h +#define M_1_PI_H 0.318309886183790671537767526745028724h +#define M_2_PI_H 0.636619772367581343075535053490057448h +#define M_2_SQRTPI_H 1.12837916709551257389615890312154517h +#define M_SQRT2_H 1.41421356237309504880168872420969808h +#define M_SQRT1_2_H 0.707106781186547524400844362104849039h + +#endif //cl_khr_fp16 + +#define CHAR_BIT 8 +#define SCHAR_MAX 127 +#define SCHAR_MIN (-128) +#define UCHAR_MAX 255 +#define CHAR_MAX SCHAR_MAX +#define CHAR_MIN SCHAR_MIN +#define USHRT_MAX 65535 +#define SHRT_MAX 32767 +#define SHRT_MIN (-32768) +#define UINT_MAX 0xffffffff +#define INT_MAX 2147483647 +#define INT_MIN (-2147483647-1) +#define ULONG_MAX 0xffffffffffffffffUL +#define LONG_MAX 0x7fffffffffffffffL +#define LONG_MIN (-0x7fffffffffffffffL-1) + +// OpenCL v1.1 s6.11.8, v1.2 s6.12.8, v2.0 s6.13.8 - Synchronization Functions + +// Flag type and values for barrier, mem_fence, read_mem_fence, write_mem_fence +typedef uint cl_mem_fence_flags; + +/** + * Queue a memory fence to ensure correct + * ordering of memory operations to local memory + */ +#define CLK_LOCAL_MEM_FENCE 0x01 + +/** + * Queue a memory fence to ensure correct + * ordering of memory operations to global memory + */ +#define CLK_GLOBAL_MEM_FENCE 0x02 + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +typedef enum memory_scope { + memory_scope_work_item = __OPENCL_MEMORY_SCOPE_WORK_ITEM, + memory_scope_work_group = __OPENCL_MEMORY_SCOPE_WORK_GROUP, + memory_scope_device = __OPENCL_MEMORY_SCOPE_DEVICE, + memory_scope_all_svm_devices = __OPENCL_MEMORY_SCOPE_ALL_SVM_DEVICES, +#if defined(cl_intel_subgroups) || defined(cl_khr_subgroups) + memory_scope_sub_group = __OPENCL_MEMORY_SCOPE_SUB_GROUP +#endif +} memory_scope; + +/** + * Queue a memory fence to ensure correct ordering of memory + * operations between work-items of a work-group to + * image memory. + */ +#define CLK_IMAGE_MEM_FENCE 0x04 + +#ifndef ATOMIC_VAR_INIT +#define ATOMIC_VAR_INIT(x) (x) +#endif //ATOMIC_VAR_INIT +#define ATOMIC_FLAG_INIT 0 + +// enum values aligned with what clang uses in EmitAtomicExpr() +typedef enum memory_order +{ + memory_order_relaxed = __ATOMIC_RELAXED, + memory_order_acquire = __ATOMIC_ACQUIRE, + memory_order_release = __ATOMIC_RELEASE, + memory_order_acq_rel = __ATOMIC_ACQ_REL, + memory_order_seq_cst = __ATOMIC_SEQ_CST +} memory_order; + +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v1.1 s6.11.3, v1.2 s6.12.14, v2.0 s6.13.14 - Image Read and Write Functions + +// These values need to match the runtime equivalent +// +// Addressing Mode. +// +#define CLK_ADDRESS_NONE 0 +#define CLK_ADDRESS_CLAMP_TO_EDGE 2 +#define CLK_ADDRESS_CLAMP 4 +#define CLK_ADDRESS_REPEAT 6 +#define CLK_ADDRESS_MIRRORED_REPEAT 8 + +// +// Coordination Normalization +// +#define CLK_NORMALIZED_COORDS_FALSE 0 +#define CLK_NORMALIZED_COORDS_TRUE 1 + +// +// Filtering Mode. +// +#define CLK_FILTER_NEAREST 0x10 +#define CLK_FILTER_LINEAR 0x20 + +#ifdef cl_khr_gl_msaa_sharing +#pragma OPENCL EXTENSION cl_khr_gl_msaa_sharing : enable +#endif //cl_khr_gl_msaa_sharing + +// +// Channel Datatype. +// +#define CLK_SNORM_INT8 0x10D0 +#define CLK_SNORM_INT16 0x10D1 +#define CLK_UNORM_INT8 0x10D2 +#define CLK_UNORM_INT16 0x10D3 +#define CLK_UNORM_SHORT_565 0x10D4 +#define CLK_UNORM_SHORT_555 0x10D5 +#define CLK_UNORM_INT_101010 0x10D6 +#define CLK_SIGNED_INT8 0x10D7 +#define CLK_SIGNED_INT16 0x10D8 +#define CLK_SIGNED_INT32 0x10D9 +#define CLK_UNSIGNED_INT8 0x10DA +#define CLK_UNSIGNED_INT16 0x10DB +#define CLK_UNSIGNED_INT32 0x10DC +#define CLK_HALF_FLOAT 0x10DD +#define CLK_FLOAT 0x10DE +#define CLK_UNORM_INT24 0x10DF + +// Channel order, numbering must be aligned with cl_channel_order in cl.h +// +#define CLK_R 0x10B0 +#define CLK_A 0x10B1 +#define CLK_RG 0x10B2 +#define CLK_RA 0x10B3 +#define CLK_RGB 0x10B4 +#define CLK_RGBA 0x10B5 +#define CLK_BGRA 0x10B6 +#define CLK_ARGB 0x10B7 +#define CLK_INTENSITY 0x10B8 +#define CLK_LUMINANCE 0x10B9 +#define CLK_Rx 0x10BA +#define CLK_RGx 0x10BB +#define CLK_RGBx 0x10BC +#define CLK_DEPTH 0x10BD +#define CLK_DEPTH_STENCIL 0x10BE +#if __OPENCL_C_VERSION__ >= CL_VERSION_2_0 +#define CLK_sRGB 0x10BF +#define CLK_sRGBx 0x10C0 +#define CLK_sRGBA 0x10C1 +#define CLK_sBGRA 0x10C2 +#define CLK_ABGR 0x10C3 +#endif //__OPENCL_C_VERSION__ >= CL_VERSION_2_0 + +// OpenCL v2.0 s6.13.16 - Pipe Functions +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#define CLK_NULL_RESERVE_ID (__builtin_astype(((void*)(__SIZE_MAX__)), reserve_id_t)) + +// OpenCL v2.0 s6.13.17 - Enqueue Kernels +#define CL_COMPLETE 0x0 +#define CL_RUNNING 0x1 +#define CL_SUBMITTED 0x2 +#define CL_QUEUED 0x3 + +#define CLK_SUCCESS 0 +#define CLK_ENQUEUE_FAILURE -101 +#define CLK_INVALID_QUEUE -102 +#define CLK_INVALID_NDRANGE -160 +#define CLK_INVALID_EVENT_WAIT_LIST -57 +#define CLK_DEVICE_QUEUE_FULL -161 +#define CLK_INVALID_ARG_SIZE -51 +#define CLK_EVENT_ALLOCATION_FAILURE -100 +#define CLK_OUT_OF_RESOURCES -5 + +#define CLK_NULL_QUEUE 0 +#define CLK_NULL_EVENT (__builtin_astype(((__SIZE_MAX__)), clk_event_t)) + +// execution model related definitions +#define CLK_ENQUEUE_FLAGS_NO_WAIT 0x0 +#define CLK_ENQUEUE_FLAGS_WAIT_KERNEL 0x1 +#define CLK_ENQUEUE_FLAGS_WAIT_WORK_GROUP 0x2 + +typedef int kernel_enqueue_flags_t; +typedef int clk_profiling_info; + +// Profiling info name (see capture_event_profiling_info) +#define CLK_PROFILING_COMMAND_EXEC_TIME 0x1 + +#define MAX_WORK_DIM 3 + +typedef struct { + unsigned int workDimension; + size_t globalWorkOffset[MAX_WORK_DIM]; + size_t globalWorkSize[MAX_WORK_DIM]; + size_t localWorkSize[MAX_WORK_DIM]; +} ndrange_t; + +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +#ifdef cl_intel_device_side_avc_motion_estimation +#pragma OPENCL EXTENSION cl_intel_device_side_avc_motion_estimation : begin + +#define CLK_AVC_ME_MAJOR_16x16_INTEL 0x0 +#define CLK_AVC_ME_MAJOR_16x8_INTEL 0x1 +#define CLK_AVC_ME_MAJOR_8x16_INTEL 0x2 +#define CLK_AVC_ME_MAJOR_8x8_INTEL 0x3 + +#define CLK_AVC_ME_MINOR_8x8_INTEL 0x0 +#define CLK_AVC_ME_MINOR_8x4_INTEL 0x1 +#define CLK_AVC_ME_MINOR_4x8_INTEL 0x2 +#define CLK_AVC_ME_MINOR_4x4_INTEL 0x3 + +#define CLK_AVC_ME_MAJOR_FORWARD_INTEL 0x0 +#define CLK_AVC_ME_MAJOR_BACKWARD_INTEL 0x1 +#define CLK_AVC_ME_MAJOR_BIDIRECTIONAL_INTEL 0x2 + +#define CLK_AVC_ME_PARTITION_MASK_ALL_INTEL 0x0 +#define CLK_AVC_ME_PARTITION_MASK_16x16_INTEL 0x7E +#define CLK_AVC_ME_PARTITION_MASK_16x8_INTEL 0x7D +#define CLK_AVC_ME_PARTITION_MASK_8x16_INTEL 0x7B +#define CLK_AVC_ME_PARTITION_MASK_8x8_INTEL 0x77 +#define CLK_AVC_ME_PARTITION_MASK_8x4_INTEL 0x6F +#define CLK_AVC_ME_PARTITION_MASK_4x8_INTEL 0x5F +#define CLK_AVC_ME_PARTITION_MASK_4x4_INTEL 0x3F + +#define CLK_AVC_ME_SLICE_TYPE_PRED_INTEL 0x0 +#define CLK_AVC_ME_SLICE_TYPE_BPRED_INTEL 0x1 +#define CLK_AVC_ME_SLICE_TYPE_INTRA_INTEL 0x2 + +#define CLK_AVC_ME_SEARCH_WINDOW_EXHAUSTIVE_INTEL 0x0 +#define CLK_AVC_ME_SEARCH_WINDOW_SMALL_INTEL 0x1 +#define CLK_AVC_ME_SEARCH_WINDOW_TINY_INTEL 0x2 +#define CLK_AVC_ME_SEARCH_WINDOW_EXTRA_TINY_INTEL 0x3 +#define CLK_AVC_ME_SEARCH_WINDOW_DIAMOND_INTEL 0x4 +#define CLK_AVC_ME_SEARCH_WINDOW_LARGE_DIAMOND_INTEL 0x5 +#define CLK_AVC_ME_SEARCH_WINDOW_RESERVED0_INTEL 0x6 +#define CLK_AVC_ME_SEARCH_WINDOW_RESERVED1_INTEL 0x7 +#define CLK_AVC_ME_SEARCH_WINDOW_CUSTOM_INTEL 0x8 + +#define CLK_AVC_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0 +#define CLK_AVC_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x2 + +#define CLK_AVC_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0 +#define CLK_AVC_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1 +#define CLK_AVC_ME_SUBPIXEL_MODE_QPEL_INTEL 0x3 + +#define CLK_AVC_ME_COST_PRECISION_QPEL_INTEL 0x0 +#define CLK_AVC_ME_COST_PRECISION_HPEL_INTEL 0x1 +#define CLK_AVC_ME_COST_PRECISION_PEL_INTEL 0x2 +#define CLK_AVC_ME_COST_PRECISION_DPEL_INTEL 0x3 + +#define CLK_AVC_ME_BIDIR_WEIGHT_QUARTER_INTEL 0x10 +#define CLK_AVC_ME_BIDIR_WEIGHT_THIRD_INTEL 0x15 +#define CLK_AVC_ME_BIDIR_WEIGHT_HALF_INTEL 0x20 +#define CLK_AVC_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 0x2B +#define CLK_AVC_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 0x30 + +#define CLK_AVC_ME_BORDER_REACHED_LEFT_INTEL 0x0 +#define CLK_AVC_ME_BORDER_REACHED_RIGHT_INTEL 0x2 +#define CLK_AVC_ME_BORDER_REACHED_TOP_INTEL 0x4 +#define CLK_AVC_ME_BORDER_REACHED_BOTTOM_INTEL 0x8 + +#define CLK_AVC_ME_INTRA_16x16_INTEL 0x0 +#define CLK_AVC_ME_INTRA_8x8_INTEL 0x1 +#define CLK_AVC_ME_INTRA_4x4_INTEL 0x2 + +#define CLK_AVC_ME_SKIP_BLOCK_PARTITION_16x16_INTEL 0x0 +#define CLK_AVC_ME_SKIP_BLOCK_PARTITION_8x8_INTEL 0x4000 + +#define CLK_AVC_ME_SKIP_BLOCK_16x16_FORWARD_ENABLE_INTEL (0x1 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_16x16_BACKWARD_ENABLE_INTEL (0x2 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_16x16_DUAL_ENABLE_INTEL (0x3 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_FORWARD_ENABLE_INTEL (0x55 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_BACKWARD_ENABLE_INTEL (0xAA << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_DUAL_ENABLE_INTEL (0xFF << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_0_FORWARD_ENABLE_INTEL (0x1 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_0_BACKWARD_ENABLE_INTEL (0x2 << 24) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_1_FORWARD_ENABLE_INTEL (0x1 << 26) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_1_BACKWARD_ENABLE_INTEL (0x2 << 26) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_2_FORWARD_ENABLE_INTEL (0x1 << 28) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_2_BACKWARD_ENABLE_INTEL (0x2 << 28) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_3_FORWARD_ENABLE_INTEL (0x1 << 30) +#define CLK_AVC_ME_SKIP_BLOCK_8x8_3_BACKWARD_ENABLE_INTEL (0x2 << 30) + +#define CLK_AVC_ME_BLOCK_BASED_SKIP_4x4_INTEL 0x00 +#define CLK_AVC_ME_BLOCK_BASED_SKIP_8x8_INTEL 0x80 + +#define CLK_AVC_ME_INTRA_LUMA_PARTITION_MASK_ALL_INTEL 0x0 +#define CLK_AVC_ME_INTRA_LUMA_PARTITION_MASK_16x16_INTEL 0x6 +#define CLK_AVC_ME_INTRA_LUMA_PARTITION_MASK_8x8_INTEL 0x5 +#define CLK_AVC_ME_INTRA_LUMA_PARTITION_MASK_4x4_INTEL 0x3 + +#define CLK_AVC_ME_INTRA_NEIGHBOR_LEFT_MASK_ENABLE_INTEL 0x60 +#define CLK_AVC_ME_INTRA_NEIGHBOR_UPPER_MASK_ENABLE_INTEL 0x10 +#define CLK_AVC_ME_INTRA_NEIGHBOR_UPPER_RIGHT_MASK_ENABLE_INTEL 0x8 +#define CLK_AVC_ME_INTRA_NEIGHBOR_UPPER_LEFT_MASK_ENABLE_INTEL 0x4 + +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7 +#define CLK_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8 +#define CLK_AVC_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0 +#define CLK_AVC_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 +#define CLK_AVC_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2 +#define CLK_AVC_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3 + +#define CLK_AVC_ME_FRAME_FORWARD_INTEL 0x1 +#define CLK_AVC_ME_FRAME_BACKWARD_INTEL 0x2 +#define CLK_AVC_ME_FRAME_DUAL_INTEL 0x3 + +#define CLK_AVC_ME_INTERLACED_SCAN_TOP_FIELD_INTEL 0x0 +#define CLK_AVC_ME_INTERLACED_SCAN_BOTTOM_FIELD_INTEL 0x1 + +#define CLK_AVC_ME_INITIALIZE_INTEL 0x0 + +#define CLK_AVC_IME_PAYLOAD_INITIALIZE_INTEL 0x0 +#define CLK_AVC_REF_PAYLOAD_INITIALIZE_INTEL 0x0 +#define CLK_AVC_SIC_PAYLOAD_INITIALIZE_INTEL 0x0 + +#define CLK_AVC_IME_RESULT_INITIALIZE_INTEL 0x0 +#define CLK_AVC_REF_RESULT_INITIALIZE_INTEL 0x0 +#define CLK_AVC_SIC_RESULT_INITIALIZE_INTEL 0x0 + +#define CLK_AVC_IME_RESULT_SINGLE_REFERENCE_STREAMOUT_INITIALIZE_INTEL 0x0 +#define CLK_AVC_IME_RESULT_SINGLE_REFERENCE_STREAMIN_INITIALIZE_INTEL 0x0 +#define CLK_AVC_IME_RESULT_DUAL_REFERENCE_STREAMOUT_INITIALIZE_INTEL 0x0 +#define CLK_AVC_IME_RESULT_DUAL_REFERENCE_STREAMIN_INITIALIZE_INTEL 0x0 + +#pragma OPENCL EXTENSION cl_intel_device_side_avc_motion_estimation : end +#endif // cl_intel_device_side_avc_motion_estimation + +#endif //_OPENCL_BASE_H_ diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/opencl-c.h b/benchmarks/new_opencl/compiler/share/pocl/include/opencl-c.h new file mode 100644 index 00000000..06c5ab6a --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/opencl-c.h @@ -0,0 +1,16502 @@ +//===--- opencl-c.h - OpenCL C language builtin function header -----------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _OPENCL_H_ +#define _OPENCL_H_ + +#include "opencl-c-base.h" + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#ifndef cl_khr_depth_images +#define cl_khr_depth_images +#endif //cl_khr_depth_images +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +#if __OPENCL_C_VERSION__ < CL_VERSION_2_0 +#ifdef cl_khr_3d_image_writes +#pragma OPENCL EXTENSION cl_khr_3d_image_writes : enable +#endif //cl_khr_3d_image_writes +#endif //__OPENCL_C_VERSION__ < CL_VERSION_2_0 + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +#pragma OPENCL EXTENSION cl_intel_planar_yuv : begin +#pragma OPENCL EXTENSION cl_intel_planar_yuv : end +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) + +#define __ovld __attribute__((overloadable)) +#define __conv __attribute__((convergent)) + +// Optimizations +#define __purefn __attribute__((pure)) +#define __cnfn __attribute__((const)) + + +// OpenCL v1.1/1.2/2.0 s6.2.3 - Explicit conversions + +char __ovld __cnfn convert_char_rte(char); +char __ovld __cnfn convert_char_sat_rte(char); +char __ovld __cnfn convert_char_rtz(char); +char __ovld __cnfn convert_char_sat_rtz(char); +char __ovld __cnfn convert_char_rtp(char); +char __ovld __cnfn convert_char_sat_rtp(char); +char __ovld __cnfn convert_char_rtn(char); +char __ovld __cnfn convert_char_sat_rtn(char); +char __ovld __cnfn convert_char(char); +char __ovld __cnfn convert_char_sat(char); +char __ovld __cnfn convert_char_rte(uchar); +char __ovld __cnfn convert_char_sat_rte(uchar); +char __ovld __cnfn convert_char_rtz(uchar); +char __ovld __cnfn convert_char_sat_rtz(uchar); +char __ovld __cnfn convert_char_rtp(uchar); +char __ovld __cnfn convert_char_sat_rtp(uchar); +char __ovld __cnfn convert_char_rtn(uchar); +char __ovld __cnfn convert_char_sat_rtn(uchar); +char __ovld __cnfn convert_char(uchar); +char __ovld __cnfn convert_char_sat(uchar); +char __ovld __cnfn convert_char_rte(short); +char __ovld __cnfn convert_char_sat_rte(short); +char __ovld __cnfn convert_char_rtz(short); +char __ovld __cnfn convert_char_sat_rtz(short); +char __ovld __cnfn convert_char_rtp(short); +char __ovld __cnfn convert_char_sat_rtp(short); +char __ovld __cnfn convert_char_rtn(short); +char __ovld __cnfn convert_char_sat_rtn(short); +char __ovld __cnfn convert_char(short); +char __ovld __cnfn convert_char_sat(short); +char __ovld __cnfn convert_char_rte(ushort); +char __ovld __cnfn convert_char_sat_rte(ushort); +char __ovld __cnfn convert_char_rtz(ushort); +char __ovld __cnfn convert_char_sat_rtz(ushort); +char __ovld __cnfn convert_char_rtp(ushort); +char __ovld __cnfn convert_char_sat_rtp(ushort); +char __ovld __cnfn convert_char_rtn(ushort); +char __ovld __cnfn convert_char_sat_rtn(ushort); +char __ovld __cnfn convert_char(ushort); +char __ovld __cnfn convert_char_sat(ushort); +char __ovld __cnfn convert_char_rte(int); +char __ovld __cnfn convert_char_sat_rte(int); +char __ovld __cnfn convert_char_rtz(int); +char __ovld __cnfn convert_char_sat_rtz(int); +char __ovld __cnfn convert_char_rtp(int); +char __ovld __cnfn convert_char_sat_rtp(int); +char __ovld __cnfn convert_char_rtn(int); +char __ovld __cnfn convert_char_sat_rtn(int); +char __ovld __cnfn convert_char(int); +char __ovld __cnfn convert_char_sat(int); +char __ovld __cnfn convert_char_rte(uint); +char __ovld __cnfn convert_char_sat_rte(uint); +char __ovld __cnfn convert_char_rtz(uint); +char __ovld __cnfn convert_char_sat_rtz(uint); +char __ovld __cnfn convert_char_rtp(uint); +char __ovld __cnfn convert_char_sat_rtp(uint); +char __ovld __cnfn convert_char_rtn(uint); +char __ovld __cnfn convert_char_sat_rtn(uint); +char __ovld __cnfn convert_char(uint); +char __ovld __cnfn convert_char_sat(uint); +char __ovld __cnfn convert_char_rte(long); +char __ovld __cnfn convert_char_sat_rte(long); +char __ovld __cnfn convert_char_rtz(long); +char __ovld __cnfn convert_char_sat_rtz(long); +char __ovld __cnfn convert_char_rtp(long); +char __ovld __cnfn convert_char_sat_rtp(long); +char __ovld __cnfn convert_char_rtn(long); +char __ovld __cnfn convert_char_sat_rtn(long); +char __ovld __cnfn convert_char(long); +char __ovld __cnfn convert_char_sat(long); +char __ovld __cnfn convert_char_rte(ulong); +char __ovld __cnfn convert_char_sat_rte(ulong); +char __ovld __cnfn convert_char_rtz(ulong); +char __ovld __cnfn convert_char_sat_rtz(ulong); +char __ovld __cnfn convert_char_rtp(ulong); +char __ovld __cnfn convert_char_sat_rtp(ulong); +char __ovld __cnfn convert_char_rtn(ulong); +char __ovld __cnfn convert_char_sat_rtn(ulong); +char __ovld __cnfn convert_char(ulong); +char __ovld __cnfn convert_char_sat(ulong); +char __ovld __cnfn convert_char_rte(float); +char __ovld __cnfn convert_char_sat_rte(float); +char __ovld __cnfn convert_char_rtz(float); +char __ovld __cnfn convert_char_sat_rtz(float); +char __ovld __cnfn convert_char_rtp(float); +char __ovld __cnfn convert_char_sat_rtp(float); +char __ovld __cnfn convert_char_rtn(float); +char __ovld __cnfn convert_char_sat_rtn(float); +char __ovld __cnfn convert_char(float); +char __ovld __cnfn convert_char_sat(float); +uchar __ovld __cnfn convert_uchar_rte(char); +uchar __ovld __cnfn convert_uchar_sat_rte(char); +uchar __ovld __cnfn convert_uchar_rtz(char); +uchar __ovld __cnfn convert_uchar_sat_rtz(char); +uchar __ovld __cnfn convert_uchar_rtp(char); +uchar __ovld __cnfn convert_uchar_sat_rtp(char); +uchar __ovld __cnfn convert_uchar_rtn(char); +uchar __ovld __cnfn convert_uchar_sat_rtn(char); +uchar __ovld __cnfn convert_uchar(char); +uchar __ovld __cnfn convert_uchar_sat(char); +uchar __ovld __cnfn convert_uchar_rte(uchar); +uchar __ovld __cnfn convert_uchar_sat_rte(uchar); +uchar __ovld __cnfn convert_uchar_rtz(uchar); +uchar __ovld __cnfn convert_uchar_sat_rtz(uchar); +uchar __ovld __cnfn convert_uchar_rtp(uchar); +uchar __ovld __cnfn convert_uchar_sat_rtp(uchar); +uchar __ovld __cnfn convert_uchar_rtn(uchar); +uchar __ovld __cnfn convert_uchar_sat_rtn(uchar); +uchar __ovld __cnfn convert_uchar(uchar); +uchar __ovld __cnfn convert_uchar_sat(uchar); +uchar __ovld __cnfn convert_uchar_rte(short); +uchar __ovld __cnfn convert_uchar_sat_rte(short); +uchar __ovld __cnfn convert_uchar_rtz(short); +uchar __ovld __cnfn convert_uchar_sat_rtz(short); +uchar __ovld __cnfn convert_uchar_rtp(short); +uchar __ovld __cnfn convert_uchar_sat_rtp(short); +uchar __ovld __cnfn convert_uchar_rtn(short); +uchar __ovld __cnfn convert_uchar_sat_rtn(short); +uchar __ovld __cnfn convert_uchar(short); +uchar __ovld __cnfn convert_uchar_sat(short); +uchar __ovld __cnfn convert_uchar_rte(ushort); +uchar __ovld __cnfn convert_uchar_sat_rte(ushort); +uchar __ovld __cnfn convert_uchar_rtz(ushort); +uchar __ovld __cnfn convert_uchar_sat_rtz(ushort); +uchar __ovld __cnfn convert_uchar_rtp(ushort); +uchar __ovld __cnfn convert_uchar_sat_rtp(ushort); +uchar __ovld __cnfn convert_uchar_rtn(ushort); +uchar __ovld __cnfn convert_uchar_sat_rtn(ushort); +uchar __ovld __cnfn convert_uchar(ushort); +uchar __ovld __cnfn convert_uchar_sat(ushort); +uchar __ovld __cnfn convert_uchar_rte(int); +uchar __ovld __cnfn convert_uchar_sat_rte(int); +uchar __ovld __cnfn convert_uchar_rtz(int); +uchar __ovld __cnfn convert_uchar_sat_rtz(int); +uchar __ovld __cnfn convert_uchar_rtp(int); +uchar __ovld __cnfn convert_uchar_sat_rtp(int); +uchar __ovld __cnfn convert_uchar_rtn(int); +uchar __ovld __cnfn convert_uchar_sat_rtn(int); +uchar __ovld __cnfn convert_uchar(int); +uchar __ovld __cnfn convert_uchar_sat(int); +uchar __ovld __cnfn convert_uchar_rte(uint); +uchar __ovld __cnfn convert_uchar_sat_rte(uint); +uchar __ovld __cnfn convert_uchar_rtz(uint); +uchar __ovld __cnfn convert_uchar_sat_rtz(uint); +uchar __ovld __cnfn convert_uchar_rtp(uint); +uchar __ovld __cnfn convert_uchar_sat_rtp(uint); +uchar __ovld __cnfn convert_uchar_rtn(uint); +uchar __ovld __cnfn convert_uchar_sat_rtn(uint); +uchar __ovld __cnfn convert_uchar(uint); +uchar __ovld __cnfn convert_uchar_sat(uint); +uchar __ovld __cnfn convert_uchar_rte(long); +uchar __ovld __cnfn convert_uchar_sat_rte(long); +uchar __ovld __cnfn convert_uchar_rtz(long); +uchar __ovld __cnfn convert_uchar_sat_rtz(long); +uchar __ovld __cnfn convert_uchar_rtp(long); +uchar __ovld __cnfn convert_uchar_sat_rtp(long); +uchar __ovld __cnfn convert_uchar_rtn(long); +uchar __ovld __cnfn convert_uchar_sat_rtn(long); +uchar __ovld __cnfn convert_uchar(long); +uchar __ovld __cnfn convert_uchar_sat(long); +uchar __ovld __cnfn convert_uchar_rte(ulong); +uchar __ovld __cnfn convert_uchar_sat_rte(ulong); +uchar __ovld __cnfn convert_uchar_rtz(ulong); +uchar __ovld __cnfn convert_uchar_sat_rtz(ulong); +uchar __ovld __cnfn convert_uchar_rtp(ulong); +uchar __ovld __cnfn convert_uchar_sat_rtp(ulong); +uchar __ovld __cnfn convert_uchar_rtn(ulong); +uchar __ovld __cnfn convert_uchar_sat_rtn(ulong); +uchar __ovld __cnfn convert_uchar(ulong); +uchar __ovld __cnfn convert_uchar_sat(ulong); +uchar __ovld __cnfn convert_uchar_rte(float); +uchar __ovld __cnfn convert_uchar_sat_rte(float); +uchar __ovld __cnfn convert_uchar_rtz(float); +uchar __ovld __cnfn convert_uchar_sat_rtz(float); +uchar __ovld __cnfn convert_uchar_rtp(float); +uchar __ovld __cnfn convert_uchar_sat_rtp(float); +uchar __ovld __cnfn convert_uchar_rtn(float); +uchar __ovld __cnfn convert_uchar_sat_rtn(float); +uchar __ovld __cnfn convert_uchar(float); +uchar __ovld __cnfn convert_uchar_sat(float); + +short __ovld __cnfn convert_short_rte(char); +short __ovld __cnfn convert_short_sat_rte(char); +short __ovld __cnfn convert_short_rtz(char); +short __ovld __cnfn convert_short_sat_rtz(char); +short __ovld __cnfn convert_short_rtp(char); +short __ovld __cnfn convert_short_sat_rtp(char); +short __ovld __cnfn convert_short_rtn(char); +short __ovld __cnfn convert_short_sat_rtn(char); +short __ovld __cnfn convert_short(char); +short __ovld __cnfn convert_short_sat(char); +short __ovld __cnfn convert_short_rte(uchar); +short __ovld __cnfn convert_short_sat_rte(uchar); +short __ovld __cnfn convert_short_rtz(uchar); +short __ovld __cnfn convert_short_sat_rtz(uchar); +short __ovld __cnfn convert_short_rtp(uchar); +short __ovld __cnfn convert_short_sat_rtp(uchar); +short __ovld __cnfn convert_short_rtn(uchar); +short __ovld __cnfn convert_short_sat_rtn(uchar); +short __ovld __cnfn convert_short(uchar); +short __ovld __cnfn convert_short_sat(uchar); +short __ovld __cnfn convert_short_rte(short); +short __ovld __cnfn convert_short_sat_rte(short); +short __ovld __cnfn convert_short_rtz(short); +short __ovld __cnfn convert_short_sat_rtz(short); +short __ovld __cnfn convert_short_rtp(short); +short __ovld __cnfn convert_short_sat_rtp(short); +short __ovld __cnfn convert_short_rtn(short); +short __ovld __cnfn convert_short_sat_rtn(short); +short __ovld __cnfn convert_short(short); +short __ovld __cnfn convert_short_sat(short); +short __ovld __cnfn convert_short_rte(ushort); +short __ovld __cnfn convert_short_sat_rte(ushort); +short __ovld __cnfn convert_short_rtz(ushort); +short __ovld __cnfn convert_short_sat_rtz(ushort); +short __ovld __cnfn convert_short_rtp(ushort); +short __ovld __cnfn convert_short_sat_rtp(ushort); +short __ovld __cnfn convert_short_rtn(ushort); +short __ovld __cnfn convert_short_sat_rtn(ushort); +short __ovld __cnfn convert_short(ushort); +short __ovld __cnfn convert_short_sat(ushort); +short __ovld __cnfn convert_short_rte(int); +short __ovld __cnfn convert_short_sat_rte(int); +short __ovld __cnfn convert_short_rtz(int); +short __ovld __cnfn convert_short_sat_rtz(int); +short __ovld __cnfn convert_short_rtp(int); +short __ovld __cnfn convert_short_sat_rtp(int); +short __ovld __cnfn convert_short_rtn(int); +short __ovld __cnfn convert_short_sat_rtn(int); +short __ovld __cnfn convert_short(int); +short __ovld __cnfn convert_short_sat(int); +short __ovld __cnfn convert_short_rte(uint); +short __ovld __cnfn convert_short_sat_rte(uint); +short __ovld __cnfn convert_short_rtz(uint); +short __ovld __cnfn convert_short_sat_rtz(uint); +short __ovld __cnfn convert_short_rtp(uint); +short __ovld __cnfn convert_short_sat_rtp(uint); +short __ovld __cnfn convert_short_rtn(uint); +short __ovld __cnfn convert_short_sat_rtn(uint); +short __ovld __cnfn convert_short(uint); +short __ovld __cnfn convert_short_sat(uint); +short __ovld __cnfn convert_short_rte(long); +short __ovld __cnfn convert_short_sat_rte(long); +short __ovld __cnfn convert_short_rtz(long); +short __ovld __cnfn convert_short_sat_rtz(long); +short __ovld __cnfn convert_short_rtp(long); +short __ovld __cnfn convert_short_sat_rtp(long); +short __ovld __cnfn convert_short_rtn(long); +short __ovld __cnfn convert_short_sat_rtn(long); +short __ovld __cnfn convert_short(long); +short __ovld __cnfn convert_short_sat(long); +short __ovld __cnfn convert_short_rte(ulong); +short __ovld __cnfn convert_short_sat_rte(ulong); +short __ovld __cnfn convert_short_rtz(ulong); +short __ovld __cnfn convert_short_sat_rtz(ulong); +short __ovld __cnfn convert_short_rtp(ulong); +short __ovld __cnfn convert_short_sat_rtp(ulong); +short __ovld __cnfn convert_short_rtn(ulong); +short __ovld __cnfn convert_short_sat_rtn(ulong); +short __ovld __cnfn convert_short(ulong); +short __ovld __cnfn convert_short_sat(ulong); +short __ovld __cnfn convert_short_rte(float); +short __ovld __cnfn convert_short_sat_rte(float); +short __ovld __cnfn convert_short_rtz(float); +short __ovld __cnfn convert_short_sat_rtz(float); +short __ovld __cnfn convert_short_rtp(float); +short __ovld __cnfn convert_short_sat_rtp(float); +short __ovld __cnfn convert_short_rtn(float); +short __ovld __cnfn convert_short_sat_rtn(float); +short __ovld __cnfn convert_short(float); +short __ovld __cnfn convert_short_sat(float); +ushort __ovld __cnfn convert_ushort_rte(char); +ushort __ovld __cnfn convert_ushort_sat_rte(char); +ushort __ovld __cnfn convert_ushort_rtz(char); +ushort __ovld __cnfn convert_ushort_sat_rtz(char); +ushort __ovld __cnfn convert_ushort_rtp(char); +ushort __ovld __cnfn convert_ushort_sat_rtp(char); +ushort __ovld __cnfn convert_ushort_rtn(char); +ushort __ovld __cnfn convert_ushort_sat_rtn(char); +ushort __ovld __cnfn convert_ushort(char); +ushort __ovld __cnfn convert_ushort_sat(char); +ushort __ovld __cnfn convert_ushort_rte(uchar); +ushort __ovld __cnfn convert_ushort_sat_rte(uchar); +ushort __ovld __cnfn convert_ushort_rtz(uchar); +ushort __ovld __cnfn convert_ushort_sat_rtz(uchar); +ushort __ovld __cnfn convert_ushort_rtp(uchar); +ushort __ovld __cnfn convert_ushort_sat_rtp(uchar); +ushort __ovld __cnfn convert_ushort_rtn(uchar); +ushort __ovld __cnfn convert_ushort_sat_rtn(uchar); +ushort __ovld __cnfn convert_ushort(uchar); +ushort __ovld __cnfn convert_ushort_sat(uchar); +ushort __ovld __cnfn convert_ushort_rte(short); +ushort __ovld __cnfn convert_ushort_sat_rte(short); +ushort __ovld __cnfn convert_ushort_rtz(short); +ushort __ovld __cnfn convert_ushort_sat_rtz(short); +ushort __ovld __cnfn convert_ushort_rtp(short); +ushort __ovld __cnfn convert_ushort_sat_rtp(short); +ushort __ovld __cnfn convert_ushort_rtn(short); +ushort __ovld __cnfn convert_ushort_sat_rtn(short); +ushort __ovld __cnfn convert_ushort(short); +ushort __ovld __cnfn convert_ushort_sat(short); +ushort __ovld __cnfn convert_ushort_rte(ushort); +ushort __ovld __cnfn convert_ushort_sat_rte(ushort); +ushort __ovld __cnfn convert_ushort_rtz(ushort); +ushort __ovld __cnfn convert_ushort_sat_rtz(ushort); +ushort __ovld __cnfn convert_ushort_rtp(ushort); +ushort __ovld __cnfn convert_ushort_sat_rtp(ushort); +ushort __ovld __cnfn convert_ushort_rtn(ushort); +ushort __ovld __cnfn convert_ushort_sat_rtn(ushort); +ushort __ovld __cnfn convert_ushort(ushort); +ushort __ovld __cnfn convert_ushort_sat(ushort); +ushort __ovld __cnfn convert_ushort_rte(int); +ushort __ovld __cnfn convert_ushort_sat_rte(int); +ushort __ovld __cnfn convert_ushort_rtz(int); +ushort __ovld __cnfn convert_ushort_sat_rtz(int); +ushort __ovld __cnfn convert_ushort_rtp(int); +ushort __ovld __cnfn convert_ushort_sat_rtp(int); +ushort __ovld __cnfn convert_ushort_rtn(int); +ushort __ovld __cnfn convert_ushort_sat_rtn(int); +ushort __ovld __cnfn convert_ushort(int); +ushort __ovld __cnfn convert_ushort_sat(int); +ushort __ovld __cnfn convert_ushort_rte(uint); +ushort __ovld __cnfn convert_ushort_sat_rte(uint); +ushort __ovld __cnfn convert_ushort_rtz(uint); +ushort __ovld __cnfn convert_ushort_sat_rtz(uint); +ushort __ovld __cnfn convert_ushort_rtp(uint); +ushort __ovld __cnfn convert_ushort_sat_rtp(uint); +ushort __ovld __cnfn convert_ushort_rtn(uint); +ushort __ovld __cnfn convert_ushort_sat_rtn(uint); +ushort __ovld __cnfn convert_ushort(uint); +ushort __ovld __cnfn convert_ushort_sat(uint); +ushort __ovld __cnfn convert_ushort_rte(long); +ushort __ovld __cnfn convert_ushort_sat_rte(long); +ushort __ovld __cnfn convert_ushort_rtz(long); +ushort __ovld __cnfn convert_ushort_sat_rtz(long); +ushort __ovld __cnfn convert_ushort_rtp(long); +ushort __ovld __cnfn convert_ushort_sat_rtp(long); +ushort __ovld __cnfn convert_ushort_rtn(long); +ushort __ovld __cnfn convert_ushort_sat_rtn(long); +ushort __ovld __cnfn convert_ushort(long); +ushort __ovld __cnfn convert_ushort_sat(long); +ushort __ovld __cnfn convert_ushort_rte(ulong); +ushort __ovld __cnfn convert_ushort_sat_rte(ulong); +ushort __ovld __cnfn convert_ushort_rtz(ulong); +ushort __ovld __cnfn convert_ushort_sat_rtz(ulong); +ushort __ovld __cnfn convert_ushort_rtp(ulong); +ushort __ovld __cnfn convert_ushort_sat_rtp(ulong); +ushort __ovld __cnfn convert_ushort_rtn(ulong); +ushort __ovld __cnfn convert_ushort_sat_rtn(ulong); +ushort __ovld __cnfn convert_ushort(ulong); +ushort __ovld __cnfn convert_ushort_sat(ulong); +ushort __ovld __cnfn convert_ushort_rte(float); +ushort __ovld __cnfn convert_ushort_sat_rte(float); +ushort __ovld __cnfn convert_ushort_rtz(float); +ushort __ovld __cnfn convert_ushort_sat_rtz(float); +ushort __ovld __cnfn convert_ushort_rtp(float); +ushort __ovld __cnfn convert_ushort_sat_rtp(float); +ushort __ovld __cnfn convert_ushort_rtn(float); +ushort __ovld __cnfn convert_ushort_sat_rtn(float); +ushort __ovld __cnfn convert_ushort(float); +ushort __ovld __cnfn convert_ushort_sat(float); +int __ovld __cnfn convert_int_rte(char); +int __ovld __cnfn convert_int_sat_rte(char); +int __ovld __cnfn convert_int_rtz(char); +int __ovld __cnfn convert_int_sat_rtz(char); +int __ovld __cnfn convert_int_rtp(char); +int __ovld __cnfn convert_int_sat_rtp(char); +int __ovld __cnfn convert_int_rtn(char); +int __ovld __cnfn convert_int_sat_rtn(char); +int __ovld __cnfn convert_int(char); +int __ovld __cnfn convert_int_sat(char); +int __ovld __cnfn convert_int_rte(uchar); +int __ovld __cnfn convert_int_sat_rte(uchar); +int __ovld __cnfn convert_int_rtz(uchar); +int __ovld __cnfn convert_int_sat_rtz(uchar); +int __ovld __cnfn convert_int_rtp(uchar); +int __ovld __cnfn convert_int_sat_rtp(uchar); +int __ovld __cnfn convert_int_rtn(uchar); +int __ovld __cnfn convert_int_sat_rtn(uchar); +int __ovld __cnfn convert_int(uchar); +int __ovld __cnfn convert_int_sat(uchar); +int __ovld __cnfn convert_int_rte(short); +int __ovld __cnfn convert_int_sat_rte(short); +int __ovld __cnfn convert_int_rtz(short); +int __ovld __cnfn convert_int_sat_rtz(short); +int __ovld __cnfn convert_int_rtp(short); +int __ovld __cnfn convert_int_sat_rtp(short); +int __ovld __cnfn convert_int_rtn(short); +int __ovld __cnfn convert_int_sat_rtn(short); +int __ovld __cnfn convert_int(short); +int __ovld __cnfn convert_int_sat(short); +int __ovld __cnfn convert_int_rte(ushort); +int __ovld __cnfn convert_int_sat_rte(ushort); +int __ovld __cnfn convert_int_rtz(ushort); +int __ovld __cnfn convert_int_sat_rtz(ushort); +int __ovld __cnfn convert_int_rtp(ushort); +int __ovld __cnfn convert_int_sat_rtp(ushort); +int __ovld __cnfn convert_int_rtn(ushort); +int __ovld __cnfn convert_int_sat_rtn(ushort); +int __ovld __cnfn convert_int(ushort); +int __ovld __cnfn convert_int_sat(ushort); +int __ovld __cnfn convert_int_rte(int); +int __ovld __cnfn convert_int_sat_rte(int); +int __ovld __cnfn convert_int_rtz(int); +int __ovld __cnfn convert_int_sat_rtz(int); +int __ovld __cnfn convert_int_rtp(int); +int __ovld __cnfn convert_int_sat_rtp(int); +int __ovld __cnfn convert_int_rtn(int); +int __ovld __cnfn convert_int_sat_rtn(int); +int __ovld __cnfn convert_int(int); +int __ovld __cnfn convert_int_sat(int); +int __ovld __cnfn convert_int_rte(uint); +int __ovld __cnfn convert_int_sat_rte(uint); +int __ovld __cnfn convert_int_rtz(uint); +int __ovld __cnfn convert_int_sat_rtz(uint); +int __ovld __cnfn convert_int_rtp(uint); +int __ovld __cnfn convert_int_sat_rtp(uint); +int __ovld __cnfn convert_int_rtn(uint); +int __ovld __cnfn convert_int_sat_rtn(uint); +int __ovld __cnfn convert_int(uint); +int __ovld __cnfn convert_int_sat(uint); +int __ovld __cnfn convert_int_rte(long); +int __ovld __cnfn convert_int_sat_rte(long); +int __ovld __cnfn convert_int_rtz(long); +int __ovld __cnfn convert_int_sat_rtz(long); +int __ovld __cnfn convert_int_rtp(long); +int __ovld __cnfn convert_int_sat_rtp(long); +int __ovld __cnfn convert_int_rtn(long); +int __ovld __cnfn convert_int_sat_rtn(long); +int __ovld __cnfn convert_int(long); +int __ovld __cnfn convert_int_sat(long); +int __ovld __cnfn convert_int_rte(ulong); +int __ovld __cnfn convert_int_sat_rte(ulong); +int __ovld __cnfn convert_int_rtz(ulong); +int __ovld __cnfn convert_int_sat_rtz(ulong); +int __ovld __cnfn convert_int_rtp(ulong); +int __ovld __cnfn convert_int_sat_rtp(ulong); +int __ovld __cnfn convert_int_rtn(ulong); +int __ovld __cnfn convert_int_sat_rtn(ulong); +int __ovld __cnfn convert_int(ulong); +int __ovld __cnfn convert_int_sat(ulong); +int __ovld __cnfn convert_int_rte(float); +int __ovld __cnfn convert_int_sat_rte(float); +int __ovld __cnfn convert_int_rtz(float); +int __ovld __cnfn convert_int_sat_rtz(float); +int __ovld __cnfn convert_int_rtp(float); +int __ovld __cnfn convert_int_sat_rtp(float); +int __ovld __cnfn convert_int_rtn(float); +int __ovld __cnfn convert_int_sat_rtn(float); +int __ovld __cnfn convert_int(float); +int __ovld __cnfn convert_int_sat(float); +uint __ovld __cnfn convert_uint_rte(char); +uint __ovld __cnfn convert_uint_sat_rte(char); +uint __ovld __cnfn convert_uint_rtz(char); +uint __ovld __cnfn convert_uint_sat_rtz(char); +uint __ovld __cnfn convert_uint_rtp(char); +uint __ovld __cnfn convert_uint_sat_rtp(char); +uint __ovld __cnfn convert_uint_rtn(char); +uint __ovld __cnfn convert_uint_sat_rtn(char); +uint __ovld __cnfn convert_uint(char); +uint __ovld __cnfn convert_uint_sat(char); +uint __ovld __cnfn convert_uint_rte(uchar); +uint __ovld __cnfn convert_uint_sat_rte(uchar); +uint __ovld __cnfn convert_uint_rtz(uchar); +uint __ovld __cnfn convert_uint_sat_rtz(uchar); +uint __ovld __cnfn convert_uint_rtp(uchar); +uint __ovld __cnfn convert_uint_sat_rtp(uchar); +uint __ovld __cnfn convert_uint_rtn(uchar); +uint __ovld __cnfn convert_uint_sat_rtn(uchar); +uint __ovld __cnfn convert_uint(uchar); +uint __ovld __cnfn convert_uint_sat(uchar); +uint __ovld __cnfn convert_uint_rte(short); +uint __ovld __cnfn convert_uint_sat_rte(short); +uint __ovld __cnfn convert_uint_rtz(short); +uint __ovld __cnfn convert_uint_sat_rtz(short); +uint __ovld __cnfn convert_uint_rtp(short); +uint __ovld __cnfn convert_uint_sat_rtp(short); +uint __ovld __cnfn convert_uint_rtn(short); +uint __ovld __cnfn convert_uint_sat_rtn(short); +uint __ovld __cnfn convert_uint(short); +uint __ovld __cnfn convert_uint_sat(short); +uint __ovld __cnfn convert_uint_rte(ushort); +uint __ovld __cnfn convert_uint_sat_rte(ushort); +uint __ovld __cnfn convert_uint_rtz(ushort); +uint __ovld __cnfn convert_uint_sat_rtz(ushort); +uint __ovld __cnfn convert_uint_rtp(ushort); +uint __ovld __cnfn convert_uint_sat_rtp(ushort); +uint __ovld __cnfn convert_uint_rtn(ushort); +uint __ovld __cnfn convert_uint_sat_rtn(ushort); +uint __ovld __cnfn convert_uint(ushort); +uint __ovld __cnfn convert_uint_sat(ushort); +uint __ovld __cnfn convert_uint_rte(int); +uint __ovld __cnfn convert_uint_sat_rte(int); +uint __ovld __cnfn convert_uint_rtz(int); +uint __ovld __cnfn convert_uint_sat_rtz(int); +uint __ovld __cnfn convert_uint_rtp(int); +uint __ovld __cnfn convert_uint_sat_rtp(int); +uint __ovld __cnfn convert_uint_rtn(int); +uint __ovld __cnfn convert_uint_sat_rtn(int); +uint __ovld __cnfn convert_uint(int); +uint __ovld __cnfn convert_uint_sat(int); +uint __ovld __cnfn convert_uint_rte(uint); +uint __ovld __cnfn convert_uint_sat_rte(uint); +uint __ovld __cnfn convert_uint_rtz(uint); +uint __ovld __cnfn convert_uint_sat_rtz(uint); +uint __ovld __cnfn convert_uint_rtp(uint); +uint __ovld __cnfn convert_uint_sat_rtp(uint); +uint __ovld __cnfn convert_uint_rtn(uint); +uint __ovld __cnfn convert_uint_sat_rtn(uint); +uint __ovld __cnfn convert_uint(uint); +uint __ovld __cnfn convert_uint_sat(uint); +uint __ovld __cnfn convert_uint_rte(long); +uint __ovld __cnfn convert_uint_sat_rte(long); +uint __ovld __cnfn convert_uint_rtz(long); +uint __ovld __cnfn convert_uint_sat_rtz(long); +uint __ovld __cnfn convert_uint_rtp(long); +uint __ovld __cnfn convert_uint_sat_rtp(long); +uint __ovld __cnfn convert_uint_rtn(long); +uint __ovld __cnfn convert_uint_sat_rtn(long); +uint __ovld __cnfn convert_uint(long); +uint __ovld __cnfn convert_uint_sat(long); +uint __ovld __cnfn convert_uint_rte(ulong); +uint __ovld __cnfn convert_uint_sat_rte(ulong); +uint __ovld __cnfn convert_uint_rtz(ulong); +uint __ovld __cnfn convert_uint_sat_rtz(ulong); +uint __ovld __cnfn convert_uint_rtp(ulong); +uint __ovld __cnfn convert_uint_sat_rtp(ulong); +uint __ovld __cnfn convert_uint_rtn(ulong); +uint __ovld __cnfn convert_uint_sat_rtn(ulong); +uint __ovld __cnfn convert_uint(ulong); +uint __ovld __cnfn convert_uint_sat(ulong); +uint __ovld __cnfn convert_uint_rte(float); +uint __ovld __cnfn convert_uint_sat_rte(float); +uint __ovld __cnfn convert_uint_rtz(float); +uint __ovld __cnfn convert_uint_sat_rtz(float); +uint __ovld __cnfn convert_uint_rtp(float); +uint __ovld __cnfn convert_uint_sat_rtp(float); +uint __ovld __cnfn convert_uint_rtn(float); +uint __ovld __cnfn convert_uint_sat_rtn(float); +uint __ovld __cnfn convert_uint(float); +uint __ovld __cnfn convert_uint_sat(float); +long __ovld __cnfn convert_long_rte(char); +long __ovld __cnfn convert_long_sat_rte(char); +long __ovld __cnfn convert_long_rtz(char); +long __ovld __cnfn convert_long_sat_rtz(char); +long __ovld __cnfn convert_long_rtp(char); +long __ovld __cnfn convert_long_sat_rtp(char); +long __ovld __cnfn convert_long_rtn(char); +long __ovld __cnfn convert_long_sat_rtn(char); +long __ovld __cnfn convert_long(char); +long __ovld __cnfn convert_long_sat(char); +long __ovld __cnfn convert_long_rte(uchar); +long __ovld __cnfn convert_long_sat_rte(uchar); +long __ovld __cnfn convert_long_rtz(uchar); +long __ovld __cnfn convert_long_sat_rtz(uchar); +long __ovld __cnfn convert_long_rtp(uchar); +long __ovld __cnfn convert_long_sat_rtp(uchar); +long __ovld __cnfn convert_long_rtn(uchar); +long __ovld __cnfn convert_long_sat_rtn(uchar); +long __ovld __cnfn convert_long(uchar); +long __ovld __cnfn convert_long_sat(uchar); +long __ovld __cnfn convert_long_rte(short); +long __ovld __cnfn convert_long_sat_rte(short); +long __ovld __cnfn convert_long_rtz(short); +long __ovld __cnfn convert_long_sat_rtz(short); +long __ovld __cnfn convert_long_rtp(short); +long __ovld __cnfn convert_long_sat_rtp(short); +long __ovld __cnfn convert_long_rtn(short); +long __ovld __cnfn convert_long_sat_rtn(short); +long __ovld __cnfn convert_long(short); +long __ovld __cnfn convert_long_sat(short); +long __ovld __cnfn convert_long_rte(ushort); +long __ovld __cnfn convert_long_sat_rte(ushort); +long __ovld __cnfn convert_long_rtz(ushort); +long __ovld __cnfn convert_long_sat_rtz(ushort); +long __ovld __cnfn convert_long_rtp(ushort); +long __ovld __cnfn convert_long_sat_rtp(ushort); +long __ovld __cnfn convert_long_rtn(ushort); +long __ovld __cnfn convert_long_sat_rtn(ushort); +long __ovld __cnfn convert_long(ushort); +long __ovld __cnfn convert_long_sat(ushort); +long __ovld __cnfn convert_long_rte(int); +long __ovld __cnfn convert_long_sat_rte(int); +long __ovld __cnfn convert_long_rtz(int); +long __ovld __cnfn convert_long_sat_rtz(int); +long __ovld __cnfn convert_long_rtp(int); +long __ovld __cnfn convert_long_sat_rtp(int); +long __ovld __cnfn convert_long_rtn(int); +long __ovld __cnfn convert_long_sat_rtn(int); +long __ovld __cnfn convert_long(int); +long __ovld __cnfn convert_long_sat(int); +long __ovld __cnfn convert_long_rte(uint); +long __ovld __cnfn convert_long_sat_rte(uint); +long __ovld __cnfn convert_long_rtz(uint); +long __ovld __cnfn convert_long_sat_rtz(uint); +long __ovld __cnfn convert_long_rtp(uint); +long __ovld __cnfn convert_long_sat_rtp(uint); +long __ovld __cnfn convert_long_rtn(uint); +long __ovld __cnfn convert_long_sat_rtn(uint); +long __ovld __cnfn convert_long(uint); +long __ovld __cnfn convert_long_sat(uint); +long __ovld __cnfn convert_long_rte(long); +long __ovld __cnfn convert_long_sat_rte(long); +long __ovld __cnfn convert_long_rtz(long); +long __ovld __cnfn convert_long_sat_rtz(long); +long __ovld __cnfn convert_long_rtp(long); +long __ovld __cnfn convert_long_sat_rtp(long); +long __ovld __cnfn convert_long_rtn(long); +long __ovld __cnfn convert_long_sat_rtn(long); +long __ovld __cnfn convert_long(long); +long __ovld __cnfn convert_long_sat(long); +long __ovld __cnfn convert_long_rte(ulong); +long __ovld __cnfn convert_long_sat_rte(ulong); +long __ovld __cnfn convert_long_rtz(ulong); +long __ovld __cnfn convert_long_sat_rtz(ulong); +long __ovld __cnfn convert_long_rtp(ulong); +long __ovld __cnfn convert_long_sat_rtp(ulong); +long __ovld __cnfn convert_long_rtn(ulong); +long __ovld __cnfn convert_long_sat_rtn(ulong); +long __ovld __cnfn convert_long(ulong); +long __ovld __cnfn convert_long_sat(ulong); +long __ovld __cnfn convert_long_rte(float); +long __ovld __cnfn convert_long_sat_rte(float); +long __ovld __cnfn convert_long_rtz(float); +long __ovld __cnfn convert_long_sat_rtz(float); +long __ovld __cnfn convert_long_rtp(float); +long __ovld __cnfn convert_long_sat_rtp(float); +long __ovld __cnfn convert_long_rtn(float); +long __ovld __cnfn convert_long_sat_rtn(float); +long __ovld __cnfn convert_long(float); +long __ovld __cnfn convert_long_sat(float); +ulong __ovld __cnfn convert_ulong_rte(char); +ulong __ovld __cnfn convert_ulong_sat_rte(char); +ulong __ovld __cnfn convert_ulong_rtz(char); +ulong __ovld __cnfn convert_ulong_sat_rtz(char); +ulong __ovld __cnfn convert_ulong_rtp(char); +ulong __ovld __cnfn convert_ulong_sat_rtp(char); +ulong __ovld __cnfn convert_ulong_rtn(char); +ulong __ovld __cnfn convert_ulong_sat_rtn(char); +ulong __ovld __cnfn convert_ulong(char); +ulong __ovld __cnfn convert_ulong_sat(char); +ulong __ovld __cnfn convert_ulong_rte(uchar); +ulong __ovld __cnfn convert_ulong_sat_rte(uchar); +ulong __ovld __cnfn convert_ulong_rtz(uchar); +ulong __ovld __cnfn convert_ulong_sat_rtz(uchar); +ulong __ovld __cnfn convert_ulong_rtp(uchar); +ulong __ovld __cnfn convert_ulong_sat_rtp(uchar); +ulong __ovld __cnfn convert_ulong_rtn(uchar); +ulong __ovld __cnfn convert_ulong_sat_rtn(uchar); +ulong __ovld __cnfn convert_ulong(uchar); +ulong __ovld __cnfn convert_ulong_sat(uchar); +ulong __ovld __cnfn convert_ulong_rte(short); +ulong __ovld __cnfn convert_ulong_sat_rte(short); +ulong __ovld __cnfn convert_ulong_rtz(short); +ulong __ovld __cnfn convert_ulong_sat_rtz(short); +ulong __ovld __cnfn convert_ulong_rtp(short); +ulong __ovld __cnfn convert_ulong_sat_rtp(short); +ulong __ovld __cnfn convert_ulong_rtn(short); +ulong __ovld __cnfn convert_ulong_sat_rtn(short); +ulong __ovld __cnfn convert_ulong(short); +ulong __ovld __cnfn convert_ulong_sat(short); +ulong __ovld __cnfn convert_ulong_rte(ushort); +ulong __ovld __cnfn convert_ulong_sat_rte(ushort); +ulong __ovld __cnfn convert_ulong_rtz(ushort); +ulong __ovld __cnfn convert_ulong_sat_rtz(ushort); +ulong __ovld __cnfn convert_ulong_rtp(ushort); +ulong __ovld __cnfn convert_ulong_sat_rtp(ushort); +ulong __ovld __cnfn convert_ulong_rtn(ushort); +ulong __ovld __cnfn convert_ulong_sat_rtn(ushort); +ulong __ovld __cnfn convert_ulong(ushort); +ulong __ovld __cnfn convert_ulong_sat(ushort); +ulong __ovld __cnfn convert_ulong_rte(int); +ulong __ovld __cnfn convert_ulong_sat_rte(int); +ulong __ovld __cnfn convert_ulong_rtz(int); +ulong __ovld __cnfn convert_ulong_sat_rtz(int); +ulong __ovld __cnfn convert_ulong_rtp(int); +ulong __ovld __cnfn convert_ulong_sat_rtp(int); +ulong __ovld __cnfn convert_ulong_rtn(int); +ulong __ovld __cnfn convert_ulong_sat_rtn(int); +ulong __ovld __cnfn convert_ulong(int); +ulong __ovld __cnfn convert_ulong_sat(int); +ulong __ovld __cnfn convert_ulong_rte(uint); +ulong __ovld __cnfn convert_ulong_sat_rte(uint); +ulong __ovld __cnfn convert_ulong_rtz(uint); +ulong __ovld __cnfn convert_ulong_sat_rtz(uint); +ulong __ovld __cnfn convert_ulong_rtp(uint); +ulong __ovld __cnfn convert_ulong_sat_rtp(uint); +ulong __ovld __cnfn convert_ulong_rtn(uint); +ulong __ovld __cnfn convert_ulong_sat_rtn(uint); +ulong __ovld __cnfn convert_ulong(uint); +ulong __ovld __cnfn convert_ulong_sat(uint); +ulong __ovld __cnfn convert_ulong_rte(long); +ulong __ovld __cnfn convert_ulong_sat_rte(long); +ulong __ovld __cnfn convert_ulong_rtz(long); +ulong __ovld __cnfn convert_ulong_sat_rtz(long); +ulong __ovld __cnfn convert_ulong_rtp(long); +ulong __ovld __cnfn convert_ulong_sat_rtp(long); +ulong __ovld __cnfn convert_ulong_rtn(long); +ulong __ovld __cnfn convert_ulong_sat_rtn(long); +ulong __ovld __cnfn convert_ulong(long); +ulong __ovld __cnfn convert_ulong_sat(long); +ulong __ovld __cnfn convert_ulong_rte(ulong); +ulong __ovld __cnfn convert_ulong_sat_rte(ulong); +ulong __ovld __cnfn convert_ulong_rtz(ulong); +ulong __ovld __cnfn convert_ulong_sat_rtz(ulong); +ulong __ovld __cnfn convert_ulong_rtp(ulong); +ulong __ovld __cnfn convert_ulong_sat_rtp(ulong); +ulong __ovld __cnfn convert_ulong_rtn(ulong); +ulong __ovld __cnfn convert_ulong_sat_rtn(ulong); +ulong __ovld __cnfn convert_ulong(ulong); +ulong __ovld __cnfn convert_ulong_sat(ulong); +ulong __ovld __cnfn convert_ulong_rte(float); +ulong __ovld __cnfn convert_ulong_sat_rte(float); +ulong __ovld __cnfn convert_ulong_rtz(float); +ulong __ovld __cnfn convert_ulong_sat_rtz(float); +ulong __ovld __cnfn convert_ulong_rtp(float); +ulong __ovld __cnfn convert_ulong_sat_rtp(float); +ulong __ovld __cnfn convert_ulong_rtn(float); +ulong __ovld __cnfn convert_ulong_sat_rtn(float); +ulong __ovld __cnfn convert_ulong(float); +ulong __ovld __cnfn convert_ulong_sat(float); +float __ovld __cnfn convert_float_rte(char); +float __ovld __cnfn convert_float_rtz(char); +float __ovld __cnfn convert_float_rtp(char); +float __ovld __cnfn convert_float_rtn(char); +float __ovld __cnfn convert_float(char); +float __ovld __cnfn convert_float_rte(uchar); +float __ovld __cnfn convert_float_rtz(uchar); +float __ovld __cnfn convert_float_rtp(uchar); +float __ovld __cnfn convert_float_rtn(uchar); +float __ovld __cnfn convert_float(uchar); +float __ovld __cnfn convert_float_rte(short); +float __ovld __cnfn convert_float_rtz(short); +float __ovld __cnfn convert_float_rtp(short); +float __ovld __cnfn convert_float_rtn(short); +float __ovld __cnfn convert_float(short); +float __ovld __cnfn convert_float_rte(ushort); +float __ovld __cnfn convert_float_rtz(ushort); +float __ovld __cnfn convert_float_rtp(ushort); +float __ovld __cnfn convert_float_rtn(ushort); +float __ovld __cnfn convert_float(ushort); +float __ovld __cnfn convert_float_rte(int); +float __ovld __cnfn convert_float_rtz(int); +float __ovld __cnfn convert_float_rtp(int); +float __ovld __cnfn convert_float_rtn(int); +float __ovld __cnfn convert_float(int); +float __ovld __cnfn convert_float_rte(uint); +float __ovld __cnfn convert_float_rtz(uint); +float __ovld __cnfn convert_float_rtp(uint); +float __ovld __cnfn convert_float_rtn(uint); +float __ovld __cnfn convert_float(uint); +float __ovld __cnfn convert_float_rte(long); +float __ovld __cnfn convert_float_rtz(long); +float __ovld __cnfn convert_float_rtp(long); +float __ovld __cnfn convert_float_rtn(long); +float __ovld __cnfn convert_float(long); +float __ovld __cnfn convert_float_rte(ulong); +float __ovld __cnfn convert_float_rtz(ulong); +float __ovld __cnfn convert_float_rtp(ulong); +float __ovld __cnfn convert_float_rtn(ulong); +float __ovld __cnfn convert_float(ulong); +float __ovld __cnfn convert_float_rte(float); +float __ovld __cnfn convert_float_rtz(float); +float __ovld __cnfn convert_float_rtp(float); +float __ovld __cnfn convert_float_rtn(float); +float __ovld __cnfn convert_float(float); +char2 __ovld __cnfn convert_char2_rte(char2); +char2 __ovld __cnfn convert_char2_sat_rte(char2); +char2 __ovld __cnfn convert_char2_rtz(char2); +char2 __ovld __cnfn convert_char2_sat_rtz(char2); +char2 __ovld __cnfn convert_char2_rtp(char2); +char2 __ovld __cnfn convert_char2_sat_rtp(char2); +char2 __ovld __cnfn convert_char2_rtn(char2); +char2 __ovld __cnfn convert_char2_sat_rtn(char2); +char2 __ovld __cnfn convert_char2(char2); +char2 __ovld __cnfn convert_char2_sat(char2); +char2 __ovld __cnfn convert_char2_rte(uchar2); +char2 __ovld __cnfn convert_char2_sat_rte(uchar2); +char2 __ovld __cnfn convert_char2_rtz(uchar2); +char2 __ovld __cnfn convert_char2_sat_rtz(uchar2); +char2 __ovld __cnfn convert_char2_rtp(uchar2); +char2 __ovld __cnfn convert_char2_sat_rtp(uchar2); +char2 __ovld __cnfn convert_char2_rtn(uchar2); +char2 __ovld __cnfn convert_char2_sat_rtn(uchar2); +char2 __ovld __cnfn convert_char2(uchar2); +char2 __ovld __cnfn convert_char2_sat(uchar2); +char2 __ovld __cnfn convert_char2_rte(short2); +char2 __ovld __cnfn convert_char2_sat_rte(short2); +char2 __ovld __cnfn convert_char2_rtz(short2); +char2 __ovld __cnfn convert_char2_sat_rtz(short2); +char2 __ovld __cnfn convert_char2_rtp(short2); +char2 __ovld __cnfn convert_char2_sat_rtp(short2); +char2 __ovld __cnfn convert_char2_rtn(short2); +char2 __ovld __cnfn convert_char2_sat_rtn(short2); +char2 __ovld __cnfn convert_char2(short2); +char2 __ovld __cnfn convert_char2_sat(short2); +char2 __ovld __cnfn convert_char2_rte(ushort2); +char2 __ovld __cnfn convert_char2_sat_rte(ushort2); +char2 __ovld __cnfn convert_char2_rtz(ushort2); +char2 __ovld __cnfn convert_char2_sat_rtz(ushort2); +char2 __ovld __cnfn convert_char2_rtp(ushort2); +char2 __ovld __cnfn convert_char2_sat_rtp(ushort2); +char2 __ovld __cnfn convert_char2_rtn(ushort2); +char2 __ovld __cnfn convert_char2_sat_rtn(ushort2); +char2 __ovld __cnfn convert_char2(ushort2); +char2 __ovld __cnfn convert_char2_sat(ushort2); +char2 __ovld __cnfn convert_char2_rte(int2); +char2 __ovld __cnfn convert_char2_sat_rte(int2); +char2 __ovld __cnfn convert_char2_rtz(int2); +char2 __ovld __cnfn convert_char2_sat_rtz(int2); +char2 __ovld __cnfn convert_char2_rtp(int2); +char2 __ovld __cnfn convert_char2_sat_rtp(int2); +char2 __ovld __cnfn convert_char2_rtn(int2); +char2 __ovld __cnfn convert_char2_sat_rtn(int2); +char2 __ovld __cnfn convert_char2(int2); +char2 __ovld __cnfn convert_char2_sat(int2); +char2 __ovld __cnfn convert_char2_rte(uint2); +char2 __ovld __cnfn convert_char2_sat_rte(uint2); +char2 __ovld __cnfn convert_char2_rtz(uint2); +char2 __ovld __cnfn convert_char2_sat_rtz(uint2); +char2 __ovld __cnfn convert_char2_rtp(uint2); +char2 __ovld __cnfn convert_char2_sat_rtp(uint2); +char2 __ovld __cnfn convert_char2_rtn(uint2); +char2 __ovld __cnfn convert_char2_sat_rtn(uint2); +char2 __ovld __cnfn convert_char2(uint2); +char2 __ovld __cnfn convert_char2_sat(uint2); +char2 __ovld __cnfn convert_char2_rte(long2); +char2 __ovld __cnfn convert_char2_sat_rte(long2); +char2 __ovld __cnfn convert_char2_rtz(long2); +char2 __ovld __cnfn convert_char2_sat_rtz(long2); +char2 __ovld __cnfn convert_char2_rtp(long2); +char2 __ovld __cnfn convert_char2_sat_rtp(long2); +char2 __ovld __cnfn convert_char2_rtn(long2); +char2 __ovld __cnfn convert_char2_sat_rtn(long2); +char2 __ovld __cnfn convert_char2(long2); +char2 __ovld __cnfn convert_char2_sat(long2); +char2 __ovld __cnfn convert_char2_rte(ulong2); +char2 __ovld __cnfn convert_char2_sat_rte(ulong2); +char2 __ovld __cnfn convert_char2_rtz(ulong2); +char2 __ovld __cnfn convert_char2_sat_rtz(ulong2); +char2 __ovld __cnfn convert_char2_rtp(ulong2); +char2 __ovld __cnfn convert_char2_sat_rtp(ulong2); +char2 __ovld __cnfn convert_char2_rtn(ulong2); +char2 __ovld __cnfn convert_char2_sat_rtn(ulong2); +char2 __ovld __cnfn convert_char2(ulong2); +char2 __ovld __cnfn convert_char2_sat(ulong2); +char2 __ovld __cnfn convert_char2_rte(float2); +char2 __ovld __cnfn convert_char2_sat_rte(float2); +char2 __ovld __cnfn convert_char2_rtz(float2); +char2 __ovld __cnfn convert_char2_sat_rtz(float2); +char2 __ovld __cnfn convert_char2_rtp(float2); +char2 __ovld __cnfn convert_char2_sat_rtp(float2); +char2 __ovld __cnfn convert_char2_rtn(float2); +char2 __ovld __cnfn convert_char2_sat_rtn(float2); +char2 __ovld __cnfn convert_char2(float2); +char2 __ovld __cnfn convert_char2_sat(float2); +uchar2 __ovld __cnfn convert_uchar2_rte(char2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(char2); +uchar2 __ovld __cnfn convert_uchar2_rtz(char2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(char2); +uchar2 __ovld __cnfn convert_uchar2_rtp(char2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(char2); +uchar2 __ovld __cnfn convert_uchar2_rtn(char2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(char2); +uchar2 __ovld __cnfn convert_uchar2(char2); +uchar2 __ovld __cnfn convert_uchar2_sat(char2); +uchar2 __ovld __cnfn convert_uchar2_rte(uchar2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(uchar2); +uchar2 __ovld __cnfn convert_uchar2_rtz(uchar2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(uchar2); +uchar2 __ovld __cnfn convert_uchar2_rtp(uchar2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(uchar2); +uchar2 __ovld __cnfn convert_uchar2_rtn(uchar2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(uchar2); +uchar2 __ovld __cnfn convert_uchar2(uchar2); +uchar2 __ovld __cnfn convert_uchar2_sat(uchar2); +uchar2 __ovld __cnfn convert_uchar2_rte(short2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(short2); +uchar2 __ovld __cnfn convert_uchar2_rtz(short2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(short2); +uchar2 __ovld __cnfn convert_uchar2_rtp(short2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(short2); +uchar2 __ovld __cnfn convert_uchar2_rtn(short2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(short2); +uchar2 __ovld __cnfn convert_uchar2(short2); +uchar2 __ovld __cnfn convert_uchar2_sat(short2); +uchar2 __ovld __cnfn convert_uchar2_rte(ushort2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(ushort2); +uchar2 __ovld __cnfn convert_uchar2_rtz(ushort2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(ushort2); +uchar2 __ovld __cnfn convert_uchar2_rtp(ushort2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(ushort2); +uchar2 __ovld __cnfn convert_uchar2_rtn(ushort2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(ushort2); +uchar2 __ovld __cnfn convert_uchar2(ushort2); +uchar2 __ovld __cnfn convert_uchar2_sat(ushort2); +uchar2 __ovld __cnfn convert_uchar2_rte(int2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(int2); +uchar2 __ovld __cnfn convert_uchar2_rtz(int2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(int2); +uchar2 __ovld __cnfn convert_uchar2_rtp(int2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(int2); +uchar2 __ovld __cnfn convert_uchar2_rtn(int2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(int2); +uchar2 __ovld __cnfn convert_uchar2(int2); +uchar2 __ovld __cnfn convert_uchar2_sat(int2); +uchar2 __ovld __cnfn convert_uchar2_rte(uint2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(uint2); +uchar2 __ovld __cnfn convert_uchar2_rtz(uint2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(uint2); +uchar2 __ovld __cnfn convert_uchar2_rtp(uint2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(uint2); +uchar2 __ovld __cnfn convert_uchar2_rtn(uint2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(uint2); +uchar2 __ovld __cnfn convert_uchar2(uint2); +uchar2 __ovld __cnfn convert_uchar2_sat(uint2); +uchar2 __ovld __cnfn convert_uchar2_rte(long2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(long2); +uchar2 __ovld __cnfn convert_uchar2_rtz(long2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(long2); +uchar2 __ovld __cnfn convert_uchar2_rtp(long2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(long2); +uchar2 __ovld __cnfn convert_uchar2_rtn(long2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(long2); +uchar2 __ovld __cnfn convert_uchar2(long2); +uchar2 __ovld __cnfn convert_uchar2_sat(long2); +uchar2 __ovld __cnfn convert_uchar2_rte(ulong2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(ulong2); +uchar2 __ovld __cnfn convert_uchar2_rtz(ulong2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(ulong2); +uchar2 __ovld __cnfn convert_uchar2_rtp(ulong2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(ulong2); +uchar2 __ovld __cnfn convert_uchar2_rtn(ulong2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(ulong2); +uchar2 __ovld __cnfn convert_uchar2(ulong2); +uchar2 __ovld __cnfn convert_uchar2_sat(ulong2); +uchar2 __ovld __cnfn convert_uchar2_rte(float2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(float2); +uchar2 __ovld __cnfn convert_uchar2_rtz(float2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(float2); +uchar2 __ovld __cnfn convert_uchar2_rtp(float2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(float2); +uchar2 __ovld __cnfn convert_uchar2_rtn(float2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(float2); +uchar2 __ovld __cnfn convert_uchar2(float2); +uchar2 __ovld __cnfn convert_uchar2_sat(float2); +short2 __ovld __cnfn convert_short2_rte(char2); +short2 __ovld __cnfn convert_short2_sat_rte(char2); +short2 __ovld __cnfn convert_short2_rtz(char2); +short2 __ovld __cnfn convert_short2_sat_rtz(char2); +short2 __ovld __cnfn convert_short2_rtp(char2); +short2 __ovld __cnfn convert_short2_sat_rtp(char2); +short2 __ovld __cnfn convert_short2_rtn(char2); +short2 __ovld __cnfn convert_short2_sat_rtn(char2); +short2 __ovld __cnfn convert_short2(char2); +short2 __ovld __cnfn convert_short2_sat(char2); +short2 __ovld __cnfn convert_short2_rte(uchar2); +short2 __ovld __cnfn convert_short2_sat_rte(uchar2); +short2 __ovld __cnfn convert_short2_rtz(uchar2); +short2 __ovld __cnfn convert_short2_sat_rtz(uchar2); +short2 __ovld __cnfn convert_short2_rtp(uchar2); +short2 __ovld __cnfn convert_short2_sat_rtp(uchar2); +short2 __ovld __cnfn convert_short2_rtn(uchar2); +short2 __ovld __cnfn convert_short2_sat_rtn(uchar2); +short2 __ovld __cnfn convert_short2(uchar2); +short2 __ovld __cnfn convert_short2_sat(uchar2); +short2 __ovld __cnfn convert_short2_rte(short2); +short2 __ovld __cnfn convert_short2_sat_rte(short2); +short2 __ovld __cnfn convert_short2_rtz(short2); +short2 __ovld __cnfn convert_short2_sat_rtz(short2); +short2 __ovld __cnfn convert_short2_rtp(short2); +short2 __ovld __cnfn convert_short2_sat_rtp(short2); +short2 __ovld __cnfn convert_short2_rtn(short2); +short2 __ovld __cnfn convert_short2_sat_rtn(short2); +short2 __ovld __cnfn convert_short2(short2); +short2 __ovld __cnfn convert_short2_sat(short2); +short2 __ovld __cnfn convert_short2_rte(ushort2); +short2 __ovld __cnfn convert_short2_sat_rte(ushort2); +short2 __ovld __cnfn convert_short2_rtz(ushort2); +short2 __ovld __cnfn convert_short2_sat_rtz(ushort2); +short2 __ovld __cnfn convert_short2_rtp(ushort2); +short2 __ovld __cnfn convert_short2_sat_rtp(ushort2); +short2 __ovld __cnfn convert_short2_rtn(ushort2); +short2 __ovld __cnfn convert_short2_sat_rtn(ushort2); +short2 __ovld __cnfn convert_short2(ushort2); +short2 __ovld __cnfn convert_short2_sat(ushort2); +short2 __ovld __cnfn convert_short2_rte(int2); +short2 __ovld __cnfn convert_short2_sat_rte(int2); +short2 __ovld __cnfn convert_short2_rtz(int2); +short2 __ovld __cnfn convert_short2_sat_rtz(int2); +short2 __ovld __cnfn convert_short2_rtp(int2); +short2 __ovld __cnfn convert_short2_sat_rtp(int2); +short2 __ovld __cnfn convert_short2_rtn(int2); +short2 __ovld __cnfn convert_short2_sat_rtn(int2); +short2 __ovld __cnfn convert_short2(int2); +short2 __ovld __cnfn convert_short2_sat(int2); +short2 __ovld __cnfn convert_short2_rte(uint2); +short2 __ovld __cnfn convert_short2_sat_rte(uint2); +short2 __ovld __cnfn convert_short2_rtz(uint2); +short2 __ovld __cnfn convert_short2_sat_rtz(uint2); +short2 __ovld __cnfn convert_short2_rtp(uint2); +short2 __ovld __cnfn convert_short2_sat_rtp(uint2); +short2 __ovld __cnfn convert_short2_rtn(uint2); +short2 __ovld __cnfn convert_short2_sat_rtn(uint2); +short2 __ovld __cnfn convert_short2(uint2); +short2 __ovld __cnfn convert_short2_sat(uint2); +short2 __ovld __cnfn convert_short2_rte(long2); +short2 __ovld __cnfn convert_short2_sat_rte(long2); +short2 __ovld __cnfn convert_short2_rtz(long2); +short2 __ovld __cnfn convert_short2_sat_rtz(long2); +short2 __ovld __cnfn convert_short2_rtp(long2); +short2 __ovld __cnfn convert_short2_sat_rtp(long2); +short2 __ovld __cnfn convert_short2_rtn(long2); +short2 __ovld __cnfn convert_short2_sat_rtn(long2); +short2 __ovld __cnfn convert_short2(long2); +short2 __ovld __cnfn convert_short2_sat(long2); +short2 __ovld __cnfn convert_short2_rte(ulong2); +short2 __ovld __cnfn convert_short2_sat_rte(ulong2); +short2 __ovld __cnfn convert_short2_rtz(ulong2); +short2 __ovld __cnfn convert_short2_sat_rtz(ulong2); +short2 __ovld __cnfn convert_short2_rtp(ulong2); +short2 __ovld __cnfn convert_short2_sat_rtp(ulong2); +short2 __ovld __cnfn convert_short2_rtn(ulong2); +short2 __ovld __cnfn convert_short2_sat_rtn(ulong2); +short2 __ovld __cnfn convert_short2(ulong2); +short2 __ovld __cnfn convert_short2_sat(ulong2); +short2 __ovld __cnfn convert_short2_rte(float2); +short2 __ovld __cnfn convert_short2_sat_rte(float2); +short2 __ovld __cnfn convert_short2_rtz(float2); +short2 __ovld __cnfn convert_short2_sat_rtz(float2); +short2 __ovld __cnfn convert_short2_rtp(float2); +short2 __ovld __cnfn convert_short2_sat_rtp(float2); +short2 __ovld __cnfn convert_short2_rtn(float2); +short2 __ovld __cnfn convert_short2_sat_rtn(float2); +short2 __ovld __cnfn convert_short2(float2); +short2 __ovld __cnfn convert_short2_sat(float2); +ushort2 __ovld __cnfn convert_ushort2_rte(char2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(char2); +ushort2 __ovld __cnfn convert_ushort2_rtz(char2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(char2); +ushort2 __ovld __cnfn convert_ushort2_rtp(char2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(char2); +ushort2 __ovld __cnfn convert_ushort2_rtn(char2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(char2); +ushort2 __ovld __cnfn convert_ushort2(char2); +ushort2 __ovld __cnfn convert_ushort2_sat(char2); +ushort2 __ovld __cnfn convert_ushort2_rte(uchar2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(uchar2); +ushort2 __ovld __cnfn convert_ushort2_rtz(uchar2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(uchar2); +ushort2 __ovld __cnfn convert_ushort2_rtp(uchar2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(uchar2); +ushort2 __ovld __cnfn convert_ushort2_rtn(uchar2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(uchar2); +ushort2 __ovld __cnfn convert_ushort2(uchar2); +ushort2 __ovld __cnfn convert_ushort2_sat(uchar2); +ushort2 __ovld __cnfn convert_ushort2_rte(short2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(short2); +ushort2 __ovld __cnfn convert_ushort2_rtz(short2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(short2); +ushort2 __ovld __cnfn convert_ushort2_rtp(short2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(short2); +ushort2 __ovld __cnfn convert_ushort2_rtn(short2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(short2); +ushort2 __ovld __cnfn convert_ushort2(short2); +ushort2 __ovld __cnfn convert_ushort2_sat(short2); +ushort2 __ovld __cnfn convert_ushort2_rte(ushort2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(ushort2); +ushort2 __ovld __cnfn convert_ushort2_rtz(ushort2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(ushort2); +ushort2 __ovld __cnfn convert_ushort2_rtp(ushort2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(ushort2); +ushort2 __ovld __cnfn convert_ushort2_rtn(ushort2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(ushort2); +ushort2 __ovld __cnfn convert_ushort2(ushort2); +ushort2 __ovld __cnfn convert_ushort2_sat(ushort2); +ushort2 __ovld __cnfn convert_ushort2_rte(int2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(int2); +ushort2 __ovld __cnfn convert_ushort2_rtz(int2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(int2); +ushort2 __ovld __cnfn convert_ushort2_rtp(int2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(int2); +ushort2 __ovld __cnfn convert_ushort2_rtn(int2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(int2); +ushort2 __ovld __cnfn convert_ushort2(int2); +ushort2 __ovld __cnfn convert_ushort2_sat(int2); +ushort2 __ovld __cnfn convert_ushort2_rte(uint2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(uint2); +ushort2 __ovld __cnfn convert_ushort2_rtz(uint2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(uint2); +ushort2 __ovld __cnfn convert_ushort2_rtp(uint2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(uint2); +ushort2 __ovld __cnfn convert_ushort2_rtn(uint2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(uint2); +ushort2 __ovld __cnfn convert_ushort2(uint2); +ushort2 __ovld __cnfn convert_ushort2_sat(uint2); +ushort2 __ovld __cnfn convert_ushort2_rte(long2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(long2); +ushort2 __ovld __cnfn convert_ushort2_rtz(long2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(long2); +ushort2 __ovld __cnfn convert_ushort2_rtp(long2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(long2); +ushort2 __ovld __cnfn convert_ushort2_rtn(long2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(long2); +ushort2 __ovld __cnfn convert_ushort2(long2); +ushort2 __ovld __cnfn convert_ushort2_sat(long2); +ushort2 __ovld __cnfn convert_ushort2_rte(ulong2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(ulong2); +ushort2 __ovld __cnfn convert_ushort2_rtz(ulong2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(ulong2); +ushort2 __ovld __cnfn convert_ushort2_rtp(ulong2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(ulong2); +ushort2 __ovld __cnfn convert_ushort2_rtn(ulong2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(ulong2); +ushort2 __ovld __cnfn convert_ushort2(ulong2); +ushort2 __ovld __cnfn convert_ushort2_sat(ulong2); +ushort2 __ovld __cnfn convert_ushort2_rte(float2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(float2); +ushort2 __ovld __cnfn convert_ushort2_rtz(float2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(float2); +ushort2 __ovld __cnfn convert_ushort2_rtp(float2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(float2); +ushort2 __ovld __cnfn convert_ushort2_rtn(float2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(float2); +ushort2 __ovld __cnfn convert_ushort2(float2); +ushort2 __ovld __cnfn convert_ushort2_sat(float2); +int2 __ovld __cnfn convert_int2_rte(char2); +int2 __ovld __cnfn convert_int2_sat_rte(char2); +int2 __ovld __cnfn convert_int2_rtz(char2); +int2 __ovld __cnfn convert_int2_sat_rtz(char2); +int2 __ovld __cnfn convert_int2_rtp(char2); +int2 __ovld __cnfn convert_int2_sat_rtp(char2); +int2 __ovld __cnfn convert_int2_rtn(char2); +int2 __ovld __cnfn convert_int2_sat_rtn(char2); +int2 __ovld __cnfn convert_int2(char2); +int2 __ovld __cnfn convert_int2_sat(char2); +int2 __ovld __cnfn convert_int2_rte(uchar2); +int2 __ovld __cnfn convert_int2_sat_rte(uchar2); +int2 __ovld __cnfn convert_int2_rtz(uchar2); +int2 __ovld __cnfn convert_int2_sat_rtz(uchar2); +int2 __ovld __cnfn convert_int2_rtp(uchar2); +int2 __ovld __cnfn convert_int2_sat_rtp(uchar2); +int2 __ovld __cnfn convert_int2_rtn(uchar2); +int2 __ovld __cnfn convert_int2_sat_rtn(uchar2); +int2 __ovld __cnfn convert_int2(uchar2); +int2 __ovld __cnfn convert_int2_sat(uchar2); +int2 __ovld __cnfn convert_int2_rte(short2); +int2 __ovld __cnfn convert_int2_sat_rte(short2); +int2 __ovld __cnfn convert_int2_rtz(short2); +int2 __ovld __cnfn convert_int2_sat_rtz(short2); +int2 __ovld __cnfn convert_int2_rtp(short2); +int2 __ovld __cnfn convert_int2_sat_rtp(short2); +int2 __ovld __cnfn convert_int2_rtn(short2); +int2 __ovld __cnfn convert_int2_sat_rtn(short2); +int2 __ovld __cnfn convert_int2(short2); +int2 __ovld __cnfn convert_int2_sat(short2); +int2 __ovld __cnfn convert_int2_rte(ushort2); +int2 __ovld __cnfn convert_int2_sat_rte(ushort2); +int2 __ovld __cnfn convert_int2_rtz(ushort2); +int2 __ovld __cnfn convert_int2_sat_rtz(ushort2); +int2 __ovld __cnfn convert_int2_rtp(ushort2); +int2 __ovld __cnfn convert_int2_sat_rtp(ushort2); +int2 __ovld __cnfn convert_int2_rtn(ushort2); +int2 __ovld __cnfn convert_int2_sat_rtn(ushort2); +int2 __ovld __cnfn convert_int2(ushort2); +int2 __ovld __cnfn convert_int2_sat(ushort2); +int2 __ovld __cnfn convert_int2_rte(int2); +int2 __ovld __cnfn convert_int2_sat_rte(int2); +int2 __ovld __cnfn convert_int2_rtz(int2); +int2 __ovld __cnfn convert_int2_sat_rtz(int2); +int2 __ovld __cnfn convert_int2_rtp(int2); +int2 __ovld __cnfn convert_int2_sat_rtp(int2); +int2 __ovld __cnfn convert_int2_rtn(int2); +int2 __ovld __cnfn convert_int2_sat_rtn(int2); +int2 __ovld __cnfn convert_int2(int2); +int2 __ovld __cnfn convert_int2_sat(int2); +int2 __ovld __cnfn convert_int2_rte(uint2); +int2 __ovld __cnfn convert_int2_sat_rte(uint2); +int2 __ovld __cnfn convert_int2_rtz(uint2); +int2 __ovld __cnfn convert_int2_sat_rtz(uint2); +int2 __ovld __cnfn convert_int2_rtp(uint2); +int2 __ovld __cnfn convert_int2_sat_rtp(uint2); +int2 __ovld __cnfn convert_int2_rtn(uint2); +int2 __ovld __cnfn convert_int2_sat_rtn(uint2); +int2 __ovld __cnfn convert_int2(uint2); +int2 __ovld __cnfn convert_int2_sat(uint2); +int2 __ovld __cnfn convert_int2_rte(long2); +int2 __ovld __cnfn convert_int2_sat_rte(long2); +int2 __ovld __cnfn convert_int2_rtz(long2); +int2 __ovld __cnfn convert_int2_sat_rtz(long2); +int2 __ovld __cnfn convert_int2_rtp(long2); +int2 __ovld __cnfn convert_int2_sat_rtp(long2); +int2 __ovld __cnfn convert_int2_rtn(long2); +int2 __ovld __cnfn convert_int2_sat_rtn(long2); +int2 __ovld __cnfn convert_int2(long2); +int2 __ovld __cnfn convert_int2_sat(long2); +int2 __ovld __cnfn convert_int2_rte(ulong2); +int2 __ovld __cnfn convert_int2_sat_rte(ulong2); +int2 __ovld __cnfn convert_int2_rtz(ulong2); +int2 __ovld __cnfn convert_int2_sat_rtz(ulong2); +int2 __ovld __cnfn convert_int2_rtp(ulong2); +int2 __ovld __cnfn convert_int2_sat_rtp(ulong2); +int2 __ovld __cnfn convert_int2_rtn(ulong2); +int2 __ovld __cnfn convert_int2_sat_rtn(ulong2); +int2 __ovld __cnfn convert_int2(ulong2); +int2 __ovld __cnfn convert_int2_sat(ulong2); +int2 __ovld __cnfn convert_int2_rte(float2); +int2 __ovld __cnfn convert_int2_sat_rte(float2); +int2 __ovld __cnfn convert_int2_rtz(float2); +int2 __ovld __cnfn convert_int2_sat_rtz(float2); +int2 __ovld __cnfn convert_int2_rtp(float2); +int2 __ovld __cnfn convert_int2_sat_rtp(float2); +int2 __ovld __cnfn convert_int2_rtn(float2); +int2 __ovld __cnfn convert_int2_sat_rtn(float2); +int2 __ovld __cnfn convert_int2(float2); +int2 __ovld __cnfn convert_int2_sat(float2); +uint2 __ovld __cnfn convert_uint2_rte(char2); +uint2 __ovld __cnfn convert_uint2_sat_rte(char2); +uint2 __ovld __cnfn convert_uint2_rtz(char2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(char2); +uint2 __ovld __cnfn convert_uint2_rtp(char2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(char2); +uint2 __ovld __cnfn convert_uint2_rtn(char2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(char2); +uint2 __ovld __cnfn convert_uint2(char2); +uint2 __ovld __cnfn convert_uint2_sat(char2); +uint2 __ovld __cnfn convert_uint2_rte(uchar2); +uint2 __ovld __cnfn convert_uint2_sat_rte(uchar2); +uint2 __ovld __cnfn convert_uint2_rtz(uchar2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(uchar2); +uint2 __ovld __cnfn convert_uint2_rtp(uchar2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(uchar2); +uint2 __ovld __cnfn convert_uint2_rtn(uchar2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(uchar2); +uint2 __ovld __cnfn convert_uint2(uchar2); +uint2 __ovld __cnfn convert_uint2_sat(uchar2); +uint2 __ovld __cnfn convert_uint2_rte(short2); +uint2 __ovld __cnfn convert_uint2_sat_rte(short2); +uint2 __ovld __cnfn convert_uint2_rtz(short2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(short2); +uint2 __ovld __cnfn convert_uint2_rtp(short2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(short2); +uint2 __ovld __cnfn convert_uint2_rtn(short2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(short2); +uint2 __ovld __cnfn convert_uint2(short2); +uint2 __ovld __cnfn convert_uint2_sat(short2); +uint2 __ovld __cnfn convert_uint2_rte(ushort2); +uint2 __ovld __cnfn convert_uint2_sat_rte(ushort2); +uint2 __ovld __cnfn convert_uint2_rtz(ushort2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(ushort2); +uint2 __ovld __cnfn convert_uint2_rtp(ushort2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(ushort2); +uint2 __ovld __cnfn convert_uint2_rtn(ushort2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(ushort2); +uint2 __ovld __cnfn convert_uint2(ushort2); +uint2 __ovld __cnfn convert_uint2_sat(ushort2); +uint2 __ovld __cnfn convert_uint2_rte(int2); +uint2 __ovld __cnfn convert_uint2_sat_rte(int2); +uint2 __ovld __cnfn convert_uint2_rtz(int2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(int2); +uint2 __ovld __cnfn convert_uint2_rtp(int2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(int2); +uint2 __ovld __cnfn convert_uint2_rtn(int2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(int2); +uint2 __ovld __cnfn convert_uint2(int2); +uint2 __ovld __cnfn convert_uint2_sat(int2); +uint2 __ovld __cnfn convert_uint2_rte(uint2); +uint2 __ovld __cnfn convert_uint2_sat_rte(uint2); +uint2 __ovld __cnfn convert_uint2_rtz(uint2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(uint2); +uint2 __ovld __cnfn convert_uint2_rtp(uint2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(uint2); +uint2 __ovld __cnfn convert_uint2_rtn(uint2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(uint2); +uint2 __ovld __cnfn convert_uint2(uint2); +uint2 __ovld __cnfn convert_uint2_sat(uint2); +uint2 __ovld __cnfn convert_uint2_rte(long2); +uint2 __ovld __cnfn convert_uint2_sat_rte(long2); +uint2 __ovld __cnfn convert_uint2_rtz(long2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(long2); +uint2 __ovld __cnfn convert_uint2_rtp(long2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(long2); +uint2 __ovld __cnfn convert_uint2_rtn(long2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(long2); +uint2 __ovld __cnfn convert_uint2(long2); +uint2 __ovld __cnfn convert_uint2_sat(long2); +uint2 __ovld __cnfn convert_uint2_rte(ulong2); +uint2 __ovld __cnfn convert_uint2_sat_rte(ulong2); +uint2 __ovld __cnfn convert_uint2_rtz(ulong2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(ulong2); +uint2 __ovld __cnfn convert_uint2_rtp(ulong2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(ulong2); +uint2 __ovld __cnfn convert_uint2_rtn(ulong2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(ulong2); +uint2 __ovld __cnfn convert_uint2(ulong2); +uint2 __ovld __cnfn convert_uint2_sat(ulong2); +uint2 __ovld __cnfn convert_uint2_rte(float2); +uint2 __ovld __cnfn convert_uint2_sat_rte(float2); +uint2 __ovld __cnfn convert_uint2_rtz(float2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(float2); +uint2 __ovld __cnfn convert_uint2_rtp(float2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(float2); +uint2 __ovld __cnfn convert_uint2_rtn(float2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(float2); +uint2 __ovld __cnfn convert_uint2(float2); +uint2 __ovld __cnfn convert_uint2_sat(float2); +long2 __ovld __cnfn convert_long2_rte(char2); +long2 __ovld __cnfn convert_long2_sat_rte(char2); +long2 __ovld __cnfn convert_long2_rtz(char2); +long2 __ovld __cnfn convert_long2_sat_rtz(char2); +long2 __ovld __cnfn convert_long2_rtp(char2); +long2 __ovld __cnfn convert_long2_sat_rtp(char2); +long2 __ovld __cnfn convert_long2_rtn(char2); +long2 __ovld __cnfn convert_long2_sat_rtn(char2); +long2 __ovld __cnfn convert_long2(char2); +long2 __ovld __cnfn convert_long2_sat(char2); +long2 __ovld __cnfn convert_long2_rte(uchar2); +long2 __ovld __cnfn convert_long2_sat_rte(uchar2); +long2 __ovld __cnfn convert_long2_rtz(uchar2); +long2 __ovld __cnfn convert_long2_sat_rtz(uchar2); +long2 __ovld __cnfn convert_long2_rtp(uchar2); +long2 __ovld __cnfn convert_long2_sat_rtp(uchar2); +long2 __ovld __cnfn convert_long2_rtn(uchar2); +long2 __ovld __cnfn convert_long2_sat_rtn(uchar2); +long2 __ovld __cnfn convert_long2(uchar2); +long2 __ovld __cnfn convert_long2_sat(uchar2); +long2 __ovld __cnfn convert_long2_rte(short2); +long2 __ovld __cnfn convert_long2_sat_rte(short2); +long2 __ovld __cnfn convert_long2_rtz(short2); +long2 __ovld __cnfn convert_long2_sat_rtz(short2); +long2 __ovld __cnfn convert_long2_rtp(short2); +long2 __ovld __cnfn convert_long2_sat_rtp(short2); +long2 __ovld __cnfn convert_long2_rtn(short2); +long2 __ovld __cnfn convert_long2_sat_rtn(short2); +long2 __ovld __cnfn convert_long2(short2); +long2 __ovld __cnfn convert_long2_sat(short2); +long2 __ovld __cnfn convert_long2_rte(ushort2); +long2 __ovld __cnfn convert_long2_sat_rte(ushort2); +long2 __ovld __cnfn convert_long2_rtz(ushort2); +long2 __ovld __cnfn convert_long2_sat_rtz(ushort2); +long2 __ovld __cnfn convert_long2_rtp(ushort2); +long2 __ovld __cnfn convert_long2_sat_rtp(ushort2); +long2 __ovld __cnfn convert_long2_rtn(ushort2); +long2 __ovld __cnfn convert_long2_sat_rtn(ushort2); +long2 __ovld __cnfn convert_long2(ushort2); +long2 __ovld __cnfn convert_long2_sat(ushort2); +long2 __ovld __cnfn convert_long2_rte(int2); +long2 __ovld __cnfn convert_long2_sat_rte(int2); +long2 __ovld __cnfn convert_long2_rtz(int2); +long2 __ovld __cnfn convert_long2_sat_rtz(int2); +long2 __ovld __cnfn convert_long2_rtp(int2); +long2 __ovld __cnfn convert_long2_sat_rtp(int2); +long2 __ovld __cnfn convert_long2_rtn(int2); +long2 __ovld __cnfn convert_long2_sat_rtn(int2); +long2 __ovld __cnfn convert_long2(int2); +long2 __ovld __cnfn convert_long2_sat(int2); +long2 __ovld __cnfn convert_long2_rte(uint2); +long2 __ovld __cnfn convert_long2_sat_rte(uint2); +long2 __ovld __cnfn convert_long2_rtz(uint2); +long2 __ovld __cnfn convert_long2_sat_rtz(uint2); +long2 __ovld __cnfn convert_long2_rtp(uint2); +long2 __ovld __cnfn convert_long2_sat_rtp(uint2); +long2 __ovld __cnfn convert_long2_rtn(uint2); +long2 __ovld __cnfn convert_long2_sat_rtn(uint2); +long2 __ovld __cnfn convert_long2(uint2); +long2 __ovld __cnfn convert_long2_sat(uint2); +long2 __ovld __cnfn convert_long2_rte(long2); +long2 __ovld __cnfn convert_long2_sat_rte(long2); +long2 __ovld __cnfn convert_long2_rtz(long2); +long2 __ovld __cnfn convert_long2_sat_rtz(long2); +long2 __ovld __cnfn convert_long2_rtp(long2); +long2 __ovld __cnfn convert_long2_sat_rtp(long2); +long2 __ovld __cnfn convert_long2_rtn(long2); +long2 __ovld __cnfn convert_long2_sat_rtn(long2); +long2 __ovld __cnfn convert_long2(long2); +long2 __ovld __cnfn convert_long2_sat(long2); +long2 __ovld __cnfn convert_long2_rte(ulong2); +long2 __ovld __cnfn convert_long2_sat_rte(ulong2); +long2 __ovld __cnfn convert_long2_rtz(ulong2); +long2 __ovld __cnfn convert_long2_sat_rtz(ulong2); +long2 __ovld __cnfn convert_long2_rtp(ulong2); +long2 __ovld __cnfn convert_long2_sat_rtp(ulong2); +long2 __ovld __cnfn convert_long2_rtn(ulong2); +long2 __ovld __cnfn convert_long2_sat_rtn(ulong2); +long2 __ovld __cnfn convert_long2(ulong2); +long2 __ovld __cnfn convert_long2_sat(ulong2); +long2 __ovld __cnfn convert_long2_rte(float2); +long2 __ovld __cnfn convert_long2_sat_rte(float2); +long2 __ovld __cnfn convert_long2_rtz(float2); +long2 __ovld __cnfn convert_long2_sat_rtz(float2); +long2 __ovld __cnfn convert_long2_rtp(float2); +long2 __ovld __cnfn convert_long2_sat_rtp(float2); +long2 __ovld __cnfn convert_long2_rtn(float2); +long2 __ovld __cnfn convert_long2_sat_rtn(float2); +long2 __ovld __cnfn convert_long2(float2); +long2 __ovld __cnfn convert_long2_sat(float2); +ulong2 __ovld __cnfn convert_ulong2_rte(char2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(char2); +ulong2 __ovld __cnfn convert_ulong2_rtz(char2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(char2); +ulong2 __ovld __cnfn convert_ulong2_rtp(char2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(char2); +ulong2 __ovld __cnfn convert_ulong2_rtn(char2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(char2); +ulong2 __ovld __cnfn convert_ulong2(char2); +ulong2 __ovld __cnfn convert_ulong2_sat(char2); +ulong2 __ovld __cnfn convert_ulong2_rte(uchar2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(uchar2); +ulong2 __ovld __cnfn convert_ulong2_rtz(uchar2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(uchar2); +ulong2 __ovld __cnfn convert_ulong2_rtp(uchar2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(uchar2); +ulong2 __ovld __cnfn convert_ulong2_rtn(uchar2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(uchar2); +ulong2 __ovld __cnfn convert_ulong2(uchar2); +ulong2 __ovld __cnfn convert_ulong2_sat(uchar2); +ulong2 __ovld __cnfn convert_ulong2_rte(short2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(short2); +ulong2 __ovld __cnfn convert_ulong2_rtz(short2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(short2); +ulong2 __ovld __cnfn convert_ulong2_rtp(short2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(short2); +ulong2 __ovld __cnfn convert_ulong2_rtn(short2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(short2); +ulong2 __ovld __cnfn convert_ulong2(short2); +ulong2 __ovld __cnfn convert_ulong2_sat(short2); +ulong2 __ovld __cnfn convert_ulong2_rte(ushort2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(ushort2); +ulong2 __ovld __cnfn convert_ulong2_rtz(ushort2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(ushort2); +ulong2 __ovld __cnfn convert_ulong2_rtp(ushort2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(ushort2); +ulong2 __ovld __cnfn convert_ulong2_rtn(ushort2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(ushort2); +ulong2 __ovld __cnfn convert_ulong2(ushort2); +ulong2 __ovld __cnfn convert_ulong2_sat(ushort2); +ulong2 __ovld __cnfn convert_ulong2_rte(int2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(int2); +ulong2 __ovld __cnfn convert_ulong2_rtz(int2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(int2); +ulong2 __ovld __cnfn convert_ulong2_rtp(int2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(int2); +ulong2 __ovld __cnfn convert_ulong2_rtn(int2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(int2); +ulong2 __ovld __cnfn convert_ulong2(int2); +ulong2 __ovld __cnfn convert_ulong2_sat(int2); +ulong2 __ovld __cnfn convert_ulong2_rte(uint2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(uint2); +ulong2 __ovld __cnfn convert_ulong2_rtz(uint2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(uint2); +ulong2 __ovld __cnfn convert_ulong2_rtp(uint2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(uint2); +ulong2 __ovld __cnfn convert_ulong2_rtn(uint2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(uint2); +ulong2 __ovld __cnfn convert_ulong2(uint2); +ulong2 __ovld __cnfn convert_ulong2_sat(uint2); +ulong2 __ovld __cnfn convert_ulong2_rte(long2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(long2); +ulong2 __ovld __cnfn convert_ulong2_rtz(long2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(long2); +ulong2 __ovld __cnfn convert_ulong2_rtp(long2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(long2); +ulong2 __ovld __cnfn convert_ulong2_rtn(long2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(long2); +ulong2 __ovld __cnfn convert_ulong2(long2); +ulong2 __ovld __cnfn convert_ulong2_sat(long2); +ulong2 __ovld __cnfn convert_ulong2_rte(ulong2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(ulong2); +ulong2 __ovld __cnfn convert_ulong2_rtz(ulong2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(ulong2); +ulong2 __ovld __cnfn convert_ulong2_rtp(ulong2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(ulong2); +ulong2 __ovld __cnfn convert_ulong2_rtn(ulong2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(ulong2); +ulong2 __ovld __cnfn convert_ulong2(ulong2); +ulong2 __ovld __cnfn convert_ulong2_sat(ulong2); +ulong2 __ovld __cnfn convert_ulong2_rte(float2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(float2); +ulong2 __ovld __cnfn convert_ulong2_rtz(float2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(float2); +ulong2 __ovld __cnfn convert_ulong2_rtp(float2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(float2); +ulong2 __ovld __cnfn convert_ulong2_rtn(float2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(float2); +ulong2 __ovld __cnfn convert_ulong2(float2); +ulong2 __ovld __cnfn convert_ulong2_sat(float2); +float2 __ovld __cnfn convert_float2_rte(char2); +float2 __ovld __cnfn convert_float2_rtz(char2); +float2 __ovld __cnfn convert_float2_rtp(char2); +float2 __ovld __cnfn convert_float2_rtn(char2); +float2 __ovld __cnfn convert_float2(char2); +float2 __ovld __cnfn convert_float2_rte(uchar2); +float2 __ovld __cnfn convert_float2_rtz(uchar2); +float2 __ovld __cnfn convert_float2_rtp(uchar2); +float2 __ovld __cnfn convert_float2_rtn(uchar2); +float2 __ovld __cnfn convert_float2(uchar2); +float2 __ovld __cnfn convert_float2_rte(short2); +float2 __ovld __cnfn convert_float2_rtz(short2); +float2 __ovld __cnfn convert_float2_rtp(short2); +float2 __ovld __cnfn convert_float2_rtn(short2); +float2 __ovld __cnfn convert_float2(short2); +float2 __ovld __cnfn convert_float2_rte(ushort2); +float2 __ovld __cnfn convert_float2_rtz(ushort2); +float2 __ovld __cnfn convert_float2_rtp(ushort2); +float2 __ovld __cnfn convert_float2_rtn(ushort2); +float2 __ovld __cnfn convert_float2(ushort2); +float2 __ovld __cnfn convert_float2_rte(int2); +float2 __ovld __cnfn convert_float2_rtz(int2); +float2 __ovld __cnfn convert_float2_rtp(int2); +float2 __ovld __cnfn convert_float2_rtn(int2); +float2 __ovld __cnfn convert_float2(int2); +float2 __ovld __cnfn convert_float2_rte(uint2); +float2 __ovld __cnfn convert_float2_rtz(uint2); +float2 __ovld __cnfn convert_float2_rtp(uint2); +float2 __ovld __cnfn convert_float2_rtn(uint2); +float2 __ovld __cnfn convert_float2(uint2); +float2 __ovld __cnfn convert_float2_rte(long2); +float2 __ovld __cnfn convert_float2_rtz(long2); +float2 __ovld __cnfn convert_float2_rtp(long2); +float2 __ovld __cnfn convert_float2_rtn(long2); +float2 __ovld __cnfn convert_float2(long2); +float2 __ovld __cnfn convert_float2_rte(ulong2); +float2 __ovld __cnfn convert_float2_rtz(ulong2); +float2 __ovld __cnfn convert_float2_rtp(ulong2); +float2 __ovld __cnfn convert_float2_rtn(ulong2); +float2 __ovld __cnfn convert_float2(ulong2); +float2 __ovld __cnfn convert_float2_rte(float2); +float2 __ovld __cnfn convert_float2_rtz(float2); +float2 __ovld __cnfn convert_float2_rtp(float2); +float2 __ovld __cnfn convert_float2_rtn(float2); +float2 __ovld __cnfn convert_float2(float2); +char3 __ovld __cnfn convert_char3_rte(char3); +char3 __ovld __cnfn convert_char3_sat_rte(char3); +char3 __ovld __cnfn convert_char3_rtz(char3); +char3 __ovld __cnfn convert_char3_sat_rtz(char3); +char3 __ovld __cnfn convert_char3_rtp(char3); +char3 __ovld __cnfn convert_char3_sat_rtp(char3); +char3 __ovld __cnfn convert_char3_rtn(char3); +char3 __ovld __cnfn convert_char3_sat_rtn(char3); +char3 __ovld __cnfn convert_char3(char3); +char3 __ovld __cnfn convert_char3_sat(char3); +char3 __ovld __cnfn convert_char3_rte(uchar3); +char3 __ovld __cnfn convert_char3_sat_rte(uchar3); +char3 __ovld __cnfn convert_char3_rtz(uchar3); +char3 __ovld __cnfn convert_char3_sat_rtz(uchar3); +char3 __ovld __cnfn convert_char3_rtp(uchar3); +char3 __ovld __cnfn convert_char3_sat_rtp(uchar3); +char3 __ovld __cnfn convert_char3_rtn(uchar3); +char3 __ovld __cnfn convert_char3_sat_rtn(uchar3); +char3 __ovld __cnfn convert_char3(uchar3); +char3 __ovld __cnfn convert_char3_sat(uchar3); +char3 __ovld __cnfn convert_char3_rte(short3); +char3 __ovld __cnfn convert_char3_sat_rte(short3); +char3 __ovld __cnfn convert_char3_rtz(short3); +char3 __ovld __cnfn convert_char3_sat_rtz(short3); +char3 __ovld __cnfn convert_char3_rtp(short3); +char3 __ovld __cnfn convert_char3_sat_rtp(short3); +char3 __ovld __cnfn convert_char3_rtn(short3); +char3 __ovld __cnfn convert_char3_sat_rtn(short3); +char3 __ovld __cnfn convert_char3(short3); +char3 __ovld __cnfn convert_char3_sat(short3); +char3 __ovld __cnfn convert_char3_rte(ushort3); +char3 __ovld __cnfn convert_char3_sat_rte(ushort3); +char3 __ovld __cnfn convert_char3_rtz(ushort3); +char3 __ovld __cnfn convert_char3_sat_rtz(ushort3); +char3 __ovld __cnfn convert_char3_rtp(ushort3); +char3 __ovld __cnfn convert_char3_sat_rtp(ushort3); +char3 __ovld __cnfn convert_char3_rtn(ushort3); +char3 __ovld __cnfn convert_char3_sat_rtn(ushort3); +char3 __ovld __cnfn convert_char3(ushort3); +char3 __ovld __cnfn convert_char3_sat(ushort3); +char3 __ovld __cnfn convert_char3_rte(int3); +char3 __ovld __cnfn convert_char3_sat_rte(int3); +char3 __ovld __cnfn convert_char3_rtz(int3); +char3 __ovld __cnfn convert_char3_sat_rtz(int3); +char3 __ovld __cnfn convert_char3_rtp(int3); +char3 __ovld __cnfn convert_char3_sat_rtp(int3); +char3 __ovld __cnfn convert_char3_rtn(int3); +char3 __ovld __cnfn convert_char3_sat_rtn(int3); +char3 __ovld __cnfn convert_char3(int3); +char3 __ovld __cnfn convert_char3_sat(int3); +char3 __ovld __cnfn convert_char3_rte(uint3); +char3 __ovld __cnfn convert_char3_sat_rte(uint3); +char3 __ovld __cnfn convert_char3_rtz(uint3); +char3 __ovld __cnfn convert_char3_sat_rtz(uint3); +char3 __ovld __cnfn convert_char3_rtp(uint3); +char3 __ovld __cnfn convert_char3_sat_rtp(uint3); +char3 __ovld __cnfn convert_char3_rtn(uint3); +char3 __ovld __cnfn convert_char3_sat_rtn(uint3); +char3 __ovld __cnfn convert_char3(uint3); +char3 __ovld __cnfn convert_char3_sat(uint3); +char3 __ovld __cnfn convert_char3_rte(long3); +char3 __ovld __cnfn convert_char3_sat_rte(long3); +char3 __ovld __cnfn convert_char3_rtz(long3); +char3 __ovld __cnfn convert_char3_sat_rtz(long3); +char3 __ovld __cnfn convert_char3_rtp(long3); +char3 __ovld __cnfn convert_char3_sat_rtp(long3); +char3 __ovld __cnfn convert_char3_rtn(long3); +char3 __ovld __cnfn convert_char3_sat_rtn(long3); +char3 __ovld __cnfn convert_char3(long3); +char3 __ovld __cnfn convert_char3_sat(long3); +char3 __ovld __cnfn convert_char3_rte(ulong3); +char3 __ovld __cnfn convert_char3_sat_rte(ulong3); +char3 __ovld __cnfn convert_char3_rtz(ulong3); +char3 __ovld __cnfn convert_char3_sat_rtz(ulong3); +char3 __ovld __cnfn convert_char3_rtp(ulong3); +char3 __ovld __cnfn convert_char3_sat_rtp(ulong3); +char3 __ovld __cnfn convert_char3_rtn(ulong3); +char3 __ovld __cnfn convert_char3_sat_rtn(ulong3); +char3 __ovld __cnfn convert_char3(ulong3); +char3 __ovld __cnfn convert_char3_sat(ulong3); +char3 __ovld __cnfn convert_char3_rte(float3); +char3 __ovld __cnfn convert_char3_sat_rte(float3); +char3 __ovld __cnfn convert_char3_rtz(float3); +char3 __ovld __cnfn convert_char3_sat_rtz(float3); +char3 __ovld __cnfn convert_char3_rtp(float3); +char3 __ovld __cnfn convert_char3_sat_rtp(float3); +char3 __ovld __cnfn convert_char3_rtn(float3); +char3 __ovld __cnfn convert_char3_sat_rtn(float3); +char3 __ovld __cnfn convert_char3(float3); +char3 __ovld __cnfn convert_char3_sat(float3); +uchar3 __ovld __cnfn convert_uchar3_rte(char3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(char3); +uchar3 __ovld __cnfn convert_uchar3_rtz(char3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(char3); +uchar3 __ovld __cnfn convert_uchar3_rtp(char3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(char3); +uchar3 __ovld __cnfn convert_uchar3_rtn(char3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(char3); +uchar3 __ovld __cnfn convert_uchar3(char3); +uchar3 __ovld __cnfn convert_uchar3_sat(char3); +uchar3 __ovld __cnfn convert_uchar3_rte(uchar3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(uchar3); +uchar3 __ovld __cnfn convert_uchar3_rtz(uchar3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(uchar3); +uchar3 __ovld __cnfn convert_uchar3_rtp(uchar3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(uchar3); +uchar3 __ovld __cnfn convert_uchar3_rtn(uchar3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(uchar3); +uchar3 __ovld __cnfn convert_uchar3(uchar3); +uchar3 __ovld __cnfn convert_uchar3_sat(uchar3); +uchar3 __ovld __cnfn convert_uchar3_rte(short3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(short3); +uchar3 __ovld __cnfn convert_uchar3_rtz(short3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(short3); +uchar3 __ovld __cnfn convert_uchar3_rtp(short3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(short3); +uchar3 __ovld __cnfn convert_uchar3_rtn(short3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(short3); +uchar3 __ovld __cnfn convert_uchar3(short3); +uchar3 __ovld __cnfn convert_uchar3_sat(short3); +uchar3 __ovld __cnfn convert_uchar3_rte(ushort3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(ushort3); +uchar3 __ovld __cnfn convert_uchar3_rtz(ushort3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(ushort3); +uchar3 __ovld __cnfn convert_uchar3_rtp(ushort3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(ushort3); +uchar3 __ovld __cnfn convert_uchar3_rtn(ushort3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(ushort3); +uchar3 __ovld __cnfn convert_uchar3(ushort3); +uchar3 __ovld __cnfn convert_uchar3_sat(ushort3); +uchar3 __ovld __cnfn convert_uchar3_rte(int3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(int3); +uchar3 __ovld __cnfn convert_uchar3_rtz(int3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(int3); +uchar3 __ovld __cnfn convert_uchar3_rtp(int3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(int3); +uchar3 __ovld __cnfn convert_uchar3_rtn(int3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(int3); +uchar3 __ovld __cnfn convert_uchar3(int3); +uchar3 __ovld __cnfn convert_uchar3_sat(int3); +uchar3 __ovld __cnfn convert_uchar3_rte(uint3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(uint3); +uchar3 __ovld __cnfn convert_uchar3_rtz(uint3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(uint3); +uchar3 __ovld __cnfn convert_uchar3_rtp(uint3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(uint3); +uchar3 __ovld __cnfn convert_uchar3_rtn(uint3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(uint3); +uchar3 __ovld __cnfn convert_uchar3(uint3); +uchar3 __ovld __cnfn convert_uchar3_sat(uint3); +uchar3 __ovld __cnfn convert_uchar3_rte(long3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(long3); +uchar3 __ovld __cnfn convert_uchar3_rtz(long3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(long3); +uchar3 __ovld __cnfn convert_uchar3_rtp(long3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(long3); +uchar3 __ovld __cnfn convert_uchar3_rtn(long3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(long3); +uchar3 __ovld __cnfn convert_uchar3(long3); +uchar3 __ovld __cnfn convert_uchar3_sat(long3); +uchar3 __ovld __cnfn convert_uchar3_rte(ulong3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(ulong3); +uchar3 __ovld __cnfn convert_uchar3_rtz(ulong3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(ulong3); +uchar3 __ovld __cnfn convert_uchar3_rtp(ulong3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(ulong3); +uchar3 __ovld __cnfn convert_uchar3_rtn(ulong3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(ulong3); +uchar3 __ovld __cnfn convert_uchar3(ulong3); +uchar3 __ovld __cnfn convert_uchar3_sat(ulong3); +uchar3 __ovld __cnfn convert_uchar3_rte(float3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(float3); +uchar3 __ovld __cnfn convert_uchar3_rtz(float3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(float3); +uchar3 __ovld __cnfn convert_uchar3_rtp(float3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(float3); +uchar3 __ovld __cnfn convert_uchar3_rtn(float3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(float3); +uchar3 __ovld __cnfn convert_uchar3(float3); +uchar3 __ovld __cnfn convert_uchar3_sat(float3); +short3 __ovld __cnfn convert_short3_rte(char3); +short3 __ovld __cnfn convert_short3_sat_rte(char3); +short3 __ovld __cnfn convert_short3_rtz(char3); +short3 __ovld __cnfn convert_short3_sat_rtz(char3); +short3 __ovld __cnfn convert_short3_rtp(char3); +short3 __ovld __cnfn convert_short3_sat_rtp(char3); +short3 __ovld __cnfn convert_short3_rtn(char3); +short3 __ovld __cnfn convert_short3_sat_rtn(char3); +short3 __ovld __cnfn convert_short3(char3); +short3 __ovld __cnfn convert_short3_sat(char3); +short3 __ovld __cnfn convert_short3_rte(uchar3); +short3 __ovld __cnfn convert_short3_sat_rte(uchar3); +short3 __ovld __cnfn convert_short3_rtz(uchar3); +short3 __ovld __cnfn convert_short3_sat_rtz(uchar3); +short3 __ovld __cnfn convert_short3_rtp(uchar3); +short3 __ovld __cnfn convert_short3_sat_rtp(uchar3); +short3 __ovld __cnfn convert_short3_rtn(uchar3); +short3 __ovld __cnfn convert_short3_sat_rtn(uchar3); +short3 __ovld __cnfn convert_short3(uchar3); +short3 __ovld __cnfn convert_short3_sat(uchar3); +short3 __ovld __cnfn convert_short3_rte(short3); +short3 __ovld __cnfn convert_short3_sat_rte(short3); +short3 __ovld __cnfn convert_short3_rtz(short3); +short3 __ovld __cnfn convert_short3_sat_rtz(short3); +short3 __ovld __cnfn convert_short3_rtp(short3); +short3 __ovld __cnfn convert_short3_sat_rtp(short3); +short3 __ovld __cnfn convert_short3_rtn(short3); +short3 __ovld __cnfn convert_short3_sat_rtn(short3); +short3 __ovld __cnfn convert_short3(short3); +short3 __ovld __cnfn convert_short3_sat(short3); +short3 __ovld __cnfn convert_short3_rte(ushort3); +short3 __ovld __cnfn convert_short3_sat_rte(ushort3); +short3 __ovld __cnfn convert_short3_rtz(ushort3); +short3 __ovld __cnfn convert_short3_sat_rtz(ushort3); +short3 __ovld __cnfn convert_short3_rtp(ushort3); +short3 __ovld __cnfn convert_short3_sat_rtp(ushort3); +short3 __ovld __cnfn convert_short3_rtn(ushort3); +short3 __ovld __cnfn convert_short3_sat_rtn(ushort3); +short3 __ovld __cnfn convert_short3(ushort3); +short3 __ovld __cnfn convert_short3_sat(ushort3); +short3 __ovld __cnfn convert_short3_rte(int3); +short3 __ovld __cnfn convert_short3_sat_rte(int3); +short3 __ovld __cnfn convert_short3_rtz(int3); +short3 __ovld __cnfn convert_short3_sat_rtz(int3); +short3 __ovld __cnfn convert_short3_rtp(int3); +short3 __ovld __cnfn convert_short3_sat_rtp(int3); +short3 __ovld __cnfn convert_short3_rtn(int3); +short3 __ovld __cnfn convert_short3_sat_rtn(int3); +short3 __ovld __cnfn convert_short3(int3); +short3 __ovld __cnfn convert_short3_sat(int3); +short3 __ovld __cnfn convert_short3_rte(uint3); +short3 __ovld __cnfn convert_short3_sat_rte(uint3); +short3 __ovld __cnfn convert_short3_rtz(uint3); +short3 __ovld __cnfn convert_short3_sat_rtz(uint3); +short3 __ovld __cnfn convert_short3_rtp(uint3); +short3 __ovld __cnfn convert_short3_sat_rtp(uint3); +short3 __ovld __cnfn convert_short3_rtn(uint3); +short3 __ovld __cnfn convert_short3_sat_rtn(uint3); +short3 __ovld __cnfn convert_short3(uint3); +short3 __ovld __cnfn convert_short3_sat(uint3); +short3 __ovld __cnfn convert_short3_rte(long3); +short3 __ovld __cnfn convert_short3_sat_rte(long3); +short3 __ovld __cnfn convert_short3_rtz(long3); +short3 __ovld __cnfn convert_short3_sat_rtz(long3); +short3 __ovld __cnfn convert_short3_rtp(long3); +short3 __ovld __cnfn convert_short3_sat_rtp(long3); +short3 __ovld __cnfn convert_short3_rtn(long3); +short3 __ovld __cnfn convert_short3_sat_rtn(long3); +short3 __ovld __cnfn convert_short3(long3); +short3 __ovld __cnfn convert_short3_sat(long3); +short3 __ovld __cnfn convert_short3_rte(ulong3); +short3 __ovld __cnfn convert_short3_sat_rte(ulong3); +short3 __ovld __cnfn convert_short3_rtz(ulong3); +short3 __ovld __cnfn convert_short3_sat_rtz(ulong3); +short3 __ovld __cnfn convert_short3_rtp(ulong3); +short3 __ovld __cnfn convert_short3_sat_rtp(ulong3); +short3 __ovld __cnfn convert_short3_rtn(ulong3); +short3 __ovld __cnfn convert_short3_sat_rtn(ulong3); +short3 __ovld __cnfn convert_short3(ulong3); +short3 __ovld __cnfn convert_short3_sat(ulong3); +short3 __ovld __cnfn convert_short3_rte(float3); +short3 __ovld __cnfn convert_short3_sat_rte(float3); +short3 __ovld __cnfn convert_short3_rtz(float3); +short3 __ovld __cnfn convert_short3_sat_rtz(float3); +short3 __ovld __cnfn convert_short3_rtp(float3); +short3 __ovld __cnfn convert_short3_sat_rtp(float3); +short3 __ovld __cnfn convert_short3_rtn(float3); +short3 __ovld __cnfn convert_short3_sat_rtn(float3); +short3 __ovld __cnfn convert_short3(float3); +short3 __ovld __cnfn convert_short3_sat(float3); +ushort3 __ovld __cnfn convert_ushort3_rte(char3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(char3); +ushort3 __ovld __cnfn convert_ushort3_rtz(char3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(char3); +ushort3 __ovld __cnfn convert_ushort3_rtp(char3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(char3); +ushort3 __ovld __cnfn convert_ushort3_rtn(char3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(char3); +ushort3 __ovld __cnfn convert_ushort3(char3); +ushort3 __ovld __cnfn convert_ushort3_sat(char3); +ushort3 __ovld __cnfn convert_ushort3_rte(uchar3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(uchar3); +ushort3 __ovld __cnfn convert_ushort3_rtz(uchar3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(uchar3); +ushort3 __ovld __cnfn convert_ushort3_rtp(uchar3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(uchar3); +ushort3 __ovld __cnfn convert_ushort3_rtn(uchar3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(uchar3); +ushort3 __ovld __cnfn convert_ushort3(uchar3); +ushort3 __ovld __cnfn convert_ushort3_sat(uchar3); +ushort3 __ovld __cnfn convert_ushort3_rte(short3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(short3); +ushort3 __ovld __cnfn convert_ushort3_rtz(short3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(short3); +ushort3 __ovld __cnfn convert_ushort3_rtp(short3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(short3); +ushort3 __ovld __cnfn convert_ushort3_rtn(short3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(short3); +ushort3 __ovld __cnfn convert_ushort3(short3); +ushort3 __ovld __cnfn convert_ushort3_sat(short3); +ushort3 __ovld __cnfn convert_ushort3_rte(ushort3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(ushort3); +ushort3 __ovld __cnfn convert_ushort3_rtz(ushort3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(ushort3); +ushort3 __ovld __cnfn convert_ushort3_rtp(ushort3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(ushort3); +ushort3 __ovld __cnfn convert_ushort3_rtn(ushort3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(ushort3); +ushort3 __ovld __cnfn convert_ushort3(ushort3); +ushort3 __ovld __cnfn convert_ushort3_sat(ushort3); +ushort3 __ovld __cnfn convert_ushort3_rte(int3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(int3); +ushort3 __ovld __cnfn convert_ushort3_rtz(int3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(int3); +ushort3 __ovld __cnfn convert_ushort3_rtp(int3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(int3); +ushort3 __ovld __cnfn convert_ushort3_rtn(int3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(int3); +ushort3 __ovld __cnfn convert_ushort3(int3); +ushort3 __ovld __cnfn convert_ushort3_sat(int3); +ushort3 __ovld __cnfn convert_ushort3_rte(uint3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(uint3); +ushort3 __ovld __cnfn convert_ushort3_rtz(uint3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(uint3); +ushort3 __ovld __cnfn convert_ushort3_rtp(uint3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(uint3); +ushort3 __ovld __cnfn convert_ushort3_rtn(uint3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(uint3); +ushort3 __ovld __cnfn convert_ushort3(uint3); +ushort3 __ovld __cnfn convert_ushort3_sat(uint3); +ushort3 __ovld __cnfn convert_ushort3_rte(long3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(long3); +ushort3 __ovld __cnfn convert_ushort3_rtz(long3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(long3); +ushort3 __ovld __cnfn convert_ushort3_rtp(long3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(long3); +ushort3 __ovld __cnfn convert_ushort3_rtn(long3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(long3); +ushort3 __ovld __cnfn convert_ushort3(long3); +ushort3 __ovld __cnfn convert_ushort3_sat(long3); +ushort3 __ovld __cnfn convert_ushort3_rte(ulong3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(ulong3); +ushort3 __ovld __cnfn convert_ushort3_rtz(ulong3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(ulong3); +ushort3 __ovld __cnfn convert_ushort3_rtp(ulong3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(ulong3); +ushort3 __ovld __cnfn convert_ushort3_rtn(ulong3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(ulong3); +ushort3 __ovld __cnfn convert_ushort3(ulong3); +ushort3 __ovld __cnfn convert_ushort3_sat(ulong3); +ushort3 __ovld __cnfn convert_ushort3_rte(float3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(float3); +ushort3 __ovld __cnfn convert_ushort3_rtz(float3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(float3); +ushort3 __ovld __cnfn convert_ushort3_rtp(float3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(float3); +ushort3 __ovld __cnfn convert_ushort3_rtn(float3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(float3); +ushort3 __ovld __cnfn convert_ushort3(float3); +ushort3 __ovld __cnfn convert_ushort3_sat(float3); +int3 __ovld __cnfn convert_int3_rte(char3); +int3 __ovld __cnfn convert_int3_sat_rte(char3); +int3 __ovld __cnfn convert_int3_rtz(char3); +int3 __ovld __cnfn convert_int3_sat_rtz(char3); +int3 __ovld __cnfn convert_int3_rtp(char3); +int3 __ovld __cnfn convert_int3_sat_rtp(char3); +int3 __ovld __cnfn convert_int3_rtn(char3); +int3 __ovld __cnfn convert_int3_sat_rtn(char3); +int3 __ovld __cnfn convert_int3(char3); +int3 __ovld __cnfn convert_int3_sat(char3); +int3 __ovld __cnfn convert_int3_rte(uchar3); +int3 __ovld __cnfn convert_int3_sat_rte(uchar3); +int3 __ovld __cnfn convert_int3_rtz(uchar3); +int3 __ovld __cnfn convert_int3_sat_rtz(uchar3); +int3 __ovld __cnfn convert_int3_rtp(uchar3); +int3 __ovld __cnfn convert_int3_sat_rtp(uchar3); +int3 __ovld __cnfn convert_int3_rtn(uchar3); +int3 __ovld __cnfn convert_int3_sat_rtn(uchar3); +int3 __ovld __cnfn convert_int3(uchar3); +int3 __ovld __cnfn convert_int3_sat(uchar3); +int3 __ovld __cnfn convert_int3_rte(short3); +int3 __ovld __cnfn convert_int3_sat_rte(short3); +int3 __ovld __cnfn convert_int3_rtz(short3); +int3 __ovld __cnfn convert_int3_sat_rtz(short3); +int3 __ovld __cnfn convert_int3_rtp(short3); +int3 __ovld __cnfn convert_int3_sat_rtp(short3); +int3 __ovld __cnfn convert_int3_rtn(short3); +int3 __ovld __cnfn convert_int3_sat_rtn(short3); +int3 __ovld __cnfn convert_int3(short3); +int3 __ovld __cnfn convert_int3_sat(short3); +int3 __ovld __cnfn convert_int3_rte(ushort3); +int3 __ovld __cnfn convert_int3_sat_rte(ushort3); +int3 __ovld __cnfn convert_int3_rtz(ushort3); +int3 __ovld __cnfn convert_int3_sat_rtz(ushort3); +int3 __ovld __cnfn convert_int3_rtp(ushort3); +int3 __ovld __cnfn convert_int3_sat_rtp(ushort3); +int3 __ovld __cnfn convert_int3_rtn(ushort3); +int3 __ovld __cnfn convert_int3_sat_rtn(ushort3); +int3 __ovld __cnfn convert_int3(ushort3); +int3 __ovld __cnfn convert_int3_sat(ushort3); +int3 __ovld __cnfn convert_int3_rte(int3); +int3 __ovld __cnfn convert_int3_sat_rte(int3); +int3 __ovld __cnfn convert_int3_rtz(int3); +int3 __ovld __cnfn convert_int3_sat_rtz(int3); +int3 __ovld __cnfn convert_int3_rtp(int3); +int3 __ovld __cnfn convert_int3_sat_rtp(int3); +int3 __ovld __cnfn convert_int3_rtn(int3); +int3 __ovld __cnfn convert_int3_sat_rtn(int3); +int3 __ovld __cnfn convert_int3(int3); +int3 __ovld __cnfn convert_int3_sat(int3); +int3 __ovld __cnfn convert_int3_rte(uint3); +int3 __ovld __cnfn convert_int3_sat_rte(uint3); +int3 __ovld __cnfn convert_int3_rtz(uint3); +int3 __ovld __cnfn convert_int3_sat_rtz(uint3); +int3 __ovld __cnfn convert_int3_rtp(uint3); +int3 __ovld __cnfn convert_int3_sat_rtp(uint3); +int3 __ovld __cnfn convert_int3_rtn(uint3); +int3 __ovld __cnfn convert_int3_sat_rtn(uint3); +int3 __ovld __cnfn convert_int3(uint3); +int3 __ovld __cnfn convert_int3_sat(uint3); +int3 __ovld __cnfn convert_int3_rte(long3); +int3 __ovld __cnfn convert_int3_sat_rte(long3); +int3 __ovld __cnfn convert_int3_rtz(long3); +int3 __ovld __cnfn convert_int3_sat_rtz(long3); +int3 __ovld __cnfn convert_int3_rtp(long3); +int3 __ovld __cnfn convert_int3_sat_rtp(long3); +int3 __ovld __cnfn convert_int3_rtn(long3); +int3 __ovld __cnfn convert_int3_sat_rtn(long3); +int3 __ovld __cnfn convert_int3(long3); +int3 __ovld __cnfn convert_int3_sat(long3); +int3 __ovld __cnfn convert_int3_rte(ulong3); +int3 __ovld __cnfn convert_int3_sat_rte(ulong3); +int3 __ovld __cnfn convert_int3_rtz(ulong3); +int3 __ovld __cnfn convert_int3_sat_rtz(ulong3); +int3 __ovld __cnfn convert_int3_rtp(ulong3); +int3 __ovld __cnfn convert_int3_sat_rtp(ulong3); +int3 __ovld __cnfn convert_int3_rtn(ulong3); +int3 __ovld __cnfn convert_int3_sat_rtn(ulong3); +int3 __ovld __cnfn convert_int3(ulong3); +int3 __ovld __cnfn convert_int3_sat(ulong3); +int3 __ovld __cnfn convert_int3_rte(float3); +int3 __ovld __cnfn convert_int3_sat_rte(float3); +int3 __ovld __cnfn convert_int3_rtz(float3); +int3 __ovld __cnfn convert_int3_sat_rtz(float3); +int3 __ovld __cnfn convert_int3_rtp(float3); +int3 __ovld __cnfn convert_int3_sat_rtp(float3); +int3 __ovld __cnfn convert_int3_rtn(float3); +int3 __ovld __cnfn convert_int3_sat_rtn(float3); +int3 __ovld __cnfn convert_int3(float3); +int3 __ovld __cnfn convert_int3_sat(float3); +uint3 __ovld __cnfn convert_uint3_rte(char3); +uint3 __ovld __cnfn convert_uint3_sat_rte(char3); +uint3 __ovld __cnfn convert_uint3_rtz(char3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(char3); +uint3 __ovld __cnfn convert_uint3_rtp(char3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(char3); +uint3 __ovld __cnfn convert_uint3_rtn(char3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(char3); +uint3 __ovld __cnfn convert_uint3(char3); +uint3 __ovld __cnfn convert_uint3_sat(char3); +uint3 __ovld __cnfn convert_uint3_rte(uchar3); +uint3 __ovld __cnfn convert_uint3_sat_rte(uchar3); +uint3 __ovld __cnfn convert_uint3_rtz(uchar3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(uchar3); +uint3 __ovld __cnfn convert_uint3_rtp(uchar3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(uchar3); +uint3 __ovld __cnfn convert_uint3_rtn(uchar3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(uchar3); +uint3 __ovld __cnfn convert_uint3(uchar3); +uint3 __ovld __cnfn convert_uint3_sat(uchar3); +uint3 __ovld __cnfn convert_uint3_rte(short3); +uint3 __ovld __cnfn convert_uint3_sat_rte(short3); +uint3 __ovld __cnfn convert_uint3_rtz(short3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(short3); +uint3 __ovld __cnfn convert_uint3_rtp(short3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(short3); +uint3 __ovld __cnfn convert_uint3_rtn(short3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(short3); +uint3 __ovld __cnfn convert_uint3(short3); +uint3 __ovld __cnfn convert_uint3_sat(short3); +uint3 __ovld __cnfn convert_uint3_rte(ushort3); +uint3 __ovld __cnfn convert_uint3_sat_rte(ushort3); +uint3 __ovld __cnfn convert_uint3_rtz(ushort3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(ushort3); +uint3 __ovld __cnfn convert_uint3_rtp(ushort3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(ushort3); +uint3 __ovld __cnfn convert_uint3_rtn(ushort3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(ushort3); +uint3 __ovld __cnfn convert_uint3(ushort3); +uint3 __ovld __cnfn convert_uint3_sat(ushort3); +uint3 __ovld __cnfn convert_uint3_rte(int3); +uint3 __ovld __cnfn convert_uint3_sat_rte(int3); +uint3 __ovld __cnfn convert_uint3_rtz(int3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(int3); +uint3 __ovld __cnfn convert_uint3_rtp(int3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(int3); +uint3 __ovld __cnfn convert_uint3_rtn(int3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(int3); +uint3 __ovld __cnfn convert_uint3(int3); +uint3 __ovld __cnfn convert_uint3_sat(int3); +uint3 __ovld __cnfn convert_uint3_rte(uint3); +uint3 __ovld __cnfn convert_uint3_sat_rte(uint3); +uint3 __ovld __cnfn convert_uint3_rtz(uint3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(uint3); +uint3 __ovld __cnfn convert_uint3_rtp(uint3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(uint3); +uint3 __ovld __cnfn convert_uint3_rtn(uint3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(uint3); +uint3 __ovld __cnfn convert_uint3(uint3); +uint3 __ovld __cnfn convert_uint3_sat(uint3); +uint3 __ovld __cnfn convert_uint3_rte(long3); +uint3 __ovld __cnfn convert_uint3_sat_rte(long3); +uint3 __ovld __cnfn convert_uint3_rtz(long3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(long3); +uint3 __ovld __cnfn convert_uint3_rtp(long3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(long3); +uint3 __ovld __cnfn convert_uint3_rtn(long3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(long3); +uint3 __ovld __cnfn convert_uint3(long3); +uint3 __ovld __cnfn convert_uint3_sat(long3); +uint3 __ovld __cnfn convert_uint3_rte(ulong3); +uint3 __ovld __cnfn convert_uint3_sat_rte(ulong3); +uint3 __ovld __cnfn convert_uint3_rtz(ulong3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(ulong3); +uint3 __ovld __cnfn convert_uint3_rtp(ulong3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(ulong3); +uint3 __ovld __cnfn convert_uint3_rtn(ulong3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(ulong3); +uint3 __ovld __cnfn convert_uint3(ulong3); +uint3 __ovld __cnfn convert_uint3_sat(ulong3); +uint3 __ovld __cnfn convert_uint3_rte(float3); +uint3 __ovld __cnfn convert_uint3_sat_rte(float3); +uint3 __ovld __cnfn convert_uint3_rtz(float3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(float3); +uint3 __ovld __cnfn convert_uint3_rtp(float3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(float3); +uint3 __ovld __cnfn convert_uint3_rtn(float3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(float3); +uint3 __ovld __cnfn convert_uint3(float3); +uint3 __ovld __cnfn convert_uint3_sat(float3); +long3 __ovld __cnfn convert_long3_rte(char3); +long3 __ovld __cnfn convert_long3_sat_rte(char3); +long3 __ovld __cnfn convert_long3_rtz(char3); +long3 __ovld __cnfn convert_long3_sat_rtz(char3); +long3 __ovld __cnfn convert_long3_rtp(char3); +long3 __ovld __cnfn convert_long3_sat_rtp(char3); +long3 __ovld __cnfn convert_long3_rtn(char3); +long3 __ovld __cnfn convert_long3_sat_rtn(char3); +long3 __ovld __cnfn convert_long3(char3); +long3 __ovld __cnfn convert_long3_sat(char3); +long3 __ovld __cnfn convert_long3_rte(uchar3); +long3 __ovld __cnfn convert_long3_sat_rte(uchar3); +long3 __ovld __cnfn convert_long3_rtz(uchar3); +long3 __ovld __cnfn convert_long3_sat_rtz(uchar3); +long3 __ovld __cnfn convert_long3_rtp(uchar3); +long3 __ovld __cnfn convert_long3_sat_rtp(uchar3); +long3 __ovld __cnfn convert_long3_rtn(uchar3); +long3 __ovld __cnfn convert_long3_sat_rtn(uchar3); +long3 __ovld __cnfn convert_long3(uchar3); +long3 __ovld __cnfn convert_long3_sat(uchar3); +long3 __ovld __cnfn convert_long3_rte(short3); +long3 __ovld __cnfn convert_long3_sat_rte(short3); +long3 __ovld __cnfn convert_long3_rtz(short3); +long3 __ovld __cnfn convert_long3_sat_rtz(short3); +long3 __ovld __cnfn convert_long3_rtp(short3); +long3 __ovld __cnfn convert_long3_sat_rtp(short3); +long3 __ovld __cnfn convert_long3_rtn(short3); +long3 __ovld __cnfn convert_long3_sat_rtn(short3); +long3 __ovld __cnfn convert_long3(short3); +long3 __ovld __cnfn convert_long3_sat(short3); +long3 __ovld __cnfn convert_long3_rte(ushort3); +long3 __ovld __cnfn convert_long3_sat_rte(ushort3); +long3 __ovld __cnfn convert_long3_rtz(ushort3); +long3 __ovld __cnfn convert_long3_sat_rtz(ushort3); +long3 __ovld __cnfn convert_long3_rtp(ushort3); +long3 __ovld __cnfn convert_long3_sat_rtp(ushort3); +long3 __ovld __cnfn convert_long3_rtn(ushort3); +long3 __ovld __cnfn convert_long3_sat_rtn(ushort3); +long3 __ovld __cnfn convert_long3(ushort3); +long3 __ovld __cnfn convert_long3_sat(ushort3); +long3 __ovld __cnfn convert_long3_rte(int3); +long3 __ovld __cnfn convert_long3_sat_rte(int3); +long3 __ovld __cnfn convert_long3_rtz(int3); +long3 __ovld __cnfn convert_long3_sat_rtz(int3); +long3 __ovld __cnfn convert_long3_rtp(int3); +long3 __ovld __cnfn convert_long3_sat_rtp(int3); +long3 __ovld __cnfn convert_long3_rtn(int3); +long3 __ovld __cnfn convert_long3_sat_rtn(int3); +long3 __ovld __cnfn convert_long3(int3); +long3 __ovld __cnfn convert_long3_sat(int3); +long3 __ovld __cnfn convert_long3_rte(uint3); +long3 __ovld __cnfn convert_long3_sat_rte(uint3); +long3 __ovld __cnfn convert_long3_rtz(uint3); +long3 __ovld __cnfn convert_long3_sat_rtz(uint3); +long3 __ovld __cnfn convert_long3_rtp(uint3); +long3 __ovld __cnfn convert_long3_sat_rtp(uint3); +long3 __ovld __cnfn convert_long3_rtn(uint3); +long3 __ovld __cnfn convert_long3_sat_rtn(uint3); +long3 __ovld __cnfn convert_long3(uint3); +long3 __ovld __cnfn convert_long3_sat(uint3); +long3 __ovld __cnfn convert_long3_rte(long3); +long3 __ovld __cnfn convert_long3_sat_rte(long3); +long3 __ovld __cnfn convert_long3_rtz(long3); +long3 __ovld __cnfn convert_long3_sat_rtz(long3); +long3 __ovld __cnfn convert_long3_rtp(long3); +long3 __ovld __cnfn convert_long3_sat_rtp(long3); +long3 __ovld __cnfn convert_long3_rtn(long3); +long3 __ovld __cnfn convert_long3_sat_rtn(long3); +long3 __ovld __cnfn convert_long3(long3); +long3 __ovld __cnfn convert_long3_sat(long3); +long3 __ovld __cnfn convert_long3_rte(ulong3); +long3 __ovld __cnfn convert_long3_sat_rte(ulong3); +long3 __ovld __cnfn convert_long3_rtz(ulong3); +long3 __ovld __cnfn convert_long3_sat_rtz(ulong3); +long3 __ovld __cnfn convert_long3_rtp(ulong3); +long3 __ovld __cnfn convert_long3_sat_rtp(ulong3); +long3 __ovld __cnfn convert_long3_rtn(ulong3); +long3 __ovld __cnfn convert_long3_sat_rtn(ulong3); +long3 __ovld __cnfn convert_long3(ulong3); +long3 __ovld __cnfn convert_long3_sat(ulong3); +long3 __ovld __cnfn convert_long3_rte(float3); +long3 __ovld __cnfn convert_long3_sat_rte(float3); +long3 __ovld __cnfn convert_long3_rtz(float3); +long3 __ovld __cnfn convert_long3_sat_rtz(float3); +long3 __ovld __cnfn convert_long3_rtp(float3); +long3 __ovld __cnfn convert_long3_sat_rtp(float3); +long3 __ovld __cnfn convert_long3_rtn(float3); +long3 __ovld __cnfn convert_long3_sat_rtn(float3); +long3 __ovld __cnfn convert_long3(float3); +long3 __ovld __cnfn convert_long3_sat(float3); +ulong3 __ovld __cnfn convert_ulong3_rte(char3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(char3); +ulong3 __ovld __cnfn convert_ulong3_rtz(char3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(char3); +ulong3 __ovld __cnfn convert_ulong3_rtp(char3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(char3); +ulong3 __ovld __cnfn convert_ulong3_rtn(char3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(char3); +ulong3 __ovld __cnfn convert_ulong3(char3); +ulong3 __ovld __cnfn convert_ulong3_sat(char3); +ulong3 __ovld __cnfn convert_ulong3_rte(uchar3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(uchar3); +ulong3 __ovld __cnfn convert_ulong3_rtz(uchar3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(uchar3); +ulong3 __ovld __cnfn convert_ulong3_rtp(uchar3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(uchar3); +ulong3 __ovld __cnfn convert_ulong3_rtn(uchar3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(uchar3); +ulong3 __ovld __cnfn convert_ulong3(uchar3); +ulong3 __ovld __cnfn convert_ulong3_sat(uchar3); +ulong3 __ovld __cnfn convert_ulong3_rte(short3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(short3); +ulong3 __ovld __cnfn convert_ulong3_rtz(short3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(short3); +ulong3 __ovld __cnfn convert_ulong3_rtp(short3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(short3); +ulong3 __ovld __cnfn convert_ulong3_rtn(short3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(short3); +ulong3 __ovld __cnfn convert_ulong3(short3); +ulong3 __ovld __cnfn convert_ulong3_sat(short3); +ulong3 __ovld __cnfn convert_ulong3_rte(ushort3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(ushort3); +ulong3 __ovld __cnfn convert_ulong3_rtz(ushort3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(ushort3); +ulong3 __ovld __cnfn convert_ulong3_rtp(ushort3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(ushort3); +ulong3 __ovld __cnfn convert_ulong3_rtn(ushort3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(ushort3); +ulong3 __ovld __cnfn convert_ulong3(ushort3); +ulong3 __ovld __cnfn convert_ulong3_sat(ushort3); +ulong3 __ovld __cnfn convert_ulong3_rte(int3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(int3); +ulong3 __ovld __cnfn convert_ulong3_rtz(int3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(int3); +ulong3 __ovld __cnfn convert_ulong3_rtp(int3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(int3); +ulong3 __ovld __cnfn convert_ulong3_rtn(int3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(int3); +ulong3 __ovld __cnfn convert_ulong3(int3); +ulong3 __ovld __cnfn convert_ulong3_sat(int3); +ulong3 __ovld __cnfn convert_ulong3_rte(uint3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(uint3); +ulong3 __ovld __cnfn convert_ulong3_rtz(uint3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(uint3); +ulong3 __ovld __cnfn convert_ulong3_rtp(uint3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(uint3); +ulong3 __ovld __cnfn convert_ulong3_rtn(uint3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(uint3); +ulong3 __ovld __cnfn convert_ulong3(uint3); +ulong3 __ovld __cnfn convert_ulong3_sat(uint3); +ulong3 __ovld __cnfn convert_ulong3_rte(long3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(long3); +ulong3 __ovld __cnfn convert_ulong3_rtz(long3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(long3); +ulong3 __ovld __cnfn convert_ulong3_rtp(long3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(long3); +ulong3 __ovld __cnfn convert_ulong3_rtn(long3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(long3); +ulong3 __ovld __cnfn convert_ulong3(long3); +ulong3 __ovld __cnfn convert_ulong3_sat(long3); +ulong3 __ovld __cnfn convert_ulong3_rte(ulong3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(ulong3); +ulong3 __ovld __cnfn convert_ulong3_rtz(ulong3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(ulong3); +ulong3 __ovld __cnfn convert_ulong3_rtp(ulong3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(ulong3); +ulong3 __ovld __cnfn convert_ulong3_rtn(ulong3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(ulong3); +ulong3 __ovld __cnfn convert_ulong3(ulong3); +ulong3 __ovld __cnfn convert_ulong3_sat(ulong3); +ulong3 __ovld __cnfn convert_ulong3_rte(float3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(float3); +ulong3 __ovld __cnfn convert_ulong3_rtz(float3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(float3); +ulong3 __ovld __cnfn convert_ulong3_rtp(float3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(float3); +ulong3 __ovld __cnfn convert_ulong3_rtn(float3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(float3); +ulong3 __ovld __cnfn convert_ulong3(float3); +ulong3 __ovld __cnfn convert_ulong3_sat(float3); +float3 __ovld __cnfn convert_float3_rte(char3); +float3 __ovld __cnfn convert_float3_rtz(char3); +float3 __ovld __cnfn convert_float3_rtp(char3); +float3 __ovld __cnfn convert_float3_rtn(char3); +float3 __ovld __cnfn convert_float3(char3); +float3 __ovld __cnfn convert_float3_rte(uchar3); +float3 __ovld __cnfn convert_float3_rtz(uchar3); +float3 __ovld __cnfn convert_float3_rtp(uchar3); +float3 __ovld __cnfn convert_float3_rtn(uchar3); +float3 __ovld __cnfn convert_float3(uchar3); +float3 __ovld __cnfn convert_float3_rte(short3); +float3 __ovld __cnfn convert_float3_rtz(short3); +float3 __ovld __cnfn convert_float3_rtp(short3); +float3 __ovld __cnfn convert_float3_rtn(short3); +float3 __ovld __cnfn convert_float3(short3); +float3 __ovld __cnfn convert_float3_rte(ushort3); +float3 __ovld __cnfn convert_float3_rtz(ushort3); +float3 __ovld __cnfn convert_float3_rtp(ushort3); +float3 __ovld __cnfn convert_float3_rtn(ushort3); +float3 __ovld __cnfn convert_float3(ushort3); +float3 __ovld __cnfn convert_float3_rte(int3); +float3 __ovld __cnfn convert_float3_rtz(int3); +float3 __ovld __cnfn convert_float3_rtp(int3); +float3 __ovld __cnfn convert_float3_rtn(int3); +float3 __ovld __cnfn convert_float3(int3); +float3 __ovld __cnfn convert_float3_rte(uint3); +float3 __ovld __cnfn convert_float3_rtz(uint3); +float3 __ovld __cnfn convert_float3_rtp(uint3); +float3 __ovld __cnfn convert_float3_rtn(uint3); +float3 __ovld __cnfn convert_float3(uint3); +float3 __ovld __cnfn convert_float3_rte(long3); +float3 __ovld __cnfn convert_float3_rtz(long3); +float3 __ovld __cnfn convert_float3_rtp(long3); +float3 __ovld __cnfn convert_float3_rtn(long3); +float3 __ovld __cnfn convert_float3(long3); +float3 __ovld __cnfn convert_float3_rte(ulong3); +float3 __ovld __cnfn convert_float3_rtz(ulong3); +float3 __ovld __cnfn convert_float3_rtp(ulong3); +float3 __ovld __cnfn convert_float3_rtn(ulong3); +float3 __ovld __cnfn convert_float3(ulong3); +float3 __ovld __cnfn convert_float3_rte(float3); +float3 __ovld __cnfn convert_float3_rtz(float3); +float3 __ovld __cnfn convert_float3_rtp(float3); +float3 __ovld __cnfn convert_float3_rtn(float3); +float3 __ovld __cnfn convert_float3(float3); +char4 __ovld __cnfn convert_char4_rte(char4); +char4 __ovld __cnfn convert_char4_sat_rte(char4); +char4 __ovld __cnfn convert_char4_rtz(char4); +char4 __ovld __cnfn convert_char4_sat_rtz(char4); +char4 __ovld __cnfn convert_char4_rtp(char4); +char4 __ovld __cnfn convert_char4_sat_rtp(char4); +char4 __ovld __cnfn convert_char4_rtn(char4); +char4 __ovld __cnfn convert_char4_sat_rtn(char4); +char4 __ovld __cnfn convert_char4(char4); +char4 __ovld __cnfn convert_char4_sat(char4); +char4 __ovld __cnfn convert_char4_rte(uchar4); +char4 __ovld __cnfn convert_char4_sat_rte(uchar4); +char4 __ovld __cnfn convert_char4_rtz(uchar4); +char4 __ovld __cnfn convert_char4_sat_rtz(uchar4); +char4 __ovld __cnfn convert_char4_rtp(uchar4); +char4 __ovld __cnfn convert_char4_sat_rtp(uchar4); +char4 __ovld __cnfn convert_char4_rtn(uchar4); +char4 __ovld __cnfn convert_char4_sat_rtn(uchar4); +char4 __ovld __cnfn convert_char4(uchar4); +char4 __ovld __cnfn convert_char4_sat(uchar4); +char4 __ovld __cnfn convert_char4_rte(short4); +char4 __ovld __cnfn convert_char4_sat_rte(short4); +char4 __ovld __cnfn convert_char4_rtz(short4); +char4 __ovld __cnfn convert_char4_sat_rtz(short4); +char4 __ovld __cnfn convert_char4_rtp(short4); +char4 __ovld __cnfn convert_char4_sat_rtp(short4); +char4 __ovld __cnfn convert_char4_rtn(short4); +char4 __ovld __cnfn convert_char4_sat_rtn(short4); +char4 __ovld __cnfn convert_char4(short4); +char4 __ovld __cnfn convert_char4_sat(short4); +char4 __ovld __cnfn convert_char4_rte(ushort4); +char4 __ovld __cnfn convert_char4_sat_rte(ushort4); +char4 __ovld __cnfn convert_char4_rtz(ushort4); +char4 __ovld __cnfn convert_char4_sat_rtz(ushort4); +char4 __ovld __cnfn convert_char4_rtp(ushort4); +char4 __ovld __cnfn convert_char4_sat_rtp(ushort4); +char4 __ovld __cnfn convert_char4_rtn(ushort4); +char4 __ovld __cnfn convert_char4_sat_rtn(ushort4); +char4 __ovld __cnfn convert_char4(ushort4); +char4 __ovld __cnfn convert_char4_sat(ushort4); +char4 __ovld __cnfn convert_char4_rte(int4); +char4 __ovld __cnfn convert_char4_sat_rte(int4); +char4 __ovld __cnfn convert_char4_rtz(int4); +char4 __ovld __cnfn convert_char4_sat_rtz(int4); +char4 __ovld __cnfn convert_char4_rtp(int4); +char4 __ovld __cnfn convert_char4_sat_rtp(int4); +char4 __ovld __cnfn convert_char4_rtn(int4); +char4 __ovld __cnfn convert_char4_sat_rtn(int4); +char4 __ovld __cnfn convert_char4(int4); +char4 __ovld __cnfn convert_char4_sat(int4); +char4 __ovld __cnfn convert_char4_rte(uint4); +char4 __ovld __cnfn convert_char4_sat_rte(uint4); +char4 __ovld __cnfn convert_char4_rtz(uint4); +char4 __ovld __cnfn convert_char4_sat_rtz(uint4); +char4 __ovld __cnfn convert_char4_rtp(uint4); +char4 __ovld __cnfn convert_char4_sat_rtp(uint4); +char4 __ovld __cnfn convert_char4_rtn(uint4); +char4 __ovld __cnfn convert_char4_sat_rtn(uint4); +char4 __ovld __cnfn convert_char4(uint4); +char4 __ovld __cnfn convert_char4_sat(uint4); +char4 __ovld __cnfn convert_char4_rte(long4); +char4 __ovld __cnfn convert_char4_sat_rte(long4); +char4 __ovld __cnfn convert_char4_rtz(long4); +char4 __ovld __cnfn convert_char4_sat_rtz(long4); +char4 __ovld __cnfn convert_char4_rtp(long4); +char4 __ovld __cnfn convert_char4_sat_rtp(long4); +char4 __ovld __cnfn convert_char4_rtn(long4); +char4 __ovld __cnfn convert_char4_sat_rtn(long4); +char4 __ovld __cnfn convert_char4(long4); +char4 __ovld __cnfn convert_char4_sat(long4); +char4 __ovld __cnfn convert_char4_rte(ulong4); +char4 __ovld __cnfn convert_char4_sat_rte(ulong4); +char4 __ovld __cnfn convert_char4_rtz(ulong4); +char4 __ovld __cnfn convert_char4_sat_rtz(ulong4); +char4 __ovld __cnfn convert_char4_rtp(ulong4); +char4 __ovld __cnfn convert_char4_sat_rtp(ulong4); +char4 __ovld __cnfn convert_char4_rtn(ulong4); +char4 __ovld __cnfn convert_char4_sat_rtn(ulong4); +char4 __ovld __cnfn convert_char4(ulong4); +char4 __ovld __cnfn convert_char4_sat(ulong4); +char4 __ovld __cnfn convert_char4_rte(float4); +char4 __ovld __cnfn convert_char4_sat_rte(float4); +char4 __ovld __cnfn convert_char4_rtz(float4); +char4 __ovld __cnfn convert_char4_sat_rtz(float4); +char4 __ovld __cnfn convert_char4_rtp(float4); +char4 __ovld __cnfn convert_char4_sat_rtp(float4); +char4 __ovld __cnfn convert_char4_rtn(float4); +char4 __ovld __cnfn convert_char4_sat_rtn(float4); +char4 __ovld __cnfn convert_char4(float4); +char4 __ovld __cnfn convert_char4_sat(float4); +uchar4 __ovld __cnfn convert_uchar4_rte(char4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(char4); +uchar4 __ovld __cnfn convert_uchar4_rtz(char4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(char4); +uchar4 __ovld __cnfn convert_uchar4_rtp(char4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(char4); +uchar4 __ovld __cnfn convert_uchar4_rtn(char4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(char4); +uchar4 __ovld __cnfn convert_uchar4(char4); +uchar4 __ovld __cnfn convert_uchar4_sat(char4); +uchar4 __ovld __cnfn convert_uchar4_rte(uchar4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(uchar4); +uchar4 __ovld __cnfn convert_uchar4_rtz(uchar4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(uchar4); +uchar4 __ovld __cnfn convert_uchar4_rtp(uchar4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(uchar4); +uchar4 __ovld __cnfn convert_uchar4_rtn(uchar4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(uchar4); +uchar4 __ovld __cnfn convert_uchar4(uchar4); +uchar4 __ovld __cnfn convert_uchar4_sat(uchar4); +uchar4 __ovld __cnfn convert_uchar4_rte(short4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(short4); +uchar4 __ovld __cnfn convert_uchar4_rtz(short4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(short4); +uchar4 __ovld __cnfn convert_uchar4_rtp(short4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(short4); +uchar4 __ovld __cnfn convert_uchar4_rtn(short4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(short4); +uchar4 __ovld __cnfn convert_uchar4(short4); +uchar4 __ovld __cnfn convert_uchar4_sat(short4); +uchar4 __ovld __cnfn convert_uchar4_rte(ushort4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(ushort4); +uchar4 __ovld __cnfn convert_uchar4_rtz(ushort4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(ushort4); +uchar4 __ovld __cnfn convert_uchar4_rtp(ushort4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(ushort4); +uchar4 __ovld __cnfn convert_uchar4_rtn(ushort4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(ushort4); +uchar4 __ovld __cnfn convert_uchar4(ushort4); +uchar4 __ovld __cnfn convert_uchar4_sat(ushort4); +uchar4 __ovld __cnfn convert_uchar4_rte(int4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(int4); +uchar4 __ovld __cnfn convert_uchar4_rtz(int4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(int4); +uchar4 __ovld __cnfn convert_uchar4_rtp(int4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(int4); +uchar4 __ovld __cnfn convert_uchar4_rtn(int4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(int4); +uchar4 __ovld __cnfn convert_uchar4(int4); +uchar4 __ovld __cnfn convert_uchar4_sat(int4); +uchar4 __ovld __cnfn convert_uchar4_rte(uint4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(uint4); +uchar4 __ovld __cnfn convert_uchar4_rtz(uint4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(uint4); +uchar4 __ovld __cnfn convert_uchar4_rtp(uint4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(uint4); +uchar4 __ovld __cnfn convert_uchar4_rtn(uint4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(uint4); +uchar4 __ovld __cnfn convert_uchar4(uint4); +uchar4 __ovld __cnfn convert_uchar4_sat(uint4); +uchar4 __ovld __cnfn convert_uchar4_rte(long4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(long4); +uchar4 __ovld __cnfn convert_uchar4_rtz(long4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(long4); +uchar4 __ovld __cnfn convert_uchar4_rtp(long4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(long4); +uchar4 __ovld __cnfn convert_uchar4_rtn(long4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(long4); +uchar4 __ovld __cnfn convert_uchar4(long4); +uchar4 __ovld __cnfn convert_uchar4_sat(long4); +uchar4 __ovld __cnfn convert_uchar4_rte(ulong4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(ulong4); +uchar4 __ovld __cnfn convert_uchar4_rtz(ulong4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(ulong4); +uchar4 __ovld __cnfn convert_uchar4_rtp(ulong4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(ulong4); +uchar4 __ovld __cnfn convert_uchar4_rtn(ulong4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(ulong4); +uchar4 __ovld __cnfn convert_uchar4(ulong4); +uchar4 __ovld __cnfn convert_uchar4_sat(ulong4); +uchar4 __ovld __cnfn convert_uchar4_rte(float4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(float4); +uchar4 __ovld __cnfn convert_uchar4_rtz(float4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(float4); +uchar4 __ovld __cnfn convert_uchar4_rtp(float4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(float4); +uchar4 __ovld __cnfn convert_uchar4_rtn(float4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(float4); +uchar4 __ovld __cnfn convert_uchar4(float4); +uchar4 __ovld __cnfn convert_uchar4_sat(float4); +short4 __ovld __cnfn convert_short4_rte(char4); +short4 __ovld __cnfn convert_short4_sat_rte(char4); +short4 __ovld __cnfn convert_short4_rtz(char4); +short4 __ovld __cnfn convert_short4_sat_rtz(char4); +short4 __ovld __cnfn convert_short4_rtp(char4); +short4 __ovld __cnfn convert_short4_sat_rtp(char4); +short4 __ovld __cnfn convert_short4_rtn(char4); +short4 __ovld __cnfn convert_short4_sat_rtn(char4); +short4 __ovld __cnfn convert_short4(char4); +short4 __ovld __cnfn convert_short4_sat(char4); +short4 __ovld __cnfn convert_short4_rte(uchar4); +short4 __ovld __cnfn convert_short4_sat_rte(uchar4); +short4 __ovld __cnfn convert_short4_rtz(uchar4); +short4 __ovld __cnfn convert_short4_sat_rtz(uchar4); +short4 __ovld __cnfn convert_short4_rtp(uchar4); +short4 __ovld __cnfn convert_short4_sat_rtp(uchar4); +short4 __ovld __cnfn convert_short4_rtn(uchar4); +short4 __ovld __cnfn convert_short4_sat_rtn(uchar4); +short4 __ovld __cnfn convert_short4(uchar4); +short4 __ovld __cnfn convert_short4_sat(uchar4); +short4 __ovld __cnfn convert_short4_rte(short4); +short4 __ovld __cnfn convert_short4_sat_rte(short4); +short4 __ovld __cnfn convert_short4_rtz(short4); +short4 __ovld __cnfn convert_short4_sat_rtz(short4); +short4 __ovld __cnfn convert_short4_rtp(short4); +short4 __ovld __cnfn convert_short4_sat_rtp(short4); +short4 __ovld __cnfn convert_short4_rtn(short4); +short4 __ovld __cnfn convert_short4_sat_rtn(short4); +short4 __ovld __cnfn convert_short4(short4); +short4 __ovld __cnfn convert_short4_sat(short4); +short4 __ovld __cnfn convert_short4_rte(ushort4); +short4 __ovld __cnfn convert_short4_sat_rte(ushort4); +short4 __ovld __cnfn convert_short4_rtz(ushort4); +short4 __ovld __cnfn convert_short4_sat_rtz(ushort4); +short4 __ovld __cnfn convert_short4_rtp(ushort4); +short4 __ovld __cnfn convert_short4_sat_rtp(ushort4); +short4 __ovld __cnfn convert_short4_rtn(ushort4); +short4 __ovld __cnfn convert_short4_sat_rtn(ushort4); +short4 __ovld __cnfn convert_short4(ushort4); +short4 __ovld __cnfn convert_short4_sat(ushort4); +short4 __ovld __cnfn convert_short4_rte(int4); +short4 __ovld __cnfn convert_short4_sat_rte(int4); +short4 __ovld __cnfn convert_short4_rtz(int4); +short4 __ovld __cnfn convert_short4_sat_rtz(int4); +short4 __ovld __cnfn convert_short4_rtp(int4); +short4 __ovld __cnfn convert_short4_sat_rtp(int4); +short4 __ovld __cnfn convert_short4_rtn(int4); +short4 __ovld __cnfn convert_short4_sat_rtn(int4); +short4 __ovld __cnfn convert_short4(int4); +short4 __ovld __cnfn convert_short4_sat(int4); +short4 __ovld __cnfn convert_short4_rte(uint4); +short4 __ovld __cnfn convert_short4_sat_rte(uint4); +short4 __ovld __cnfn convert_short4_rtz(uint4); +short4 __ovld __cnfn convert_short4_sat_rtz(uint4); +short4 __ovld __cnfn convert_short4_rtp(uint4); +short4 __ovld __cnfn convert_short4_sat_rtp(uint4); +short4 __ovld __cnfn convert_short4_rtn(uint4); +short4 __ovld __cnfn convert_short4_sat_rtn(uint4); +short4 __ovld __cnfn convert_short4(uint4); +short4 __ovld __cnfn convert_short4_sat(uint4); +short4 __ovld __cnfn convert_short4_rte(long4); +short4 __ovld __cnfn convert_short4_sat_rte(long4); +short4 __ovld __cnfn convert_short4_rtz(long4); +short4 __ovld __cnfn convert_short4_sat_rtz(long4); +short4 __ovld __cnfn convert_short4_rtp(long4); +short4 __ovld __cnfn convert_short4_sat_rtp(long4); +short4 __ovld __cnfn convert_short4_rtn(long4); +short4 __ovld __cnfn convert_short4_sat_rtn(long4); +short4 __ovld __cnfn convert_short4(long4); +short4 __ovld __cnfn convert_short4_sat(long4); +short4 __ovld __cnfn convert_short4_rte(ulong4); +short4 __ovld __cnfn convert_short4_sat_rte(ulong4); +short4 __ovld __cnfn convert_short4_rtz(ulong4); +short4 __ovld __cnfn convert_short4_sat_rtz(ulong4); +short4 __ovld __cnfn convert_short4_rtp(ulong4); +short4 __ovld __cnfn convert_short4_sat_rtp(ulong4); +short4 __ovld __cnfn convert_short4_rtn(ulong4); +short4 __ovld __cnfn convert_short4_sat_rtn(ulong4); +short4 __ovld __cnfn convert_short4(ulong4); +short4 __ovld __cnfn convert_short4_sat(ulong4); +short4 __ovld __cnfn convert_short4_rte(float4); +short4 __ovld __cnfn convert_short4_sat_rte(float4); +short4 __ovld __cnfn convert_short4_rtz(float4); +short4 __ovld __cnfn convert_short4_sat_rtz(float4); +short4 __ovld __cnfn convert_short4_rtp(float4); +short4 __ovld __cnfn convert_short4_sat_rtp(float4); +short4 __ovld __cnfn convert_short4_rtn(float4); +short4 __ovld __cnfn convert_short4_sat_rtn(float4); +short4 __ovld __cnfn convert_short4(float4); +short4 __ovld __cnfn convert_short4_sat(float4); +ushort4 __ovld __cnfn convert_ushort4_rte(char4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(char4); +ushort4 __ovld __cnfn convert_ushort4_rtz(char4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(char4); +ushort4 __ovld __cnfn convert_ushort4_rtp(char4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(char4); +ushort4 __ovld __cnfn convert_ushort4_rtn(char4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(char4); +ushort4 __ovld __cnfn convert_ushort4(char4); +ushort4 __ovld __cnfn convert_ushort4_sat(char4); +ushort4 __ovld __cnfn convert_ushort4_rte(uchar4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(uchar4); +ushort4 __ovld __cnfn convert_ushort4_rtz(uchar4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(uchar4); +ushort4 __ovld __cnfn convert_ushort4_rtp(uchar4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(uchar4); +ushort4 __ovld __cnfn convert_ushort4_rtn(uchar4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(uchar4); +ushort4 __ovld __cnfn convert_ushort4(uchar4); +ushort4 __ovld __cnfn convert_ushort4_sat(uchar4); +ushort4 __ovld __cnfn convert_ushort4_rte(short4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(short4); +ushort4 __ovld __cnfn convert_ushort4_rtz(short4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(short4); +ushort4 __ovld __cnfn convert_ushort4_rtp(short4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(short4); +ushort4 __ovld __cnfn convert_ushort4_rtn(short4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(short4); +ushort4 __ovld __cnfn convert_ushort4(short4); +ushort4 __ovld __cnfn convert_ushort4_sat(short4); +ushort4 __ovld __cnfn convert_ushort4_rte(ushort4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(ushort4); +ushort4 __ovld __cnfn convert_ushort4_rtz(ushort4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(ushort4); +ushort4 __ovld __cnfn convert_ushort4_rtp(ushort4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(ushort4); +ushort4 __ovld __cnfn convert_ushort4_rtn(ushort4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(ushort4); +ushort4 __ovld __cnfn convert_ushort4(ushort4); +ushort4 __ovld __cnfn convert_ushort4_sat(ushort4); +ushort4 __ovld __cnfn convert_ushort4_rte(int4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(int4); +ushort4 __ovld __cnfn convert_ushort4_rtz(int4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(int4); +ushort4 __ovld __cnfn convert_ushort4_rtp(int4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(int4); +ushort4 __ovld __cnfn convert_ushort4_rtn(int4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(int4); +ushort4 __ovld __cnfn convert_ushort4(int4); +ushort4 __ovld __cnfn convert_ushort4_sat(int4); +ushort4 __ovld __cnfn convert_ushort4_rte(uint4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(uint4); +ushort4 __ovld __cnfn convert_ushort4_rtz(uint4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(uint4); +ushort4 __ovld __cnfn convert_ushort4_rtp(uint4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(uint4); +ushort4 __ovld __cnfn convert_ushort4_rtn(uint4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(uint4); +ushort4 __ovld __cnfn convert_ushort4(uint4); +ushort4 __ovld __cnfn convert_ushort4_sat(uint4); +ushort4 __ovld __cnfn convert_ushort4_rte(long4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(long4); +ushort4 __ovld __cnfn convert_ushort4_rtz(long4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(long4); +ushort4 __ovld __cnfn convert_ushort4_rtp(long4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(long4); +ushort4 __ovld __cnfn convert_ushort4_rtn(long4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(long4); +ushort4 __ovld __cnfn convert_ushort4(long4); +ushort4 __ovld __cnfn convert_ushort4_sat(long4); +ushort4 __ovld __cnfn convert_ushort4_rte(ulong4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(ulong4); +ushort4 __ovld __cnfn convert_ushort4_rtz(ulong4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(ulong4); +ushort4 __ovld __cnfn convert_ushort4_rtp(ulong4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(ulong4); +ushort4 __ovld __cnfn convert_ushort4_rtn(ulong4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(ulong4); +ushort4 __ovld __cnfn convert_ushort4(ulong4); +ushort4 __ovld __cnfn convert_ushort4_sat(ulong4); +ushort4 __ovld __cnfn convert_ushort4_rte(float4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(float4); +ushort4 __ovld __cnfn convert_ushort4_rtz(float4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(float4); +ushort4 __ovld __cnfn convert_ushort4_rtp(float4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(float4); +ushort4 __ovld __cnfn convert_ushort4_rtn(float4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(float4); +ushort4 __ovld __cnfn convert_ushort4(float4); +ushort4 __ovld __cnfn convert_ushort4_sat(float4); +int4 __ovld __cnfn convert_int4_rte(char4); +int4 __ovld __cnfn convert_int4_sat_rte(char4); +int4 __ovld __cnfn convert_int4_rtz(char4); +int4 __ovld __cnfn convert_int4_sat_rtz(char4); +int4 __ovld __cnfn convert_int4_rtp(char4); +int4 __ovld __cnfn convert_int4_sat_rtp(char4); +int4 __ovld __cnfn convert_int4_rtn(char4); +int4 __ovld __cnfn convert_int4_sat_rtn(char4); +int4 __ovld __cnfn convert_int4(char4); +int4 __ovld __cnfn convert_int4_sat(char4); +int4 __ovld __cnfn convert_int4_rte(uchar4); +int4 __ovld __cnfn convert_int4_sat_rte(uchar4); +int4 __ovld __cnfn convert_int4_rtz(uchar4); +int4 __ovld __cnfn convert_int4_sat_rtz(uchar4); +int4 __ovld __cnfn convert_int4_rtp(uchar4); +int4 __ovld __cnfn convert_int4_sat_rtp(uchar4); +int4 __ovld __cnfn convert_int4_rtn(uchar4); +int4 __ovld __cnfn convert_int4_sat_rtn(uchar4); +int4 __ovld __cnfn convert_int4(uchar4); +int4 __ovld __cnfn convert_int4_sat(uchar4); +int4 __ovld __cnfn convert_int4_rte(short4); +int4 __ovld __cnfn convert_int4_sat_rte(short4); +int4 __ovld __cnfn convert_int4_rtz(short4); +int4 __ovld __cnfn convert_int4_sat_rtz(short4); +int4 __ovld __cnfn convert_int4_rtp(short4); +int4 __ovld __cnfn convert_int4_sat_rtp(short4); +int4 __ovld __cnfn convert_int4_rtn(short4); +int4 __ovld __cnfn convert_int4_sat_rtn(short4); +int4 __ovld __cnfn convert_int4(short4); +int4 __ovld __cnfn convert_int4_sat(short4); +int4 __ovld __cnfn convert_int4_rte(ushort4); +int4 __ovld __cnfn convert_int4_sat_rte(ushort4); +int4 __ovld __cnfn convert_int4_rtz(ushort4); +int4 __ovld __cnfn convert_int4_sat_rtz(ushort4); +int4 __ovld __cnfn convert_int4_rtp(ushort4); +int4 __ovld __cnfn convert_int4_sat_rtp(ushort4); +int4 __ovld __cnfn convert_int4_rtn(ushort4); +int4 __ovld __cnfn convert_int4_sat_rtn(ushort4); +int4 __ovld __cnfn convert_int4(ushort4); +int4 __ovld __cnfn convert_int4_sat(ushort4); +int4 __ovld __cnfn convert_int4_rte(int4); +int4 __ovld __cnfn convert_int4_sat_rte(int4); +int4 __ovld __cnfn convert_int4_rtz(int4); +int4 __ovld __cnfn convert_int4_sat_rtz(int4); +int4 __ovld __cnfn convert_int4_rtp(int4); +int4 __ovld __cnfn convert_int4_sat_rtp(int4); +int4 __ovld __cnfn convert_int4_rtn(int4); +int4 __ovld __cnfn convert_int4_sat_rtn(int4); +int4 __ovld __cnfn convert_int4(int4); +int4 __ovld __cnfn convert_int4_sat(int4); +int4 __ovld __cnfn convert_int4_rte(uint4); +int4 __ovld __cnfn convert_int4_sat_rte(uint4); +int4 __ovld __cnfn convert_int4_rtz(uint4); +int4 __ovld __cnfn convert_int4_sat_rtz(uint4); +int4 __ovld __cnfn convert_int4_rtp(uint4); +int4 __ovld __cnfn convert_int4_sat_rtp(uint4); +int4 __ovld __cnfn convert_int4_rtn(uint4); +int4 __ovld __cnfn convert_int4_sat_rtn(uint4); +int4 __ovld __cnfn convert_int4(uint4); +int4 __ovld __cnfn convert_int4_sat(uint4); +int4 __ovld __cnfn convert_int4_rte(long4); +int4 __ovld __cnfn convert_int4_sat_rte(long4); +int4 __ovld __cnfn convert_int4_rtz(long4); +int4 __ovld __cnfn convert_int4_sat_rtz(long4); +int4 __ovld __cnfn convert_int4_rtp(long4); +int4 __ovld __cnfn convert_int4_sat_rtp(long4); +int4 __ovld __cnfn convert_int4_rtn(long4); +int4 __ovld __cnfn convert_int4_sat_rtn(long4); +int4 __ovld __cnfn convert_int4(long4); +int4 __ovld __cnfn convert_int4_sat(long4); +int4 __ovld __cnfn convert_int4_rte(ulong4); +int4 __ovld __cnfn convert_int4_sat_rte(ulong4); +int4 __ovld __cnfn convert_int4_rtz(ulong4); +int4 __ovld __cnfn convert_int4_sat_rtz(ulong4); +int4 __ovld __cnfn convert_int4_rtp(ulong4); +int4 __ovld __cnfn convert_int4_sat_rtp(ulong4); +int4 __ovld __cnfn convert_int4_rtn(ulong4); +int4 __ovld __cnfn convert_int4_sat_rtn(ulong4); +int4 __ovld __cnfn convert_int4(ulong4); +int4 __ovld __cnfn convert_int4_sat(ulong4); +int4 __ovld __cnfn convert_int4_rte(float4); +int4 __ovld __cnfn convert_int4_sat_rte(float4); +int4 __ovld __cnfn convert_int4_rtz(float4); +int4 __ovld __cnfn convert_int4_sat_rtz(float4); +int4 __ovld __cnfn convert_int4_rtp(float4); +int4 __ovld __cnfn convert_int4_sat_rtp(float4); +int4 __ovld __cnfn convert_int4_rtn(float4); +int4 __ovld __cnfn convert_int4_sat_rtn(float4); +int4 __ovld __cnfn convert_int4(float4); +int4 __ovld __cnfn convert_int4_sat(float4); +uint4 __ovld __cnfn convert_uint4_rte(char4); +uint4 __ovld __cnfn convert_uint4_sat_rte(char4); +uint4 __ovld __cnfn convert_uint4_rtz(char4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(char4); +uint4 __ovld __cnfn convert_uint4_rtp(char4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(char4); +uint4 __ovld __cnfn convert_uint4_rtn(char4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(char4); +uint4 __ovld __cnfn convert_uint4(char4); +uint4 __ovld __cnfn convert_uint4_sat(char4); +uint4 __ovld __cnfn convert_uint4_rte(uchar4); +uint4 __ovld __cnfn convert_uint4_sat_rte(uchar4); +uint4 __ovld __cnfn convert_uint4_rtz(uchar4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(uchar4); +uint4 __ovld __cnfn convert_uint4_rtp(uchar4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(uchar4); +uint4 __ovld __cnfn convert_uint4_rtn(uchar4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(uchar4); +uint4 __ovld __cnfn convert_uint4(uchar4); +uint4 __ovld __cnfn convert_uint4_sat(uchar4); +uint4 __ovld __cnfn convert_uint4_rte(short4); +uint4 __ovld __cnfn convert_uint4_sat_rte(short4); +uint4 __ovld __cnfn convert_uint4_rtz(short4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(short4); +uint4 __ovld __cnfn convert_uint4_rtp(short4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(short4); +uint4 __ovld __cnfn convert_uint4_rtn(short4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(short4); +uint4 __ovld __cnfn convert_uint4(short4); +uint4 __ovld __cnfn convert_uint4_sat(short4); +uint4 __ovld __cnfn convert_uint4_rte(ushort4); +uint4 __ovld __cnfn convert_uint4_sat_rte(ushort4); +uint4 __ovld __cnfn convert_uint4_rtz(ushort4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(ushort4); +uint4 __ovld __cnfn convert_uint4_rtp(ushort4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(ushort4); +uint4 __ovld __cnfn convert_uint4_rtn(ushort4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(ushort4); +uint4 __ovld __cnfn convert_uint4(ushort4); +uint4 __ovld __cnfn convert_uint4_sat(ushort4); +uint4 __ovld __cnfn convert_uint4_rte(int4); +uint4 __ovld __cnfn convert_uint4_sat_rte(int4); +uint4 __ovld __cnfn convert_uint4_rtz(int4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(int4); +uint4 __ovld __cnfn convert_uint4_rtp(int4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(int4); +uint4 __ovld __cnfn convert_uint4_rtn(int4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(int4); +uint4 __ovld __cnfn convert_uint4(int4); +uint4 __ovld __cnfn convert_uint4_sat(int4); +uint4 __ovld __cnfn convert_uint4_rte(uint4); +uint4 __ovld __cnfn convert_uint4_sat_rte(uint4); +uint4 __ovld __cnfn convert_uint4_rtz(uint4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(uint4); +uint4 __ovld __cnfn convert_uint4_rtp(uint4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(uint4); +uint4 __ovld __cnfn convert_uint4_rtn(uint4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(uint4); +uint4 __ovld __cnfn convert_uint4(uint4); +uint4 __ovld __cnfn convert_uint4_sat(uint4); +uint4 __ovld __cnfn convert_uint4_rte(long4); +uint4 __ovld __cnfn convert_uint4_sat_rte(long4); +uint4 __ovld __cnfn convert_uint4_rtz(long4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(long4); +uint4 __ovld __cnfn convert_uint4_rtp(long4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(long4); +uint4 __ovld __cnfn convert_uint4_rtn(long4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(long4); +uint4 __ovld __cnfn convert_uint4(long4); +uint4 __ovld __cnfn convert_uint4_sat(long4); +uint4 __ovld __cnfn convert_uint4_rte(ulong4); +uint4 __ovld __cnfn convert_uint4_sat_rte(ulong4); +uint4 __ovld __cnfn convert_uint4_rtz(ulong4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(ulong4); +uint4 __ovld __cnfn convert_uint4_rtp(ulong4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(ulong4); +uint4 __ovld __cnfn convert_uint4_rtn(ulong4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(ulong4); +uint4 __ovld __cnfn convert_uint4(ulong4); +uint4 __ovld __cnfn convert_uint4_sat(ulong4); +uint4 __ovld __cnfn convert_uint4_rte(float4); +uint4 __ovld __cnfn convert_uint4_sat_rte(float4); +uint4 __ovld __cnfn convert_uint4_rtz(float4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(float4); +uint4 __ovld __cnfn convert_uint4_rtp(float4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(float4); +uint4 __ovld __cnfn convert_uint4_rtn(float4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(float4); +uint4 __ovld __cnfn convert_uint4(float4); +uint4 __ovld __cnfn convert_uint4_sat(float4); +long4 __ovld __cnfn convert_long4_rte(char4); +long4 __ovld __cnfn convert_long4_sat_rte(char4); +long4 __ovld __cnfn convert_long4_rtz(char4); +long4 __ovld __cnfn convert_long4_sat_rtz(char4); +long4 __ovld __cnfn convert_long4_rtp(char4); +long4 __ovld __cnfn convert_long4_sat_rtp(char4); +long4 __ovld __cnfn convert_long4_rtn(char4); +long4 __ovld __cnfn convert_long4_sat_rtn(char4); +long4 __ovld __cnfn convert_long4(char4); +long4 __ovld __cnfn convert_long4_sat(char4); +long4 __ovld __cnfn convert_long4_rte(uchar4); +long4 __ovld __cnfn convert_long4_sat_rte(uchar4); +long4 __ovld __cnfn convert_long4_rtz(uchar4); +long4 __ovld __cnfn convert_long4_sat_rtz(uchar4); +long4 __ovld __cnfn convert_long4_rtp(uchar4); +long4 __ovld __cnfn convert_long4_sat_rtp(uchar4); +long4 __ovld __cnfn convert_long4_rtn(uchar4); +long4 __ovld __cnfn convert_long4_sat_rtn(uchar4); +long4 __ovld __cnfn convert_long4(uchar4); +long4 __ovld __cnfn convert_long4_sat(uchar4); +long4 __ovld __cnfn convert_long4_rte(short4); +long4 __ovld __cnfn convert_long4_sat_rte(short4); +long4 __ovld __cnfn convert_long4_rtz(short4); +long4 __ovld __cnfn convert_long4_sat_rtz(short4); +long4 __ovld __cnfn convert_long4_rtp(short4); +long4 __ovld __cnfn convert_long4_sat_rtp(short4); +long4 __ovld __cnfn convert_long4_rtn(short4); +long4 __ovld __cnfn convert_long4_sat_rtn(short4); +long4 __ovld __cnfn convert_long4(short4); +long4 __ovld __cnfn convert_long4_sat(short4); +long4 __ovld __cnfn convert_long4_rte(ushort4); +long4 __ovld __cnfn convert_long4_sat_rte(ushort4); +long4 __ovld __cnfn convert_long4_rtz(ushort4); +long4 __ovld __cnfn convert_long4_sat_rtz(ushort4); +long4 __ovld __cnfn convert_long4_rtp(ushort4); +long4 __ovld __cnfn convert_long4_sat_rtp(ushort4); +long4 __ovld __cnfn convert_long4_rtn(ushort4); +long4 __ovld __cnfn convert_long4_sat_rtn(ushort4); +long4 __ovld __cnfn convert_long4(ushort4); +long4 __ovld __cnfn convert_long4_sat(ushort4); +long4 __ovld __cnfn convert_long4_rte(int4); +long4 __ovld __cnfn convert_long4_sat_rte(int4); +long4 __ovld __cnfn convert_long4_rtz(int4); +long4 __ovld __cnfn convert_long4_sat_rtz(int4); +long4 __ovld __cnfn convert_long4_rtp(int4); +long4 __ovld __cnfn convert_long4_sat_rtp(int4); +long4 __ovld __cnfn convert_long4_rtn(int4); +long4 __ovld __cnfn convert_long4_sat_rtn(int4); +long4 __ovld __cnfn convert_long4(int4); +long4 __ovld __cnfn convert_long4_sat(int4); +long4 __ovld __cnfn convert_long4_rte(uint4); +long4 __ovld __cnfn convert_long4_sat_rte(uint4); +long4 __ovld __cnfn convert_long4_rtz(uint4); +long4 __ovld __cnfn convert_long4_sat_rtz(uint4); +long4 __ovld __cnfn convert_long4_rtp(uint4); +long4 __ovld __cnfn convert_long4_sat_rtp(uint4); +long4 __ovld __cnfn convert_long4_rtn(uint4); +long4 __ovld __cnfn convert_long4_sat_rtn(uint4); +long4 __ovld __cnfn convert_long4(uint4); +long4 __ovld __cnfn convert_long4_sat(uint4); +long4 __ovld __cnfn convert_long4_rte(long4); +long4 __ovld __cnfn convert_long4_sat_rte(long4); +long4 __ovld __cnfn convert_long4_rtz(long4); +long4 __ovld __cnfn convert_long4_sat_rtz(long4); +long4 __ovld __cnfn convert_long4_rtp(long4); +long4 __ovld __cnfn convert_long4_sat_rtp(long4); +long4 __ovld __cnfn convert_long4_rtn(long4); +long4 __ovld __cnfn convert_long4_sat_rtn(long4); +long4 __ovld __cnfn convert_long4(long4); +long4 __ovld __cnfn convert_long4_sat(long4); +long4 __ovld __cnfn convert_long4_rte(ulong4); +long4 __ovld __cnfn convert_long4_sat_rte(ulong4); +long4 __ovld __cnfn convert_long4_rtz(ulong4); +long4 __ovld __cnfn convert_long4_sat_rtz(ulong4); +long4 __ovld __cnfn convert_long4_rtp(ulong4); +long4 __ovld __cnfn convert_long4_sat_rtp(ulong4); +long4 __ovld __cnfn convert_long4_rtn(ulong4); +long4 __ovld __cnfn convert_long4_sat_rtn(ulong4); +long4 __ovld __cnfn convert_long4(ulong4); +long4 __ovld __cnfn convert_long4_sat(ulong4); +long4 __ovld __cnfn convert_long4_rte(float4); +long4 __ovld __cnfn convert_long4_sat_rte(float4); +long4 __ovld __cnfn convert_long4_rtz(float4); +long4 __ovld __cnfn convert_long4_sat_rtz(float4); +long4 __ovld __cnfn convert_long4_rtp(float4); +long4 __ovld __cnfn convert_long4_sat_rtp(float4); +long4 __ovld __cnfn convert_long4_rtn(float4); +long4 __ovld __cnfn convert_long4_sat_rtn(float4); +long4 __ovld __cnfn convert_long4(float4); +long4 __ovld __cnfn convert_long4_sat(float4); +ulong4 __ovld __cnfn convert_ulong4_rte(char4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(char4); +ulong4 __ovld __cnfn convert_ulong4_rtz(char4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(char4); +ulong4 __ovld __cnfn convert_ulong4_rtp(char4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(char4); +ulong4 __ovld __cnfn convert_ulong4_rtn(char4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(char4); +ulong4 __ovld __cnfn convert_ulong4(char4); +ulong4 __ovld __cnfn convert_ulong4_sat(char4); +ulong4 __ovld __cnfn convert_ulong4_rte(uchar4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(uchar4); +ulong4 __ovld __cnfn convert_ulong4_rtz(uchar4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(uchar4); +ulong4 __ovld __cnfn convert_ulong4_rtp(uchar4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(uchar4); +ulong4 __ovld __cnfn convert_ulong4_rtn(uchar4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(uchar4); +ulong4 __ovld __cnfn convert_ulong4(uchar4); +ulong4 __ovld __cnfn convert_ulong4_sat(uchar4); +ulong4 __ovld __cnfn convert_ulong4_rte(short4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(short4); +ulong4 __ovld __cnfn convert_ulong4_rtz(short4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(short4); +ulong4 __ovld __cnfn convert_ulong4_rtp(short4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(short4); +ulong4 __ovld __cnfn convert_ulong4_rtn(short4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(short4); +ulong4 __ovld __cnfn convert_ulong4(short4); +ulong4 __ovld __cnfn convert_ulong4_sat(short4); +ulong4 __ovld __cnfn convert_ulong4_rte(ushort4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(ushort4); +ulong4 __ovld __cnfn convert_ulong4_rtz(ushort4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(ushort4); +ulong4 __ovld __cnfn convert_ulong4_rtp(ushort4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(ushort4); +ulong4 __ovld __cnfn convert_ulong4_rtn(ushort4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(ushort4); +ulong4 __ovld __cnfn convert_ulong4(ushort4); +ulong4 __ovld __cnfn convert_ulong4_sat(ushort4); +ulong4 __ovld __cnfn convert_ulong4_rte(int4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(int4); +ulong4 __ovld __cnfn convert_ulong4_rtz(int4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(int4); +ulong4 __ovld __cnfn convert_ulong4_rtp(int4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(int4); +ulong4 __ovld __cnfn convert_ulong4_rtn(int4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(int4); +ulong4 __ovld __cnfn convert_ulong4(int4); +ulong4 __ovld __cnfn convert_ulong4_sat(int4); +ulong4 __ovld __cnfn convert_ulong4_rte(uint4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(uint4); +ulong4 __ovld __cnfn convert_ulong4_rtz(uint4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(uint4); +ulong4 __ovld __cnfn convert_ulong4_rtp(uint4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(uint4); +ulong4 __ovld __cnfn convert_ulong4_rtn(uint4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(uint4); +ulong4 __ovld __cnfn convert_ulong4(uint4); +ulong4 __ovld __cnfn convert_ulong4_sat(uint4); +ulong4 __ovld __cnfn convert_ulong4_rte(long4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(long4); +ulong4 __ovld __cnfn convert_ulong4_rtz(long4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(long4); +ulong4 __ovld __cnfn convert_ulong4_rtp(long4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(long4); +ulong4 __ovld __cnfn convert_ulong4_rtn(long4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(long4); +ulong4 __ovld __cnfn convert_ulong4(long4); +ulong4 __ovld __cnfn convert_ulong4_sat(long4); +ulong4 __ovld __cnfn convert_ulong4_rte(ulong4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(ulong4); +ulong4 __ovld __cnfn convert_ulong4_rtz(ulong4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(ulong4); +ulong4 __ovld __cnfn convert_ulong4_rtp(ulong4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(ulong4); +ulong4 __ovld __cnfn convert_ulong4_rtn(ulong4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(ulong4); +ulong4 __ovld __cnfn convert_ulong4(ulong4); +ulong4 __ovld __cnfn convert_ulong4_sat(ulong4); +ulong4 __ovld __cnfn convert_ulong4_rte(float4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(float4); +ulong4 __ovld __cnfn convert_ulong4_rtz(float4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(float4); +ulong4 __ovld __cnfn convert_ulong4_rtp(float4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(float4); +ulong4 __ovld __cnfn convert_ulong4_rtn(float4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(float4); +ulong4 __ovld __cnfn convert_ulong4(float4); +ulong4 __ovld __cnfn convert_ulong4_sat(float4); +float4 __ovld __cnfn convert_float4_rte(char4); +float4 __ovld __cnfn convert_float4_rtz(char4); +float4 __ovld __cnfn convert_float4_rtp(char4); +float4 __ovld __cnfn convert_float4_rtn(char4); +float4 __ovld __cnfn convert_float4(char4); +float4 __ovld __cnfn convert_float4_rte(uchar4); +float4 __ovld __cnfn convert_float4_rtz(uchar4); +float4 __ovld __cnfn convert_float4_rtp(uchar4); +float4 __ovld __cnfn convert_float4_rtn(uchar4); +float4 __ovld __cnfn convert_float4(uchar4); +float4 __ovld __cnfn convert_float4_rte(short4); +float4 __ovld __cnfn convert_float4_rtz(short4); +float4 __ovld __cnfn convert_float4_rtp(short4); +float4 __ovld __cnfn convert_float4_rtn(short4); +float4 __ovld __cnfn convert_float4(short4); +float4 __ovld __cnfn convert_float4_rte(ushort4); +float4 __ovld __cnfn convert_float4_rtz(ushort4); +float4 __ovld __cnfn convert_float4_rtp(ushort4); +float4 __ovld __cnfn convert_float4_rtn(ushort4); +float4 __ovld __cnfn convert_float4(ushort4); +float4 __ovld __cnfn convert_float4_rte(int4); +float4 __ovld __cnfn convert_float4_rtz(int4); +float4 __ovld __cnfn convert_float4_rtp(int4); +float4 __ovld __cnfn convert_float4_rtn(int4); +float4 __ovld __cnfn convert_float4(int4); +float4 __ovld __cnfn convert_float4_rte(uint4); +float4 __ovld __cnfn convert_float4_rtz(uint4); +float4 __ovld __cnfn convert_float4_rtp(uint4); +float4 __ovld __cnfn convert_float4_rtn(uint4); +float4 __ovld __cnfn convert_float4(uint4); +float4 __ovld __cnfn convert_float4_rte(long4); +float4 __ovld __cnfn convert_float4_rtz(long4); +float4 __ovld __cnfn convert_float4_rtp(long4); +float4 __ovld __cnfn convert_float4_rtn(long4); +float4 __ovld __cnfn convert_float4(long4); +float4 __ovld __cnfn convert_float4_rte(ulong4); +float4 __ovld __cnfn convert_float4_rtz(ulong4); +float4 __ovld __cnfn convert_float4_rtp(ulong4); +float4 __ovld __cnfn convert_float4_rtn(ulong4); +float4 __ovld __cnfn convert_float4(ulong4); +float4 __ovld __cnfn convert_float4_rte(float4); +float4 __ovld __cnfn convert_float4_rtz(float4); +float4 __ovld __cnfn convert_float4_rtp(float4); +float4 __ovld __cnfn convert_float4_rtn(float4); +float4 __ovld __cnfn convert_float4(float4); +char8 __ovld __cnfn convert_char8_rte(char8); +char8 __ovld __cnfn convert_char8_sat_rte(char8); +char8 __ovld __cnfn convert_char8_rtz(char8); +char8 __ovld __cnfn convert_char8_sat_rtz(char8); +char8 __ovld __cnfn convert_char8_rtp(char8); +char8 __ovld __cnfn convert_char8_sat_rtp(char8); +char8 __ovld __cnfn convert_char8_rtn(char8); +char8 __ovld __cnfn convert_char8_sat_rtn(char8); +char8 __ovld __cnfn convert_char8(char8); +char8 __ovld __cnfn convert_char8_sat(char8); +char8 __ovld __cnfn convert_char8_rte(uchar8); +char8 __ovld __cnfn convert_char8_sat_rte(uchar8); +char8 __ovld __cnfn convert_char8_rtz(uchar8); +char8 __ovld __cnfn convert_char8_sat_rtz(uchar8); +char8 __ovld __cnfn convert_char8_rtp(uchar8); +char8 __ovld __cnfn convert_char8_sat_rtp(uchar8); +char8 __ovld __cnfn convert_char8_rtn(uchar8); +char8 __ovld __cnfn convert_char8_sat_rtn(uchar8); +char8 __ovld __cnfn convert_char8(uchar8); +char8 __ovld __cnfn convert_char8_sat(uchar8); +char8 __ovld __cnfn convert_char8_rte(short8); +char8 __ovld __cnfn convert_char8_sat_rte(short8); +char8 __ovld __cnfn convert_char8_rtz(short8); +char8 __ovld __cnfn convert_char8_sat_rtz(short8); +char8 __ovld __cnfn convert_char8_rtp(short8); +char8 __ovld __cnfn convert_char8_sat_rtp(short8); +char8 __ovld __cnfn convert_char8_rtn(short8); +char8 __ovld __cnfn convert_char8_sat_rtn(short8); +char8 __ovld __cnfn convert_char8(short8); +char8 __ovld __cnfn convert_char8_sat(short8); +char8 __ovld __cnfn convert_char8_rte(ushort8); +char8 __ovld __cnfn convert_char8_sat_rte(ushort8); +char8 __ovld __cnfn convert_char8_rtz(ushort8); +char8 __ovld __cnfn convert_char8_sat_rtz(ushort8); +char8 __ovld __cnfn convert_char8_rtp(ushort8); +char8 __ovld __cnfn convert_char8_sat_rtp(ushort8); +char8 __ovld __cnfn convert_char8_rtn(ushort8); +char8 __ovld __cnfn convert_char8_sat_rtn(ushort8); +char8 __ovld __cnfn convert_char8(ushort8); +char8 __ovld __cnfn convert_char8_sat(ushort8); +char8 __ovld __cnfn convert_char8_rte(int8); +char8 __ovld __cnfn convert_char8_sat_rte(int8); +char8 __ovld __cnfn convert_char8_rtz(int8); +char8 __ovld __cnfn convert_char8_sat_rtz(int8); +char8 __ovld __cnfn convert_char8_rtp(int8); +char8 __ovld __cnfn convert_char8_sat_rtp(int8); +char8 __ovld __cnfn convert_char8_rtn(int8); +char8 __ovld __cnfn convert_char8_sat_rtn(int8); +char8 __ovld __cnfn convert_char8(int8); +char8 __ovld __cnfn convert_char8_sat(int8); +char8 __ovld __cnfn convert_char8_rte(uint8); +char8 __ovld __cnfn convert_char8_sat_rte(uint8); +char8 __ovld __cnfn convert_char8_rtz(uint8); +char8 __ovld __cnfn convert_char8_sat_rtz(uint8); +char8 __ovld __cnfn convert_char8_rtp(uint8); +char8 __ovld __cnfn convert_char8_sat_rtp(uint8); +char8 __ovld __cnfn convert_char8_rtn(uint8); +char8 __ovld __cnfn convert_char8_sat_rtn(uint8); +char8 __ovld __cnfn convert_char8(uint8); +char8 __ovld __cnfn convert_char8_sat(uint8); +char8 __ovld __cnfn convert_char8_rte(long8); +char8 __ovld __cnfn convert_char8_sat_rte(long8); +char8 __ovld __cnfn convert_char8_rtz(long8); +char8 __ovld __cnfn convert_char8_sat_rtz(long8); +char8 __ovld __cnfn convert_char8_rtp(long8); +char8 __ovld __cnfn convert_char8_sat_rtp(long8); +char8 __ovld __cnfn convert_char8_rtn(long8); +char8 __ovld __cnfn convert_char8_sat_rtn(long8); +char8 __ovld __cnfn convert_char8(long8); +char8 __ovld __cnfn convert_char8_sat(long8); +char8 __ovld __cnfn convert_char8_rte(ulong8); +char8 __ovld __cnfn convert_char8_sat_rte(ulong8); +char8 __ovld __cnfn convert_char8_rtz(ulong8); +char8 __ovld __cnfn convert_char8_sat_rtz(ulong8); +char8 __ovld __cnfn convert_char8_rtp(ulong8); +char8 __ovld __cnfn convert_char8_sat_rtp(ulong8); +char8 __ovld __cnfn convert_char8_rtn(ulong8); +char8 __ovld __cnfn convert_char8_sat_rtn(ulong8); +char8 __ovld __cnfn convert_char8(ulong8); +char8 __ovld __cnfn convert_char8_sat(ulong8); +char8 __ovld __cnfn convert_char8_rte(float8); +char8 __ovld __cnfn convert_char8_sat_rte(float8); +char8 __ovld __cnfn convert_char8_rtz(float8); +char8 __ovld __cnfn convert_char8_sat_rtz(float8); +char8 __ovld __cnfn convert_char8_rtp(float8); +char8 __ovld __cnfn convert_char8_sat_rtp(float8); +char8 __ovld __cnfn convert_char8_rtn(float8); +char8 __ovld __cnfn convert_char8_sat_rtn(float8); +char8 __ovld __cnfn convert_char8(float8); +char8 __ovld __cnfn convert_char8_sat(float8); +uchar8 __ovld __cnfn convert_uchar8_rte(char8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(char8); +uchar8 __ovld __cnfn convert_uchar8_rtz(char8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(char8); +uchar8 __ovld __cnfn convert_uchar8_rtp(char8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(char8); +uchar8 __ovld __cnfn convert_uchar8_rtn(char8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(char8); +uchar8 __ovld __cnfn convert_uchar8(char8); +uchar8 __ovld __cnfn convert_uchar8_sat(char8); +uchar8 __ovld __cnfn convert_uchar8_rte(uchar8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(uchar8); +uchar8 __ovld __cnfn convert_uchar8_rtz(uchar8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(uchar8); +uchar8 __ovld __cnfn convert_uchar8_rtp(uchar8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(uchar8); +uchar8 __ovld __cnfn convert_uchar8_rtn(uchar8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(uchar8); +uchar8 __ovld __cnfn convert_uchar8(uchar8); +uchar8 __ovld __cnfn convert_uchar8_sat(uchar8); +uchar8 __ovld __cnfn convert_uchar8_rte(short8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(short8); +uchar8 __ovld __cnfn convert_uchar8_rtz(short8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(short8); +uchar8 __ovld __cnfn convert_uchar8_rtp(short8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(short8); +uchar8 __ovld __cnfn convert_uchar8_rtn(short8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(short8); +uchar8 __ovld __cnfn convert_uchar8(short8); +uchar8 __ovld __cnfn convert_uchar8_sat(short8); +uchar8 __ovld __cnfn convert_uchar8_rte(ushort8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(ushort8); +uchar8 __ovld __cnfn convert_uchar8_rtz(ushort8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(ushort8); +uchar8 __ovld __cnfn convert_uchar8_rtp(ushort8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(ushort8); +uchar8 __ovld __cnfn convert_uchar8_rtn(ushort8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(ushort8); +uchar8 __ovld __cnfn convert_uchar8(ushort8); +uchar8 __ovld __cnfn convert_uchar8_sat(ushort8); +uchar8 __ovld __cnfn convert_uchar8_rte(int8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(int8); +uchar8 __ovld __cnfn convert_uchar8_rtz(int8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(int8); +uchar8 __ovld __cnfn convert_uchar8_rtp(int8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(int8); +uchar8 __ovld __cnfn convert_uchar8_rtn(int8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(int8); +uchar8 __ovld __cnfn convert_uchar8(int8); +uchar8 __ovld __cnfn convert_uchar8_sat(int8); +uchar8 __ovld __cnfn convert_uchar8_rte(uint8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(uint8); +uchar8 __ovld __cnfn convert_uchar8_rtz(uint8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(uint8); +uchar8 __ovld __cnfn convert_uchar8_rtp(uint8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(uint8); +uchar8 __ovld __cnfn convert_uchar8_rtn(uint8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(uint8); +uchar8 __ovld __cnfn convert_uchar8(uint8); +uchar8 __ovld __cnfn convert_uchar8_sat(uint8); +uchar8 __ovld __cnfn convert_uchar8_rte(long8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(long8); +uchar8 __ovld __cnfn convert_uchar8_rtz(long8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(long8); +uchar8 __ovld __cnfn convert_uchar8_rtp(long8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(long8); +uchar8 __ovld __cnfn convert_uchar8_rtn(long8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(long8); +uchar8 __ovld __cnfn convert_uchar8(long8); +uchar8 __ovld __cnfn convert_uchar8_sat(long8); +uchar8 __ovld __cnfn convert_uchar8_rte(ulong8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(ulong8); +uchar8 __ovld __cnfn convert_uchar8_rtz(ulong8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(ulong8); +uchar8 __ovld __cnfn convert_uchar8_rtp(ulong8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(ulong8); +uchar8 __ovld __cnfn convert_uchar8_rtn(ulong8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(ulong8); +uchar8 __ovld __cnfn convert_uchar8(ulong8); +uchar8 __ovld __cnfn convert_uchar8_sat(ulong8); +uchar8 __ovld __cnfn convert_uchar8_rte(float8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(float8); +uchar8 __ovld __cnfn convert_uchar8_rtz(float8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(float8); +uchar8 __ovld __cnfn convert_uchar8_rtp(float8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(float8); +uchar8 __ovld __cnfn convert_uchar8_rtn(float8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(float8); +uchar8 __ovld __cnfn convert_uchar8(float8); +uchar8 __ovld __cnfn convert_uchar8_sat(float8); +short8 __ovld __cnfn convert_short8_rte(char8); +short8 __ovld __cnfn convert_short8_sat_rte(char8); +short8 __ovld __cnfn convert_short8_rtz(char8); +short8 __ovld __cnfn convert_short8_sat_rtz(char8); +short8 __ovld __cnfn convert_short8_rtp(char8); +short8 __ovld __cnfn convert_short8_sat_rtp(char8); +short8 __ovld __cnfn convert_short8_rtn(char8); +short8 __ovld __cnfn convert_short8_sat_rtn(char8); +short8 __ovld __cnfn convert_short8(char8); +short8 __ovld __cnfn convert_short8_sat(char8); +short8 __ovld __cnfn convert_short8_rte(uchar8); +short8 __ovld __cnfn convert_short8_sat_rte(uchar8); +short8 __ovld __cnfn convert_short8_rtz(uchar8); +short8 __ovld __cnfn convert_short8_sat_rtz(uchar8); +short8 __ovld __cnfn convert_short8_rtp(uchar8); +short8 __ovld __cnfn convert_short8_sat_rtp(uchar8); +short8 __ovld __cnfn convert_short8_rtn(uchar8); +short8 __ovld __cnfn convert_short8_sat_rtn(uchar8); +short8 __ovld __cnfn convert_short8(uchar8); +short8 __ovld __cnfn convert_short8_sat(uchar8); +short8 __ovld __cnfn convert_short8_rte(short8); +short8 __ovld __cnfn convert_short8_sat_rte(short8); +short8 __ovld __cnfn convert_short8_rtz(short8); +short8 __ovld __cnfn convert_short8_sat_rtz(short8); +short8 __ovld __cnfn convert_short8_rtp(short8); +short8 __ovld __cnfn convert_short8_sat_rtp(short8); +short8 __ovld __cnfn convert_short8_rtn(short8); +short8 __ovld __cnfn convert_short8_sat_rtn(short8); +short8 __ovld __cnfn convert_short8(short8); +short8 __ovld __cnfn convert_short8_sat(short8); +short8 __ovld __cnfn convert_short8_rte(ushort8); +short8 __ovld __cnfn convert_short8_sat_rte(ushort8); +short8 __ovld __cnfn convert_short8_rtz(ushort8); +short8 __ovld __cnfn convert_short8_sat_rtz(ushort8); +short8 __ovld __cnfn convert_short8_rtp(ushort8); +short8 __ovld __cnfn convert_short8_sat_rtp(ushort8); +short8 __ovld __cnfn convert_short8_rtn(ushort8); +short8 __ovld __cnfn convert_short8_sat_rtn(ushort8); +short8 __ovld __cnfn convert_short8(ushort8); +short8 __ovld __cnfn convert_short8_sat(ushort8); +short8 __ovld __cnfn convert_short8_rte(int8); +short8 __ovld __cnfn convert_short8_sat_rte(int8); +short8 __ovld __cnfn convert_short8_rtz(int8); +short8 __ovld __cnfn convert_short8_sat_rtz(int8); +short8 __ovld __cnfn convert_short8_rtp(int8); +short8 __ovld __cnfn convert_short8_sat_rtp(int8); +short8 __ovld __cnfn convert_short8_rtn(int8); +short8 __ovld __cnfn convert_short8_sat_rtn(int8); +short8 __ovld __cnfn convert_short8(int8); +short8 __ovld __cnfn convert_short8_sat(int8); +short8 __ovld __cnfn convert_short8_rte(uint8); +short8 __ovld __cnfn convert_short8_sat_rte(uint8); +short8 __ovld __cnfn convert_short8_rtz(uint8); +short8 __ovld __cnfn convert_short8_sat_rtz(uint8); +short8 __ovld __cnfn convert_short8_rtp(uint8); +short8 __ovld __cnfn convert_short8_sat_rtp(uint8); +short8 __ovld __cnfn convert_short8_rtn(uint8); +short8 __ovld __cnfn convert_short8_sat_rtn(uint8); +short8 __ovld __cnfn convert_short8(uint8); +short8 __ovld __cnfn convert_short8_sat(uint8); +short8 __ovld __cnfn convert_short8_rte(long8); +short8 __ovld __cnfn convert_short8_sat_rte(long8); +short8 __ovld __cnfn convert_short8_rtz(long8); +short8 __ovld __cnfn convert_short8_sat_rtz(long8); +short8 __ovld __cnfn convert_short8_rtp(long8); +short8 __ovld __cnfn convert_short8_sat_rtp(long8); +short8 __ovld __cnfn convert_short8_rtn(long8); +short8 __ovld __cnfn convert_short8_sat_rtn(long8); +short8 __ovld __cnfn convert_short8(long8); +short8 __ovld __cnfn convert_short8_sat(long8); +short8 __ovld __cnfn convert_short8_rte(ulong8); +short8 __ovld __cnfn convert_short8_sat_rte(ulong8); +short8 __ovld __cnfn convert_short8_rtz(ulong8); +short8 __ovld __cnfn convert_short8_sat_rtz(ulong8); +short8 __ovld __cnfn convert_short8_rtp(ulong8); +short8 __ovld __cnfn convert_short8_sat_rtp(ulong8); +short8 __ovld __cnfn convert_short8_rtn(ulong8); +short8 __ovld __cnfn convert_short8_sat_rtn(ulong8); +short8 __ovld __cnfn convert_short8(ulong8); +short8 __ovld __cnfn convert_short8_sat(ulong8); +short8 __ovld __cnfn convert_short8_rte(float8); +short8 __ovld __cnfn convert_short8_sat_rte(float8); +short8 __ovld __cnfn convert_short8_rtz(float8); +short8 __ovld __cnfn convert_short8_sat_rtz(float8); +short8 __ovld __cnfn convert_short8_rtp(float8); +short8 __ovld __cnfn convert_short8_sat_rtp(float8); +short8 __ovld __cnfn convert_short8_rtn(float8); +short8 __ovld __cnfn convert_short8_sat_rtn(float8); +short8 __ovld __cnfn convert_short8(float8); +short8 __ovld __cnfn convert_short8_sat(float8); +ushort8 __ovld __cnfn convert_ushort8_rte(char8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(char8); +ushort8 __ovld __cnfn convert_ushort8_rtz(char8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(char8); +ushort8 __ovld __cnfn convert_ushort8_rtp(char8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(char8); +ushort8 __ovld __cnfn convert_ushort8_rtn(char8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(char8); +ushort8 __ovld __cnfn convert_ushort8(char8); +ushort8 __ovld __cnfn convert_ushort8_sat(char8); +ushort8 __ovld __cnfn convert_ushort8_rte(uchar8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(uchar8); +ushort8 __ovld __cnfn convert_ushort8_rtz(uchar8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(uchar8); +ushort8 __ovld __cnfn convert_ushort8_rtp(uchar8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(uchar8); +ushort8 __ovld __cnfn convert_ushort8_rtn(uchar8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(uchar8); +ushort8 __ovld __cnfn convert_ushort8(uchar8); +ushort8 __ovld __cnfn convert_ushort8_sat(uchar8); +ushort8 __ovld __cnfn convert_ushort8_rte(short8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(short8); +ushort8 __ovld __cnfn convert_ushort8_rtz(short8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(short8); +ushort8 __ovld __cnfn convert_ushort8_rtp(short8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(short8); +ushort8 __ovld __cnfn convert_ushort8_rtn(short8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(short8); +ushort8 __ovld __cnfn convert_ushort8(short8); +ushort8 __ovld __cnfn convert_ushort8_sat(short8); +ushort8 __ovld __cnfn convert_ushort8_rte(ushort8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(ushort8); +ushort8 __ovld __cnfn convert_ushort8_rtz(ushort8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(ushort8); +ushort8 __ovld __cnfn convert_ushort8_rtp(ushort8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(ushort8); +ushort8 __ovld __cnfn convert_ushort8_rtn(ushort8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(ushort8); +ushort8 __ovld __cnfn convert_ushort8(ushort8); +ushort8 __ovld __cnfn convert_ushort8_sat(ushort8); +ushort8 __ovld __cnfn convert_ushort8_rte(int8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(int8); +ushort8 __ovld __cnfn convert_ushort8_rtz(int8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(int8); +ushort8 __ovld __cnfn convert_ushort8_rtp(int8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(int8); +ushort8 __ovld __cnfn convert_ushort8_rtn(int8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(int8); +ushort8 __ovld __cnfn convert_ushort8(int8); +ushort8 __ovld __cnfn convert_ushort8_sat(int8); +ushort8 __ovld __cnfn convert_ushort8_rte(uint8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(uint8); +ushort8 __ovld __cnfn convert_ushort8_rtz(uint8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(uint8); +ushort8 __ovld __cnfn convert_ushort8_rtp(uint8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(uint8); +ushort8 __ovld __cnfn convert_ushort8_rtn(uint8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(uint8); +ushort8 __ovld __cnfn convert_ushort8(uint8); +ushort8 __ovld __cnfn convert_ushort8_sat(uint8); +ushort8 __ovld __cnfn convert_ushort8_rte(long8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(long8); +ushort8 __ovld __cnfn convert_ushort8_rtz(long8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(long8); +ushort8 __ovld __cnfn convert_ushort8_rtp(long8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(long8); +ushort8 __ovld __cnfn convert_ushort8_rtn(long8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(long8); +ushort8 __ovld __cnfn convert_ushort8(long8); +ushort8 __ovld __cnfn convert_ushort8_sat(long8); +ushort8 __ovld __cnfn convert_ushort8_rte(ulong8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(ulong8); +ushort8 __ovld __cnfn convert_ushort8_rtz(ulong8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(ulong8); +ushort8 __ovld __cnfn convert_ushort8_rtp(ulong8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(ulong8); +ushort8 __ovld __cnfn convert_ushort8_rtn(ulong8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(ulong8); +ushort8 __ovld __cnfn convert_ushort8(ulong8); +ushort8 __ovld __cnfn convert_ushort8_sat(ulong8); +ushort8 __ovld __cnfn convert_ushort8_rte(float8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(float8); +ushort8 __ovld __cnfn convert_ushort8_rtz(float8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(float8); +ushort8 __ovld __cnfn convert_ushort8_rtp(float8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(float8); +ushort8 __ovld __cnfn convert_ushort8_rtn(float8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(float8); +ushort8 __ovld __cnfn convert_ushort8(float8); +ushort8 __ovld __cnfn convert_ushort8_sat(float8); +int8 __ovld __cnfn convert_int8_rte(char8); +int8 __ovld __cnfn convert_int8_sat_rte(char8); +int8 __ovld __cnfn convert_int8_rtz(char8); +int8 __ovld __cnfn convert_int8_sat_rtz(char8); +int8 __ovld __cnfn convert_int8_rtp(char8); +int8 __ovld __cnfn convert_int8_sat_rtp(char8); +int8 __ovld __cnfn convert_int8_rtn(char8); +int8 __ovld __cnfn convert_int8_sat_rtn(char8); +int8 __ovld __cnfn convert_int8(char8); +int8 __ovld __cnfn convert_int8_sat(char8); +int8 __ovld __cnfn convert_int8_rte(uchar8); +int8 __ovld __cnfn convert_int8_sat_rte(uchar8); +int8 __ovld __cnfn convert_int8_rtz(uchar8); +int8 __ovld __cnfn convert_int8_sat_rtz(uchar8); +int8 __ovld __cnfn convert_int8_rtp(uchar8); +int8 __ovld __cnfn convert_int8_sat_rtp(uchar8); +int8 __ovld __cnfn convert_int8_rtn(uchar8); +int8 __ovld __cnfn convert_int8_sat_rtn(uchar8); +int8 __ovld __cnfn convert_int8(uchar8); +int8 __ovld __cnfn convert_int8_sat(uchar8); +int8 __ovld __cnfn convert_int8_rte(short8); +int8 __ovld __cnfn convert_int8_sat_rte(short8); +int8 __ovld __cnfn convert_int8_rtz(short8); +int8 __ovld __cnfn convert_int8_sat_rtz(short8); +int8 __ovld __cnfn convert_int8_rtp(short8); +int8 __ovld __cnfn convert_int8_sat_rtp(short8); +int8 __ovld __cnfn convert_int8_rtn(short8); +int8 __ovld __cnfn convert_int8_sat_rtn(short8); +int8 __ovld __cnfn convert_int8(short8); +int8 __ovld __cnfn convert_int8_sat(short8); +int8 __ovld __cnfn convert_int8_rte(ushort8); +int8 __ovld __cnfn convert_int8_sat_rte(ushort8); +int8 __ovld __cnfn convert_int8_rtz(ushort8); +int8 __ovld __cnfn convert_int8_sat_rtz(ushort8); +int8 __ovld __cnfn convert_int8_rtp(ushort8); +int8 __ovld __cnfn convert_int8_sat_rtp(ushort8); +int8 __ovld __cnfn convert_int8_rtn(ushort8); +int8 __ovld __cnfn convert_int8_sat_rtn(ushort8); +int8 __ovld __cnfn convert_int8(ushort8); +int8 __ovld __cnfn convert_int8_sat(ushort8); +int8 __ovld __cnfn convert_int8_rte(int8); +int8 __ovld __cnfn convert_int8_sat_rte(int8); +int8 __ovld __cnfn convert_int8_rtz(int8); +int8 __ovld __cnfn convert_int8_sat_rtz(int8); +int8 __ovld __cnfn convert_int8_rtp(int8); +int8 __ovld __cnfn convert_int8_sat_rtp(int8); +int8 __ovld __cnfn convert_int8_rtn(int8); +int8 __ovld __cnfn convert_int8_sat_rtn(int8); +int8 __ovld __cnfn convert_int8(int8); +int8 __ovld __cnfn convert_int8_sat(int8); +int8 __ovld __cnfn convert_int8_rte(uint8); +int8 __ovld __cnfn convert_int8_sat_rte(uint8); +int8 __ovld __cnfn convert_int8_rtz(uint8); +int8 __ovld __cnfn convert_int8_sat_rtz(uint8); +int8 __ovld __cnfn convert_int8_rtp(uint8); +int8 __ovld __cnfn convert_int8_sat_rtp(uint8); +int8 __ovld __cnfn convert_int8_rtn(uint8); +int8 __ovld __cnfn convert_int8_sat_rtn(uint8); +int8 __ovld __cnfn convert_int8(uint8); +int8 __ovld __cnfn convert_int8_sat(uint8); +int8 __ovld __cnfn convert_int8_rte(long8); +int8 __ovld __cnfn convert_int8_sat_rte(long8); +int8 __ovld __cnfn convert_int8_rtz(long8); +int8 __ovld __cnfn convert_int8_sat_rtz(long8); +int8 __ovld __cnfn convert_int8_rtp(long8); +int8 __ovld __cnfn convert_int8_sat_rtp(long8); +int8 __ovld __cnfn convert_int8_rtn(long8); +int8 __ovld __cnfn convert_int8_sat_rtn(long8); +int8 __ovld __cnfn convert_int8(long8); +int8 __ovld __cnfn convert_int8_sat(long8); +int8 __ovld __cnfn convert_int8_rte(ulong8); +int8 __ovld __cnfn convert_int8_sat_rte(ulong8); +int8 __ovld __cnfn convert_int8_rtz(ulong8); +int8 __ovld __cnfn convert_int8_sat_rtz(ulong8); +int8 __ovld __cnfn convert_int8_rtp(ulong8); +int8 __ovld __cnfn convert_int8_sat_rtp(ulong8); +int8 __ovld __cnfn convert_int8_rtn(ulong8); +int8 __ovld __cnfn convert_int8_sat_rtn(ulong8); +int8 __ovld __cnfn convert_int8(ulong8); +int8 __ovld __cnfn convert_int8_sat(ulong8); +int8 __ovld __cnfn convert_int8_rte(float8); +int8 __ovld __cnfn convert_int8_sat_rte(float8); +int8 __ovld __cnfn convert_int8_rtz(float8); +int8 __ovld __cnfn convert_int8_sat_rtz(float8); +int8 __ovld __cnfn convert_int8_rtp(float8); +int8 __ovld __cnfn convert_int8_sat_rtp(float8); +int8 __ovld __cnfn convert_int8_rtn(float8); +int8 __ovld __cnfn convert_int8_sat_rtn(float8); +int8 __ovld __cnfn convert_int8(float8); +int8 __ovld __cnfn convert_int8_sat(float8); +uint8 __ovld __cnfn convert_uint8_rte(char8); +uint8 __ovld __cnfn convert_uint8_sat_rte(char8); +uint8 __ovld __cnfn convert_uint8_rtz(char8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(char8); +uint8 __ovld __cnfn convert_uint8_rtp(char8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(char8); +uint8 __ovld __cnfn convert_uint8_rtn(char8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(char8); +uint8 __ovld __cnfn convert_uint8(char8); +uint8 __ovld __cnfn convert_uint8_sat(char8); +uint8 __ovld __cnfn convert_uint8_rte(uchar8); +uint8 __ovld __cnfn convert_uint8_sat_rte(uchar8); +uint8 __ovld __cnfn convert_uint8_rtz(uchar8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(uchar8); +uint8 __ovld __cnfn convert_uint8_rtp(uchar8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(uchar8); +uint8 __ovld __cnfn convert_uint8_rtn(uchar8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(uchar8); +uint8 __ovld __cnfn convert_uint8(uchar8); +uint8 __ovld __cnfn convert_uint8_sat(uchar8); +uint8 __ovld __cnfn convert_uint8_rte(short8); +uint8 __ovld __cnfn convert_uint8_sat_rte(short8); +uint8 __ovld __cnfn convert_uint8_rtz(short8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(short8); +uint8 __ovld __cnfn convert_uint8_rtp(short8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(short8); +uint8 __ovld __cnfn convert_uint8_rtn(short8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(short8); +uint8 __ovld __cnfn convert_uint8(short8); +uint8 __ovld __cnfn convert_uint8_sat(short8); +uint8 __ovld __cnfn convert_uint8_rte(ushort8); +uint8 __ovld __cnfn convert_uint8_sat_rte(ushort8); +uint8 __ovld __cnfn convert_uint8_rtz(ushort8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(ushort8); +uint8 __ovld __cnfn convert_uint8_rtp(ushort8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(ushort8); +uint8 __ovld __cnfn convert_uint8_rtn(ushort8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(ushort8); +uint8 __ovld __cnfn convert_uint8(ushort8); +uint8 __ovld __cnfn convert_uint8_sat(ushort8); +uint8 __ovld __cnfn convert_uint8_rte(int8); +uint8 __ovld __cnfn convert_uint8_sat_rte(int8); +uint8 __ovld __cnfn convert_uint8_rtz(int8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(int8); +uint8 __ovld __cnfn convert_uint8_rtp(int8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(int8); +uint8 __ovld __cnfn convert_uint8_rtn(int8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(int8); +uint8 __ovld __cnfn convert_uint8(int8); +uint8 __ovld __cnfn convert_uint8_sat(int8); +uint8 __ovld __cnfn convert_uint8_rte(uint8); +uint8 __ovld __cnfn convert_uint8_sat_rte(uint8); +uint8 __ovld __cnfn convert_uint8_rtz(uint8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(uint8); +uint8 __ovld __cnfn convert_uint8_rtp(uint8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(uint8); +uint8 __ovld __cnfn convert_uint8_rtn(uint8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(uint8); +uint8 __ovld __cnfn convert_uint8(uint8); +uint8 __ovld __cnfn convert_uint8_sat(uint8); +uint8 __ovld __cnfn convert_uint8_rte(long8); +uint8 __ovld __cnfn convert_uint8_sat_rte(long8); +uint8 __ovld __cnfn convert_uint8_rtz(long8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(long8); +uint8 __ovld __cnfn convert_uint8_rtp(long8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(long8); +uint8 __ovld __cnfn convert_uint8_rtn(long8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(long8); +uint8 __ovld __cnfn convert_uint8(long8); +uint8 __ovld __cnfn convert_uint8_sat(long8); +uint8 __ovld __cnfn convert_uint8_rte(ulong8); +uint8 __ovld __cnfn convert_uint8_sat_rte(ulong8); +uint8 __ovld __cnfn convert_uint8_rtz(ulong8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(ulong8); +uint8 __ovld __cnfn convert_uint8_rtp(ulong8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(ulong8); +uint8 __ovld __cnfn convert_uint8_rtn(ulong8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(ulong8); +uint8 __ovld __cnfn convert_uint8(ulong8); +uint8 __ovld __cnfn convert_uint8_sat(ulong8); +uint8 __ovld __cnfn convert_uint8_rte(float8); +uint8 __ovld __cnfn convert_uint8_sat_rte(float8); +uint8 __ovld __cnfn convert_uint8_rtz(float8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(float8); +uint8 __ovld __cnfn convert_uint8_rtp(float8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(float8); +uint8 __ovld __cnfn convert_uint8_rtn(float8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(float8); +uint8 __ovld __cnfn convert_uint8(float8); +uint8 __ovld __cnfn convert_uint8_sat(float8); +long8 __ovld __cnfn convert_long8_rte(char8); +long8 __ovld __cnfn convert_long8_sat_rte(char8); +long8 __ovld __cnfn convert_long8_rtz(char8); +long8 __ovld __cnfn convert_long8_sat_rtz(char8); +long8 __ovld __cnfn convert_long8_rtp(char8); +long8 __ovld __cnfn convert_long8_sat_rtp(char8); +long8 __ovld __cnfn convert_long8_rtn(char8); +long8 __ovld __cnfn convert_long8_sat_rtn(char8); +long8 __ovld __cnfn convert_long8(char8); +long8 __ovld __cnfn convert_long8_sat(char8); +long8 __ovld __cnfn convert_long8_rte(uchar8); +long8 __ovld __cnfn convert_long8_sat_rte(uchar8); +long8 __ovld __cnfn convert_long8_rtz(uchar8); +long8 __ovld __cnfn convert_long8_sat_rtz(uchar8); +long8 __ovld __cnfn convert_long8_rtp(uchar8); +long8 __ovld __cnfn convert_long8_sat_rtp(uchar8); +long8 __ovld __cnfn convert_long8_rtn(uchar8); +long8 __ovld __cnfn convert_long8_sat_rtn(uchar8); +long8 __ovld __cnfn convert_long8(uchar8); +long8 __ovld __cnfn convert_long8_sat(uchar8); +long8 __ovld __cnfn convert_long8_rte(short8); +long8 __ovld __cnfn convert_long8_sat_rte(short8); +long8 __ovld __cnfn convert_long8_rtz(short8); +long8 __ovld __cnfn convert_long8_sat_rtz(short8); +long8 __ovld __cnfn convert_long8_rtp(short8); +long8 __ovld __cnfn convert_long8_sat_rtp(short8); +long8 __ovld __cnfn convert_long8_rtn(short8); +long8 __ovld __cnfn convert_long8_sat_rtn(short8); +long8 __ovld __cnfn convert_long8(short8); +long8 __ovld __cnfn convert_long8_sat(short8); +long8 __ovld __cnfn convert_long8_rte(ushort8); +long8 __ovld __cnfn convert_long8_sat_rte(ushort8); +long8 __ovld __cnfn convert_long8_rtz(ushort8); +long8 __ovld __cnfn convert_long8_sat_rtz(ushort8); +long8 __ovld __cnfn convert_long8_rtp(ushort8); +long8 __ovld __cnfn convert_long8_sat_rtp(ushort8); +long8 __ovld __cnfn convert_long8_rtn(ushort8); +long8 __ovld __cnfn convert_long8_sat_rtn(ushort8); +long8 __ovld __cnfn convert_long8(ushort8); +long8 __ovld __cnfn convert_long8_sat(ushort8); +long8 __ovld __cnfn convert_long8_rte(int8); +long8 __ovld __cnfn convert_long8_sat_rte(int8); +long8 __ovld __cnfn convert_long8_rtz(int8); +long8 __ovld __cnfn convert_long8_sat_rtz(int8); +long8 __ovld __cnfn convert_long8_rtp(int8); +long8 __ovld __cnfn convert_long8_sat_rtp(int8); +long8 __ovld __cnfn convert_long8_rtn(int8); +long8 __ovld __cnfn convert_long8_sat_rtn(int8); +long8 __ovld __cnfn convert_long8(int8); +long8 __ovld __cnfn convert_long8_sat(int8); +long8 __ovld __cnfn convert_long8_rte(uint8); +long8 __ovld __cnfn convert_long8_sat_rte(uint8); +long8 __ovld __cnfn convert_long8_rtz(uint8); +long8 __ovld __cnfn convert_long8_sat_rtz(uint8); +long8 __ovld __cnfn convert_long8_rtp(uint8); +long8 __ovld __cnfn convert_long8_sat_rtp(uint8); +long8 __ovld __cnfn convert_long8_rtn(uint8); +long8 __ovld __cnfn convert_long8_sat_rtn(uint8); +long8 __ovld __cnfn convert_long8(uint8); +long8 __ovld __cnfn convert_long8_sat(uint8); +long8 __ovld __cnfn convert_long8_rte(long8); +long8 __ovld __cnfn convert_long8_sat_rte(long8); +long8 __ovld __cnfn convert_long8_rtz(long8); +long8 __ovld __cnfn convert_long8_sat_rtz(long8); +long8 __ovld __cnfn convert_long8_rtp(long8); +long8 __ovld __cnfn convert_long8_sat_rtp(long8); +long8 __ovld __cnfn convert_long8_rtn(long8); +long8 __ovld __cnfn convert_long8_sat_rtn(long8); +long8 __ovld __cnfn convert_long8(long8); +long8 __ovld __cnfn convert_long8_sat(long8); +long8 __ovld __cnfn convert_long8_rte(ulong8); +long8 __ovld __cnfn convert_long8_sat_rte(ulong8); +long8 __ovld __cnfn convert_long8_rtz(ulong8); +long8 __ovld __cnfn convert_long8_sat_rtz(ulong8); +long8 __ovld __cnfn convert_long8_rtp(ulong8); +long8 __ovld __cnfn convert_long8_sat_rtp(ulong8); +long8 __ovld __cnfn convert_long8_rtn(ulong8); +long8 __ovld __cnfn convert_long8_sat_rtn(ulong8); +long8 __ovld __cnfn convert_long8(ulong8); +long8 __ovld __cnfn convert_long8_sat(ulong8); +long8 __ovld __cnfn convert_long8_rte(float8); +long8 __ovld __cnfn convert_long8_sat_rte(float8); +long8 __ovld __cnfn convert_long8_rtz(float8); +long8 __ovld __cnfn convert_long8_sat_rtz(float8); +long8 __ovld __cnfn convert_long8_rtp(float8); +long8 __ovld __cnfn convert_long8_sat_rtp(float8); +long8 __ovld __cnfn convert_long8_rtn(float8); +long8 __ovld __cnfn convert_long8_sat_rtn(float8); +long8 __ovld __cnfn convert_long8(float8); +long8 __ovld __cnfn convert_long8_sat(float8); +ulong8 __ovld __cnfn convert_ulong8_rte(char8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(char8); +ulong8 __ovld __cnfn convert_ulong8_rtz(char8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(char8); +ulong8 __ovld __cnfn convert_ulong8_rtp(char8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(char8); +ulong8 __ovld __cnfn convert_ulong8_rtn(char8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(char8); +ulong8 __ovld __cnfn convert_ulong8(char8); +ulong8 __ovld __cnfn convert_ulong8_sat(char8); +ulong8 __ovld __cnfn convert_ulong8_rte(uchar8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(uchar8); +ulong8 __ovld __cnfn convert_ulong8_rtz(uchar8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(uchar8); +ulong8 __ovld __cnfn convert_ulong8_rtp(uchar8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(uchar8); +ulong8 __ovld __cnfn convert_ulong8_rtn(uchar8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(uchar8); +ulong8 __ovld __cnfn convert_ulong8(uchar8); +ulong8 __ovld __cnfn convert_ulong8_sat(uchar8); +ulong8 __ovld __cnfn convert_ulong8_rte(short8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(short8); +ulong8 __ovld __cnfn convert_ulong8_rtz(short8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(short8); +ulong8 __ovld __cnfn convert_ulong8_rtp(short8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(short8); +ulong8 __ovld __cnfn convert_ulong8_rtn(short8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(short8); +ulong8 __ovld __cnfn convert_ulong8(short8); +ulong8 __ovld __cnfn convert_ulong8_sat(short8); +ulong8 __ovld __cnfn convert_ulong8_rte(ushort8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(ushort8); +ulong8 __ovld __cnfn convert_ulong8_rtz(ushort8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(ushort8); +ulong8 __ovld __cnfn convert_ulong8_rtp(ushort8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(ushort8); +ulong8 __ovld __cnfn convert_ulong8_rtn(ushort8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(ushort8); +ulong8 __ovld __cnfn convert_ulong8(ushort8); +ulong8 __ovld __cnfn convert_ulong8_sat(ushort8); +ulong8 __ovld __cnfn convert_ulong8_rte(int8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(int8); +ulong8 __ovld __cnfn convert_ulong8_rtz(int8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(int8); +ulong8 __ovld __cnfn convert_ulong8_rtp(int8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(int8); +ulong8 __ovld __cnfn convert_ulong8_rtn(int8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(int8); +ulong8 __ovld __cnfn convert_ulong8(int8); +ulong8 __ovld __cnfn convert_ulong8_sat(int8); +ulong8 __ovld __cnfn convert_ulong8_rte(uint8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(uint8); +ulong8 __ovld __cnfn convert_ulong8_rtz(uint8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(uint8); +ulong8 __ovld __cnfn convert_ulong8_rtp(uint8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(uint8); +ulong8 __ovld __cnfn convert_ulong8_rtn(uint8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(uint8); +ulong8 __ovld __cnfn convert_ulong8(uint8); +ulong8 __ovld __cnfn convert_ulong8_sat(uint8); +ulong8 __ovld __cnfn convert_ulong8_rte(long8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(long8); +ulong8 __ovld __cnfn convert_ulong8_rtz(long8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(long8); +ulong8 __ovld __cnfn convert_ulong8_rtp(long8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(long8); +ulong8 __ovld __cnfn convert_ulong8_rtn(long8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(long8); +ulong8 __ovld __cnfn convert_ulong8(long8); +ulong8 __ovld __cnfn convert_ulong8_sat(long8); +ulong8 __ovld __cnfn convert_ulong8_rte(ulong8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(ulong8); +ulong8 __ovld __cnfn convert_ulong8_rtz(ulong8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(ulong8); +ulong8 __ovld __cnfn convert_ulong8_rtp(ulong8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(ulong8); +ulong8 __ovld __cnfn convert_ulong8_rtn(ulong8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(ulong8); +ulong8 __ovld __cnfn convert_ulong8(ulong8); +ulong8 __ovld __cnfn convert_ulong8_sat(ulong8); +ulong8 __ovld __cnfn convert_ulong8_rte(float8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(float8); +ulong8 __ovld __cnfn convert_ulong8_rtz(float8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(float8); +ulong8 __ovld __cnfn convert_ulong8_rtp(float8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(float8); +ulong8 __ovld __cnfn convert_ulong8_rtn(float8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(float8); +ulong8 __ovld __cnfn convert_ulong8(float8); +ulong8 __ovld __cnfn convert_ulong8_sat(float8); +float8 __ovld __cnfn convert_float8_rte(char8); +float8 __ovld __cnfn convert_float8_rtz(char8); +float8 __ovld __cnfn convert_float8_rtp(char8); +float8 __ovld __cnfn convert_float8_rtn(char8); +float8 __ovld __cnfn convert_float8(char8); +float8 __ovld __cnfn convert_float8_rte(uchar8); +float8 __ovld __cnfn convert_float8_rtz(uchar8); +float8 __ovld __cnfn convert_float8_rtp(uchar8); +float8 __ovld __cnfn convert_float8_rtn(uchar8); +float8 __ovld __cnfn convert_float8(uchar8); +float8 __ovld __cnfn convert_float8_rte(short8); +float8 __ovld __cnfn convert_float8_rtz(short8); +float8 __ovld __cnfn convert_float8_rtp(short8); +float8 __ovld __cnfn convert_float8_rtn(short8); +float8 __ovld __cnfn convert_float8(short8); +float8 __ovld __cnfn convert_float8_rte(ushort8); +float8 __ovld __cnfn convert_float8_rtz(ushort8); +float8 __ovld __cnfn convert_float8_rtp(ushort8); +float8 __ovld __cnfn convert_float8_rtn(ushort8); +float8 __ovld __cnfn convert_float8(ushort8); +float8 __ovld __cnfn convert_float8_rte(int8); +float8 __ovld __cnfn convert_float8_rtz(int8); +float8 __ovld __cnfn convert_float8_rtp(int8); +float8 __ovld __cnfn convert_float8_rtn(int8); +float8 __ovld __cnfn convert_float8(int8); +float8 __ovld __cnfn convert_float8_rte(uint8); +float8 __ovld __cnfn convert_float8_rtz(uint8); +float8 __ovld __cnfn convert_float8_rtp(uint8); +float8 __ovld __cnfn convert_float8_rtn(uint8); +float8 __ovld __cnfn convert_float8(uint8); +float8 __ovld __cnfn convert_float8_rte(long8); +float8 __ovld __cnfn convert_float8_rtz(long8); +float8 __ovld __cnfn convert_float8_rtp(long8); +float8 __ovld __cnfn convert_float8_rtn(long8); +float8 __ovld __cnfn convert_float8(long8); +float8 __ovld __cnfn convert_float8_rte(ulong8); +float8 __ovld __cnfn convert_float8_rtz(ulong8); +float8 __ovld __cnfn convert_float8_rtp(ulong8); +float8 __ovld __cnfn convert_float8_rtn(ulong8); +float8 __ovld __cnfn convert_float8(ulong8); +float8 __ovld __cnfn convert_float8_rte(float8); +float8 __ovld __cnfn convert_float8_rtz(float8); +float8 __ovld __cnfn convert_float8_rtp(float8); +float8 __ovld __cnfn convert_float8_rtn(float8); +float8 __ovld __cnfn convert_float8(float8); +char16 __ovld __cnfn convert_char16_rte(char16); +char16 __ovld __cnfn convert_char16_sat_rte(char16); +char16 __ovld __cnfn convert_char16_rtz(char16); +char16 __ovld __cnfn convert_char16_sat_rtz(char16); +char16 __ovld __cnfn convert_char16_rtp(char16); +char16 __ovld __cnfn convert_char16_sat_rtp(char16); +char16 __ovld __cnfn convert_char16_rtn(char16); +char16 __ovld __cnfn convert_char16_sat_rtn(char16); +char16 __ovld __cnfn convert_char16(char16); +char16 __ovld __cnfn convert_char16_sat(char16); +char16 __ovld __cnfn convert_char16_rte(uchar16); +char16 __ovld __cnfn convert_char16_sat_rte(uchar16); +char16 __ovld __cnfn convert_char16_rtz(uchar16); +char16 __ovld __cnfn convert_char16_sat_rtz(uchar16); +char16 __ovld __cnfn convert_char16_rtp(uchar16); +char16 __ovld __cnfn convert_char16_sat_rtp(uchar16); +char16 __ovld __cnfn convert_char16_rtn(uchar16); +char16 __ovld __cnfn convert_char16_sat_rtn(uchar16); +char16 __ovld __cnfn convert_char16(uchar16); +char16 __ovld __cnfn convert_char16_sat(uchar16); +char16 __ovld __cnfn convert_char16_rte(short16); +char16 __ovld __cnfn convert_char16_sat_rte(short16); +char16 __ovld __cnfn convert_char16_rtz(short16); +char16 __ovld __cnfn convert_char16_sat_rtz(short16); +char16 __ovld __cnfn convert_char16_rtp(short16); +char16 __ovld __cnfn convert_char16_sat_rtp(short16); +char16 __ovld __cnfn convert_char16_rtn(short16); +char16 __ovld __cnfn convert_char16_sat_rtn(short16); +char16 __ovld __cnfn convert_char16(short16); +char16 __ovld __cnfn convert_char16_sat(short16); +char16 __ovld __cnfn convert_char16_rte(ushort16); +char16 __ovld __cnfn convert_char16_sat_rte(ushort16); +char16 __ovld __cnfn convert_char16_rtz(ushort16); +char16 __ovld __cnfn convert_char16_sat_rtz(ushort16); +char16 __ovld __cnfn convert_char16_rtp(ushort16); +char16 __ovld __cnfn convert_char16_sat_rtp(ushort16); +char16 __ovld __cnfn convert_char16_rtn(ushort16); +char16 __ovld __cnfn convert_char16_sat_rtn(ushort16); +char16 __ovld __cnfn convert_char16(ushort16); +char16 __ovld __cnfn convert_char16_sat(ushort16); +char16 __ovld __cnfn convert_char16_rte(int16); +char16 __ovld __cnfn convert_char16_sat_rte(int16); +char16 __ovld __cnfn convert_char16_rtz(int16); +char16 __ovld __cnfn convert_char16_sat_rtz(int16); +char16 __ovld __cnfn convert_char16_rtp(int16); +char16 __ovld __cnfn convert_char16_sat_rtp(int16); +char16 __ovld __cnfn convert_char16_rtn(int16); +char16 __ovld __cnfn convert_char16_sat_rtn(int16); +char16 __ovld __cnfn convert_char16(int16); +char16 __ovld __cnfn convert_char16_sat(int16); +char16 __ovld __cnfn convert_char16_rte(uint16); +char16 __ovld __cnfn convert_char16_sat_rte(uint16); +char16 __ovld __cnfn convert_char16_rtz(uint16); +char16 __ovld __cnfn convert_char16_sat_rtz(uint16); +char16 __ovld __cnfn convert_char16_rtp(uint16); +char16 __ovld __cnfn convert_char16_sat_rtp(uint16); +char16 __ovld __cnfn convert_char16_rtn(uint16); +char16 __ovld __cnfn convert_char16_sat_rtn(uint16); +char16 __ovld __cnfn convert_char16(uint16); +char16 __ovld __cnfn convert_char16_sat(uint16); +char16 __ovld __cnfn convert_char16_rte(long16); +char16 __ovld __cnfn convert_char16_sat_rte(long16); +char16 __ovld __cnfn convert_char16_rtz(long16); +char16 __ovld __cnfn convert_char16_sat_rtz(long16); +char16 __ovld __cnfn convert_char16_rtp(long16); +char16 __ovld __cnfn convert_char16_sat_rtp(long16); +char16 __ovld __cnfn convert_char16_rtn(long16); +char16 __ovld __cnfn convert_char16_sat_rtn(long16); +char16 __ovld __cnfn convert_char16(long16); +char16 __ovld __cnfn convert_char16_sat(long16); +char16 __ovld __cnfn convert_char16_rte(ulong16); +char16 __ovld __cnfn convert_char16_sat_rte(ulong16); +char16 __ovld __cnfn convert_char16_rtz(ulong16); +char16 __ovld __cnfn convert_char16_sat_rtz(ulong16); +char16 __ovld __cnfn convert_char16_rtp(ulong16); +char16 __ovld __cnfn convert_char16_sat_rtp(ulong16); +char16 __ovld __cnfn convert_char16_rtn(ulong16); +char16 __ovld __cnfn convert_char16_sat_rtn(ulong16); +char16 __ovld __cnfn convert_char16(ulong16); +char16 __ovld __cnfn convert_char16_sat(ulong16); +char16 __ovld __cnfn convert_char16_rte(float16); +char16 __ovld __cnfn convert_char16_sat_rte(float16); +char16 __ovld __cnfn convert_char16_rtz(float16); +char16 __ovld __cnfn convert_char16_sat_rtz(float16); +char16 __ovld __cnfn convert_char16_rtp(float16); +char16 __ovld __cnfn convert_char16_sat_rtp(float16); +char16 __ovld __cnfn convert_char16_rtn(float16); +char16 __ovld __cnfn convert_char16_sat_rtn(float16); +char16 __ovld __cnfn convert_char16(float16); +char16 __ovld __cnfn convert_char16_sat(float16); +uchar16 __ovld __cnfn convert_uchar16_rte(char16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(char16); +uchar16 __ovld __cnfn convert_uchar16_rtz(char16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(char16); +uchar16 __ovld __cnfn convert_uchar16_rtp(char16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(char16); +uchar16 __ovld __cnfn convert_uchar16_rtn(char16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(char16); +uchar16 __ovld __cnfn convert_uchar16(char16); +uchar16 __ovld __cnfn convert_uchar16_sat(char16); +uchar16 __ovld __cnfn convert_uchar16_rte(uchar16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(uchar16); +uchar16 __ovld __cnfn convert_uchar16_rtz(uchar16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(uchar16); +uchar16 __ovld __cnfn convert_uchar16_rtp(uchar16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(uchar16); +uchar16 __ovld __cnfn convert_uchar16_rtn(uchar16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(uchar16); +uchar16 __ovld __cnfn convert_uchar16(uchar16); +uchar16 __ovld __cnfn convert_uchar16_sat(uchar16); +uchar16 __ovld __cnfn convert_uchar16_rte(short16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(short16); +uchar16 __ovld __cnfn convert_uchar16_rtz(short16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(short16); +uchar16 __ovld __cnfn convert_uchar16_rtp(short16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(short16); +uchar16 __ovld __cnfn convert_uchar16_rtn(short16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(short16); +uchar16 __ovld __cnfn convert_uchar16(short16); +uchar16 __ovld __cnfn convert_uchar16_sat(short16); +uchar16 __ovld __cnfn convert_uchar16_rte(ushort16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(ushort16); +uchar16 __ovld __cnfn convert_uchar16_rtz(ushort16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(ushort16); +uchar16 __ovld __cnfn convert_uchar16_rtp(ushort16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(ushort16); +uchar16 __ovld __cnfn convert_uchar16_rtn(ushort16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(ushort16); +uchar16 __ovld __cnfn convert_uchar16(ushort16); +uchar16 __ovld __cnfn convert_uchar16_sat(ushort16); +uchar16 __ovld __cnfn convert_uchar16_rte(int16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(int16); +uchar16 __ovld __cnfn convert_uchar16_rtz(int16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(int16); +uchar16 __ovld __cnfn convert_uchar16_rtp(int16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(int16); +uchar16 __ovld __cnfn convert_uchar16_rtn(int16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(int16); +uchar16 __ovld __cnfn convert_uchar16(int16); +uchar16 __ovld __cnfn convert_uchar16_sat(int16); +uchar16 __ovld __cnfn convert_uchar16_rte(uint16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(uint16); +uchar16 __ovld __cnfn convert_uchar16_rtz(uint16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(uint16); +uchar16 __ovld __cnfn convert_uchar16_rtp(uint16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(uint16); +uchar16 __ovld __cnfn convert_uchar16_rtn(uint16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(uint16); +uchar16 __ovld __cnfn convert_uchar16(uint16); +uchar16 __ovld __cnfn convert_uchar16_sat(uint16); +uchar16 __ovld __cnfn convert_uchar16_rte(long16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(long16); +uchar16 __ovld __cnfn convert_uchar16_rtz(long16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(long16); +uchar16 __ovld __cnfn convert_uchar16_rtp(long16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(long16); +uchar16 __ovld __cnfn convert_uchar16_rtn(long16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(long16); +uchar16 __ovld __cnfn convert_uchar16(long16); +uchar16 __ovld __cnfn convert_uchar16_sat(long16); +uchar16 __ovld __cnfn convert_uchar16_rte(ulong16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(ulong16); +uchar16 __ovld __cnfn convert_uchar16_rtz(ulong16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(ulong16); +uchar16 __ovld __cnfn convert_uchar16_rtp(ulong16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(ulong16); +uchar16 __ovld __cnfn convert_uchar16_rtn(ulong16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(ulong16); +uchar16 __ovld __cnfn convert_uchar16(ulong16); +uchar16 __ovld __cnfn convert_uchar16_sat(ulong16); +uchar16 __ovld __cnfn convert_uchar16_rte(float16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(float16); +uchar16 __ovld __cnfn convert_uchar16_rtz(float16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(float16); +uchar16 __ovld __cnfn convert_uchar16_rtp(float16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(float16); +uchar16 __ovld __cnfn convert_uchar16_rtn(float16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(float16); +uchar16 __ovld __cnfn convert_uchar16(float16); +uchar16 __ovld __cnfn convert_uchar16_sat(float16); +short16 __ovld __cnfn convert_short16_rte(char16); +short16 __ovld __cnfn convert_short16_sat_rte(char16); +short16 __ovld __cnfn convert_short16_rtz(char16); +short16 __ovld __cnfn convert_short16_sat_rtz(char16); +short16 __ovld __cnfn convert_short16_rtp(char16); +short16 __ovld __cnfn convert_short16_sat_rtp(char16); +short16 __ovld __cnfn convert_short16_rtn(char16); +short16 __ovld __cnfn convert_short16_sat_rtn(char16); +short16 __ovld __cnfn convert_short16(char16); +short16 __ovld __cnfn convert_short16_sat(char16); +short16 __ovld __cnfn convert_short16_rte(uchar16); +short16 __ovld __cnfn convert_short16_sat_rte(uchar16); +short16 __ovld __cnfn convert_short16_rtz(uchar16); +short16 __ovld __cnfn convert_short16_sat_rtz(uchar16); +short16 __ovld __cnfn convert_short16_rtp(uchar16); +short16 __ovld __cnfn convert_short16_sat_rtp(uchar16); +short16 __ovld __cnfn convert_short16_rtn(uchar16); +short16 __ovld __cnfn convert_short16_sat_rtn(uchar16); +short16 __ovld __cnfn convert_short16(uchar16); +short16 __ovld __cnfn convert_short16_sat(uchar16); +short16 __ovld __cnfn convert_short16_rte(short16); +short16 __ovld __cnfn convert_short16_sat_rte(short16); +short16 __ovld __cnfn convert_short16_rtz(short16); +short16 __ovld __cnfn convert_short16_sat_rtz(short16); +short16 __ovld __cnfn convert_short16_rtp(short16); +short16 __ovld __cnfn convert_short16_sat_rtp(short16); +short16 __ovld __cnfn convert_short16_rtn(short16); +short16 __ovld __cnfn convert_short16_sat_rtn(short16); +short16 __ovld __cnfn convert_short16(short16); +short16 __ovld __cnfn convert_short16_sat(short16); +short16 __ovld __cnfn convert_short16_rte(ushort16); +short16 __ovld __cnfn convert_short16_sat_rte(ushort16); +short16 __ovld __cnfn convert_short16_rtz(ushort16); +short16 __ovld __cnfn convert_short16_sat_rtz(ushort16); +short16 __ovld __cnfn convert_short16_rtp(ushort16); +short16 __ovld __cnfn convert_short16_sat_rtp(ushort16); +short16 __ovld __cnfn convert_short16_rtn(ushort16); +short16 __ovld __cnfn convert_short16_sat_rtn(ushort16); +short16 __ovld __cnfn convert_short16(ushort16); +short16 __ovld __cnfn convert_short16_sat(ushort16); +short16 __ovld __cnfn convert_short16_rte(int16); +short16 __ovld __cnfn convert_short16_sat_rte(int16); +short16 __ovld __cnfn convert_short16_rtz(int16); +short16 __ovld __cnfn convert_short16_sat_rtz(int16); +short16 __ovld __cnfn convert_short16_rtp(int16); +short16 __ovld __cnfn convert_short16_sat_rtp(int16); +short16 __ovld __cnfn convert_short16_rtn(int16); +short16 __ovld __cnfn convert_short16_sat_rtn(int16); +short16 __ovld __cnfn convert_short16(int16); +short16 __ovld __cnfn convert_short16_sat(int16); +short16 __ovld __cnfn convert_short16_rte(uint16); +short16 __ovld __cnfn convert_short16_sat_rte(uint16); +short16 __ovld __cnfn convert_short16_rtz(uint16); +short16 __ovld __cnfn convert_short16_sat_rtz(uint16); +short16 __ovld __cnfn convert_short16_rtp(uint16); +short16 __ovld __cnfn convert_short16_sat_rtp(uint16); +short16 __ovld __cnfn convert_short16_rtn(uint16); +short16 __ovld __cnfn convert_short16_sat_rtn(uint16); +short16 __ovld __cnfn convert_short16(uint16); +short16 __ovld __cnfn convert_short16_sat(uint16); +short16 __ovld __cnfn convert_short16_rte(long16); +short16 __ovld __cnfn convert_short16_sat_rte(long16); +short16 __ovld __cnfn convert_short16_rtz(long16); +short16 __ovld __cnfn convert_short16_sat_rtz(long16); +short16 __ovld __cnfn convert_short16_rtp(long16); +short16 __ovld __cnfn convert_short16_sat_rtp(long16); +short16 __ovld __cnfn convert_short16_rtn(long16); +short16 __ovld __cnfn convert_short16_sat_rtn(long16); +short16 __ovld __cnfn convert_short16(long16); +short16 __ovld __cnfn convert_short16_sat(long16); +short16 __ovld __cnfn convert_short16_rte(ulong16); +short16 __ovld __cnfn convert_short16_sat_rte(ulong16); +short16 __ovld __cnfn convert_short16_rtz(ulong16); +short16 __ovld __cnfn convert_short16_sat_rtz(ulong16); +short16 __ovld __cnfn convert_short16_rtp(ulong16); +short16 __ovld __cnfn convert_short16_sat_rtp(ulong16); +short16 __ovld __cnfn convert_short16_rtn(ulong16); +short16 __ovld __cnfn convert_short16_sat_rtn(ulong16); +short16 __ovld __cnfn convert_short16(ulong16); +short16 __ovld __cnfn convert_short16_sat(ulong16); +short16 __ovld __cnfn convert_short16_rte(float16); +short16 __ovld __cnfn convert_short16_sat_rte(float16); +short16 __ovld __cnfn convert_short16_rtz(float16); +short16 __ovld __cnfn convert_short16_sat_rtz(float16); +short16 __ovld __cnfn convert_short16_rtp(float16); +short16 __ovld __cnfn convert_short16_sat_rtp(float16); +short16 __ovld __cnfn convert_short16_rtn(float16); +short16 __ovld __cnfn convert_short16_sat_rtn(float16); +short16 __ovld __cnfn convert_short16(float16); +short16 __ovld __cnfn convert_short16_sat(float16); +ushort16 __ovld __cnfn convert_ushort16_rte(char16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(char16); +ushort16 __ovld __cnfn convert_ushort16_rtz(char16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(char16); +ushort16 __ovld __cnfn convert_ushort16_rtp(char16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(char16); +ushort16 __ovld __cnfn convert_ushort16_rtn(char16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(char16); +ushort16 __ovld __cnfn convert_ushort16(char16); +ushort16 __ovld __cnfn convert_ushort16_sat(char16); +ushort16 __ovld __cnfn convert_ushort16_rte(uchar16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(uchar16); +ushort16 __ovld __cnfn convert_ushort16_rtz(uchar16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(uchar16); +ushort16 __ovld __cnfn convert_ushort16_rtp(uchar16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(uchar16); +ushort16 __ovld __cnfn convert_ushort16_rtn(uchar16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(uchar16); +ushort16 __ovld __cnfn convert_ushort16(uchar16); +ushort16 __ovld __cnfn convert_ushort16_sat(uchar16); +ushort16 __ovld __cnfn convert_ushort16_rte(short16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(short16); +ushort16 __ovld __cnfn convert_ushort16_rtz(short16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(short16); +ushort16 __ovld __cnfn convert_ushort16_rtp(short16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(short16); +ushort16 __ovld __cnfn convert_ushort16_rtn(short16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(short16); +ushort16 __ovld __cnfn convert_ushort16(short16); +ushort16 __ovld __cnfn convert_ushort16_sat(short16); +ushort16 __ovld __cnfn convert_ushort16_rte(ushort16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(ushort16); +ushort16 __ovld __cnfn convert_ushort16_rtz(ushort16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(ushort16); +ushort16 __ovld __cnfn convert_ushort16_rtp(ushort16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(ushort16); +ushort16 __ovld __cnfn convert_ushort16_rtn(ushort16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(ushort16); +ushort16 __ovld __cnfn convert_ushort16(ushort16); +ushort16 __ovld __cnfn convert_ushort16_sat(ushort16); +ushort16 __ovld __cnfn convert_ushort16_rte(int16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(int16); +ushort16 __ovld __cnfn convert_ushort16_rtz(int16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(int16); +ushort16 __ovld __cnfn convert_ushort16_rtp(int16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(int16); +ushort16 __ovld __cnfn convert_ushort16_rtn(int16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(int16); +ushort16 __ovld __cnfn convert_ushort16(int16); +ushort16 __ovld __cnfn convert_ushort16_sat(int16); +ushort16 __ovld __cnfn convert_ushort16_rte(uint16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(uint16); +ushort16 __ovld __cnfn convert_ushort16_rtz(uint16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(uint16); +ushort16 __ovld __cnfn convert_ushort16_rtp(uint16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(uint16); +ushort16 __ovld __cnfn convert_ushort16_rtn(uint16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(uint16); +ushort16 __ovld __cnfn convert_ushort16(uint16); +ushort16 __ovld __cnfn convert_ushort16_sat(uint16); +ushort16 __ovld __cnfn convert_ushort16_rte(long16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(long16); +ushort16 __ovld __cnfn convert_ushort16_rtz(long16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(long16); +ushort16 __ovld __cnfn convert_ushort16_rtp(long16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(long16); +ushort16 __ovld __cnfn convert_ushort16_rtn(long16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(long16); +ushort16 __ovld __cnfn convert_ushort16(long16); +ushort16 __ovld __cnfn convert_ushort16_sat(long16); +ushort16 __ovld __cnfn convert_ushort16_rte(ulong16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(ulong16); +ushort16 __ovld __cnfn convert_ushort16_rtz(ulong16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(ulong16); +ushort16 __ovld __cnfn convert_ushort16_rtp(ulong16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(ulong16); +ushort16 __ovld __cnfn convert_ushort16_rtn(ulong16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(ulong16); +ushort16 __ovld __cnfn convert_ushort16(ulong16); +ushort16 __ovld __cnfn convert_ushort16_sat(ulong16); +ushort16 __ovld __cnfn convert_ushort16_rte(float16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(float16); +ushort16 __ovld __cnfn convert_ushort16_rtz(float16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(float16); +ushort16 __ovld __cnfn convert_ushort16_rtp(float16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(float16); +ushort16 __ovld __cnfn convert_ushort16_rtn(float16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(float16); +ushort16 __ovld __cnfn convert_ushort16(float16); +ushort16 __ovld __cnfn convert_ushort16_sat(float16); +int16 __ovld __cnfn convert_int16_rte(char16); +int16 __ovld __cnfn convert_int16_sat_rte(char16); +int16 __ovld __cnfn convert_int16_rtz(char16); +int16 __ovld __cnfn convert_int16_sat_rtz(char16); +int16 __ovld __cnfn convert_int16_rtp(char16); +int16 __ovld __cnfn convert_int16_sat_rtp(char16); +int16 __ovld __cnfn convert_int16_rtn(char16); +int16 __ovld __cnfn convert_int16_sat_rtn(char16); +int16 __ovld __cnfn convert_int16(char16); +int16 __ovld __cnfn convert_int16_sat(char16); +int16 __ovld __cnfn convert_int16_rte(uchar16); +int16 __ovld __cnfn convert_int16_sat_rte(uchar16); +int16 __ovld __cnfn convert_int16_rtz(uchar16); +int16 __ovld __cnfn convert_int16_sat_rtz(uchar16); +int16 __ovld __cnfn convert_int16_rtp(uchar16); +int16 __ovld __cnfn convert_int16_sat_rtp(uchar16); +int16 __ovld __cnfn convert_int16_rtn(uchar16); +int16 __ovld __cnfn convert_int16_sat_rtn(uchar16); +int16 __ovld __cnfn convert_int16(uchar16); +int16 __ovld __cnfn convert_int16_sat(uchar16); +int16 __ovld __cnfn convert_int16_rte(short16); +int16 __ovld __cnfn convert_int16_sat_rte(short16); +int16 __ovld __cnfn convert_int16_rtz(short16); +int16 __ovld __cnfn convert_int16_sat_rtz(short16); +int16 __ovld __cnfn convert_int16_rtp(short16); +int16 __ovld __cnfn convert_int16_sat_rtp(short16); +int16 __ovld __cnfn convert_int16_rtn(short16); +int16 __ovld __cnfn convert_int16_sat_rtn(short16); +int16 __ovld __cnfn convert_int16(short16); +int16 __ovld __cnfn convert_int16_sat(short16); +int16 __ovld __cnfn convert_int16_rte(ushort16); +int16 __ovld __cnfn convert_int16_sat_rte(ushort16); +int16 __ovld __cnfn convert_int16_rtz(ushort16); +int16 __ovld __cnfn convert_int16_sat_rtz(ushort16); +int16 __ovld __cnfn convert_int16_rtp(ushort16); +int16 __ovld __cnfn convert_int16_sat_rtp(ushort16); +int16 __ovld __cnfn convert_int16_rtn(ushort16); +int16 __ovld __cnfn convert_int16_sat_rtn(ushort16); +int16 __ovld __cnfn convert_int16(ushort16); +int16 __ovld __cnfn convert_int16_sat(ushort16); +int16 __ovld __cnfn convert_int16_rte(int16); +int16 __ovld __cnfn convert_int16_sat_rte(int16); +int16 __ovld __cnfn convert_int16_rtz(int16); +int16 __ovld __cnfn convert_int16_sat_rtz(int16); +int16 __ovld __cnfn convert_int16_rtp(int16); +int16 __ovld __cnfn convert_int16_sat_rtp(int16); +int16 __ovld __cnfn convert_int16_rtn(int16); +int16 __ovld __cnfn convert_int16_sat_rtn(int16); +int16 __ovld __cnfn convert_int16(int16); +int16 __ovld __cnfn convert_int16_sat(int16); +int16 __ovld __cnfn convert_int16_rte(uint16); +int16 __ovld __cnfn convert_int16_sat_rte(uint16); +int16 __ovld __cnfn convert_int16_rtz(uint16); +int16 __ovld __cnfn convert_int16_sat_rtz(uint16); +int16 __ovld __cnfn convert_int16_rtp(uint16); +int16 __ovld __cnfn convert_int16_sat_rtp(uint16); +int16 __ovld __cnfn convert_int16_rtn(uint16); +int16 __ovld __cnfn convert_int16_sat_rtn(uint16); +int16 __ovld __cnfn convert_int16(uint16); +int16 __ovld __cnfn convert_int16_sat(uint16); +int16 __ovld __cnfn convert_int16_rte(long16); +int16 __ovld __cnfn convert_int16_sat_rte(long16); +int16 __ovld __cnfn convert_int16_rtz(long16); +int16 __ovld __cnfn convert_int16_sat_rtz(long16); +int16 __ovld __cnfn convert_int16_rtp(long16); +int16 __ovld __cnfn convert_int16_sat_rtp(long16); +int16 __ovld __cnfn convert_int16_rtn(long16); +int16 __ovld __cnfn convert_int16_sat_rtn(long16); +int16 __ovld __cnfn convert_int16(long16); +int16 __ovld __cnfn convert_int16_sat(long16); +int16 __ovld __cnfn convert_int16_rte(ulong16); +int16 __ovld __cnfn convert_int16_sat_rte(ulong16); +int16 __ovld __cnfn convert_int16_rtz(ulong16); +int16 __ovld __cnfn convert_int16_sat_rtz(ulong16); +int16 __ovld __cnfn convert_int16_rtp(ulong16); +int16 __ovld __cnfn convert_int16_sat_rtp(ulong16); +int16 __ovld __cnfn convert_int16_rtn(ulong16); +int16 __ovld __cnfn convert_int16_sat_rtn(ulong16); +int16 __ovld __cnfn convert_int16(ulong16); +int16 __ovld __cnfn convert_int16_sat(ulong16); +int16 __ovld __cnfn convert_int16_rte(float16); +int16 __ovld __cnfn convert_int16_sat_rte(float16); +int16 __ovld __cnfn convert_int16_rtz(float16); +int16 __ovld __cnfn convert_int16_sat_rtz(float16); +int16 __ovld __cnfn convert_int16_rtp(float16); +int16 __ovld __cnfn convert_int16_sat_rtp(float16); +int16 __ovld __cnfn convert_int16_rtn(float16); +int16 __ovld __cnfn convert_int16_sat_rtn(float16); +int16 __ovld __cnfn convert_int16(float16); +int16 __ovld __cnfn convert_int16_sat(float16); +uint16 __ovld __cnfn convert_uint16_rte(char16); +uint16 __ovld __cnfn convert_uint16_sat_rte(char16); +uint16 __ovld __cnfn convert_uint16_rtz(char16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(char16); +uint16 __ovld __cnfn convert_uint16_rtp(char16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(char16); +uint16 __ovld __cnfn convert_uint16_rtn(char16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(char16); +uint16 __ovld __cnfn convert_uint16(char16); +uint16 __ovld __cnfn convert_uint16_sat(char16); +uint16 __ovld __cnfn convert_uint16_rte(uchar16); +uint16 __ovld __cnfn convert_uint16_sat_rte(uchar16); +uint16 __ovld __cnfn convert_uint16_rtz(uchar16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(uchar16); +uint16 __ovld __cnfn convert_uint16_rtp(uchar16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(uchar16); +uint16 __ovld __cnfn convert_uint16_rtn(uchar16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(uchar16); +uint16 __ovld __cnfn convert_uint16(uchar16); +uint16 __ovld __cnfn convert_uint16_sat(uchar16); +uint16 __ovld __cnfn convert_uint16_rte(short16); +uint16 __ovld __cnfn convert_uint16_sat_rte(short16); +uint16 __ovld __cnfn convert_uint16_rtz(short16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(short16); +uint16 __ovld __cnfn convert_uint16_rtp(short16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(short16); +uint16 __ovld __cnfn convert_uint16_rtn(short16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(short16); +uint16 __ovld __cnfn convert_uint16(short16); +uint16 __ovld __cnfn convert_uint16_sat(short16); +uint16 __ovld __cnfn convert_uint16_rte(ushort16); +uint16 __ovld __cnfn convert_uint16_sat_rte(ushort16); +uint16 __ovld __cnfn convert_uint16_rtz(ushort16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(ushort16); +uint16 __ovld __cnfn convert_uint16_rtp(ushort16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(ushort16); +uint16 __ovld __cnfn convert_uint16_rtn(ushort16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(ushort16); +uint16 __ovld __cnfn convert_uint16(ushort16); +uint16 __ovld __cnfn convert_uint16_sat(ushort16); +uint16 __ovld __cnfn convert_uint16_rte(int16); +uint16 __ovld __cnfn convert_uint16_sat_rte(int16); +uint16 __ovld __cnfn convert_uint16_rtz(int16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(int16); +uint16 __ovld __cnfn convert_uint16_rtp(int16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(int16); +uint16 __ovld __cnfn convert_uint16_rtn(int16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(int16); +uint16 __ovld __cnfn convert_uint16(int16); +uint16 __ovld __cnfn convert_uint16_sat(int16); +uint16 __ovld __cnfn convert_uint16_rte(uint16); +uint16 __ovld __cnfn convert_uint16_sat_rte(uint16); +uint16 __ovld __cnfn convert_uint16_rtz(uint16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(uint16); +uint16 __ovld __cnfn convert_uint16_rtp(uint16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(uint16); +uint16 __ovld __cnfn convert_uint16_rtn(uint16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(uint16); +uint16 __ovld __cnfn convert_uint16(uint16); +uint16 __ovld __cnfn convert_uint16_sat(uint16); +uint16 __ovld __cnfn convert_uint16_rte(long16); +uint16 __ovld __cnfn convert_uint16_sat_rte(long16); +uint16 __ovld __cnfn convert_uint16_rtz(long16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(long16); +uint16 __ovld __cnfn convert_uint16_rtp(long16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(long16); +uint16 __ovld __cnfn convert_uint16_rtn(long16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(long16); +uint16 __ovld __cnfn convert_uint16(long16); +uint16 __ovld __cnfn convert_uint16_sat(long16); +uint16 __ovld __cnfn convert_uint16_rte(ulong16); +uint16 __ovld __cnfn convert_uint16_sat_rte(ulong16); +uint16 __ovld __cnfn convert_uint16_rtz(ulong16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(ulong16); +uint16 __ovld __cnfn convert_uint16_rtp(ulong16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(ulong16); +uint16 __ovld __cnfn convert_uint16_rtn(ulong16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(ulong16); +uint16 __ovld __cnfn convert_uint16(ulong16); +uint16 __ovld __cnfn convert_uint16_sat(ulong16); +uint16 __ovld __cnfn convert_uint16_rte(float16); +uint16 __ovld __cnfn convert_uint16_sat_rte(float16); +uint16 __ovld __cnfn convert_uint16_rtz(float16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(float16); +uint16 __ovld __cnfn convert_uint16_rtp(float16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(float16); +uint16 __ovld __cnfn convert_uint16_rtn(float16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(float16); +uint16 __ovld __cnfn convert_uint16(float16); +uint16 __ovld __cnfn convert_uint16_sat(float16); +long16 __ovld __cnfn convert_long16_rte(char16); +long16 __ovld __cnfn convert_long16_sat_rte(char16); +long16 __ovld __cnfn convert_long16_rtz(char16); +long16 __ovld __cnfn convert_long16_sat_rtz(char16); +long16 __ovld __cnfn convert_long16_rtp(char16); +long16 __ovld __cnfn convert_long16_sat_rtp(char16); +long16 __ovld __cnfn convert_long16_rtn(char16); +long16 __ovld __cnfn convert_long16_sat_rtn(char16); +long16 __ovld __cnfn convert_long16(char16); +long16 __ovld __cnfn convert_long16_sat(char16); +long16 __ovld __cnfn convert_long16_rte(uchar16); +long16 __ovld __cnfn convert_long16_sat_rte(uchar16); +long16 __ovld __cnfn convert_long16_rtz(uchar16); +long16 __ovld __cnfn convert_long16_sat_rtz(uchar16); +long16 __ovld __cnfn convert_long16_rtp(uchar16); +long16 __ovld __cnfn convert_long16_sat_rtp(uchar16); +long16 __ovld __cnfn convert_long16_rtn(uchar16); +long16 __ovld __cnfn convert_long16_sat_rtn(uchar16); +long16 __ovld __cnfn convert_long16(uchar16); +long16 __ovld __cnfn convert_long16_sat(uchar16); +long16 __ovld __cnfn convert_long16_rte(short16); +long16 __ovld __cnfn convert_long16_sat_rte(short16); +long16 __ovld __cnfn convert_long16_rtz(short16); +long16 __ovld __cnfn convert_long16_sat_rtz(short16); +long16 __ovld __cnfn convert_long16_rtp(short16); +long16 __ovld __cnfn convert_long16_sat_rtp(short16); +long16 __ovld __cnfn convert_long16_rtn(short16); +long16 __ovld __cnfn convert_long16_sat_rtn(short16); +long16 __ovld __cnfn convert_long16(short16); +long16 __ovld __cnfn convert_long16_sat(short16); +long16 __ovld __cnfn convert_long16_rte(ushort16); +long16 __ovld __cnfn convert_long16_sat_rte(ushort16); +long16 __ovld __cnfn convert_long16_rtz(ushort16); +long16 __ovld __cnfn convert_long16_sat_rtz(ushort16); +long16 __ovld __cnfn convert_long16_rtp(ushort16); +long16 __ovld __cnfn convert_long16_sat_rtp(ushort16); +long16 __ovld __cnfn convert_long16_rtn(ushort16); +long16 __ovld __cnfn convert_long16_sat_rtn(ushort16); +long16 __ovld __cnfn convert_long16(ushort16); +long16 __ovld __cnfn convert_long16_sat(ushort16); +long16 __ovld __cnfn convert_long16_rte(int16); +long16 __ovld __cnfn convert_long16_sat_rte(int16); +long16 __ovld __cnfn convert_long16_rtz(int16); +long16 __ovld __cnfn convert_long16_sat_rtz(int16); +long16 __ovld __cnfn convert_long16_rtp(int16); +long16 __ovld __cnfn convert_long16_sat_rtp(int16); +long16 __ovld __cnfn convert_long16_rtn(int16); +long16 __ovld __cnfn convert_long16_sat_rtn(int16); +long16 __ovld __cnfn convert_long16(int16); +long16 __ovld __cnfn convert_long16_sat(int16); +long16 __ovld __cnfn convert_long16_rte(uint16); +long16 __ovld __cnfn convert_long16_sat_rte(uint16); +long16 __ovld __cnfn convert_long16_rtz(uint16); +long16 __ovld __cnfn convert_long16_sat_rtz(uint16); +long16 __ovld __cnfn convert_long16_rtp(uint16); +long16 __ovld __cnfn convert_long16_sat_rtp(uint16); +long16 __ovld __cnfn convert_long16_rtn(uint16); +long16 __ovld __cnfn convert_long16_sat_rtn(uint16); +long16 __ovld __cnfn convert_long16(uint16); +long16 __ovld __cnfn convert_long16_sat(uint16); +long16 __ovld __cnfn convert_long16_rte(long16); +long16 __ovld __cnfn convert_long16_sat_rte(long16); +long16 __ovld __cnfn convert_long16_rtz(long16); +long16 __ovld __cnfn convert_long16_sat_rtz(long16); +long16 __ovld __cnfn convert_long16_rtp(long16); +long16 __ovld __cnfn convert_long16_sat_rtp(long16); +long16 __ovld __cnfn convert_long16_rtn(long16); +long16 __ovld __cnfn convert_long16_sat_rtn(long16); +long16 __ovld __cnfn convert_long16(long16); +long16 __ovld __cnfn convert_long16_sat(long16); +long16 __ovld __cnfn convert_long16_rte(ulong16); +long16 __ovld __cnfn convert_long16_sat_rte(ulong16); +long16 __ovld __cnfn convert_long16_rtz(ulong16); +long16 __ovld __cnfn convert_long16_sat_rtz(ulong16); +long16 __ovld __cnfn convert_long16_rtp(ulong16); +long16 __ovld __cnfn convert_long16_sat_rtp(ulong16); +long16 __ovld __cnfn convert_long16_rtn(ulong16); +long16 __ovld __cnfn convert_long16_sat_rtn(ulong16); +long16 __ovld __cnfn convert_long16(ulong16); +long16 __ovld __cnfn convert_long16_sat(ulong16); +long16 __ovld __cnfn convert_long16_rte(float16); +long16 __ovld __cnfn convert_long16_sat_rte(float16); +long16 __ovld __cnfn convert_long16_rtz(float16); +long16 __ovld __cnfn convert_long16_sat_rtz(float16); +long16 __ovld __cnfn convert_long16_rtp(float16); +long16 __ovld __cnfn convert_long16_sat_rtp(float16); +long16 __ovld __cnfn convert_long16_rtn(float16); +long16 __ovld __cnfn convert_long16_sat_rtn(float16); +long16 __ovld __cnfn convert_long16(float16); +long16 __ovld __cnfn convert_long16_sat(float16); +ulong16 __ovld __cnfn convert_ulong16_rte(char16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(char16); +ulong16 __ovld __cnfn convert_ulong16_rtz(char16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(char16); +ulong16 __ovld __cnfn convert_ulong16_rtp(char16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(char16); +ulong16 __ovld __cnfn convert_ulong16_rtn(char16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(char16); +ulong16 __ovld __cnfn convert_ulong16(char16); +ulong16 __ovld __cnfn convert_ulong16_sat(char16); +ulong16 __ovld __cnfn convert_ulong16_rte(uchar16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(uchar16); +ulong16 __ovld __cnfn convert_ulong16_rtz(uchar16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(uchar16); +ulong16 __ovld __cnfn convert_ulong16_rtp(uchar16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(uchar16); +ulong16 __ovld __cnfn convert_ulong16_rtn(uchar16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(uchar16); +ulong16 __ovld __cnfn convert_ulong16(uchar16); +ulong16 __ovld __cnfn convert_ulong16_sat(uchar16); +ulong16 __ovld __cnfn convert_ulong16_rte(short16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(short16); +ulong16 __ovld __cnfn convert_ulong16_rtz(short16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(short16); +ulong16 __ovld __cnfn convert_ulong16_rtp(short16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(short16); +ulong16 __ovld __cnfn convert_ulong16_rtn(short16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(short16); +ulong16 __ovld __cnfn convert_ulong16(short16); +ulong16 __ovld __cnfn convert_ulong16_sat(short16); +ulong16 __ovld __cnfn convert_ulong16_rte(ushort16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(ushort16); +ulong16 __ovld __cnfn convert_ulong16_rtz(ushort16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(ushort16); +ulong16 __ovld __cnfn convert_ulong16_rtp(ushort16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(ushort16); +ulong16 __ovld __cnfn convert_ulong16_rtn(ushort16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(ushort16); +ulong16 __ovld __cnfn convert_ulong16(ushort16); +ulong16 __ovld __cnfn convert_ulong16_sat(ushort16); +ulong16 __ovld __cnfn convert_ulong16_rte(int16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(int16); +ulong16 __ovld __cnfn convert_ulong16_rtz(int16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(int16); +ulong16 __ovld __cnfn convert_ulong16_rtp(int16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(int16); +ulong16 __ovld __cnfn convert_ulong16_rtn(int16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(int16); +ulong16 __ovld __cnfn convert_ulong16(int16); +ulong16 __ovld __cnfn convert_ulong16_sat(int16); +ulong16 __ovld __cnfn convert_ulong16_rte(uint16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(uint16); +ulong16 __ovld __cnfn convert_ulong16_rtz(uint16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(uint16); +ulong16 __ovld __cnfn convert_ulong16_rtp(uint16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(uint16); +ulong16 __ovld __cnfn convert_ulong16_rtn(uint16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(uint16); +ulong16 __ovld __cnfn convert_ulong16(uint16); +ulong16 __ovld __cnfn convert_ulong16_sat(uint16); +ulong16 __ovld __cnfn convert_ulong16_rte(long16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(long16); +ulong16 __ovld __cnfn convert_ulong16_rtz(long16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(long16); +ulong16 __ovld __cnfn convert_ulong16_rtp(long16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(long16); +ulong16 __ovld __cnfn convert_ulong16_rtn(long16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(long16); +ulong16 __ovld __cnfn convert_ulong16(long16); +ulong16 __ovld __cnfn convert_ulong16_sat(long16); +ulong16 __ovld __cnfn convert_ulong16_rte(ulong16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(ulong16); +ulong16 __ovld __cnfn convert_ulong16_rtz(ulong16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(ulong16); +ulong16 __ovld __cnfn convert_ulong16_rtp(ulong16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(ulong16); +ulong16 __ovld __cnfn convert_ulong16_rtn(ulong16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(ulong16); +ulong16 __ovld __cnfn convert_ulong16(ulong16); +ulong16 __ovld __cnfn convert_ulong16_sat(ulong16); +ulong16 __ovld __cnfn convert_ulong16_rte(float16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(float16); +ulong16 __ovld __cnfn convert_ulong16_rtz(float16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(float16); +ulong16 __ovld __cnfn convert_ulong16_rtp(float16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(float16); +ulong16 __ovld __cnfn convert_ulong16_rtn(float16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(float16); +ulong16 __ovld __cnfn convert_ulong16(float16); +ulong16 __ovld __cnfn convert_ulong16_sat(float16); +float16 __ovld __cnfn convert_float16_rte(char16); +float16 __ovld __cnfn convert_float16_rtz(char16); +float16 __ovld __cnfn convert_float16_rtp(char16); +float16 __ovld __cnfn convert_float16_rtn(char16); +float16 __ovld __cnfn convert_float16(char16); +float16 __ovld __cnfn convert_float16_rte(uchar16); +float16 __ovld __cnfn convert_float16_rtz(uchar16); +float16 __ovld __cnfn convert_float16_rtp(uchar16); +float16 __ovld __cnfn convert_float16_rtn(uchar16); +float16 __ovld __cnfn convert_float16(uchar16); +float16 __ovld __cnfn convert_float16_rte(short16); +float16 __ovld __cnfn convert_float16_rtz(short16); +float16 __ovld __cnfn convert_float16_rtp(short16); +float16 __ovld __cnfn convert_float16_rtn(short16); +float16 __ovld __cnfn convert_float16(short16); +float16 __ovld __cnfn convert_float16_rte(ushort16); +float16 __ovld __cnfn convert_float16_rtz(ushort16); +float16 __ovld __cnfn convert_float16_rtp(ushort16); +float16 __ovld __cnfn convert_float16_rtn(ushort16); +float16 __ovld __cnfn convert_float16(ushort16); +float16 __ovld __cnfn convert_float16_rte(int16); +float16 __ovld __cnfn convert_float16_rtz(int16); +float16 __ovld __cnfn convert_float16_rtp(int16); +float16 __ovld __cnfn convert_float16_rtn(int16); +float16 __ovld __cnfn convert_float16(int16); +float16 __ovld __cnfn convert_float16_rte(uint16); +float16 __ovld __cnfn convert_float16_rtz(uint16); +float16 __ovld __cnfn convert_float16_rtp(uint16); +float16 __ovld __cnfn convert_float16_rtn(uint16); +float16 __ovld __cnfn convert_float16(uint16); +float16 __ovld __cnfn convert_float16_rte(long16); +float16 __ovld __cnfn convert_float16_rtz(long16); +float16 __ovld __cnfn convert_float16_rtp(long16); +float16 __ovld __cnfn convert_float16_rtn(long16); +float16 __ovld __cnfn convert_float16(long16); +float16 __ovld __cnfn convert_float16_rte(ulong16); +float16 __ovld __cnfn convert_float16_rtz(ulong16); +float16 __ovld __cnfn convert_float16_rtp(ulong16); +float16 __ovld __cnfn convert_float16_rtn(ulong16); +float16 __ovld __cnfn convert_float16(ulong16); +float16 __ovld __cnfn convert_float16_rte(float16); +float16 __ovld __cnfn convert_float16_rtz(float16); +float16 __ovld __cnfn convert_float16_rtp(float16); +float16 __ovld __cnfn convert_float16_rtn(float16); +float16 __ovld __cnfn convert_float16(float16); + +// Conversions with double data type parameters or return value. + +#ifdef cl_khr_fp64 +char __ovld __cnfn convert_char(double); +char __ovld __cnfn convert_char_rte(double); +char __ovld __cnfn convert_char_rtn(double); +char __ovld __cnfn convert_char_rtp(double); +char __ovld __cnfn convert_char_rtz(double); +char __ovld __cnfn convert_char_sat(double); +char __ovld __cnfn convert_char_sat_rte(double); +char __ovld __cnfn convert_char_sat_rtn(double); +char __ovld __cnfn convert_char_sat_rtp(double); +char __ovld __cnfn convert_char_sat_rtz(double); +char2 __ovld __cnfn convert_char2(double2); +char2 __ovld __cnfn convert_char2_rte(double2); +char2 __ovld __cnfn convert_char2_rtn(double2); +char2 __ovld __cnfn convert_char2_rtp(double2); +char2 __ovld __cnfn convert_char2_rtz(double2); +char2 __ovld __cnfn convert_char2_sat(double2); +char2 __ovld __cnfn convert_char2_sat_rte(double2); +char2 __ovld __cnfn convert_char2_sat_rtn(double2); +char2 __ovld __cnfn convert_char2_sat_rtp(double2); +char2 __ovld __cnfn convert_char2_sat_rtz(double2); +char3 __ovld __cnfn convert_char3(double3); +char3 __ovld __cnfn convert_char3_rte(double3); +char3 __ovld __cnfn convert_char3_rtn(double3); +char3 __ovld __cnfn convert_char3_rtp(double3); +char3 __ovld __cnfn convert_char3_rtz(double3); +char3 __ovld __cnfn convert_char3_sat(double3); +char3 __ovld __cnfn convert_char3_sat_rte(double3); +char3 __ovld __cnfn convert_char3_sat_rtn(double3); +char3 __ovld __cnfn convert_char3_sat_rtp(double3); +char3 __ovld __cnfn convert_char3_sat_rtz(double3); +char4 __ovld __cnfn convert_char4(double4); +char4 __ovld __cnfn convert_char4_rte(double4); +char4 __ovld __cnfn convert_char4_rtn(double4); +char4 __ovld __cnfn convert_char4_rtp(double4); +char4 __ovld __cnfn convert_char4_rtz(double4); +char4 __ovld __cnfn convert_char4_sat(double4); +char4 __ovld __cnfn convert_char4_sat_rte(double4); +char4 __ovld __cnfn convert_char4_sat_rtn(double4); +char4 __ovld __cnfn convert_char4_sat_rtp(double4); +char4 __ovld __cnfn convert_char4_sat_rtz(double4); +char8 __ovld __cnfn convert_char8(double8); +char8 __ovld __cnfn convert_char8_rte(double8); +char8 __ovld __cnfn convert_char8_rtn(double8); +char8 __ovld __cnfn convert_char8_rtp(double8); +char8 __ovld __cnfn convert_char8_rtz(double8); +char8 __ovld __cnfn convert_char8_sat(double8); +char8 __ovld __cnfn convert_char8_sat_rte(double8); +char8 __ovld __cnfn convert_char8_sat_rtn(double8); +char8 __ovld __cnfn convert_char8_sat_rtp(double8); +char8 __ovld __cnfn convert_char8_sat_rtz(double8); +char16 __ovld __cnfn convert_char16(double16); +char16 __ovld __cnfn convert_char16_rte(double16); +char16 __ovld __cnfn convert_char16_rtn(double16); +char16 __ovld __cnfn convert_char16_rtp(double16); +char16 __ovld __cnfn convert_char16_rtz(double16); +char16 __ovld __cnfn convert_char16_sat(double16); +char16 __ovld __cnfn convert_char16_sat_rte(double16); +char16 __ovld __cnfn convert_char16_sat_rtn(double16); +char16 __ovld __cnfn convert_char16_sat_rtp(double16); +char16 __ovld __cnfn convert_char16_sat_rtz(double16); + +uchar __ovld __cnfn convert_uchar(double); +uchar __ovld __cnfn convert_uchar_rte(double); +uchar __ovld __cnfn convert_uchar_rtn(double); +uchar __ovld __cnfn convert_uchar_rtp(double); +uchar __ovld __cnfn convert_uchar_rtz(double); +uchar __ovld __cnfn convert_uchar_sat(double); +uchar __ovld __cnfn convert_uchar_sat_rte(double); +uchar __ovld __cnfn convert_uchar_sat_rtn(double); +uchar __ovld __cnfn convert_uchar_sat_rtp(double); +uchar __ovld __cnfn convert_uchar_sat_rtz(double); +uchar2 __ovld __cnfn convert_uchar2(double2); +uchar2 __ovld __cnfn convert_uchar2_rte(double2); +uchar2 __ovld __cnfn convert_uchar2_rtn(double2); +uchar2 __ovld __cnfn convert_uchar2_rtp(double2); +uchar2 __ovld __cnfn convert_uchar2_rtz(double2); +uchar2 __ovld __cnfn convert_uchar2_sat(double2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(double2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(double2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(double2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(double2); +uchar3 __ovld __cnfn convert_uchar3(double3); +uchar3 __ovld __cnfn convert_uchar3_rte(double3); +uchar3 __ovld __cnfn convert_uchar3_rtn(double3); +uchar3 __ovld __cnfn convert_uchar3_rtp(double3); +uchar3 __ovld __cnfn convert_uchar3_rtz(double3); +uchar3 __ovld __cnfn convert_uchar3_sat(double3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(double3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(double3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(double3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(double3); +uchar4 __ovld __cnfn convert_uchar4(double4); +uchar4 __ovld __cnfn convert_uchar4_rte(double4); +uchar4 __ovld __cnfn convert_uchar4_rtn(double4); +uchar4 __ovld __cnfn convert_uchar4_rtp(double4); +uchar4 __ovld __cnfn convert_uchar4_rtz(double4); +uchar4 __ovld __cnfn convert_uchar4_sat(double4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(double4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(double4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(double4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(double4); +uchar8 __ovld __cnfn convert_uchar8(double8); +uchar8 __ovld __cnfn convert_uchar8_rte(double8); +uchar8 __ovld __cnfn convert_uchar8_rtn(double8); +uchar8 __ovld __cnfn convert_uchar8_rtp(double8); +uchar8 __ovld __cnfn convert_uchar8_rtz(double8); +uchar8 __ovld __cnfn convert_uchar8_sat(double8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(double8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(double8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(double8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(double8); +uchar16 __ovld __cnfn convert_uchar16(double16); +uchar16 __ovld __cnfn convert_uchar16_rte(double16); +uchar16 __ovld __cnfn convert_uchar16_rtn(double16); +uchar16 __ovld __cnfn convert_uchar16_rtp(double16); +uchar16 __ovld __cnfn convert_uchar16_rtz(double16); +uchar16 __ovld __cnfn convert_uchar16_sat(double16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(double16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(double16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(double16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(double16); + +short __ovld __cnfn convert_short(double); +short __ovld __cnfn convert_short_rte(double); +short __ovld __cnfn convert_short_rtn(double); +short __ovld __cnfn convert_short_rtp(double); +short __ovld __cnfn convert_short_rtz(double); +short __ovld __cnfn convert_short_sat(double); +short __ovld __cnfn convert_short_sat_rte(double); +short __ovld __cnfn convert_short_sat_rtn(double); +short __ovld __cnfn convert_short_sat_rtp(double); +short __ovld __cnfn convert_short_sat_rtz(double); +short2 __ovld __cnfn convert_short2(double2); +short2 __ovld __cnfn convert_short2_rte(double2); +short2 __ovld __cnfn convert_short2_rtn(double2); +short2 __ovld __cnfn convert_short2_rtp(double2); +short2 __ovld __cnfn convert_short2_rtz(double2); +short2 __ovld __cnfn convert_short2_sat(double2); +short2 __ovld __cnfn convert_short2_sat_rte(double2); +short2 __ovld __cnfn convert_short2_sat_rtn(double2); +short2 __ovld __cnfn convert_short2_sat_rtp(double2); +short2 __ovld __cnfn convert_short2_sat_rtz(double2); +short3 __ovld __cnfn convert_short3(double3); +short3 __ovld __cnfn convert_short3_rte(double3); +short3 __ovld __cnfn convert_short3_rtn(double3); +short3 __ovld __cnfn convert_short3_rtp(double3); +short3 __ovld __cnfn convert_short3_rtz(double3); +short3 __ovld __cnfn convert_short3_sat(double3); +short3 __ovld __cnfn convert_short3_sat_rte(double3); +short3 __ovld __cnfn convert_short3_sat_rtn(double3); +short3 __ovld __cnfn convert_short3_sat_rtp(double3); +short3 __ovld __cnfn convert_short3_sat_rtz(double3); +short4 __ovld __cnfn convert_short4(double4); +short4 __ovld __cnfn convert_short4_rte(double4); +short4 __ovld __cnfn convert_short4_rtn(double4); +short4 __ovld __cnfn convert_short4_rtp(double4); +short4 __ovld __cnfn convert_short4_rtz(double4); +short4 __ovld __cnfn convert_short4_sat(double4); +short4 __ovld __cnfn convert_short4_sat_rte(double4); +short4 __ovld __cnfn convert_short4_sat_rtn(double4); +short4 __ovld __cnfn convert_short4_sat_rtp(double4); +short4 __ovld __cnfn convert_short4_sat_rtz(double4); +short8 __ovld __cnfn convert_short8(double8); +short8 __ovld __cnfn convert_short8_rte(double8); +short8 __ovld __cnfn convert_short8_rtn(double8); +short8 __ovld __cnfn convert_short8_rtp(double8); +short8 __ovld __cnfn convert_short8_rtz(double8); +short8 __ovld __cnfn convert_short8_sat(double8); +short8 __ovld __cnfn convert_short8_sat_rte(double8); +short8 __ovld __cnfn convert_short8_sat_rtn(double8); +short8 __ovld __cnfn convert_short8_sat_rtp(double8); +short8 __ovld __cnfn convert_short8_sat_rtz(double8); +short16 __ovld __cnfn convert_short16(double16); +short16 __ovld __cnfn convert_short16_rte(double16); +short16 __ovld __cnfn convert_short16_rtn(double16); +short16 __ovld __cnfn convert_short16_rtp(double16); +short16 __ovld __cnfn convert_short16_rtz(double16); +short16 __ovld __cnfn convert_short16_sat(double16); +short16 __ovld __cnfn convert_short16_sat_rte(double16); +short16 __ovld __cnfn convert_short16_sat_rtn(double16); +short16 __ovld __cnfn convert_short16_sat_rtp(double16); +short16 __ovld __cnfn convert_short16_sat_rtz(double16); + +ushort __ovld __cnfn convert_ushort(double); +ushort __ovld __cnfn convert_ushort_rte(double); +ushort __ovld __cnfn convert_ushort_rtn(double); +ushort __ovld __cnfn convert_ushort_rtp(double); +ushort __ovld __cnfn convert_ushort_rtz(double); +ushort __ovld __cnfn convert_ushort_sat(double); +ushort __ovld __cnfn convert_ushort_sat_rte(double); +ushort __ovld __cnfn convert_ushort_sat_rtn(double); +ushort __ovld __cnfn convert_ushort_sat_rtp(double); +ushort __ovld __cnfn convert_ushort_sat_rtz(double); +ushort2 __ovld __cnfn convert_ushort2(double2); +ushort2 __ovld __cnfn convert_ushort2_rte(double2); +ushort2 __ovld __cnfn convert_ushort2_rtn(double2); +ushort2 __ovld __cnfn convert_ushort2_rtp(double2); +ushort2 __ovld __cnfn convert_ushort2_rtz(double2); +ushort2 __ovld __cnfn convert_ushort2_sat(double2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(double2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(double2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(double2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(double2); +ushort3 __ovld __cnfn convert_ushort3(double3); +ushort3 __ovld __cnfn convert_ushort3_rte(double3); +ushort3 __ovld __cnfn convert_ushort3_rtn(double3); +ushort3 __ovld __cnfn convert_ushort3_rtp(double3); +ushort3 __ovld __cnfn convert_ushort3_rtz(double3); +ushort3 __ovld __cnfn convert_ushort3_sat(double3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(double3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(double3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(double3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(double3); +ushort4 __ovld __cnfn convert_ushort4(double4); +ushort4 __ovld __cnfn convert_ushort4_rte(double4); +ushort4 __ovld __cnfn convert_ushort4_rtn(double4); +ushort4 __ovld __cnfn convert_ushort4_rtp(double4); +ushort4 __ovld __cnfn convert_ushort4_rtz(double4); +ushort4 __ovld __cnfn convert_ushort4_sat(double4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(double4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(double4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(double4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(double4); +ushort8 __ovld __cnfn convert_ushort8(double8); +ushort8 __ovld __cnfn convert_ushort8_rte(double8); +ushort8 __ovld __cnfn convert_ushort8_rtn(double8); +ushort8 __ovld __cnfn convert_ushort8_rtp(double8); +ushort8 __ovld __cnfn convert_ushort8_rtz(double8); +ushort8 __ovld __cnfn convert_ushort8_sat(double8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(double8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(double8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(double8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(double8); +ushort16 __ovld __cnfn convert_ushort16(double16); +ushort16 __ovld __cnfn convert_ushort16_rte(double16); +ushort16 __ovld __cnfn convert_ushort16_rtn(double16); +ushort16 __ovld __cnfn convert_ushort16_rtp(double16); +ushort16 __ovld __cnfn convert_ushort16_rtz(double16); +ushort16 __ovld __cnfn convert_ushort16_sat(double16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(double16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(double16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(double16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(double16); + +int __ovld __cnfn convert_int(double); +int __ovld __cnfn convert_int_rte(double); +int __ovld __cnfn convert_int_rtn(double); +int __ovld __cnfn convert_int_rtp(double); +int __ovld __cnfn convert_int_rtz(double); +int __ovld __cnfn convert_int_sat(double); +int __ovld __cnfn convert_int_sat_rte(double); +int __ovld __cnfn convert_int_sat_rtn(double); +int __ovld __cnfn convert_int_sat_rtp(double); +int __ovld __cnfn convert_int_sat_rtz(double); +int2 __ovld __cnfn convert_int2(double2); +int2 __ovld __cnfn convert_int2_rte(double2); +int2 __ovld __cnfn convert_int2_rtn(double2); +int2 __ovld __cnfn convert_int2_rtp(double2); +int2 __ovld __cnfn convert_int2_rtz(double2); +int2 __ovld __cnfn convert_int2_sat(double2); +int2 __ovld __cnfn convert_int2_sat_rte(double2); +int2 __ovld __cnfn convert_int2_sat_rtn(double2); +int2 __ovld __cnfn convert_int2_sat_rtp(double2); +int2 __ovld __cnfn convert_int2_sat_rtz(double2); +int3 __ovld __cnfn convert_int3(double3); +int3 __ovld __cnfn convert_int3_rte(double3); +int3 __ovld __cnfn convert_int3_rtn(double3); +int3 __ovld __cnfn convert_int3_rtp(double3); +int3 __ovld __cnfn convert_int3_rtz(double3); +int3 __ovld __cnfn convert_int3_sat(double3); +int3 __ovld __cnfn convert_int3_sat_rte(double3); +int3 __ovld __cnfn convert_int3_sat_rtn(double3); +int3 __ovld __cnfn convert_int3_sat_rtp(double3); +int3 __ovld __cnfn convert_int3_sat_rtz(double3); +int4 __ovld __cnfn convert_int4(double4); +int4 __ovld __cnfn convert_int4_rte(double4); +int4 __ovld __cnfn convert_int4_rtn(double4); +int4 __ovld __cnfn convert_int4_rtp(double4); +int4 __ovld __cnfn convert_int4_rtz(double4); +int4 __ovld __cnfn convert_int4_sat(double4); +int4 __ovld __cnfn convert_int4_sat_rte(double4); +int4 __ovld __cnfn convert_int4_sat_rtn(double4); +int4 __ovld __cnfn convert_int4_sat_rtp(double4); +int4 __ovld __cnfn convert_int4_sat_rtz(double4); +int8 __ovld __cnfn convert_int8(double8); +int8 __ovld __cnfn convert_int8_rte(double8); +int8 __ovld __cnfn convert_int8_rtn(double8); +int8 __ovld __cnfn convert_int8_rtp(double8); +int8 __ovld __cnfn convert_int8_rtz(double8); +int8 __ovld __cnfn convert_int8_sat(double8); +int8 __ovld __cnfn convert_int8_sat_rte(double8); +int8 __ovld __cnfn convert_int8_sat_rtn(double8); +int8 __ovld __cnfn convert_int8_sat_rtp(double8); +int8 __ovld __cnfn convert_int8_sat_rtz(double8); +int16 __ovld __cnfn convert_int16(double16); +int16 __ovld __cnfn convert_int16_rte(double16); +int16 __ovld __cnfn convert_int16_rtn(double16); +int16 __ovld __cnfn convert_int16_rtp(double16); +int16 __ovld __cnfn convert_int16_rtz(double16); +int16 __ovld __cnfn convert_int16_sat(double16); +int16 __ovld __cnfn convert_int16_sat_rte(double16); +int16 __ovld __cnfn convert_int16_sat_rtn(double16); +int16 __ovld __cnfn convert_int16_sat_rtp(double16); +int16 __ovld __cnfn convert_int16_sat_rtz(double16); + +uint __ovld __cnfn convert_uint(double); +uint __ovld __cnfn convert_uint_rte(double); +uint __ovld __cnfn convert_uint_rtn(double); +uint __ovld __cnfn convert_uint_rtp(double); +uint __ovld __cnfn convert_uint_rtz(double); +uint __ovld __cnfn convert_uint_sat(double); +uint __ovld __cnfn convert_uint_sat_rte(double); +uint __ovld __cnfn convert_uint_sat_rtn(double); +uint __ovld __cnfn convert_uint_sat_rtp(double); +uint __ovld __cnfn convert_uint_sat_rtz(double); +uint2 __ovld __cnfn convert_uint2(double2); +uint2 __ovld __cnfn convert_uint2_rte(double2); +uint2 __ovld __cnfn convert_uint2_rtn(double2); +uint2 __ovld __cnfn convert_uint2_rtp(double2); +uint2 __ovld __cnfn convert_uint2_rtz(double2); +uint2 __ovld __cnfn convert_uint2_sat(double2); +uint2 __ovld __cnfn convert_uint2_sat_rte(double2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(double2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(double2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(double2); +uint3 __ovld __cnfn convert_uint3(double3); +uint3 __ovld __cnfn convert_uint3_rte(double3); +uint3 __ovld __cnfn convert_uint3_rtn(double3); +uint3 __ovld __cnfn convert_uint3_rtp(double3); +uint3 __ovld __cnfn convert_uint3_rtz(double3); +uint3 __ovld __cnfn convert_uint3_sat(double3); +uint3 __ovld __cnfn convert_uint3_sat_rte(double3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(double3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(double3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(double3); +uint4 __ovld __cnfn convert_uint4(double4); +uint4 __ovld __cnfn convert_uint4_rte(double4); +uint4 __ovld __cnfn convert_uint4_rtn(double4); +uint4 __ovld __cnfn convert_uint4_rtp(double4); +uint4 __ovld __cnfn convert_uint4_rtz(double4); +uint4 __ovld __cnfn convert_uint4_sat(double4); +uint4 __ovld __cnfn convert_uint4_sat_rte(double4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(double4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(double4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(double4); +uint8 __ovld __cnfn convert_uint8(double8); +uint8 __ovld __cnfn convert_uint8_rte(double8); +uint8 __ovld __cnfn convert_uint8_rtn(double8); +uint8 __ovld __cnfn convert_uint8_rtp(double8); +uint8 __ovld __cnfn convert_uint8_rtz(double8); +uint8 __ovld __cnfn convert_uint8_sat(double8); +uint8 __ovld __cnfn convert_uint8_sat_rte(double8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(double8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(double8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(double8); +uint16 __ovld __cnfn convert_uint16(double16); +uint16 __ovld __cnfn convert_uint16_rte(double16); +uint16 __ovld __cnfn convert_uint16_rtn(double16); +uint16 __ovld __cnfn convert_uint16_rtp(double16); +uint16 __ovld __cnfn convert_uint16_rtz(double16); +uint16 __ovld __cnfn convert_uint16_sat(double16); +uint16 __ovld __cnfn convert_uint16_sat_rte(double16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(double16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(double16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(double16); + +long __ovld __cnfn convert_long(double); +long __ovld __cnfn convert_long_rte(double); +long __ovld __cnfn convert_long_rtn(double); +long __ovld __cnfn convert_long_rtp(double); +long __ovld __cnfn convert_long_rtz(double); +long __ovld __cnfn convert_long_sat(double); +long __ovld __cnfn convert_long_sat_rte(double); +long __ovld __cnfn convert_long_sat_rtn(double); +long __ovld __cnfn convert_long_sat_rtp(double); +long __ovld __cnfn convert_long_sat_rtz(double); +long2 __ovld __cnfn convert_long2(double2); +long2 __ovld __cnfn convert_long2_rte(double2); +long2 __ovld __cnfn convert_long2_rtn(double2); +long2 __ovld __cnfn convert_long2_rtp(double2); +long2 __ovld __cnfn convert_long2_rtz(double2); +long2 __ovld __cnfn convert_long2_sat(double2); +long2 __ovld __cnfn convert_long2_sat_rte(double2); +long2 __ovld __cnfn convert_long2_sat_rtn(double2); +long2 __ovld __cnfn convert_long2_sat_rtp(double2); +long2 __ovld __cnfn convert_long2_sat_rtz(double2); +long3 __ovld __cnfn convert_long3(double3); +long3 __ovld __cnfn convert_long3_rte(double3); +long3 __ovld __cnfn convert_long3_rtn(double3); +long3 __ovld __cnfn convert_long3_rtp(double3); +long3 __ovld __cnfn convert_long3_rtz(double3); +long3 __ovld __cnfn convert_long3_sat(double3); +long3 __ovld __cnfn convert_long3_sat_rte(double3); +long3 __ovld __cnfn convert_long3_sat_rtn(double3); +long3 __ovld __cnfn convert_long3_sat_rtp(double3); +long3 __ovld __cnfn convert_long3_sat_rtz(double3); +long4 __ovld __cnfn convert_long4(double4); +long4 __ovld __cnfn convert_long4_rte(double4); +long4 __ovld __cnfn convert_long4_rtn(double4); +long4 __ovld __cnfn convert_long4_rtp(double4); +long4 __ovld __cnfn convert_long4_rtz(double4); +long4 __ovld __cnfn convert_long4_sat(double4); +long4 __ovld __cnfn convert_long4_sat_rte(double4); +long4 __ovld __cnfn convert_long4_sat_rtn(double4); +long4 __ovld __cnfn convert_long4_sat_rtp(double4); +long4 __ovld __cnfn convert_long4_sat_rtz(double4); +long8 __ovld __cnfn convert_long8(double8); +long8 __ovld __cnfn convert_long8_rte(double8); +long8 __ovld __cnfn convert_long8_rtn(double8); +long8 __ovld __cnfn convert_long8_rtp(double8); +long8 __ovld __cnfn convert_long8_rtz(double8); +long8 __ovld __cnfn convert_long8_sat(double8); +long8 __ovld __cnfn convert_long8_sat_rte(double8); +long8 __ovld __cnfn convert_long8_sat_rtn(double8); +long8 __ovld __cnfn convert_long8_sat_rtp(double8); +long8 __ovld __cnfn convert_long8_sat_rtz(double8); +long16 __ovld __cnfn convert_long16(double16); +long16 __ovld __cnfn convert_long16_rte(double16); +long16 __ovld __cnfn convert_long16_rtn(double16); +long16 __ovld __cnfn convert_long16_rtp(double16); +long16 __ovld __cnfn convert_long16_rtz(double16); +long16 __ovld __cnfn convert_long16_sat(double16); +long16 __ovld __cnfn convert_long16_sat_rte(double16); +long16 __ovld __cnfn convert_long16_sat_rtn(double16); +long16 __ovld __cnfn convert_long16_sat_rtp(double16); +long16 __ovld __cnfn convert_long16_sat_rtz(double16); + +ulong __ovld __cnfn convert_ulong(double); +ulong __ovld __cnfn convert_ulong_rte(double); +ulong __ovld __cnfn convert_ulong_rtn(double); +ulong __ovld __cnfn convert_ulong_rtp(double); +ulong __ovld __cnfn convert_ulong_rtz(double); +ulong __ovld __cnfn convert_ulong_sat(double); +ulong __ovld __cnfn convert_ulong_sat_rte(double); +ulong __ovld __cnfn convert_ulong_sat_rtn(double); +ulong __ovld __cnfn convert_ulong_sat_rtp(double); +ulong __ovld __cnfn convert_ulong_sat_rtz(double); +ulong2 __ovld __cnfn convert_ulong2(double2); +ulong2 __ovld __cnfn convert_ulong2_rte(double2); +ulong2 __ovld __cnfn convert_ulong2_rtn(double2); +ulong2 __ovld __cnfn convert_ulong2_rtp(double2); +ulong2 __ovld __cnfn convert_ulong2_rtz(double2); +ulong2 __ovld __cnfn convert_ulong2_sat(double2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(double2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(double2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(double2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(double2); +ulong3 __ovld __cnfn convert_ulong3(double3); +ulong3 __ovld __cnfn convert_ulong3_rte(double3); +ulong3 __ovld __cnfn convert_ulong3_rtn(double3); +ulong3 __ovld __cnfn convert_ulong3_rtp(double3); +ulong3 __ovld __cnfn convert_ulong3_rtz(double3); +ulong3 __ovld __cnfn convert_ulong3_sat(double3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(double3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(double3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(double3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(double3); +ulong4 __ovld __cnfn convert_ulong4(double4); +ulong4 __ovld __cnfn convert_ulong4_rte(double4); +ulong4 __ovld __cnfn convert_ulong4_rtn(double4); +ulong4 __ovld __cnfn convert_ulong4_rtp(double4); +ulong4 __ovld __cnfn convert_ulong4_rtz(double4); +ulong4 __ovld __cnfn convert_ulong4_sat(double4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(double4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(double4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(double4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(double4); +ulong8 __ovld __cnfn convert_ulong8(double8); +ulong8 __ovld __cnfn convert_ulong8_rte(double8); +ulong8 __ovld __cnfn convert_ulong8_rtn(double8); +ulong8 __ovld __cnfn convert_ulong8_rtp(double8); +ulong8 __ovld __cnfn convert_ulong8_rtz(double8); +ulong8 __ovld __cnfn convert_ulong8_sat(double8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(double8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(double8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(double8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(double8); +ulong16 __ovld __cnfn convert_ulong16(double16); +ulong16 __ovld __cnfn convert_ulong16_rte(double16); +ulong16 __ovld __cnfn convert_ulong16_rtn(double16); +ulong16 __ovld __cnfn convert_ulong16_rtp(double16); +ulong16 __ovld __cnfn convert_ulong16_rtz(double16); +ulong16 __ovld __cnfn convert_ulong16_sat(double16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(double16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(double16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(double16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(double16); + +float __ovld __cnfn convert_float(double); +float __ovld __cnfn convert_float_rte(double); +float __ovld __cnfn convert_float_rtn(double); +float __ovld __cnfn convert_float_rtp(double); +float __ovld __cnfn convert_float_rtz(double); +float2 __ovld __cnfn convert_float2(double2); +float2 __ovld __cnfn convert_float2_rte(double2); +float2 __ovld __cnfn convert_float2_rtn(double2); +float2 __ovld __cnfn convert_float2_rtp(double2); +float2 __ovld __cnfn convert_float2_rtz(double2); +float3 __ovld __cnfn convert_float3(double3); +float3 __ovld __cnfn convert_float3_rte(double3); +float3 __ovld __cnfn convert_float3_rtn(double3); +float3 __ovld __cnfn convert_float3_rtp(double3); +float3 __ovld __cnfn convert_float3_rtz(double3); +float4 __ovld __cnfn convert_float4(double4); +float4 __ovld __cnfn convert_float4_rte(double4); +float4 __ovld __cnfn convert_float4_rtn(double4); +float4 __ovld __cnfn convert_float4_rtp(double4); +float4 __ovld __cnfn convert_float4_rtz(double4); +float8 __ovld __cnfn convert_float8(double8); +float8 __ovld __cnfn convert_float8_rte(double8); +float8 __ovld __cnfn convert_float8_rtn(double8); +float8 __ovld __cnfn convert_float8_rtp(double8); +float8 __ovld __cnfn convert_float8_rtz(double8); +float16 __ovld __cnfn convert_float16(double16); +float16 __ovld __cnfn convert_float16_rte(double16); +float16 __ovld __cnfn convert_float16_rtn(double16); +float16 __ovld __cnfn convert_float16_rtp(double16); +float16 __ovld __cnfn convert_float16_rtz(double16); + +double __ovld __cnfn convert_double(char); +double __ovld __cnfn convert_double(double); +double __ovld __cnfn convert_double(float); +double __ovld __cnfn convert_double(int); +double __ovld __cnfn convert_double(long); +double __ovld __cnfn convert_double(short); +double __ovld __cnfn convert_double(uchar); +double __ovld __cnfn convert_double(uint); +double __ovld __cnfn convert_double(ulong); +double __ovld __cnfn convert_double(ushort); +double __ovld __cnfn convert_double_rte(char); +double __ovld __cnfn convert_double_rte(double); +double __ovld __cnfn convert_double_rte(float); +double __ovld __cnfn convert_double_rte(int); +double __ovld __cnfn convert_double_rte(long); +double __ovld __cnfn convert_double_rte(short); +double __ovld __cnfn convert_double_rte(uchar); +double __ovld __cnfn convert_double_rte(uint); +double __ovld __cnfn convert_double_rte(ulong); +double __ovld __cnfn convert_double_rte(ushort); +double __ovld __cnfn convert_double_rtn(char); +double __ovld __cnfn convert_double_rtn(double); +double __ovld __cnfn convert_double_rtn(float); +double __ovld __cnfn convert_double_rtn(int); +double __ovld __cnfn convert_double_rtn(long); +double __ovld __cnfn convert_double_rtn(short); +double __ovld __cnfn convert_double_rtn(uchar); +double __ovld __cnfn convert_double_rtn(uint); +double __ovld __cnfn convert_double_rtn(ulong); +double __ovld __cnfn convert_double_rtn(ushort); +double __ovld __cnfn convert_double_rtp(char); +double __ovld __cnfn convert_double_rtp(double); +double __ovld __cnfn convert_double_rtp(float); +double __ovld __cnfn convert_double_rtp(int); +double __ovld __cnfn convert_double_rtp(long); +double __ovld __cnfn convert_double_rtp(short); +double __ovld __cnfn convert_double_rtp(uchar); +double __ovld __cnfn convert_double_rtp(uint); +double __ovld __cnfn convert_double_rtp(ulong); +double __ovld __cnfn convert_double_rtp(ushort); +double __ovld __cnfn convert_double_rtz(char); +double __ovld __cnfn convert_double_rtz(double); +double __ovld __cnfn convert_double_rtz(float); +double __ovld __cnfn convert_double_rtz(int); +double __ovld __cnfn convert_double_rtz(long); +double __ovld __cnfn convert_double_rtz(short); +double __ovld __cnfn convert_double_rtz(uchar); +double __ovld __cnfn convert_double_rtz(uint); +double __ovld __cnfn convert_double_rtz(ulong); +double __ovld __cnfn convert_double_rtz(ushort); +double2 __ovld __cnfn convert_double2(char2); +double2 __ovld __cnfn convert_double2(double2); +double2 __ovld __cnfn convert_double2(float2); +double2 __ovld __cnfn convert_double2(int2); +double2 __ovld __cnfn convert_double2(long2); +double2 __ovld __cnfn convert_double2(short2); +double2 __ovld __cnfn convert_double2(uchar2); +double2 __ovld __cnfn convert_double2(uint2); +double2 __ovld __cnfn convert_double2(ulong2); +double2 __ovld __cnfn convert_double2(ushort2); +double2 __ovld __cnfn convert_double2_rte(char2); +double2 __ovld __cnfn convert_double2_rte(double2); +double2 __ovld __cnfn convert_double2_rte(float2); +double2 __ovld __cnfn convert_double2_rte(int2); +double2 __ovld __cnfn convert_double2_rte(long2); +double2 __ovld __cnfn convert_double2_rte(short2); +double2 __ovld __cnfn convert_double2_rte(uchar2); +double2 __ovld __cnfn convert_double2_rte(uint2); +double2 __ovld __cnfn convert_double2_rte(ulong2); +double2 __ovld __cnfn convert_double2_rte(ushort2); +double2 __ovld __cnfn convert_double2_rtn(char2); +double2 __ovld __cnfn convert_double2_rtn(double2); +double2 __ovld __cnfn convert_double2_rtn(float2); +double2 __ovld __cnfn convert_double2_rtn(int2); +double2 __ovld __cnfn convert_double2_rtn(long2); +double2 __ovld __cnfn convert_double2_rtn(short2); +double2 __ovld __cnfn convert_double2_rtn(uchar2); +double2 __ovld __cnfn convert_double2_rtn(uint2); +double2 __ovld __cnfn convert_double2_rtn(ulong2); +double2 __ovld __cnfn convert_double2_rtn(ushort2); +double2 __ovld __cnfn convert_double2_rtp(char2); +double2 __ovld __cnfn convert_double2_rtp(double2); +double2 __ovld __cnfn convert_double2_rtp(float2); +double2 __ovld __cnfn convert_double2_rtp(int2); +double2 __ovld __cnfn convert_double2_rtp(long2); +double2 __ovld __cnfn convert_double2_rtp(short2); +double2 __ovld __cnfn convert_double2_rtp(uchar2); +double2 __ovld __cnfn convert_double2_rtp(uint2); +double2 __ovld __cnfn convert_double2_rtp(ulong2); +double2 __ovld __cnfn convert_double2_rtp(ushort2); +double2 __ovld __cnfn convert_double2_rtz(char2); +double2 __ovld __cnfn convert_double2_rtz(double2); +double2 __ovld __cnfn convert_double2_rtz(float2); +double2 __ovld __cnfn convert_double2_rtz(int2); +double2 __ovld __cnfn convert_double2_rtz(long2); +double2 __ovld __cnfn convert_double2_rtz(short2); +double2 __ovld __cnfn convert_double2_rtz(uchar2); +double2 __ovld __cnfn convert_double2_rtz(uint2); +double2 __ovld __cnfn convert_double2_rtz(ulong2); +double2 __ovld __cnfn convert_double2_rtz(ushort2); +double3 __ovld __cnfn convert_double3(char3); +double3 __ovld __cnfn convert_double3(double3); +double3 __ovld __cnfn convert_double3(float3); +double3 __ovld __cnfn convert_double3(int3); +double3 __ovld __cnfn convert_double3(long3); +double3 __ovld __cnfn convert_double3(short3); +double3 __ovld __cnfn convert_double3(uchar3); +double3 __ovld __cnfn convert_double3(uint3); +double3 __ovld __cnfn convert_double3(ulong3); +double3 __ovld __cnfn convert_double3(ushort3); +double3 __ovld __cnfn convert_double3_rte(char3); +double3 __ovld __cnfn convert_double3_rte(double3); +double3 __ovld __cnfn convert_double3_rte(float3); +double3 __ovld __cnfn convert_double3_rte(int3); +double3 __ovld __cnfn convert_double3_rte(long3); +double3 __ovld __cnfn convert_double3_rte(short3); +double3 __ovld __cnfn convert_double3_rte(uchar3); +double3 __ovld __cnfn convert_double3_rte(uint3); +double3 __ovld __cnfn convert_double3_rte(ulong3); +double3 __ovld __cnfn convert_double3_rte(ushort3); +double3 __ovld __cnfn convert_double3_rtn(char3); +double3 __ovld __cnfn convert_double3_rtn(double3); +double3 __ovld __cnfn convert_double3_rtn(float3); +double3 __ovld __cnfn convert_double3_rtn(int3); +double3 __ovld __cnfn convert_double3_rtn(long3); +double3 __ovld __cnfn convert_double3_rtn(short3); +double3 __ovld __cnfn convert_double3_rtn(uchar3); +double3 __ovld __cnfn convert_double3_rtn(uint3); +double3 __ovld __cnfn convert_double3_rtn(ulong3); +double3 __ovld __cnfn convert_double3_rtn(ushort3); +double3 __ovld __cnfn convert_double3_rtp(char3); +double3 __ovld __cnfn convert_double3_rtp(double3); +double3 __ovld __cnfn convert_double3_rtp(float3); +double3 __ovld __cnfn convert_double3_rtp(int3); +double3 __ovld __cnfn convert_double3_rtp(long3); +double3 __ovld __cnfn convert_double3_rtp(short3); +double3 __ovld __cnfn convert_double3_rtp(uchar3); +double3 __ovld __cnfn convert_double3_rtp(uint3); +double3 __ovld __cnfn convert_double3_rtp(ulong3); +double3 __ovld __cnfn convert_double3_rtp(ushort3); +double3 __ovld __cnfn convert_double3_rtz(char3); +double3 __ovld __cnfn convert_double3_rtz(double3); +double3 __ovld __cnfn convert_double3_rtz(float3); +double3 __ovld __cnfn convert_double3_rtz(int3); +double3 __ovld __cnfn convert_double3_rtz(long3); +double3 __ovld __cnfn convert_double3_rtz(short3); +double3 __ovld __cnfn convert_double3_rtz(uchar3); +double3 __ovld __cnfn convert_double3_rtz(uint3); +double3 __ovld __cnfn convert_double3_rtz(ulong3); +double3 __ovld __cnfn convert_double3_rtz(ushort3); +double4 __ovld __cnfn convert_double4(char4); +double4 __ovld __cnfn convert_double4(double4); +double4 __ovld __cnfn convert_double4(float4); +double4 __ovld __cnfn convert_double4(int4); +double4 __ovld __cnfn convert_double4(long4); +double4 __ovld __cnfn convert_double4(short4); +double4 __ovld __cnfn convert_double4(uchar4); +double4 __ovld __cnfn convert_double4(uint4); +double4 __ovld __cnfn convert_double4(ulong4); +double4 __ovld __cnfn convert_double4(ushort4); +double4 __ovld __cnfn convert_double4_rte(char4); +double4 __ovld __cnfn convert_double4_rte(double4); +double4 __ovld __cnfn convert_double4_rte(float4); +double4 __ovld __cnfn convert_double4_rte(int4); +double4 __ovld __cnfn convert_double4_rte(long4); +double4 __ovld __cnfn convert_double4_rte(short4); +double4 __ovld __cnfn convert_double4_rte(uchar4); +double4 __ovld __cnfn convert_double4_rte(uint4); +double4 __ovld __cnfn convert_double4_rte(ulong4); +double4 __ovld __cnfn convert_double4_rte(ushort4); +double4 __ovld __cnfn convert_double4_rtn(char4); +double4 __ovld __cnfn convert_double4_rtn(double4); +double4 __ovld __cnfn convert_double4_rtn(float4); +double4 __ovld __cnfn convert_double4_rtn(int4); +double4 __ovld __cnfn convert_double4_rtn(long4); +double4 __ovld __cnfn convert_double4_rtn(short4); +double4 __ovld __cnfn convert_double4_rtn(uchar4); +double4 __ovld __cnfn convert_double4_rtn(uint4); +double4 __ovld __cnfn convert_double4_rtn(ulong4); +double4 __ovld __cnfn convert_double4_rtn(ushort4); +double4 __ovld __cnfn convert_double4_rtp(char4); +double4 __ovld __cnfn convert_double4_rtp(double4); +double4 __ovld __cnfn convert_double4_rtp(float4); +double4 __ovld __cnfn convert_double4_rtp(int4); +double4 __ovld __cnfn convert_double4_rtp(long4); +double4 __ovld __cnfn convert_double4_rtp(short4); +double4 __ovld __cnfn convert_double4_rtp(uchar4); +double4 __ovld __cnfn convert_double4_rtp(uint4); +double4 __ovld __cnfn convert_double4_rtp(ulong4); +double4 __ovld __cnfn convert_double4_rtp(ushort4); +double4 __ovld __cnfn convert_double4_rtz(char4); +double4 __ovld __cnfn convert_double4_rtz(double4); +double4 __ovld __cnfn convert_double4_rtz(float4); +double4 __ovld __cnfn convert_double4_rtz(int4); +double4 __ovld __cnfn convert_double4_rtz(long4); +double4 __ovld __cnfn convert_double4_rtz(short4); +double4 __ovld __cnfn convert_double4_rtz(uchar4); +double4 __ovld __cnfn convert_double4_rtz(uint4); +double4 __ovld __cnfn convert_double4_rtz(ulong4); +double4 __ovld __cnfn convert_double4_rtz(ushort4); +double8 __ovld __cnfn convert_double8(char8); +double8 __ovld __cnfn convert_double8(double8); +double8 __ovld __cnfn convert_double8(float8); +double8 __ovld __cnfn convert_double8(int8); +double8 __ovld __cnfn convert_double8(long8); +double8 __ovld __cnfn convert_double8(short8); +double8 __ovld __cnfn convert_double8(uchar8); +double8 __ovld __cnfn convert_double8(uint8); +double8 __ovld __cnfn convert_double8(ulong8); +double8 __ovld __cnfn convert_double8(ushort8); +double8 __ovld __cnfn convert_double8_rte(char8); +double8 __ovld __cnfn convert_double8_rte(double8); +double8 __ovld __cnfn convert_double8_rte(float8); +double8 __ovld __cnfn convert_double8_rte(int8); +double8 __ovld __cnfn convert_double8_rte(long8); +double8 __ovld __cnfn convert_double8_rte(short8); +double8 __ovld __cnfn convert_double8_rte(uchar8); +double8 __ovld __cnfn convert_double8_rte(uint8); +double8 __ovld __cnfn convert_double8_rte(ulong8); +double8 __ovld __cnfn convert_double8_rte(ushort8); +double8 __ovld __cnfn convert_double8_rtn(char8); +double8 __ovld __cnfn convert_double8_rtn(double8); +double8 __ovld __cnfn convert_double8_rtn(float8); +double8 __ovld __cnfn convert_double8_rtn(int8); +double8 __ovld __cnfn convert_double8_rtn(long8); +double8 __ovld __cnfn convert_double8_rtn(short8); +double8 __ovld __cnfn convert_double8_rtn(uchar8); +double8 __ovld __cnfn convert_double8_rtn(uint8); +double8 __ovld __cnfn convert_double8_rtn(ulong8); +double8 __ovld __cnfn convert_double8_rtn(ushort8); +double8 __ovld __cnfn convert_double8_rtp(char8); +double8 __ovld __cnfn convert_double8_rtp(double8); +double8 __ovld __cnfn convert_double8_rtp(float8); +double8 __ovld __cnfn convert_double8_rtp(int8); +double8 __ovld __cnfn convert_double8_rtp(long8); +double8 __ovld __cnfn convert_double8_rtp(short8); +double8 __ovld __cnfn convert_double8_rtp(uchar8); +double8 __ovld __cnfn convert_double8_rtp(uint8); +double8 __ovld __cnfn convert_double8_rtp(ulong8); +double8 __ovld __cnfn convert_double8_rtp(ushort8); +double8 __ovld __cnfn convert_double8_rtz(char8); +double8 __ovld __cnfn convert_double8_rtz(double8); +double8 __ovld __cnfn convert_double8_rtz(float8); +double8 __ovld __cnfn convert_double8_rtz(int8); +double8 __ovld __cnfn convert_double8_rtz(long8); +double8 __ovld __cnfn convert_double8_rtz(short8); +double8 __ovld __cnfn convert_double8_rtz(uchar8); +double8 __ovld __cnfn convert_double8_rtz(uint8); +double8 __ovld __cnfn convert_double8_rtz(ulong8); +double8 __ovld __cnfn convert_double8_rtz(ushort8); +double16 __ovld __cnfn convert_double16(char16); +double16 __ovld __cnfn convert_double16(double16); +double16 __ovld __cnfn convert_double16(float16); +double16 __ovld __cnfn convert_double16(int16); +double16 __ovld __cnfn convert_double16(long16); +double16 __ovld __cnfn convert_double16(short16); +double16 __ovld __cnfn convert_double16(uchar16); +double16 __ovld __cnfn convert_double16(uint16); +double16 __ovld __cnfn convert_double16(ulong16); +double16 __ovld __cnfn convert_double16(ushort16); +double16 __ovld __cnfn convert_double16_rte(char16); +double16 __ovld __cnfn convert_double16_rte(double16); +double16 __ovld __cnfn convert_double16_rte(float16); +double16 __ovld __cnfn convert_double16_rte(int16); +double16 __ovld __cnfn convert_double16_rte(long16); +double16 __ovld __cnfn convert_double16_rte(short16); +double16 __ovld __cnfn convert_double16_rte(uchar16); +double16 __ovld __cnfn convert_double16_rte(uint16); +double16 __ovld __cnfn convert_double16_rte(ulong16); +double16 __ovld __cnfn convert_double16_rte(ushort16); +double16 __ovld __cnfn convert_double16_rtn(char16); +double16 __ovld __cnfn convert_double16_rtn(double16); +double16 __ovld __cnfn convert_double16_rtn(float16); +double16 __ovld __cnfn convert_double16_rtn(int16); +double16 __ovld __cnfn convert_double16_rtn(long16); +double16 __ovld __cnfn convert_double16_rtn(short16); +double16 __ovld __cnfn convert_double16_rtn(uchar16); +double16 __ovld __cnfn convert_double16_rtn(uint16); +double16 __ovld __cnfn convert_double16_rtn(ulong16); +double16 __ovld __cnfn convert_double16_rtn(ushort16); +double16 __ovld __cnfn convert_double16_rtp(char16); +double16 __ovld __cnfn convert_double16_rtp(double16); +double16 __ovld __cnfn convert_double16_rtp(float16); +double16 __ovld __cnfn convert_double16_rtp(int16); +double16 __ovld __cnfn convert_double16_rtp(long16); +double16 __ovld __cnfn convert_double16_rtp(short16); +double16 __ovld __cnfn convert_double16_rtp(uchar16); +double16 __ovld __cnfn convert_double16_rtp(uint16); +double16 __ovld __cnfn convert_double16_rtp(ulong16); +double16 __ovld __cnfn convert_double16_rtp(ushort16); +double16 __ovld __cnfn convert_double16_rtz(char16); +double16 __ovld __cnfn convert_double16_rtz(double16); +double16 __ovld __cnfn convert_double16_rtz(float16); +double16 __ovld __cnfn convert_double16_rtz(int16); +double16 __ovld __cnfn convert_double16_rtz(long16); +double16 __ovld __cnfn convert_double16_rtz(short16); +double16 __ovld __cnfn convert_double16_rtz(uchar16); +double16 __ovld __cnfn convert_double16_rtz(uint16); +double16 __ovld __cnfn convert_double16_rtz(ulong16); +double16 __ovld __cnfn convert_double16_rtz(ushort16); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +// Convert half types to non-double types. +uchar __ovld __cnfn convert_uchar(half); +uchar __ovld __cnfn convert_uchar_rte(half); +uchar __ovld __cnfn convert_uchar_rtp(half); +uchar __ovld __cnfn convert_uchar_rtn(half); +uchar __ovld __cnfn convert_uchar_rtz(half); +uchar __ovld __cnfn convert_uchar_sat(half); +uchar __ovld __cnfn convert_uchar_sat_rte(half); +uchar __ovld __cnfn convert_uchar_sat_rtp(half); +uchar __ovld __cnfn convert_uchar_sat_rtn(half); +uchar __ovld __cnfn convert_uchar_sat_rtz(half); +uchar2 __ovld __cnfn convert_uchar2(half2); +uchar2 __ovld __cnfn convert_uchar2_rte(half2); +uchar2 __ovld __cnfn convert_uchar2_rtp(half2); +uchar2 __ovld __cnfn convert_uchar2_rtn(half2); +uchar2 __ovld __cnfn convert_uchar2_rtz(half2); +uchar2 __ovld __cnfn convert_uchar2_sat(half2); +uchar2 __ovld __cnfn convert_uchar2_sat_rte(half2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtp(half2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtn(half2); +uchar2 __ovld __cnfn convert_uchar2_sat_rtz(half2); +uchar3 __ovld __cnfn convert_uchar3(half3); +uchar3 __ovld __cnfn convert_uchar3_rte(half3); +uchar3 __ovld __cnfn convert_uchar3_rtp(half3); +uchar3 __ovld __cnfn convert_uchar3_rtn(half3); +uchar3 __ovld __cnfn convert_uchar3_rtz(half3); +uchar3 __ovld __cnfn convert_uchar3_sat(half3); +uchar3 __ovld __cnfn convert_uchar3_sat_rte(half3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtp(half3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtn(half3); +uchar3 __ovld __cnfn convert_uchar3_sat_rtz(half3); +uchar4 __ovld __cnfn convert_uchar4(half4); +uchar4 __ovld __cnfn convert_uchar4_rte(half4); +uchar4 __ovld __cnfn convert_uchar4_rtp(half4); +uchar4 __ovld __cnfn convert_uchar4_rtn(half4); +uchar4 __ovld __cnfn convert_uchar4_rtz(half4); +uchar4 __ovld __cnfn convert_uchar4_sat(half4); +uchar4 __ovld __cnfn convert_uchar4_sat_rte(half4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtp(half4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtn(half4); +uchar4 __ovld __cnfn convert_uchar4_sat_rtz(half4); +uchar8 __ovld __cnfn convert_uchar8(half8); +uchar8 __ovld __cnfn convert_uchar8_rte(half8); +uchar8 __ovld __cnfn convert_uchar8_rtp(half8); +uchar8 __ovld __cnfn convert_uchar8_rtn(half8); +uchar8 __ovld __cnfn convert_uchar8_rtz(half8); +uchar8 __ovld __cnfn convert_uchar8_sat(half8); +uchar8 __ovld __cnfn convert_uchar8_sat_rte(half8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtp(half8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtn(half8); +uchar8 __ovld __cnfn convert_uchar8_sat_rtz(half8); +uchar16 __ovld __cnfn convert_uchar16(half16); +uchar16 __ovld __cnfn convert_uchar16_rte(half16); +uchar16 __ovld __cnfn convert_uchar16_rtp(half16); +uchar16 __ovld __cnfn convert_uchar16_rtn(half16); +uchar16 __ovld __cnfn convert_uchar16_rtz(half16); +uchar16 __ovld __cnfn convert_uchar16_sat(half16); +uchar16 __ovld __cnfn convert_uchar16_sat_rte(half16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtp(half16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtn(half16); +uchar16 __ovld __cnfn convert_uchar16_sat_rtz(half16); +ushort __ovld __cnfn convert_ushort(half); +ushort __ovld __cnfn convert_ushort_rte(half); +ushort __ovld __cnfn convert_ushort_rtp(half); +ushort __ovld __cnfn convert_ushort_rtn(half); +ushort __ovld __cnfn convert_ushort_rtz(half); +ushort __ovld __cnfn convert_ushort_sat(half); +ushort __ovld __cnfn convert_ushort_sat_rte(half); +ushort __ovld __cnfn convert_ushort_sat_rtp(half); +ushort __ovld __cnfn convert_ushort_sat_rtn(half); +ushort __ovld __cnfn convert_ushort_sat_rtz(half); +ushort2 __ovld __cnfn convert_ushort2(half2); +ushort2 __ovld __cnfn convert_ushort2_rte(half2); +ushort2 __ovld __cnfn convert_ushort2_rtp(half2); +ushort2 __ovld __cnfn convert_ushort2_rtn(half2); +ushort2 __ovld __cnfn convert_ushort2_rtz(half2); +ushort2 __ovld __cnfn convert_ushort2_sat(half2); +ushort2 __ovld __cnfn convert_ushort2_sat_rte(half2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtp(half2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtn(half2); +ushort2 __ovld __cnfn convert_ushort2_sat_rtz(half2); +ushort3 __ovld __cnfn convert_ushort3(half3); +ushort3 __ovld __cnfn convert_ushort3_rte(half3); +ushort3 __ovld __cnfn convert_ushort3_rtp(half3); +ushort3 __ovld __cnfn convert_ushort3_rtn(half3); +ushort3 __ovld __cnfn convert_ushort3_rtz(half3); +ushort3 __ovld __cnfn convert_ushort3_sat(half3); +ushort3 __ovld __cnfn convert_ushort3_sat_rte(half3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtp(half3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtn(half3); +ushort3 __ovld __cnfn convert_ushort3_sat_rtz(half3); +ushort4 __ovld __cnfn convert_ushort4(half4); +ushort4 __ovld __cnfn convert_ushort4_rte(half4); +ushort4 __ovld __cnfn convert_ushort4_rtp(half4); +ushort4 __ovld __cnfn convert_ushort4_rtn(half4); +ushort4 __ovld __cnfn convert_ushort4_rtz(half4); +ushort4 __ovld __cnfn convert_ushort4_sat(half4); +ushort4 __ovld __cnfn convert_ushort4_sat_rte(half4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtp(half4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtn(half4); +ushort4 __ovld __cnfn convert_ushort4_sat_rtz(half4); +ushort8 __ovld __cnfn convert_ushort8(half8); +ushort8 __ovld __cnfn convert_ushort8_rte(half8); +ushort8 __ovld __cnfn convert_ushort8_rtp(half8); +ushort8 __ovld __cnfn convert_ushort8_rtn(half8); +ushort8 __ovld __cnfn convert_ushort8_rtz(half8); +ushort8 __ovld __cnfn convert_ushort8_sat(half8); +ushort8 __ovld __cnfn convert_ushort8_sat_rte(half8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtp(half8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtn(half8); +ushort8 __ovld __cnfn convert_ushort8_sat_rtz(half8); +ushort16 __ovld __cnfn convert_ushort16(half16); +ushort16 __ovld __cnfn convert_ushort16_rte(half16); +ushort16 __ovld __cnfn convert_ushort16_rtp(half16); +ushort16 __ovld __cnfn convert_ushort16_rtn(half16); +ushort16 __ovld __cnfn convert_ushort16_rtz(half16); +ushort16 __ovld __cnfn convert_ushort16_sat(half16); +ushort16 __ovld __cnfn convert_ushort16_sat_rte(half16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtp(half16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtn(half16); +ushort16 __ovld __cnfn convert_ushort16_sat_rtz(half16); +uint __ovld __cnfn convert_uint(half); +uint __ovld __cnfn convert_uint_rte(half); +uint __ovld __cnfn convert_uint_rtp(half); +uint __ovld __cnfn convert_uint_rtn(half); +uint __ovld __cnfn convert_uint_rtz(half); +uint __ovld __cnfn convert_uint_sat(half); +uint __ovld __cnfn convert_uint_sat_rte(half); +uint __ovld __cnfn convert_uint_sat_rtp(half); +uint __ovld __cnfn convert_uint_sat_rtn(half); +uint __ovld __cnfn convert_uint_sat_rtz(half); +uint2 __ovld __cnfn convert_uint2(half2); +uint2 __ovld __cnfn convert_uint2_rte(half2); +uint2 __ovld __cnfn convert_uint2_rtp(half2); +uint2 __ovld __cnfn convert_uint2_rtn(half2); +uint2 __ovld __cnfn convert_uint2_rtz(half2); +uint2 __ovld __cnfn convert_uint2_sat(half2); +uint2 __ovld __cnfn convert_uint2_sat_rte(half2); +uint2 __ovld __cnfn convert_uint2_sat_rtp(half2); +uint2 __ovld __cnfn convert_uint2_sat_rtn(half2); +uint2 __ovld __cnfn convert_uint2_sat_rtz(half2); +uint3 __ovld __cnfn convert_uint3(half3); +uint3 __ovld __cnfn convert_uint3_rte(half3); +uint3 __ovld __cnfn convert_uint3_rtp(half3); +uint3 __ovld __cnfn convert_uint3_rtn(half3); +uint3 __ovld __cnfn convert_uint3_rtz(half3); +uint3 __ovld __cnfn convert_uint3_sat(half3); +uint3 __ovld __cnfn convert_uint3_sat_rte(half3); +uint3 __ovld __cnfn convert_uint3_sat_rtp(half3); +uint3 __ovld __cnfn convert_uint3_sat_rtn(half3); +uint3 __ovld __cnfn convert_uint3_sat_rtz(half3); +uint4 __ovld __cnfn convert_uint4(half4); +uint4 __ovld __cnfn convert_uint4_rte(half4); +uint4 __ovld __cnfn convert_uint4_rtp(half4); +uint4 __ovld __cnfn convert_uint4_rtn(half4); +uint4 __ovld __cnfn convert_uint4_rtz(half4); +uint4 __ovld __cnfn convert_uint4_sat(half4); +uint4 __ovld __cnfn convert_uint4_sat_rte(half4); +uint4 __ovld __cnfn convert_uint4_sat_rtp(half4); +uint4 __ovld __cnfn convert_uint4_sat_rtn(half4); +uint4 __ovld __cnfn convert_uint4_sat_rtz(half4); +uint8 __ovld __cnfn convert_uint8(half8); +uint8 __ovld __cnfn convert_uint8_rte(half8); +uint8 __ovld __cnfn convert_uint8_rtp(half8); +uint8 __ovld __cnfn convert_uint8_rtn(half8); +uint8 __ovld __cnfn convert_uint8_rtz(half8); +uint8 __ovld __cnfn convert_uint8_sat(half8); +uint8 __ovld __cnfn convert_uint8_sat_rte(half8); +uint8 __ovld __cnfn convert_uint8_sat_rtp(half8); +uint8 __ovld __cnfn convert_uint8_sat_rtn(half8); +uint8 __ovld __cnfn convert_uint8_sat_rtz(half8); +uint16 __ovld __cnfn convert_uint16(half16); +uint16 __ovld __cnfn convert_uint16_rte(half16); +uint16 __ovld __cnfn convert_uint16_rtp(half16); +uint16 __ovld __cnfn convert_uint16_rtn(half16); +uint16 __ovld __cnfn convert_uint16_rtz(half16); +uint16 __ovld __cnfn convert_uint16_sat(half16); +uint16 __ovld __cnfn convert_uint16_sat_rte(half16); +uint16 __ovld __cnfn convert_uint16_sat_rtp(half16); +uint16 __ovld __cnfn convert_uint16_sat_rtn(half16); +uint16 __ovld __cnfn convert_uint16_sat_rtz(half16); +ulong __ovld __cnfn convert_ulong(half); +ulong __ovld __cnfn convert_ulong_rte(half); +ulong __ovld __cnfn convert_ulong_rtp(half); +ulong __ovld __cnfn convert_ulong_rtn(half); +ulong __ovld __cnfn convert_ulong_rtz(half); +ulong __ovld __cnfn convert_ulong_sat(half); +ulong __ovld __cnfn convert_ulong_sat_rte(half); +ulong __ovld __cnfn convert_ulong_sat_rtp(half); +ulong __ovld __cnfn convert_ulong_sat_rtn(half); +ulong __ovld __cnfn convert_ulong_sat_rtz(half); +ulong2 __ovld __cnfn convert_ulong2(half2); +ulong2 __ovld __cnfn convert_ulong2_rte(half2); +ulong2 __ovld __cnfn convert_ulong2_rtp(half2); +ulong2 __ovld __cnfn convert_ulong2_rtn(half2); +ulong2 __ovld __cnfn convert_ulong2_rtz(half2); +ulong2 __ovld __cnfn convert_ulong2_sat(half2); +ulong2 __ovld __cnfn convert_ulong2_sat_rte(half2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtp(half2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtn(half2); +ulong2 __ovld __cnfn convert_ulong2_sat_rtz(half2); +ulong3 __ovld __cnfn convert_ulong3(half3); +ulong3 __ovld __cnfn convert_ulong3_rte(half3); +ulong3 __ovld __cnfn convert_ulong3_rtp(half3); +ulong3 __ovld __cnfn convert_ulong3_rtn(half3); +ulong3 __ovld __cnfn convert_ulong3_rtz(half3); +ulong3 __ovld __cnfn convert_ulong3_sat(half3); +ulong3 __ovld __cnfn convert_ulong3_sat_rte(half3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtp(half3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtn(half3); +ulong3 __ovld __cnfn convert_ulong3_sat_rtz(half3); +ulong4 __ovld __cnfn convert_ulong4(half4); +ulong4 __ovld __cnfn convert_ulong4_rte(half4); +ulong4 __ovld __cnfn convert_ulong4_rtp(half4); +ulong4 __ovld __cnfn convert_ulong4_rtn(half4); +ulong4 __ovld __cnfn convert_ulong4_rtz(half4); +ulong4 __ovld __cnfn convert_ulong4_sat(half4); +ulong4 __ovld __cnfn convert_ulong4_sat_rte(half4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtp(half4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtn(half4); +ulong4 __ovld __cnfn convert_ulong4_sat_rtz(half4); +ulong8 __ovld __cnfn convert_ulong8(half8); +ulong8 __ovld __cnfn convert_ulong8_rte(half8); +ulong8 __ovld __cnfn convert_ulong8_rtp(half8); +ulong8 __ovld __cnfn convert_ulong8_rtn(half8); +ulong8 __ovld __cnfn convert_ulong8_rtz(half8); +ulong8 __ovld __cnfn convert_ulong8_sat(half8); +ulong8 __ovld __cnfn convert_ulong8_sat_rte(half8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtp(half8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtn(half8); +ulong8 __ovld __cnfn convert_ulong8_sat_rtz(half8); +ulong16 __ovld __cnfn convert_ulong16(half16); +ulong16 __ovld __cnfn convert_ulong16_rte(half16); +ulong16 __ovld __cnfn convert_ulong16_rtp(half16); +ulong16 __ovld __cnfn convert_ulong16_rtn(half16); +ulong16 __ovld __cnfn convert_ulong16_rtz(half16); +ulong16 __ovld __cnfn convert_ulong16_sat(half16); +ulong16 __ovld __cnfn convert_ulong16_sat_rte(half16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtp(half16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtn(half16); +ulong16 __ovld __cnfn convert_ulong16_sat_rtz(half16); +char __ovld __cnfn convert_char(half); +char __ovld __cnfn convert_char_rte(half); +char __ovld __cnfn convert_char_rtp(half); +char __ovld __cnfn convert_char_rtn(half); +char __ovld __cnfn convert_char_rtz(half); +char __ovld __cnfn convert_char_sat(half); +char __ovld __cnfn convert_char_sat_rte(half); +char __ovld __cnfn convert_char_sat_rtp(half); +char __ovld __cnfn convert_char_sat_rtn(half); +char __ovld __cnfn convert_char_sat_rtz(half); +char2 __ovld __cnfn convert_char2(half2); +char2 __ovld __cnfn convert_char2_rte(half2); +char2 __ovld __cnfn convert_char2_rtp(half2); +char2 __ovld __cnfn convert_char2_rtn(half2); +char2 __ovld __cnfn convert_char2_rtz(half2); +char2 __ovld __cnfn convert_char2_sat(half2); +char2 __ovld __cnfn convert_char2_sat_rte(half2); +char2 __ovld __cnfn convert_char2_sat_rtp(half2); +char2 __ovld __cnfn convert_char2_sat_rtn(half2); +char2 __ovld __cnfn convert_char2_sat_rtz(half2); +char3 __ovld __cnfn convert_char3(half3); +char3 __ovld __cnfn convert_char3_rte(half3); +char3 __ovld __cnfn convert_char3_rtp(half3); +char3 __ovld __cnfn convert_char3_rtn(half3); +char3 __ovld __cnfn convert_char3_rtz(half3); +char3 __ovld __cnfn convert_char3_sat(half3); +char3 __ovld __cnfn convert_char3_sat_rte(half3); +char3 __ovld __cnfn convert_char3_sat_rtp(half3); +char3 __ovld __cnfn convert_char3_sat_rtn(half3); +char3 __ovld __cnfn convert_char3_sat_rtz(half3); +char4 __ovld __cnfn convert_char4(half4); +char4 __ovld __cnfn convert_char4_rte(half4); +char4 __ovld __cnfn convert_char4_rtp(half4); +char4 __ovld __cnfn convert_char4_rtn(half4); +char4 __ovld __cnfn convert_char4_rtz(half4); +char4 __ovld __cnfn convert_char4_sat(half4); +char4 __ovld __cnfn convert_char4_sat_rte(half4); +char4 __ovld __cnfn convert_char4_sat_rtp(half4); +char4 __ovld __cnfn convert_char4_sat_rtn(half4); +char4 __ovld __cnfn convert_char4_sat_rtz(half4); +char8 __ovld __cnfn convert_char8(half8); +char8 __ovld __cnfn convert_char8_rte(half8); +char8 __ovld __cnfn convert_char8_rtp(half8); +char8 __ovld __cnfn convert_char8_rtn(half8); +char8 __ovld __cnfn convert_char8_rtz(half8); +char8 __ovld __cnfn convert_char8_sat(half8); +char8 __ovld __cnfn convert_char8_sat_rte(half8); +char8 __ovld __cnfn convert_char8_sat_rtp(half8); +char8 __ovld __cnfn convert_char8_sat_rtn(half8); +char8 __ovld __cnfn convert_char8_sat_rtz(half8); +char16 __ovld __cnfn convert_char16(half16); +char16 __ovld __cnfn convert_char16_rte(half16); +char16 __ovld __cnfn convert_char16_rtp(half16); +char16 __ovld __cnfn convert_char16_rtn(half16); +char16 __ovld __cnfn convert_char16_rtz(half16); +char16 __ovld __cnfn convert_char16_sat(half16); +char16 __ovld __cnfn convert_char16_sat_rte(half16); +char16 __ovld __cnfn convert_char16_sat_rtp(half16); +char16 __ovld __cnfn convert_char16_sat_rtn(half16); +char16 __ovld __cnfn convert_char16_sat_rtz(half16); +short __ovld __cnfn convert_short(half); +short __ovld __cnfn convert_short_rte(half); +short __ovld __cnfn convert_short_rtp(half); +short __ovld __cnfn convert_short_rtn(half); +short __ovld __cnfn convert_short_rtz(half); +short __ovld __cnfn convert_short_sat(half); +short __ovld __cnfn convert_short_sat_rte(half); +short __ovld __cnfn convert_short_sat_rtp(half); +short __ovld __cnfn convert_short_sat_rtn(half); +short __ovld __cnfn convert_short_sat_rtz(half); +short2 __ovld __cnfn convert_short2(half2); +short2 __ovld __cnfn convert_short2_rte(half2); +short2 __ovld __cnfn convert_short2_rtp(half2); +short2 __ovld __cnfn convert_short2_rtn(half2); +short2 __ovld __cnfn convert_short2_rtz(half2); +short2 __ovld __cnfn convert_short2_sat(half2); +short2 __ovld __cnfn convert_short2_sat_rte(half2); +short2 __ovld __cnfn convert_short2_sat_rtp(half2); +short2 __ovld __cnfn convert_short2_sat_rtn(half2); +short2 __ovld __cnfn convert_short2_sat_rtz(half2); +short3 __ovld __cnfn convert_short3(half3); +short3 __ovld __cnfn convert_short3_rte(half3); +short3 __ovld __cnfn convert_short3_rtp(half3); +short3 __ovld __cnfn convert_short3_rtn(half3); +short3 __ovld __cnfn convert_short3_rtz(half3); +short3 __ovld __cnfn convert_short3_sat(half3); +short3 __ovld __cnfn convert_short3_sat_rte(half3); +short3 __ovld __cnfn convert_short3_sat_rtp(half3); +short3 __ovld __cnfn convert_short3_sat_rtn(half3); +short3 __ovld __cnfn convert_short3_sat_rtz(half3); +short4 __ovld __cnfn convert_short4(half4); +short4 __ovld __cnfn convert_short4_rte(half4); +short4 __ovld __cnfn convert_short4_rtp(half4); +short4 __ovld __cnfn convert_short4_rtn(half4); +short4 __ovld __cnfn convert_short4_rtz(half4); +short4 __ovld __cnfn convert_short4_sat(half4); +short4 __ovld __cnfn convert_short4_sat_rte(half4); +short4 __ovld __cnfn convert_short4_sat_rtp(half4); +short4 __ovld __cnfn convert_short4_sat_rtn(half4); +short4 __ovld __cnfn convert_short4_sat_rtz(half4); +short8 __ovld __cnfn convert_short8(half8); +short8 __ovld __cnfn convert_short8_rte(half8); +short8 __ovld __cnfn convert_short8_rtp(half8); +short8 __ovld __cnfn convert_short8_rtn(half8); +short8 __ovld __cnfn convert_short8_rtz(half8); +short8 __ovld __cnfn convert_short8_sat(half8); +short8 __ovld __cnfn convert_short8_sat_rte(half8); +short8 __ovld __cnfn convert_short8_sat_rtp(half8); +short8 __ovld __cnfn convert_short8_sat_rtn(half8); +short8 __ovld __cnfn convert_short8_sat_rtz(half8); +short16 __ovld __cnfn convert_short16(half16); +short16 __ovld __cnfn convert_short16_rte(half16); +short16 __ovld __cnfn convert_short16_rtp(half16); +short16 __ovld __cnfn convert_short16_rtn(half16); +short16 __ovld __cnfn convert_short16_rtz(half16); +short16 __ovld __cnfn convert_short16_sat(half16); +short16 __ovld __cnfn convert_short16_sat_rte(half16); +short16 __ovld __cnfn convert_short16_sat_rtp(half16); +short16 __ovld __cnfn convert_short16_sat_rtn(half16); +short16 __ovld __cnfn convert_short16_sat_rtz(half16); +int __ovld __cnfn convert_int(half); +int __ovld __cnfn convert_int_rte(half); +int __ovld __cnfn convert_int_rtp(half); +int __ovld __cnfn convert_int_rtn(half); +int __ovld __cnfn convert_int_rtz(half); +int __ovld __cnfn convert_int_sat(half); +int __ovld __cnfn convert_int_sat_rte(half); +int __ovld __cnfn convert_int_sat_rtp(half); +int __ovld __cnfn convert_int_sat_rtn(half); +int __ovld __cnfn convert_int_sat_rtz(half); +int2 __ovld __cnfn convert_int2(half2); +int2 __ovld __cnfn convert_int2_rte(half2); +int2 __ovld __cnfn convert_int2_rtp(half2); +int2 __ovld __cnfn convert_int2_rtn(half2); +int2 __ovld __cnfn convert_int2_rtz(half2); +int2 __ovld __cnfn convert_int2_sat(half2); +int2 __ovld __cnfn convert_int2_sat_rte(half2); +int2 __ovld __cnfn convert_int2_sat_rtp(half2); +int2 __ovld __cnfn convert_int2_sat_rtn(half2); +int2 __ovld __cnfn convert_int2_sat_rtz(half2); +int3 __ovld __cnfn convert_int3(half3); +int3 __ovld __cnfn convert_int3_rte(half3); +int3 __ovld __cnfn convert_int3_rtp(half3); +int3 __ovld __cnfn convert_int3_rtn(half3); +int3 __ovld __cnfn convert_int3_rtz(half3); +int3 __ovld __cnfn convert_int3_sat(half3); +int3 __ovld __cnfn convert_int3_sat_rte(half3); +int3 __ovld __cnfn convert_int3_sat_rtp(half3); +int3 __ovld __cnfn convert_int3_sat_rtn(half3); +int3 __ovld __cnfn convert_int3_sat_rtz(half3); +int4 __ovld __cnfn convert_int4(half4); +int4 __ovld __cnfn convert_int4_rte(half4); +int4 __ovld __cnfn convert_int4_rtp(half4); +int4 __ovld __cnfn convert_int4_rtn(half4); +int4 __ovld __cnfn convert_int4_rtz(half4); +int4 __ovld __cnfn convert_int4_sat(half4); +int4 __ovld __cnfn convert_int4_sat_rte(half4); +int4 __ovld __cnfn convert_int4_sat_rtp(half4); +int4 __ovld __cnfn convert_int4_sat_rtn(half4); +int4 __ovld __cnfn convert_int4_sat_rtz(half4); +int8 __ovld __cnfn convert_int8(half8); +int8 __ovld __cnfn convert_int8_rte(half8); +int8 __ovld __cnfn convert_int8_rtp(half8); +int8 __ovld __cnfn convert_int8_rtn(half8); +int8 __ovld __cnfn convert_int8_rtz(half8); +int8 __ovld __cnfn convert_int8_sat(half8); +int8 __ovld __cnfn convert_int8_sat_rte(half8); +int8 __ovld __cnfn convert_int8_sat_rtp(half8); +int8 __ovld __cnfn convert_int8_sat_rtn(half8); +int8 __ovld __cnfn convert_int8_sat_rtz(half8); +int16 __ovld __cnfn convert_int16(half16); +int16 __ovld __cnfn convert_int16_rte(half16); +int16 __ovld __cnfn convert_int16_rtp(half16); +int16 __ovld __cnfn convert_int16_rtn(half16); +int16 __ovld __cnfn convert_int16_rtz(half16); +int16 __ovld __cnfn convert_int16_sat(half16); +int16 __ovld __cnfn convert_int16_sat_rte(half16); +int16 __ovld __cnfn convert_int16_sat_rtp(half16); +int16 __ovld __cnfn convert_int16_sat_rtn(half16); +int16 __ovld __cnfn convert_int16_sat_rtz(half16); +long __ovld __cnfn convert_long(half); +long __ovld __cnfn convert_long_rte(half); +long __ovld __cnfn convert_long_rtp(half); +long __ovld __cnfn convert_long_rtn(half); +long __ovld __cnfn convert_long_rtz(half); +long __ovld __cnfn convert_long_sat(half); +long __ovld __cnfn convert_long_sat_rte(half); +long __ovld __cnfn convert_long_sat_rtp(half); +long __ovld __cnfn convert_long_sat_rtn(half); +long __ovld __cnfn convert_long_sat_rtz(half); +long2 __ovld __cnfn convert_long2(half2); +long2 __ovld __cnfn convert_long2_rte(half2); +long2 __ovld __cnfn convert_long2_rtp(half2); +long2 __ovld __cnfn convert_long2_rtn(half2); +long2 __ovld __cnfn convert_long2_rtz(half2); +long2 __ovld __cnfn convert_long2_sat(half2); +long2 __ovld __cnfn convert_long2_sat_rte(half2); +long2 __ovld __cnfn convert_long2_sat_rtp(half2); +long2 __ovld __cnfn convert_long2_sat_rtn(half2); +long2 __ovld __cnfn convert_long2_sat_rtz(half2); +long3 __ovld __cnfn convert_long3(half3); +long3 __ovld __cnfn convert_long3_rte(half3); +long3 __ovld __cnfn convert_long3_rtp(half3); +long3 __ovld __cnfn convert_long3_rtn(half3); +long3 __ovld __cnfn convert_long3_rtz(half3); +long3 __ovld __cnfn convert_long3_sat(half3); +long3 __ovld __cnfn convert_long3_sat_rte(half3); +long3 __ovld __cnfn convert_long3_sat_rtp(half3); +long3 __ovld __cnfn convert_long3_sat_rtn(half3); +long3 __ovld __cnfn convert_long3_sat_rtz(half3); +long4 __ovld __cnfn convert_long4(half4); +long4 __ovld __cnfn convert_long4_rte(half4); +long4 __ovld __cnfn convert_long4_rtp(half4); +long4 __ovld __cnfn convert_long4_rtn(half4); +long4 __ovld __cnfn convert_long4_rtz(half4); +long4 __ovld __cnfn convert_long4_sat(half4); +long4 __ovld __cnfn convert_long4_sat_rte(half4); +long4 __ovld __cnfn convert_long4_sat_rtp(half4); +long4 __ovld __cnfn convert_long4_sat_rtn(half4); +long4 __ovld __cnfn convert_long4_sat_rtz(half4); +long8 __ovld __cnfn convert_long8(half8); +long8 __ovld __cnfn convert_long8_rte(half8); +long8 __ovld __cnfn convert_long8_rtp(half8); +long8 __ovld __cnfn convert_long8_rtn(half8); +long8 __ovld __cnfn convert_long8_rtz(half8); +long8 __ovld __cnfn convert_long8_sat(half8); +long8 __ovld __cnfn convert_long8_sat_rte(half8); +long8 __ovld __cnfn convert_long8_sat_rtp(half8); +long8 __ovld __cnfn convert_long8_sat_rtn(half8); +long8 __ovld __cnfn convert_long8_sat_rtz(half8); +long16 __ovld __cnfn convert_long16(half16); +long16 __ovld __cnfn convert_long16_rte(half16); +long16 __ovld __cnfn convert_long16_rtp(half16); +long16 __ovld __cnfn convert_long16_rtn(half16); +long16 __ovld __cnfn convert_long16_rtz(half16); +long16 __ovld __cnfn convert_long16_sat(half16); +long16 __ovld __cnfn convert_long16_sat_rte(half16); +long16 __ovld __cnfn convert_long16_sat_rtp(half16); +long16 __ovld __cnfn convert_long16_sat_rtn(half16); +long16 __ovld __cnfn convert_long16_sat_rtz(half16); +float __ovld __cnfn convert_float(half); +float __ovld __cnfn convert_float_rte(half); +float __ovld __cnfn convert_float_rtp(half); +float __ovld __cnfn convert_float_rtn(half); +float __ovld __cnfn convert_float_rtz(half); +float2 __ovld __cnfn convert_float2(half2); +float2 __ovld __cnfn convert_float2_rte(half2); +float2 __ovld __cnfn convert_float2_rtp(half2); +float2 __ovld __cnfn convert_float2_rtn(half2); +float2 __ovld __cnfn convert_float2_rtz(half2); +float3 __ovld __cnfn convert_float3(half3); +float3 __ovld __cnfn convert_float3_rte(half3); +float3 __ovld __cnfn convert_float3_rtp(half3); +float3 __ovld __cnfn convert_float3_rtn(half3); +float3 __ovld __cnfn convert_float3_rtz(half3); +float4 __ovld __cnfn convert_float4(half4); +float4 __ovld __cnfn convert_float4_rte(half4); +float4 __ovld __cnfn convert_float4_rtp(half4); +float4 __ovld __cnfn convert_float4_rtn(half4); +float4 __ovld __cnfn convert_float4_rtz(half4); +float8 __ovld __cnfn convert_float8(half8); +float8 __ovld __cnfn convert_float8_rte(half8); +float8 __ovld __cnfn convert_float8_rtp(half8); +float8 __ovld __cnfn convert_float8_rtn(half8); +float8 __ovld __cnfn convert_float8_rtz(half8); +float16 __ovld __cnfn convert_float16(half16); +float16 __ovld __cnfn convert_float16_rte(half16); +float16 __ovld __cnfn convert_float16_rtp(half16); +float16 __ovld __cnfn convert_float16_rtn(half16); +float16 __ovld __cnfn convert_float16_rtz(half16); + +// Convert non-double types to half types. +half __ovld __cnfn convert_half(uchar); +half __ovld __cnfn convert_half(ushort); +half __ovld __cnfn convert_half(uint); +half __ovld __cnfn convert_half(ulong); +half __ovld __cnfn convert_half(char); +half __ovld __cnfn convert_half(short); +half __ovld __cnfn convert_half(int); +half __ovld __cnfn convert_half(long); +half __ovld __cnfn convert_half(float); +half __ovld __cnfn convert_half(half); +half __ovld __cnfn convert_half_rte(uchar); +half __ovld __cnfn convert_half_rte(ushort); +half __ovld __cnfn convert_half_rte(uint); +half __ovld __cnfn convert_half_rte(ulong); +half __ovld __cnfn convert_half_rte(char); +half __ovld __cnfn convert_half_rte(short); +half __ovld __cnfn convert_half_rte(int); +half __ovld __cnfn convert_half_rte(long); +half __ovld __cnfn convert_half_rte(float); +half __ovld __cnfn convert_half_rte(half); +half __ovld __cnfn convert_half_rtp(uchar); +half __ovld __cnfn convert_half_rtp(ushort); +half __ovld __cnfn convert_half_rtp(uint); +half __ovld __cnfn convert_half_rtp(ulong); +half __ovld __cnfn convert_half_rtp(char); +half __ovld __cnfn convert_half_rtp(short); +half __ovld __cnfn convert_half_rtp(int); +half __ovld __cnfn convert_half_rtp(long); +half __ovld __cnfn convert_half_rtp(float); +half __ovld __cnfn convert_half_rtp(half); +half __ovld __cnfn convert_half_rtn(uchar); +half __ovld __cnfn convert_half_rtn(ushort); +half __ovld __cnfn convert_half_rtn(uint); +half __ovld __cnfn convert_half_rtn(ulong); +half __ovld __cnfn convert_half_rtn(char); +half __ovld __cnfn convert_half_rtn(short); +half __ovld __cnfn convert_half_rtn(int); +half __ovld __cnfn convert_half_rtn(long); +half __ovld __cnfn convert_half_rtn(float); +half __ovld __cnfn convert_half_rtn(half); +half __ovld __cnfn convert_half_rtz(uchar); +half __ovld __cnfn convert_half_rtz(ushort); +half __ovld __cnfn convert_half_rtz(uint); +half __ovld __cnfn convert_half_rtz(ulong); +half __ovld __cnfn convert_half_rtz(char); +half __ovld __cnfn convert_half_rtz(short); +half __ovld __cnfn convert_half_rtz(int); +half __ovld __cnfn convert_half_rtz(long); +half __ovld __cnfn convert_half_rtz(float); +half __ovld __cnfn convert_half_rtz(half); +half2 __ovld __cnfn convert_half2(char2); +half2 __ovld __cnfn convert_half2(uchar2); +half2 __ovld __cnfn convert_half2(short2); +half2 __ovld __cnfn convert_half2(ushort2); +half2 __ovld __cnfn convert_half2(int2); +half2 __ovld __cnfn convert_half2(uint2); +half2 __ovld __cnfn convert_half2(long2); +half2 __ovld __cnfn convert_half2(ulong2); +half2 __ovld __cnfn convert_half2(float2); +half2 __ovld __cnfn convert_half2(half2); +half2 __ovld __cnfn convert_half2_rte(char2); +half2 __ovld __cnfn convert_half2_rte(uchar2); +half2 __ovld __cnfn convert_half2_rte(short2); +half2 __ovld __cnfn convert_half2_rte(ushort2); +half2 __ovld __cnfn convert_half2_rte(int2); +half2 __ovld __cnfn convert_half2_rte(uint2); +half2 __ovld __cnfn convert_half2_rte(long2); +half2 __ovld __cnfn convert_half2_rte(ulong2); +half2 __ovld __cnfn convert_half2_rte(float2); +half2 __ovld __cnfn convert_half2_rte(half2); +half2 __ovld __cnfn convert_half2_rtp(char2); +half2 __ovld __cnfn convert_half2_rtp(uchar2); +half2 __ovld __cnfn convert_half2_rtp(short2); +half2 __ovld __cnfn convert_half2_rtp(ushort2); +half2 __ovld __cnfn convert_half2_rtp(int2); +half2 __ovld __cnfn convert_half2_rtp(uint2); +half2 __ovld __cnfn convert_half2_rtp(long2); +half2 __ovld __cnfn convert_half2_rtp(ulong2); +half2 __ovld __cnfn convert_half2_rtp(float2); +half2 __ovld __cnfn convert_half2_rtp(half2); +half2 __ovld __cnfn convert_half2_rtn(char2); +half2 __ovld __cnfn convert_half2_rtn(uchar2); +half2 __ovld __cnfn convert_half2_rtn(short2); +half2 __ovld __cnfn convert_half2_rtn(ushort2); +half2 __ovld __cnfn convert_half2_rtn(int2); +half2 __ovld __cnfn convert_half2_rtn(uint2); +half2 __ovld __cnfn convert_half2_rtn(long2); +half2 __ovld __cnfn convert_half2_rtn(ulong2); +half2 __ovld __cnfn convert_half2_rtn(float2); +half2 __ovld __cnfn convert_half2_rtn(half2); +half2 __ovld __cnfn convert_half2_rtz(char2); +half2 __ovld __cnfn convert_half2_rtz(uchar2); +half2 __ovld __cnfn convert_half2_rtz(short2); +half2 __ovld __cnfn convert_half2_rtz(ushort2); +half2 __ovld __cnfn convert_half2_rtz(int2); +half2 __ovld __cnfn convert_half2_rtz(uint2); +half2 __ovld __cnfn convert_half2_rtz(long2); +half2 __ovld __cnfn convert_half2_rtz(ulong2); +half2 __ovld __cnfn convert_half2_rtz(float2); +half2 __ovld __cnfn convert_half2_rtz(half2); +half3 __ovld __cnfn convert_half3(char3); +half3 __ovld __cnfn convert_half3(uchar3); +half3 __ovld __cnfn convert_half3(short3); +half3 __ovld __cnfn convert_half3(ushort3); +half3 __ovld __cnfn convert_half3(int3); +half3 __ovld __cnfn convert_half3(uint3); +half3 __ovld __cnfn convert_half3(long3); +half3 __ovld __cnfn convert_half3(ulong3); +half3 __ovld __cnfn convert_half3(float3); +half3 __ovld __cnfn convert_half3(half3); +half3 __ovld __cnfn convert_half3_rte(char3); +half3 __ovld __cnfn convert_half3_rte(uchar3); +half3 __ovld __cnfn convert_half3_rte(short3); +half3 __ovld __cnfn convert_half3_rte(ushort3); +half3 __ovld __cnfn convert_half3_rte(int3); +half3 __ovld __cnfn convert_half3_rte(uint3); +half3 __ovld __cnfn convert_half3_rte(long3); +half3 __ovld __cnfn convert_half3_rte(ulong3); +half3 __ovld __cnfn convert_half3_rte(float3); +half3 __ovld __cnfn convert_half3_rte(half3); +half3 __ovld __cnfn convert_half3_rtp(char3); +half3 __ovld __cnfn convert_half3_rtp(uchar3); +half3 __ovld __cnfn convert_half3_rtp(short3); +half3 __ovld __cnfn convert_half3_rtp(ushort3); +half3 __ovld __cnfn convert_half3_rtp(int3); +half3 __ovld __cnfn convert_half3_rtp(uint3); +half3 __ovld __cnfn convert_half3_rtp(long3); +half3 __ovld __cnfn convert_half3_rtp(ulong3); +half3 __ovld __cnfn convert_half3_rtp(float3); +half3 __ovld __cnfn convert_half3_rtp(half3); +half3 __ovld __cnfn convert_half3_rtn(char3); +half3 __ovld __cnfn convert_half3_rtn(uchar3); +half3 __ovld __cnfn convert_half3_rtn(short3); +half3 __ovld __cnfn convert_half3_rtn(ushort3); +half3 __ovld __cnfn convert_half3_rtn(int3); +half3 __ovld __cnfn convert_half3_rtn(uint3); +half3 __ovld __cnfn convert_half3_rtn(long3); +half3 __ovld __cnfn convert_half3_rtn(ulong3); +half3 __ovld __cnfn convert_half3_rtn(float3); +half3 __ovld __cnfn convert_half3_rtn(half3); +half3 __ovld __cnfn convert_half3_rtz(char3); +half3 __ovld __cnfn convert_half3_rtz(uchar3); +half3 __ovld __cnfn convert_half3_rtz(short3); +half3 __ovld __cnfn convert_half3_rtz(ushort3); +half3 __ovld __cnfn convert_half3_rtz(int3); +half3 __ovld __cnfn convert_half3_rtz(uint3); +half3 __ovld __cnfn convert_half3_rtz(long3); +half3 __ovld __cnfn convert_half3_rtz(ulong3); +half3 __ovld __cnfn convert_half3_rtz(float3); +half3 __ovld __cnfn convert_half3_rtz(half3); +half4 __ovld __cnfn convert_half4(char4); +half4 __ovld __cnfn convert_half4(uchar4); +half4 __ovld __cnfn convert_half4(short4); +half4 __ovld __cnfn convert_half4(ushort4); +half4 __ovld __cnfn convert_half4(int4); +half4 __ovld __cnfn convert_half4(uint4); +half4 __ovld __cnfn convert_half4(long4); +half4 __ovld __cnfn convert_half4(ulong4); +half4 __ovld __cnfn convert_half4(float4); +half4 __ovld __cnfn convert_half4(half4); +half4 __ovld __cnfn convert_half4_rte(char4); +half4 __ovld __cnfn convert_half4_rte(uchar4); +half4 __ovld __cnfn convert_half4_rte(short4); +half4 __ovld __cnfn convert_half4_rte(ushort4); +half4 __ovld __cnfn convert_half4_rte(int4); +half4 __ovld __cnfn convert_half4_rte(uint4); +half4 __ovld __cnfn convert_half4_rte(long4); +half4 __ovld __cnfn convert_half4_rte(ulong4); +half4 __ovld __cnfn convert_half4_rte(float4); +half4 __ovld __cnfn convert_half4_rte(half4); +half4 __ovld __cnfn convert_half4_rtp(char4); +half4 __ovld __cnfn convert_half4_rtp(uchar4); +half4 __ovld __cnfn convert_half4_rtp(short4); +half4 __ovld __cnfn convert_half4_rtp(ushort4); +half4 __ovld __cnfn convert_half4_rtp(int4); +half4 __ovld __cnfn convert_half4_rtp(uint4); +half4 __ovld __cnfn convert_half4_rtp(long4); +half4 __ovld __cnfn convert_half4_rtp(ulong4); +half4 __ovld __cnfn convert_half4_rtp(float4); +half4 __ovld __cnfn convert_half4_rtp(half4); +half4 __ovld __cnfn convert_half4_rtn(char4); +half4 __ovld __cnfn convert_half4_rtn(uchar4); +half4 __ovld __cnfn convert_half4_rtn(short4); +half4 __ovld __cnfn convert_half4_rtn(ushort4); +half4 __ovld __cnfn convert_half4_rtn(int4); +half4 __ovld __cnfn convert_half4_rtn(uint4); +half4 __ovld __cnfn convert_half4_rtn(long4); +half4 __ovld __cnfn convert_half4_rtn(ulong4); +half4 __ovld __cnfn convert_half4_rtn(float4); +half4 __ovld __cnfn convert_half4_rtn(half4); +half4 __ovld __cnfn convert_half4_rtz(char4); +half4 __ovld __cnfn convert_half4_rtz(uchar4); +half4 __ovld __cnfn convert_half4_rtz(short4); +half4 __ovld __cnfn convert_half4_rtz(ushort4); +half4 __ovld __cnfn convert_half4_rtz(int4); +half4 __ovld __cnfn convert_half4_rtz(uint4); +half4 __ovld __cnfn convert_half4_rtz(long4); +half4 __ovld __cnfn convert_half4_rtz(ulong4); +half4 __ovld __cnfn convert_half4_rtz(float4); +half4 __ovld __cnfn convert_half4_rtz(half4); +half8 __ovld __cnfn convert_half8(char8); +half8 __ovld __cnfn convert_half8(uchar8); +half8 __ovld __cnfn convert_half8(short8); +half8 __ovld __cnfn convert_half8(ushort8); +half8 __ovld __cnfn convert_half8(int8); +half8 __ovld __cnfn convert_half8(uint8); +half8 __ovld __cnfn convert_half8(long8); +half8 __ovld __cnfn convert_half8(ulong8); +half8 __ovld __cnfn convert_half8(float8); +half8 __ovld __cnfn convert_half8(half8); +half8 __ovld __cnfn convert_half8_rte(char8); +half8 __ovld __cnfn convert_half8_rte(uchar8); +half8 __ovld __cnfn convert_half8_rte(short8); +half8 __ovld __cnfn convert_half8_rte(ushort8); +half8 __ovld __cnfn convert_half8_rte(int8); +half8 __ovld __cnfn convert_half8_rte(uint8); +half8 __ovld __cnfn convert_half8_rte(long8); +half8 __ovld __cnfn convert_half8_rte(ulong8); +half8 __ovld __cnfn convert_half8_rte(float8); +half8 __ovld __cnfn convert_half8_rte(half8); +half8 __ovld __cnfn convert_half8_rtp(char8); +half8 __ovld __cnfn convert_half8_rtp(uchar8); +half8 __ovld __cnfn convert_half8_rtp(short8); +half8 __ovld __cnfn convert_half8_rtp(ushort8); +half8 __ovld __cnfn convert_half8_rtp(int8); +half8 __ovld __cnfn convert_half8_rtp(uint8); +half8 __ovld __cnfn convert_half8_rtp(long8); +half8 __ovld __cnfn convert_half8_rtp(ulong8); +half8 __ovld __cnfn convert_half8_rtp(float8); +half8 __ovld __cnfn convert_half8_rtp(half8); +half8 __ovld __cnfn convert_half8_rtn(char8); +half8 __ovld __cnfn convert_half8_rtn(uchar8); +half8 __ovld __cnfn convert_half8_rtn(short8); +half8 __ovld __cnfn convert_half8_rtn(ushort8); +half8 __ovld __cnfn convert_half8_rtn(int8); +half8 __ovld __cnfn convert_half8_rtn(uint8); +half8 __ovld __cnfn convert_half8_rtn(long8); +half8 __ovld __cnfn convert_half8_rtn(ulong8); +half8 __ovld __cnfn convert_half8_rtn(float8); +half8 __ovld __cnfn convert_half8_rtn(half8); +half8 __ovld __cnfn convert_half8_rtz(char8); +half8 __ovld __cnfn convert_half8_rtz(uchar8); +half8 __ovld __cnfn convert_half8_rtz(short8); +half8 __ovld __cnfn convert_half8_rtz(ushort8); +half8 __ovld __cnfn convert_half8_rtz(int8); +half8 __ovld __cnfn convert_half8_rtz(uint8); +half8 __ovld __cnfn convert_half8_rtz(long8); +half8 __ovld __cnfn convert_half8_rtz(ulong8); +half8 __ovld __cnfn convert_half8_rtz(float8); +half8 __ovld __cnfn convert_half8_rtz(half8); +half16 __ovld __cnfn convert_half16(char16); +half16 __ovld __cnfn convert_half16(uchar16); +half16 __ovld __cnfn convert_half16(short16); +half16 __ovld __cnfn convert_half16(ushort16); +half16 __ovld __cnfn convert_half16(int16); +half16 __ovld __cnfn convert_half16(uint16); +half16 __ovld __cnfn convert_half16(long16); +half16 __ovld __cnfn convert_half16(ulong16); +half16 __ovld __cnfn convert_half16(float16); +half16 __ovld __cnfn convert_half16(half16); +half16 __ovld __cnfn convert_half16_rte(char16); +half16 __ovld __cnfn convert_half16_rte(uchar16); +half16 __ovld __cnfn convert_half16_rte(short16); +half16 __ovld __cnfn convert_half16_rte(ushort16); +half16 __ovld __cnfn convert_half16_rte(int16); +half16 __ovld __cnfn convert_half16_rte(uint16); +half16 __ovld __cnfn convert_half16_rte(long16); +half16 __ovld __cnfn convert_half16_rte(ulong16); +half16 __ovld __cnfn convert_half16_rte(float16); +half16 __ovld __cnfn convert_half16_rte(half16); +half16 __ovld __cnfn convert_half16_rtp(char16); +half16 __ovld __cnfn convert_half16_rtp(uchar16); +half16 __ovld __cnfn convert_half16_rtp(short16); +half16 __ovld __cnfn convert_half16_rtp(ushort16); +half16 __ovld __cnfn convert_half16_rtp(int16); +half16 __ovld __cnfn convert_half16_rtp(uint16); +half16 __ovld __cnfn convert_half16_rtp(long16); +half16 __ovld __cnfn convert_half16_rtp(ulong16); +half16 __ovld __cnfn convert_half16_rtp(float16); +half16 __ovld __cnfn convert_half16_rtp(half16); +half16 __ovld __cnfn convert_half16_rtn(char16); +half16 __ovld __cnfn convert_half16_rtn(uchar16); +half16 __ovld __cnfn convert_half16_rtn(short16); +half16 __ovld __cnfn convert_half16_rtn(ushort16); +half16 __ovld __cnfn convert_half16_rtn(int16); +half16 __ovld __cnfn convert_half16_rtn(uint16); +half16 __ovld __cnfn convert_half16_rtn(long16); +half16 __ovld __cnfn convert_half16_rtn(ulong16); +half16 __ovld __cnfn convert_half16_rtn(float16); +half16 __ovld __cnfn convert_half16_rtn(half16); +half16 __ovld __cnfn convert_half16_rtz(char16); +half16 __ovld __cnfn convert_half16_rtz(uchar16); +half16 __ovld __cnfn convert_half16_rtz(short16); +half16 __ovld __cnfn convert_half16_rtz(ushort16); +half16 __ovld __cnfn convert_half16_rtz(int16); +half16 __ovld __cnfn convert_half16_rtz(uint16); +half16 __ovld __cnfn convert_half16_rtz(long16); +half16 __ovld __cnfn convert_half16_rtz(ulong16); +half16 __ovld __cnfn convert_half16_rtz(float16); +half16 __ovld __cnfn convert_half16_rtz(half16); + +// Convert half types to double types. +#ifdef cl_khr_fp64 +double __ovld __cnfn convert_double(half); +double __ovld __cnfn convert_double_rte(half); +double __ovld __cnfn convert_double_rtp(half); +double __ovld __cnfn convert_double_rtn(half); +double __ovld __cnfn convert_double_rtz(half); +double2 __ovld __cnfn convert_double2(half2); +double2 __ovld __cnfn convert_double2_rte(half2); +double2 __ovld __cnfn convert_double2_rtp(half2); +double2 __ovld __cnfn convert_double2_rtn(half2); +double2 __ovld __cnfn convert_double2_rtz(half2); +double3 __ovld __cnfn convert_double3(half3); +double3 __ovld __cnfn convert_double3_rte(half3); +double3 __ovld __cnfn convert_double3_rtp(half3); +double3 __ovld __cnfn convert_double3_rtn(half3); +double3 __ovld __cnfn convert_double3_rtz(half3); +double4 __ovld __cnfn convert_double4(half4); +double4 __ovld __cnfn convert_double4_rte(half4); +double4 __ovld __cnfn convert_double4_rtp(half4); +double4 __ovld __cnfn convert_double4_rtn(half4); +double4 __ovld __cnfn convert_double4_rtz(half4); +double8 __ovld __cnfn convert_double8(half8); +double8 __ovld __cnfn convert_double8_rte(half8); +double8 __ovld __cnfn convert_double8_rtp(half8); +double8 __ovld __cnfn convert_double8_rtn(half8); +double8 __ovld __cnfn convert_double8_rtz(half8); +double16 __ovld __cnfn convert_double16(half16); +double16 __ovld __cnfn convert_double16_rte(half16); +double16 __ovld __cnfn convert_double16_rtp(half16); +double16 __ovld __cnfn convert_double16_rtn(half16); +double16 __ovld __cnfn convert_double16_rtz(half16); + +// Convert double types to half types. +half __ovld __cnfn convert_half(double); +half __ovld __cnfn convert_half_rte(double); +half __ovld __cnfn convert_half_rtp(double); +half __ovld __cnfn convert_half_rtn(double); +half __ovld __cnfn convert_half_rtz(double); +half2 __ovld __cnfn convert_half2(double2); +half2 __ovld __cnfn convert_half2_rte(double2); +half2 __ovld __cnfn convert_half2_rtp(double2); +half2 __ovld __cnfn convert_half2_rtn(double2); +half2 __ovld __cnfn convert_half2_rtz(double2); +half3 __ovld __cnfn convert_half3(double3); +half3 __ovld __cnfn convert_half3_rte(double3); +half3 __ovld __cnfn convert_half3_rtp(double3); +half3 __ovld __cnfn convert_half3_rtn(double3); +half3 __ovld __cnfn convert_half3_rtz(double3); +half4 __ovld __cnfn convert_half4(double4); +half4 __ovld __cnfn convert_half4_rte(double4); +half4 __ovld __cnfn convert_half4_rtp(double4); +half4 __ovld __cnfn convert_half4_rtn(double4); +half4 __ovld __cnfn convert_half4_rtz(double4); +half8 __ovld __cnfn convert_half8(double8); +half8 __ovld __cnfn convert_half8_rte(double8); +half8 __ovld __cnfn convert_half8_rtp(double8); +half8 __ovld __cnfn convert_half8_rtn(double8); +half8 __ovld __cnfn convert_half8_rtz(double8); +half16 __ovld __cnfn convert_half16(double16); +half16 __ovld __cnfn convert_half16_rte(double16); +half16 __ovld __cnfn convert_half16_rtp(double16); +half16 __ovld __cnfn convert_half16_rtn(double16); +half16 __ovld __cnfn convert_half16_rtz(double16); +#endif //cl_khr_fp64 + +#endif // cl_khr_fp16 + +/** + * OpenCL v1.1/1.2/2.0 s6.2.4.2 - as_type operators + * Reinterprets a data type as another data type of the same size + */ +#define as_char(x) __builtin_astype((x), char) +#define as_char2(x) __builtin_astype((x), char2) +#define as_char3(x) __builtin_astype((x), char3) +#define as_char4(x) __builtin_astype((x), char4) +#define as_char8(x) __builtin_astype((x), char8) +#define as_char16(x) __builtin_astype((x), char16) + +#define as_uchar(x) __builtin_astype((x), uchar) +#define as_uchar2(x) __builtin_astype((x), uchar2) +#define as_uchar3(x) __builtin_astype((x), uchar3) +#define as_uchar4(x) __builtin_astype((x), uchar4) +#define as_uchar8(x) __builtin_astype((x), uchar8) +#define as_uchar16(x) __builtin_astype((x), uchar16) + +#define as_short(x) __builtin_astype((x), short) +#define as_short2(x) __builtin_astype((x), short2) +#define as_short3(x) __builtin_astype((x), short3) +#define as_short4(x) __builtin_astype((x), short4) +#define as_short8(x) __builtin_astype((x), short8) +#define as_short16(x) __builtin_astype((x), short16) + +#define as_ushort(x) __builtin_astype((x), ushort) +#define as_ushort2(x) __builtin_astype((x), ushort2) +#define as_ushort3(x) __builtin_astype((x), ushort3) +#define as_ushort4(x) __builtin_astype((x), ushort4) +#define as_ushort8(x) __builtin_astype((x), ushort8) +#define as_ushort16(x) __builtin_astype((x), ushort16) + +#define as_int(x) __builtin_astype((x), int) +#define as_int2(x) __builtin_astype((x), int2) +#define as_int3(x) __builtin_astype((x), int3) +#define as_int4(x) __builtin_astype((x), int4) +#define as_int8(x) __builtin_astype((x), int8) +#define as_int16(x) __builtin_astype((x), int16) + +#define as_uint(x) __builtin_astype((x), uint) +#define as_uint2(x) __builtin_astype((x), uint2) +#define as_uint3(x) __builtin_astype((x), uint3) +#define as_uint4(x) __builtin_astype((x), uint4) +#define as_uint8(x) __builtin_astype((x), uint8) +#define as_uint16(x) __builtin_astype((x), uint16) + +#define as_long(x) __builtin_astype((x), long) +#define as_long2(x) __builtin_astype((x), long2) +#define as_long3(x) __builtin_astype((x), long3) +#define as_long4(x) __builtin_astype((x), long4) +#define as_long8(x) __builtin_astype((x), long8) +#define as_long16(x) __builtin_astype((x), long16) + +#define as_ulong(x) __builtin_astype((x), ulong) +#define as_ulong2(x) __builtin_astype((x), ulong2) +#define as_ulong3(x) __builtin_astype((x), ulong3) +#define as_ulong4(x) __builtin_astype((x), ulong4) +#define as_ulong8(x) __builtin_astype((x), ulong8) +#define as_ulong16(x) __builtin_astype((x), ulong16) + +#define as_float(x) __builtin_astype((x), float) +#define as_float2(x) __builtin_astype((x), float2) +#define as_float3(x) __builtin_astype((x), float3) +#define as_float4(x) __builtin_astype((x), float4) +#define as_float8(x) __builtin_astype((x), float8) +#define as_float16(x) __builtin_astype((x), float16) + +#ifdef cl_khr_fp64 +#define as_double(x) __builtin_astype((x), double) +#define as_double2(x) __builtin_astype((x), double2) +#define as_double3(x) __builtin_astype((x), double3) +#define as_double4(x) __builtin_astype((x), double4) +#define as_double8(x) __builtin_astype((x), double8) +#define as_double16(x) __builtin_astype((x), double16) +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +#define as_half(x) __builtin_astype((x), half) +#define as_half2(x) __builtin_astype((x), half2) +#define as_half3(x) __builtin_astype((x), half3) +#define as_half4(x) __builtin_astype((x), half4) +#define as_half8(x) __builtin_astype((x), half8) +#define as_half16(x) __builtin_astype((x), half16) +#endif //cl_khr_fp16 + +// OpenCL v1.1 s6.9, v1.2/2.0 s6.10 - Function qualifiers + +#define __kernel_exec(X, typen) __kernel \ + __attribute__((work_group_size_hint(X, 1, 1))) \ + __attribute__((vec_type_hint(typen))) + +#define kernel_exec(X, typen) __kernel \ + __attribute__((work_group_size_hint(X, 1, 1))) \ + __attribute__((vec_type_hint(typen))) + +// OpenCL v1.1 s6.11.1, v1.2 s6.12.1, v2.0 s6.13.1 - Work-item Functions + +/** + * Returns the number of dimensions in use. This is the + * value given to the work_dim argument specified in + * clEnqueueNDRangeKernel. + * For clEnqueueTask, this returns 1. + */ +uint __ovld __cnfn get_work_dim(void); + +/** + * Returns the number of global work-items specified for + * dimension identified by dimindx. This value is given by + * the global_work_size argument to + * clEnqueueNDRangeKernel. Valid values of dimindx + * are 0 to get_work_dim() - 1. For other values of + * dimindx, get_global_size() returns 1. + * For clEnqueueTask, this always returns 1. + */ +size_t __ovld __cnfn get_global_size(uint dimindx); + +/** + * Returns the unique global work-item ID value for + * dimension identified by dimindx. The global work-item + * ID specifies the work-item ID based on the number of + * global work-items specified to execute the kernel. Valid + * values of dimindx are 0 to get_work_dim() - 1. For + * other values of dimindx, get_global_id() returns 0. + * For clEnqueueTask, this returns 0. + */ +size_t __ovld __cnfn get_global_id(uint dimindx); + +/** + * Returns the number of local work-items specified in + * dimension identified by dimindx. This value is given by + * the local_work_size argument to + * clEnqueueNDRangeKernel if local_work_size is not + * NULL; otherwise the OpenCL implementation chooses + * an appropriate local_work_size value which is returned + * by this function. Valid values of dimindx are 0 to + * get_work_dim() - 1. For other values of dimindx, + * get_local_size() returns 1. + * For clEnqueueTask, this always returns 1. + */ +size_t __ovld __cnfn get_local_size(uint dimindx); + +/** + * Returns the unique local work-item ID i.e. a work-item + * within a specific work-group for dimension identified by + * dimindx. Valid values of dimindx are 0 to + * get_work_dim() - 1. For other values of dimindx, + * get_local_id() returns 0. + * For clEnqueueTask, this returns 0. + */ +size_t __ovld __cnfn get_local_id(uint dimindx); + +/** + * Returns the number of work-groups that will execute a + * kernel for dimension identified by dimindx. + * Valid values of dimindx are 0 to get_work_dim() - 1. + * For other values of dimindx, get_num_groups () returns + * 1. + * For clEnqueueTask, this always returns 1. + */ +size_t __ovld __cnfn get_num_groups(uint dimindx); + +/** + * get_group_id returns the work-group ID which is a + * number from 0 .. get_num_groups(dimindx) - 1. + * Valid values of dimindx are 0 to get_work_dim() - 1. + * For other values, get_group_id() returns 0. + * For clEnqueueTask, this returns 0. + */ +size_t __ovld __cnfn get_group_id(uint dimindx); + +/** + * get_global_offset returns the offset values specified in + * global_work_offset argument to + * clEnqueueNDRangeKernel. + * Valid values of dimindx are 0 to get_work_dim() - 1. + * For other values, get_global_offset() returns 0. + * For clEnqueueTask, this returns 0. + */ +size_t __ovld __cnfn get_global_offset(uint dimindx); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +size_t __ovld get_enqueued_local_size(uint dimindx); +size_t __ovld get_global_linear_id(void); +size_t __ovld get_local_linear_id(void); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v1.1 s6.11.2, v1.2 s6.12.2, v2.0 s6.13.2 - Math functions + +/** + * Arc cosine function. + */ +float __ovld __cnfn acos(float); +float2 __ovld __cnfn acos(float2); +float3 __ovld __cnfn acos(float3); +float4 __ovld __cnfn acos(float4); +float8 __ovld __cnfn acos(float8); +float16 __ovld __cnfn acos(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn acos(double); +double2 __ovld __cnfn acos(double2); +double3 __ovld __cnfn acos(double3); +double4 __ovld __cnfn acos(double4); +double8 __ovld __cnfn acos(double8); +double16 __ovld __cnfn acos(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn acos(half); +half2 __ovld __cnfn acos(half2); +half3 __ovld __cnfn acos(half3); +half4 __ovld __cnfn acos(half4); +half8 __ovld __cnfn acos(half8); +half16 __ovld __cnfn acos(half16); +#endif //cl_khr_fp16 + +/** + * Inverse hyperbolic cosine. + */ +float __ovld __cnfn acosh(float); +float2 __ovld __cnfn acosh(float2); +float3 __ovld __cnfn acosh(float3); +float4 __ovld __cnfn acosh(float4); +float8 __ovld __cnfn acosh(float8); +float16 __ovld __cnfn acosh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn acosh(double); +double2 __ovld __cnfn acosh(double2); +double3 __ovld __cnfn acosh(double3); +double4 __ovld __cnfn acosh(double4); +double8 __ovld __cnfn acosh(double8); +double16 __ovld __cnfn acosh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn acosh(half); +half2 __ovld __cnfn acosh(half2); +half3 __ovld __cnfn acosh(half3); +half4 __ovld __cnfn acosh(half4); +half8 __ovld __cnfn acosh(half8); +half16 __ovld __cnfn acosh(half16); +#endif //cl_khr_fp16 + +/** + * Compute acos (x) / PI. + */ +float __ovld __cnfn acospi(float x); +float2 __ovld __cnfn acospi(float2 x); +float3 __ovld __cnfn acospi(float3 x); +float4 __ovld __cnfn acospi(float4 x); +float8 __ovld __cnfn acospi(float8 x); +float16 __ovld __cnfn acospi(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn acospi(double x); +double2 __ovld __cnfn acospi(double2 x); +double3 __ovld __cnfn acospi(double3 x); +double4 __ovld __cnfn acospi(double4 x); +double8 __ovld __cnfn acospi(double8 x); +double16 __ovld __cnfn acospi(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn acospi(half x); +half2 __ovld __cnfn acospi(half2 x); +half3 __ovld __cnfn acospi(half3 x); +half4 __ovld __cnfn acospi(half4 x); +half8 __ovld __cnfn acospi(half8 x); +half16 __ovld __cnfn acospi(half16 x); +#endif //cl_khr_fp16 + +/** + * Arc sine function. + */ +float __ovld __cnfn asin(float); +float2 __ovld __cnfn asin(float2); +float3 __ovld __cnfn asin(float3); +float4 __ovld __cnfn asin(float4); +float8 __ovld __cnfn asin(float8); +float16 __ovld __cnfn asin(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn asin(double); +double2 __ovld __cnfn asin(double2); +double3 __ovld __cnfn asin(double3); +double4 __ovld __cnfn asin(double4); +double8 __ovld __cnfn asin(double8); +double16 __ovld __cnfn asin(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn asin(half); +half2 __ovld __cnfn asin(half2); +half3 __ovld __cnfn asin(half3); +half4 __ovld __cnfn asin(half4); +half8 __ovld __cnfn asin(half8); +half16 __ovld __cnfn asin(half16); +#endif //cl_khr_fp16 + +/** + * Inverse hyperbolic sine. + */ +float __ovld __cnfn asinh(float); +float2 __ovld __cnfn asinh(float2); +float3 __ovld __cnfn asinh(float3); +float4 __ovld __cnfn asinh(float4); +float8 __ovld __cnfn asinh(float8); +float16 __ovld __cnfn asinh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn asinh(double); +double2 __ovld __cnfn asinh(double2); +double3 __ovld __cnfn asinh(double3); +double4 __ovld __cnfn asinh(double4); +double8 __ovld __cnfn asinh(double8); +double16 __ovld __cnfn asinh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn asinh(half); +half2 __ovld __cnfn asinh(half2); +half3 __ovld __cnfn asinh(half3); +half4 __ovld __cnfn asinh(half4); +half8 __ovld __cnfn asinh(half8); +half16 __ovld __cnfn asinh(half16); +#endif //cl_khr_fp16 + +/** + * Compute asin (x) / PI. + */ +float __ovld __cnfn asinpi(float x); +float2 __ovld __cnfn asinpi(float2 x); +float3 __ovld __cnfn asinpi(float3 x); +float4 __ovld __cnfn asinpi(float4 x); +float8 __ovld __cnfn asinpi(float8 x); +float16 __ovld __cnfn asinpi(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn asinpi(double x); +double2 __ovld __cnfn asinpi(double2 x); +double3 __ovld __cnfn asinpi(double3 x); +double4 __ovld __cnfn asinpi(double4 x); +double8 __ovld __cnfn asinpi(double8 x); +double16 __ovld __cnfn asinpi(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn asinpi(half x); +half2 __ovld __cnfn asinpi(half2 x); +half3 __ovld __cnfn asinpi(half3 x); +half4 __ovld __cnfn asinpi(half4 x); +half8 __ovld __cnfn asinpi(half8 x); +half16 __ovld __cnfn asinpi(half16 x); +#endif //cl_khr_fp16 + +/** + * Arc tangent function. + */ +float __ovld __cnfn atan(float y_over_x); +float2 __ovld __cnfn atan(float2 y_over_x); +float3 __ovld __cnfn atan(float3 y_over_x); +float4 __ovld __cnfn atan(float4 y_over_x); +float8 __ovld __cnfn atan(float8 y_over_x); +float16 __ovld __cnfn atan(float16 y_over_x); +#ifdef cl_khr_fp64 +double __ovld __cnfn atan(double y_over_x); +double2 __ovld __cnfn atan(double2 y_over_x); +double3 __ovld __cnfn atan(double3 y_over_x); +double4 __ovld __cnfn atan(double4 y_over_x); +double8 __ovld __cnfn atan(double8 y_over_x); +double16 __ovld __cnfn atan(double16 y_over_x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn atan(half y_over_x); +half2 __ovld __cnfn atan(half2 y_over_x); +half3 __ovld __cnfn atan(half3 y_over_x); +half4 __ovld __cnfn atan(half4 y_over_x); +half8 __ovld __cnfn atan(half8 y_over_x); +half16 __ovld __cnfn atan(half16 y_over_x); +#endif //cl_khr_fp16 + +/** + * Arc tangent of y / x. + */ +float __ovld __cnfn atan2(float y, float x); +float2 __ovld __cnfn atan2(float2 y, float2 x); +float3 __ovld __cnfn atan2(float3 y, float3 x); +float4 __ovld __cnfn atan2(float4 y, float4 x); +float8 __ovld __cnfn atan2(float8 y, float8 x); +float16 __ovld __cnfn atan2(float16 y, float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn atan2(double y, double x); +double2 __ovld __cnfn atan2(double2 y, double2 x); +double3 __ovld __cnfn atan2(double3 y, double3 x); +double4 __ovld __cnfn atan2(double4 y, double4 x); +double8 __ovld __cnfn atan2(double8 y, double8 x); +double16 __ovld __cnfn atan2(double16 y, double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn atan2(half y, half x); +half2 __ovld __cnfn atan2(half2 y, half2 x); +half3 __ovld __cnfn atan2(half3 y, half3 x); +half4 __ovld __cnfn atan2(half4 y, half4 x); +half8 __ovld __cnfn atan2(half8 y, half8 x); +half16 __ovld __cnfn atan2(half16 y, half16 x); +#endif //cl_khr_fp16 + +/** + * Hyperbolic arc tangent. + */ +float __ovld __cnfn atanh(float); +float2 __ovld __cnfn atanh(float2); +float3 __ovld __cnfn atanh(float3); +float4 __ovld __cnfn atanh(float4); +float8 __ovld __cnfn atanh(float8); +float16 __ovld __cnfn atanh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn atanh(double); +double2 __ovld __cnfn atanh(double2); +double3 __ovld __cnfn atanh(double3); +double4 __ovld __cnfn atanh(double4); +double8 __ovld __cnfn atanh(double8); +double16 __ovld __cnfn atanh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn atanh(half); +half2 __ovld __cnfn atanh(half2); +half3 __ovld __cnfn atanh(half3); +half4 __ovld __cnfn atanh(half4); +half8 __ovld __cnfn atanh(half8); +half16 __ovld __cnfn atanh(half16); +#endif //cl_khr_fp16 + +/** + * Compute atan (x) / PI. + */ +float __ovld __cnfn atanpi(float x); +float2 __ovld __cnfn atanpi(float2 x); +float3 __ovld __cnfn atanpi(float3 x); +float4 __ovld __cnfn atanpi(float4 x); +float8 __ovld __cnfn atanpi(float8 x); +float16 __ovld __cnfn atanpi(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn atanpi(double x); +double2 __ovld __cnfn atanpi(double2 x); +double3 __ovld __cnfn atanpi(double3 x); +double4 __ovld __cnfn atanpi(double4 x); +double8 __ovld __cnfn atanpi(double8 x); +double16 __ovld __cnfn atanpi(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn atanpi(half x); +half2 __ovld __cnfn atanpi(half2 x); +half3 __ovld __cnfn atanpi(half3 x); +half4 __ovld __cnfn atanpi(half4 x); +half8 __ovld __cnfn atanpi(half8 x); +half16 __ovld __cnfn atanpi(half16 x); +#endif //cl_khr_fp16 + +/** + * Compute atan2 (y, x) / PI. + */ +float __ovld __cnfn atan2pi(float y, float x); +float2 __ovld __cnfn atan2pi(float2 y, float2 x); +float3 __ovld __cnfn atan2pi(float3 y, float3 x); +float4 __ovld __cnfn atan2pi(float4 y, float4 x); +float8 __ovld __cnfn atan2pi(float8 y, float8 x); +float16 __ovld __cnfn atan2pi(float16 y, float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn atan2pi(double y, double x); +double2 __ovld __cnfn atan2pi(double2 y, double2 x); +double3 __ovld __cnfn atan2pi(double3 y, double3 x); +double4 __ovld __cnfn atan2pi(double4 y, double4 x); +double8 __ovld __cnfn atan2pi(double8 y, double8 x); +double16 __ovld __cnfn atan2pi(double16 y, double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn atan2pi(half y, half x); +half2 __ovld __cnfn atan2pi(half2 y, half2 x); +half3 __ovld __cnfn atan2pi(half3 y, half3 x); +half4 __ovld __cnfn atan2pi(half4 y, half4 x); +half8 __ovld __cnfn atan2pi(half8 y, half8 x); +half16 __ovld __cnfn atan2pi(half16 y, half16 x); +#endif //cl_khr_fp16 + +/** + * Compute cube-root. + */ +float __ovld __cnfn cbrt(float); +float2 __ovld __cnfn cbrt(float2); +float3 __ovld __cnfn cbrt(float3); +float4 __ovld __cnfn cbrt(float4); +float8 __ovld __cnfn cbrt(float8); +float16 __ovld __cnfn cbrt(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn cbrt(double); +double2 __ovld __cnfn cbrt(double2); +double3 __ovld __cnfn cbrt(double3); +double4 __ovld __cnfn cbrt(double4); +double8 __ovld __cnfn cbrt(double8); +double16 __ovld __cnfn cbrt(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn cbrt(half); +half2 __ovld __cnfn cbrt(half2); +half3 __ovld __cnfn cbrt(half3); +half4 __ovld __cnfn cbrt(half4); +half8 __ovld __cnfn cbrt(half8); +half16 __ovld __cnfn cbrt(half16); +#endif //cl_khr_fp16 + +/** + * Round to integral value using the round to positive + * infinity rounding mode. + */ +float __ovld __cnfn ceil(float); +float2 __ovld __cnfn ceil(float2); +float3 __ovld __cnfn ceil(float3); +float4 __ovld __cnfn ceil(float4); +float8 __ovld __cnfn ceil(float8); +float16 __ovld __cnfn ceil(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn ceil(double); +double2 __ovld __cnfn ceil(double2); +double3 __ovld __cnfn ceil(double3); +double4 __ovld __cnfn ceil(double4); +double8 __ovld __cnfn ceil(double8); +double16 __ovld __cnfn ceil(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn ceil(half); +half2 __ovld __cnfn ceil(half2); +half3 __ovld __cnfn ceil(half3); +half4 __ovld __cnfn ceil(half4); +half8 __ovld __cnfn ceil(half8); +half16 __ovld __cnfn ceil(half16); +#endif //cl_khr_fp16 + +/** + * Returns x with its sign changed to match the sign of y. + */ +float __ovld __cnfn copysign(float x, float y); +float2 __ovld __cnfn copysign(float2 x, float2 y); +float3 __ovld __cnfn copysign(float3 x, float3 y); +float4 __ovld __cnfn copysign(float4 x, float4 y); +float8 __ovld __cnfn copysign(float8 x, float8 y); +float16 __ovld __cnfn copysign(float16 x, float16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn copysign(double x, double y); +double2 __ovld __cnfn copysign(double2 x, double2 y); +double3 __ovld __cnfn copysign(double3 x, double3 y); +double4 __ovld __cnfn copysign(double4 x, double4 y); +double8 __ovld __cnfn copysign(double8 x, double8 y); +double16 __ovld __cnfn copysign(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn copysign(half x, half y); +half2 __ovld __cnfn copysign(half2 x, half2 y); +half3 __ovld __cnfn copysign(half3 x, half3 y); +half4 __ovld __cnfn copysign(half4 x, half4 y); +half8 __ovld __cnfn copysign(half8 x, half8 y); +half16 __ovld __cnfn copysign(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Compute cosine. + */ +float __ovld __cnfn cos(float); +float2 __ovld __cnfn cos(float2); +float3 __ovld __cnfn cos(float3); +float4 __ovld __cnfn cos(float4); +float8 __ovld __cnfn cos(float8); +float16 __ovld __cnfn cos(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn cos(double); +double2 __ovld __cnfn cos(double2); +double3 __ovld __cnfn cos(double3); +double4 __ovld __cnfn cos(double4); +double8 __ovld __cnfn cos(double8); +double16 __ovld __cnfn cos(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn cos(half); +half2 __ovld __cnfn cos(half2); +half3 __ovld __cnfn cos(half3); +half4 __ovld __cnfn cos(half4); +half8 __ovld __cnfn cos(half8); +half16 __ovld __cnfn cos(half16); +#endif //cl_khr_fp16 + +/** + * Compute hyperbolic cosine. + */ +float __ovld __cnfn cosh(float); +float2 __ovld __cnfn cosh(float2); +float3 __ovld __cnfn cosh(float3); +float4 __ovld __cnfn cosh(float4); +float8 __ovld __cnfn cosh(float8); +float16 __ovld __cnfn cosh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn cosh(double); +double2 __ovld __cnfn cosh(double2); +double3 __ovld __cnfn cosh(double3); +double4 __ovld __cnfn cosh(double4); +double8 __ovld __cnfn cosh(double8); +double16 __ovld __cnfn cosh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn cosh(half); +half2 __ovld __cnfn cosh(half2); +half3 __ovld __cnfn cosh(half3); +half4 __ovld __cnfn cosh(half4); +half8 __ovld __cnfn cosh(half8); +half16 __ovld __cnfn cosh(half16); +#endif //cl_khr_fp16 + +/** + * Compute cos (PI * x). + */ +float __ovld __cnfn cospi(float x); +float2 __ovld __cnfn cospi(float2 x); +float3 __ovld __cnfn cospi(float3 x); +float4 __ovld __cnfn cospi(float4 x); +float8 __ovld __cnfn cospi(float8 x); +float16 __ovld __cnfn cospi(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn cospi(double x); +double2 __ovld __cnfn cospi(double2 x); +double3 __ovld __cnfn cospi(double3 x); +double4 __ovld __cnfn cospi(double4 x); +double8 __ovld __cnfn cospi(double8 x); +double16 __ovld __cnfn cospi(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn cospi(half x); +half2 __ovld __cnfn cospi(half2 x); +half3 __ovld __cnfn cospi(half3 x); +half4 __ovld __cnfn cospi(half4 x); +half8 __ovld __cnfn cospi(half8 x); +half16 __ovld __cnfn cospi(half16 x); +#endif //cl_khr_fp16 + +/** + * Complementary error function. + */ +float __ovld __cnfn erfc(float); +float2 __ovld __cnfn erfc(float2); +float3 __ovld __cnfn erfc(float3); +float4 __ovld __cnfn erfc(float4); +float8 __ovld __cnfn erfc(float8); +float16 __ovld __cnfn erfc(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn erfc(double); +double2 __ovld __cnfn erfc(double2); +double3 __ovld __cnfn erfc(double3); +double4 __ovld __cnfn erfc(double4); +double8 __ovld __cnfn erfc(double8); +double16 __ovld __cnfn erfc(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn erfc(half); +half2 __ovld __cnfn erfc(half2); +half3 __ovld __cnfn erfc(half3); +half4 __ovld __cnfn erfc(half4); +half8 __ovld __cnfn erfc(half8); +half16 __ovld __cnfn erfc(half16); +#endif //cl_khr_fp16 + +/** + * Error function encountered in integrating the + * normal distribution. + */ +float __ovld __cnfn erf(float); +float2 __ovld __cnfn erf(float2); +float3 __ovld __cnfn erf(float3); +float4 __ovld __cnfn erf(float4); +float8 __ovld __cnfn erf(float8); +float16 __ovld __cnfn erf(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn erf(double); +double2 __ovld __cnfn erf(double2); +double3 __ovld __cnfn erf(double3); +double4 __ovld __cnfn erf(double4); +double8 __ovld __cnfn erf(double8); +double16 __ovld __cnfn erf(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn erf(half); +half2 __ovld __cnfn erf(half2); +half3 __ovld __cnfn erf(half3); +half4 __ovld __cnfn erf(half4); +half8 __ovld __cnfn erf(half8); +half16 __ovld __cnfn erf(half16); +#endif //cl_khr_fp16 + +/** + * Compute the base e exponential function of x. + */ +float __ovld __cnfn exp(float x); +float2 __ovld __cnfn exp(float2 x); +float3 __ovld __cnfn exp(float3 x); +float4 __ovld __cnfn exp(float4 x); +float8 __ovld __cnfn exp(float8 x); +float16 __ovld __cnfn exp(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn exp(double x); +double2 __ovld __cnfn exp(double2 x); +double3 __ovld __cnfn exp(double3 x); +double4 __ovld __cnfn exp(double4 x); +double8 __ovld __cnfn exp(double8 x); +double16 __ovld __cnfn exp(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn exp(half x); +half2 __ovld __cnfn exp(half2 x); +half3 __ovld __cnfn exp(half3 x); +half4 __ovld __cnfn exp(half4 x); +half8 __ovld __cnfn exp(half8 x); +half16 __ovld __cnfn exp(half16 x); +#endif //cl_khr_fp16 + +/** + * Exponential base 2 function. + */ +float __ovld __cnfn exp2(float); +float2 __ovld __cnfn exp2(float2); +float3 __ovld __cnfn exp2(float3); +float4 __ovld __cnfn exp2(float4); +float8 __ovld __cnfn exp2(float8); +float16 __ovld __cnfn exp2(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn exp2(double); +double2 __ovld __cnfn exp2(double2); +double3 __ovld __cnfn exp2(double3); +double4 __ovld __cnfn exp2(double4); +double8 __ovld __cnfn exp2(double8); +double16 __ovld __cnfn exp2(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn exp2(half); +half2 __ovld __cnfn exp2(half2); +half3 __ovld __cnfn exp2(half3); +half4 __ovld __cnfn exp2(half4); +half8 __ovld __cnfn exp2(half8); +half16 __ovld __cnfn exp2(half16); +#endif //cl_khr_fp16 + +/** + * Exponential base 10 function. + */ +float __ovld __cnfn exp10(float); +float2 __ovld __cnfn exp10(float2); +float3 __ovld __cnfn exp10(float3); +float4 __ovld __cnfn exp10(float4); +float8 __ovld __cnfn exp10(float8); +float16 __ovld __cnfn exp10(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn exp10(double); +double2 __ovld __cnfn exp10(double2); +double3 __ovld __cnfn exp10(double3); +double4 __ovld __cnfn exp10(double4); +double8 __ovld __cnfn exp10(double8); +double16 __ovld __cnfn exp10(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn exp10(half); +half2 __ovld __cnfn exp10(half2); +half3 __ovld __cnfn exp10(half3); +half4 __ovld __cnfn exp10(half4); +half8 __ovld __cnfn exp10(half8); +half16 __ovld __cnfn exp10(half16); +#endif //cl_khr_fp16 + +/** + * Compute e^x- 1.0. + */ +float __ovld __cnfn expm1(float x); +float2 __ovld __cnfn expm1(float2 x); +float3 __ovld __cnfn expm1(float3 x); +float4 __ovld __cnfn expm1(float4 x); +float8 __ovld __cnfn expm1(float8 x); +float16 __ovld __cnfn expm1(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn expm1(double x); +double2 __ovld __cnfn expm1(double2 x); +double3 __ovld __cnfn expm1(double3 x); +double4 __ovld __cnfn expm1(double4 x); +double8 __ovld __cnfn expm1(double8 x); +double16 __ovld __cnfn expm1(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn expm1(half x); +half2 __ovld __cnfn expm1(half2 x); +half3 __ovld __cnfn expm1(half3 x); +half4 __ovld __cnfn expm1(half4 x); +half8 __ovld __cnfn expm1(half8 x); +half16 __ovld __cnfn expm1(half16 x); +#endif //cl_khr_fp16 + +/** + * Compute absolute value of a floating-point number. + */ +float __ovld __cnfn fabs(float); +float2 __ovld __cnfn fabs(float2); +float3 __ovld __cnfn fabs(float3); +float4 __ovld __cnfn fabs(float4); +float8 __ovld __cnfn fabs(float8); +float16 __ovld __cnfn fabs(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn fabs(double); +double2 __ovld __cnfn fabs(double2); +double3 __ovld __cnfn fabs(double3); +double4 __ovld __cnfn fabs(double4); +double8 __ovld __cnfn fabs(double8); +double16 __ovld __cnfn fabs(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fabs(half); +half2 __ovld __cnfn fabs(half2); +half3 __ovld __cnfn fabs(half3); +half4 __ovld __cnfn fabs(half4); +half8 __ovld __cnfn fabs(half8); +half16 __ovld __cnfn fabs(half16); +#endif //cl_khr_fp16 + +/** + * x - y if x > y, +0 if x is less than or equal to y. + */ +float __ovld __cnfn fdim(float x, float y); +float2 __ovld __cnfn fdim(float2 x, float2 y); +float3 __ovld __cnfn fdim(float3 x, float3 y); +float4 __ovld __cnfn fdim(float4 x, float4 y); +float8 __ovld __cnfn fdim(float8 x, float8 y); +float16 __ovld __cnfn fdim(float16 x, float16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn fdim(double x, double y); +double2 __ovld __cnfn fdim(double2 x, double2 y); +double3 __ovld __cnfn fdim(double3 x, double3 y); +double4 __ovld __cnfn fdim(double4 x, double4 y); +double8 __ovld __cnfn fdim(double8 x, double8 y); +double16 __ovld __cnfn fdim(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fdim(half x, half y); +half2 __ovld __cnfn fdim(half2 x, half2 y); +half3 __ovld __cnfn fdim(half3 x, half3 y); +half4 __ovld __cnfn fdim(half4 x, half4 y); +half8 __ovld __cnfn fdim(half8 x, half8 y); +half16 __ovld __cnfn fdim(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Round to integral value using the round to -ve + * infinity rounding mode. + */ +float __ovld __cnfn floor(float); +float2 __ovld __cnfn floor(float2); +float3 __ovld __cnfn floor(float3); +float4 __ovld __cnfn floor(float4); +float8 __ovld __cnfn floor(float8); +float16 __ovld __cnfn floor(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn floor(double); +double2 __ovld __cnfn floor(double2); +double3 __ovld __cnfn floor(double3); +double4 __ovld __cnfn floor(double4); +double8 __ovld __cnfn floor(double8); +double16 __ovld __cnfn floor(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn floor(half); +half2 __ovld __cnfn floor(half2); +half3 __ovld __cnfn floor(half3); +half4 __ovld __cnfn floor(half4); +half8 __ovld __cnfn floor(half8); +half16 __ovld __cnfn floor(half16); +#endif //cl_khr_fp16 + +/** + * Returns the correctly rounded floating-point + * representation of the sum of c with the infinitely + * precise product of a and b. Rounding of + * intermediate products shall not occur. Edge case + * behavior is per the IEEE 754-2008 standard. + */ +float __ovld __cnfn fma(float a, float b, float c); +float2 __ovld __cnfn fma(float2 a, float2 b, float2 c); +float3 __ovld __cnfn fma(float3 a, float3 b, float3 c); +float4 __ovld __cnfn fma(float4 a, float4 b, float4 c); +float8 __ovld __cnfn fma(float8 a, float8 b, float8 c); +float16 __ovld __cnfn fma(float16 a, float16 b, float16 c); +#ifdef cl_khr_fp64 +double __ovld __cnfn fma(double a, double b, double c); +double2 __ovld __cnfn fma(double2 a, double2 b, double2 c); +double3 __ovld __cnfn fma(double3 a, double3 b, double3 c); +double4 __ovld __cnfn fma(double4 a, double4 b, double4 c); +double8 __ovld __cnfn fma(double8 a, double8 b, double8 c); +double16 __ovld __cnfn fma(double16 a, double16 b, double16 c); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fma(half a, half b, half c); +half2 __ovld __cnfn fma(half2 a, half2 b, half2 c); +half3 __ovld __cnfn fma(half3 a, half3 b, half3 c); +half4 __ovld __cnfn fma(half4 a, half4 b, half4 c); +half8 __ovld __cnfn fma(half8 a, half8 b, half8 c); +half16 __ovld __cnfn fma(half16 a, half16 b, half16 c); +#endif //cl_khr_fp16 + +/** + * Returns y if x < y, otherwise it returns x. If one + * argument is a NaN, fmax() returns the other + * argument. If both arguments are NaNs, fmax() + * returns a NaN. + */ +float __ovld __cnfn fmax(float x, float y); +float2 __ovld __cnfn fmax(float2 x, float2 y); +float3 __ovld __cnfn fmax(float3 x, float3 y); +float4 __ovld __cnfn fmax(float4 x, float4 y); +float8 __ovld __cnfn fmax(float8 x, float8 y); +float16 __ovld __cnfn fmax(float16 x, float16 y); +float2 __ovld __cnfn fmax(float2 x, float y); +float3 __ovld __cnfn fmax(float3 x, float y); +float4 __ovld __cnfn fmax(float4 x, float y); +float8 __ovld __cnfn fmax(float8 x, float y); +float16 __ovld __cnfn fmax(float16 x, float y); +#ifdef cl_khr_fp64 +double __ovld __cnfn fmax(double x, double y); +double2 __ovld __cnfn fmax(double2 x, double2 y); +double3 __ovld __cnfn fmax(double3 x, double3 y); +double4 __ovld __cnfn fmax(double4 x, double4 y); +double8 __ovld __cnfn fmax(double8 x, double8 y); +double16 __ovld __cnfn fmax(double16 x, double16 y); +double2 __ovld __cnfn fmax(double2 x, double y); +double3 __ovld __cnfn fmax(double3 x, double y); +double4 __ovld __cnfn fmax(double4 x, double y); +double8 __ovld __cnfn fmax(double8 x, double y); +double16 __ovld __cnfn fmax(double16 x, double y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fmax(half x, half y); +half2 __ovld __cnfn fmax(half2 x, half2 y); +half3 __ovld __cnfn fmax(half3 x, half3 y); +half4 __ovld __cnfn fmax(half4 x, half4 y); +half8 __ovld __cnfn fmax(half8 x, half8 y); +half16 __ovld __cnfn fmax(half16 x, half16 y); +half2 __ovld __cnfn fmax(half2 x, half y); +half3 __ovld __cnfn fmax(half3 x, half y); +half4 __ovld __cnfn fmax(half4 x, half y); +half8 __ovld __cnfn fmax(half8 x, half y); +half16 __ovld __cnfn fmax(half16 x, half y); +#endif //cl_khr_fp16 + +/** + * Returns y if y < x, otherwise it returns x. If one + * argument is a NaN, fmin() returns the other + * argument. If both arguments are NaNs, fmin() + * returns a NaN. + */ +float __ovld __cnfn fmin(float x, float y); +float2 __ovld __cnfn fmin(float2 x, float2 y); +float3 __ovld __cnfn fmin(float3 x, float3 y); +float4 __ovld __cnfn fmin(float4 x, float4 y); +float8 __ovld __cnfn fmin(float8 x, float8 y); +float16 __ovld __cnfn fmin(float16 x, float16 y); +float2 __ovld __cnfn fmin(float2 x, float y); +float3 __ovld __cnfn fmin(float3 x, float y); +float4 __ovld __cnfn fmin(float4 x, float y); +float8 __ovld __cnfn fmin(float8 x, float y); +float16 __ovld __cnfn fmin(float16 x, float y); +#ifdef cl_khr_fp64 +double __ovld __cnfn fmin(double x, double y); +double2 __ovld __cnfn fmin(double2 x, double2 y); +double3 __ovld __cnfn fmin(double3 x, double3 y); +double4 __ovld __cnfn fmin(double4 x, double4 y); +double8 __ovld __cnfn fmin(double8 x, double8 y); +double16 __ovld __cnfn fmin(double16 x, double16 y); +double2 __ovld __cnfn fmin(double2 x, double y); +double3 __ovld __cnfn fmin(double3 x, double y); +double4 __ovld __cnfn fmin(double4 x, double y); +double8 __ovld __cnfn fmin(double8 x, double y); +double16 __ovld __cnfn fmin(double16 x, double y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fmin(half x, half y); +half2 __ovld __cnfn fmin(half2 x, half2 y); +half3 __ovld __cnfn fmin(half3 x, half3 y); +half4 __ovld __cnfn fmin(half4 x, half4 y); +half8 __ovld __cnfn fmin(half8 x, half8 y); +half16 __ovld __cnfn fmin(half16 x, half16 y); +half2 __ovld __cnfn fmin(half2 x, half y); +half3 __ovld __cnfn fmin(half3 x, half y); +half4 __ovld __cnfn fmin(half4 x, half y); +half8 __ovld __cnfn fmin(half8 x, half y); +half16 __ovld __cnfn fmin(half16 x, half y); +#endif //cl_khr_fp16 + +/** + * Modulus. Returns x - y * trunc (x/y). + */ +float __ovld __cnfn fmod(float x, float y); +float2 __ovld __cnfn fmod(float2 x, float2 y); +float3 __ovld __cnfn fmod(float3 x, float3 y); +float4 __ovld __cnfn fmod(float4 x, float4 y); +float8 __ovld __cnfn fmod(float8 x, float8 y); +float16 __ovld __cnfn fmod(float16 x, float16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn fmod(double x, double y); +double2 __ovld __cnfn fmod(double2 x, double2 y); +double3 __ovld __cnfn fmod(double3 x, double3 y); +double4 __ovld __cnfn fmod(double4 x, double4 y); +double8 __ovld __cnfn fmod(double8 x, double8 y); +double16 __ovld __cnfn fmod(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn fmod(half x, half y); +half2 __ovld __cnfn fmod(half2 x, half2 y); +half3 __ovld __cnfn fmod(half3 x, half3 y); +half4 __ovld __cnfn fmod(half4 x, half4 y); +half8 __ovld __cnfn fmod(half8 x, half8 y); +half16 __ovld __cnfn fmod(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Returns fmin(x - floor (x), 0x1.fffffep-1f ). + * floor(x) is returned in iptr. + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +float __ovld fract(float x, float *iptr); +float2 __ovld fract(float2 x, float2 *iptr); +float3 __ovld fract(float3 x, float3 *iptr); +float4 __ovld fract(float4 x, float4 *iptr); +float8 __ovld fract(float8 x, float8 *iptr); +float16 __ovld fract(float16 x, float16 *iptr); +#ifdef cl_khr_fp64 +double __ovld fract(double x, double *iptr); +double2 __ovld fract(double2 x, double2 *iptr); +double3 __ovld fract(double3 x, double3 *iptr); +double4 __ovld fract(double4 x, double4 *iptr); +double8 __ovld fract(double8 x, double8 *iptr); +double16 __ovld fract(double16 x, double16 *iptr); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld fract(half x, half *iptr); +half2 __ovld fract(half2 x, half2 *iptr); +half3 __ovld fract(half3 x, half3 *iptr); +half4 __ovld fract(half4 x, half4 *iptr); +half8 __ovld fract(half8 x, half8 *iptr); +half16 __ovld fract(half16 x, half16 *iptr); +#endif //cl_khr_fp16 +#else +float __ovld fract(float x, __global float *iptr); +float2 __ovld fract(float2 x, __global float2 *iptr); +float3 __ovld fract(float3 x, __global float3 *iptr); +float4 __ovld fract(float4 x, __global float4 *iptr); +float8 __ovld fract(float8 x, __global float8 *iptr); +float16 __ovld fract(float16 x, __global float16 *iptr); +float __ovld fract(float x, __local float *iptr); +float2 __ovld fract(float2 x, __local float2 *iptr); +float3 __ovld fract(float3 x, __local float3 *iptr); +float4 __ovld fract(float4 x, __local float4 *iptr); +float8 __ovld fract(float8 x, __local float8 *iptr); +float16 __ovld fract(float16 x, __local float16 *iptr); +float __ovld fract(float x, __private float *iptr); +float2 __ovld fract(float2 x, __private float2 *iptr); +float3 __ovld fract(float3 x, __private float3 *iptr); +float4 __ovld fract(float4 x, __private float4 *iptr); +float8 __ovld fract(float8 x, __private float8 *iptr); +float16 __ovld fract(float16 x, __private float16 *iptr); +#ifdef cl_khr_fp64 +double __ovld fract(double x, __global double *iptr); +double2 __ovld fract(double2 x, __global double2 *iptr); +double3 __ovld fract(double3 x, __global double3 *iptr); +double4 __ovld fract(double4 x, __global double4 *iptr); +double8 __ovld fract(double8 x, __global double8 *iptr); +double16 __ovld fract(double16 x, __global double16 *iptr); +double __ovld fract(double x, __local double *iptr); +double2 __ovld fract(double2 x, __local double2 *iptr); +double3 __ovld fract(double3 x, __local double3 *iptr); +double4 __ovld fract(double4 x, __local double4 *iptr); +double8 __ovld fract(double8 x, __local double8 *iptr); +double16 __ovld fract(double16 x, __local double16 *iptr); +double __ovld fract(double x, __private double *iptr); +double2 __ovld fract(double2 x, __private double2 *iptr); +double3 __ovld fract(double3 x, __private double3 *iptr); +double4 __ovld fract(double4 x, __private double4 *iptr); +double8 __ovld fract(double8 x, __private double8 *iptr); +double16 __ovld fract(double16 x, __private double16 *iptr); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld fract(half x, __global half *iptr); +half2 __ovld fract(half2 x, __global half2 *iptr); +half3 __ovld fract(half3 x, __global half3 *iptr); +half4 __ovld fract(half4 x, __global half4 *iptr); +half8 __ovld fract(half8 x, __global half8 *iptr); +half16 __ovld fract(half16 x, __global half16 *iptr); +half __ovld fract(half x, __local half *iptr); +half2 __ovld fract(half2 x, __local half2 *iptr); +half3 __ovld fract(half3 x, __local half3 *iptr); +half4 __ovld fract(half4 x, __local half4 *iptr); +half8 __ovld fract(half8 x, __local half8 *iptr); +half16 __ovld fract(half16 x, __local half16 *iptr); +half __ovld fract(half x, __private half *iptr); +half2 __ovld fract(half2 x, __private half2 *iptr); +half3 __ovld fract(half3 x, __private half3 *iptr); +half4 __ovld fract(half4 x, __private half4 *iptr); +half8 __ovld fract(half8 x, __private half8 *iptr); +half16 __ovld fract(half16 x, __private half16 *iptr); +#endif //cl_khr_fp16 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Extract mantissa and exponent from x. For each + * component the mantissa returned is a float with + * magnitude in the interval [1/2, 1) or 0. Each + * component of x equals mantissa returned * 2^exp. + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +float __ovld frexp(float x, int *exp); +float2 __ovld frexp(float2 x, int2 *exp); +float3 __ovld frexp(float3 x, int3 *exp); +float4 __ovld frexp(float4 x, int4 *exp); +float8 __ovld frexp(float8 x, int8 *exp); +float16 __ovld frexp(float16 x, int16 *exp); +#ifdef cl_khr_fp64 +double __ovld frexp(double x, int *exp); +double2 __ovld frexp(double2 x, int2 *exp); +double3 __ovld frexp(double3 x, int3 *exp); +double4 __ovld frexp(double4 x, int4 *exp); +double8 __ovld frexp(double8 x, int8 *exp); +double16 __ovld frexp(double16 x, int16 *exp); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld frexp(half x, int *exp); +half2 __ovld frexp(half2 x, int2 *exp); +half3 __ovld frexp(half3 x, int3 *exp); +half4 __ovld frexp(half4 x, int4 *exp); +half8 __ovld frexp(half8 x, int8 *exp); +half16 __ovld frexp(half16 x, int16 *exp); +#endif //cl_khr_fp16 +#else +float __ovld frexp(float x, __global int *exp); +float2 __ovld frexp(float2 x, __global int2 *exp); +float3 __ovld frexp(float3 x, __global int3 *exp); +float4 __ovld frexp(float4 x, __global int4 *exp); +float8 __ovld frexp(float8 x, __global int8 *exp); +float16 __ovld frexp(float16 x, __global int16 *exp); +float __ovld frexp(float x, __local int *exp); +float2 __ovld frexp(float2 x, __local int2 *exp); +float3 __ovld frexp(float3 x, __local int3 *exp); +float4 __ovld frexp(float4 x, __local int4 *exp); +float8 __ovld frexp(float8 x, __local int8 *exp); +float16 __ovld frexp(float16 x, __local int16 *exp); +float __ovld frexp(float x, __private int *exp); +float2 __ovld frexp(float2 x, __private int2 *exp); +float3 __ovld frexp(float3 x, __private int3 *exp); +float4 __ovld frexp(float4 x, __private int4 *exp); +float8 __ovld frexp(float8 x, __private int8 *exp); +float16 __ovld frexp(float16 x, __private int16 *exp); +#ifdef cl_khr_fp64 +double __ovld frexp(double x, __global int *exp); +double2 __ovld frexp(double2 x, __global int2 *exp); +double3 __ovld frexp(double3 x, __global int3 *exp); +double4 __ovld frexp(double4 x, __global int4 *exp); +double8 __ovld frexp(double8 x, __global int8 *exp); +double16 __ovld frexp(double16 x, __global int16 *exp); +double __ovld frexp(double x, __local int *exp); +double2 __ovld frexp(double2 x, __local int2 *exp); +double3 __ovld frexp(double3 x, __local int3 *exp); +double4 __ovld frexp(double4 x, __local int4 *exp); +double8 __ovld frexp(double8 x, __local int8 *exp); +double16 __ovld frexp(double16 x, __local int16 *exp); +double __ovld frexp(double x, __private int *exp); +double2 __ovld frexp(double2 x, __private int2 *exp); +double3 __ovld frexp(double3 x, __private int3 *exp); +double4 __ovld frexp(double4 x, __private int4 *exp); +double8 __ovld frexp(double8 x, __private int8 *exp); +double16 __ovld frexp(double16 x, __private int16 *exp); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld frexp(half x, __global int *exp); +half2 __ovld frexp(half2 x, __global int2 *exp); +half3 __ovld frexp(half3 x, __global int3 *exp); +half4 __ovld frexp(half4 x, __global int4 *exp); +half8 __ovld frexp(half8 x, __global int8 *exp); +half16 __ovld frexp(half16 x, __global int16 *exp); +half __ovld frexp(half x, __local int *exp); +half2 __ovld frexp(half2 x, __local int2 *exp); +half3 __ovld frexp(half3 x, __local int3 *exp); +half4 __ovld frexp(half4 x, __local int4 *exp); +half8 __ovld frexp(half8 x, __local int8 *exp); +half16 __ovld frexp(half16 x, __local int16 *exp); +half __ovld frexp(half x, __private int *exp); +half2 __ovld frexp(half2 x, __private int2 *exp); +half3 __ovld frexp(half3 x, __private int3 *exp); +half4 __ovld frexp(half4 x, __private int4 *exp); +half8 __ovld frexp(half8 x, __private int8 *exp); +half16 __ovld frexp(half16 x, __private int16 *exp); +#endif //cl_khr_fp16 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Compute the value of the square root of x^2 + y^2 + * without undue overflow or underflow. + */ +float __ovld __cnfn hypot(float x, float y); +float2 __ovld __cnfn hypot(float2 x, float2 y); +float3 __ovld __cnfn hypot(float3 x, float3 y); +float4 __ovld __cnfn hypot(float4 x, float4 y); +float8 __ovld __cnfn hypot(float8 x, float8 y); +float16 __ovld __cnfn hypot(float16 x, float16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn hypot(double x, double y); +double2 __ovld __cnfn hypot(double2 x, double2 y); +double3 __ovld __cnfn hypot(double3 x, double3 y); +double4 __ovld __cnfn hypot(double4 x, double4 y); +double8 __ovld __cnfn hypot(double8 x, double8 y); +double16 __ovld __cnfn hypot(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn hypot(half x, half y); +half2 __ovld __cnfn hypot(half2 x, half2 y); +half3 __ovld __cnfn hypot(half3 x, half3 y); +half4 __ovld __cnfn hypot(half4 x, half4 y); +half8 __ovld __cnfn hypot(half8 x, half8 y); +half16 __ovld __cnfn hypot(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Return the exponent as an integer value. + */ +int __ovld __cnfn ilogb(float x); +int2 __ovld __cnfn ilogb(float2 x); +int3 __ovld __cnfn ilogb(float3 x); +int4 __ovld __cnfn ilogb(float4 x); +int8 __ovld __cnfn ilogb(float8 x); +int16 __ovld __cnfn ilogb(float16 x); +#ifdef cl_khr_fp64 +int __ovld __cnfn ilogb(double x); +int2 __ovld __cnfn ilogb(double2 x); +int3 __ovld __cnfn ilogb(double3 x); +int4 __ovld __cnfn ilogb(double4 x); +int8 __ovld __cnfn ilogb(double8 x); +int16 __ovld __cnfn ilogb(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn ilogb(half x); +int2 __ovld __cnfn ilogb(half2 x); +int3 __ovld __cnfn ilogb(half3 x); +int4 __ovld __cnfn ilogb(half4 x); +int8 __ovld __cnfn ilogb(half8 x); +int16 __ovld __cnfn ilogb(half16 x); +#endif //cl_khr_fp16 + +/** + * Multiply x by 2 to the power n. + */ +float __ovld __cnfn ldexp(float x, int n); +float2 __ovld __cnfn ldexp(float2 x, int2 n); +float3 __ovld __cnfn ldexp(float3 x, int3 n); +float4 __ovld __cnfn ldexp(float4 x, int4 n); +float8 __ovld __cnfn ldexp(float8 x, int8 n); +float16 __ovld __cnfn ldexp(float16 x, int16 n); +float2 __ovld __cnfn ldexp(float2 x, int n); +float3 __ovld __cnfn ldexp(float3 x, int n); +float4 __ovld __cnfn ldexp(float4 x, int n); +float8 __ovld __cnfn ldexp(float8 x, int n); +float16 __ovld __cnfn ldexp(float16 x, int n); +#ifdef cl_khr_fp64 +double __ovld __cnfn ldexp(double x, int n); +double2 __ovld __cnfn ldexp(double2 x, int2 n); +double3 __ovld __cnfn ldexp(double3 x, int3 n); +double4 __ovld __cnfn ldexp(double4 x, int4 n); +double8 __ovld __cnfn ldexp(double8 x, int8 n); +double16 __ovld __cnfn ldexp(double16 x, int16 n); +double2 __ovld __cnfn ldexp(double2 x, int n); +double3 __ovld __cnfn ldexp(double3 x, int n); +double4 __ovld __cnfn ldexp(double4 x, int n); +double8 __ovld __cnfn ldexp(double8 x, int n); +double16 __ovld __cnfn ldexp(double16 x, int n); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn ldexp(half x, int n); +half2 __ovld __cnfn ldexp(half2 x, int2 n); +half3 __ovld __cnfn ldexp(half3 x, int3 n); +half4 __ovld __cnfn ldexp(half4 x, int4 n); +half8 __ovld __cnfn ldexp(half8 x, int8 n); +half16 __ovld __cnfn ldexp(half16 x, int16 n); +half2 __ovld __cnfn ldexp(half2 x, int n); +half3 __ovld __cnfn ldexp(half3 x, int n); +half4 __ovld __cnfn ldexp(half4 x, int n); +half8 __ovld __cnfn ldexp(half8 x, int n); +half16 __ovld __cnfn ldexp(half16 x, int n); +#endif //cl_khr_fp16 + +/** + * Log gamma function. Returns the natural + * logarithm of the absolute value of the gamma + * function. The sign of the gamma function is + * returned in the signp argument of lgamma_r. + */ +float __ovld __cnfn lgamma(float x); +float2 __ovld __cnfn lgamma(float2 x); +float3 __ovld __cnfn lgamma(float3 x); +float4 __ovld __cnfn lgamma(float4 x); +float8 __ovld __cnfn lgamma(float8 x); +float16 __ovld __cnfn lgamma(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn lgamma(double x); +double2 __ovld __cnfn lgamma(double2 x); +double3 __ovld __cnfn lgamma(double3 x); +double4 __ovld __cnfn lgamma(double4 x); +double8 __ovld __cnfn lgamma(double8 x); +double16 __ovld __cnfn lgamma(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn lgamma(half x); +half2 __ovld __cnfn lgamma(half2 x); +half3 __ovld __cnfn lgamma(half3 x); +half4 __ovld __cnfn lgamma(half4 x); +half8 __ovld __cnfn lgamma(half8 x); +half16 __ovld __cnfn lgamma(half16 x); +#endif //cl_khr_fp16 + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +float __ovld lgamma_r(float x, int *signp); +float2 __ovld lgamma_r(float2 x, int2 *signp); +float3 __ovld lgamma_r(float3 x, int3 *signp); +float4 __ovld lgamma_r(float4 x, int4 *signp); +float8 __ovld lgamma_r(float8 x, int8 *signp); +float16 __ovld lgamma_r(float16 x, int16 *signp); +#ifdef cl_khr_fp64 +double __ovld lgamma_r(double x, int *signp); +double2 __ovld lgamma_r(double2 x, int2 *signp); +double3 __ovld lgamma_r(double3 x, int3 *signp); +double4 __ovld lgamma_r(double4 x, int4 *signp); +double8 __ovld lgamma_r(double8 x, int8 *signp); +double16 __ovld lgamma_r(double16 x, int16 *signp); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld lgamma_r(half x, int *signp); +half2 __ovld lgamma_r(half2 x, int2 *signp); +half3 __ovld lgamma_r(half3 x, int3 *signp); +half4 __ovld lgamma_r(half4 x, int4 *signp); +half8 __ovld lgamma_r(half8 x, int8 *signp); +half16 __ovld lgamma_r(half16 x, int16 *signp); +#endif //cl_khr_fp16 +#else +float __ovld lgamma_r(float x, __global int *signp); +float2 __ovld lgamma_r(float2 x, __global int2 *signp); +float3 __ovld lgamma_r(float3 x, __global int3 *signp); +float4 __ovld lgamma_r(float4 x, __global int4 *signp); +float8 __ovld lgamma_r(float8 x, __global int8 *signp); +float16 __ovld lgamma_r(float16 x, __global int16 *signp); +float __ovld lgamma_r(float x, __local int *signp); +float2 __ovld lgamma_r(float2 x, __local int2 *signp); +float3 __ovld lgamma_r(float3 x, __local int3 *signp); +float4 __ovld lgamma_r(float4 x, __local int4 *signp); +float8 __ovld lgamma_r(float8 x, __local int8 *signp); +float16 __ovld lgamma_r(float16 x, __local int16 *signp); +float __ovld lgamma_r(float x, __private int *signp); +float2 __ovld lgamma_r(float2 x, __private int2 *signp); +float3 __ovld lgamma_r(float3 x, __private int3 *signp); +float4 __ovld lgamma_r(float4 x, __private int4 *signp); +float8 __ovld lgamma_r(float8 x, __private int8 *signp); +float16 __ovld lgamma_r(float16 x, __private int16 *signp); +#ifdef cl_khr_fp64 +double __ovld lgamma_r(double x, __global int *signp); +double2 __ovld lgamma_r(double2 x, __global int2 *signp); +double3 __ovld lgamma_r(double3 x, __global int3 *signp); +double4 __ovld lgamma_r(double4 x, __global int4 *signp); +double8 __ovld lgamma_r(double8 x, __global int8 *signp); +double16 __ovld lgamma_r(double16 x, __global int16 *signp); +double __ovld lgamma_r(double x, __local int *signp); +double2 __ovld lgamma_r(double2 x, __local int2 *signp); +double3 __ovld lgamma_r(double3 x, __local int3 *signp); +double4 __ovld lgamma_r(double4 x, __local int4 *signp); +double8 __ovld lgamma_r(double8 x, __local int8 *signp); +double16 __ovld lgamma_r(double16 x, __local int16 *signp); +double __ovld lgamma_r(double x, __private int *signp); +double2 __ovld lgamma_r(double2 x, __private int2 *signp); +double3 __ovld lgamma_r(double3 x, __private int3 *signp); +double4 __ovld lgamma_r(double4 x, __private int4 *signp); +double8 __ovld lgamma_r(double8 x, __private int8 *signp); +double16 __ovld lgamma_r(double16 x, __private int16 *signp); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld lgamma_r(half x, __global int *signp); +half2 __ovld lgamma_r(half2 x, __global int2 *signp); +half3 __ovld lgamma_r(half3 x, __global int3 *signp); +half4 __ovld lgamma_r(half4 x, __global int4 *signp); +half8 __ovld lgamma_r(half8 x, __global int8 *signp); +half16 __ovld lgamma_r(half16 x, __global int16 *signp); +half __ovld lgamma_r(half x, __local int *signp); +half2 __ovld lgamma_r(half2 x, __local int2 *signp); +half3 __ovld lgamma_r(half3 x, __local int3 *signp); +half4 __ovld lgamma_r(half4 x, __local int4 *signp); +half8 __ovld lgamma_r(half8 x, __local int8 *signp); +half16 __ovld lgamma_r(half16 x, __local int16 *signp); +half __ovld lgamma_r(half x, __private int *signp); +half2 __ovld lgamma_r(half2 x, __private int2 *signp); +half3 __ovld lgamma_r(half3 x, __private int3 *signp); +half4 __ovld lgamma_r(half4 x, __private int4 *signp); +half8 __ovld lgamma_r(half8 x, __private int8 *signp); +half16 __ovld lgamma_r(half16 x, __private int16 *signp); +#endif //cl_khr_fp16 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Compute natural logarithm. + */ +float __ovld __cnfn log(float); +float2 __ovld __cnfn log(float2); +float3 __ovld __cnfn log(float3); +float4 __ovld __cnfn log(float4); +float8 __ovld __cnfn log(float8); +float16 __ovld __cnfn log(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn log(double); +double2 __ovld __cnfn log(double2); +double3 __ovld __cnfn log(double3); +double4 __ovld __cnfn log(double4); +double8 __ovld __cnfn log(double8); +double16 __ovld __cnfn log(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn log(half); +half2 __ovld __cnfn log(half2); +half3 __ovld __cnfn log(half3); +half4 __ovld __cnfn log(half4); +half8 __ovld __cnfn log(half8); +half16 __ovld __cnfn log(half16); +#endif //cl_khr_fp16 + +/** + * Compute a base 2 logarithm. + */ +float __ovld __cnfn log2(float); +float2 __ovld __cnfn log2(float2); +float3 __ovld __cnfn log2(float3); +float4 __ovld __cnfn log2(float4); +float8 __ovld __cnfn log2(float8); +float16 __ovld __cnfn log2(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn log2(double); +double2 __ovld __cnfn log2(double2); +double3 __ovld __cnfn log2(double3); +double4 __ovld __cnfn log2(double4); +double8 __ovld __cnfn log2(double8); +double16 __ovld __cnfn log2(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn log2(half); +half2 __ovld __cnfn log2(half2); +half3 __ovld __cnfn log2(half3); +half4 __ovld __cnfn log2(half4); +half8 __ovld __cnfn log2(half8); +half16 __ovld __cnfn log2(half16); +#endif //cl_khr_fp16 + +/** + * Compute a base 10 logarithm. + */ +float __ovld __cnfn log10(float); +float2 __ovld __cnfn log10(float2); +float3 __ovld __cnfn log10(float3); +float4 __ovld __cnfn log10(float4); +float8 __ovld __cnfn log10(float8); +float16 __ovld __cnfn log10(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn log10(double); +double2 __ovld __cnfn log10(double2); +double3 __ovld __cnfn log10(double3); +double4 __ovld __cnfn log10(double4); +double8 __ovld __cnfn log10(double8); +double16 __ovld __cnfn log10(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn log10(half); +half2 __ovld __cnfn log10(half2); +half3 __ovld __cnfn log10(half3); +half4 __ovld __cnfn log10(half4); +half8 __ovld __cnfn log10(half8); +half16 __ovld __cnfn log10(half16); +#endif //cl_khr_fp16 + +/** + * Compute a base e logarithm of (1.0 + x). + */ +float __ovld __cnfn log1p(float x); +float2 __ovld __cnfn log1p(float2 x); +float3 __ovld __cnfn log1p(float3 x); +float4 __ovld __cnfn log1p(float4 x); +float8 __ovld __cnfn log1p(float8 x); +float16 __ovld __cnfn log1p(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn log1p(double x); +double2 __ovld __cnfn log1p(double2 x); +double3 __ovld __cnfn log1p(double3 x); +double4 __ovld __cnfn log1p(double4 x); +double8 __ovld __cnfn log1p(double8 x); +double16 __ovld __cnfn log1p(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn log1p(half x); +half2 __ovld __cnfn log1p(half2 x); +half3 __ovld __cnfn log1p(half3 x); +half4 __ovld __cnfn log1p(half4 x); +half8 __ovld __cnfn log1p(half8 x); +half16 __ovld __cnfn log1p(half16 x); +#endif //cl_khr_fp16 + +/** + * Compute the exponent of x, which is the integral + * part of logr | x |. + */ +float __ovld __cnfn logb(float x); +float2 __ovld __cnfn logb(float2 x); +float3 __ovld __cnfn logb(float3 x); +float4 __ovld __cnfn logb(float4 x); +float8 __ovld __cnfn logb(float8 x); +float16 __ovld __cnfn logb(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn logb(double x); +double2 __ovld __cnfn logb(double2 x); +double3 __ovld __cnfn logb(double3 x); +double4 __ovld __cnfn logb(double4 x); +double8 __ovld __cnfn logb(double8 x); +double16 __ovld __cnfn logb(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn logb(half x); +half2 __ovld __cnfn logb(half2 x); +half3 __ovld __cnfn logb(half3 x); +half4 __ovld __cnfn logb(half4 x); +half8 __ovld __cnfn logb(half8 x); +half16 __ovld __cnfn logb(half16 x); +#endif //cl_khr_fp16 + +/** + * mad approximates a * b + c. Whether or how the + * product of a * b is rounded and how supernormal or + * subnormal intermediate products are handled is not + * defined. mad is intended to be used where speed is + * preferred over accuracy. + */ +float __ovld __cnfn mad(float a, float b, float c); +float2 __ovld __cnfn mad(float2 a, float2 b, float2 c); +float3 __ovld __cnfn mad(float3 a, float3 b, float3 c); +float4 __ovld __cnfn mad(float4 a, float4 b, float4 c); +float8 __ovld __cnfn mad(float8 a, float8 b, float8 c); +float16 __ovld __cnfn mad(float16 a, float16 b, float16 c); +#ifdef cl_khr_fp64 +double __ovld __cnfn mad(double a, double b, double c); +double2 __ovld __cnfn mad(double2 a, double2 b, double2 c); +double3 __ovld __cnfn mad(double3 a, double3 b, double3 c); +double4 __ovld __cnfn mad(double4 a, double4 b, double4 c); +double8 __ovld __cnfn mad(double8 a, double8 b, double8 c); +double16 __ovld __cnfn mad(double16 a, double16 b, double16 c); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn mad(half a, half b, half c); +half2 __ovld __cnfn mad(half2 a, half2 b, half2 c); +half3 __ovld __cnfn mad(half3 a, half3 b, half3 c); +half4 __ovld __cnfn mad(half4 a, half4 b, half4 c); +half8 __ovld __cnfn mad(half8 a, half8 b, half8 c); +half16 __ovld __cnfn mad(half16 a, half16 b, half16 c); +#endif //cl_khr_fp16 + +/** + * Returns x if | x | > | y |, y if | y | > | x |, otherwise + * fmax(x, y). + */ +float __ovld __cnfn maxmag(float x, float y); +float2 __ovld __cnfn maxmag(float2 x, float2 y); +float3 __ovld __cnfn maxmag(float3 x, float3 y); +float4 __ovld __cnfn maxmag(float4 x, float4 y); +float8 __ovld __cnfn maxmag(float8 x, float8 y); +float16 __ovld __cnfn maxmag(float16 x, float16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn maxmag(double x, double y); +double2 __ovld __cnfn maxmag(double2 x, double2 y); +double3 __ovld __cnfn maxmag(double3 x, double3 y); +double4 __ovld __cnfn maxmag(double4 x, double4 y); +double8 __ovld __cnfn maxmag(double8 x, double8 y); +double16 __ovld __cnfn maxmag(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn maxmag(half x, half y); +half2 __ovld __cnfn maxmag(half2 x, half2 y); +half3 __ovld __cnfn maxmag(half3 x, half3 y); +half4 __ovld __cnfn maxmag(half4 x, half4 y); +half8 __ovld __cnfn maxmag(half8 x, half8 y); +half16 __ovld __cnfn maxmag(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Returns x if | x | < | y |, y if | y | < | x |, otherwise + * fmin(x, y). + */ +float __ovld __cnfn minmag(float x, float y); +float2 __ovld __cnfn minmag(float2 x, float2 y); +float3 __ovld __cnfn minmag(float3 x, float3 y); +float4 __ovld __cnfn minmag(float4 x, float4 y); +float8 __ovld __cnfn minmag(float8 x, float8 y); +float16 __ovld __cnfn minmag(float16 x, float16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn minmag(double x, double y); +double2 __ovld __cnfn minmag(double2 x, double2 y); +double3 __ovld __cnfn minmag(double3 x, double3 y); +double4 __ovld __cnfn minmag(double4 x, double4 y); +double8 __ovld __cnfn minmag(double8 x, double8 y); +double16 __ovld __cnfn minmag(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn minmag(half x, half y); +half2 __ovld __cnfn minmag(half2 x, half2 y); +half3 __ovld __cnfn minmag(half3 x, half3 y); +half4 __ovld __cnfn minmag(half4 x, half4 y); +half8 __ovld __cnfn minmag(half8 x, half8 y); +half16 __ovld __cnfn minmag(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Decompose a floating-point number. The modf + * function breaks the argument x into integral and + * fractional parts, each of which has the same sign as + * the argument. It stores the integral part in the object + * pointed to by iptr. + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +float __ovld modf(float x, float *iptr); +float2 __ovld modf(float2 x, float2 *iptr); +float3 __ovld modf(float3 x, float3 *iptr); +float4 __ovld modf(float4 x, float4 *iptr); +float8 __ovld modf(float8 x, float8 *iptr); +float16 __ovld modf(float16 x, float16 *iptr); +#ifdef cl_khr_fp64 +double __ovld modf(double x, double *iptr); +double2 __ovld modf(double2 x, double2 *iptr); +double3 __ovld modf(double3 x, double3 *iptr); +double4 __ovld modf(double4 x, double4 *iptr); +double8 __ovld modf(double8 x, double8 *iptr); +double16 __ovld modf(double16 x, double16 *iptr); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld modf(half x, half *iptr); +half2 __ovld modf(half2 x, half2 *iptr); +half3 __ovld modf(half3 x, half3 *iptr); +half4 __ovld modf(half4 x, half4 *iptr); +half8 __ovld modf(half8 x, half8 *iptr); +half16 __ovld modf(half16 x, half16 *iptr); +#endif //cl_khr_fp16 +#else +float __ovld modf(float x, __global float *iptr); +float2 __ovld modf(float2 x, __global float2 *iptr); +float3 __ovld modf(float3 x, __global float3 *iptr); +float4 __ovld modf(float4 x, __global float4 *iptr); +float8 __ovld modf(float8 x, __global float8 *iptr); +float16 __ovld modf(float16 x, __global float16 *iptr); +float __ovld modf(float x, __local float *iptr); +float2 __ovld modf(float2 x, __local float2 *iptr); +float3 __ovld modf(float3 x, __local float3 *iptr); +float4 __ovld modf(float4 x, __local float4 *iptr); +float8 __ovld modf(float8 x, __local float8 *iptr); +float16 __ovld modf(float16 x, __local float16 *iptr); +float __ovld modf(float x, __private float *iptr); +float2 __ovld modf(float2 x, __private float2 *iptr); +float3 __ovld modf(float3 x, __private float3 *iptr); +float4 __ovld modf(float4 x, __private float4 *iptr); +float8 __ovld modf(float8 x, __private float8 *iptr); +float16 __ovld modf(float16 x, __private float16 *iptr); +#ifdef cl_khr_fp64 +double __ovld modf(double x, __global double *iptr); +double2 __ovld modf(double2 x, __global double2 *iptr); +double3 __ovld modf(double3 x, __global double3 *iptr); +double4 __ovld modf(double4 x, __global double4 *iptr); +double8 __ovld modf(double8 x, __global double8 *iptr); +double16 __ovld modf(double16 x, __global double16 *iptr); +double __ovld modf(double x, __local double *iptr); +double2 __ovld modf(double2 x, __local double2 *iptr); +double3 __ovld modf(double3 x, __local double3 *iptr); +double4 __ovld modf(double4 x, __local double4 *iptr); +double8 __ovld modf(double8 x, __local double8 *iptr); +double16 __ovld modf(double16 x, __local double16 *iptr); +double __ovld modf(double x, __private double *iptr); +double2 __ovld modf(double2 x, __private double2 *iptr); +double3 __ovld modf(double3 x, __private double3 *iptr); +double4 __ovld modf(double4 x, __private double4 *iptr); +double8 __ovld modf(double8 x, __private double8 *iptr); +double16 __ovld modf(double16 x, __private double16 *iptr); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld modf(half x, __global half *iptr); +half2 __ovld modf(half2 x, __global half2 *iptr); +half3 __ovld modf(half3 x, __global half3 *iptr); +half4 __ovld modf(half4 x, __global half4 *iptr); +half8 __ovld modf(half8 x, __global half8 *iptr); +half16 __ovld modf(half16 x, __global half16 *iptr); +half __ovld modf(half x, __local half *iptr); +half2 __ovld modf(half2 x, __local half2 *iptr); +half3 __ovld modf(half3 x, __local half3 *iptr); +half4 __ovld modf(half4 x, __local half4 *iptr); +half8 __ovld modf(half8 x, __local half8 *iptr); +half16 __ovld modf(half16 x, __local half16 *iptr); +half __ovld modf(half x, __private half *iptr); +half2 __ovld modf(half2 x, __private half2 *iptr); +half3 __ovld modf(half3 x, __private half3 *iptr); +half4 __ovld modf(half4 x, __private half4 *iptr); +half8 __ovld modf(half8 x, __private half8 *iptr); +half16 __ovld modf(half16 x, __private half16 *iptr); +#endif //cl_khr_fp16 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Returns a quiet NaN. The nancode may be placed + * in the significand of the resulting NaN. + */ +float __ovld __cnfn nan(uint nancode); +float2 __ovld __cnfn nan(uint2 nancode); +float3 __ovld __cnfn nan(uint3 nancode); +float4 __ovld __cnfn nan(uint4 nancode); +float8 __ovld __cnfn nan(uint8 nancode); +float16 __ovld __cnfn nan(uint16 nancode); +#ifdef cl_khr_fp64 +double __ovld __cnfn nan(ulong nancode); +double2 __ovld __cnfn nan(ulong2 nancode); +double3 __ovld __cnfn nan(ulong3 nancode); +double4 __ovld __cnfn nan(ulong4 nancode); +double8 __ovld __cnfn nan(ulong8 nancode); +double16 __ovld __cnfn nan(ulong16 nancode); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn nan(ushort nancode); +half2 __ovld __cnfn nan(ushort2 nancode); +half3 __ovld __cnfn nan(ushort3 nancode); +half4 __ovld __cnfn nan(ushort4 nancode); +half8 __ovld __cnfn nan(ushort8 nancode); +half16 __ovld __cnfn nan(ushort16 nancode); +#endif //cl_khr_fp16 + +/** + * Computes the next representable single-precision + * floating-point value following x in the direction of + * y. Thus, if y is less than x, nextafter() returns the + * largest representable floating-point number less + * than x. + */ +float __ovld __cnfn nextafter(float x, float y); +float2 __ovld __cnfn nextafter(float2 x, float2 y); +float3 __ovld __cnfn nextafter(float3 x, float3 y); +float4 __ovld __cnfn nextafter(float4 x, float4 y); +float8 __ovld __cnfn nextafter(float8 x, float8 y); +float16 __ovld __cnfn nextafter(float16 x, float16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn nextafter(double x, double y); +double2 __ovld __cnfn nextafter(double2 x, double2 y); +double3 __ovld __cnfn nextafter(double3 x, double3 y); +double4 __ovld __cnfn nextafter(double4 x, double4 y); +double8 __ovld __cnfn nextafter(double8 x, double8 y); +double16 __ovld __cnfn nextafter(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn nextafter(half x, half y); +half2 __ovld __cnfn nextafter(half2 x, half2 y); +half3 __ovld __cnfn nextafter(half3 x, half3 y); +half4 __ovld __cnfn nextafter(half4 x, half4 y); +half8 __ovld __cnfn nextafter(half8 x, half8 y); +half16 __ovld __cnfn nextafter(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Compute x to the power y. + */ +float __ovld __cnfn pow(float x, float y); +float2 __ovld __cnfn pow(float2 x, float2 y); +float3 __ovld __cnfn pow(float3 x, float3 y); +float4 __ovld __cnfn pow(float4 x, float4 y); +float8 __ovld __cnfn pow(float8 x, float8 y); +float16 __ovld __cnfn pow(float16 x, float16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn pow(double x, double y); +double2 __ovld __cnfn pow(double2 x, double2 y); +double3 __ovld __cnfn pow(double3 x, double3 y); +double4 __ovld __cnfn pow(double4 x, double4 y); +double8 __ovld __cnfn pow(double8 x, double8 y); +double16 __ovld __cnfn pow(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn pow(half x, half y); +half2 __ovld __cnfn pow(half2 x, half2 y); +half3 __ovld __cnfn pow(half3 x, half3 y); +half4 __ovld __cnfn pow(half4 x, half4 y); +half8 __ovld __cnfn pow(half8 x, half8 y); +half16 __ovld __cnfn pow(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Compute x to the power y, where y is an integer. + */ +float __ovld __cnfn pown(float x, int y); +float2 __ovld __cnfn pown(float2 x, int2 y); +float3 __ovld __cnfn pown(float3 x, int3 y); +float4 __ovld __cnfn pown(float4 x, int4 y); +float8 __ovld __cnfn pown(float8 x, int8 y); +float16 __ovld __cnfn pown(float16 x, int16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn pown(double x, int y); +double2 __ovld __cnfn pown(double2 x, int2 y); +double3 __ovld __cnfn pown(double3 x, int3 y); +double4 __ovld __cnfn pown(double4 x, int4 y); +double8 __ovld __cnfn pown(double8 x, int8 y); +double16 __ovld __cnfn pown(double16 x, int16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn pown(half x, int y); +half2 __ovld __cnfn pown(half2 x, int2 y); +half3 __ovld __cnfn pown(half3 x, int3 y); +half4 __ovld __cnfn pown(half4 x, int4 y); +half8 __ovld __cnfn pown(half8 x, int8 y); +half16 __ovld __cnfn pown(half16 x, int16 y); +#endif //cl_khr_fp16 + +/** + * Compute x to the power y, where x is >= 0. + */ +float __ovld __cnfn powr(float x, float y); +float2 __ovld __cnfn powr(float2 x, float2 y); +float3 __ovld __cnfn powr(float3 x, float3 y); +float4 __ovld __cnfn powr(float4 x, float4 y); +float8 __ovld __cnfn powr(float8 x, float8 y); +float16 __ovld __cnfn powr(float16 x, float16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn powr(double x, double y); +double2 __ovld __cnfn powr(double2 x, double2 y); +double3 __ovld __cnfn powr(double3 x, double3 y); +double4 __ovld __cnfn powr(double4 x, double4 y); +double8 __ovld __cnfn powr(double8 x, double8 y); +double16 __ovld __cnfn powr(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn powr(half x, half y); +half2 __ovld __cnfn powr(half2 x, half2 y); +half3 __ovld __cnfn powr(half3 x, half3 y); +half4 __ovld __cnfn powr(half4 x, half4 y); +half8 __ovld __cnfn powr(half8 x, half8 y); +half16 __ovld __cnfn powr(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Compute the value r such that r = x - n*y, where n + * is the integer nearest the exact value of x/y. If there + * are two integers closest to x/y, n shall be the even + * one. If r is zero, it is given the same sign as x. + */ +float __ovld __cnfn remainder(float x, float y); +float2 __ovld __cnfn remainder(float2 x, float2 y); +float3 __ovld __cnfn remainder(float3 x, float3 y); +float4 __ovld __cnfn remainder(float4 x, float4 y); +float8 __ovld __cnfn remainder(float8 x, float8 y); +float16 __ovld __cnfn remainder(float16 x, float16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn remainder(double x, double y); +double2 __ovld __cnfn remainder(double2 x, double2 y); +double3 __ovld __cnfn remainder(double3 x, double3 y); +double4 __ovld __cnfn remainder(double4 x, double4 y); +double8 __ovld __cnfn remainder(double8 x, double8 y); +double16 __ovld __cnfn remainder(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn remainder(half x, half y); +half2 __ovld __cnfn remainder(half2 x, half2 y); +half3 __ovld __cnfn remainder(half3 x, half3 y); +half4 __ovld __cnfn remainder(half4 x, half4 y); +half8 __ovld __cnfn remainder(half8 x, half8 y); +half16 __ovld __cnfn remainder(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * The remquo function computes the value r such + * that r = x - n*y, where n is the integer nearest the + * exact value of x/y. If there are two integers closest + * to x/y, n shall be the even one. If r is zero, it is + * given the same sign as x. This is the same value + * that is returned by the remainder function. + * remquo also calculates the lower seven bits of the + * integral quotient x/y, and gives that value the same + * sign as x/y. It stores this signed value in the object + * pointed to by quo. + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +float __ovld remquo(float x, float y, int *quo); +float2 __ovld remquo(float2 x, float2 y, int2 *quo); +float3 __ovld remquo(float3 x, float3 y, int3 *quo); +float4 __ovld remquo(float4 x, float4 y, int4 *quo); +float8 __ovld remquo(float8 x, float8 y, int8 *quo); +float16 __ovld remquo(float16 x, float16 y, int16 *quo); +#ifdef cl_khr_fp64 +double __ovld remquo(double x, double y, int *quo); +double2 __ovld remquo(double2 x, double2 y, int2 *quo); +double3 __ovld remquo(double3 x, double3 y, int3 *quo); +double4 __ovld remquo(double4 x, double4 y, int4 *quo); +double8 __ovld remquo(double8 x, double8 y, int8 *quo); +double16 __ovld remquo(double16 x, double16 y, int16 *quo); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld remquo(half x, half y, int *quo); +half2 __ovld remquo(half2 x, half2 y, int2 *quo); +half3 __ovld remquo(half3 x, half3 y, int3 *quo); +half4 __ovld remquo(half4 x, half4 y, int4 *quo); +half8 __ovld remquo(half8 x, half8 y, int8 *quo); +half16 __ovld remquo(half16 x, half16 y, int16 *quo); + +#endif //cl_khr_fp16 +#else +float __ovld remquo(float x, float y, __global int *quo); +float2 __ovld remquo(float2 x, float2 y, __global int2 *quo); +float3 __ovld remquo(float3 x, float3 y, __global int3 *quo); +float4 __ovld remquo(float4 x, float4 y, __global int4 *quo); +float8 __ovld remquo(float8 x, float8 y, __global int8 *quo); +float16 __ovld remquo(float16 x, float16 y, __global int16 *quo); +float __ovld remquo(float x, float y, __local int *quo); +float2 __ovld remquo(float2 x, float2 y, __local int2 *quo); +float3 __ovld remquo(float3 x, float3 y, __local int3 *quo); +float4 __ovld remquo(float4 x, float4 y, __local int4 *quo); +float8 __ovld remquo(float8 x, float8 y, __local int8 *quo); +float16 __ovld remquo(float16 x, float16 y, __local int16 *quo); +float __ovld remquo(float x, float y, __private int *quo); +float2 __ovld remquo(float2 x, float2 y, __private int2 *quo); +float3 __ovld remquo(float3 x, float3 y, __private int3 *quo); +float4 __ovld remquo(float4 x, float4 y, __private int4 *quo); +float8 __ovld remquo(float8 x, float8 y, __private int8 *quo); +float16 __ovld remquo(float16 x, float16 y, __private int16 *quo); +#ifdef cl_khr_fp64 +double __ovld remquo(double x, double y, __global int *quo); +double2 __ovld remquo(double2 x, double2 y, __global int2 *quo); +double3 __ovld remquo(double3 x, double3 y, __global int3 *quo); +double4 __ovld remquo(double4 x, double4 y, __global int4 *quo); +double8 __ovld remquo(double8 x, double8 y, __global int8 *quo); +double16 __ovld remquo(double16 x, double16 y, __global int16 *quo); +double __ovld remquo(double x, double y, __local int *quo); +double2 __ovld remquo(double2 x, double2 y, __local int2 *quo); +double3 __ovld remquo(double3 x, double3 y, __local int3 *quo); +double4 __ovld remquo(double4 x, double4 y, __local int4 *quo); +double8 __ovld remquo(double8 x, double8 y, __local int8 *quo); +double16 __ovld remquo(double16 x, double16 y, __local int16 *quo); +double __ovld remquo(double x, double y, __private int *quo); +double2 __ovld remquo(double2 x, double2 y, __private int2 *quo); +double3 __ovld remquo(double3 x, double3 y, __private int3 *quo); +double4 __ovld remquo(double4 x, double4 y, __private int4 *quo); +double8 __ovld remquo(double8 x, double8 y, __private int8 *quo); +double16 __ovld remquo(double16 x, double16 y, __private int16 *quo); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld remquo(half x, half y, __global int *quo); +half2 __ovld remquo(half2 x, half2 y, __global int2 *quo); +half3 __ovld remquo(half3 x, half3 y, __global int3 *quo); +half4 __ovld remquo(half4 x, half4 y, __global int4 *quo); +half8 __ovld remquo(half8 x, half8 y, __global int8 *quo); +half16 __ovld remquo(half16 x, half16 y, __global int16 *quo); +half __ovld remquo(half x, half y, __local int *quo); +half2 __ovld remquo(half2 x, half2 y, __local int2 *quo); +half3 __ovld remquo(half3 x, half3 y, __local int3 *quo); +half4 __ovld remquo(half4 x, half4 y, __local int4 *quo); +half8 __ovld remquo(half8 x, half8 y, __local int8 *quo); +half16 __ovld remquo(half16 x, half16 y, __local int16 *quo); +half __ovld remquo(half x, half y, __private int *quo); +half2 __ovld remquo(half2 x, half2 y, __private int2 *quo); +half3 __ovld remquo(half3 x, half3 y, __private int3 *quo); +half4 __ovld remquo(half4 x, half4 y, __private int4 *quo); +half8 __ovld remquo(half8 x, half8 y, __private int8 *quo); +half16 __ovld remquo(half16 x, half16 y, __private int16 *quo); +#endif //cl_khr_fp16 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +/** + * Round to integral value (using round to nearest + * even rounding mode) in floating-point format. + * Refer to section 7.1 for description of rounding + * modes. + */ +float __ovld __cnfn rint(float); +float2 __ovld __cnfn rint(float2); +float3 __ovld __cnfn rint(float3); +float4 __ovld __cnfn rint(float4); +float8 __ovld __cnfn rint(float8); +float16 __ovld __cnfn rint(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn rint(double); +double2 __ovld __cnfn rint(double2); +double3 __ovld __cnfn rint(double3); +double4 __ovld __cnfn rint(double4); +double8 __ovld __cnfn rint(double8); +double16 __ovld __cnfn rint(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn rint(half); +half2 __ovld __cnfn rint(half2); +half3 __ovld __cnfn rint(half3); +half4 __ovld __cnfn rint(half4); +half8 __ovld __cnfn rint(half8); +half16 __ovld __cnfn rint(half16); +#endif //cl_khr_fp16 + +/** + * Compute x to the power 1/y. + */ +float __ovld __cnfn rootn(float x, int y); +float2 __ovld __cnfn rootn(float2 x, int2 y); +float3 __ovld __cnfn rootn(float3 x, int3 y); +float4 __ovld __cnfn rootn(float4 x, int4 y); +float8 __ovld __cnfn rootn(float8 x, int8 y); +float16 __ovld __cnfn rootn(float16 x, int16 y); +#ifdef cl_khr_fp64 +double __ovld __cnfn rootn(double x, int y); +double2 __ovld __cnfn rootn(double2 x, int2 y); +double3 __ovld __cnfn rootn(double3 x, int3 y); +double4 __ovld __cnfn rootn(double4 x, int4 y); +double8 __ovld __cnfn rootn(double8 x, int8 y); +double16 __ovld __cnfn rootn(double16 x, int16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn rootn(half x, int y); +half2 __ovld __cnfn rootn(half2 x, int2 y); +half3 __ovld __cnfn rootn(half3 x, int3 y); +half4 __ovld __cnfn rootn(half4 x, int4 y); +half8 __ovld __cnfn rootn(half8 x, int8 y); +half16 __ovld __cnfn rootn(half16 x, int16 y); +#endif //cl_khr_fp16 + +/** + * Return the integral value nearest to x rounding + * halfway cases away from zero, regardless of the + * current rounding direction. + */ +float __ovld __cnfn round(float x); +float2 __ovld __cnfn round(float2 x); +float3 __ovld __cnfn round(float3 x); +float4 __ovld __cnfn round(float4 x); +float8 __ovld __cnfn round(float8 x); +float16 __ovld __cnfn round(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn round(double x); +double2 __ovld __cnfn round(double2 x); +double3 __ovld __cnfn round(double3 x); +double4 __ovld __cnfn round(double4 x); +double8 __ovld __cnfn round(double8 x); +double16 __ovld __cnfn round(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn round(half x); +half2 __ovld __cnfn round(half2 x); +half3 __ovld __cnfn round(half3 x); +half4 __ovld __cnfn round(half4 x); +half8 __ovld __cnfn round(half8 x); +half16 __ovld __cnfn round(half16 x); +#endif //cl_khr_fp16 + +/** + * Compute inverse square root. + */ +float __ovld __cnfn rsqrt(float); +float2 __ovld __cnfn rsqrt(float2); +float3 __ovld __cnfn rsqrt(float3); +float4 __ovld __cnfn rsqrt(float4); +float8 __ovld __cnfn rsqrt(float8); +float16 __ovld __cnfn rsqrt(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn rsqrt(double); +double2 __ovld __cnfn rsqrt(double2); +double3 __ovld __cnfn rsqrt(double3); +double4 __ovld __cnfn rsqrt(double4); +double8 __ovld __cnfn rsqrt(double8); +double16 __ovld __cnfn rsqrt(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn rsqrt(half); +half2 __ovld __cnfn rsqrt(half2); +half3 __ovld __cnfn rsqrt(half3); +half4 __ovld __cnfn rsqrt(half4); +half8 __ovld __cnfn rsqrt(half8); +half16 __ovld __cnfn rsqrt(half16); +#endif //cl_khr_fp16 + +/** + * Compute sine. + */ +float __ovld __cnfn sin(float); +float2 __ovld __cnfn sin(float2); +float3 __ovld __cnfn sin(float3); +float4 __ovld __cnfn sin(float4); +float8 __ovld __cnfn sin(float8); +float16 __ovld __cnfn sin(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn sin(double); +double2 __ovld __cnfn sin(double2); +double3 __ovld __cnfn sin(double3); +double4 __ovld __cnfn sin(double4); +double8 __ovld __cnfn sin(double8); +double16 __ovld __cnfn sin(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn sin(half); +half2 __ovld __cnfn sin(half2); +half3 __ovld __cnfn sin(half3); +half4 __ovld __cnfn sin(half4); +half8 __ovld __cnfn sin(half8); +half16 __ovld __cnfn sin(half16); +#endif //cl_khr_fp16 + +/** + * Compute sine and cosine of x. The computed sine + * is the return value and computed cosine is returned + * in cosval. + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +float __ovld sincos(float x, float *cosval); +float2 __ovld sincos(float2 x, float2 *cosval); +float3 __ovld sincos(float3 x, float3 *cosval); +float4 __ovld sincos(float4 x, float4 *cosval); +float8 __ovld sincos(float8 x, float8 *cosval); +float16 __ovld sincos(float16 x, float16 *cosval); +#ifdef cl_khr_fp64 +double __ovld sincos(double x, double *cosval); +double2 __ovld sincos(double2 x, double2 *cosval); +double3 __ovld sincos(double3 x, double3 *cosval); +double4 __ovld sincos(double4 x, double4 *cosval); +double8 __ovld sincos(double8 x, double8 *cosval); +double16 __ovld sincos(double16 x, double16 *cosval); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld sincos(half x, half *cosval); +half2 __ovld sincos(half2 x, half2 *cosval); +half3 __ovld sincos(half3 x, half3 *cosval); +half4 __ovld sincos(half4 x, half4 *cosval); +half8 __ovld sincos(half8 x, half8 *cosval); +half16 __ovld sincos(half16 x, half16 *cosval); +#endif //cl_khr_fp16 +#else +float __ovld sincos(float x, __global float *cosval); +float2 __ovld sincos(float2 x, __global float2 *cosval); +float3 __ovld sincos(float3 x, __global float3 *cosval); +float4 __ovld sincos(float4 x, __global float4 *cosval); +float8 __ovld sincos(float8 x, __global float8 *cosval); +float16 __ovld sincos(float16 x, __global float16 *cosval); +float __ovld sincos(float x, __local float *cosval); +float2 __ovld sincos(float2 x, __local float2 *cosval); +float3 __ovld sincos(float3 x, __local float3 *cosval); +float4 __ovld sincos(float4 x, __local float4 *cosval); +float8 __ovld sincos(float8 x, __local float8 *cosval); +float16 __ovld sincos(float16 x, __local float16 *cosval); +float __ovld sincos(float x, __private float *cosval); +float2 __ovld sincos(float2 x, __private float2 *cosval); +float3 __ovld sincos(float3 x, __private float3 *cosval); +float4 __ovld sincos(float4 x, __private float4 *cosval); +float8 __ovld sincos(float8 x, __private float8 *cosval); +float16 __ovld sincos(float16 x, __private float16 *cosval); +#ifdef cl_khr_fp64 +double __ovld sincos(double x, __global double *cosval); +double2 __ovld sincos(double2 x, __global double2 *cosval); +double3 __ovld sincos(double3 x, __global double3 *cosval); +double4 __ovld sincos(double4 x, __global double4 *cosval); +double8 __ovld sincos(double8 x, __global double8 *cosval); +double16 __ovld sincos(double16 x, __global double16 *cosval); +double __ovld sincos(double x, __local double *cosval); +double2 __ovld sincos(double2 x, __local double2 *cosval); +double3 __ovld sincos(double3 x, __local double3 *cosval); +double4 __ovld sincos(double4 x, __local double4 *cosval); +double8 __ovld sincos(double8 x, __local double8 *cosval); +double16 __ovld sincos(double16 x, __local double16 *cosval); +double __ovld sincos(double x, __private double *cosval); +double2 __ovld sincos(double2 x, __private double2 *cosval); +double3 __ovld sincos(double3 x, __private double3 *cosval); +double4 __ovld sincos(double4 x, __private double4 *cosval); +double8 __ovld sincos(double8 x, __private double8 *cosval); +double16 __ovld sincos(double16 x, __private double16 *cosval); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld sincos(half x, __global half *cosval); +half2 __ovld sincos(half2 x, __global half2 *cosval); +half3 __ovld sincos(half3 x, __global half3 *cosval); +half4 __ovld sincos(half4 x, __global half4 *cosval); +half8 __ovld sincos(half8 x, __global half8 *cosval); +half16 __ovld sincos(half16 x, __global half16 *cosval); +half __ovld sincos(half x, __local half *cosval); +half2 __ovld sincos(half2 x, __local half2 *cosval); +half3 __ovld sincos(half3 x, __local half3 *cosval); +half4 __ovld sincos(half4 x, __local half4 *cosval); +half8 __ovld sincos(half8 x, __local half8 *cosval); +half16 __ovld sincos(half16 x, __local half16 *cosval); +half __ovld sincos(half x, __private half *cosval); +half2 __ovld sincos(half2 x, __private half2 *cosval); +half3 __ovld sincos(half3 x, __private half3 *cosval); +half4 __ovld sincos(half4 x, __private half4 *cosval); +half8 __ovld sincos(half8 x, __private half8 *cosval); +half16 __ovld sincos(half16 x, __private half16 *cosval); +#endif //cl_khr_fp16 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Compute hyperbolic sine. + */ +float __ovld __cnfn sinh(float); +float2 __ovld __cnfn sinh(float2); +float3 __ovld __cnfn sinh(float3); +float4 __ovld __cnfn sinh(float4); +float8 __ovld __cnfn sinh(float8); +float16 __ovld __cnfn sinh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn sinh(double); +double2 __ovld __cnfn sinh(double2); +double3 __ovld __cnfn sinh(double3); +double4 __ovld __cnfn sinh(double4); +double8 __ovld __cnfn sinh(double8); +double16 __ovld __cnfn sinh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn sinh(half); +half2 __ovld __cnfn sinh(half2); +half3 __ovld __cnfn sinh(half3); +half4 __ovld __cnfn sinh(half4); +half8 __ovld __cnfn sinh(half8); +half16 __ovld __cnfn sinh(half16); +#endif //cl_khr_fp16 + +/** + * Compute sin (PI * x). + */ +float __ovld __cnfn sinpi(float x); +float2 __ovld __cnfn sinpi(float2 x); +float3 __ovld __cnfn sinpi(float3 x); +float4 __ovld __cnfn sinpi(float4 x); +float8 __ovld __cnfn sinpi(float8 x); +float16 __ovld __cnfn sinpi(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn sinpi(double x); +double2 __ovld __cnfn sinpi(double2 x); +double3 __ovld __cnfn sinpi(double3 x); +double4 __ovld __cnfn sinpi(double4 x); +double8 __ovld __cnfn sinpi(double8 x); +double16 __ovld __cnfn sinpi(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn sinpi(half x); +half2 __ovld __cnfn sinpi(half2 x); +half3 __ovld __cnfn sinpi(half3 x); +half4 __ovld __cnfn sinpi(half4 x); +half8 __ovld __cnfn sinpi(half8 x); +half16 __ovld __cnfn sinpi(half16 x); +#endif //cl_khr_fp16 + +/** + * Compute square root. + */ +float __ovld __cnfn sqrt(float); +float2 __ovld __cnfn sqrt(float2); +float3 __ovld __cnfn sqrt(float3); +float4 __ovld __cnfn sqrt(float4); +float8 __ovld __cnfn sqrt(float8); +float16 __ovld __cnfn sqrt(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn sqrt(double); +double2 __ovld __cnfn sqrt(double2); +double3 __ovld __cnfn sqrt(double3); +double4 __ovld __cnfn sqrt(double4); +double8 __ovld __cnfn sqrt(double8); +double16 __ovld __cnfn sqrt(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn sqrt(half); +half2 __ovld __cnfn sqrt(half2); +half3 __ovld __cnfn sqrt(half3); +half4 __ovld __cnfn sqrt(half4); +half8 __ovld __cnfn sqrt(half8); +half16 __ovld __cnfn sqrt(half16); +#endif //cl_khr_fp16 + +/** + * Compute tangent. + */ +float __ovld __cnfn tan(float); +float2 __ovld __cnfn tan(float2); +float3 __ovld __cnfn tan(float3); +float4 __ovld __cnfn tan(float4); +float8 __ovld __cnfn tan(float8); +float16 __ovld __cnfn tan(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn tan(double); +double2 __ovld __cnfn tan(double2); +double3 __ovld __cnfn tan(double3); +double4 __ovld __cnfn tan(double4); +double8 __ovld __cnfn tan(double8); +double16 __ovld __cnfn tan(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn tan(half); +half2 __ovld __cnfn tan(half2); +half3 __ovld __cnfn tan(half3); +half4 __ovld __cnfn tan(half4); +half8 __ovld __cnfn tan(half8); +half16 __ovld __cnfn tan(half16); +#endif //cl_khr_fp16 + +/** + * Compute hyperbolic tangent. + */ +float __ovld __cnfn tanh(float); +float2 __ovld __cnfn tanh(float2); +float3 __ovld __cnfn tanh(float3); +float4 __ovld __cnfn tanh(float4); +float8 __ovld __cnfn tanh(float8); +float16 __ovld __cnfn tanh(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn tanh(double); +double2 __ovld __cnfn tanh(double2); +double3 __ovld __cnfn tanh(double3); +double4 __ovld __cnfn tanh(double4); +double8 __ovld __cnfn tanh(double8); +double16 __ovld __cnfn tanh(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn tanh(half); +half2 __ovld __cnfn tanh(half2); +half3 __ovld __cnfn tanh(half3); +half4 __ovld __cnfn tanh(half4); +half8 __ovld __cnfn tanh(half8); +half16 __ovld __cnfn tanh(half16); +#endif //cl_khr_fp16 + +/** + * Compute tan (PI * x). + */ +float __ovld __cnfn tanpi(float x); +float2 __ovld __cnfn tanpi(float2 x); +float3 __ovld __cnfn tanpi(float3 x); +float4 __ovld __cnfn tanpi(float4 x); +float8 __ovld __cnfn tanpi(float8 x); +float16 __ovld __cnfn tanpi(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn tanpi(double x); +double2 __ovld __cnfn tanpi(double2 x); +double3 __ovld __cnfn tanpi(double3 x); +double4 __ovld __cnfn tanpi(double4 x); +double8 __ovld __cnfn tanpi(double8 x); +double16 __ovld __cnfn tanpi(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn tanpi(half x); +half2 __ovld __cnfn tanpi(half2 x); +half3 __ovld __cnfn tanpi(half3 x); +half4 __ovld __cnfn tanpi(half4 x); +half8 __ovld __cnfn tanpi(half8 x); +half16 __ovld __cnfn tanpi(half16 x); +#endif //cl_khr_fp16 + +/** + * Compute the gamma function. + */ +float __ovld __cnfn tgamma(float); +float2 __ovld __cnfn tgamma(float2); +float3 __ovld __cnfn tgamma(float3); +float4 __ovld __cnfn tgamma(float4); +float8 __ovld __cnfn tgamma(float8); +float16 __ovld __cnfn tgamma(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn tgamma(double); +double2 __ovld __cnfn tgamma(double2); +double3 __ovld __cnfn tgamma(double3); +double4 __ovld __cnfn tgamma(double4); +double8 __ovld __cnfn tgamma(double8); +double16 __ovld __cnfn tgamma(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn tgamma(half); +half2 __ovld __cnfn tgamma(half2); +half3 __ovld __cnfn tgamma(half3); +half4 __ovld __cnfn tgamma(half4); +half8 __ovld __cnfn tgamma(half8); +half16 __ovld __cnfn tgamma(half16); +#endif //cl_khr_fp16 + +/** + * Round to integral value using the round to zero + * rounding mode. + */ +float __ovld __cnfn trunc(float); +float2 __ovld __cnfn trunc(float2); +float3 __ovld __cnfn trunc(float3); +float4 __ovld __cnfn trunc(float4); +float8 __ovld __cnfn trunc(float8); +float16 __ovld __cnfn trunc(float16); +#ifdef cl_khr_fp64 +double __ovld __cnfn trunc(double); +double2 __ovld __cnfn trunc(double2); +double3 __ovld __cnfn trunc(double3); +double4 __ovld __cnfn trunc(double4); +double8 __ovld __cnfn trunc(double8); +double16 __ovld __cnfn trunc(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn trunc(half); +half2 __ovld __cnfn trunc(half2); +half3 __ovld __cnfn trunc(half3); +half4 __ovld __cnfn trunc(half4); +half8 __ovld __cnfn trunc(half8); +half16 __ovld __cnfn trunc(half16); +#endif //cl_khr_fp16 + +/** + * Compute cosine. x must be in the range -2^16 ... +2^16. + */ +float __ovld __cnfn half_cos(float x); +float2 __ovld __cnfn half_cos(float2 x); +float3 __ovld __cnfn half_cos(float3 x); +float4 __ovld __cnfn half_cos(float4 x); +float8 __ovld __cnfn half_cos(float8 x); +float16 __ovld __cnfn half_cos(float16 x); + +/** + * Compute x / y. + */ +float __ovld __cnfn half_divide(float x, float y); +float2 __ovld __cnfn half_divide(float2 x, float2 y); +float3 __ovld __cnfn half_divide(float3 x, float3 y); +float4 __ovld __cnfn half_divide(float4 x, float4 y); +float8 __ovld __cnfn half_divide(float8 x, float8 y); +float16 __ovld __cnfn half_divide(float16 x, float16 y); + +/** + * Compute the base- e exponential of x. + */ +float __ovld __cnfn half_exp(float x); +float2 __ovld __cnfn half_exp(float2 x); +float3 __ovld __cnfn half_exp(float3 x); +float4 __ovld __cnfn half_exp(float4 x); +float8 __ovld __cnfn half_exp(float8 x); +float16 __ovld __cnfn half_exp(float16 x); + +/** + * Compute the base- 2 exponential of x. + */ +float __ovld __cnfn half_exp2(float x); +float2 __ovld __cnfn half_exp2(float2 x); +float3 __ovld __cnfn half_exp2(float3 x); +float4 __ovld __cnfn half_exp2(float4 x); +float8 __ovld __cnfn half_exp2(float8 x); +float16 __ovld __cnfn half_exp2(float16 x); + +/** + * Compute the base- 10 exponential of x. + */ +float __ovld __cnfn half_exp10(float x); +float2 __ovld __cnfn half_exp10(float2 x); +float3 __ovld __cnfn half_exp10(float3 x); +float4 __ovld __cnfn half_exp10(float4 x); +float8 __ovld __cnfn half_exp10(float8 x); +float16 __ovld __cnfn half_exp10(float16 x); + +/** + * Compute natural logarithm. + */ +float __ovld __cnfn half_log(float x); +float2 __ovld __cnfn half_log(float2 x); +float3 __ovld __cnfn half_log(float3 x); +float4 __ovld __cnfn half_log(float4 x); +float8 __ovld __cnfn half_log(float8 x); +float16 __ovld __cnfn half_log(float16 x); + +/** + * Compute a base 2 logarithm. + */ +float __ovld __cnfn half_log2(float x); +float2 __ovld __cnfn half_log2(float2 x); +float3 __ovld __cnfn half_log2(float3 x); +float4 __ovld __cnfn half_log2(float4 x); +float8 __ovld __cnfn half_log2(float8 x); +float16 __ovld __cnfn half_log2(float16 x); + +/** + * Compute a base 10 logarithm. + */ +float __ovld __cnfn half_log10(float x); +float2 __ovld __cnfn half_log10(float2 x); +float3 __ovld __cnfn half_log10(float3 x); +float4 __ovld __cnfn half_log10(float4 x); +float8 __ovld __cnfn half_log10(float8 x); +float16 __ovld __cnfn half_log10(float16 x); + +/** + * Compute x to the power y, where x is >= 0. + */ +float __ovld __cnfn half_powr(float x, float y); +float2 __ovld __cnfn half_powr(float2 x, float2 y); +float3 __ovld __cnfn half_powr(float3 x, float3 y); +float4 __ovld __cnfn half_powr(float4 x, float4 y); +float8 __ovld __cnfn half_powr(float8 x, float8 y); +float16 __ovld __cnfn half_powr(float16 x, float16 y); + +/** + * Compute reciprocal. + */ +float __ovld __cnfn half_recip(float x); +float2 __ovld __cnfn half_recip(float2 x); +float3 __ovld __cnfn half_recip(float3 x); +float4 __ovld __cnfn half_recip(float4 x); +float8 __ovld __cnfn half_recip(float8 x); +float16 __ovld __cnfn half_recip(float16 x); + +/** + * Compute inverse square root. + */ +float __ovld __cnfn half_rsqrt(float x); +float2 __ovld __cnfn half_rsqrt(float2 x); +float3 __ovld __cnfn half_rsqrt(float3 x); +float4 __ovld __cnfn half_rsqrt(float4 x); +float8 __ovld __cnfn half_rsqrt(float8 x); +float16 __ovld __cnfn half_rsqrt(float16 x); + +/** + * Compute sine. x must be in the range -2^16 ... +2^16. + */ +float __ovld __cnfn half_sin(float x); +float2 __ovld __cnfn half_sin(float2 x); +float3 __ovld __cnfn half_sin(float3 x); +float4 __ovld __cnfn half_sin(float4 x); +float8 __ovld __cnfn half_sin(float8 x); +float16 __ovld __cnfn half_sin(float16 x); + +/** + * Compute square root. + */ +float __ovld __cnfn half_sqrt(float x); +float2 __ovld __cnfn half_sqrt(float2 x); +float3 __ovld __cnfn half_sqrt(float3 x); +float4 __ovld __cnfn half_sqrt(float4 x); +float8 __ovld __cnfn half_sqrt(float8 x); +float16 __ovld __cnfn half_sqrt(float16 x); + +/** + * Compute tangent. x must be in the range -216 ... +216. + */ +float __ovld __cnfn half_tan(float x); +float2 __ovld __cnfn half_tan(float2 x); +float3 __ovld __cnfn half_tan(float3 x); +float4 __ovld __cnfn half_tan(float4 x); +float8 __ovld __cnfn half_tan(float8 x); +float16 __ovld __cnfn half_tan(float16 x); + +/** + * Compute cosine over an implementation-defined range. + * The maximum error is implementation-defined. + */ +float __ovld __cnfn native_cos(float x); +float2 __ovld __cnfn native_cos(float2 x); +float3 __ovld __cnfn native_cos(float3 x); +float4 __ovld __cnfn native_cos(float4 x); +float8 __ovld __cnfn native_cos(float8 x); +float16 __ovld __cnfn native_cos(float16 x); + +/** + * Compute x / y over an implementation-defined range. + * The maximum error is implementation-defined. + */ +float __ovld __cnfn native_divide(float x, float y); +float2 __ovld __cnfn native_divide(float2 x, float2 y); +float3 __ovld __cnfn native_divide(float3 x, float3 y); +float4 __ovld __cnfn native_divide(float4 x, float4 y); +float8 __ovld __cnfn native_divide(float8 x, float8 y); +float16 __ovld __cnfn native_divide(float16 x, float16 y); + +/** + * Compute the base- e exponential of x over an + * implementation-defined range. The maximum error is + * implementation-defined. + */ +float __ovld __cnfn native_exp(float x); +float2 __ovld __cnfn native_exp(float2 x); +float3 __ovld __cnfn native_exp(float3 x); +float4 __ovld __cnfn native_exp(float4 x); +float8 __ovld __cnfn native_exp(float8 x); +float16 __ovld __cnfn native_exp(float16 x); + +/** + * Compute the base- 2 exponential of x over an + * implementation-defined range. The maximum error is + * implementation-defined. + */ +float __ovld __cnfn native_exp2(float x); +float2 __ovld __cnfn native_exp2(float2 x); +float3 __ovld __cnfn native_exp2(float3 x); +float4 __ovld __cnfn native_exp2(float4 x); +float8 __ovld __cnfn native_exp2(float8 x); +float16 __ovld __cnfn native_exp2(float16 x); + +/** + * Compute the base- 10 exponential of x over an + * implementation-defined range. The maximum error is + * implementation-defined. + */ +float __ovld __cnfn native_exp10(float x); +float2 __ovld __cnfn native_exp10(float2 x); +float3 __ovld __cnfn native_exp10(float3 x); +float4 __ovld __cnfn native_exp10(float4 x); +float8 __ovld __cnfn native_exp10(float8 x); +float16 __ovld __cnfn native_exp10(float16 x); + +/** + * Compute natural logarithm over an implementationdefined + * range. The maximum error is implementation + * defined. + */ +float __ovld __cnfn native_log(float x); +float2 __ovld __cnfn native_log(float2 x); +float3 __ovld __cnfn native_log(float3 x); +float4 __ovld __cnfn native_log(float4 x); +float8 __ovld __cnfn native_log(float8 x); +float16 __ovld __cnfn native_log(float16 x); + +/** + * Compute a base 2 logarithm over an implementationdefined + * range. The maximum error is implementationdefined. + */ +float __ovld __cnfn native_log2(float x); +float2 __ovld __cnfn native_log2(float2 x); +float3 __ovld __cnfn native_log2(float3 x); +float4 __ovld __cnfn native_log2(float4 x); +float8 __ovld __cnfn native_log2(float8 x); +float16 __ovld __cnfn native_log2(float16 x); + +/** + * Compute a base 10 logarithm over an implementationdefined + * range. The maximum error is implementationdefined. + */ +float __ovld __cnfn native_log10(float x); +float2 __ovld __cnfn native_log10(float2 x); +float3 __ovld __cnfn native_log10(float3 x); +float4 __ovld __cnfn native_log10(float4 x); +float8 __ovld __cnfn native_log10(float8 x); +float16 __ovld __cnfn native_log10(float16 x); + +/** + * Compute x to the power y, where x is >= 0. The range of + * x and y are implementation-defined. The maximum error + * is implementation-defined. + */ +float __ovld __cnfn native_powr(float x, float y); +float2 __ovld __cnfn native_powr(float2 x, float2 y); +float3 __ovld __cnfn native_powr(float3 x, float3 y); +float4 __ovld __cnfn native_powr(float4 x, float4 y); +float8 __ovld __cnfn native_powr(float8 x, float8 y); +float16 __ovld __cnfn native_powr(float16 x, float16 y); + +/** + * Compute reciprocal over an implementation-defined + * range. The maximum error is implementation-defined. + */ +float __ovld __cnfn native_recip(float x); +float2 __ovld __cnfn native_recip(float2 x); +float3 __ovld __cnfn native_recip(float3 x); +float4 __ovld __cnfn native_recip(float4 x); +float8 __ovld __cnfn native_recip(float8 x); +float16 __ovld __cnfn native_recip(float16 x); + +/** + * Compute inverse square root over an implementationdefined + * range. The maximum error is implementationdefined. + */ +float __ovld __cnfn native_rsqrt(float x); +float2 __ovld __cnfn native_rsqrt(float2 x); +float3 __ovld __cnfn native_rsqrt(float3 x); +float4 __ovld __cnfn native_rsqrt(float4 x); +float8 __ovld __cnfn native_rsqrt(float8 x); +float16 __ovld __cnfn native_rsqrt(float16 x); + +/** + * Compute sine over an implementation-defined range. + * The maximum error is implementation-defined. + */ +float __ovld __cnfn native_sin(float x); +float2 __ovld __cnfn native_sin(float2 x); +float3 __ovld __cnfn native_sin(float3 x); +float4 __ovld __cnfn native_sin(float4 x); +float8 __ovld __cnfn native_sin(float8 x); +float16 __ovld __cnfn native_sin(float16 x); + +/** + * Compute square root over an implementation-defined + * range. The maximum error is implementation-defined. + */ +float __ovld __cnfn native_sqrt(float x); +float2 __ovld __cnfn native_sqrt(float2 x); +float3 __ovld __cnfn native_sqrt(float3 x); +float4 __ovld __cnfn native_sqrt(float4 x); +float8 __ovld __cnfn native_sqrt(float8 x); +float16 __ovld __cnfn native_sqrt(float16 x); + +/** + * Compute tangent over an implementation-defined range. + * The maximum error is implementation-defined. + */ +float __ovld __cnfn native_tan(float x); +float2 __ovld __cnfn native_tan(float2 x); +float3 __ovld __cnfn native_tan(float3 x); +float4 __ovld __cnfn native_tan(float4 x); +float8 __ovld __cnfn native_tan(float8 x); +float16 __ovld __cnfn native_tan(float16 x); + +// OpenCL v1.1 s6.11.3, v1.2 s6.12.3, v2.0 s6.13.3 - Integer Functions + +/** + * Returns | x |. + */ +uchar __ovld __cnfn abs(char x); +uchar __ovld __cnfn abs(uchar x); +uchar2 __ovld __cnfn abs(char2 x); +uchar2 __ovld __cnfn abs(uchar2 x); +uchar3 __ovld __cnfn abs(char3 x); +uchar3 __ovld __cnfn abs(uchar3 x); +uchar4 __ovld __cnfn abs(char4 x); +uchar4 __ovld __cnfn abs(uchar4 x); +uchar8 __ovld __cnfn abs(char8 x); +uchar8 __ovld __cnfn abs(uchar8 x); +uchar16 __ovld __cnfn abs(char16 x); +uchar16 __ovld __cnfn abs(uchar16 x); +ushort __ovld __cnfn abs(short x); +ushort __ovld __cnfn abs(ushort x); +ushort2 __ovld __cnfn abs(short2 x); +ushort2 __ovld __cnfn abs(ushort2 x); +ushort3 __ovld __cnfn abs(short3 x); +ushort3 __ovld __cnfn abs(ushort3 x); +ushort4 __ovld __cnfn abs(short4 x); +ushort4 __ovld __cnfn abs(ushort4 x); +ushort8 __ovld __cnfn abs(short8 x); +ushort8 __ovld __cnfn abs(ushort8 x); +ushort16 __ovld __cnfn abs(short16 x); +ushort16 __ovld __cnfn abs(ushort16 x); +uint __ovld __cnfn abs(int x); +uint __ovld __cnfn abs(uint x); +uint2 __ovld __cnfn abs(int2 x); +uint2 __ovld __cnfn abs(uint2 x); +uint3 __ovld __cnfn abs(int3 x); +uint3 __ovld __cnfn abs(uint3 x); +uint4 __ovld __cnfn abs(int4 x); +uint4 __ovld __cnfn abs(uint4 x); +uint8 __ovld __cnfn abs(int8 x); +uint8 __ovld __cnfn abs(uint8 x); +uint16 __ovld __cnfn abs(int16 x); +uint16 __ovld __cnfn abs(uint16 x); +ulong __ovld __cnfn abs(long x); +ulong __ovld __cnfn abs(ulong x); +ulong2 __ovld __cnfn abs(long2 x); +ulong2 __ovld __cnfn abs(ulong2 x); +ulong3 __ovld __cnfn abs(long3 x); +ulong3 __ovld __cnfn abs(ulong3 x); +ulong4 __ovld __cnfn abs(long4 x); +ulong4 __ovld __cnfn abs(ulong4 x); +ulong8 __ovld __cnfn abs(long8 x); +ulong8 __ovld __cnfn abs(ulong8 x); +ulong16 __ovld __cnfn abs(long16 x); +ulong16 __ovld __cnfn abs(ulong16 x); + +/** + * Returns | x - y | without modulo overflow. + */ +uchar __ovld __cnfn abs_diff(char x, char y); +uchar __ovld __cnfn abs_diff(uchar x, uchar y); +uchar2 __ovld __cnfn abs_diff(char2 x, char2 y); +uchar2 __ovld __cnfn abs_diff(uchar2 x, uchar2 y); +uchar3 __ovld __cnfn abs_diff(char3 x, char3 y); +uchar3 __ovld __cnfn abs_diff(uchar3 x, uchar3 y); +uchar4 __ovld __cnfn abs_diff(char4 x, char4 y); +uchar4 __ovld __cnfn abs_diff(uchar4 x, uchar4 y); +uchar8 __ovld __cnfn abs_diff(char8 x, char8 y); +uchar8 __ovld __cnfn abs_diff(uchar8 x, uchar8 y); +uchar16 __ovld __cnfn abs_diff(char16 x, char16 y); +uchar16 __ovld __cnfn abs_diff(uchar16 x, uchar16 y); +ushort __ovld __cnfn abs_diff(short x, short y); +ushort __ovld __cnfn abs_diff(ushort x, ushort y); +ushort2 __ovld __cnfn abs_diff(short2 x, short2 y); +ushort2 __ovld __cnfn abs_diff(ushort2 x, ushort2 y); +ushort3 __ovld __cnfn abs_diff(short3 x, short3 y); +ushort3 __ovld __cnfn abs_diff(ushort3 x, ushort3 y); +ushort4 __ovld __cnfn abs_diff(short4 x, short4 y); +ushort4 __ovld __cnfn abs_diff(ushort4 x, ushort4 y); +ushort8 __ovld __cnfn abs_diff(short8 x, short8 y); +ushort8 __ovld __cnfn abs_diff(ushort8 x, ushort8 y); +ushort16 __ovld __cnfn abs_diff(short16 x, short16 y); +ushort16 __ovld __cnfn abs_diff(ushort16 x, ushort16 y); +uint __ovld __cnfn abs_diff(int x, int y); +uint __ovld __cnfn abs_diff(uint x, uint y); +uint2 __ovld __cnfn abs_diff(int2 x, int2 y); +uint2 __ovld __cnfn abs_diff(uint2 x, uint2 y); +uint3 __ovld __cnfn abs_diff(int3 x, int3 y); +uint3 __ovld __cnfn abs_diff(uint3 x, uint3 y); +uint4 __ovld __cnfn abs_diff(int4 x, int4 y); +uint4 __ovld __cnfn abs_diff(uint4 x, uint4 y); +uint8 __ovld __cnfn abs_diff(int8 x, int8 y); +uint8 __ovld __cnfn abs_diff(uint8 x, uint8 y); +uint16 __ovld __cnfn abs_diff(int16 x, int16 y); +uint16 __ovld __cnfn abs_diff(uint16 x, uint16 y); +ulong __ovld __cnfn abs_diff(long x, long y); +ulong __ovld __cnfn abs_diff(ulong x, ulong y); +ulong2 __ovld __cnfn abs_diff(long2 x, long2 y); +ulong2 __ovld __cnfn abs_diff(ulong2 x, ulong2 y); +ulong3 __ovld __cnfn abs_diff(long3 x, long3 y); +ulong3 __ovld __cnfn abs_diff(ulong3 x, ulong3 y); +ulong4 __ovld __cnfn abs_diff(long4 x, long4 y); +ulong4 __ovld __cnfn abs_diff(ulong4 x, ulong4 y); +ulong8 __ovld __cnfn abs_diff(long8 x, long8 y); +ulong8 __ovld __cnfn abs_diff(ulong8 x, ulong8 y); +ulong16 __ovld __cnfn abs_diff(long16 x, long16 y); +ulong16 __ovld __cnfn abs_diff(ulong16 x, ulong16 y); + +/** + * Returns x + y and saturates the result. + */ +char __ovld __cnfn add_sat(char x, char y); +uchar __ovld __cnfn add_sat(uchar x, uchar y); +char2 __ovld __cnfn add_sat(char2 x, char2 y); +uchar2 __ovld __cnfn add_sat(uchar2 x, uchar2 y); +char3 __ovld __cnfn add_sat(char3 x, char3 y); +uchar3 __ovld __cnfn add_sat(uchar3 x, uchar3 y); +char4 __ovld __cnfn add_sat(char4 x, char4 y); +uchar4 __ovld __cnfn add_sat(uchar4 x, uchar4 y); +char8 __ovld __cnfn add_sat(char8 x, char8 y); +uchar8 __ovld __cnfn add_sat(uchar8 x, uchar8 y); +char16 __ovld __cnfn add_sat(char16 x, char16 y); +uchar16 __ovld __cnfn add_sat(uchar16 x, uchar16 y); +short __ovld __cnfn add_sat(short x, short y); +ushort __ovld __cnfn add_sat(ushort x, ushort y); +short2 __ovld __cnfn add_sat(short2 x, short2 y); +ushort2 __ovld __cnfn add_sat(ushort2 x, ushort2 y); +short3 __ovld __cnfn add_sat(short3 x, short3 y); +ushort3 __ovld __cnfn add_sat(ushort3 x, ushort3 y); +short4 __ovld __cnfn add_sat(short4 x, short4 y); +ushort4 __ovld __cnfn add_sat(ushort4 x, ushort4 y); +short8 __ovld __cnfn add_sat(short8 x, short8 y); +ushort8 __ovld __cnfn add_sat(ushort8 x, ushort8 y); +short16 __ovld __cnfn add_sat(short16 x, short16 y); +ushort16 __ovld __cnfn add_sat(ushort16 x, ushort16 y); +int __ovld __cnfn add_sat(int x, int y); +uint __ovld __cnfn add_sat(uint x, uint y); +int2 __ovld __cnfn add_sat(int2 x, int2 y); +uint2 __ovld __cnfn add_sat(uint2 x, uint2 y); +int3 __ovld __cnfn add_sat(int3 x, int3 y); +uint3 __ovld __cnfn add_sat(uint3 x, uint3 y); +int4 __ovld __cnfn add_sat(int4 x, int4 y); +uint4 __ovld __cnfn add_sat(uint4 x, uint4 y); +int8 __ovld __cnfn add_sat(int8 x, int8 y); +uint8 __ovld __cnfn add_sat(uint8 x, uint8 y); +int16 __ovld __cnfn add_sat(int16 x, int16 y); +uint16 __ovld __cnfn add_sat(uint16 x, uint16 y); +long __ovld __cnfn add_sat(long x, long y); +ulong __ovld __cnfn add_sat(ulong x, ulong y); +long2 __ovld __cnfn add_sat(long2 x, long2 y); +ulong2 __ovld __cnfn add_sat(ulong2 x, ulong2 y); +long3 __ovld __cnfn add_sat(long3 x, long3 y); +ulong3 __ovld __cnfn add_sat(ulong3 x, ulong3 y); +long4 __ovld __cnfn add_sat(long4 x, long4 y); +ulong4 __ovld __cnfn add_sat(ulong4 x, ulong4 y); +long8 __ovld __cnfn add_sat(long8 x, long8 y); +ulong8 __ovld __cnfn add_sat(ulong8 x, ulong8 y); +long16 __ovld __cnfn add_sat(long16 x, long16 y); +ulong16 __ovld __cnfn add_sat(ulong16 x, ulong16 y); + +/** + * Returns (x + y) >> 1. The intermediate sum does + * not modulo overflow. + */ +char __ovld __cnfn hadd(char x, char y); +uchar __ovld __cnfn hadd(uchar x, uchar y); +char2 __ovld __cnfn hadd(char2 x, char2 y); +uchar2 __ovld __cnfn hadd(uchar2 x, uchar2 y); +char3 __ovld __cnfn hadd(char3 x, char3 y); +uchar3 __ovld __cnfn hadd(uchar3 x, uchar3 y); +char4 __ovld __cnfn hadd(char4 x, char4 y); +uchar4 __ovld __cnfn hadd(uchar4 x, uchar4 y); +char8 __ovld __cnfn hadd(char8 x, char8 y); +uchar8 __ovld __cnfn hadd(uchar8 x, uchar8 y); +char16 __ovld __cnfn hadd(char16 x, char16 y); +uchar16 __ovld __cnfn hadd(uchar16 x, uchar16 y); +short __ovld __cnfn hadd(short x, short y); +ushort __ovld __cnfn hadd(ushort x, ushort y); +short2 __ovld __cnfn hadd(short2 x, short2 y); +ushort2 __ovld __cnfn hadd(ushort2 x, ushort2 y); +short3 __ovld __cnfn hadd(short3 x, short3 y); +ushort3 __ovld __cnfn hadd(ushort3 x, ushort3 y); +short4 __ovld __cnfn hadd(short4 x, short4 y); +ushort4 __ovld __cnfn hadd(ushort4 x, ushort4 y); +short8 __ovld __cnfn hadd(short8 x, short8 y); +ushort8 __ovld __cnfn hadd(ushort8 x, ushort8 y); +short16 __ovld __cnfn hadd(short16 x, short16 y); +ushort16 __ovld __cnfn hadd(ushort16 x, ushort16 y); +int __ovld __cnfn hadd(int x, int y); +uint __ovld __cnfn hadd(uint x, uint y); +int2 __ovld __cnfn hadd(int2 x, int2 y); +uint2 __ovld __cnfn hadd(uint2 x, uint2 y); +int3 __ovld __cnfn hadd(int3 x, int3 y); +uint3 __ovld __cnfn hadd(uint3 x, uint3 y); +int4 __ovld __cnfn hadd(int4 x, int4 y); +uint4 __ovld __cnfn hadd(uint4 x, uint4 y); +int8 __ovld __cnfn hadd(int8 x, int8 y); +uint8 __ovld __cnfn hadd(uint8 x, uint8 y); +int16 __ovld __cnfn hadd(int16 x, int16 y); +uint16 __ovld __cnfn hadd(uint16 x, uint16 y); +long __ovld __cnfn hadd(long x, long y); +ulong __ovld __cnfn hadd(ulong x, ulong y); +long2 __ovld __cnfn hadd(long2 x, long2 y); +ulong2 __ovld __cnfn hadd(ulong2 x, ulong2 y); +long3 __ovld __cnfn hadd(long3 x, long3 y); +ulong3 __ovld __cnfn hadd(ulong3 x, ulong3 y); +long4 __ovld __cnfn hadd(long4 x, long4 y); +ulong4 __ovld __cnfn hadd(ulong4 x, ulong4 y); +long8 __ovld __cnfn hadd(long8 x, long8 y); +ulong8 __ovld __cnfn hadd(ulong8 x, ulong8 y); +long16 __ovld __cnfn hadd(long16 x, long16 y); +ulong16 __ovld __cnfn hadd(ulong16 x, ulong16 y); + +/** + * Returns (x + y + 1) >> 1. The intermediate sum + * does not modulo overflow. + */ +char __ovld __cnfn rhadd(char x, char y); +uchar __ovld __cnfn rhadd(uchar x, uchar y); +char2 __ovld __cnfn rhadd(char2 x, char2 y); +uchar2 __ovld __cnfn rhadd(uchar2 x, uchar2 y); +char3 __ovld __cnfn rhadd(char3 x, char3 y); +uchar3 __ovld __cnfn rhadd(uchar3 x, uchar3 y); +char4 __ovld __cnfn rhadd(char4 x, char4 y); +uchar4 __ovld __cnfn rhadd(uchar4 x, uchar4 y); +char8 __ovld __cnfn rhadd(char8 x, char8 y); +uchar8 __ovld __cnfn rhadd(uchar8 x, uchar8 y); +char16 __ovld __cnfn rhadd(char16 x, char16 y); +uchar16 __ovld __cnfn rhadd(uchar16 x, uchar16 y); +short __ovld __cnfn rhadd(short x, short y); +ushort __ovld __cnfn rhadd(ushort x, ushort y); +short2 __ovld __cnfn rhadd(short2 x, short2 y); +ushort2 __ovld __cnfn rhadd(ushort2 x, ushort2 y); +short3 __ovld __cnfn rhadd(short3 x, short3 y); +ushort3 __ovld __cnfn rhadd(ushort3 x, ushort3 y); +short4 __ovld __cnfn rhadd(short4 x, short4 y); +ushort4 __ovld __cnfn rhadd(ushort4 x, ushort4 y); +short8 __ovld __cnfn rhadd(short8 x, short8 y); +ushort8 __ovld __cnfn rhadd(ushort8 x, ushort8 y); +short16 __ovld __cnfn rhadd(short16 x, short16 y); +ushort16 __ovld __cnfn rhadd(ushort16 x, ushort16 y); +int __ovld __cnfn rhadd(int x, int y); +uint __ovld __cnfn rhadd(uint x, uint y); +int2 __ovld __cnfn rhadd(int2 x, int2 y); +uint2 __ovld __cnfn rhadd(uint2 x, uint2 y); +int3 __ovld __cnfn rhadd(int3 x, int3 y); +uint3 __ovld __cnfn rhadd(uint3 x, uint3 y); +int4 __ovld __cnfn rhadd(int4 x, int4 y); +uint4 __ovld __cnfn rhadd(uint4 x, uint4 y); +int8 __ovld __cnfn rhadd(int8 x, int8 y); +uint8 __ovld __cnfn rhadd(uint8 x, uint8 y); +int16 __ovld __cnfn rhadd(int16 x, int16 y); +uint16 __ovld __cnfn rhadd(uint16 x, uint16 y); +long __ovld __cnfn rhadd(long x, long y); +ulong __ovld __cnfn rhadd(ulong x, ulong y); +long2 __ovld __cnfn rhadd(long2 x, long2 y); +ulong2 __ovld __cnfn rhadd(ulong2 x, ulong2 y); +long3 __ovld __cnfn rhadd(long3 x, long3 y); +ulong3 __ovld __cnfn rhadd(ulong3 x, ulong3 y); +long4 __ovld __cnfn rhadd(long4 x, long4 y); +ulong4 __ovld __cnfn rhadd(ulong4 x, ulong4 y); +long8 __ovld __cnfn rhadd(long8 x, long8 y); +ulong8 __ovld __cnfn rhadd(ulong8 x, ulong8 y); +long16 __ovld __cnfn rhadd(long16 x, long16 y); +ulong16 __ovld __cnfn rhadd(ulong16 x, ulong16 y); + +/** + * Returns min(max(x, minval), maxval). + * Results are undefined if minval > maxval. + */ +char __ovld __cnfn clamp(char x, char minval, char maxval); +uchar __ovld __cnfn clamp(uchar x, uchar minval, uchar maxval); +char2 __ovld __cnfn clamp(char2 x, char2 minval, char2 maxval); +uchar2 __ovld __cnfn clamp(uchar2 x, uchar2 minval, uchar2 maxval); +char3 __ovld __cnfn clamp(char3 x, char3 minval, char3 maxval); +uchar3 __ovld __cnfn clamp(uchar3 x, uchar3 minval, uchar3 maxval); +char4 __ovld __cnfn clamp(char4 x, char4 minval, char4 maxval); +uchar4 __ovld __cnfn clamp(uchar4 x, uchar4 minval, uchar4 maxval); +char8 __ovld __cnfn clamp(char8 x, char8 minval, char8 maxval); +uchar8 __ovld __cnfn clamp(uchar8 x, uchar8 minval, uchar8 maxval); +char16 __ovld __cnfn clamp(char16 x, char16 minval, char16 maxval); +uchar16 __ovld __cnfn clamp(uchar16 x, uchar16 minval, uchar16 maxval); +short __ovld __cnfn clamp(short x, short minval, short maxval); +ushort __ovld __cnfn clamp(ushort x, ushort minval, ushort maxval); +short2 __ovld __cnfn clamp(short2 x, short2 minval, short2 maxval); +ushort2 __ovld __cnfn clamp(ushort2 x, ushort2 minval, ushort2 maxval); +short3 __ovld __cnfn clamp(short3 x, short3 minval, short3 maxval); +ushort3 __ovld __cnfn clamp(ushort3 x, ushort3 minval, ushort3 maxval); +short4 __ovld __cnfn clamp(short4 x, short4 minval, short4 maxval); +ushort4 __ovld __cnfn clamp(ushort4 x, ushort4 minval, ushort4 maxval); +short8 __ovld __cnfn clamp(short8 x, short8 minval, short8 maxval); +ushort8 __ovld __cnfn clamp(ushort8 x, ushort8 minval, ushort8 maxval); +short16 __ovld __cnfn clamp(short16 x, short16 minval, short16 maxval); +ushort16 __ovld __cnfn clamp(ushort16 x, ushort16 minval, ushort16 maxval); +int __ovld __cnfn clamp(int x, int minval, int maxval); +uint __ovld __cnfn clamp(uint x, uint minval, uint maxval); +int2 __ovld __cnfn clamp(int2 x, int2 minval, int2 maxval); +uint2 __ovld __cnfn clamp(uint2 x, uint2 minval, uint2 maxval); +int3 __ovld __cnfn clamp(int3 x, int3 minval, int3 maxval); +uint3 __ovld __cnfn clamp(uint3 x, uint3 minval, uint3 maxval); +int4 __ovld __cnfn clamp(int4 x, int4 minval, int4 maxval); +uint4 __ovld __cnfn clamp(uint4 x, uint4 minval, uint4 maxval); +int8 __ovld __cnfn clamp(int8 x, int8 minval, int8 maxval); +uint8 __ovld __cnfn clamp(uint8 x, uint8 minval, uint8 maxval); +int16 __ovld __cnfn clamp(int16 x, int16 minval, int16 maxval); +uint16 __ovld __cnfn clamp(uint16 x, uint16 minval, uint16 maxval); +long __ovld __cnfn clamp(long x, long minval, long maxval); +ulong __ovld __cnfn clamp(ulong x, ulong minval, ulong maxval); +long2 __ovld __cnfn clamp(long2 x, long2 minval, long2 maxval); +ulong2 __ovld __cnfn clamp(ulong2 x, ulong2 minval, ulong2 maxval); +long3 __ovld __cnfn clamp(long3 x, long3 minval, long3 maxval); +ulong3 __ovld __cnfn clamp(ulong3 x, ulong3 minval, ulong3 maxval); +long4 __ovld __cnfn clamp(long4 x, long4 minval, long4 maxval); +ulong4 __ovld __cnfn clamp(ulong4 x, ulong4 minval, ulong4 maxval); +long8 __ovld __cnfn clamp(long8 x, long8 minval, long8 maxval); +ulong8 __ovld __cnfn clamp(ulong8 x, ulong8 minval, ulong8 maxval); +long16 __ovld __cnfn clamp(long16 x, long16 minval, long16 maxval); +ulong16 __ovld __cnfn clamp(ulong16 x, ulong16 minval, ulong16 maxval); +char2 __ovld __cnfn clamp(char2 x, char minval, char maxval); +uchar2 __ovld __cnfn clamp(uchar2 x, uchar minval, uchar maxval); +char3 __ovld __cnfn clamp(char3 x, char minval, char maxval); +uchar3 __ovld __cnfn clamp(uchar3 x, uchar minval, uchar maxval); +char4 __ovld __cnfn clamp(char4 x, char minval, char maxval); +uchar4 __ovld __cnfn clamp(uchar4 x, uchar minval, uchar maxval); +char8 __ovld __cnfn clamp(char8 x, char minval, char maxval); +uchar8 __ovld __cnfn clamp(uchar8 x, uchar minval, uchar maxval); +char16 __ovld __cnfn clamp(char16 x, char minval, char maxval); +uchar16 __ovld __cnfn clamp(uchar16 x, uchar minval, uchar maxval); +short2 __ovld __cnfn clamp(short2 x, short minval, short maxval); +ushort2 __ovld __cnfn clamp(ushort2 x, ushort minval, ushort maxval); +short3 __ovld __cnfn clamp(short3 x, short minval, short maxval); +ushort3 __ovld __cnfn clamp(ushort3 x, ushort minval, ushort maxval); +short4 __ovld __cnfn clamp(short4 x, short minval, short maxval); +ushort4 __ovld __cnfn clamp(ushort4 x, ushort minval, ushort maxval); +short8 __ovld __cnfn clamp(short8 x, short minval, short maxval); +ushort8 __ovld __cnfn clamp(ushort8 x, ushort minval, ushort maxval); +short16 __ovld __cnfn clamp(short16 x, short minval, short maxval); +ushort16 __ovld __cnfn clamp(ushort16 x, ushort minval, ushort maxval); +int2 __ovld __cnfn clamp(int2 x, int minval, int maxval); +uint2 __ovld __cnfn clamp(uint2 x, uint minval, uint maxval); +int3 __ovld __cnfn clamp(int3 x, int minval, int maxval); +uint3 __ovld __cnfn clamp(uint3 x, uint minval, uint maxval); +int4 __ovld __cnfn clamp(int4 x, int minval, int maxval); +uint4 __ovld __cnfn clamp(uint4 x, uint minval, uint maxval); +int8 __ovld __cnfn clamp(int8 x, int minval, int maxval); +uint8 __ovld __cnfn clamp(uint8 x, uint minval, uint maxval); +int16 __ovld __cnfn clamp(int16 x, int minval, int maxval); +uint16 __ovld __cnfn clamp(uint16 x, uint minval, uint maxval); +long2 __ovld __cnfn clamp(long2 x, long minval, long maxval); +ulong2 __ovld __cnfn clamp(ulong2 x, ulong minval, ulong maxval); +long3 __ovld __cnfn clamp(long3 x, long minval, long maxval); +ulong3 __ovld __cnfn clamp(ulong3 x, ulong minval, ulong maxval); +long4 __ovld __cnfn clamp(long4 x, long minval, long maxval); +ulong4 __ovld __cnfn clamp(ulong4 x, ulong minval, ulong maxval); +long8 __ovld __cnfn clamp(long8 x, long minval, long maxval); +ulong8 __ovld __cnfn clamp(ulong8 x, ulong minval, ulong maxval); +long16 __ovld __cnfn clamp(long16 x, long minval, long maxval); +ulong16 __ovld __cnfn clamp(ulong16 x, ulong minval, ulong maxval); + +/** + * Returns the number of leading 0-bits in x, starting + * at the most significant bit position. + */ +char __ovld __cnfn clz(char x); +uchar __ovld __cnfn clz(uchar x); +char2 __ovld __cnfn clz(char2 x); +uchar2 __ovld __cnfn clz(uchar2 x); +char3 __ovld __cnfn clz(char3 x); +uchar3 __ovld __cnfn clz(uchar3 x); +char4 __ovld __cnfn clz(char4 x); +uchar4 __ovld __cnfn clz(uchar4 x); +char8 __ovld __cnfn clz(char8 x); +uchar8 __ovld __cnfn clz(uchar8 x); +char16 __ovld __cnfn clz(char16 x); +uchar16 __ovld __cnfn clz(uchar16 x); +short __ovld __cnfn clz(short x); +ushort __ovld __cnfn clz(ushort x); +short2 __ovld __cnfn clz(short2 x); +ushort2 __ovld __cnfn clz(ushort2 x); +short3 __ovld __cnfn clz(short3 x); +ushort3 __ovld __cnfn clz(ushort3 x); +short4 __ovld __cnfn clz(short4 x); +ushort4 __ovld __cnfn clz(ushort4 x); +short8 __ovld __cnfn clz(short8 x); +ushort8 __ovld __cnfn clz(ushort8 x); +short16 __ovld __cnfn clz(short16 x); +ushort16 __ovld __cnfn clz(ushort16 x); +int __ovld __cnfn clz(int x); +uint __ovld __cnfn clz(uint x); +int2 __ovld __cnfn clz(int2 x); +uint2 __ovld __cnfn clz(uint2 x); +int3 __ovld __cnfn clz(int3 x); +uint3 __ovld __cnfn clz(uint3 x); +int4 __ovld __cnfn clz(int4 x); +uint4 __ovld __cnfn clz(uint4 x); +int8 __ovld __cnfn clz(int8 x); +uint8 __ovld __cnfn clz(uint8 x); +int16 __ovld __cnfn clz(int16 x); +uint16 __ovld __cnfn clz(uint16 x); +long __ovld __cnfn clz(long x); +ulong __ovld __cnfn clz(ulong x); +long2 __ovld __cnfn clz(long2 x); +ulong2 __ovld __cnfn clz(ulong2 x); +long3 __ovld __cnfn clz(long3 x); +ulong3 __ovld __cnfn clz(ulong3 x); +long4 __ovld __cnfn clz(long4 x); +ulong4 __ovld __cnfn clz(ulong4 x); +long8 __ovld __cnfn clz(long8 x); +ulong8 __ovld __cnfn clz(ulong8 x); +long16 __ovld __cnfn clz(long16 x); +ulong16 __ovld __cnfn clz(ulong16 x); + +/** + * Returns the count of trailing 0-bits in x. If x is 0, + * returns the size in bits of the type of x or + * component type of x, if x is a vector. + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +char __ovld ctz(char x); +uchar __ovld ctz(uchar x); +char2 __ovld ctz(char2 x); +uchar2 __ovld ctz(uchar2 x); +char3 __ovld ctz(char3 x); +uchar3 __ovld ctz(uchar3 x); +char4 __ovld ctz(char4 x); +uchar4 __ovld ctz(uchar4 x); +char8 __ovld ctz(char8 x); +uchar8 __ovld ctz(uchar8 x); +char16 __ovld ctz(char16 x); +uchar16 __ovld ctz(uchar16 x); +short __ovld ctz(short x); +ushort __ovld ctz(ushort x); +short2 __ovld ctz(short2 x); +ushort2 __ovld ctz(ushort2 x); +short3 __ovld ctz(short3 x); +ushort3 __ovld ctz(ushort3 x); +short4 __ovld ctz(short4 x); +ushort4 __ovld ctz(ushort4 x); +short8 __ovld ctz(short8 x); +ushort8 __ovld ctz(ushort8 x); +short16 __ovld ctz(short16 x); +ushort16 __ovld ctz(ushort16 x); +int __ovld ctz(int x); +uint __ovld ctz(uint x); +int2 __ovld ctz(int2 x); +uint2 __ovld ctz(uint2 x); +int3 __ovld ctz(int3 x); +uint3 __ovld ctz(uint3 x); +int4 __ovld ctz(int4 x); +uint4 __ovld ctz(uint4 x); +int8 __ovld ctz(int8 x); +uint8 __ovld ctz(uint8 x); +int16 __ovld ctz(int16 x); +uint16 __ovld ctz(uint16 x); +long __ovld ctz(long x); +ulong __ovld ctz(ulong x); +long2 __ovld ctz(long2 x); +ulong2 __ovld ctz(ulong2 x); +long3 __ovld ctz(long3 x); +ulong3 __ovld ctz(ulong3 x); +long4 __ovld ctz(long4 x); +ulong4 __ovld ctz(ulong4 x); +long8 __ovld ctz(long8 x); +ulong8 __ovld ctz(ulong8 x); +long16 __ovld ctz(long16 x); +ulong16 __ovld ctz(ulong16 x); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Returns mul_hi(a, b) + c. + */ +char __ovld __cnfn mad_hi(char a, char b, char c); +uchar __ovld __cnfn mad_hi(uchar a, uchar b, uchar c); +char2 __ovld __cnfn mad_hi(char2 a, char2 b, char2 c); +uchar2 __ovld __cnfn mad_hi(uchar2 a, uchar2 b, uchar2 c); +char3 __ovld __cnfn mad_hi(char3 a, char3 b, char3 c); +uchar3 __ovld __cnfn mad_hi(uchar3 a, uchar3 b, uchar3 c); +char4 __ovld __cnfn mad_hi(char4 a, char4 b, char4 c); +uchar4 __ovld __cnfn mad_hi(uchar4 a, uchar4 b, uchar4 c); +char8 __ovld __cnfn mad_hi(char8 a, char8 b, char8 c); +uchar8 __ovld __cnfn mad_hi(uchar8 a, uchar8 b, uchar8 c); +char16 __ovld __cnfn mad_hi(char16 a, char16 b, char16 c); +uchar16 __ovld __cnfn mad_hi(uchar16 a, uchar16 b, uchar16 c); +short __ovld __cnfn mad_hi(short a, short b, short c); +ushort __ovld __cnfn mad_hi(ushort a, ushort b, ushort c); +short2 __ovld __cnfn mad_hi(short2 a, short2 b, short2 c); +ushort2 __ovld __cnfn mad_hi(ushort2 a, ushort2 b, ushort2 c); +short3 __ovld __cnfn mad_hi(short3 a, short3 b, short3 c); +ushort3 __ovld __cnfn mad_hi(ushort3 a, ushort3 b, ushort3 c); +short4 __ovld __cnfn mad_hi(short4 a, short4 b, short4 c); +ushort4 __ovld __cnfn mad_hi(ushort4 a, ushort4 b, ushort4 c); +short8 __ovld __cnfn mad_hi(short8 a, short8 b, short8 c); +ushort8 __ovld __cnfn mad_hi(ushort8 a, ushort8 b, ushort8 c); +short16 __ovld __cnfn mad_hi(short16 a, short16 b, short16 c); +ushort16 __ovld __cnfn mad_hi(ushort16 a, ushort16 b, ushort16 c); +int __ovld __cnfn mad_hi(int a, int b, int c); +uint __ovld __cnfn mad_hi(uint a, uint b, uint c); +int2 __ovld __cnfn mad_hi(int2 a, int2 b, int2 c); +uint2 __ovld __cnfn mad_hi(uint2 a, uint2 b, uint2 c); +int3 __ovld __cnfn mad_hi(int3 a, int3 b, int3 c); +uint3 __ovld __cnfn mad_hi(uint3 a, uint3 b, uint3 c); +int4 __ovld __cnfn mad_hi(int4 a, int4 b, int4 c); +uint4 __ovld __cnfn mad_hi(uint4 a, uint4 b, uint4 c); +int8 __ovld __cnfn mad_hi(int8 a, int8 b, int8 c); +uint8 __ovld __cnfn mad_hi(uint8 a, uint8 b, uint8 c); +int16 __ovld __cnfn mad_hi(int16 a, int16 b, int16 c); +uint16 __ovld __cnfn mad_hi(uint16 a, uint16 b, uint16 c); +long __ovld __cnfn mad_hi(long a, long b, long c); +ulong __ovld __cnfn mad_hi(ulong a, ulong b, ulong c); +long2 __ovld __cnfn mad_hi(long2 a, long2 b, long2 c); +ulong2 __ovld __cnfn mad_hi(ulong2 a, ulong2 b, ulong2 c); +long3 __ovld __cnfn mad_hi(long3 a, long3 b, long3 c); +ulong3 __ovld __cnfn mad_hi(ulong3 a, ulong3 b, ulong3 c); +long4 __ovld __cnfn mad_hi(long4 a, long4 b, long4 c); +ulong4 __ovld __cnfn mad_hi(ulong4 a, ulong4 b, ulong4 c); +long8 __ovld __cnfn mad_hi(long8 a, long8 b, long8 c); +ulong8 __ovld __cnfn mad_hi(ulong8 a, ulong8 b, ulong8 c); +long16 __ovld __cnfn mad_hi(long16 a, long16 b, long16 c); +ulong16 __ovld __cnfn mad_hi(ulong16 a, ulong16 b, ulong16 c); + +/** + * Returns a * b + c and saturates the result. + */ +char __ovld __cnfn mad_sat(char a, char b, char c); +uchar __ovld __cnfn mad_sat(uchar a, uchar b, uchar c); +char2 __ovld __cnfn mad_sat(char2 a, char2 b, char2 c); +uchar2 __ovld __cnfn mad_sat(uchar2 a, uchar2 b, uchar2 c); +char3 __ovld __cnfn mad_sat(char3 a, char3 b, char3 c); +uchar3 __ovld __cnfn mad_sat(uchar3 a, uchar3 b, uchar3 c); +char4 __ovld __cnfn mad_sat(char4 a, char4 b, char4 c); +uchar4 __ovld __cnfn mad_sat(uchar4 a, uchar4 b, uchar4 c); +char8 __ovld __cnfn mad_sat(char8 a, char8 b, char8 c); +uchar8 __ovld __cnfn mad_sat(uchar8 a, uchar8 b, uchar8 c); +char16 __ovld __cnfn mad_sat(char16 a, char16 b, char16 c); +uchar16 __ovld __cnfn mad_sat(uchar16 a, uchar16 b, uchar16 c); +short __ovld __cnfn mad_sat(short a, short b, short c); +ushort __ovld __cnfn mad_sat(ushort a, ushort b, ushort c); +short2 __ovld __cnfn mad_sat(short2 a, short2 b, short2 c); +ushort2 __ovld __cnfn mad_sat(ushort2 a, ushort2 b, ushort2 c); +short3 __ovld __cnfn mad_sat(short3 a, short3 b, short3 c); +ushort3 __ovld __cnfn mad_sat(ushort3 a, ushort3 b, ushort3 c); +short4 __ovld __cnfn mad_sat(short4 a, short4 b, short4 c); +ushort4 __ovld __cnfn mad_sat(ushort4 a, ushort4 b, ushort4 c); +short8 __ovld __cnfn mad_sat(short8 a, short8 b, short8 c); +ushort8 __ovld __cnfn mad_sat(ushort8 a, ushort8 b, ushort8 c); +short16 __ovld __cnfn mad_sat(short16 a, short16 b, short16 c); +ushort16 __ovld __cnfn mad_sat(ushort16 a, ushort16 b, ushort16 c); +int __ovld __cnfn mad_sat(int a, int b, int c); +uint __ovld __cnfn mad_sat(uint a, uint b, uint c); +int2 __ovld __cnfn mad_sat(int2 a, int2 b, int2 c); +uint2 __ovld __cnfn mad_sat(uint2 a, uint2 b, uint2 c); +int3 __ovld __cnfn mad_sat(int3 a, int3 b, int3 c); +uint3 __ovld __cnfn mad_sat(uint3 a, uint3 b, uint3 c); +int4 __ovld __cnfn mad_sat(int4 a, int4 b, int4 c); +uint4 __ovld __cnfn mad_sat(uint4 a, uint4 b, uint4 c); +int8 __ovld __cnfn mad_sat(int8 a, int8 b, int8 c); +uint8 __ovld __cnfn mad_sat(uint8 a, uint8 b, uint8 c); +int16 __ovld __cnfn mad_sat(int16 a, int16 b, int16 c); +uint16 __ovld __cnfn mad_sat(uint16 a, uint16 b, uint16 c); +long __ovld __cnfn mad_sat(long a, long b, long c); +ulong __ovld __cnfn mad_sat(ulong a, ulong b, ulong c); +long2 __ovld __cnfn mad_sat(long2 a, long2 b, long2 c); +ulong2 __ovld __cnfn mad_sat(ulong2 a, ulong2 b, ulong2 c); +long3 __ovld __cnfn mad_sat(long3 a, long3 b, long3 c); +ulong3 __ovld __cnfn mad_sat(ulong3 a, ulong3 b, ulong3 c); +long4 __ovld __cnfn mad_sat(long4 a, long4 b, long4 c); +ulong4 __ovld __cnfn mad_sat(ulong4 a, ulong4 b, ulong4 c); +long8 __ovld __cnfn mad_sat(long8 a, long8 b, long8 c); +ulong8 __ovld __cnfn mad_sat(ulong8 a, ulong8 b, ulong8 c); +long16 __ovld __cnfn mad_sat(long16 a, long16 b, long16 c); +ulong16 __ovld __cnfn mad_sat(ulong16 a, ulong16 b, ulong16 c); + +/** + * Returns y if x < y, otherwise it returns x. + */ +char __ovld __cnfn max(char x, char y); +uchar __ovld __cnfn max(uchar x, uchar y); +char2 __ovld __cnfn max(char2 x, char2 y); +uchar2 __ovld __cnfn max(uchar2 x, uchar2 y); +char3 __ovld __cnfn max(char3 x, char3 y); +uchar3 __ovld __cnfn max(uchar3 x, uchar3 y); +char4 __ovld __cnfn max(char4 x, char4 y); +uchar4 __ovld __cnfn max(uchar4 x, uchar4 y); +char8 __ovld __cnfn max(char8 x, char8 y); +uchar8 __ovld __cnfn max(uchar8 x, uchar8 y); +char16 __ovld __cnfn max(char16 x, char16 y); +uchar16 __ovld __cnfn max(uchar16 x, uchar16 y); +short __ovld __cnfn max(short x, short y); +ushort __ovld __cnfn max(ushort x, ushort y); +short2 __ovld __cnfn max(short2 x, short2 y); +ushort2 __ovld __cnfn max(ushort2 x, ushort2 y); +short3 __ovld __cnfn max(short3 x, short3 y); +ushort3 __ovld __cnfn max(ushort3 x, ushort3 y); +short4 __ovld __cnfn max(short4 x, short4 y); +ushort4 __ovld __cnfn max(ushort4 x, ushort4 y); +short8 __ovld __cnfn max(short8 x, short8 y); +ushort8 __ovld __cnfn max(ushort8 x, ushort8 y); +short16 __ovld __cnfn max(short16 x, short16 y); +ushort16 __ovld __cnfn max(ushort16 x, ushort16 y); +int __ovld __cnfn max(int x, int y); +uint __ovld __cnfn max(uint x, uint y); +int2 __ovld __cnfn max(int2 x, int2 y); +uint2 __ovld __cnfn max(uint2 x, uint2 y); +int3 __ovld __cnfn max(int3 x, int3 y); +uint3 __ovld __cnfn max(uint3 x, uint3 y); +int4 __ovld __cnfn max(int4 x, int4 y); +uint4 __ovld __cnfn max(uint4 x, uint4 y); +int8 __ovld __cnfn max(int8 x, int8 y); +uint8 __ovld __cnfn max(uint8 x, uint8 y); +int16 __ovld __cnfn max(int16 x, int16 y); +uint16 __ovld __cnfn max(uint16 x, uint16 y); +long __ovld __cnfn max(long x, long y); +ulong __ovld __cnfn max(ulong x, ulong y); +long2 __ovld __cnfn max(long2 x, long2 y); +ulong2 __ovld __cnfn max(ulong2 x, ulong2 y); +long3 __ovld __cnfn max(long3 x, long3 y); +ulong3 __ovld __cnfn max(ulong3 x, ulong3 y); +long4 __ovld __cnfn max(long4 x, long4 y); +ulong4 __ovld __cnfn max(ulong4 x, ulong4 y); +long8 __ovld __cnfn max(long8 x, long8 y); +ulong8 __ovld __cnfn max(ulong8 x, ulong8 y); +long16 __ovld __cnfn max(long16 x, long16 y); +ulong16 __ovld __cnfn max(ulong16 x, ulong16 y); +char2 __ovld __cnfn max(char2 x, char y); +uchar2 __ovld __cnfn max(uchar2 x, uchar y); +char3 __ovld __cnfn max(char3 x, char y); +uchar3 __ovld __cnfn max(uchar3 x, uchar y); +char4 __ovld __cnfn max(char4 x, char y); +uchar4 __ovld __cnfn max(uchar4 x, uchar y); +char8 __ovld __cnfn max(char8 x, char y); +uchar8 __ovld __cnfn max(uchar8 x, uchar y); +char16 __ovld __cnfn max(char16 x, char y); +uchar16 __ovld __cnfn max(uchar16 x, uchar y); +short2 __ovld __cnfn max(short2 x, short y); +ushort2 __ovld __cnfn max(ushort2 x, ushort y); +short3 __ovld __cnfn max(short3 x, short y); +ushort3 __ovld __cnfn max(ushort3 x, ushort y); +short4 __ovld __cnfn max(short4 x, short y); +ushort4 __ovld __cnfn max(ushort4 x, ushort y); +short8 __ovld __cnfn max(short8 x, short y); +ushort8 __ovld __cnfn max(ushort8 x, ushort y); +short16 __ovld __cnfn max(short16 x, short y); +ushort16 __ovld __cnfn max(ushort16 x, ushort y); +int2 __ovld __cnfn max(int2 x, int y); +uint2 __ovld __cnfn max(uint2 x, uint y); +int3 __ovld __cnfn max(int3 x, int y); +uint3 __ovld __cnfn max(uint3 x, uint y); +int4 __ovld __cnfn max(int4 x, int y); +uint4 __ovld __cnfn max(uint4 x, uint y); +int8 __ovld __cnfn max(int8 x, int y); +uint8 __ovld __cnfn max(uint8 x, uint y); +int16 __ovld __cnfn max(int16 x, int y); +uint16 __ovld __cnfn max(uint16 x, uint y); +long2 __ovld __cnfn max(long2 x, long y); +ulong2 __ovld __cnfn max(ulong2 x, ulong y); +long3 __ovld __cnfn max(long3 x, long y); +ulong3 __ovld __cnfn max(ulong3 x, ulong y); +long4 __ovld __cnfn max(long4 x, long y); +ulong4 __ovld __cnfn max(ulong4 x, ulong y); +long8 __ovld __cnfn max(long8 x, long y); +ulong8 __ovld __cnfn max(ulong8 x, ulong y); +long16 __ovld __cnfn max(long16 x, long y); +ulong16 __ovld __cnfn max(ulong16 x, ulong y); + +/** + * Returns y if y < x, otherwise it returns x. + */ +char __ovld __cnfn min(char x, char y); +uchar __ovld __cnfn min(uchar x, uchar y); +char2 __ovld __cnfn min(char2 x, char2 y); +uchar2 __ovld __cnfn min(uchar2 x, uchar2 y); +char3 __ovld __cnfn min(char3 x, char3 y); +uchar3 __ovld __cnfn min(uchar3 x, uchar3 y); +char4 __ovld __cnfn min(char4 x, char4 y); +uchar4 __ovld __cnfn min(uchar4 x, uchar4 y); +char8 __ovld __cnfn min(char8 x, char8 y); +uchar8 __ovld __cnfn min(uchar8 x, uchar8 y); +char16 __ovld __cnfn min(char16 x, char16 y); +uchar16 __ovld __cnfn min(uchar16 x, uchar16 y); +short __ovld __cnfn min(short x, short y); +ushort __ovld __cnfn min(ushort x, ushort y); +short2 __ovld __cnfn min(short2 x, short2 y); +ushort2 __ovld __cnfn min(ushort2 x, ushort2 y); +short3 __ovld __cnfn min(short3 x, short3 y); +ushort3 __ovld __cnfn min(ushort3 x, ushort3 y); +short4 __ovld __cnfn min(short4 x, short4 y); +ushort4 __ovld __cnfn min(ushort4 x, ushort4 y); +short8 __ovld __cnfn min(short8 x, short8 y); +ushort8 __ovld __cnfn min(ushort8 x, ushort8 y); +short16 __ovld __cnfn min(short16 x, short16 y); +ushort16 __ovld __cnfn min(ushort16 x, ushort16 y); +int __ovld __cnfn min(int x, int y); +uint __ovld __cnfn min(uint x, uint y); +int2 __ovld __cnfn min(int2 x, int2 y); +uint2 __ovld __cnfn min(uint2 x, uint2 y); +int3 __ovld __cnfn min(int3 x, int3 y); +uint3 __ovld __cnfn min(uint3 x, uint3 y); +int4 __ovld __cnfn min(int4 x, int4 y); +uint4 __ovld __cnfn min(uint4 x, uint4 y); +int8 __ovld __cnfn min(int8 x, int8 y); +uint8 __ovld __cnfn min(uint8 x, uint8 y); +int16 __ovld __cnfn min(int16 x, int16 y); +uint16 __ovld __cnfn min(uint16 x, uint16 y); +long __ovld __cnfn min(long x, long y); +ulong __ovld __cnfn min(ulong x, ulong y); +long2 __ovld __cnfn min(long2 x, long2 y); +ulong2 __ovld __cnfn min(ulong2 x, ulong2 y); +long3 __ovld __cnfn min(long3 x, long3 y); +ulong3 __ovld __cnfn min(ulong3 x, ulong3 y); +long4 __ovld __cnfn min(long4 x, long4 y); +ulong4 __ovld __cnfn min(ulong4 x, ulong4 y); +long8 __ovld __cnfn min(long8 x, long8 y); +ulong8 __ovld __cnfn min(ulong8 x, ulong8 y); +long16 __ovld __cnfn min(long16 x, long16 y); +ulong16 __ovld __cnfn min(ulong16 x, ulong16 y); +char2 __ovld __cnfn min(char2 x, char y); +uchar2 __ovld __cnfn min(uchar2 x, uchar y); +char3 __ovld __cnfn min(char3 x, char y); +uchar3 __ovld __cnfn min(uchar3 x, uchar y); +char4 __ovld __cnfn min(char4 x, char y); +uchar4 __ovld __cnfn min(uchar4 x, uchar y); +char8 __ovld __cnfn min(char8 x, char y); +uchar8 __ovld __cnfn min(uchar8 x, uchar y); +char16 __ovld __cnfn min(char16 x, char y); +uchar16 __ovld __cnfn min(uchar16 x, uchar y); +short2 __ovld __cnfn min(short2 x, short y); +ushort2 __ovld __cnfn min(ushort2 x, ushort y); +short3 __ovld __cnfn min(short3 x, short y); +ushort3 __ovld __cnfn min(ushort3 x, ushort y); +short4 __ovld __cnfn min(short4 x, short y); +ushort4 __ovld __cnfn min(ushort4 x, ushort y); +short8 __ovld __cnfn min(short8 x, short y); +ushort8 __ovld __cnfn min(ushort8 x, ushort y); +short16 __ovld __cnfn min(short16 x, short y); +ushort16 __ovld __cnfn min(ushort16 x, ushort y); +int2 __ovld __cnfn min(int2 x, int y); +uint2 __ovld __cnfn min(uint2 x, uint y); +int3 __ovld __cnfn min(int3 x, int y); +uint3 __ovld __cnfn min(uint3 x, uint y); +int4 __ovld __cnfn min(int4 x, int y); +uint4 __ovld __cnfn min(uint4 x, uint y); +int8 __ovld __cnfn min(int8 x, int y); +uint8 __ovld __cnfn min(uint8 x, uint y); +int16 __ovld __cnfn min(int16 x, int y); +uint16 __ovld __cnfn min(uint16 x, uint y); +long2 __ovld __cnfn min(long2 x, long y); +ulong2 __ovld __cnfn min(ulong2 x, ulong y); +long3 __ovld __cnfn min(long3 x, long y); +ulong3 __ovld __cnfn min(ulong3 x, ulong y); +long4 __ovld __cnfn min(long4 x, long y); +ulong4 __ovld __cnfn min(ulong4 x, ulong y); +long8 __ovld __cnfn min(long8 x, long y); +ulong8 __ovld __cnfn min(ulong8 x, ulong y); +long16 __ovld __cnfn min(long16 x, long y); +ulong16 __ovld __cnfn min(ulong16 x, ulong y); + +/** + * Computes x * y and returns the high half of the + * product of x and y. + */ +char __ovld __cnfn mul_hi(char x, char y); +uchar __ovld __cnfn mul_hi(uchar x, uchar y); +char2 __ovld __cnfn mul_hi(char2 x, char2 y); +uchar2 __ovld __cnfn mul_hi(uchar2 x, uchar2 y); +char3 __ovld __cnfn mul_hi(char3 x, char3 y); +uchar3 __ovld __cnfn mul_hi(uchar3 x, uchar3 y); +char4 __ovld __cnfn mul_hi(char4 x, char4 y); +uchar4 __ovld __cnfn mul_hi(uchar4 x, uchar4 y); +char8 __ovld __cnfn mul_hi(char8 x, char8 y); +uchar8 __ovld __cnfn mul_hi(uchar8 x, uchar8 y); +char16 __ovld __cnfn mul_hi(char16 x, char16 y); +uchar16 __ovld __cnfn mul_hi(uchar16 x, uchar16 y); +short __ovld __cnfn mul_hi(short x, short y); +ushort __ovld __cnfn mul_hi(ushort x, ushort y); +short2 __ovld __cnfn mul_hi(short2 x, short2 y); +ushort2 __ovld __cnfn mul_hi(ushort2 x, ushort2 y); +short3 __ovld __cnfn mul_hi(short3 x, short3 y); +ushort3 __ovld __cnfn mul_hi(ushort3 x, ushort3 y); +short4 __ovld __cnfn mul_hi(short4 x, short4 y); +ushort4 __ovld __cnfn mul_hi(ushort4 x, ushort4 y); +short8 __ovld __cnfn mul_hi(short8 x, short8 y); +ushort8 __ovld __cnfn mul_hi(ushort8 x, ushort8 y); +short16 __ovld __cnfn mul_hi(short16 x, short16 y); +ushort16 __ovld __cnfn mul_hi(ushort16 x, ushort16 y); +int __ovld __cnfn mul_hi(int x, int y); +uint __ovld __cnfn mul_hi(uint x, uint y); +int2 __ovld __cnfn mul_hi(int2 x, int2 y); +uint2 __ovld __cnfn mul_hi(uint2 x, uint2 y); +int3 __ovld __cnfn mul_hi(int3 x, int3 y); +uint3 __ovld __cnfn mul_hi(uint3 x, uint3 y); +int4 __ovld __cnfn mul_hi(int4 x, int4 y); +uint4 __ovld __cnfn mul_hi(uint4 x, uint4 y); +int8 __ovld __cnfn mul_hi(int8 x, int8 y); +uint8 __ovld __cnfn mul_hi(uint8 x, uint8 y); +int16 __ovld __cnfn mul_hi(int16 x, int16 y); +uint16 __ovld __cnfn mul_hi(uint16 x, uint16 y); +long __ovld __cnfn mul_hi(long x, long y); +ulong __ovld __cnfn mul_hi(ulong x, ulong y); +long2 __ovld __cnfn mul_hi(long2 x, long2 y); +ulong2 __ovld __cnfn mul_hi(ulong2 x, ulong2 y); +long3 __ovld __cnfn mul_hi(long3 x, long3 y); +ulong3 __ovld __cnfn mul_hi(ulong3 x, ulong3 y); +long4 __ovld __cnfn mul_hi(long4 x, long4 y); +ulong4 __ovld __cnfn mul_hi(ulong4 x, ulong4 y); +long8 __ovld __cnfn mul_hi(long8 x, long8 y); +ulong8 __ovld __cnfn mul_hi(ulong8 x, ulong8 y); +long16 __ovld __cnfn mul_hi(long16 x, long16 y); +ulong16 __ovld __cnfn mul_hi(ulong16 x, ulong16 y); + +/** + * For each element in v, the bits are shifted left by + * the number of bits given by the corresponding + * element in i (subject to usual shift modulo rules + * described in section 6.3). Bits shifted off the left + * side of the element are shifted back in from the + * right. + */ +char __ovld __cnfn rotate(char v, char i); +uchar __ovld __cnfn rotate(uchar v, uchar i); +char2 __ovld __cnfn rotate(char2 v, char2 i); +uchar2 __ovld __cnfn rotate(uchar2 v, uchar2 i); +char3 __ovld __cnfn rotate(char3 v, char3 i); +uchar3 __ovld __cnfn rotate(uchar3 v, uchar3 i); +char4 __ovld __cnfn rotate(char4 v, char4 i); +uchar4 __ovld __cnfn rotate(uchar4 v, uchar4 i); +char8 __ovld __cnfn rotate(char8 v, char8 i); +uchar8 __ovld __cnfn rotate(uchar8 v, uchar8 i); +char16 __ovld __cnfn rotate(char16 v, char16 i); +uchar16 __ovld __cnfn rotate(uchar16 v, uchar16 i); +short __ovld __cnfn rotate(short v, short i); +ushort __ovld __cnfn rotate(ushort v, ushort i); +short2 __ovld __cnfn rotate(short2 v, short2 i); +ushort2 __ovld __cnfn rotate(ushort2 v, ushort2 i); +short3 __ovld __cnfn rotate(short3 v, short3 i); +ushort3 __ovld __cnfn rotate(ushort3 v, ushort3 i); +short4 __ovld __cnfn rotate(short4 v, short4 i); +ushort4 __ovld __cnfn rotate(ushort4 v, ushort4 i); +short8 __ovld __cnfn rotate(short8 v, short8 i); +ushort8 __ovld __cnfn rotate(ushort8 v, ushort8 i); +short16 __ovld __cnfn rotate(short16 v, short16 i); +ushort16 __ovld __cnfn rotate(ushort16 v, ushort16 i); +int __ovld __cnfn rotate(int v, int i); +uint __ovld __cnfn rotate(uint v, uint i); +int2 __ovld __cnfn rotate(int2 v, int2 i); +uint2 __ovld __cnfn rotate(uint2 v, uint2 i); +int3 __ovld __cnfn rotate(int3 v, int3 i); +uint3 __ovld __cnfn rotate(uint3 v, uint3 i); +int4 __ovld __cnfn rotate(int4 v, int4 i); +uint4 __ovld __cnfn rotate(uint4 v, uint4 i); +int8 __ovld __cnfn rotate(int8 v, int8 i); +uint8 __ovld __cnfn rotate(uint8 v, uint8 i); +int16 __ovld __cnfn rotate(int16 v, int16 i); +uint16 __ovld __cnfn rotate(uint16 v, uint16 i); +long __ovld __cnfn rotate(long v, long i); +ulong __ovld __cnfn rotate(ulong v, ulong i); +long2 __ovld __cnfn rotate(long2 v, long2 i); +ulong2 __ovld __cnfn rotate(ulong2 v, ulong2 i); +long3 __ovld __cnfn rotate(long3 v, long3 i); +ulong3 __ovld __cnfn rotate(ulong3 v, ulong3 i); +long4 __ovld __cnfn rotate(long4 v, long4 i); +ulong4 __ovld __cnfn rotate(ulong4 v, ulong4 i); +long8 __ovld __cnfn rotate(long8 v, long8 i); +ulong8 __ovld __cnfn rotate(ulong8 v, ulong8 i); +long16 __ovld __cnfn rotate(long16 v, long16 i); +ulong16 __ovld __cnfn rotate(ulong16 v, ulong16 i); + +/** + * Returns x - y and saturates the result. + */ +char __ovld __cnfn sub_sat(char x, char y); +uchar __ovld __cnfn sub_sat(uchar x, uchar y); +char2 __ovld __cnfn sub_sat(char2 x, char2 y); +uchar2 __ovld __cnfn sub_sat(uchar2 x, uchar2 y); +char3 __ovld __cnfn sub_sat(char3 x, char3 y); +uchar3 __ovld __cnfn sub_sat(uchar3 x, uchar3 y); +char4 __ovld __cnfn sub_sat(char4 x, char4 y); +uchar4 __ovld __cnfn sub_sat(uchar4 x, uchar4 y); +char8 __ovld __cnfn sub_sat(char8 x, char8 y); +uchar8 __ovld __cnfn sub_sat(uchar8 x, uchar8 y); +char16 __ovld __cnfn sub_sat(char16 x, char16 y); +uchar16 __ovld __cnfn sub_sat(uchar16 x, uchar16 y); +short __ovld __cnfn sub_sat(short x, short y); +ushort __ovld __cnfn sub_sat(ushort x, ushort y); +short2 __ovld __cnfn sub_sat(short2 x, short2 y); +ushort2 __ovld __cnfn sub_sat(ushort2 x, ushort2 y); +short3 __ovld __cnfn sub_sat(short3 x, short3 y); +ushort3 __ovld __cnfn sub_sat(ushort3 x, ushort3 y); +short4 __ovld __cnfn sub_sat(short4 x, short4 y); +ushort4 __ovld __cnfn sub_sat(ushort4 x, ushort4 y); +short8 __ovld __cnfn sub_sat(short8 x, short8 y); +ushort8 __ovld __cnfn sub_sat(ushort8 x, ushort8 y); +short16 __ovld __cnfn sub_sat(short16 x, short16 y); +ushort16 __ovld __cnfn sub_sat(ushort16 x, ushort16 y); +int __ovld __cnfn sub_sat(int x, int y); +uint __ovld __cnfn sub_sat(uint x, uint y); +int2 __ovld __cnfn sub_sat(int2 x, int2 y); +uint2 __ovld __cnfn sub_sat(uint2 x, uint2 y); +int3 __ovld __cnfn sub_sat(int3 x, int3 y); +uint3 __ovld __cnfn sub_sat(uint3 x, uint3 y); +int4 __ovld __cnfn sub_sat(int4 x, int4 y); +uint4 __ovld __cnfn sub_sat(uint4 x, uint4 y); +int8 __ovld __cnfn sub_sat(int8 x, int8 y); +uint8 __ovld __cnfn sub_sat(uint8 x, uint8 y); +int16 __ovld __cnfn sub_sat(int16 x, int16 y); +uint16 __ovld __cnfn sub_sat(uint16 x, uint16 y); +long __ovld __cnfn sub_sat(long x, long y); +ulong __ovld __cnfn sub_sat(ulong x, ulong y); +long2 __ovld __cnfn sub_sat(long2 x, long2 y); +ulong2 __ovld __cnfn sub_sat(ulong2 x, ulong2 y); +long3 __ovld __cnfn sub_sat(long3 x, long3 y); +ulong3 __ovld __cnfn sub_sat(ulong3 x, ulong3 y); +long4 __ovld __cnfn sub_sat(long4 x, long4 y); +ulong4 __ovld __cnfn sub_sat(ulong4 x, ulong4 y); +long8 __ovld __cnfn sub_sat(long8 x, long8 y); +ulong8 __ovld __cnfn sub_sat(ulong8 x, ulong8 y); +long16 __ovld __cnfn sub_sat(long16 x, long16 y); +ulong16 __ovld __cnfn sub_sat(ulong16 x, ulong16 y); + +/** + * result[i] = ((short)hi[i] << 8) | lo[i] + * result[i] = ((ushort)hi[i] << 8) | lo[i] + */ +short __ovld __cnfn upsample(char hi, uchar lo); +ushort __ovld __cnfn upsample(uchar hi, uchar lo); +short2 __ovld __cnfn upsample(char2 hi, uchar2 lo); +short3 __ovld __cnfn upsample(char3 hi, uchar3 lo); +short4 __ovld __cnfn upsample(char4 hi, uchar4 lo); +short8 __ovld __cnfn upsample(char8 hi, uchar8 lo); +short16 __ovld __cnfn upsample(char16 hi, uchar16 lo); +ushort2 __ovld __cnfn upsample(uchar2 hi, uchar2 lo); +ushort3 __ovld __cnfn upsample(uchar3 hi, uchar3 lo); +ushort4 __ovld __cnfn upsample(uchar4 hi, uchar4 lo); +ushort8 __ovld __cnfn upsample(uchar8 hi, uchar8 lo); +ushort16 __ovld __cnfn upsample(uchar16 hi, uchar16 lo); + +/** + * result[i] = ((int)hi[i] << 16) | lo[i] + * result[i] = ((uint)hi[i] << 16) | lo[i] + */ +int __ovld __cnfn upsample(short hi, ushort lo); +uint __ovld __cnfn upsample(ushort hi, ushort lo); +int2 __ovld __cnfn upsample(short2 hi, ushort2 lo); +int3 __ovld __cnfn upsample(short3 hi, ushort3 lo); +int4 __ovld __cnfn upsample(short4 hi, ushort4 lo); +int8 __ovld __cnfn upsample(short8 hi, ushort8 lo); +int16 __ovld __cnfn upsample(short16 hi, ushort16 lo); +uint2 __ovld __cnfn upsample(ushort2 hi, ushort2 lo); +uint3 __ovld __cnfn upsample(ushort3 hi, ushort3 lo); +uint4 __ovld __cnfn upsample(ushort4 hi, ushort4 lo); +uint8 __ovld __cnfn upsample(ushort8 hi, ushort8 lo); +uint16 __ovld __cnfn upsample(ushort16 hi, ushort16 lo); +/** + * result[i] = ((long)hi[i] << 32) | lo[i] + * result[i] = ((ulong)hi[i] << 32) | lo[i] + */ +long __ovld __cnfn upsample(int hi, uint lo); +ulong __ovld __cnfn upsample(uint hi, uint lo); +long2 __ovld __cnfn upsample(int2 hi, uint2 lo); +long3 __ovld __cnfn upsample(int3 hi, uint3 lo); +long4 __ovld __cnfn upsample(int4 hi, uint4 lo); +long8 __ovld __cnfn upsample(int8 hi, uint8 lo); +long16 __ovld __cnfn upsample(int16 hi, uint16 lo); +ulong2 __ovld __cnfn upsample(uint2 hi, uint2 lo); +ulong3 __ovld __cnfn upsample(uint3 hi, uint3 lo); +ulong4 __ovld __cnfn upsample(uint4 hi, uint4 lo); +ulong8 __ovld __cnfn upsample(uint8 hi, uint8 lo); +ulong16 __ovld __cnfn upsample(uint16 hi, uint16 lo); + +/* + * popcount(x): returns the number of set bit in x + */ +char __ovld __cnfn popcount(char x); +uchar __ovld __cnfn popcount(uchar x); +char2 __ovld __cnfn popcount(char2 x); +uchar2 __ovld __cnfn popcount(uchar2 x); +char3 __ovld __cnfn popcount(char3 x); +uchar3 __ovld __cnfn popcount(uchar3 x); +char4 __ovld __cnfn popcount(char4 x); +uchar4 __ovld __cnfn popcount(uchar4 x); +char8 __ovld __cnfn popcount(char8 x); +uchar8 __ovld __cnfn popcount(uchar8 x); +char16 __ovld __cnfn popcount(char16 x); +uchar16 __ovld __cnfn popcount(uchar16 x); +short __ovld __cnfn popcount(short x); +ushort __ovld __cnfn popcount(ushort x); +short2 __ovld __cnfn popcount(short2 x); +ushort2 __ovld __cnfn popcount(ushort2 x); +short3 __ovld __cnfn popcount(short3 x); +ushort3 __ovld __cnfn popcount(ushort3 x); +short4 __ovld __cnfn popcount(short4 x); +ushort4 __ovld __cnfn popcount(ushort4 x); +short8 __ovld __cnfn popcount(short8 x); +ushort8 __ovld __cnfn popcount(ushort8 x); +short16 __ovld __cnfn popcount(short16 x); +ushort16 __ovld __cnfn popcount(ushort16 x); +int __ovld __cnfn popcount(int x); +uint __ovld __cnfn popcount(uint x); +int2 __ovld __cnfn popcount(int2 x); +uint2 __ovld __cnfn popcount(uint2 x); +int3 __ovld __cnfn popcount(int3 x); +uint3 __ovld __cnfn popcount(uint3 x); +int4 __ovld __cnfn popcount(int4 x); +uint4 __ovld __cnfn popcount(uint4 x); +int8 __ovld __cnfn popcount(int8 x); +uint8 __ovld __cnfn popcount(uint8 x); +int16 __ovld __cnfn popcount(int16 x); +uint16 __ovld __cnfn popcount(uint16 x); +long __ovld __cnfn popcount(long x); +ulong __ovld __cnfn popcount(ulong x); +long2 __ovld __cnfn popcount(long2 x); +ulong2 __ovld __cnfn popcount(ulong2 x); +long3 __ovld __cnfn popcount(long3 x); +ulong3 __ovld __cnfn popcount(ulong3 x); +long4 __ovld __cnfn popcount(long4 x); +ulong4 __ovld __cnfn popcount(ulong4 x); +long8 __ovld __cnfn popcount(long8 x); +ulong8 __ovld __cnfn popcount(ulong8 x); +long16 __ovld __cnfn popcount(long16 x); +ulong16 __ovld __cnfn popcount(ulong16 x); + +/** + * Multiply two 24-bit integer values x and y and add + * the 32-bit integer result to the 32-bit integer z. + * Refer to definition of mul24 to see how the 24-bit + * integer multiplication is performed. + */ +int __ovld __cnfn mad24(int x, int y, int z); +uint __ovld __cnfn mad24(uint x, uint y, uint z); +int2 __ovld __cnfn mad24(int2 x, int2 y, int2 z); +uint2 __ovld __cnfn mad24(uint2 x, uint2 y, uint2 z); +int3 __ovld __cnfn mad24(int3 x, int3 y, int3 z); +uint3 __ovld __cnfn mad24(uint3 x, uint3 y, uint3 z); +int4 __ovld __cnfn mad24(int4 x, int4 y, int4 z); +uint4 __ovld __cnfn mad24(uint4 x, uint4 y, uint4 z); +int8 __ovld __cnfn mad24(int8 x, int8 y, int8 z); +uint8 __ovld __cnfn mad24(uint8 x, uint8 y, uint8 z); +int16 __ovld __cnfn mad24(int16 x, int16 y, int16 z); +uint16 __ovld __cnfn mad24(uint16 x, uint16 y, uint16 z); + +/** + * Multiply two 24-bit integer values x and y. x and y + * are 32-bit integers but only the low 24-bits are used + * to perform the multiplication. mul24 should only + * be used when values in x and y are in the range [- + * 2^23, 2^23-1] if x and y are signed integers and in the + * range [0, 2^24-1] if x and y are unsigned integers. If + * x and y are not in this range, the multiplication + * result is implementation-defined. + */ +int __ovld __cnfn mul24(int x, int y); +uint __ovld __cnfn mul24(uint x, uint y); +int2 __ovld __cnfn mul24(int2 x, int2 y); +uint2 __ovld __cnfn mul24(uint2 x, uint2 y); +int3 __ovld __cnfn mul24(int3 x, int3 y); +uint3 __ovld __cnfn mul24(uint3 x, uint3 y); +int4 __ovld __cnfn mul24(int4 x, int4 y); +uint4 __ovld __cnfn mul24(uint4 x, uint4 y); +int8 __ovld __cnfn mul24(int8 x, int8 y); +uint8 __ovld __cnfn mul24(uint8 x, uint8 y); +int16 __ovld __cnfn mul24(int16 x, int16 y); +uint16 __ovld __cnfn mul24(uint16 x, uint16 y); + +// OpenCL v1.1 s6.11.4, v1.2 s6.12.4, v2.0 s6.13.4 - Common Functions + +/** + * Returns fmin(fmax(x, minval), maxval). + * Results are undefined if minval > maxval. + */ +float __ovld __cnfn clamp(float x, float minval, float maxval); +float2 __ovld __cnfn clamp(float2 x, float2 minval, float2 maxval); +float3 __ovld __cnfn clamp(float3 x, float3 minval, float3 maxval); +float4 __ovld __cnfn clamp(float4 x, float4 minval, float4 maxval); +float8 __ovld __cnfn clamp(float8 x, float8 minval, float8 maxval); +float16 __ovld __cnfn clamp(float16 x, float16 minval, float16 maxval); +float2 __ovld __cnfn clamp(float2 x, float minval, float maxval); +float3 __ovld __cnfn clamp(float3 x, float minval, float maxval); +float4 __ovld __cnfn clamp(float4 x, float minval, float maxval); +float8 __ovld __cnfn clamp(float8 x, float minval, float maxval); +float16 __ovld __cnfn clamp(float16 x, float minval, float maxval); +#ifdef cl_khr_fp64 +double __ovld __cnfn clamp(double x, double minval, double maxval); +double2 __ovld __cnfn clamp(double2 x, double2 minval, double2 maxval); +double3 __ovld __cnfn clamp(double3 x, double3 minval, double3 maxval); +double4 __ovld __cnfn clamp(double4 x, double4 minval, double4 maxval); +double8 __ovld __cnfn clamp(double8 x, double8 minval, double8 maxval); +double16 __ovld __cnfn clamp(double16 x, double16 minval, double16 maxval); +double2 __ovld __cnfn clamp(double2 x, double minval, double maxval); +double3 __ovld __cnfn clamp(double3 x, double minval, double maxval); +double4 __ovld __cnfn clamp(double4 x, double minval, double maxval); +double8 __ovld __cnfn clamp(double8 x, double minval, double maxval); +double16 __ovld __cnfn clamp(double16 x, double minval, double maxval); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn clamp(half x, half minval, half maxval); +half2 __ovld __cnfn clamp(half2 x, half2 minval, half2 maxval); +half3 __ovld __cnfn clamp(half3 x, half3 minval, half3 maxval); +half4 __ovld __cnfn clamp(half4 x, half4 minval, half4 maxval); +half8 __ovld __cnfn clamp(half8 x, half8 minval, half8 maxval); +half16 __ovld __cnfn clamp(half16 x, half16 minval, half16 maxval); +half2 __ovld __cnfn clamp(half2 x, half minval, half maxval); +half3 __ovld __cnfn clamp(half3 x, half minval, half maxval); +half4 __ovld __cnfn clamp(half4 x, half minval, half maxval); +half8 __ovld __cnfn clamp(half8 x, half minval, half maxval); +half16 __ovld __cnfn clamp(half16 x, half minval, half maxval); +#endif //cl_khr_fp16 + +/** + * Converts radians to degrees, i.e. (180 / PI) * + * radians. + */ +float __ovld __cnfn degrees(float radians); +float2 __ovld __cnfn degrees(float2 radians); +float3 __ovld __cnfn degrees(float3 radians); +float4 __ovld __cnfn degrees(float4 radians); +float8 __ovld __cnfn degrees(float8 radians); +float16 __ovld __cnfn degrees(float16 radians); +#ifdef cl_khr_fp64 +double __ovld __cnfn degrees(double radians); +double2 __ovld __cnfn degrees(double2 radians); +double3 __ovld __cnfn degrees(double3 radians); +double4 __ovld __cnfn degrees(double4 radians); +double8 __ovld __cnfn degrees(double8 radians); +double16 __ovld __cnfn degrees(double16 radians); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn degrees(half radians); +half2 __ovld __cnfn degrees(half2 radians); +half3 __ovld __cnfn degrees(half3 radians); +half4 __ovld __cnfn degrees(half4 radians); +half8 __ovld __cnfn degrees(half8 radians); +half16 __ovld __cnfn degrees(half16 radians); +#endif //cl_khr_fp16 + +/** + * Returns y if x < y, otherwise it returns x. If x and y + * are infinite or NaN, the return values are undefined. + */ +float __ovld __cnfn max(float x, float y); +float2 __ovld __cnfn max(float2 x, float2 y); +float3 __ovld __cnfn max(float3 x, float3 y); +float4 __ovld __cnfn max(float4 x, float4 y); +float8 __ovld __cnfn max(float8 x, float8 y); +float16 __ovld __cnfn max(float16 x, float16 y); +float2 __ovld __cnfn max(float2 x, float y); +float3 __ovld __cnfn max(float3 x, float y); +float4 __ovld __cnfn max(float4 x, float y); +float8 __ovld __cnfn max(float8 x, float y); +float16 __ovld __cnfn max(float16 x, float y); +#ifdef cl_khr_fp64 +double __ovld __cnfn max(double x, double y); +double2 __ovld __cnfn max(double2 x, double2 y); +double3 __ovld __cnfn max(double3 x, double3 y); +double4 __ovld __cnfn max(double4 x, double4 y); +double8 __ovld __cnfn max(double8 x, double8 y); +double16 __ovld __cnfn max(double16 x, double16 y); +double2 __ovld __cnfn max(double2 x, double y); +double3 __ovld __cnfn max(double3 x, double y); +double4 __ovld __cnfn max(double4 x, double y); +double8 __ovld __cnfn max(double8 x, double y); +double16 __ovld __cnfn max(double16 x, double y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn max(half x, half y); +half2 __ovld __cnfn max(half2 x, half2 y); +half3 __ovld __cnfn max(half3 x, half3 y); +half4 __ovld __cnfn max(half4 x, half4 y); +half8 __ovld __cnfn max(half8 x, half8 y); +half16 __ovld __cnfn max(half16 x, half16 y); +half2 __ovld __cnfn max(half2 x, half y); +half3 __ovld __cnfn max(half3 x, half y); +half4 __ovld __cnfn max(half4 x, half y); +half8 __ovld __cnfn max(half8 x, half y); +half16 __ovld __cnfn max(half16 x, half y); +#endif //cl_khr_fp16 + +/** + * Returns y if y < x, otherwise it returns x. If x and y + * are infinite or NaN, the return values are undefined. + */ +float __ovld __cnfn min(float x, float y); +float2 __ovld __cnfn min(float2 x, float2 y); +float3 __ovld __cnfn min(float3 x, float3 y); +float4 __ovld __cnfn min(float4 x, float4 y); +float8 __ovld __cnfn min(float8 x, float8 y); +float16 __ovld __cnfn min(float16 x, float16 y); +float2 __ovld __cnfn min(float2 x, float y); +float3 __ovld __cnfn min(float3 x, float y); +float4 __ovld __cnfn min(float4 x, float y); +float8 __ovld __cnfn min(float8 x, float y); +float16 __ovld __cnfn min(float16 x, float y); +#ifdef cl_khr_fp64 +double __ovld __cnfn min(double x, double y); +double2 __ovld __cnfn min(double2 x, double2 y); +double3 __ovld __cnfn min(double3 x, double3 y); +double4 __ovld __cnfn min(double4 x, double4 y); +double8 __ovld __cnfn min(double8 x, double8 y); +double16 __ovld __cnfn min(double16 x, double16 y); +double2 __ovld __cnfn min(double2 x, double y); +double3 __ovld __cnfn min(double3 x, double y); +double4 __ovld __cnfn min(double4 x, double y); +double8 __ovld __cnfn min(double8 x, double y); +double16 __ovld __cnfn min(double16 x, double y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn min(half x, half y); +half2 __ovld __cnfn min(half2 x, half2 y); +half3 __ovld __cnfn min(half3 x, half3 y); +half4 __ovld __cnfn min(half4 x, half4 y); +half8 __ovld __cnfn min(half8 x, half8 y); +half16 __ovld __cnfn min(half16 x, half16 y); +half2 __ovld __cnfn min(half2 x, half y); +half3 __ovld __cnfn min(half3 x, half y); +half4 __ovld __cnfn min(half4 x, half y); +half8 __ovld __cnfn min(half8 x, half y); +half16 __ovld __cnfn min(half16 x, half y); +#endif //cl_khr_fp16 + +/** + * Returns the linear blend of x & y implemented as: + * x + (y - x) * a + * a must be a value in the range 0.0 ... 1.0. If a is not + * in the range 0.0 ... 1.0, the return values are + * undefined. + */ +float __ovld __cnfn mix(float x, float y, float a); +float2 __ovld __cnfn mix(float2 x, float2 y, float2 a); +float3 __ovld __cnfn mix(float3 x, float3 y, float3 a); +float4 __ovld __cnfn mix(float4 x, float4 y, float4 a); +float8 __ovld __cnfn mix(float8 x, float8 y, float8 a); +float16 __ovld __cnfn mix(float16 x, float16 y, float16 a); +float2 __ovld __cnfn mix(float2 x, float2 y, float a); +float3 __ovld __cnfn mix(float3 x, float3 y, float a); +float4 __ovld __cnfn mix(float4 x, float4 y, float a); +float8 __ovld __cnfn mix(float8 x, float8 y, float a); +float16 __ovld __cnfn mix(float16 x, float16 y, float a); +#ifdef cl_khr_fp64 +double __ovld __cnfn mix(double x, double y, double a); +double2 __ovld __cnfn mix(double2 x, double2 y, double2 a); +double3 __ovld __cnfn mix(double3 x, double3 y, double3 a); +double4 __ovld __cnfn mix(double4 x, double4 y, double4 a); +double8 __ovld __cnfn mix(double8 x, double8 y, double8 a); +double16 __ovld __cnfn mix(double16 x, double16 y, double16 a); +double2 __ovld __cnfn mix(double2 x, double2 y, double a); +double3 __ovld __cnfn mix(double3 x, double3 y, double a); +double4 __ovld __cnfn mix(double4 x, double4 y, double a); +double8 __ovld __cnfn mix(double8 x, double8 y, double a); +double16 __ovld __cnfn mix(double16 x, double16 y, double a); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn mix(half x, half y, half a); +half2 __ovld __cnfn mix(half2 x, half2 y, half2 a); +half3 __ovld __cnfn mix(half3 x, half3 y, half3 a); +half4 __ovld __cnfn mix(half4 x, half4 y, half4 a); +half8 __ovld __cnfn mix(half8 x, half8 y, half8 a); +half16 __ovld __cnfn mix(half16 x, half16 y, half16 a); +half2 __ovld __cnfn mix(half2 x, half2 y, half a); +half3 __ovld __cnfn mix(half3 x, half3 y, half a); +half4 __ovld __cnfn mix(half4 x, half4 y, half a); +half8 __ovld __cnfn mix(half8 x, half8 y, half a); +half16 __ovld __cnfn mix(half16 x, half16 y, half a); +#endif //cl_khr_fp16 + +/** + * Converts degrees to radians, i.e. (PI / 180) * + * degrees. + */ +float __ovld __cnfn radians(float degrees); +float2 __ovld __cnfn radians(float2 degrees); +float3 __ovld __cnfn radians(float3 degrees); +float4 __ovld __cnfn radians(float4 degrees); +float8 __ovld __cnfn radians(float8 degrees); +float16 __ovld __cnfn radians(float16 degrees); +#ifdef cl_khr_fp64 +double __ovld __cnfn radians(double degrees); +double2 __ovld __cnfn radians(double2 degrees); +double3 __ovld __cnfn radians(double3 degrees); +double4 __ovld __cnfn radians(double4 degrees); +double8 __ovld __cnfn radians(double8 degrees); +double16 __ovld __cnfn radians(double16 degrees); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn radians(half degrees); +half2 __ovld __cnfn radians(half2 degrees); +half3 __ovld __cnfn radians(half3 degrees); +half4 __ovld __cnfn radians(half4 degrees); +half8 __ovld __cnfn radians(half8 degrees); +half16 __ovld __cnfn radians(half16 degrees); +#endif //cl_khr_fp16 + +/** + * Returns 0.0 if x < edge, otherwise it returns 1.0. + */ +float __ovld __cnfn step(float edge, float x); +float2 __ovld __cnfn step(float2 edge, float2 x); +float3 __ovld __cnfn step(float3 edge, float3 x); +float4 __ovld __cnfn step(float4 edge, float4 x); +float8 __ovld __cnfn step(float8 edge, float8 x); +float16 __ovld __cnfn step(float16 edge, float16 x); +float2 __ovld __cnfn step(float edge, float2 x); +float3 __ovld __cnfn step(float edge, float3 x); +float4 __ovld __cnfn step(float edge, float4 x); +float8 __ovld __cnfn step(float edge, float8 x); +float16 __ovld __cnfn step(float edge, float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn step(double edge, double x); +double2 __ovld __cnfn step(double2 edge, double2 x); +double3 __ovld __cnfn step(double3 edge, double3 x); +double4 __ovld __cnfn step(double4 edge, double4 x); +double8 __ovld __cnfn step(double8 edge, double8 x); +double16 __ovld __cnfn step(double16 edge, double16 x); +double2 __ovld __cnfn step(double edge, double2 x); +double3 __ovld __cnfn step(double edge, double3 x); +double4 __ovld __cnfn step(double edge, double4 x); +double8 __ovld __cnfn step(double edge, double8 x); +double16 __ovld __cnfn step(double edge, double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn step(half edge, half x); +half2 __ovld __cnfn step(half2 edge, half2 x); +half3 __ovld __cnfn step(half3 edge, half3 x); +half4 __ovld __cnfn step(half4 edge, half4 x); +half8 __ovld __cnfn step(half8 edge, half8 x); +half16 __ovld __cnfn step(half16 edge, half16 x); +half2 __ovld __cnfn step(half edge, half2 x); +half3 __ovld __cnfn step(half edge, half3 x); +half4 __ovld __cnfn step(half edge, half4 x); +half8 __ovld __cnfn step(half edge, half8 x); +half16 __ovld __cnfn step(half edge, half16 x); +#endif //cl_khr_fp16 + +/** + * Returns 0.0 if x <= edge0 and 1.0 if x >= edge1 and + * performs smooth Hermite interpolation between 0 + * and 1when edge0 < x < edge1. This is useful in + * cases where you would want a threshold function + * with a smooth transition. + * This is equivalent to: + * gentype t; + * t = clamp ((x - edge0) / (edge1 - edge0), 0, 1); + * return t * t * (3 - 2 * t); + * Results are undefined if edge0 >= edge1 or if x, + * edge0 or edge1 is a NaN. + */ +float __ovld __cnfn smoothstep(float edge0, float edge1, float x); +float2 __ovld __cnfn smoothstep(float2 edge0, float2 edge1, float2 x); +float3 __ovld __cnfn smoothstep(float3 edge0, float3 edge1, float3 x); +float4 __ovld __cnfn smoothstep(float4 edge0, float4 edge1, float4 x); +float8 __ovld __cnfn smoothstep(float8 edge0, float8 edge1, float8 x); +float16 __ovld __cnfn smoothstep(float16 edge0, float16 edge1, float16 x); +float2 __ovld __cnfn smoothstep(float edge0, float edge1, float2 x); +float3 __ovld __cnfn smoothstep(float edge0, float edge1, float3 x); +float4 __ovld __cnfn smoothstep(float edge0, float edge1, float4 x); +float8 __ovld __cnfn smoothstep(float edge0, float edge1, float8 x); +float16 __ovld __cnfn smoothstep(float edge0, float edge1, float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn smoothstep(double edge0, double edge1, double x); +double2 __ovld __cnfn smoothstep(double2 edge0, double2 edge1, double2 x); +double3 __ovld __cnfn smoothstep(double3 edge0, double3 edge1, double3 x); +double4 __ovld __cnfn smoothstep(double4 edge0, double4 edge1, double4 x); +double8 __ovld __cnfn smoothstep(double8 edge0, double8 edge1, double8 x); +double16 __ovld __cnfn smoothstep(double16 edge0, double16 edge1, double16 x); +double2 __ovld __cnfn smoothstep(double edge0, double edge1, double2 x); +double3 __ovld __cnfn smoothstep(double edge0, double edge1, double3 x); +double4 __ovld __cnfn smoothstep(double edge0, double edge1, double4 x); +double8 __ovld __cnfn smoothstep(double edge0, double edge1, double8 x); +double16 __ovld __cnfn smoothstep(double edge0, double edge1, double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn smoothstep(half edge0, half edge1, half x); +half2 __ovld __cnfn smoothstep(half2 edge0, half2 edge1, half2 x); +half3 __ovld __cnfn smoothstep(half3 edge0, half3 edge1, half3 x); +half4 __ovld __cnfn smoothstep(half4 edge0, half4 edge1, half4 x); +half8 __ovld __cnfn smoothstep(half8 edge0, half8 edge1, half8 x); +half16 __ovld __cnfn smoothstep(half16 edge0, half16 edge1, half16 x); +half2 __ovld __cnfn smoothstep(half edge0, half edge1, half2 x); +half3 __ovld __cnfn smoothstep(half edge0, half edge1, half3 x); +half4 __ovld __cnfn smoothstep(half edge0, half edge1, half4 x); +half8 __ovld __cnfn smoothstep(half edge0, half edge1, half8 x); +half16 __ovld __cnfn smoothstep(half edge0, half edge1, half16 x); +#endif //cl_khr_fp16 + +/** + * Returns 1.0 if x > 0, -0.0 if x = -0.0, +0.0 if x = + * +0.0, or -1.0 if x < 0. Returns 0.0 if x is a NaN. + */ +float __ovld __cnfn sign(float x); +float2 __ovld __cnfn sign(float2 x); +float3 __ovld __cnfn sign(float3 x); +float4 __ovld __cnfn sign(float4 x); +float8 __ovld __cnfn sign(float8 x); +float16 __ovld __cnfn sign(float16 x); +#ifdef cl_khr_fp64 +double __ovld __cnfn sign(double x); +double2 __ovld __cnfn sign(double2 x); +double3 __ovld __cnfn sign(double3 x); +double4 __ovld __cnfn sign(double4 x); +double8 __ovld __cnfn sign(double8 x); +double16 __ovld __cnfn sign(double16 x); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn sign(half x); +half2 __ovld __cnfn sign(half2 x); +half3 __ovld __cnfn sign(half3 x); +half4 __ovld __cnfn sign(half4 x); +half8 __ovld __cnfn sign(half8 x); +half16 __ovld __cnfn sign(half16 x); +#endif //cl_khr_fp16 + +// OpenCL v1.1 s6.11.5, v1.2 s6.12.5, v2.0 s6.13.5 - Geometric Functions + +/** + * Returns the cross product of p0.xyz and p1.xyz. The + * w component of float4 result returned will be 0.0. + */ +float4 __ovld __cnfn cross(float4 p0, float4 p1); +float3 __ovld __cnfn cross(float3 p0, float3 p1); +#ifdef cl_khr_fp64 +double4 __ovld __cnfn cross(double4 p0, double4 p1); +double3 __ovld __cnfn cross(double3 p0, double3 p1); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half4 __ovld __cnfn cross(half4 p0, half4 p1); +half3 __ovld __cnfn cross(half3 p0, half3 p1); +#endif //cl_khr_fp16 + +/** + * Compute dot product. + */ +float __ovld __cnfn dot(float p0, float p1); +float __ovld __cnfn dot(float2 p0, float2 p1); +float __ovld __cnfn dot(float3 p0, float3 p1); +float __ovld __cnfn dot(float4 p0, float4 p1); +#ifdef cl_khr_fp64 +double __ovld __cnfn dot(double p0, double p1); +double __ovld __cnfn dot(double2 p0, double2 p1); +double __ovld __cnfn dot(double3 p0, double3 p1); +double __ovld __cnfn dot(double4 p0, double4 p1); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn dot(half p0, half p1); +half __ovld __cnfn dot(half2 p0, half2 p1); +half __ovld __cnfn dot(half3 p0, half3 p1); +half __ovld __cnfn dot(half4 p0, half4 p1); +#endif //cl_khr_fp16 + +/** + * Returns the distance between p0 and p1. This is + * calculated as length(p0 - p1). + */ +float __ovld __cnfn distance(float p0, float p1); +float __ovld __cnfn distance(float2 p0, float2 p1); +float __ovld __cnfn distance(float3 p0, float3 p1); +float __ovld __cnfn distance(float4 p0, float4 p1); +#ifdef cl_khr_fp64 +double __ovld __cnfn distance(double p0, double p1); +double __ovld __cnfn distance(double2 p0, double2 p1); +double __ovld __cnfn distance(double3 p0, double3 p1); +double __ovld __cnfn distance(double4 p0, double4 p1); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn distance(half p0, half p1); +half __ovld __cnfn distance(half2 p0, half2 p1); +half __ovld __cnfn distance(half3 p0, half3 p1); +half __ovld __cnfn distance(half4 p0, half4 p1); +#endif //cl_khr_fp16 + +/** + * Return the length of vector p, i.e., + * sqrt(p.x2 + p.y 2 + ...) + */ +float __ovld __cnfn length(float p); +float __ovld __cnfn length(float2 p); +float __ovld __cnfn length(float3 p); +float __ovld __cnfn length(float4 p); +#ifdef cl_khr_fp64 +double __ovld __cnfn length(double p); +double __ovld __cnfn length(double2 p); +double __ovld __cnfn length(double3 p); +double __ovld __cnfn length(double4 p); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn length(half p); +half __ovld __cnfn length(half2 p); +half __ovld __cnfn length(half3 p); +half __ovld __cnfn length(half4 p); +#endif //cl_khr_fp16 + +/** + * Returns a vector in the same direction as p but with a + * length of 1. + */ +float __ovld __cnfn normalize(float p); +float2 __ovld __cnfn normalize(float2 p); +float3 __ovld __cnfn normalize(float3 p); +float4 __ovld __cnfn normalize(float4 p); +#ifdef cl_khr_fp64 +double __ovld __cnfn normalize(double p); +double2 __ovld __cnfn normalize(double2 p); +double3 __ovld __cnfn normalize(double3 p); +double4 __ovld __cnfn normalize(double4 p); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn normalize(half p); +half2 __ovld __cnfn normalize(half2 p); +half3 __ovld __cnfn normalize(half3 p); +half4 __ovld __cnfn normalize(half4 p); +#endif //cl_khr_fp16 + +/** + * Returns fast_length(p0 - p1). + */ +float __ovld __cnfn fast_distance(float p0, float p1); +float __ovld __cnfn fast_distance(float2 p0, float2 p1); +float __ovld __cnfn fast_distance(float3 p0, float3 p1); +float __ovld __cnfn fast_distance(float4 p0, float4 p1); +#ifdef cl_khr_fp16 +half __ovld __cnfn fast_distance(half p0, half p1); +half __ovld __cnfn fast_distance(half2 p0, half2 p1); +half __ovld __cnfn fast_distance(half3 p0, half3 p1); +half __ovld __cnfn fast_distance(half4 p0, half4 p1); +#endif //cl_khr_fp16 + +/** + * Returns the length of vector p computed as: + * half_sqrt(p.x2 + p.y2 + ...) + */ +float __ovld __cnfn fast_length(float p); +float __ovld __cnfn fast_length(float2 p); +float __ovld __cnfn fast_length(float3 p); +float __ovld __cnfn fast_length(float4 p); +#ifdef cl_khr_fp16 +half __ovld __cnfn fast_length(half p); +half __ovld __cnfn fast_length(half2 p); +half __ovld __cnfn fast_length(half3 p); +half __ovld __cnfn fast_length(half4 p); +#endif //cl_khr_fp16 + +/** + * Returns a vector in the same direction as p but with a + * length of 1. fast_normalize is computed as: + * p * half_rsqrt (p.x^2 + p.y^2 + ... ) + * The result shall be within 8192 ulps error from the + * infinitely precise result of + * if (all(p == 0.0f)) + * result = p; + * else + * result = p / sqrt (p.x^2 + p.y^2 + ...); + * with the following exceptions: + * 1) If the sum of squares is greater than FLT_MAX + * then the value of the floating-point values in the + * result vector are undefined. + * 2) If the sum of squares is less than FLT_MIN then + * the implementation may return back p. + * 3) If the device is in "denorms are flushed to zero" + * mode, individual operand elements with magnitude + * less than sqrt(FLT_MIN) may be flushed to zero + * before proceeding with the calculation. + */ +float __ovld __cnfn fast_normalize(float p); +float2 __ovld __cnfn fast_normalize(float2 p); +float3 __ovld __cnfn fast_normalize(float3 p); +float4 __ovld __cnfn fast_normalize(float4 p); +#ifdef cl_khr_fp16 +half __ovld __cnfn fast_normalize(half p); +half2 __ovld __cnfn fast_normalize(half2 p); +half3 __ovld __cnfn fast_normalize(half3 p); +half4 __ovld __cnfn fast_normalize(half4 p); +#endif //cl_khr_fp16 + +// OpenCL v1.1 s6.11.6, v1.2 s6.12.6, v2.0 s6.13.6 - Relational Functions + +/** + * intn isequal (floatn x, floatn y) + * Returns the component-wise compare of x == y. + */ +int __ovld __cnfn isequal(float x, float y); +int2 __ovld __cnfn isequal(float2 x, float2 y); +int3 __ovld __cnfn isequal(float3 x, float3 y); +int4 __ovld __cnfn isequal(float4 x, float4 y); +int8 __ovld __cnfn isequal(float8 x, float8 y); +int16 __ovld __cnfn isequal(float16 x, float16 y); +#ifdef cl_khr_fp64 +int __ovld __cnfn isequal(double x, double y); +long2 __ovld __cnfn isequal(double2 x, double2 y); +long3 __ovld __cnfn isequal(double3 x, double3 y); +long4 __ovld __cnfn isequal(double4 x, double4 y); +long8 __ovld __cnfn isequal(double8 x, double8 y); +long16 __ovld __cnfn isequal(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isequal(half x, half y); +short2 __ovld __cnfn isequal(half2 x, half2 y); +short3 __ovld __cnfn isequal(half3 x, half3 y); +short4 __ovld __cnfn isequal(half4 x, half4 y); +short8 __ovld __cnfn isequal(half8 x, half8 y); +short16 __ovld __cnfn isequal(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of x != y. + */ +int __ovld __cnfn isnotequal(float x, float y); +int2 __ovld __cnfn isnotequal(float2 x, float2 y); +int3 __ovld __cnfn isnotequal(float3 x, float3 y); +int4 __ovld __cnfn isnotequal(float4 x, float4 y); +int8 __ovld __cnfn isnotequal(float8 x, float8 y); +int16 __ovld __cnfn isnotequal(float16 x, float16 y); +#ifdef cl_khr_fp64 +int __ovld __cnfn isnotequal(double x, double y); +long2 __ovld __cnfn isnotequal(double2 x, double2 y); +long3 __ovld __cnfn isnotequal(double3 x, double3 y); +long4 __ovld __cnfn isnotequal(double4 x, double4 y); +long8 __ovld __cnfn isnotequal(double8 x, double8 y); +long16 __ovld __cnfn isnotequal(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isnotequal(half x, half y); +short2 __ovld __cnfn isnotequal(half2 x, half2 y); +short3 __ovld __cnfn isnotequal(half3 x, half3 y); +short4 __ovld __cnfn isnotequal(half4 x, half4 y); +short8 __ovld __cnfn isnotequal(half8 x, half8 y); +short16 __ovld __cnfn isnotequal(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of x > y. + */ +int __ovld __cnfn isgreater(float x, float y); +int2 __ovld __cnfn isgreater(float2 x, float2 y); +int3 __ovld __cnfn isgreater(float3 x, float3 y); +int4 __ovld __cnfn isgreater(float4 x, float4 y); +int8 __ovld __cnfn isgreater(float8 x, float8 y); +int16 __ovld __cnfn isgreater(float16 x, float16 y); +#ifdef cl_khr_fp64 +int __ovld __cnfn isgreater(double x, double y); +long2 __ovld __cnfn isgreater(double2 x, double2 y); +long3 __ovld __cnfn isgreater(double3 x, double3 y); +long4 __ovld __cnfn isgreater(double4 x, double4 y); +long8 __ovld __cnfn isgreater(double8 x, double8 y); +long16 __ovld __cnfn isgreater(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isgreater(half x, half y); +short2 __ovld __cnfn isgreater(half2 x, half2 y); +short3 __ovld __cnfn isgreater(half3 x, half3 y); +short4 __ovld __cnfn isgreater(half4 x, half4 y); +short8 __ovld __cnfn isgreater(half8 x, half8 y); +short16 __ovld __cnfn isgreater(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of x >= y. + */ +int __ovld __cnfn isgreaterequal(float x, float y); +int2 __ovld __cnfn isgreaterequal(float2 x, float2 y); +int3 __ovld __cnfn isgreaterequal(float3 x, float3 y); +int4 __ovld __cnfn isgreaterequal(float4 x, float4 y); +int8 __ovld __cnfn isgreaterequal(float8 x, float8 y); +int16 __ovld __cnfn isgreaterequal(float16 x, float16 y); +#ifdef cl_khr_fp64 +int __ovld __cnfn isgreaterequal(double x, double y); +long2 __ovld __cnfn isgreaterequal(double2 x, double2 y); +long3 __ovld __cnfn isgreaterequal(double3 x, double3 y); +long4 __ovld __cnfn isgreaterequal(double4 x, double4 y); +long8 __ovld __cnfn isgreaterequal(double8 x, double8 y); +long16 __ovld __cnfn isgreaterequal(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isgreaterequal(half x, half y); +short2 __ovld __cnfn isgreaterequal(half2 x, half2 y); +short3 __ovld __cnfn isgreaterequal(half3 x, half3 y); +short4 __ovld __cnfn isgreaterequal(half4 x, half4 y); +short8 __ovld __cnfn isgreaterequal(half8 x, half8 y); +short16 __ovld __cnfn isgreaterequal(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of x < y. + */ +int __ovld __cnfn isless(float x, float y); +int2 __ovld __cnfn isless(float2 x, float2 y); +int3 __ovld __cnfn isless(float3 x, float3 y); +int4 __ovld __cnfn isless(float4 x, float4 y); +int8 __ovld __cnfn isless(float8 x, float8 y); +int16 __ovld __cnfn isless(float16 x, float16 y); +#ifdef cl_khr_fp64 +int __ovld __cnfn isless(double x, double y); +long2 __ovld __cnfn isless(double2 x, double2 y); +long3 __ovld __cnfn isless(double3 x, double3 y); +long4 __ovld __cnfn isless(double4 x, double4 y); +long8 __ovld __cnfn isless(double8 x, double8 y); +long16 __ovld __cnfn isless(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isless(half x, half y); +short2 __ovld __cnfn isless(half2 x, half2 y); +short3 __ovld __cnfn isless(half3 x, half3 y); +short4 __ovld __cnfn isless(half4 x, half4 y); +short8 __ovld __cnfn isless(half8 x, half8 y); +short16 __ovld __cnfn isless(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of x <= y. + */ +int __ovld __cnfn islessequal(float x, float y); +int2 __ovld __cnfn islessequal(float2 x, float2 y); +int3 __ovld __cnfn islessequal(float3 x, float3 y); +int4 __ovld __cnfn islessequal(float4 x, float4 y); +int8 __ovld __cnfn islessequal(float8 x, float8 y); +int16 __ovld __cnfn islessequal(float16 x, float16 y); +#ifdef cl_khr_fp64 +int __ovld __cnfn islessequal(double x, double y); +long2 __ovld __cnfn islessequal(double2 x, double2 y); +long3 __ovld __cnfn islessequal(double3 x, double3 y); +long4 __ovld __cnfn islessequal(double4 x, double4 y); +long8 __ovld __cnfn islessequal(double8 x, double8 y); +long16 __ovld __cnfn islessequal(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn islessequal(half x, half y); +short2 __ovld __cnfn islessequal(half2 x, half2 y); +short3 __ovld __cnfn islessequal(half3 x, half3 y); +short4 __ovld __cnfn islessequal(half4 x, half4 y); +short8 __ovld __cnfn islessequal(half8 x, half8 y); +short16 __ovld __cnfn islessequal(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Returns the component-wise compare of + * (x < y) || (x > y) . + */ +int __ovld __cnfn islessgreater(float x, float y); +int2 __ovld __cnfn islessgreater(float2 x, float2 y); +int3 __ovld __cnfn islessgreater(float3 x, float3 y); +int4 __ovld __cnfn islessgreater(float4 x, float4 y); +int8 __ovld __cnfn islessgreater(float8 x, float8 y); +int16 __ovld __cnfn islessgreater(float16 x, float16 y); +#ifdef cl_khr_fp64 +int __ovld __cnfn islessgreater(double x, double y); +long2 __ovld __cnfn islessgreater(double2 x, double2 y); +long3 __ovld __cnfn islessgreater(double3 x, double3 y); +long4 __ovld __cnfn islessgreater(double4 x, double4 y); +long8 __ovld __cnfn islessgreater(double8 x, double8 y); +long16 __ovld __cnfn islessgreater(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn islessgreater(half x, half y); +short2 __ovld __cnfn islessgreater(half2 x, half2 y); +short3 __ovld __cnfn islessgreater(half3 x, half3 y); +short4 __ovld __cnfn islessgreater(half4 x, half4 y); +short8 __ovld __cnfn islessgreater(half8 x, half8 y); +short16 __ovld __cnfn islessgreater(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Test for finite value. + */ +int __ovld __cnfn isfinite(float); +int2 __ovld __cnfn isfinite(float2); +int3 __ovld __cnfn isfinite(float3); +int4 __ovld __cnfn isfinite(float4); +int8 __ovld __cnfn isfinite(float8); +int16 __ovld __cnfn isfinite(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isfinite(double); +long2 __ovld __cnfn isfinite(double2); +long3 __ovld __cnfn isfinite(double3); +long4 __ovld __cnfn isfinite(double4); +long8 __ovld __cnfn isfinite(double8); +long16 __ovld __cnfn isfinite(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isfinite(half); +short2 __ovld __cnfn isfinite(half2); +short3 __ovld __cnfn isfinite(half3); +short4 __ovld __cnfn isfinite(half4); +short8 __ovld __cnfn isfinite(half8); +short16 __ovld __cnfn isfinite(half16); +#endif //cl_khr_fp16 + +/** + * Test for infinity value (+ve or -ve) . + */ +int __ovld __cnfn isinf(float); +int2 __ovld __cnfn isinf(float2); +int3 __ovld __cnfn isinf(float3); +int4 __ovld __cnfn isinf(float4); +int8 __ovld __cnfn isinf(float8); +int16 __ovld __cnfn isinf(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isinf(double); +long2 __ovld __cnfn isinf(double2); +long3 __ovld __cnfn isinf(double3); +long4 __ovld __cnfn isinf(double4); +long8 __ovld __cnfn isinf(double8); +long16 __ovld __cnfn isinf(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isinf(half); +short2 __ovld __cnfn isinf(half2); +short3 __ovld __cnfn isinf(half3); +short4 __ovld __cnfn isinf(half4); +short8 __ovld __cnfn isinf(half8); +short16 __ovld __cnfn isinf(half16); +#endif //cl_khr_fp16 + +/** + * Test for a NaN. + */ +int __ovld __cnfn isnan(float); +int2 __ovld __cnfn isnan(float2); +int3 __ovld __cnfn isnan(float3); +int4 __ovld __cnfn isnan(float4); +int8 __ovld __cnfn isnan(float8); +int16 __ovld __cnfn isnan(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isnan(double); +long2 __ovld __cnfn isnan(double2); +long3 __ovld __cnfn isnan(double3); +long4 __ovld __cnfn isnan(double4); +long8 __ovld __cnfn isnan(double8); +long16 __ovld __cnfn isnan(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isnan(half); +short2 __ovld __cnfn isnan(half2); +short3 __ovld __cnfn isnan(half3); +short4 __ovld __cnfn isnan(half4); +short8 __ovld __cnfn isnan(half8); +short16 __ovld __cnfn isnan(half16); +#endif //cl_khr_fp16 + +/** + * Test for a normal value. + */ +int __ovld __cnfn isnormal(float); +int2 __ovld __cnfn isnormal(float2); +int3 __ovld __cnfn isnormal(float3); +int4 __ovld __cnfn isnormal(float4); +int8 __ovld __cnfn isnormal(float8); +int16 __ovld __cnfn isnormal(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn isnormal(double); +long2 __ovld __cnfn isnormal(double2); +long3 __ovld __cnfn isnormal(double3); +long4 __ovld __cnfn isnormal(double4); +long8 __ovld __cnfn isnormal(double8); +long16 __ovld __cnfn isnormal(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isnormal(half); +short2 __ovld __cnfn isnormal(half2); +short3 __ovld __cnfn isnormal(half3); +short4 __ovld __cnfn isnormal(half4); +short8 __ovld __cnfn isnormal(half8); +short16 __ovld __cnfn isnormal(half16); +#endif //cl_khr_fp16 + +/** + * Test if arguments are ordered. isordered() takes + * arguments x and y, and returns the result + * isequal(x, x) && isequal(y, y). + */ +int __ovld __cnfn isordered(float x, float y); +int2 __ovld __cnfn isordered(float2 x, float2 y); +int3 __ovld __cnfn isordered(float3 x, float3 y); +int4 __ovld __cnfn isordered(float4 x, float4 y); +int8 __ovld __cnfn isordered(float8 x, float8 y); +int16 __ovld __cnfn isordered(float16 x, float16 y); +#ifdef cl_khr_fp64 +int __ovld __cnfn isordered(double x, double y); +long2 __ovld __cnfn isordered(double2 x, double2 y); +long3 __ovld __cnfn isordered(double3 x, double3 y); +long4 __ovld __cnfn isordered(double4 x, double4 y); +long8 __ovld __cnfn isordered(double8 x, double8 y); +long16 __ovld __cnfn isordered(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isordered(half x, half y); +short2 __ovld __cnfn isordered(half2 x, half2 y); +short3 __ovld __cnfn isordered(half3 x, half3 y); +short4 __ovld __cnfn isordered(half4 x, half4 y); +short8 __ovld __cnfn isordered(half8 x, half8 y); +short16 __ovld __cnfn isordered(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Test if arguments are unordered. isunordered() + * takes arguments x and y, returning non-zero if x or y + * is NaN, and zero otherwise. + */ +int __ovld __cnfn isunordered(float x, float y); +int2 __ovld __cnfn isunordered(float2 x, float2 y); +int3 __ovld __cnfn isunordered(float3 x, float3 y); +int4 __ovld __cnfn isunordered(float4 x, float4 y); +int8 __ovld __cnfn isunordered(float8 x, float8 y); +int16 __ovld __cnfn isunordered(float16 x, float16 y); +#ifdef cl_khr_fp64 +int __ovld __cnfn isunordered(double x, double y); +long2 __ovld __cnfn isunordered(double2 x, double2 y); +long3 __ovld __cnfn isunordered(double3 x, double3 y); +long4 __ovld __cnfn isunordered(double4 x, double4 y); +long8 __ovld __cnfn isunordered(double8 x, double8 y); +long16 __ovld __cnfn isunordered(double16 x, double16 y); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn isunordered(half x, half y); +short2 __ovld __cnfn isunordered(half2 x, half2 y); +short3 __ovld __cnfn isunordered(half3 x, half3 y); +short4 __ovld __cnfn isunordered(half4 x, half4 y); +short8 __ovld __cnfn isunordered(half8 x, half8 y); +short16 __ovld __cnfn isunordered(half16 x, half16 y); +#endif //cl_khr_fp16 + +/** + * Test for sign bit. The scalar version of the function + * returns a 1 if the sign bit in the float is set else returns + * 0. The vector version of the function returns the + * following for each component in floatn: a -1 if the + * sign bit in the float is set else returns 0. + */ +int __ovld __cnfn signbit(float); +int2 __ovld __cnfn signbit(float2); +int3 __ovld __cnfn signbit(float3); +int4 __ovld __cnfn signbit(float4); +int8 __ovld __cnfn signbit(float8); +int16 __ovld __cnfn signbit(float16); +#ifdef cl_khr_fp64 +int __ovld __cnfn signbit(double); +long2 __ovld __cnfn signbit(double2); +long3 __ovld __cnfn signbit(double3); +long4 __ovld __cnfn signbit(double4); +long8 __ovld __cnfn signbit(double8); +long16 __ovld __cnfn signbit(double16); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +int __ovld __cnfn signbit(half); +short2 __ovld __cnfn signbit(half2); +short3 __ovld __cnfn signbit(half3); +short4 __ovld __cnfn signbit(half4); +short8 __ovld __cnfn signbit(half8); +short16 __ovld __cnfn signbit(half16); +#endif //cl_khr_fp16 + +/** + * Returns 1 if the most significant bit in any component + * of x is set; otherwise returns 0. + */ +int __ovld __cnfn any(char x); +int __ovld __cnfn any(char2 x); +int __ovld __cnfn any(char3 x); +int __ovld __cnfn any(char4 x); +int __ovld __cnfn any(char8 x); +int __ovld __cnfn any(char16 x); +int __ovld __cnfn any(short x); +int __ovld __cnfn any(short2 x); +int __ovld __cnfn any(short3 x); +int __ovld __cnfn any(short4 x); +int __ovld __cnfn any(short8 x); +int __ovld __cnfn any(short16 x); +int __ovld __cnfn any(int x); +int __ovld __cnfn any(int2 x); +int __ovld __cnfn any(int3 x); +int __ovld __cnfn any(int4 x); +int __ovld __cnfn any(int8 x); +int __ovld __cnfn any(int16 x); +int __ovld __cnfn any(long x); +int __ovld __cnfn any(long2 x); +int __ovld __cnfn any(long3 x); +int __ovld __cnfn any(long4 x); +int __ovld __cnfn any(long8 x); +int __ovld __cnfn any(long16 x); + +/** + * Returns 1 if the most significant bit in all components + * of x is set; otherwise returns 0. + */ +int __ovld __cnfn all(char x); +int __ovld __cnfn all(char2 x); +int __ovld __cnfn all(char3 x); +int __ovld __cnfn all(char4 x); +int __ovld __cnfn all(char8 x); +int __ovld __cnfn all(char16 x); +int __ovld __cnfn all(short x); +int __ovld __cnfn all(short2 x); +int __ovld __cnfn all(short3 x); +int __ovld __cnfn all(short4 x); +int __ovld __cnfn all(short8 x); +int __ovld __cnfn all(short16 x); +int __ovld __cnfn all(int x); +int __ovld __cnfn all(int2 x); +int __ovld __cnfn all(int3 x); +int __ovld __cnfn all(int4 x); +int __ovld __cnfn all(int8 x); +int __ovld __cnfn all(int16 x); +int __ovld __cnfn all(long x); +int __ovld __cnfn all(long2 x); +int __ovld __cnfn all(long3 x); +int __ovld __cnfn all(long4 x); +int __ovld __cnfn all(long8 x); +int __ovld __cnfn all(long16 x); + +/** + * Each bit of the result is the corresponding bit of a if + * the corresponding bit of c is 0. Otherwise it is the + * corresponding bit of b. + */ +char __ovld __cnfn bitselect(char a, char b, char c); +uchar __ovld __cnfn bitselect(uchar a, uchar b, uchar c); +char2 __ovld __cnfn bitselect(char2 a, char2 b, char2 c); +uchar2 __ovld __cnfn bitselect(uchar2 a, uchar2 b, uchar2 c); +char3 __ovld __cnfn bitselect(char3 a, char3 b, char3 c); +uchar3 __ovld __cnfn bitselect(uchar3 a, uchar3 b, uchar3 c); +char4 __ovld __cnfn bitselect(char4 a, char4 b, char4 c); +uchar4 __ovld __cnfn bitselect(uchar4 a, uchar4 b, uchar4 c); +char8 __ovld __cnfn bitselect(char8 a, char8 b, char8 c); +uchar8 __ovld __cnfn bitselect(uchar8 a, uchar8 b, uchar8 c); +char16 __ovld __cnfn bitselect(char16 a, char16 b, char16 c); +uchar16 __ovld __cnfn bitselect(uchar16 a, uchar16 b, uchar16 c); +short __ovld __cnfn bitselect(short a, short b, short c); +ushort __ovld __cnfn bitselect(ushort a, ushort b, ushort c); +short2 __ovld __cnfn bitselect(short2 a, short2 b, short2 c); +ushort2 __ovld __cnfn bitselect(ushort2 a, ushort2 b, ushort2 c); +short3 __ovld __cnfn bitselect(short3 a, short3 b, short3 c); +ushort3 __ovld __cnfn bitselect(ushort3 a, ushort3 b, ushort3 c); +short4 __ovld __cnfn bitselect(short4 a, short4 b, short4 c); +ushort4 __ovld __cnfn bitselect(ushort4 a, ushort4 b, ushort4 c); +short8 __ovld __cnfn bitselect(short8 a, short8 b, short8 c); +ushort8 __ovld __cnfn bitselect(ushort8 a, ushort8 b, ushort8 c); +short16 __ovld __cnfn bitselect(short16 a, short16 b, short16 c); +ushort16 __ovld __cnfn bitselect(ushort16 a, ushort16 b, ushort16 c); +int __ovld __cnfn bitselect(int a, int b, int c); +uint __ovld __cnfn bitselect(uint a, uint b, uint c); +int2 __ovld __cnfn bitselect(int2 a, int2 b, int2 c); +uint2 __ovld __cnfn bitselect(uint2 a, uint2 b, uint2 c); +int3 __ovld __cnfn bitselect(int3 a, int3 b, int3 c); +uint3 __ovld __cnfn bitselect(uint3 a, uint3 b, uint3 c); +int4 __ovld __cnfn bitselect(int4 a, int4 b, int4 c); +uint4 __ovld __cnfn bitselect(uint4 a, uint4 b, uint4 c); +int8 __ovld __cnfn bitselect(int8 a, int8 b, int8 c); +uint8 __ovld __cnfn bitselect(uint8 a, uint8 b, uint8 c); +int16 __ovld __cnfn bitselect(int16 a, int16 b, int16 c); +uint16 __ovld __cnfn bitselect(uint16 a, uint16 b, uint16 c); +long __ovld __cnfn bitselect(long a, long b, long c); +ulong __ovld __cnfn bitselect(ulong a, ulong b, ulong c); +long2 __ovld __cnfn bitselect(long2 a, long2 b, long2 c); +ulong2 __ovld __cnfn bitselect(ulong2 a, ulong2 b, ulong2 c); +long3 __ovld __cnfn bitselect(long3 a, long3 b, long3 c); +ulong3 __ovld __cnfn bitselect(ulong3 a, ulong3 b, ulong3 c); +long4 __ovld __cnfn bitselect(long4 a, long4 b, long4 c); +ulong4 __ovld __cnfn bitselect(ulong4 a, ulong4 b, ulong4 c); +long8 __ovld __cnfn bitselect(long8 a, long8 b, long8 c); +ulong8 __ovld __cnfn bitselect(ulong8 a, ulong8 b, ulong8 c); +long16 __ovld __cnfn bitselect(long16 a, long16 b, long16 c); +ulong16 __ovld __cnfn bitselect(ulong16 a, ulong16 b, ulong16 c); +float __ovld __cnfn bitselect(float a, float b, float c); +float2 __ovld __cnfn bitselect(float2 a, float2 b, float2 c); +float3 __ovld __cnfn bitselect(float3 a, float3 b, float3 c); +float4 __ovld __cnfn bitselect(float4 a, float4 b, float4 c); +float8 __ovld __cnfn bitselect(float8 a, float8 b, float8 c); +float16 __ovld __cnfn bitselect(float16 a, float16 b, float16 c); +#ifdef cl_khr_fp64 +double __ovld __cnfn bitselect(double a, double b, double c); +double2 __ovld __cnfn bitselect(double2 a, double2 b, double2 c); +double3 __ovld __cnfn bitselect(double3 a, double3 b, double3 c); +double4 __ovld __cnfn bitselect(double4 a, double4 b, double4 c); +double8 __ovld __cnfn bitselect(double8 a, double8 b, double8 c); +double16 __ovld __cnfn bitselect(double16 a, double16 b, double16 c); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn bitselect(half a, half b, half c); +half2 __ovld __cnfn bitselect(half2 a, half2 b, half2 c); +half3 __ovld __cnfn bitselect(half3 a, half3 b, half3 c); +half4 __ovld __cnfn bitselect(half4 a, half4 b, half4 c); +half8 __ovld __cnfn bitselect(half8 a, half8 b, half8 c); +half16 __ovld __cnfn bitselect(half16 a, half16 b, half16 c); +#endif //cl_khr_fp16 + +/** + * For each component of a vector type, + * result[i] = if MSB of c[i] is set ? b[i] : a[i]. + * For a scalar type, result = c ? b : a. + * b and a must have the same type. + * c must have the same number of elements and bits as a. + */ +char __ovld __cnfn select(char a, char b, char c); +uchar __ovld __cnfn select(uchar a, uchar b, char c); +char2 __ovld __cnfn select(char2 a, char2 b, char2 c); +uchar2 __ovld __cnfn select(uchar2 a, uchar2 b, char2 c); +char3 __ovld __cnfn select(char3 a, char3 b, char3 c); +uchar3 __ovld __cnfn select(uchar3 a, uchar3 b, char3 c); +char4 __ovld __cnfn select(char4 a, char4 b, char4 c); +uchar4 __ovld __cnfn select(uchar4 a, uchar4 b, char4 c); +char8 __ovld __cnfn select(char8 a, char8 b, char8 c); +uchar8 __ovld __cnfn select(uchar8 a, uchar8 b, char8 c); +char16 __ovld __cnfn select(char16 a, char16 b, char16 c); +uchar16 __ovld __cnfn select(uchar16 a, uchar16 b, char16 c); + +short __ovld __cnfn select(short a, short b, short c); +ushort __ovld __cnfn select(ushort a, ushort b, short c); +short2 __ovld __cnfn select(short2 a, short2 b, short2 c); +ushort2 __ovld __cnfn select(ushort2 a, ushort2 b, short2 c); +short3 __ovld __cnfn select(short3 a, short3 b, short3 c); +ushort3 __ovld __cnfn select(ushort3 a, ushort3 b, short3 c); +short4 __ovld __cnfn select(short4 a, short4 b, short4 c); +ushort4 __ovld __cnfn select(ushort4 a, ushort4 b, short4 c); +short8 __ovld __cnfn select(short8 a, short8 b, short8 c); +ushort8 __ovld __cnfn select(ushort8 a, ushort8 b, short8 c); +short16 __ovld __cnfn select(short16 a, short16 b, short16 c); +ushort16 __ovld __cnfn select(ushort16 a, ushort16 b, short16 c); + +int __ovld __cnfn select(int a, int b, int c); +uint __ovld __cnfn select(uint a, uint b, int c); +int2 __ovld __cnfn select(int2 a, int2 b, int2 c); +uint2 __ovld __cnfn select(uint2 a, uint2 b, int2 c); +int3 __ovld __cnfn select(int3 a, int3 b, int3 c); +uint3 __ovld __cnfn select(uint3 a, uint3 b, int3 c); +int4 __ovld __cnfn select(int4 a, int4 b, int4 c); +uint4 __ovld __cnfn select(uint4 a, uint4 b, int4 c); +int8 __ovld __cnfn select(int8 a, int8 b, int8 c); +uint8 __ovld __cnfn select(uint8 a, uint8 b, int8 c); +int16 __ovld __cnfn select(int16 a, int16 b, int16 c); +uint16 __ovld __cnfn select(uint16 a, uint16 b, int16 c); +float __ovld __cnfn select(float a, float b, int c); +float2 __ovld __cnfn select(float2 a, float2 b, int2 c); +float3 __ovld __cnfn select(float3 a, float3 b, int3 c); +float4 __ovld __cnfn select(float4 a, float4 b, int4 c); +float8 __ovld __cnfn select(float8 a, float8 b, int8 c); +float16 __ovld __cnfn select(float16 a, float16 b, int16 c); + +long __ovld __cnfn select(long a, long b, long c); +ulong __ovld __cnfn select(ulong a, ulong b, long c); +long2 __ovld __cnfn select(long2 a, long2 b, long2 c); +ulong2 __ovld __cnfn select(ulong2 a, ulong2 b, long2 c); +long3 __ovld __cnfn select(long3 a, long3 b, long3 c); +ulong3 __ovld __cnfn select(ulong3 a, ulong3 b, long3 c); +long4 __ovld __cnfn select(long4 a, long4 b, long4 c); +ulong4 __ovld __cnfn select(ulong4 a, ulong4 b, long4 c); +long8 __ovld __cnfn select(long8 a, long8 b, long8 c); +ulong8 __ovld __cnfn select(ulong8 a, ulong8 b, long8 c); +long16 __ovld __cnfn select(long16 a, long16 b, long16 c); +ulong16 __ovld __cnfn select(ulong16 a, ulong16 b, long16 c); + +char __ovld __cnfn select(char a, char b, uchar c); +uchar __ovld __cnfn select(uchar a, uchar b, uchar c); +char2 __ovld __cnfn select(char2 a, char2 b, uchar2 c); +uchar2 __ovld __cnfn select(uchar2 a, uchar2 b, uchar2 c); +char3 __ovld __cnfn select(char3 a, char3 b, uchar3 c); +uchar3 __ovld __cnfn select(uchar3 a, uchar3 b, uchar3 c); +char4 __ovld __cnfn select(char4 a, char4 b, uchar4 c); +uchar4 __ovld __cnfn select(uchar4 a, uchar4 b, uchar4 c); +char8 __ovld __cnfn select(char8 a, char8 b, uchar8 c); +uchar8 __ovld __cnfn select(uchar8 a, uchar8 b, uchar8 c); +char16 __ovld __cnfn select(char16 a, char16 b, uchar16 c); +uchar16 __ovld __cnfn select(uchar16 a, uchar16 b, uchar16 c); + +short __ovld __cnfn select(short a, short b, ushort c); +ushort __ovld __cnfn select(ushort a, ushort b, ushort c); +short2 __ovld __cnfn select(short2 a, short2 b, ushort2 c); +ushort2 __ovld __cnfn select(ushort2 a, ushort2 b, ushort2 c); +short3 __ovld __cnfn select(short3 a, short3 b, ushort3 c); +ushort3 __ovld __cnfn select(ushort3 a, ushort3 b, ushort3 c); +short4 __ovld __cnfn select(short4 a, short4 b, ushort4 c); +ushort4 __ovld __cnfn select(ushort4 a, ushort4 b, ushort4 c); +short8 __ovld __cnfn select(short8 a, short8 b, ushort8 c); +ushort8 __ovld __cnfn select(ushort8 a, ushort8 b, ushort8 c); +short16 __ovld __cnfn select(short16 a, short16 b, ushort16 c); +ushort16 __ovld __cnfn select(ushort16 a, ushort16 b, ushort16 c); + +int __ovld __cnfn select(int a, int b, uint c); +uint __ovld __cnfn select(uint a, uint b, uint c); +int2 __ovld __cnfn select(int2 a, int2 b, uint2 c); +uint2 __ovld __cnfn select(uint2 a, uint2 b, uint2 c); +int3 __ovld __cnfn select(int3 a, int3 b, uint3 c); +uint3 __ovld __cnfn select(uint3 a, uint3 b, uint3 c); +int4 __ovld __cnfn select(int4 a, int4 b, uint4 c); +uint4 __ovld __cnfn select(uint4 a, uint4 b, uint4 c); +int8 __ovld __cnfn select(int8 a, int8 b, uint8 c); +uint8 __ovld __cnfn select(uint8 a, uint8 b, uint8 c); +int16 __ovld __cnfn select(int16 a, int16 b, uint16 c); +uint16 __ovld __cnfn select(uint16 a, uint16 b, uint16 c); +float __ovld __cnfn select(float a, float b, uint c); +float2 __ovld __cnfn select(float2 a, float2 b, uint2 c); +float3 __ovld __cnfn select(float3 a, float3 b, uint3 c); +float4 __ovld __cnfn select(float4 a, float4 b, uint4 c); +float8 __ovld __cnfn select(float8 a, float8 b, uint8 c); +float16 __ovld __cnfn select(float16 a, float16 b, uint16 c); + +long __ovld __cnfn select(long a, long b, ulong c); +ulong __ovld __cnfn select(ulong a, ulong b, ulong c); +long2 __ovld __cnfn select(long2 a, long2 b, ulong2 c); +ulong2 __ovld __cnfn select(ulong2 a, ulong2 b, ulong2 c); +long3 __ovld __cnfn select(long3 a, long3 b, ulong3 c); +ulong3 __ovld __cnfn select(ulong3 a, ulong3 b, ulong3 c); +long4 __ovld __cnfn select(long4 a, long4 b, ulong4 c); +ulong4 __ovld __cnfn select(ulong4 a, ulong4 b, ulong4 c); +long8 __ovld __cnfn select(long8 a, long8 b, ulong8 c); +ulong8 __ovld __cnfn select(ulong8 a, ulong8 b, ulong8 c); +long16 __ovld __cnfn select(long16 a, long16 b, ulong16 c); +ulong16 __ovld __cnfn select(ulong16 a, ulong16 b, ulong16 c); + +#ifdef cl_khr_fp64 +double __ovld __cnfn select(double a, double b, long c); +double2 __ovld __cnfn select(double2 a, double2 b, long2 c); +double3 __ovld __cnfn select(double3 a, double3 b, long3 c); +double4 __ovld __cnfn select(double4 a, double4 b, long4 c); +double8 __ovld __cnfn select(double8 a, double8 b, long8 c); +double16 __ovld __cnfn select(double16 a, double16 b, long16 c); +double __ovld __cnfn select(double a, double b, ulong c); +double2 __ovld __cnfn select(double2 a, double2 b, ulong2 c); +double3 __ovld __cnfn select(double3 a, double3 b, ulong3 c); +double4 __ovld __cnfn select(double4 a, double4 b, ulong4 c); +double8 __ovld __cnfn select(double8 a, double8 b, ulong8 c); +double16 __ovld __cnfn select(double16 a, double16 b, ulong16 c); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +half __ovld __cnfn select(half a, half b, short c); +half2 __ovld __cnfn select(half2 a, half2 b, short2 c); +half3 __ovld __cnfn select(half3 a, half3 b, short3 c); +half4 __ovld __cnfn select(half4 a, half4 b, short4 c); +half8 __ovld __cnfn select(half8 a, half8 b, short8 c); +half16 __ovld __cnfn select(half16 a, half16 b, short16 c); +half __ovld __cnfn select(half a, half b, ushort c); +half2 __ovld __cnfn select(half2 a, half2 b, ushort2 c); +half3 __ovld __cnfn select(half3 a, half3 b, ushort3 c); +half4 __ovld __cnfn select(half4 a, half4 b, ushort4 c); +half8 __ovld __cnfn select(half8 a, half8 b, ushort8 c); +half16 __ovld __cnfn select(half16 a, half16 b, ushort16 c); +#endif //cl_khr_fp16 + +// OpenCL v1.1 s6.11.7, v1.2 s6.12.7, v2.0 s6.13.7 - Vector Data Load and Store Functions +// OpenCL extensions v1.1 s9.6.6, v1.2 s9.5.6, v2.0 s9.4.6 - Vector Data Load and Store Functions for Half Type +/** + * Use generic type gentype to indicate the built-in data types + * char, uchar, short, ushort, int, uint, long, ulong, float, + * double or half. + * + * vloadn return sizeof (gentypen) bytes of data read from address (p + (offset * n)). + * + * vstoren write sizeof (gentypen) bytes given by data to address (p + (offset * n)). + * + * The address computed as (p + (offset * n)) must be + * 8-bit aligned if gentype is char, uchar; + * 16-bit aligned if gentype is short, ushort, half; + * 32-bit aligned if gentype is int, uint, float; + * 64-bit aligned if gentype is long, ulong, double. + */ + +char2 __ovld vload2(size_t offset, const __constant char *p); +uchar2 __ovld vload2(size_t offset, const __constant uchar *p); +short2 __ovld vload2(size_t offset, const __constant short *p); +ushort2 __ovld vload2(size_t offset, const __constant ushort *p); +int2 __ovld vload2(size_t offset, const __constant int *p); +uint2 __ovld vload2(size_t offset, const __constant uint *p); +long2 __ovld vload2(size_t offset, const __constant long *p); +ulong2 __ovld vload2(size_t offset, const __constant ulong *p); +float2 __ovld vload2(size_t offset, const __constant float *p); +char3 __ovld vload3(size_t offset, const __constant char *p); +uchar3 __ovld vload3(size_t offset, const __constant uchar *p); +short3 __ovld vload3(size_t offset, const __constant short *p); +ushort3 __ovld vload3(size_t offset, const __constant ushort *p); +int3 __ovld vload3(size_t offset, const __constant int *p); +uint3 __ovld vload3(size_t offset, const __constant uint *p); +long3 __ovld vload3(size_t offset, const __constant long *p); +ulong3 __ovld vload3(size_t offset, const __constant ulong *p); +float3 __ovld vload3(size_t offset, const __constant float *p); +char4 __ovld vload4(size_t offset, const __constant char *p); +uchar4 __ovld vload4(size_t offset, const __constant uchar *p); +short4 __ovld vload4(size_t offset, const __constant short *p); +ushort4 __ovld vload4(size_t offset, const __constant ushort *p); +int4 __ovld vload4(size_t offset, const __constant int *p); +uint4 __ovld vload4(size_t offset, const __constant uint *p); +long4 __ovld vload4(size_t offset, const __constant long *p); +ulong4 __ovld vload4(size_t offset, const __constant ulong *p); +float4 __ovld vload4(size_t offset, const __constant float *p); +char8 __ovld vload8(size_t offset, const __constant char *p); +uchar8 __ovld vload8(size_t offset, const __constant uchar *p); +short8 __ovld vload8(size_t offset, const __constant short *p); +ushort8 __ovld vload8(size_t offset, const __constant ushort *p); +int8 __ovld vload8(size_t offset, const __constant int *p); +uint8 __ovld vload8(size_t offset, const __constant uint *p); +long8 __ovld vload8(size_t offset, const __constant long *p); +ulong8 __ovld vload8(size_t offset, const __constant ulong *p); +float8 __ovld vload8(size_t offset, const __constant float *p); +char16 __ovld vload16(size_t offset, const __constant char *p); +uchar16 __ovld vload16(size_t offset, const __constant uchar *p); +short16 __ovld vload16(size_t offset, const __constant short *p); +ushort16 __ovld vload16(size_t offset, const __constant ushort *p); +int16 __ovld vload16(size_t offset, const __constant int *p); +uint16 __ovld vload16(size_t offset, const __constant uint *p); +long16 __ovld vload16(size_t offset, const __constant long *p); +ulong16 __ovld vload16(size_t offset, const __constant ulong *p); +float16 __ovld vload16(size_t offset, const __constant float *p); +#ifdef cl_khr_fp64 +double2 __ovld vload2(size_t offset, const __constant double *p); +double3 __ovld vload3(size_t offset, const __constant double *p); +double4 __ovld vload4(size_t offset, const __constant double *p); +double8 __ovld vload8(size_t offset, const __constant double *p); +double16 __ovld vload16(size_t offset, const __constant double *p); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half __ovld vload(size_t offset, const __constant half *p); +half2 __ovld vload2(size_t offset, const __constant half *p); +half3 __ovld vload3(size_t offset, const __constant half *p); +half4 __ovld vload4(size_t offset, const __constant half *p); +half8 __ovld vload8(size_t offset, const __constant half *p); +half16 __ovld vload16(size_t offset, const __constant half *p); +#endif //cl_khr_fp16 + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +char2 __ovld vload2(size_t offset, const char *p); +uchar2 __ovld vload2(size_t offset, const uchar *p); +short2 __ovld vload2(size_t offset, const short *p); +ushort2 __ovld vload2(size_t offset, const ushort *p); +int2 __ovld vload2(size_t offset, const int *p); +uint2 __ovld vload2(size_t offset, const uint *p); +long2 __ovld vload2(size_t offset, const long *p); +ulong2 __ovld vload2(size_t offset, const ulong *p); +float2 __ovld vload2(size_t offset, const float *p); +char3 __ovld vload3(size_t offset, const char *p); +uchar3 __ovld vload3(size_t offset, const uchar *p); +short3 __ovld vload3(size_t offset, const short *p); +ushort3 __ovld vload3(size_t offset, const ushort *p); +int3 __ovld vload3(size_t offset, const int *p); +uint3 __ovld vload3(size_t offset, const uint *p); +long3 __ovld vload3(size_t offset, const long *p); +ulong3 __ovld vload3(size_t offset, const ulong *p); +float3 __ovld vload3(size_t offset, const float *p); +char4 __ovld vload4(size_t offset, const char *p); +uchar4 __ovld vload4(size_t offset, const uchar *p); +short4 __ovld vload4(size_t offset, const short *p); +ushort4 __ovld vload4(size_t offset, const ushort *p); +int4 __ovld vload4(size_t offset, const int *p); +uint4 __ovld vload4(size_t offset, const uint *p); +long4 __ovld vload4(size_t offset, const long *p); +ulong4 __ovld vload4(size_t offset, const ulong *p); +float4 __ovld vload4(size_t offset, const float *p); +char8 __ovld vload8(size_t offset, const char *p); +uchar8 __ovld vload8(size_t offset, const uchar *p); +short8 __ovld vload8(size_t offset, const short *p); +ushort8 __ovld vload8(size_t offset, const ushort *p); +int8 __ovld vload8(size_t offset, const int *p); +uint8 __ovld vload8(size_t offset, const uint *p); +long8 __ovld vload8(size_t offset, const long *p); +ulong8 __ovld vload8(size_t offset, const ulong *p); +float8 __ovld vload8(size_t offset, const float *p); +char16 __ovld vload16(size_t offset, const char *p); +uchar16 __ovld vload16(size_t offset, const uchar *p); +short16 __ovld vload16(size_t offset, const short *p); +ushort16 __ovld vload16(size_t offset, const ushort *p); +int16 __ovld vload16(size_t offset, const int *p); +uint16 __ovld vload16(size_t offset, const uint *p); +long16 __ovld vload16(size_t offset, const long *p); +ulong16 __ovld vload16(size_t offset, const ulong *p); +float16 __ovld vload16(size_t offset, const float *p); + +#ifdef cl_khr_fp64 +double2 __ovld vload2(size_t offset, const double *p); +double3 __ovld vload3(size_t offset, const double *p); +double4 __ovld vload4(size_t offset, const double *p); +double8 __ovld vload8(size_t offset, const double *p); +double16 __ovld vload16(size_t offset, const double *p); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half __ovld vload(size_t offset, const half *p); +half2 __ovld vload2(size_t offset, const half *p); +half3 __ovld vload3(size_t offset, const half *p); +half4 __ovld vload4(size_t offset, const half *p); +half8 __ovld vload8(size_t offset, const half *p); +half16 __ovld vload16(size_t offset, const half *p); +#endif //cl_khr_fp16 +#else +char2 __ovld vload2(size_t offset, const __global char *p); +uchar2 __ovld vload2(size_t offset, const __global uchar *p); +short2 __ovld vload2(size_t offset, const __global short *p); +ushort2 __ovld vload2(size_t offset, const __global ushort *p); +int2 __ovld vload2(size_t offset, const __global int *p); +uint2 __ovld vload2(size_t offset, const __global uint *p); +long2 __ovld vload2(size_t offset, const __global long *p); +ulong2 __ovld vload2(size_t offset, const __global ulong *p); +float2 __ovld vload2(size_t offset, const __global float *p); +char3 __ovld vload3(size_t offset, const __global char *p); +uchar3 __ovld vload3(size_t offset, const __global uchar *p); +short3 __ovld vload3(size_t offset, const __global short *p); +ushort3 __ovld vload3(size_t offset, const __global ushort *p); +int3 __ovld vload3(size_t offset, const __global int *p); +uint3 __ovld vload3(size_t offset, const __global uint *p); +long3 __ovld vload3(size_t offset, const __global long *p); +ulong3 __ovld vload3(size_t offset, const __global ulong *p); +float3 __ovld vload3(size_t offset, const __global float *p); +char4 __ovld vload4(size_t offset, const __global char *p); +uchar4 __ovld vload4(size_t offset, const __global uchar *p); +short4 __ovld vload4(size_t offset, const __global short *p); +ushort4 __ovld vload4(size_t offset, const __global ushort *p); +int4 __ovld vload4(size_t offset, const __global int *p); +uint4 __ovld vload4(size_t offset, const __global uint *p); +long4 __ovld vload4(size_t offset, const __global long *p); +ulong4 __ovld vload4(size_t offset, const __global ulong *p); +float4 __ovld vload4(size_t offset, const __global float *p); +char8 __ovld vload8(size_t offset, const __global char *p); +uchar8 __ovld vload8(size_t offset, const __global uchar *p); +short8 __ovld vload8(size_t offset, const __global short *p); +ushort8 __ovld vload8(size_t offset, const __global ushort *p); +int8 __ovld vload8(size_t offset, const __global int *p); +uint8 __ovld vload8(size_t offset, const __global uint *p); +long8 __ovld vload8(size_t offset, const __global long *p); +ulong8 __ovld vload8(size_t offset, const __global ulong *p); +float8 __ovld vload8(size_t offset, const __global float *p); +char16 __ovld vload16(size_t offset, const __global char *p); +uchar16 __ovld vload16(size_t offset, const __global uchar *p); +short16 __ovld vload16(size_t offset, const __global short *p); +ushort16 __ovld vload16(size_t offset, const __global ushort *p); +int16 __ovld vload16(size_t offset, const __global int *p); +uint16 __ovld vload16(size_t offset, const __global uint *p); +long16 __ovld vload16(size_t offset, const __global long *p); +ulong16 __ovld vload16(size_t offset, const __global ulong *p); +float16 __ovld vload16(size_t offset, const __global float *p); +char2 __ovld vload2(size_t offset, const __local char *p); +uchar2 __ovld vload2(size_t offset, const __local uchar *p); +short2 __ovld vload2(size_t offset, const __local short *p); +ushort2 __ovld vload2(size_t offset, const __local ushort *p); +int2 __ovld vload2(size_t offset, const __local int *p); +uint2 __ovld vload2(size_t offset, const __local uint *p); +long2 __ovld vload2(size_t offset, const __local long *p); +ulong2 __ovld vload2(size_t offset, const __local ulong *p); +float2 __ovld vload2(size_t offset, const __local float *p); +char3 __ovld vload3(size_t offset, const __local char *p); +uchar3 __ovld vload3(size_t offset, const __local uchar *p); +short3 __ovld vload3(size_t offset, const __local short *p); +ushort3 __ovld vload3(size_t offset, const __local ushort *p); +int3 __ovld vload3(size_t offset, const __local int *p); +uint3 __ovld vload3(size_t offset, const __local uint *p); +long3 __ovld vload3(size_t offset, const __local long *p); +ulong3 __ovld vload3(size_t offset, const __local ulong *p); +float3 __ovld vload3(size_t offset, const __local float *p); +char4 __ovld vload4(size_t offset, const __local char *p); +uchar4 __ovld vload4(size_t offset, const __local uchar *p); +short4 __ovld vload4(size_t offset, const __local short *p); +ushort4 __ovld vload4(size_t offset, const __local ushort *p); +int4 __ovld vload4(size_t offset, const __local int *p); +uint4 __ovld vload4(size_t offset, const __local uint *p); +long4 __ovld vload4(size_t offset, const __local long *p); +ulong4 __ovld vload4(size_t offset, const __local ulong *p); +float4 __ovld vload4(size_t offset, const __local float *p); +char8 __ovld vload8(size_t offset, const __local char *p); +uchar8 __ovld vload8(size_t offset, const __local uchar *p); +short8 __ovld vload8(size_t offset, const __local short *p); +ushort8 __ovld vload8(size_t offset, const __local ushort *p); +int8 __ovld vload8(size_t offset, const __local int *p); +uint8 __ovld vload8(size_t offset, const __local uint *p); +long8 __ovld vload8(size_t offset, const __local long *p); +ulong8 __ovld vload8(size_t offset, const __local ulong *p); +float8 __ovld vload8(size_t offset, const __local float *p); +char16 __ovld vload16(size_t offset, const __local char *p); +uchar16 __ovld vload16(size_t offset, const __local uchar *p); +short16 __ovld vload16(size_t offset, const __local short *p); +ushort16 __ovld vload16(size_t offset, const __local ushort *p); +int16 __ovld vload16(size_t offset, const __local int *p); +uint16 __ovld vload16(size_t offset, const __local uint *p); +long16 __ovld vload16(size_t offset, const __local long *p); +ulong16 __ovld vload16(size_t offset, const __local ulong *p); +float16 __ovld vload16(size_t offset, const __local float *p); +char2 __ovld vload2(size_t offset, const __private char *p); +uchar2 __ovld vload2(size_t offset, const __private uchar *p); +short2 __ovld vload2(size_t offset, const __private short *p); +ushort2 __ovld vload2(size_t offset, const __private ushort *p); +int2 __ovld vload2(size_t offset, const __private int *p); +uint2 __ovld vload2(size_t offset, const __private uint *p); +long2 __ovld vload2(size_t offset, const __private long *p); +ulong2 __ovld vload2(size_t offset, const __private ulong *p); +float2 __ovld vload2(size_t offset, const __private float *p); +char3 __ovld vload3(size_t offset, const __private char *p); +uchar3 __ovld vload3(size_t offset, const __private uchar *p); +short3 __ovld vload3(size_t offset, const __private short *p); +ushort3 __ovld vload3(size_t offset, const __private ushort *p); +int3 __ovld vload3(size_t offset, const __private int *p); +uint3 __ovld vload3(size_t offset, const __private uint *p); +long3 __ovld vload3(size_t offset, const __private long *p); +ulong3 __ovld vload3(size_t offset, const __private ulong *p); +float3 __ovld vload3(size_t offset, const __private float *p); +char4 __ovld vload4(size_t offset, const __private char *p); +uchar4 __ovld vload4(size_t offset, const __private uchar *p); +short4 __ovld vload4(size_t offset, const __private short *p); +ushort4 __ovld vload4(size_t offset, const __private ushort *p); +int4 __ovld vload4(size_t offset, const __private int *p); +uint4 __ovld vload4(size_t offset, const __private uint *p); +long4 __ovld vload4(size_t offset, const __private long *p); +ulong4 __ovld vload4(size_t offset, const __private ulong *p); +float4 __ovld vload4(size_t offset, const __private float *p); +char8 __ovld vload8(size_t offset, const __private char *p); +uchar8 __ovld vload8(size_t offset, const __private uchar *p); +short8 __ovld vload8(size_t offset, const __private short *p); +ushort8 __ovld vload8(size_t offset, const __private ushort *p); +int8 __ovld vload8(size_t offset, const __private int *p); +uint8 __ovld vload8(size_t offset, const __private uint *p); +long8 __ovld vload8(size_t offset, const __private long *p); +ulong8 __ovld vload8(size_t offset, const __private ulong *p); +float8 __ovld vload8(size_t offset, const __private float *p); +char16 __ovld vload16(size_t offset, const __private char *p); +uchar16 __ovld vload16(size_t offset, const __private uchar *p); +short16 __ovld vload16(size_t offset, const __private short *p); +ushort16 __ovld vload16(size_t offset, const __private ushort *p); +int16 __ovld vload16(size_t offset, const __private int *p); +uint16 __ovld vload16(size_t offset, const __private uint *p); +long16 __ovld vload16(size_t offset, const __private long *p); +ulong16 __ovld vload16(size_t offset, const __private ulong *p); +float16 __ovld vload16(size_t offset, const __private float *p); + +#ifdef cl_khr_fp64 +double2 __ovld vload2(size_t offset, const __global double *p); +double3 __ovld vload3(size_t offset, const __global double *p); +double4 __ovld vload4(size_t offset, const __global double *p); +double8 __ovld vload8(size_t offset, const __global double *p); +double16 __ovld vload16(size_t offset, const __global double *p); +double2 __ovld vload2(size_t offset, const __local double *p); +double3 __ovld vload3(size_t offset, const __local double *p); +double4 __ovld vload4(size_t offset, const __local double *p); +double8 __ovld vload8(size_t offset, const __local double *p); +double16 __ovld vload16(size_t offset, const __local double *p); +double2 __ovld vload2(size_t offset, const __private double *p); +double3 __ovld vload3(size_t offset, const __private double *p); +double4 __ovld vload4(size_t offset, const __private double *p); +double8 __ovld vload8(size_t offset, const __private double *p); +double16 __ovld vload16(size_t offset, const __private double *p); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half __ovld vload(size_t offset, const __global half *p); +half2 __ovld vload2(size_t offset, const __global half *p); +half3 __ovld vload3(size_t offset, const __global half *p); +half4 __ovld vload4(size_t offset, const __global half *p); +half8 __ovld vload8(size_t offset, const __global half *p); +half16 __ovld vload16(size_t offset, const __global half *p); +half __ovld vload(size_t offset, const __local half *p); +half2 __ovld vload2(size_t offset, const __local half *p); +half3 __ovld vload3(size_t offset, const __local half *p); +half4 __ovld vload4(size_t offset, const __local half *p); +half8 __ovld vload8(size_t offset, const __local half *p); +half16 __ovld vload16(size_t offset, const __local half *p); +half __ovld vload(size_t offset, const __private half *p); +half2 __ovld vload2(size_t offset, const __private half *p); +half3 __ovld vload3(size_t offset, const __private half *p); +half4 __ovld vload4(size_t offset, const __private half *p); +half8 __ovld vload8(size_t offset, const __private half *p); +half16 __ovld vload16(size_t offset, const __private half *p); +#endif //cl_khr_fp16 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld vstore2(char2 data, size_t offset, char *p); +void __ovld vstore2(uchar2 data, size_t offset, uchar *p); +void __ovld vstore2(short2 data, size_t offset, short *p); +void __ovld vstore2(ushort2 data, size_t offset, ushort *p); +void __ovld vstore2(int2 data, size_t offset, int *p); +void __ovld vstore2(uint2 data, size_t offset, uint *p); +void __ovld vstore2(long2 data, size_t offset, long *p); +void __ovld vstore2(ulong2 data, size_t offset, ulong *p); +void __ovld vstore2(float2 data, size_t offset, float *p); +void __ovld vstore3(char3 data, size_t offset, char *p); +void __ovld vstore3(uchar3 data, size_t offset, uchar *p); +void __ovld vstore3(short3 data, size_t offset, short *p); +void __ovld vstore3(ushort3 data, size_t offset, ushort *p); +void __ovld vstore3(int3 data, size_t offset, int *p); +void __ovld vstore3(uint3 data, size_t offset, uint *p); +void __ovld vstore3(long3 data, size_t offset, long *p); +void __ovld vstore3(ulong3 data, size_t offset, ulong *p); +void __ovld vstore3(float3 data, size_t offset, float *p); +void __ovld vstore4(char4 data, size_t offset, char *p); +void __ovld vstore4(uchar4 data, size_t offset, uchar *p); +void __ovld vstore4(short4 data, size_t offset, short *p); +void __ovld vstore4(ushort4 data, size_t offset, ushort *p); +void __ovld vstore4(int4 data, size_t offset, int *p); +void __ovld vstore4(uint4 data, size_t offset, uint *p); +void __ovld vstore4(long4 data, size_t offset, long *p); +void __ovld vstore4(ulong4 data, size_t offset, ulong *p); +void __ovld vstore4(float4 data, size_t offset, float *p); +void __ovld vstore8(char8 data, size_t offset, char *p); +void __ovld vstore8(uchar8 data, size_t offset, uchar *p); +void __ovld vstore8(short8 data, size_t offset, short *p); +void __ovld vstore8(ushort8 data, size_t offset, ushort *p); +void __ovld vstore8(int8 data, size_t offset, int *p); +void __ovld vstore8(uint8 data, size_t offset, uint *p); +void __ovld vstore8(long8 data, size_t offset, long *p); +void __ovld vstore8(ulong8 data, size_t offset, ulong *p); +void __ovld vstore8(float8 data, size_t offset, float *p); +void __ovld vstore16(char16 data, size_t offset, char *p); +void __ovld vstore16(uchar16 data, size_t offset, uchar *p); +void __ovld vstore16(short16 data, size_t offset, short *p); +void __ovld vstore16(ushort16 data, size_t offset, ushort *p); +void __ovld vstore16(int16 data, size_t offset, int *p); +void __ovld vstore16(uint16 data, size_t offset, uint *p); +void __ovld vstore16(long16 data, size_t offset, long *p); +void __ovld vstore16(ulong16 data, size_t offset, ulong *p); +void __ovld vstore16(float16 data, size_t offset, float *p); +#ifdef cl_khr_fp64 +void __ovld vstore2(double2 data, size_t offset, double *p); +void __ovld vstore3(double3 data, size_t offset, double *p); +void __ovld vstore4(double4 data, size_t offset, double *p); +void __ovld vstore8(double8 data, size_t offset, double *p); +void __ovld vstore16(double16 data, size_t offset, double *p); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +void __ovld vstore(half data, size_t offset, half *p); +void __ovld vstore2(half2 data, size_t offset, half *p); +void __ovld vstore3(half3 data, size_t offset, half *p); +void __ovld vstore4(half4 data, size_t offset, half *p); +void __ovld vstore8(half8 data, size_t offset, half *p); +void __ovld vstore16(half16 data, size_t offset, half *p); +#endif //cl_khr_fp16 +#else +void __ovld vstore2(char2 data, size_t offset, __global char *p); +void __ovld vstore2(uchar2 data, size_t offset, __global uchar *p); +void __ovld vstore2(short2 data, size_t offset, __global short *p); +void __ovld vstore2(ushort2 data, size_t offset, __global ushort *p); +void __ovld vstore2(int2 data, size_t offset, __global int *p); +void __ovld vstore2(uint2 data, size_t offset, __global uint *p); +void __ovld vstore2(long2 data, size_t offset, __global long *p); +void __ovld vstore2(ulong2 data, size_t offset, __global ulong *p); +void __ovld vstore2(float2 data, size_t offset, __global float *p); +void __ovld vstore3(char3 data, size_t offset, __global char *p); +void __ovld vstore3(uchar3 data, size_t offset, __global uchar *p); +void __ovld vstore3(short3 data, size_t offset, __global short *p); +void __ovld vstore3(ushort3 data, size_t offset, __global ushort *p); +void __ovld vstore3(int3 data, size_t offset, __global int *p); +void __ovld vstore3(uint3 data, size_t offset, __global uint *p); +void __ovld vstore3(long3 data, size_t offset, __global long *p); +void __ovld vstore3(ulong3 data, size_t offset, __global ulong *p); +void __ovld vstore3(float3 data, size_t offset, __global float *p); +void __ovld vstore4(char4 data, size_t offset, __global char *p); +void __ovld vstore4(uchar4 data, size_t offset, __global uchar *p); +void __ovld vstore4(short4 data, size_t offset, __global short *p); +void __ovld vstore4(ushort4 data, size_t offset, __global ushort *p); +void __ovld vstore4(int4 data, size_t offset, __global int *p); +void __ovld vstore4(uint4 data, size_t offset, __global uint *p); +void __ovld vstore4(long4 data, size_t offset, __global long *p); +void __ovld vstore4(ulong4 data, size_t offset, __global ulong *p); +void __ovld vstore4(float4 data, size_t offset, __global float *p); +void __ovld vstore8(char8 data, size_t offset, __global char *p); +void __ovld vstore8(uchar8 data, size_t offset, __global uchar *p); +void __ovld vstore8(short8 data, size_t offset, __global short *p); +void __ovld vstore8(ushort8 data, size_t offset, __global ushort *p); +void __ovld vstore8(int8 data, size_t offset, __global int *p); +void __ovld vstore8(uint8 data, size_t offset, __global uint *p); +void __ovld vstore8(long8 data, size_t offset, __global long *p); +void __ovld vstore8(ulong8 data, size_t offset, __global ulong *p); +void __ovld vstore8(float8 data, size_t offset, __global float *p); +void __ovld vstore16(char16 data, size_t offset, __global char *p); +void __ovld vstore16(uchar16 data, size_t offset, __global uchar *p); +void __ovld vstore16(short16 data, size_t offset, __global short *p); +void __ovld vstore16(ushort16 data, size_t offset, __global ushort *p); +void __ovld vstore16(int16 data, size_t offset, __global int *p); +void __ovld vstore16(uint16 data, size_t offset, __global uint *p); +void __ovld vstore16(long16 data, size_t offset, __global long *p); +void __ovld vstore16(ulong16 data, size_t offset, __global ulong *p); +void __ovld vstore16(float16 data, size_t offset, __global float *p); +void __ovld vstore2(char2 data, size_t offset, __local char *p); +void __ovld vstore2(uchar2 data, size_t offset, __local uchar *p); +void __ovld vstore2(short2 data, size_t offset, __local short *p); +void __ovld vstore2(ushort2 data, size_t offset, __local ushort *p); +void __ovld vstore2(int2 data, size_t offset, __local int *p); +void __ovld vstore2(uint2 data, size_t offset, __local uint *p); +void __ovld vstore2(long2 data, size_t offset, __local long *p); +void __ovld vstore2(ulong2 data, size_t offset, __local ulong *p); +void __ovld vstore2(float2 data, size_t offset, __local float *p); +void __ovld vstore3(char3 data, size_t offset, __local char *p); +void __ovld vstore3(uchar3 data, size_t offset, __local uchar *p); +void __ovld vstore3(short3 data, size_t offset, __local short *p); +void __ovld vstore3(ushort3 data, size_t offset, __local ushort *p); +void __ovld vstore3(int3 data, size_t offset, __local int *p); +void __ovld vstore3(uint3 data, size_t offset, __local uint *p); +void __ovld vstore3(long3 data, size_t offset, __local long *p); +void __ovld vstore3(ulong3 data, size_t offset, __local ulong *p); +void __ovld vstore3(float3 data, size_t offset, __local float *p); +void __ovld vstore4(char4 data, size_t offset, __local char *p); +void __ovld vstore4(uchar4 data, size_t offset, __local uchar *p); +void __ovld vstore4(short4 data, size_t offset, __local short *p); +void __ovld vstore4(ushort4 data, size_t offset, __local ushort *p); +void __ovld vstore4(int4 data, size_t offset, __local int *p); +void __ovld vstore4(uint4 data, size_t offset, __local uint *p); +void __ovld vstore4(long4 data, size_t offset, __local long *p); +void __ovld vstore4(ulong4 data, size_t offset, __local ulong *p); +void __ovld vstore4(float4 data, size_t offset, __local float *p); +void __ovld vstore8(char8 data, size_t offset, __local char *p); +void __ovld vstore8(uchar8 data, size_t offset, __local uchar *p); +void __ovld vstore8(short8 data, size_t offset, __local short *p); +void __ovld vstore8(ushort8 data, size_t offset, __local ushort *p); +void __ovld vstore8(int8 data, size_t offset, __local int *p); +void __ovld vstore8(uint8 data, size_t offset, __local uint *p); +void __ovld vstore8(long8 data, size_t offset, __local long *p); +void __ovld vstore8(ulong8 data, size_t offset, __local ulong *p); +void __ovld vstore8(float8 data, size_t offset, __local float *p); +void __ovld vstore16(char16 data, size_t offset, __local char *p); +void __ovld vstore16(uchar16 data, size_t offset, __local uchar *p); +void __ovld vstore16(short16 data, size_t offset, __local short *p); +void __ovld vstore16(ushort16 data, size_t offset, __local ushort *p); +void __ovld vstore16(int16 data, size_t offset, __local int *p); +void __ovld vstore16(uint16 data, size_t offset, __local uint *p); +void __ovld vstore16(long16 data, size_t offset, __local long *p); +void __ovld vstore16(ulong16 data, size_t offset, __local ulong *p); +void __ovld vstore16(float16 data, size_t offset, __local float *p); +void __ovld vstore2(char2 data, size_t offset, __private char *p); +void __ovld vstore2(uchar2 data, size_t offset, __private uchar *p); +void __ovld vstore2(short2 data, size_t offset, __private short *p); +void __ovld vstore2(ushort2 data, size_t offset, __private ushort *p); +void __ovld vstore2(int2 data, size_t offset, __private int *p); +void __ovld vstore2(uint2 data, size_t offset, __private uint *p); +void __ovld vstore2(long2 data, size_t offset, __private long *p); +void __ovld vstore2(ulong2 data, size_t offset, __private ulong *p); +void __ovld vstore2(float2 data, size_t offset, __private float *p); +void __ovld vstore3(char3 data, size_t offset, __private char *p); +void __ovld vstore3(uchar3 data, size_t offset, __private uchar *p); +void __ovld vstore3(short3 data, size_t offset, __private short *p); +void __ovld vstore3(ushort3 data, size_t offset, __private ushort *p); +void __ovld vstore3(int3 data, size_t offset, __private int *p); +void __ovld vstore3(uint3 data, size_t offset, __private uint *p); +void __ovld vstore3(long3 data, size_t offset, __private long *p); +void __ovld vstore3(ulong3 data, size_t offset, __private ulong *p); +void __ovld vstore3(float3 data, size_t offset, __private float *p); +void __ovld vstore4(char4 data, size_t offset, __private char *p); +void __ovld vstore4(uchar4 data, size_t offset, __private uchar *p); +void __ovld vstore4(short4 data, size_t offset, __private short *p); +void __ovld vstore4(ushort4 data, size_t offset, __private ushort *p); +void __ovld vstore4(int4 data, size_t offset, __private int *p); +void __ovld vstore4(uint4 data, size_t offset, __private uint *p); +void __ovld vstore4(long4 data, size_t offset, __private long *p); +void __ovld vstore4(ulong4 data, size_t offset, __private ulong *p); +void __ovld vstore4(float4 data, size_t offset, __private float *p); +void __ovld vstore8(char8 data, size_t offset, __private char *p); +void __ovld vstore8(uchar8 data, size_t offset, __private uchar *p); +void __ovld vstore8(short8 data, size_t offset, __private short *p); +void __ovld vstore8(ushort8 data, size_t offset, __private ushort *p); +void __ovld vstore8(int8 data, size_t offset, __private int *p); +void __ovld vstore8(uint8 data, size_t offset, __private uint *p); +void __ovld vstore8(long8 data, size_t offset, __private long *p); +void __ovld vstore8(ulong8 data, size_t offset, __private ulong *p); +void __ovld vstore8(float8 data, size_t offset, __private float *p); +void __ovld vstore16(char16 data, size_t offset, __private char *p); +void __ovld vstore16(uchar16 data, size_t offset, __private uchar *p); +void __ovld vstore16(short16 data, size_t offset, __private short *p); +void __ovld vstore16(ushort16 data, size_t offset, __private ushort *p); +void __ovld vstore16(int16 data, size_t offset, __private int *p); +void __ovld vstore16(uint16 data, size_t offset, __private uint *p); +void __ovld vstore16(long16 data, size_t offset, __private long *p); +void __ovld vstore16(ulong16 data, size_t offset, __private ulong *p); +void __ovld vstore16(float16 data, size_t offset, __private float *p); +#ifdef cl_khr_fp64 +void __ovld vstore2(double2 data, size_t offset, __global double *p); +void __ovld vstore3(double3 data, size_t offset, __global double *p); +void __ovld vstore4(double4 data, size_t offset, __global double *p); +void __ovld vstore8(double8 data, size_t offset, __global double *p); +void __ovld vstore16(double16 data, size_t offset, __global double *p); +void __ovld vstore2(double2 data, size_t offset, __local double *p); +void __ovld vstore3(double3 data, size_t offset, __local double *p); +void __ovld vstore4(double4 data, size_t offset, __local double *p); +void __ovld vstore8(double8 data, size_t offset, __local double *p); +void __ovld vstore16(double16 data, size_t offset, __local double *p); +void __ovld vstore2(double2 data, size_t offset, __private double *p); +void __ovld vstore3(double3 data, size_t offset, __private double *p); +void __ovld vstore4(double4 data, size_t offset, __private double *p); +void __ovld vstore8(double8 data, size_t offset, __private double *p); +void __ovld vstore16(double16 data, size_t offset, __private double *p); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +void __ovld vstore(half data, size_t offset, __global half *p); +void __ovld vstore2(half2 data, size_t offset, __global half *p); +void __ovld vstore3(half3 data, size_t offset, __global half *p); +void __ovld vstore4(half4 data, size_t offset, __global half *p); +void __ovld vstore8(half8 data, size_t offset, __global half *p); +void __ovld vstore16(half16 data, size_t offset, __global half *p); +void __ovld vstore(half data, size_t offset, __local half *p); +void __ovld vstore2(half2 data, size_t offset, __local half *p); +void __ovld vstore3(half3 data, size_t offset, __local half *p); +void __ovld vstore4(half4 data, size_t offset, __local half *p); +void __ovld vstore8(half8 data, size_t offset, __local half *p); +void __ovld vstore16(half16 data, size_t offset, __local half *p); +void __ovld vstore(half data, size_t offset, __private half *p); +void __ovld vstore2(half2 data, size_t offset, __private half *p); +void __ovld vstore3(half3 data, size_t offset, __private half *p); +void __ovld vstore4(half4 data, size_t offset, __private half *p); +void __ovld vstore8(half8 data, size_t offset, __private half *p); +void __ovld vstore16(half16 data, size_t offset, __private half *p); +#endif //cl_khr_fp16 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Read sizeof (half) bytes of data from address + * (p + offset). The data read is interpreted as a + * half value. The half value is converted to a + * float value and the float value is returned. + * The read address computed as (p + offset) + * must be 16-bit aligned. + */ +float __ovld vload_half(size_t offset, const __constant half *p); +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +float __ovld vload_half(size_t offset, const half *p); +#else +float __ovld vload_half(size_t offset, const __global half *p); +float __ovld vload_half(size_t offset, const __local half *p); +float __ovld vload_half(size_t offset, const __private half *p); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Read sizeof (halfn) bytes of data from address + * (p + (offset * n)). The data read is interpreted + * as a halfn value. The halfn value read is + * converted to a floatn value and the floatn + * value is returned. The read address computed + * as (p + (offset * n)) must be 16-bit aligned. + */ +float2 __ovld vload_half2(size_t offset, const __constant half *p); +float3 __ovld vload_half3(size_t offset, const __constant half *p); +float4 __ovld vload_half4(size_t offset, const __constant half *p); +float8 __ovld vload_half8(size_t offset, const __constant half *p); +float16 __ovld vload_half16(size_t offset, const __constant half *p); +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +float2 __ovld vload_half2(size_t offset, const half *p); +float3 __ovld vload_half3(size_t offset, const half *p); +float4 __ovld vload_half4(size_t offset, const half *p); +float8 __ovld vload_half8(size_t offset, const half *p); +float16 __ovld vload_half16(size_t offset, const half *p); +#else +float2 __ovld vload_half2(size_t offset, const __global half *p); +float3 __ovld vload_half3(size_t offset, const __global half *p); +float4 __ovld vload_half4(size_t offset, const __global half *p); +float8 __ovld vload_half8(size_t offset, const __global half *p); +float16 __ovld vload_half16(size_t offset, const __global half *p); +float2 __ovld vload_half2(size_t offset, const __local half *p); +float3 __ovld vload_half3(size_t offset, const __local half *p); +float4 __ovld vload_half4(size_t offset, const __local half *p); +float8 __ovld vload_half8(size_t offset, const __local half *p); +float16 __ovld vload_half16(size_t offset, const __local half *p); +float2 __ovld vload_half2(size_t offset, const __private half *p); +float3 __ovld vload_half3(size_t offset, const __private half *p); +float4 __ovld vload_half4(size_t offset, const __private half *p); +float8 __ovld vload_half8(size_t offset, const __private half *p); +float16 __ovld vload_half16(size_t offset, const __private half *p); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * The float value given by data is first + * converted to a half value using the appropriate + * rounding mode. The half value is then written + * to address computed as (p + offset). The + * address computed as (p + offset) must be 16- + * bit aligned. + * vstore_half use the current rounding mode. + * The default current rounding mode is round to + * nearest even. + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld vstore_half(float data, size_t offset, half *p); +void __ovld vstore_half_rte(float data, size_t offset, half *p); +void __ovld vstore_half_rtz(float data, size_t offset, half *p); +void __ovld vstore_half_rtp(float data, size_t offset, half *p); +void __ovld vstore_half_rtn(float data, size_t offset, half *p); +#ifdef cl_khr_fp64 +void __ovld vstore_half(double data, size_t offset, half *p); +void __ovld vstore_half_rte(double data, size_t offset, half *p); +void __ovld vstore_half_rtz(double data, size_t offset, half *p); +void __ovld vstore_half_rtp(double data, size_t offset, half *p); +void __ovld vstore_half_rtn(double data, size_t offset, half *p); +#endif //cl_khr_fp64 +#else +void __ovld vstore_half(float data, size_t offset, __global half *p); +void __ovld vstore_half_rte(float data, size_t offset, __global half *p); +void __ovld vstore_half_rtz(float data, size_t offset, __global half *p); +void __ovld vstore_half_rtp(float data, size_t offset, __global half *p); +void __ovld vstore_half_rtn(float data, size_t offset, __global half *p); +void __ovld vstore_half(float data, size_t offset, __local half *p); +void __ovld vstore_half_rte(float data, size_t offset, __local half *p); +void __ovld vstore_half_rtz(float data, size_t offset, __local half *p); +void __ovld vstore_half_rtp(float data, size_t offset, __local half *p); +void __ovld vstore_half_rtn(float data, size_t offset, __local half *p); +void __ovld vstore_half(float data, size_t offset, __private half *p); +void __ovld vstore_half_rte(float data, size_t offset, __private half *p); +void __ovld vstore_half_rtz(float data, size_t offset, __private half *p); +void __ovld vstore_half_rtp(float data, size_t offset, __private half *p); +void __ovld vstore_half_rtn(float data, size_t offset, __private half *p); +#ifdef cl_khr_fp64 +void __ovld vstore_half(double data, size_t offset, __global half *p); +void __ovld vstore_half_rte(double data, size_t offset, __global half *p); +void __ovld vstore_half_rtz(double data, size_t offset, __global half *p); +void __ovld vstore_half_rtp(double data, size_t offset, __global half *p); +void __ovld vstore_half_rtn(double data, size_t offset, __global half *p); +void __ovld vstore_half(double data, size_t offset, __local half *p); +void __ovld vstore_half_rte(double data, size_t offset, __local half *p); +void __ovld vstore_half_rtz(double data, size_t offset, __local half *p); +void __ovld vstore_half_rtp(double data, size_t offset, __local half *p); +void __ovld vstore_half_rtn(double data, size_t offset, __local half *p); +void __ovld vstore_half(double data, size_t offset, __private half *p); +void __ovld vstore_half_rte(double data, size_t offset, __private half *p); +void __ovld vstore_half_rtz(double data, size_t offset, __private half *p); +void __ovld vstore_half_rtp(double data, size_t offset, __private half *p); +void __ovld vstore_half_rtn(double data, size_t offset, __private half *p); +#endif //cl_khr_fp64 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * The floatn value given by data is converted to + * a halfn value using the appropriate rounding + * mode. The halfn value is then written to + * address computed as (p + (offset * n)). The + * address computed as (p + (offset * n)) must be + * 16-bit aligned. + * vstore_halfn uses the current rounding mode. + * The default current rounding mode is round to + * nearest even. + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld vstore_half2(float2 data, size_t offset, half *p); +void __ovld vstore_half3(float3 data, size_t offset, half *p); +void __ovld vstore_half4(float4 data, size_t offset, half *p); +void __ovld vstore_half8(float8 data, size_t offset, half *p); +void __ovld vstore_half16(float16 data, size_t offset, half *p); +void __ovld vstore_half2_rte(float2 data, size_t offset, half *p); +void __ovld vstore_half3_rte(float3 data, size_t offset, half *p); +void __ovld vstore_half4_rte(float4 data, size_t offset, half *p); +void __ovld vstore_half8_rte(float8 data, size_t offset, half *p); +void __ovld vstore_half16_rte(float16 data, size_t offset, half *p); +void __ovld vstore_half2_rtz(float2 data, size_t offset, half *p); +void __ovld vstore_half3_rtz(float3 data, size_t offset, half *p); +void __ovld vstore_half4_rtz(float4 data, size_t offset, half *p); +void __ovld vstore_half8_rtz(float8 data, size_t offset, half *p); +void __ovld vstore_half16_rtz(float16 data, size_t offset, half *p); +void __ovld vstore_half2_rtp(float2 data, size_t offset, half *p); +void __ovld vstore_half3_rtp(float3 data, size_t offset, half *p); +void __ovld vstore_half4_rtp(float4 data, size_t offset, half *p); +void __ovld vstore_half8_rtp(float8 data, size_t offset, half *p); +void __ovld vstore_half16_rtp(float16 data, size_t offset, half *p); +void __ovld vstore_half2_rtn(float2 data, size_t offset, half *p); +void __ovld vstore_half3_rtn(float3 data, size_t offset, half *p); +void __ovld vstore_half4_rtn(float4 data, size_t offset, half *p); +void __ovld vstore_half8_rtn(float8 data, size_t offset, half *p); +void __ovld vstore_half16_rtn(float16 data, size_t offset, half *p); +#ifdef cl_khr_fp64 +void __ovld vstore_half2(double2 data, size_t offset, half *p); +void __ovld vstore_half3(double3 data, size_t offset, half *p); +void __ovld vstore_half4(double4 data, size_t offset, half *p); +void __ovld vstore_half8(double8 data, size_t offset, half *p); +void __ovld vstore_half16(double16 data, size_t offset, half *p); +void __ovld vstore_half2_rte(double2 data, size_t offset, half *p); +void __ovld vstore_half3_rte(double3 data, size_t offset, half *p); +void __ovld vstore_half4_rte(double4 data, size_t offset, half *p); +void __ovld vstore_half8_rte(double8 data, size_t offset, half *p); +void __ovld vstore_half16_rte(double16 data, size_t offset, half *p); +void __ovld vstore_half2_rtz(double2 data, size_t offset, half *p); +void __ovld vstore_half3_rtz(double3 data, size_t offset, half *p); +void __ovld vstore_half4_rtz(double4 data, size_t offset, half *p); +void __ovld vstore_half8_rtz(double8 data, size_t offset, half *p); +void __ovld vstore_half16_rtz(double16 data, size_t offset, half *p); +void __ovld vstore_half2_rtp(double2 data, size_t offset, half *p); +void __ovld vstore_half3_rtp(double3 data, size_t offset, half *p); +void __ovld vstore_half4_rtp(double4 data, size_t offset, half *p); +void __ovld vstore_half8_rtp(double8 data, size_t offset, half *p); +void __ovld vstore_half16_rtp(double16 data, size_t offset, half *p); +void __ovld vstore_half2_rtn(double2 data, size_t offset, half *p); +void __ovld vstore_half3_rtn(double3 data, size_t offset, half *p); +void __ovld vstore_half4_rtn(double4 data, size_t offset, half *p); +void __ovld vstore_half8_rtn(double8 data, size_t offset, half *p); +void __ovld vstore_half16_rtn(double16 data, size_t offset, half *p); +#endif //cl_khr_fp64 +#else +void __ovld vstore_half2(float2 data, size_t offset, __global half *p); +void __ovld vstore_half3(float3 data, size_t offset, __global half *p); +void __ovld vstore_half4(float4 data, size_t offset, __global half *p); +void __ovld vstore_half8(float8 data, size_t offset, __global half *p); +void __ovld vstore_half16(float16 data, size_t offset, __global half *p); +void __ovld vstore_half2_rte(float2 data, size_t offset, __global half *p); +void __ovld vstore_half3_rte(float3 data, size_t offset, __global half *p); +void __ovld vstore_half4_rte(float4 data, size_t offset, __global half *p); +void __ovld vstore_half8_rte(float8 data, size_t offset, __global half *p); +void __ovld vstore_half16_rte(float16 data, size_t offset, __global half *p); +void __ovld vstore_half2_rtz(float2 data, size_t offset, __global half *p); +void __ovld vstore_half3_rtz(float3 data, size_t offset, __global half *p); +void __ovld vstore_half4_rtz(float4 data, size_t offset, __global half *p); +void __ovld vstore_half8_rtz(float8 data, size_t offset, __global half *p); +void __ovld vstore_half16_rtz(float16 data, size_t offset, __global half *p); +void __ovld vstore_half2_rtp(float2 data, size_t offset, __global half *p); +void __ovld vstore_half3_rtp(float3 data, size_t offset, __global half *p); +void __ovld vstore_half4_rtp(float4 data, size_t offset, __global half *p); +void __ovld vstore_half8_rtp(float8 data, size_t offset, __global half *p); +void __ovld vstore_half16_rtp(float16 data, size_t offset, __global half *p); +void __ovld vstore_half2_rtn(float2 data, size_t offset, __global half *p); +void __ovld vstore_half3_rtn(float3 data, size_t offset, __global half *p); +void __ovld vstore_half4_rtn(float4 data, size_t offset, __global half *p); +void __ovld vstore_half8_rtn(float8 data, size_t offset, __global half *p); +void __ovld vstore_half16_rtn(float16 data, size_t offset, __global half *p); +void __ovld vstore_half2(float2 data, size_t offset, __local half *p); +void __ovld vstore_half3(float3 data, size_t offset, __local half *p); +void __ovld vstore_half4(float4 data, size_t offset, __local half *p); +void __ovld vstore_half8(float8 data, size_t offset, __local half *p); +void __ovld vstore_half16(float16 data, size_t offset, __local half *p); +void __ovld vstore_half2_rte(float2 data, size_t offset, __local half *p); +void __ovld vstore_half3_rte(float3 data, size_t offset, __local half *p); +void __ovld vstore_half4_rte(float4 data, size_t offset, __local half *p); +void __ovld vstore_half8_rte(float8 data, size_t offset, __local half *p); +void __ovld vstore_half16_rte(float16 data, size_t offset, __local half *p); +void __ovld vstore_half2_rtz(float2 data, size_t offset, __local half *p); +void __ovld vstore_half3_rtz(float3 data, size_t offset, __local half *p); +void __ovld vstore_half4_rtz(float4 data, size_t offset, __local half *p); +void __ovld vstore_half8_rtz(float8 data, size_t offset, __local half *p); +void __ovld vstore_half16_rtz(float16 data, size_t offset, __local half *p); +void __ovld vstore_half2_rtp(float2 data, size_t offset, __local half *p); +void __ovld vstore_half3_rtp(float3 data, size_t offset, __local half *p); +void __ovld vstore_half4_rtp(float4 data, size_t offset, __local half *p); +void __ovld vstore_half8_rtp(float8 data, size_t offset, __local half *p); +void __ovld vstore_half16_rtp(float16 data, size_t offset, __local half *p); +void __ovld vstore_half2_rtn(float2 data, size_t offset, __local half *p); +void __ovld vstore_half3_rtn(float3 data, size_t offset, __local half *p); +void __ovld vstore_half4_rtn(float4 data, size_t offset, __local half *p); +void __ovld vstore_half8_rtn(float8 data, size_t offset, __local half *p); +void __ovld vstore_half16_rtn(float16 data, size_t offset, __local half *p); +void __ovld vstore_half2(float2 data, size_t offset, __private half *p); +void __ovld vstore_half3(float3 data, size_t offset, __private half *p); +void __ovld vstore_half4(float4 data, size_t offset, __private half *p); +void __ovld vstore_half8(float8 data, size_t offset, __private half *p); +void __ovld vstore_half16(float16 data, size_t offset, __private half *p); +void __ovld vstore_half2_rte(float2 data, size_t offset, __private half *p); +void __ovld vstore_half3_rte(float3 data, size_t offset, __private half *p); +void __ovld vstore_half4_rte(float4 data, size_t offset, __private half *p); +void __ovld vstore_half8_rte(float8 data, size_t offset, __private half *p); +void __ovld vstore_half16_rte(float16 data, size_t offset, __private half *p); +void __ovld vstore_half2_rtz(float2 data, size_t offset, __private half *p); +void __ovld vstore_half3_rtz(float3 data, size_t offset, __private half *p); +void __ovld vstore_half4_rtz(float4 data, size_t offset, __private half *p); +void __ovld vstore_half8_rtz(float8 data, size_t offset, __private half *p); +void __ovld vstore_half16_rtz(float16 data, size_t offset, __private half *p); +void __ovld vstore_half2_rtp(float2 data, size_t offset, __private half *p); +void __ovld vstore_half3_rtp(float3 data, size_t offset, __private half *p); +void __ovld vstore_half4_rtp(float4 data, size_t offset, __private half *p); +void __ovld vstore_half8_rtp(float8 data, size_t offset, __private half *p); +void __ovld vstore_half16_rtp(float16 data, size_t offset, __private half *p); +void __ovld vstore_half2_rtn(float2 data, size_t offset, __private half *p); +void __ovld vstore_half3_rtn(float3 data, size_t offset, __private half *p); +void __ovld vstore_half4_rtn(float4 data, size_t offset, __private half *p); +void __ovld vstore_half8_rtn(float8 data, size_t offset, __private half *p); +void __ovld vstore_half16_rtn(float16 data, size_t offset, __private half *p); +#ifdef cl_khr_fp64 +void __ovld vstore_half2(double2 data, size_t offset, __global half *p); +void __ovld vstore_half3(double3 data, size_t offset, __global half *p); +void __ovld vstore_half4(double4 data, size_t offset, __global half *p); +void __ovld vstore_half8(double8 data, size_t offset, __global half *p); +void __ovld vstore_half16(double16 data, size_t offset, __global half *p); +void __ovld vstore_half2_rte(double2 data, size_t offset, __global half *p); +void __ovld vstore_half3_rte(double3 data, size_t offset, __global half *p); +void __ovld vstore_half4_rte(double4 data, size_t offset, __global half *p); +void __ovld vstore_half8_rte(double8 data, size_t offset, __global half *p); +void __ovld vstore_half16_rte(double16 data, size_t offset, __global half *p); +void __ovld vstore_half2_rtz(double2 data, size_t offset, __global half *p); +void __ovld vstore_half3_rtz(double3 data, size_t offset, __global half *p); +void __ovld vstore_half4_rtz(double4 data, size_t offset, __global half *p); +void __ovld vstore_half8_rtz(double8 data, size_t offset, __global half *p); +void __ovld vstore_half16_rtz(double16 data, size_t offset, __global half *p); +void __ovld vstore_half2_rtp(double2 data, size_t offset, __global half *p); +void __ovld vstore_half3_rtp(double3 data, size_t offset, __global half *p); +void __ovld vstore_half4_rtp(double4 data, size_t offset, __global half *p); +void __ovld vstore_half8_rtp(double8 data, size_t offset, __global half *p); +void __ovld vstore_half16_rtp(double16 data, size_t offset, __global half *p); +void __ovld vstore_half2_rtn(double2 data, size_t offset, __global half *p); +void __ovld vstore_half3_rtn(double3 data, size_t offset, __global half *p); +void __ovld vstore_half4_rtn(double4 data, size_t offset, __global half *p); +void __ovld vstore_half8_rtn(double8 data, size_t offset, __global half *p); +void __ovld vstore_half16_rtn(double16 data, size_t offset, __global half *p); +void __ovld vstore_half2(double2 data, size_t offset, __local half *p); +void __ovld vstore_half3(double3 data, size_t offset, __local half *p); +void __ovld vstore_half4(double4 data, size_t offset, __local half *p); +void __ovld vstore_half8(double8 data, size_t offset, __local half *p); +void __ovld vstore_half16(double16 data, size_t offset, __local half *p); +void __ovld vstore_half2_rte(double2 data, size_t offset, __local half *p); +void __ovld vstore_half3_rte(double3 data, size_t offset, __local half *p); +void __ovld vstore_half4_rte(double4 data, size_t offset, __local half *p); +void __ovld vstore_half8_rte(double8 data, size_t offset, __local half *p); +void __ovld vstore_half16_rte(double16 data, size_t offset, __local half *p); +void __ovld vstore_half2_rtz(double2 data, size_t offset, __local half *p); +void __ovld vstore_half3_rtz(double3 data, size_t offset, __local half *p); +void __ovld vstore_half4_rtz(double4 data, size_t offset, __local half *p); +void __ovld vstore_half8_rtz(double8 data, size_t offset, __local half *p); +void __ovld vstore_half16_rtz(double16 data, size_t offset, __local half *p); +void __ovld vstore_half2_rtp(double2 data, size_t offset, __local half *p); +void __ovld vstore_half3_rtp(double3 data, size_t offset, __local half *p); +void __ovld vstore_half4_rtp(double4 data, size_t offset, __local half *p); +void __ovld vstore_half8_rtp(double8 data, size_t offset, __local half *p); +void __ovld vstore_half16_rtp(double16 data, size_t offset, __local half *p); +void __ovld vstore_half2_rtn(double2 data, size_t offset, __local half *p); +void __ovld vstore_half3_rtn(double3 data, size_t offset, __local half *p); +void __ovld vstore_half4_rtn(double4 data, size_t offset, __local half *p); +void __ovld vstore_half8_rtn(double8 data, size_t offset, __local half *p); +void __ovld vstore_half16_rtn(double16 data, size_t offset, __local half *p); +void __ovld vstore_half2(double2 data, size_t offset, __private half *p); +void __ovld vstore_half3(double3 data, size_t offset, __private half *p); +void __ovld vstore_half4(double4 data, size_t offset, __private half *p); +void __ovld vstore_half8(double8 data, size_t offset, __private half *p); +void __ovld vstore_half16(double16 data, size_t offset, __private half *p); +void __ovld vstore_half2_rte(double2 data, size_t offset, __private half *p); +void __ovld vstore_half3_rte(double3 data, size_t offset, __private half *p); +void __ovld vstore_half4_rte(double4 data, size_t offset, __private half *p); +void __ovld vstore_half8_rte(double8 data, size_t offset, __private half *p); +void __ovld vstore_half16_rte(double16 data, size_t offset, __private half *p); +void __ovld vstore_half2_rtz(double2 data, size_t offset, __private half *p); +void __ovld vstore_half3_rtz(double3 data, size_t offset, __private half *p); +void __ovld vstore_half4_rtz(double4 data, size_t offset, __private half *p); +void __ovld vstore_half8_rtz(double8 data, size_t offset, __private half *p); +void __ovld vstore_half16_rtz(double16 data, size_t offset, __private half *p); +void __ovld vstore_half2_rtp(double2 data, size_t offset, __private half *p); +void __ovld vstore_half3_rtp(double3 data, size_t offset, __private half *p); +void __ovld vstore_half4_rtp(double4 data, size_t offset, __private half *p); +void __ovld vstore_half8_rtp(double8 data, size_t offset, __private half *p); +void __ovld vstore_half16_rtp(double16 data, size_t offset, __private half *p); +void __ovld vstore_half2_rtn(double2 data, size_t offset, __private half *p); +void __ovld vstore_half3_rtn(double3 data, size_t offset, __private half *p); +void __ovld vstore_half4_rtn(double4 data, size_t offset, __private half *p); +void __ovld vstore_half8_rtn(double8 data, size_t offset, __private half *p); +void __ovld vstore_half16_rtn(double16 data, size_t offset, __private half *p); +#endif //cl_khr_fp64 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * For n = 1, 2, 4, 8 and 16 read sizeof (halfn) + * bytes of data from address (p + (offset * n)). + * The data read is interpreted as a halfn value. + * The halfn value read is converted to a floatn + * value and the floatn value is returned. + * The address computed as (p + (offset * n)) + * must be aligned to sizeof (halfn) bytes. + * For n = 3, vloada_half3 reads a half3 from + * address (p + (offset * 4)) and returns a float3. + * The address computed as (p + (offset * 4)) + * must be aligned to sizeof (half) * 4 bytes. + */ +float __ovld vloada_half(size_t offset, const __constant half *p); +float2 __ovld vloada_half2(size_t offset, const __constant half *p); +float3 __ovld vloada_half3(size_t offset, const __constant half *p); +float4 __ovld vloada_half4(size_t offset, const __constant half *p); +float8 __ovld vloada_half8(size_t offset, const __constant half *p); +float16 __ovld vloada_half16(size_t offset, const __constant half *p); +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +float __ovld vloada_half(size_t offset, const half *p); +float2 __ovld vloada_half2(size_t offset, const half *p); +float3 __ovld vloada_half3(size_t offset, const half *p); +float4 __ovld vloada_half4(size_t offset, const half *p); +float8 __ovld vloada_half8(size_t offset, const half *p); +float16 __ovld vloada_half16(size_t offset, const half *p); +#else +float __ovld vloada_half(size_t offset, const __global half *p); +float2 __ovld vloada_half2(size_t offset, const __global half *p); +float3 __ovld vloada_half3(size_t offset, const __global half *p); +float4 __ovld vloada_half4(size_t offset, const __global half *p); +float8 __ovld vloada_half8(size_t offset, const __global half *p); +float16 __ovld vloada_half16(size_t offset, const __global half *p); +float __ovld vloada_half(size_t offset, const __local half *p); +float2 __ovld vloada_half2(size_t offset, const __local half *p); +float3 __ovld vloada_half3(size_t offset, const __local half *p); +float4 __ovld vloada_half4(size_t offset, const __local half *p); +float8 __ovld vloada_half8(size_t offset, const __local half *p); +float16 __ovld vloada_half16(size_t offset, const __local half *p); +float __ovld vloada_half(size_t offset, const __private half *p); +float2 __ovld vloada_half2(size_t offset, const __private half *p); +float3 __ovld vloada_half3(size_t offset, const __private half *p); +float4 __ovld vloada_half4(size_t offset, const __private half *p); +float8 __ovld vloada_half8(size_t offset, const __private half *p); +float16 __ovld vloada_half16(size_t offset, const __private half *p); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * The floatn value given by data is converted to + * a halfn value using the appropriate rounding + * mode. + * For n = 1, 2, 4, 8 and 16, the halfn value is + * written to the address computed as (p + (offset + * * n)). The address computed as (p + (offset * + * n)) must be aligned to sizeof (halfn) bytes. + * For n = 3, the half3 value is written to the + * address computed as (p + (offset * 4)). The + * address computed as (p + (offset * 4)) must be + * aligned to sizeof (half) * 4 bytes. + * vstorea_halfn uses the current rounding + * mode. The default current rounding mode is + * round to nearest even. + */ +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld vstorea_half(float data, size_t offset, half *p); +void __ovld vstorea_half2(float2 data, size_t offset, half *p); +void __ovld vstorea_half3(float3 data, size_t offset, half *p); +void __ovld vstorea_half4(float4 data, size_t offset, half *p); +void __ovld vstorea_half8(float8 data, size_t offset, half *p); +void __ovld vstorea_half16(float16 data, size_t offset, half *p); + +void __ovld vstorea_half_rte(float data, size_t offset, half *p); +void __ovld vstorea_half2_rte(float2 data, size_t offset, half *p); +void __ovld vstorea_half3_rte(float3 data, size_t offset, half *p); +void __ovld vstorea_half4_rte(float4 data, size_t offset, half *p); +void __ovld vstorea_half8_rte(float8 data, size_t offset, half *p); +void __ovld vstorea_half16_rte(float16 data, size_t offset, half *p); + +void __ovld vstorea_half_rtz(float data, size_t offset, half *p); +void __ovld vstorea_half2_rtz(float2 data, size_t offset, half *p); +void __ovld vstorea_half3_rtz(float3 data, size_t offset, half *p); +void __ovld vstorea_half4_rtz(float4 data, size_t offset, half *p); +void __ovld vstorea_half8_rtz(float8 data, size_t offset, half *p); +void __ovld vstorea_half16_rtz(float16 data, size_t offset, half *p); + +void __ovld vstorea_half_rtp(float data, size_t offset, half *p); +void __ovld vstorea_half2_rtp(float2 data, size_t offset, half *p); +void __ovld vstorea_half3_rtp(float3 data, size_t offset, half *p); +void __ovld vstorea_half4_rtp(float4 data, size_t offset, half *p); +void __ovld vstorea_half8_rtp(float8 data, size_t offset, half *p); +void __ovld vstorea_half16_rtp(float16 data, size_t offset, half *p); + +void __ovld vstorea_half_rtn(float data, size_t offset, half *p); +void __ovld vstorea_half2_rtn(float2 data, size_t offset, half *p); +void __ovld vstorea_half3_rtn(float3 data, size_t offset, half *p); +void __ovld vstorea_half4_rtn(float4 data, size_t offset, half *p); +void __ovld vstorea_half8_rtn(float8 data, size_t offset, half *p); +void __ovld vstorea_half16_rtn(float16 data, size_t offset, half *p); + +#ifdef cl_khr_fp64 +void __ovld vstorea_half(double data, size_t offset, half *p); +void __ovld vstorea_half2(double2 data, size_t offset, half *p); +void __ovld vstorea_half3(double3 data, size_t offset, half *p); +void __ovld vstorea_half4(double4 data, size_t offset, half *p); +void __ovld vstorea_half8(double8 data, size_t offset, half *p); +void __ovld vstorea_half16(double16 data, size_t offset, half *p); + +void __ovld vstorea_half_rte(double data, size_t offset, half *p); +void __ovld vstorea_half2_rte(double2 data, size_t offset, half *p); +void __ovld vstorea_half3_rte(double3 data, size_t offset, half *p); +void __ovld vstorea_half4_rte(double4 data, size_t offset, half *p); +void __ovld vstorea_half8_rte(double8 data, size_t offset, half *p); +void __ovld vstorea_half16_rte(double16 data, size_t offset, half *p); + +void __ovld vstorea_half_rtz(double data, size_t offset, half *p); +void __ovld vstorea_half2_rtz(double2 data, size_t offset, half *p); +void __ovld vstorea_half3_rtz(double3 data, size_t offset, half *p); +void __ovld vstorea_half4_rtz(double4 data, size_t offset, half *p); +void __ovld vstorea_half8_rtz(double8 data, size_t offset, half *p); +void __ovld vstorea_half16_rtz(double16 data, size_t offset, half *p); + +void __ovld vstorea_half_rtp(double data, size_t offset, half *p); +void __ovld vstorea_half2_rtp(double2 data, size_t offset, half *p); +void __ovld vstorea_half3_rtp(double3 data, size_t offset, half *p); +void __ovld vstorea_half4_rtp(double4 data, size_t offset, half *p); +void __ovld vstorea_half8_rtp(double8 data, size_t offset, half *p); +void __ovld vstorea_half16_rtp(double16 data, size_t offset, half *p); + +void __ovld vstorea_half_rtn(double data, size_t offset, half *p); +void __ovld vstorea_half2_rtn(double2 data, size_t offset, half *p); +void __ovld vstorea_half3_rtn(double3 data, size_t offset, half *p); +void __ovld vstorea_half4_rtn(double4 data, size_t offset, half *p); +void __ovld vstorea_half8_rtn(double8 data, size_t offset, half *p); +void __ovld vstorea_half16_rtn(double16 data, size_t offset, half *p); +#endif //cl_khr_fp64 + +#else +void __ovld vstorea_half(float data, size_t offset, __global half *p); +void __ovld vstorea_half2(float2 data, size_t offset, __global half *p); +void __ovld vstorea_half3(float3 data, size_t offset, __global half *p); +void __ovld vstorea_half4(float4 data, size_t offset, __global half *p); +void __ovld vstorea_half8(float8 data, size_t offset, __global half *p); +void __ovld vstorea_half16(float16 data, size_t offset, __global half *p); + +void __ovld vstorea_half_rte(float data, size_t offset, __global half *p); +void __ovld vstorea_half2_rte(float2 data, size_t offset, __global half *p); +void __ovld vstorea_half3_rte(float3 data, size_t offset, __global half *p); +void __ovld vstorea_half4_rte(float4 data, size_t offset, __global half *p); +void __ovld vstorea_half8_rte(float8 data, size_t offset, __global half *p); +void __ovld vstorea_half16_rte(float16 data, size_t offset, __global half *p); + +void __ovld vstorea_half_rtz(float data, size_t offset, __global half *p); +void __ovld vstorea_half2_rtz(float2 data, size_t offset, __global half *p); +void __ovld vstorea_half3_rtz(float3 data, size_t offset, __global half *p); +void __ovld vstorea_half4_rtz(float4 data, size_t offset, __global half *p); +void __ovld vstorea_half8_rtz(float8 data, size_t offset, __global half *p); +void __ovld vstorea_half16_rtz(float16 data, size_t offset, __global half *p); + +void __ovld vstorea_half_rtp(float data, size_t offset, __global half *p); +void __ovld vstorea_half2_rtp(float2 data, size_t offset, __global half *p); +void __ovld vstorea_half3_rtp(float3 data, size_t offset, __global half *p); +void __ovld vstorea_half4_rtp(float4 data, size_t offset, __global half *p); +void __ovld vstorea_half8_rtp(float8 data, size_t offset, __global half *p); +void __ovld vstorea_half16_rtp(float16 data, size_t offset, __global half *p); + +void __ovld vstorea_half_rtn(float data, size_t offset, __global half *p); +void __ovld vstorea_half2_rtn(float2 data, size_t offset, __global half *p); +void __ovld vstorea_half3_rtn(float3 data, size_t offset, __global half *p); +void __ovld vstorea_half4_rtn(float4 data, size_t offset, __global half *p); +void __ovld vstorea_half8_rtn(float8 data, size_t offset, __global half *p); +void __ovld vstorea_half16_rtn(float16 data, size_t offset, __global half *p); + +void __ovld vstorea_half(float data, size_t offset, __local half *p); +void __ovld vstorea_half2(float2 data, size_t offset, __local half *p); +void __ovld vstorea_half3(float3 data, size_t offset, __local half *p); +void __ovld vstorea_half4(float4 data, size_t offset, __local half *p); +void __ovld vstorea_half8(float8 data, size_t offset, __local half *p); +void __ovld vstorea_half16(float16 data, size_t offset, __local half *p); + +void __ovld vstorea_half_rte(float data, size_t offset, __local half *p); +void __ovld vstorea_half2_rte(float2 data, size_t offset, __local half *p); +void __ovld vstorea_half3_rte(float3 data, size_t offset, __local half *p); +void __ovld vstorea_half4_rte(float4 data, size_t offset, __local half *p); +void __ovld vstorea_half8_rte(float8 data, size_t offset, __local half *p); +void __ovld vstorea_half16_rte(float16 data, size_t offset, __local half *p); + +void __ovld vstorea_half_rtz(float data, size_t offset, __local half *p); +void __ovld vstorea_half2_rtz(float2 data, size_t offset, __local half *p); +void __ovld vstorea_half3_rtz(float3 data, size_t offset, __local half *p); +void __ovld vstorea_half4_rtz(float4 data, size_t offset, __local half *p); +void __ovld vstorea_half8_rtz(float8 data, size_t offset, __local half *p); +void __ovld vstorea_half16_rtz(float16 data, size_t offset, __local half *p); + +void __ovld vstorea_half_rtp(float data, size_t offset, __local half *p); +void __ovld vstorea_half2_rtp(float2 data, size_t offset, __local half *p); +void __ovld vstorea_half3_rtp(float3 data, size_t offset, __local half *p); +void __ovld vstorea_half4_rtp(float4 data, size_t offset, __local half *p); +void __ovld vstorea_half8_rtp(float8 data, size_t offset, __local half *p); +void __ovld vstorea_half16_rtp(float16 data, size_t offset, __local half *p); + +void __ovld vstorea_half_rtn(float data, size_t offset, __local half *p); +void __ovld vstorea_half2_rtn(float2 data, size_t offset, __local half *p); +void __ovld vstorea_half3_rtn(float3 data, size_t offset, __local half *p); +void __ovld vstorea_half4_rtn(float4 data, size_t offset, __local half *p); +void __ovld vstorea_half8_rtn(float8 data, size_t offset, __local half *p); +void __ovld vstorea_half16_rtn(float16 data, size_t offset, __local half *p); + +void __ovld vstorea_half(float data, size_t offset, __private half *p); +void __ovld vstorea_half2(float2 data, size_t offset, __private half *p); +void __ovld vstorea_half3(float3 data, size_t offset, __private half *p); +void __ovld vstorea_half4(float4 data, size_t offset, __private half *p); +void __ovld vstorea_half8(float8 data, size_t offset, __private half *p); +void __ovld vstorea_half16(float16 data, size_t offset, __private half *p); + +void __ovld vstorea_half_rte(float data, size_t offset, __private half *p); +void __ovld vstorea_half2_rte(float2 data, size_t offset, __private half *p); +void __ovld vstorea_half3_rte(float3 data, size_t offset, __private half *p); +void __ovld vstorea_half4_rte(float4 data, size_t offset, __private half *p); +void __ovld vstorea_half8_rte(float8 data, size_t offset, __private half *p); +void __ovld vstorea_half16_rte(float16 data, size_t offset, __private half *p); + +void __ovld vstorea_half_rtz(float data, size_t offset, __private half *p); +void __ovld vstorea_half2_rtz(float2 data, size_t offset, __private half *p); +void __ovld vstorea_half3_rtz(float3 data, size_t offset, __private half *p); +void __ovld vstorea_half4_rtz(float4 data, size_t offset, __private half *p); +void __ovld vstorea_half8_rtz(float8 data, size_t offset, __private half *p); +void __ovld vstorea_half16_rtz(float16 data, size_t offset, __private half *p); + +void __ovld vstorea_half_rtp(float data, size_t offset, __private half *p); +void __ovld vstorea_half2_rtp(float2 data, size_t offset, __private half *p); +void __ovld vstorea_half3_rtp(float3 data, size_t offset, __private half *p); +void __ovld vstorea_half4_rtp(float4 data, size_t offset, __private half *p); +void __ovld vstorea_half8_rtp(float8 data, size_t offset, __private half *p); +void __ovld vstorea_half16_rtp(float16 data, size_t offset, __private half *p); + +void __ovld vstorea_half_rtn(float data, size_t offset, __private half *p); +void __ovld vstorea_half2_rtn(float2 data, size_t offset, __private half *p); +void __ovld vstorea_half3_rtn(float3 data, size_t offset, __private half *p); +void __ovld vstorea_half4_rtn(float4 data, size_t offset, __private half *p); +void __ovld vstorea_half8_rtn(float8 data, size_t offset, __private half *p); +void __ovld vstorea_half16_rtn(float16 data, size_t offset, __private half *p); + +#ifdef cl_khr_fp64 +void __ovld vstorea_half(double data, size_t offset, __global half *p); +void __ovld vstorea_half2(double2 data, size_t offset, __global half *p); +void __ovld vstorea_half3(double3 data, size_t offset, __global half *p); +void __ovld vstorea_half4(double4 data, size_t offset, __global half *p); +void __ovld vstorea_half8(double8 data, size_t offset, __global half *p); +void __ovld vstorea_half16(double16 data, size_t offset, __global half *p); + +void __ovld vstorea_half_rte(double data, size_t offset, __global half *p); +void __ovld vstorea_half2_rte(double2 data, size_t offset, __global half *p); +void __ovld vstorea_half3_rte(double3 data, size_t offset, __global half *p); +void __ovld vstorea_half4_rte(double4 data, size_t offset, __global half *p); +void __ovld vstorea_half8_rte(double8 data, size_t offset, __global half *p); +void __ovld vstorea_half16_rte(double16 data, size_t offset, __global half *p); + +void __ovld vstorea_half_rtz(double data, size_t offset, __global half *p); +void __ovld vstorea_half2_rtz(double2 data, size_t offset, __global half *p); +void __ovld vstorea_half3_rtz(double3 data, size_t offset, __global half *p); +void __ovld vstorea_half4_rtz(double4 data, size_t offset, __global half *p); +void __ovld vstorea_half8_rtz(double8 data, size_t offset, __global half *p); +void __ovld vstorea_half16_rtz(double16 data, size_t offset, __global half *p); + +void __ovld vstorea_half_rtp(double data, size_t offset, __global half *p); +void __ovld vstorea_half2_rtp(double2 data, size_t offset, __global half *p); +void __ovld vstorea_half3_rtp(double3 data, size_t offset, __global half *p); +void __ovld vstorea_half4_rtp(double4 data, size_t offset, __global half *p); +void __ovld vstorea_half8_rtp(double8 data, size_t offset, __global half *p); +void __ovld vstorea_half16_rtp(double16 data, size_t offset, __global half *p); + +void __ovld vstorea_half_rtn(double data, size_t offset, __global half *p); +void __ovld vstorea_half2_rtn(double2 data, size_t offset, __global half *p); +void __ovld vstorea_half3_rtn(double3 data, size_t offset, __global half *p); +void __ovld vstorea_half4_rtn(double4 data, size_t offset, __global half *p); +void __ovld vstorea_half8_rtn(double8 data, size_t offset, __global half *p); +void __ovld vstorea_half16_rtn(double16 data, size_t offset, __global half *p); + +void __ovld vstorea_half(double data, size_t offset, __local half *p); +void __ovld vstorea_half2(double2 data, size_t offset, __local half *p); +void __ovld vstorea_half3(double3 data, size_t offset, __local half *p); +void __ovld vstorea_half4(double4 data, size_t offset, __local half *p); +void __ovld vstorea_half8(double8 data, size_t offset, __local half *p); +void __ovld vstorea_half16(double16 data, size_t offset, __local half *p); + +void __ovld vstorea_half_rte(double data, size_t offset, __local half *p); +void __ovld vstorea_half2_rte(double2 data, size_t offset, __local half *p); +void __ovld vstorea_half3_rte(double3 data, size_t offset, __local half *p); +void __ovld vstorea_half4_rte(double4 data, size_t offset, __local half *p); +void __ovld vstorea_half8_rte(double8 data, size_t offset, __local half *p); +void __ovld vstorea_half16_rte(double16 data, size_t offset, __local half *p); + +void __ovld vstorea_half_rtz(double data, size_t offset, __local half *p); +void __ovld vstorea_half2_rtz(double2 data, size_t offset, __local half *p); +void __ovld vstorea_half3_rtz(double3 data, size_t offset, __local half *p); +void __ovld vstorea_half4_rtz(double4 data, size_t offset, __local half *p); +void __ovld vstorea_half8_rtz(double8 data, size_t offset, __local half *p); +void __ovld vstorea_half16_rtz(double16 data, size_t offset, __local half *p); + +void __ovld vstorea_half_rtp(double data, size_t offset, __local half *p); +void __ovld vstorea_half2_rtp(double2 data, size_t offset, __local half *p); +void __ovld vstorea_half3_rtp(double3 data, size_t offset, __local half *p); +void __ovld vstorea_half4_rtp(double4 data, size_t offset, __local half *p); +void __ovld vstorea_half8_rtp(double8 data, size_t offset, __local half *p); +void __ovld vstorea_half16_rtp(double16 data, size_t offset, __local half *p); + +void __ovld vstorea_half_rtn(double data, size_t offset, __local half *p); +void __ovld vstorea_half2_rtn(double2 data, size_t offset, __local half *p); +void __ovld vstorea_half3_rtn(double3 data, size_t offset, __local half *p); +void __ovld vstorea_half4_rtn(double4 data, size_t offset, __local half *p); +void __ovld vstorea_half8_rtn(double8 data, size_t offset, __local half *p); +void __ovld vstorea_half16_rtn(double16 data, size_t offset, __local half *p); + +void __ovld vstorea_half(double data, size_t offset, __private half *p); +void __ovld vstorea_half2(double2 data, size_t offset, __private half *p); +void __ovld vstorea_half3(double3 data, size_t offset, __private half *p); +void __ovld vstorea_half4(double4 data, size_t offset, __private half *p); +void __ovld vstorea_half8(double8 data, size_t offset, __private half *p); +void __ovld vstorea_half16(double16 data, size_t offset, __private half *p); + +void __ovld vstorea_half_rte(double data, size_t offset, __private half *p); +void __ovld vstorea_half2_rte(double2 data, size_t offset, __private half *p); +void __ovld vstorea_half3_rte(double3 data, size_t offset, __private half *p); +void __ovld vstorea_half4_rte(double4 data, size_t offset, __private half *p); +void __ovld vstorea_half8_rte(double8 data, size_t offset, __private half *p); +void __ovld vstorea_half16_rte(double16 data, size_t offset, __private half *p); + +void __ovld vstorea_half_rtz(double data, size_t offset, __private half *p); +void __ovld vstorea_half2_rtz(double2 data, size_t offset, __private half *p); +void __ovld vstorea_half3_rtz(double3 data, size_t offset, __private half *p); +void __ovld vstorea_half4_rtz(double4 data, size_t offset, __private half *p); +void __ovld vstorea_half8_rtz(double8 data, size_t offset, __private half *p); +void __ovld vstorea_half16_rtz(double16 data, size_t offset, __private half *p); + +void __ovld vstorea_half_rtp(double data, size_t offset, __private half *p); +void __ovld vstorea_half2_rtp(double2 data, size_t offset, __private half *p); +void __ovld vstorea_half3_rtp(double3 data, size_t offset, __private half *p); +void __ovld vstorea_half4_rtp(double4 data, size_t offset, __private half *p); +void __ovld vstorea_half8_rtp(double8 data, size_t offset, __private half *p); +void __ovld vstorea_half16_rtp(double16 data, size_t offset, __private half *p); + +void __ovld vstorea_half_rtn(double data, size_t offset, __private half *p); +void __ovld vstorea_half2_rtn(double2 data,size_t offset, __private half *p); +void __ovld vstorea_half3_rtn(double3 data,size_t offset, __private half *p); +void __ovld vstorea_half4_rtn(double4 data,size_t offset, __private half *p); +void __ovld vstorea_half8_rtn(double8 data,size_t offset, __private half *p); +void __ovld vstorea_half16_rtn(double16 data,size_t offset, __private half *p); +#endif //cl_khr_fp64 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v1.1 s6.11.8, v1.2 s6.12.8, v2.0 s6.13.8 - Synchronization Functions + +/** + * All work-items in a work-group executing the kernel + * on a processor must execute this function before any + * are allowed to continue execution beyond the barrier. + * This function must be encountered by all work-items in + * a work-group executing the kernel. + * If barrier is inside a conditional statement, then all + * work-items must enter the conditional if any work-item + * enters the conditional statement and executes the + * barrier. + * If barrer is inside a loop, all work-items must execute + * the barrier for each iteration of the loop before any are + * allowed to continue execution beyond the barrier. + * The barrier function also queues a memory fence + * (reads and writes) to ensure correct ordering of + * memory operations to local or global memory. + * The flags argument specifies the memory address space + * and can be set to a combination of the following literal + * values. + * CLK_LOCAL_MEM_FENCE - The barrier function + * will either flush any variables stored in local memory + * or queue a memory fence to ensure correct ordering of + * memory operations to local memory. + * CLK_GLOBAL_MEM_FENCE - The barrier function + * will queue a memory fence to ensure correct ordering + * of memory operations to global memory. This can be + * useful when work-items, for example, write to buffer or + * image objects and then want to read the updated data. + */ + +void __ovld __conv barrier(cl_mem_fence_flags flags); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld __conv work_group_barrier(cl_mem_fence_flags flags, memory_scope scope); +void __ovld __conv work_group_barrier(cl_mem_fence_flags flags); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v1.1 s6.11.9, v1.2 s6.12.9 - Explicit Memory Fence Functions + +/** + * Orders loads and stores of a work-item + * executing a kernel. This means that loads + * and stores preceding the mem_fence will + * be committed to memory before any loads + * and stores following the mem_fence. + * The flags argument specifies the memory + * address space and can be set to a + * combination of the following literal + * values: + * CLK_LOCAL_MEM_FENCE + * CLK_GLOBAL_MEM_FENCE. + */ +void __ovld mem_fence(cl_mem_fence_flags flags); + +/** + * Read memory barrier that orders only + * loads. + * The flags argument specifies the memory + * address space and can be set to a + * combination of the following literal + * values: + * CLK_LOCAL_MEM_FENCE + * CLK_GLOBAL_MEM_FENCE. + */ +void __ovld read_mem_fence(cl_mem_fence_flags flags); + +/** + * Write memory barrier that orders only + * stores. + * The flags argument specifies the memory + * address space and can be set to a + * combination of the following literal + * values: + * CLK_LOCAL_MEM_FENCE + * CLK_GLOBAL_MEM_FENCE. + */ +void __ovld write_mem_fence(cl_mem_fence_flags flags); + +// OpenCL v2.0 s6.13.9 - Address Space Qualifier Functions + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +cl_mem_fence_flags __ovld get_fence(const void *ptr); +cl_mem_fence_flags __ovld get_fence(void *ptr); + +/** + * Builtin functions to_global, to_local, and to_private need to be declared as Clang builtin functions + * and checked in Sema since they should be declared as + * addr gentype* to_addr (gentype*); + * where gentype is builtin type or user defined type. + */ + +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v1.1 s6.11.10, v1.2 s6.12.10, v2.0 s6.13.10 - Async Copies from Global to Local Memory, Local to Global Memory, and Prefetch + +/** + * event_t async_work_group_copy ( + * __global gentype *dst, + * const __local gentype *src, + * size_t num_elements, + * event_t event) + * Perform an async copy of num_elements + * gentype elements from src to dst. The async + * copy is performed by all work-items in a workgroup + * and this built-in function must therefore + * be encountered by all work-items in a workgroup + * executing the kernel with the same + * argument values; otherwise the results are + * undefined. + * Returns an event object that can be used by + * wait_group_events to wait for the async copy + * to finish. The event argument can also be used + * to associate the async_work_group_copy with + * a previous async copy allowing an event to be + * shared by multiple async copies; otherwise event + * should be zero. + * If event argument is non-zero, the event object + * supplied in event argument will be returned. + * This function does not perform any implicit + * synchronization of source data such as using a + * barrier before performing the copy. + */ +event_t __ovld async_work_group_copy(__local char *dst, const __global char *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uchar *dst, const __global uchar *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local short *dst, const __global short *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ushort *dst, const __global ushort *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local int *dst, const __global int *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uint *dst, const __global uint *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local long *dst, const __global long *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ulong *dst, const __global ulong *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local float *dst, const __global float *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local char2 *dst, const __global char2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uchar2 *dst, const __global uchar2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local short2 *dst, const __global short2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ushort2 *dst, const __global ushort2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local int2 *dst, const __global int2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uint2 *dst, const __global uint2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local long2 *dst, const __global long2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ulong2 *dst, const __global ulong2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local float2 *dst, const __global float2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local char3 *dst, const __global char3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uchar3 *dst, const __global uchar3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local short3 *dst, const __global short3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ushort3 *dst, const __global ushort3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local int3 *dst, const __global int3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uint3 *dst, const __global uint3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local long3 *dst, const __global long3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ulong3 *dst, const __global ulong3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local float3 *dst, const __global float3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local char4 *dst, const __global char4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uchar4 *dst, const __global uchar4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local short4 *dst, const __global short4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ushort4 *dst, const __global ushort4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local int4 *dst, const __global int4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uint4 *dst, const __global uint4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local long4 *dst, const __global long4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ulong4 *dst, const __global ulong4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local float4 *dst, const __global float4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local char8 *dst, const __global char8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uchar8 *dst, const __global uchar8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local short8 *dst, const __global short8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ushort8 *dst, const __global ushort8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local int8 *dst, const __global int8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uint8 *dst, const __global uint8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local long8 *dst, const __global long8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ulong8 *dst, const __global ulong8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local float8 *dst, const __global float8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local char16 *dst, const __global char16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uchar16 *dst, const __global uchar16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local short16 *dst, const __global short16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ushort16 *dst, const __global ushort16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local int16 *dst, const __global int16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local uint16 *dst, const __global uint16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local long16 *dst, const __global long16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local ulong16 *dst, const __global ulong16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local float16 *dst, const __global float16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global char *dst, const __local char *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uchar *dst, const __local uchar *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global short *dst, const __local short *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ushort *dst, const __local ushort *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global int *dst, const __local int *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uint *dst, const __local uint *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global long *dst, const __local long *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ulong *dst, const __local ulong *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global float *dst, const __local float *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global char2 *dst, const __local char2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uchar2 *dst, const __local uchar2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global short2 *dst, const __local short2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ushort2 *dst, const __local ushort2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global int2 *dst, const __local int2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uint2 *dst, const __local uint2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global long2 *dst, const __local long2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ulong2 *dst, const __local ulong2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global float2 *dst, const __local float2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global char3 *dst, const __local char3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uchar3 *dst, const __local uchar3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global short3 *dst, const __local short3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ushort3 *dst, const __local ushort3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global int3 *dst, const __local int3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uint3 *dst, const __local uint3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global long3 *dst, const __local long3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ulong3 *dst, const __local ulong3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global float3 *dst, const __local float3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global char4 *dst, const __local char4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uchar4 *dst, const __local uchar4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global short4 *dst, const __local short4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ushort4 *dst, const __local ushort4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global int4 *dst, const __local int4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uint4 *dst, const __local uint4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global long4 *dst, const __local long4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ulong4 *dst, const __local ulong4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global float4 *dst, const __local float4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global char8 *dst, const __local char8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uchar8 *dst, const __local uchar8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global short8 *dst, const __local short8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ushort8 *dst, const __local ushort8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global int8 *dst, const __local int8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uint8 *dst, const __local uint8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global long8 *dst, const __local long8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ulong8 *dst, const __local ulong8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global float8 *dst, const __local float8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global char16 *dst, const __local char16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uchar16 *dst, const __local uchar16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global short16 *dst, const __local short16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ushort16 *dst, const __local ushort16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global int16 *dst, const __local int16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global uint16 *dst, const __local uint16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global long16 *dst, const __local long16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global ulong16 *dst, const __local ulong16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global float16 *dst, const __local float16 *src, size_t num_elements, event_t event); +#ifdef cl_khr_fp64 +event_t __ovld async_work_group_copy(__local double *dst, const __global double *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local double2 *dst, const __global double2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local double3 *dst, const __global double3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local double4 *dst, const __global double4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local double8 *dst, const __global double8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local double16 *dst, const __global double16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global double *dst, const __local double *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global double2 *dst, const __local double2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global double3 *dst, const __local double3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global double4 *dst, const __local double4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global double8 *dst, const __local double8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global double16 *dst, const __local double16 *src, size_t num_elements, event_t event); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +event_t __ovld async_work_group_copy(__local half *dst, const __global half *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local half2 *dst, const __global half2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local half3 *dst, const __global half3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local half4 *dst, const __global half4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local half8 *dst, const __global half8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__local half16 *dst, const __global half16 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global half *dst, const __local half *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global half2 *dst, const __local half2 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global half3 *dst, const __local half3 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global half4 *dst, const __local half4 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global half8 *dst, const __local half8 *src, size_t num_elements, event_t event); +event_t __ovld async_work_group_copy(__global half16 *dst, const __local half16 *src, size_t num_elements, event_t event); +#endif //cl_khr_fp16 + +/** + * Perform an async gather of num_elements + * gentype elements from src to dst. The + * src_stride is the stride in elements for each + * gentype element read from src. The dst_stride + * is the stride in elements for each gentype + * element written to dst. The async gather is + * performed by all work-items in a work-group. + * This built-in function must therefore be + * encountered by all work-items in a work-group + * executing the kernel with the same argument + * values; otherwise the results are undefined. + * Returns an event object that can be used by + * wait_group_events to wait for the async copy + * to finish. The event argument can also be used + * to associate the + * async_work_group_strided_copy with a + * previous async copy allowing an event to be + * shared by multiple async copies; otherwise event + * should be zero. + * If event argument is non-zero, the event object + * supplied in event argument will be returned. + * This function does not perform any implicit + * synchronization of source data such as using a + * barrier before performing the copy. + */ +event_t __ovld async_work_group_strided_copy(__local char *dst, const __global char *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uchar *dst, const __global uchar *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local short *dst, const __global short *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ushort *dst, const __global ushort *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local int *dst, const __global int *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uint *dst, const __global uint *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local long *dst, const __global long *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ulong *dst, const __global ulong *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local float *dst, const __global float *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local char2 *dst, const __global char2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uchar2 *dst, const __global uchar2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local short2 *dst, const __global short2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ushort2 *dst, const __global ushort2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local int2 *dst, const __global int2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uint2 *dst, const __global uint2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local long2 *dst, const __global long2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ulong2 *dst, const __global ulong2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local float2 *dst, const __global float2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local char3 *dst, const __global char3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uchar3 *dst, const __global uchar3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local short3 *dst, const __global short3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ushort3 *dst, const __global ushort3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local int3 *dst, const __global int3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uint3 *dst, const __global uint3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local long3 *dst, const __global long3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ulong3 *dst, const __global ulong3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local float3 *dst, const __global float3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local char4 *dst, const __global char4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uchar4 *dst, const __global uchar4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local short4 *dst, const __global short4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ushort4 *dst, const __global ushort4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local int4 *dst, const __global int4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uint4 *dst, const __global uint4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local long4 *dst, const __global long4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ulong4 *dst, const __global ulong4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local float4 *dst, const __global float4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local char8 *dst, const __global char8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uchar8 *dst, const __global uchar8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local short8 *dst, const __global short8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ushort8 *dst, const __global ushort8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local int8 *dst, const __global int8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uint8 *dst, const __global uint8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local long8 *dst, const __global long8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ulong8 *dst, const __global ulong8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local float8 *dst, const __global float8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local char16 *dst, const __global char16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uchar16 *dst, const __global uchar16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local short16 *dst, const __global short16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ushort16 *dst, const __global ushort16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local int16 *dst, const __global int16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local uint16 *dst, const __global uint16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local long16 *dst, const __global long16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local ulong16 *dst, const __global ulong16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local float16 *dst, const __global float16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global char *dst, const __local char *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uchar *dst, const __local uchar *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global short *dst, const __local short *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ushort *dst, const __local ushort *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global int *dst, const __local int *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uint *dst, const __local uint *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global long *dst, const __local long *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ulong *dst, const __local ulong *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global float *dst, const __local float *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global char2 *dst, const __local char2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uchar2 *dst, const __local uchar2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global short2 *dst, const __local short2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ushort2 *dst, const __local ushort2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global int2 *dst, const __local int2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uint2 *dst, const __local uint2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global long2 *dst, const __local long2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ulong2 *dst, const __local ulong2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global float2 *dst, const __local float2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global char3 *dst, const __local char3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uchar3 *dst, const __local uchar3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global short3 *dst, const __local short3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ushort3 *dst, const __local ushort3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global int3 *dst, const __local int3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uint3 *dst, const __local uint3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global long3 *dst, const __local long3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ulong3 *dst, const __local ulong3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global float3 *dst, const __local float3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global char4 *dst, const __local char4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uchar4 *dst, const __local uchar4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global short4 *dst, const __local short4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ushort4 *dst, const __local ushort4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global int4 *dst, const __local int4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uint4 *dst, const __local uint4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global long4 *dst, const __local long4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ulong4 *dst, const __local ulong4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global float4 *dst, const __local float4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global char8 *dst, const __local char8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uchar8 *dst, const __local uchar8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global short8 *dst, const __local short8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ushort8 *dst, const __local ushort8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global int8 *dst, const __local int8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uint8 *dst, const __local uint8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global long8 *dst, const __local long8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ulong8 *dst, const __local ulong8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global float8 *dst, const __local float8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global char16 *dst, const __local char16 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uchar16 *dst, const __local uchar16 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global short16 *dst, const __local short16 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ushort16 *dst, const __local ushort16 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global int16 *dst, const __local int16 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global uint16 *dst, const __local uint16 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global long16 *dst, const __local long16 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global ulong16 *dst, const __local ulong16 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global float16 *dst, const __local float16 *src, size_t num_elements, size_t dst_stride, event_t event); +#ifdef cl_khr_fp64 +event_t __ovld async_work_group_strided_copy(__local double *dst, const __global double *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local double2 *dst, const __global double2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local double3 *dst, const __global double3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local double4 *dst, const __global double4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local double8 *dst, const __global double8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local double16 *dst, const __global double16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global double *dst, const __local double *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global double2 *dst, const __local double2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global double3 *dst, const __local double3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global double4 *dst, const __local double4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global double8 *dst, const __local double8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global double16 *dst, const __local double16 *src, size_t num_elements, size_t dst_stride, event_t event); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +event_t __ovld async_work_group_strided_copy(__local half *dst, const __global half *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local half2 *dst, const __global half2 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local half3 *dst, const __global half3 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local half4 *dst, const __global half4 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local half8 *dst, const __global half8 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__local half16 *dst, const __global half16 *src, size_t num_elements, size_t src_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global half *dst, const __local half *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global half2 *dst, const __local half2 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global half3 *dst, const __local half3 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global half4 *dst, const __local half4 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global half8 *dst, const __local half8 *src, size_t num_elements, size_t dst_stride, event_t event); +event_t __ovld async_work_group_strided_copy(__global half16 *dst, const __local half16 *src, size_t num_elements, size_t dst_stride, event_t event); +#endif //cl_khr_fp16 + +/** + * Wait for events that identify the + * async_work_group_copy operations to + * complete. The event objects specified in + * event_list will be released after the wait is + * performed. + * This function must be encountered by all workitems + * in a work-group executing the kernel with + * the same num_events and event objects specified + * in event_list; otherwise the results are undefined. + */ +void __ovld wait_group_events(int num_events, event_t *event_list); + +/** + * Prefetch num_elements * sizeof(gentype) + * bytes into the global cache. The prefetch + * instruction is applied to a work-item in a workgroup + * and does not affect the functional + * behavior of the kernel. + */ +void __ovld prefetch(const __global char *p, size_t num_elements); +void __ovld prefetch(const __global uchar *p, size_t num_elements); +void __ovld prefetch(const __global short *p, size_t num_elements); +void __ovld prefetch(const __global ushort *p, size_t num_elements); +void __ovld prefetch(const __global int *p, size_t num_elements); +void __ovld prefetch(const __global uint *p, size_t num_elements); +void __ovld prefetch(const __global long *p, size_t num_elements); +void __ovld prefetch(const __global ulong *p, size_t num_elements); +void __ovld prefetch(const __global float *p, size_t num_elements); +void __ovld prefetch(const __global char2 *p, size_t num_elements); +void __ovld prefetch(const __global uchar2 *p, size_t num_elements); +void __ovld prefetch(const __global short2 *p, size_t num_elements); +void __ovld prefetch(const __global ushort2 *p, size_t num_elements); +void __ovld prefetch(const __global int2 *p, size_t num_elements); +void __ovld prefetch(const __global uint2 *p, size_t num_elements); +void __ovld prefetch(const __global long2 *p, size_t num_elements); +void __ovld prefetch(const __global ulong2 *p, size_t num_elements); +void __ovld prefetch(const __global float2 *p, size_t num_elements); +void __ovld prefetch(const __global char3 *p, size_t num_elements); +void __ovld prefetch(const __global uchar3 *p, size_t num_elements); +void __ovld prefetch(const __global short3 *p, size_t num_elements); +void __ovld prefetch(const __global ushort3 *p, size_t num_elements); +void __ovld prefetch(const __global int3 *p, size_t num_elements); +void __ovld prefetch(const __global uint3 *p, size_t num_elements); +void __ovld prefetch(const __global long3 *p, size_t num_elements); +void __ovld prefetch(const __global ulong3 *p, size_t num_elements); +void __ovld prefetch(const __global float3 *p, size_t num_elements); +void __ovld prefetch(const __global char4 *p, size_t num_elements); +void __ovld prefetch(const __global uchar4 *p, size_t num_elements); +void __ovld prefetch(const __global short4 *p, size_t num_elements); +void __ovld prefetch(const __global ushort4 *p, size_t num_elements); +void __ovld prefetch(const __global int4 *p, size_t num_elements); +void __ovld prefetch(const __global uint4 *p, size_t num_elements); +void __ovld prefetch(const __global long4 *p, size_t num_elements); +void __ovld prefetch(const __global ulong4 *p, size_t num_elements); +void __ovld prefetch(const __global float4 *p, size_t num_elements); +void __ovld prefetch(const __global char8 *p, size_t num_elements); +void __ovld prefetch(const __global uchar8 *p, size_t num_elements); +void __ovld prefetch(const __global short8 *p, size_t num_elements); +void __ovld prefetch(const __global ushort8 *p, size_t num_elements); +void __ovld prefetch(const __global int8 *p, size_t num_elements); +void __ovld prefetch(const __global uint8 *p, size_t num_elements); +void __ovld prefetch(const __global long8 *p, size_t num_elements); +void __ovld prefetch(const __global ulong8 *p, size_t num_elements); +void __ovld prefetch(const __global float8 *p, size_t num_elements); +void __ovld prefetch(const __global char16 *p, size_t num_elements); +void __ovld prefetch(const __global uchar16 *p, size_t num_elements); +void __ovld prefetch(const __global short16 *p, size_t num_elements); +void __ovld prefetch(const __global ushort16 *p, size_t num_elements); +void __ovld prefetch(const __global int16 *p, size_t num_elements); +void __ovld prefetch(const __global uint16 *p, size_t num_elements); +void __ovld prefetch(const __global long16 *p, size_t num_elements); +void __ovld prefetch(const __global ulong16 *p, size_t num_elements); +void __ovld prefetch(const __global float16 *p, size_t num_elements); +#ifdef cl_khr_fp64 +void __ovld prefetch(const __global double *p, size_t num_elements); +void __ovld prefetch(const __global double2 *p, size_t num_elements); +void __ovld prefetch(const __global double3 *p, size_t num_elements); +void __ovld prefetch(const __global double4 *p, size_t num_elements); +void __ovld prefetch(const __global double8 *p, size_t num_elements); +void __ovld prefetch(const __global double16 *p, size_t num_elements); +#endif //cl_khr_fp64 +#ifdef cl_khr_fp16 +void __ovld prefetch(const __global half *p, size_t num_elements); +void __ovld prefetch(const __global half2 *p, size_t num_elements); +void __ovld prefetch(const __global half3 *p, size_t num_elements); +void __ovld prefetch(const __global half4 *p, size_t num_elements); +void __ovld prefetch(const __global half8 *p, size_t num_elements); +void __ovld prefetch(const __global half16 *p, size_t num_elements); +#endif // cl_khr_fp16 + +// OpenCL v1.1 s6.11.1, v1.2 s6.12.11 - Atomic Functions + +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#pragma OPENCL EXTENSION cl_khr_int64_base_atomics : enable +#pragma OPENCL EXTENSION cl_khr_int64_extended_atomics : enable +#endif +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old + val) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_add(volatile __global int *p, int val); +unsigned int __ovld atomic_add(volatile __global unsigned int *p, unsigned int val); +int __ovld atomic_add(volatile __local int *p, int val); +unsigned int __ovld atomic_add(volatile __local unsigned int *p, unsigned int val); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_add(volatile int *p, int val); +unsigned int __ovld atomic_add(volatile unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_add(volatile __global int *p, int val); +unsigned int __ovld atom_add(volatile __global unsigned int *p, unsigned int val); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_add(volatile __local int *p, int val); +unsigned int __ovld atom_add(volatile __local unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_add(volatile __global long *p, long val); +unsigned long __ovld atom_add(volatile __global unsigned long *p, unsigned long val); +long __ovld atom_add(volatile __local long *p, long val); +unsigned long __ovld atom_add(volatile __local unsigned long *p, unsigned long val); +#endif + +/** + * Read the 32-bit value (referred to as old) stored at location pointed by p. + * Compute (old - val) and store result at location pointed by p. The function + * returns old. + */ +int __ovld atomic_sub(volatile __global int *p, int val); +unsigned int __ovld atomic_sub(volatile __global unsigned int *p, unsigned int val); +int __ovld atomic_sub(volatile __local int *p, int val); +unsigned int __ovld atomic_sub(volatile __local unsigned int *p, unsigned int val); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_sub(volatile int *p, int val); +unsigned int __ovld atomic_sub(volatile unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_sub(volatile __global int *p, int val); +unsigned int __ovld atom_sub(volatile __global unsigned int *p, unsigned int val); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_sub(volatile __local int *p, int val); +unsigned int __ovld atom_sub(volatile __local unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_sub(volatile __global long *p, long val); +unsigned long __ovld atom_sub(volatile __global unsigned long *p, unsigned long val); +long __ovld atom_sub(volatile __local long *p, long val); +unsigned long __ovld atom_sub(volatile __local unsigned long *p, unsigned long val); +#endif + +/** + * Swaps the old value stored at location p + * with new value given by val. Returns old + * value. + */ +int __ovld atomic_xchg(volatile __global int *p, int val); +unsigned int __ovld atomic_xchg(volatile __global unsigned int *p, unsigned int val); +int __ovld atomic_xchg(volatile __local int *p, int val); +unsigned int __ovld atomic_xchg(volatile __local unsigned int *p, unsigned int val); +float __ovld atomic_xchg(volatile __global float *p, float val); +float __ovld atomic_xchg(volatile __local float *p, float val); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_xchg(volatile int *p, int val); +unsigned int __ovld atomic_xchg(volatile unsigned int *p, unsigned int val); +float __ovld atomic_xchg(volatile float *p, float val); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_xchg(volatile __global int *p, int val); +unsigned int __ovld atom_xchg(volatile __global unsigned int *p, unsigned int val); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_xchg(volatile __local int *p, int val); +unsigned int __ovld atom_xchg(volatile __local unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_xchg(volatile __global long *p, long val); +long __ovld atom_xchg(volatile __local long *p, long val); +unsigned long __ovld atom_xchg(volatile __global unsigned long *p, unsigned long val); +unsigned long __ovld atom_xchg(volatile __local unsigned long *p, unsigned long val); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old + 1) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_inc(volatile __global int *p); +unsigned int __ovld atomic_inc(volatile __global unsigned int *p); +int __ovld atomic_inc(volatile __local int *p); +unsigned int __ovld atomic_inc(volatile __local unsigned int *p); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_inc(volatile int *p); +unsigned int __ovld atomic_inc(volatile unsigned int *p); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_inc(volatile __global int *p); +unsigned int __ovld atom_inc(volatile __global unsigned int *p); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_inc(volatile __local int *p); +unsigned int __ovld atom_inc(volatile __local unsigned int *p); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_inc(volatile __global long *p); +unsigned long __ovld atom_inc(volatile __global unsigned long *p); +long __ovld atom_inc(volatile __local long *p); +unsigned long __ovld atom_inc(volatile __local unsigned long *p); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old - 1) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_dec(volatile __global int *p); +unsigned int __ovld atomic_dec(volatile __global unsigned int *p); +int __ovld atomic_dec(volatile __local int *p); +unsigned int __ovld atomic_dec(volatile __local unsigned int *p); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_dec(volatile int *p); +unsigned int __ovld atomic_dec(volatile unsigned int *p); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_dec(volatile __global int *p); +unsigned int __ovld atom_dec(volatile __global unsigned int *p); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_dec(volatile __local int *p); +unsigned int __ovld atom_dec(volatile __local unsigned int *p); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_dec(volatile __global long *p); +unsigned long __ovld atom_dec(volatile __global unsigned long *p); +long __ovld atom_dec(volatile __local long *p); +unsigned long __ovld atom_dec(volatile __local unsigned long *p); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old == cmp) ? val : old and store result at + * location pointed by p. The function + * returns old. + */ +int __ovld atomic_cmpxchg(volatile __global int *p, int cmp, int val); +unsigned int __ovld atomic_cmpxchg(volatile __global unsigned int *p, unsigned int cmp, unsigned int val); +int __ovld atomic_cmpxchg(volatile __local int *p, int cmp, int val); +unsigned int __ovld atomic_cmpxchg(volatile __local unsigned int *p, unsigned int cmp, unsigned int val); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_cmpxchg(volatile int *p, int cmp, int val); +unsigned int __ovld atomic_cmpxchg(volatile unsigned int *p, unsigned int cmp, unsigned int val); +#endif + +#if defined(cl_khr_global_int32_base_atomics) +int __ovld atom_cmpxchg(volatile __global int *p, int cmp, int val); +unsigned int __ovld atom_cmpxchg(volatile __global unsigned int *p, unsigned int cmp, unsigned int val); +#endif +#if defined(cl_khr_local_int32_base_atomics) +int __ovld atom_cmpxchg(volatile __local int *p, int cmp, int val); +unsigned int __ovld atom_cmpxchg(volatile __local unsigned int *p, unsigned int cmp, unsigned int val); +#endif + +#if defined(cl_khr_int64_base_atomics) +long __ovld atom_cmpxchg(volatile __global long *p, long cmp, long val); +unsigned long __ovld atom_cmpxchg(volatile __global unsigned long *p, unsigned long cmp, unsigned long val); +long __ovld atom_cmpxchg(volatile __local long *p, long cmp, long val); +unsigned long __ovld atom_cmpxchg(volatile __local unsigned long *p, unsigned long cmp, unsigned long val); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * min(old, val) and store minimum value at + * location pointed by p. The function + * returns old. + */ +int __ovld atomic_min(volatile __global int *p, int val); +unsigned int __ovld atomic_min(volatile __global unsigned int *p, unsigned int val); +int __ovld atomic_min(volatile __local int *p, int val); +unsigned int __ovld atomic_min(volatile __local unsigned int *p, unsigned int val); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_min(volatile int *p, int val); +unsigned int __ovld atomic_min(volatile unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_global_int32_extended_atomics) +int __ovld atom_min(volatile __global int *p, int val); +unsigned int __ovld atom_min(volatile __global unsigned int *p, unsigned int val); +#endif +#if defined(cl_khr_local_int32_extended_atomics) +int __ovld atom_min(volatile __local int *p, int val); +unsigned int __ovld atom_min(volatile __local unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_int64_extended_atomics) +long __ovld atom_min(volatile __global long *p, long val); +unsigned long __ovld atom_min(volatile __global unsigned long *p, unsigned long val); +long __ovld atom_min(volatile __local long *p, long val); +unsigned long __ovld atom_min(volatile __local unsigned long *p, unsigned long val); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * max(old, val) and store maximum value at + * location pointed by p. The function + * returns old. + */ +int __ovld atomic_max(volatile __global int *p, int val); +unsigned int __ovld atomic_max(volatile __global unsigned int *p, unsigned int val); +int __ovld atomic_max(volatile __local int *p, int val); +unsigned int __ovld atomic_max(volatile __local unsigned int *p, unsigned int val); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_max(volatile int *p, int val); +unsigned int __ovld atomic_max(volatile unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_global_int32_extended_atomics) +int __ovld atom_max(volatile __global int *p, int val); +unsigned int __ovld atom_max(volatile __global unsigned int *p, unsigned int val); +#endif +#if defined(cl_khr_local_int32_extended_atomics) +int __ovld atom_max(volatile __local int *p, int val); +unsigned int __ovld atom_max(volatile __local unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_int64_extended_atomics) +long __ovld atom_max(volatile __global long *p, long val); +unsigned long __ovld atom_max(volatile __global unsigned long *p, unsigned long val); +long __ovld atom_max(volatile __local long *p, long val); +unsigned long __ovld atom_max(volatile __local unsigned long *p, unsigned long val); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old & val) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_and(volatile __global int *p, int val); +unsigned int __ovld atomic_and(volatile __global unsigned int *p, unsigned int val); +int __ovld atomic_and(volatile __local int *p, int val); +unsigned int __ovld atomic_and(volatile __local unsigned int *p, unsigned int val); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_and(volatile int *p, int val); +unsigned int __ovld atomic_and(volatile unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_global_int32_extended_atomics) +int __ovld atom_and(volatile __global int *p, int val); +unsigned int __ovld atom_and(volatile __global unsigned int *p, unsigned int val); +#endif +#if defined(cl_khr_local_int32_extended_atomics) +int __ovld atom_and(volatile __local int *p, int val); +unsigned int __ovld atom_and(volatile __local unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_int64_extended_atomics) +long __ovld atom_and(volatile __global long *p, long val); +unsigned long __ovld atom_and(volatile __global unsigned long *p, unsigned long val); +long __ovld atom_and(volatile __local long *p, long val); +unsigned long __ovld atom_and(volatile __local unsigned long *p, unsigned long val); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old | val) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_or(volatile __global int *p, int val); +unsigned int __ovld atomic_or(volatile __global unsigned int *p, unsigned int val); +int __ovld atomic_or(volatile __local int *p, int val); +unsigned int __ovld atomic_or(volatile __local unsigned int *p, unsigned int val); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_or(volatile int *p, int val); +unsigned int __ovld atomic_or(volatile unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_global_int32_extended_atomics) +int __ovld atom_or(volatile __global int *p, int val); +unsigned int __ovld atom_or(volatile __global unsigned int *p, unsigned int val); +#endif +#if defined(cl_khr_local_int32_extended_atomics) +int __ovld atom_or(volatile __local int *p, int val); +unsigned int __ovld atom_or(volatile __local unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_int64_extended_atomics) +long __ovld atom_or(volatile __global long *p, long val); +unsigned long __ovld atom_or(volatile __global unsigned long *p, unsigned long val); +long __ovld atom_or(volatile __local long *p, long val); +unsigned long __ovld atom_or(volatile __local unsigned long *p, unsigned long val); +#endif + +/** + * Read the 32-bit value (referred to as old) + * stored at location pointed by p. Compute + * (old ^ val) and store result at location + * pointed by p. The function returns old. + */ +int __ovld atomic_xor(volatile __global int *p, int val); +unsigned int __ovld atomic_xor(volatile __global unsigned int *p, unsigned int val); +int __ovld atomic_xor(volatile __local int *p, int val); +unsigned int __ovld atomic_xor(volatile __local unsigned int *p, unsigned int val); +#ifdef __OPENCL_CPP_VERSION__ +int __ovld atomic_xor(volatile int *p, int val); +unsigned int __ovld atomic_xor(volatile unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_global_int32_extended_atomics) +int __ovld atom_xor(volatile __global int *p, int val); +unsigned int __ovld atom_xor(volatile __global unsigned int *p, unsigned int val); +#endif +#if defined(cl_khr_local_int32_extended_atomics) +int __ovld atom_xor(volatile __local int *p, int val); +unsigned int __ovld atom_xor(volatile __local unsigned int *p, unsigned int val); +#endif + +#if defined(cl_khr_int64_extended_atomics) +long __ovld atom_xor(volatile __global long *p, long val); +unsigned long __ovld atom_xor(volatile __global unsigned long *p, unsigned long val); +long __ovld atom_xor(volatile __local long *p, long val); +unsigned long __ovld atom_xor(volatile __local unsigned long *p, unsigned long val); +#endif + +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#pragma OPENCL EXTENSION cl_khr_int64_base_atomics : disable +#pragma OPENCL EXTENSION cl_khr_int64_extended_atomics : disable +#endif + +// OpenCL v2.0 s6.13.11 - Atomics Functions + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// double atomics support requires extensions cl_khr_int64_base_atomics and cl_khr_int64_extended_atomics +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#pragma OPENCL EXTENSION cl_khr_int64_base_atomics : enable +#pragma OPENCL EXTENSION cl_khr_int64_extended_atomics : enable +#endif + +// atomic_init() +void __ovld atomic_init(volatile atomic_int *object, int value); +void __ovld atomic_init(volatile atomic_uint *object, uint value); +void __ovld atomic_init(volatile atomic_float *object, float value); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +void __ovld atomic_init(volatile atomic_long *object, long value); +void __ovld atomic_init(volatile atomic_ulong *object, ulong value); +#ifdef cl_khr_fp64 +void __ovld atomic_init(volatile atomic_double *object, double value); +#endif //cl_khr_fp64 +#endif + +// atomic_work_item_fence() +void __ovld atomic_work_item_fence(cl_mem_fence_flags flags, memory_order order, memory_scope scope); + +// atomic_fetch() + +int __ovld atomic_fetch_add(volatile atomic_int *object, int operand); +int __ovld atomic_fetch_add_explicit(volatile atomic_int *object, int operand, memory_order order); +int __ovld atomic_fetch_add_explicit(volatile atomic_int *object, int operand, memory_order order, memory_scope scope); +uint __ovld atomic_fetch_add(volatile atomic_uint *object, uint operand); +uint __ovld atomic_fetch_add_explicit(volatile atomic_uint *object, uint operand, memory_order order); +uint __ovld atomic_fetch_add_explicit(volatile atomic_uint *object, uint operand, memory_order order, memory_scope scope); +int __ovld atomic_fetch_sub(volatile atomic_int *object, int operand); +int __ovld atomic_fetch_sub_explicit(volatile atomic_int *object, int operand, memory_order order); +int __ovld atomic_fetch_sub_explicit(volatile atomic_int *object, int operand, memory_order order, memory_scope scope); +uint __ovld atomic_fetch_sub(volatile atomic_uint *object, uint operand); +uint __ovld atomic_fetch_sub_explicit(volatile atomic_uint *object, uint operand, memory_order order); +uint __ovld atomic_fetch_sub_explicit(volatile atomic_uint *object, uint operand, memory_order order, memory_scope scope); +int __ovld atomic_fetch_or(volatile atomic_int *object, int operand); +int __ovld atomic_fetch_or_explicit(volatile atomic_int *object, int operand, memory_order order); +int __ovld atomic_fetch_or_explicit(volatile atomic_int *object, int operand, memory_order order, memory_scope scope); +uint __ovld atomic_fetch_or(volatile atomic_uint *object, uint operand); +uint __ovld atomic_fetch_or_explicit(volatile atomic_uint *object, uint operand, memory_order order); +uint __ovld atomic_fetch_or_explicit(volatile atomic_uint *object, uint operand, memory_order order, memory_scope scope); +int __ovld atomic_fetch_xor(volatile atomic_int *object, int operand); +int __ovld atomic_fetch_xor_explicit(volatile atomic_int *object, int operand, memory_order order); +int __ovld atomic_fetch_xor_explicit(volatile atomic_int *object, int operand, memory_order order, memory_scope scope); +uint __ovld atomic_fetch_xor(volatile atomic_uint *object, uint operand); +uint __ovld atomic_fetch_xor_explicit(volatile atomic_uint *object, uint operand, memory_order order); +uint __ovld atomic_fetch_xor_explicit(volatile atomic_uint *object, uint operand, memory_order order, memory_scope scope); +int __ovld atomic_fetch_and(volatile atomic_int *object, int operand); +int __ovld atomic_fetch_and_explicit(volatile atomic_int *object, int operand, memory_order order); +int __ovld atomic_fetch_and_explicit(volatile atomic_int *object, int operand, memory_order order, memory_scope scope); +uint __ovld atomic_fetch_and(volatile atomic_uint *object, uint operand); +uint __ovld atomic_fetch_and_explicit(volatile atomic_uint *object, uint operand, memory_order order); +uint __ovld atomic_fetch_and_explicit(volatile atomic_uint *object, uint operand, memory_order order, memory_scope scope); +int __ovld atomic_fetch_min(volatile atomic_int *object, int operand); +int __ovld atomic_fetch_min_explicit(volatile atomic_int *object, int operand, memory_order order); +int __ovld atomic_fetch_min_explicit(volatile atomic_int *object, int operand, memory_order order, memory_scope scope); +uint __ovld atomic_fetch_min(volatile atomic_uint *object, uint operand); +uint __ovld atomic_fetch_min_explicit(volatile atomic_uint *object, uint operand, memory_order order); +uint __ovld atomic_fetch_min_explicit(volatile atomic_uint *object, uint operand, memory_order order, memory_scope scope); +uint __ovld atomic_fetch_min(volatile atomic_uint *object, int operand); +uint __ovld atomic_fetch_min_explicit(volatile atomic_uint *object, int operand, memory_order order); +uint __ovld atomic_fetch_min_explicit(volatile atomic_uint *object, int operand, memory_order order, memory_scope scope); +int __ovld atomic_fetch_max(volatile atomic_int *object, int operand); +int __ovld atomic_fetch_max_explicit(volatile atomic_int *object, int operand, memory_order order); +int __ovld atomic_fetch_max_explicit(volatile atomic_int *object, int operand, memory_order order, memory_scope scope); +uint __ovld atomic_fetch_max(volatile atomic_uint *object, uint operand); +uint __ovld atomic_fetch_max_explicit(volatile atomic_uint *object, uint operand, memory_order order); +uint __ovld atomic_fetch_max_explicit(volatile atomic_uint *object, uint operand, memory_order order, memory_scope scope); +uint __ovld atomic_fetch_max(volatile atomic_uint *object, int operand); +uint __ovld atomic_fetch_max_explicit(volatile atomic_uint *object, int operand, memory_order order); +uint __ovld atomic_fetch_max_explicit(volatile atomic_uint *object, int operand, memory_order order, memory_scope scope); + +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +long __ovld atomic_fetch_add(volatile atomic_long *object, long operand); +long __ovld atomic_fetch_add_explicit(volatile atomic_long *object, long operand, memory_order order); +long __ovld atomic_fetch_add_explicit(volatile atomic_long *object, long operand, memory_order order, memory_scope scope); +ulong __ovld atomic_fetch_add(volatile atomic_ulong *object, ulong operand); +ulong __ovld atomic_fetch_add_explicit(volatile atomic_ulong *object, ulong operand, memory_order order); +ulong __ovld atomic_fetch_add_explicit(volatile atomic_ulong *object, ulong operand, memory_order order, memory_scope scope); +long __ovld atomic_fetch_sub(volatile atomic_long *object, long operand); +long __ovld atomic_fetch_sub_explicit(volatile atomic_long *object, long operand, memory_order order); +long __ovld atomic_fetch_sub_explicit(volatile atomic_long *object, long operand, memory_order order, memory_scope scope); +ulong __ovld atomic_fetch_sub(volatile atomic_ulong *object, ulong operand); +ulong __ovld atomic_fetch_sub_explicit(volatile atomic_ulong *object, ulong operand, memory_order order); +ulong __ovld atomic_fetch_sub_explicit(volatile atomic_ulong *object, ulong operand, memory_order order, memory_scope scope); +long __ovld atomic_fetch_or(volatile atomic_long *object, long operand); +long __ovld atomic_fetch_or_explicit(volatile atomic_long *object, long operand, memory_order order); +long __ovld atomic_fetch_or_explicit(volatile atomic_long *object, long operand, memory_order order, memory_scope scope); +ulong __ovld atomic_fetch_or(volatile atomic_ulong *object, ulong operand); +ulong __ovld atomic_fetch_or_explicit(volatile atomic_ulong *object, ulong operand, memory_order order); +ulong __ovld atomic_fetch_or_explicit(volatile atomic_ulong *object, ulong operand, memory_order order, memory_scope scope); +long __ovld atomic_fetch_xor(volatile atomic_long *object, long operand); +long __ovld atomic_fetch_xor_explicit(volatile atomic_long *object, long operand, memory_order order); +long __ovld atomic_fetch_xor_explicit(volatile atomic_long *object, long operand, memory_order order, memory_scope scope); +ulong __ovld atomic_fetch_xor(volatile atomic_ulong *object, ulong operand); +ulong __ovld atomic_fetch_xor_explicit(volatile atomic_ulong *object, ulong operand, memory_order order); +ulong __ovld atomic_fetch_xor_explicit(volatile atomic_ulong *object, ulong operand, memory_order order, memory_scope scope); +long __ovld atomic_fetch_and(volatile atomic_long *object, long operand); +long __ovld atomic_fetch_and_explicit(volatile atomic_long *object, long operand, memory_order order); +long __ovld atomic_fetch_and_explicit(volatile atomic_long *object, long operand, memory_order order, memory_scope scope); +ulong __ovld atomic_fetch_and(volatile atomic_ulong *object, ulong operand); +ulong __ovld atomic_fetch_and_explicit(volatile atomic_ulong *object, ulong operand, memory_order order); +ulong __ovld atomic_fetch_and_explicit(volatile atomic_ulong *object, ulong operand, memory_order order, memory_scope scope); +long __ovld atomic_fetch_min(volatile atomic_long *object, long operand); +long __ovld atomic_fetch_min_explicit(volatile atomic_long *object, long operand, memory_order order); +long __ovld atomic_fetch_min_explicit(volatile atomic_long *object, long operand, memory_order order, memory_scope scope); +ulong __ovld atomic_fetch_min(volatile atomic_ulong *object, ulong operand); +ulong __ovld atomic_fetch_min_explicit(volatile atomic_ulong *object, ulong operand, memory_order order); +ulong __ovld atomic_fetch_min_explicit(volatile atomic_ulong *object, ulong operand, memory_order order, memory_scope scope); +ulong __ovld atomic_fetch_min(volatile atomic_ulong *object, long operand); +ulong __ovld atomic_fetch_min_explicit(volatile atomic_ulong *object, long operand, memory_order order); +ulong __ovld atomic_fetch_min_explicit(volatile atomic_ulong *object, long operand, memory_order order, memory_scope scope); +long __ovld atomic_fetch_max(volatile atomic_long *object, long operand); +long __ovld atomic_fetch_max_explicit(volatile atomic_long *object, long operand, memory_order order); +long __ovld atomic_fetch_max_explicit(volatile atomic_long *object, long operand, memory_order order, memory_scope scope); +ulong __ovld atomic_fetch_max(volatile atomic_ulong *object, ulong operand); +ulong __ovld atomic_fetch_max_explicit(volatile atomic_ulong *object, ulong operand, memory_order order); +ulong __ovld atomic_fetch_max_explicit(volatile atomic_ulong *object, ulong operand, memory_order order, memory_scope scope); +ulong __ovld atomic_fetch_max(volatile atomic_ulong *object, long operand); +ulong __ovld atomic_fetch_max_explicit(volatile atomic_ulong *object, long operand, memory_order order); +ulong __ovld atomic_fetch_max_explicit(volatile atomic_ulong *object, long operand, memory_order order, memory_scope scope); +#endif //defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) + +// OpenCL v2.0 s6.13.11.7.5: +// add/sub: atomic type argument can be uintptr_t/intptr_t, value type argument can be ptrdiff_t. +// or/xor/and/min/max: atomic type argument can be intptr_t/uintptr_t, value type argument can be intptr_t/uintptr_t. + +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +uintptr_t __ovld atomic_fetch_add(volatile atomic_uintptr_t *object, ptrdiff_t operand); +uintptr_t __ovld atomic_fetch_add_explicit(volatile atomic_uintptr_t *object, ptrdiff_t operand, memory_order order); +uintptr_t __ovld atomic_fetch_add_explicit(volatile atomic_uintptr_t *object, ptrdiff_t operand, memory_order order, memory_scope scope); +uintptr_t __ovld atomic_fetch_sub(volatile atomic_uintptr_t *object, ptrdiff_t operand); +uintptr_t __ovld atomic_fetch_sub_explicit(volatile atomic_uintptr_t *object, ptrdiff_t operand, memory_order order); +uintptr_t __ovld atomic_fetch_sub_explicit(volatile atomic_uintptr_t *object, ptrdiff_t operand, memory_order order, memory_scope scope); + +uintptr_t __ovld atomic_fetch_or(volatile atomic_uintptr_t *object, intptr_t operand); +uintptr_t __ovld atomic_fetch_or_explicit(volatile atomic_uintptr_t *object, intptr_t operand, memory_order order); +uintptr_t __ovld atomic_fetch_or_explicit(volatile atomic_uintptr_t *object, intptr_t operand, memory_order order, memory_scope scope); +uintptr_t __ovld atomic_fetch_xor(volatile atomic_uintptr_t *object, intptr_t operand); +uintptr_t __ovld atomic_fetch_xor_explicit(volatile atomic_uintptr_t *object, intptr_t operand, memory_order order); +uintptr_t __ovld atomic_fetch_xor_explicit(volatile atomic_uintptr_t *object, intptr_t operand, memory_order order, memory_scope scope); +uintptr_t __ovld atomic_fetch_and(volatile atomic_uintptr_t *object, intptr_t operand); +uintptr_t __ovld atomic_fetch_and_explicit(volatile atomic_uintptr_t *object, intptr_t operand, memory_order order); +uintptr_t __ovld atomic_fetch_and_explicit(volatile atomic_uintptr_t *object, intptr_t operand, memory_order order, memory_scope scope); +uintptr_t __ovld atomic_fetch_min(volatile atomic_uintptr_t *object, intptr_t opermax); +uintptr_t __ovld atomic_fetch_min_explicit(volatile atomic_uintptr_t *object, intptr_t opermax, memory_order minder); +uintptr_t __ovld atomic_fetch_min_explicit(volatile atomic_uintptr_t *object, intptr_t opermax, memory_order minder, memory_scope scope); +uintptr_t __ovld atomic_fetch_max(volatile atomic_uintptr_t *object, intptr_t opermax); +uintptr_t __ovld atomic_fetch_max_explicit(volatile atomic_uintptr_t *object, intptr_t opermax, memory_order minder); +uintptr_t __ovld atomic_fetch_max_explicit(volatile atomic_uintptr_t *object, intptr_t opermax, memory_order minder, memory_scope scope); + +intptr_t __ovld atomic_fetch_or(volatile atomic_intptr_t *object, uintptr_t operand); +intptr_t __ovld atomic_fetch_or_explicit(volatile atomic_intptr_t *object, uintptr_t operand, memory_order order); +intptr_t __ovld atomic_fetch_or_explicit(volatile atomic_intptr_t *object, uintptr_t operand, memory_order order, memory_scope scope); +intptr_t __ovld atomic_fetch_xor(volatile atomic_intptr_t *object, uintptr_t operand); +intptr_t __ovld atomic_fetch_xor_explicit(volatile atomic_intptr_t *object, uintptr_t operand, memory_order order); +intptr_t __ovld atomic_fetch_xor_explicit(volatile atomic_intptr_t *object, uintptr_t operand, memory_order order, memory_scope scope); +intptr_t __ovld atomic_fetch_and(volatile atomic_intptr_t *object, uintptr_t operand); +intptr_t __ovld atomic_fetch_and_explicit(volatile atomic_intptr_t *object, uintptr_t operand, memory_order order); +intptr_t __ovld atomic_fetch_and_explicit(volatile atomic_intptr_t *object, uintptr_t operand, memory_order order, memory_scope scope); +intptr_t __ovld atomic_fetch_min(volatile atomic_intptr_t *object, uintptr_t opermax); +intptr_t __ovld atomic_fetch_min_explicit(volatile atomic_intptr_t *object, uintptr_t opermax, memory_order minder); +intptr_t __ovld atomic_fetch_min_explicit(volatile atomic_intptr_t *object, uintptr_t opermax, memory_order minder, memory_scope scope); +intptr_t __ovld atomic_fetch_max(volatile atomic_intptr_t *object, uintptr_t opermax); +intptr_t __ovld atomic_fetch_max_explicit(volatile atomic_intptr_t *object, uintptr_t opermax, memory_order minder); +intptr_t __ovld atomic_fetch_max_explicit(volatile atomic_intptr_t *object, uintptr_t opermax, memory_order minder, memory_scope scope); +#endif + +// atomic_store() + +void __ovld atomic_store(volatile atomic_int *object, int desired); +void __ovld atomic_store_explicit(volatile atomic_int *object, int desired, memory_order order); +void __ovld atomic_store_explicit(volatile atomic_int *object, int desired, memory_order order, memory_scope scope); +void __ovld atomic_store(volatile atomic_uint *object, uint desired); +void __ovld atomic_store_explicit(volatile atomic_uint *object, uint desired, memory_order order); +void __ovld atomic_store_explicit(volatile atomic_uint *object, uint desired, memory_order order, memory_scope scope); +void __ovld atomic_store(volatile atomic_float *object, float desired); +void __ovld atomic_store_explicit(volatile atomic_float *object, float desired, memory_order order); +void __ovld atomic_store_explicit(volatile atomic_float *object, float desired, memory_order order, memory_scope scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +void __ovld atomic_store(volatile atomic_double *object, double desired); +void __ovld atomic_store_explicit(volatile atomic_double *object, double desired, memory_order order); +void __ovld atomic_store_explicit(volatile atomic_double *object, double desired, memory_order order, memory_scope scope); +#endif //cl_khr_fp64 +void __ovld atomic_store(volatile atomic_long *object, long desired); +void __ovld atomic_store_explicit(volatile atomic_long *object, long desired, memory_order order); +void __ovld atomic_store_explicit(volatile atomic_long *object, long desired, memory_order order, memory_scope scope); +void __ovld atomic_store(volatile atomic_ulong *object, ulong desired); +void __ovld atomic_store_explicit(volatile atomic_ulong *object, ulong desired, memory_order order); +void __ovld atomic_store_explicit(volatile atomic_ulong *object, ulong desired, memory_order order, memory_scope scope); +#endif + +// atomic_load() + +int __ovld atomic_load(volatile atomic_int *object); +int __ovld atomic_load_explicit(volatile atomic_int *object, memory_order order); +int __ovld atomic_load_explicit(volatile atomic_int *object, memory_order order, memory_scope scope); +uint __ovld atomic_load(volatile atomic_uint *object); +uint __ovld atomic_load_explicit(volatile atomic_uint *object, memory_order order); +uint __ovld atomic_load_explicit(volatile atomic_uint *object, memory_order order, memory_scope scope); +float __ovld atomic_load(volatile atomic_float *object); +float __ovld atomic_load_explicit(volatile atomic_float *object, memory_order order); +float __ovld atomic_load_explicit(volatile atomic_float *object, memory_order order, memory_scope scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_load(volatile atomic_double *object); +double __ovld atomic_load_explicit(volatile atomic_double *object, memory_order order); +double __ovld atomic_load_explicit(volatile atomic_double *object, memory_order order, memory_scope scope); +#endif //cl_khr_fp64 +long __ovld atomic_load(volatile atomic_long *object); +long __ovld atomic_load_explicit(volatile atomic_long *object, memory_order order); +long __ovld atomic_load_explicit(volatile atomic_long *object, memory_order order, memory_scope scope); +ulong __ovld atomic_load(volatile atomic_ulong *object); +ulong __ovld atomic_load_explicit(volatile atomic_ulong *object, memory_order order); +ulong __ovld atomic_load_explicit(volatile atomic_ulong *object, memory_order order, memory_scope scope); +#endif + +// atomic_exchange() + +int __ovld atomic_exchange(volatile atomic_int *object, int desired); +int __ovld atomic_exchange_explicit(volatile atomic_int *object, int desired, memory_order order); +int __ovld atomic_exchange_explicit(volatile atomic_int *object, int desired, memory_order order, memory_scope scope); +uint __ovld atomic_exchange(volatile atomic_uint *object, uint desired); +uint __ovld atomic_exchange_explicit(volatile atomic_uint *object, uint desired, memory_order order); +uint __ovld atomic_exchange_explicit(volatile atomic_uint *object, uint desired, memory_order order, memory_scope scope); +float __ovld atomic_exchange(volatile atomic_float *object, float desired); +float __ovld atomic_exchange_explicit(volatile atomic_float *object, float desired, memory_order order); +float __ovld atomic_exchange_explicit(volatile atomic_float *object, float desired, memory_order order, memory_scope scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +double __ovld atomic_exchange(volatile atomic_double *object, double desired); +double __ovld atomic_exchange_explicit(volatile atomic_double *object, double desired, memory_order order); +double __ovld atomic_exchange_explicit(volatile atomic_double *object, double desired, memory_order order, memory_scope scope); +#endif //cl_khr_fp64 +long __ovld atomic_exchange(volatile atomic_long *object, long desired); +long __ovld atomic_exchange_explicit(volatile atomic_long *object, long desired, memory_order order); +long __ovld atomic_exchange_explicit(volatile atomic_long *object, long desired, memory_order order, memory_scope scope); +ulong __ovld atomic_exchange(volatile atomic_ulong *object, ulong desired); +ulong __ovld atomic_exchange_explicit(volatile atomic_ulong *object, ulong desired, memory_order order); +ulong __ovld atomic_exchange_explicit(volatile atomic_ulong *object, ulong desired, memory_order order, memory_scope scope); +#endif + +// atomic_compare_exchange_strong() and atomic_compare_exchange_weak() + +bool __ovld atomic_compare_exchange_strong(volatile atomic_int *object, int *expected, int desired); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_int *object, int *expected, + int desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_int *object, int *expected, + int desired, memory_order success, memory_order failure, memory_scope scope); +bool __ovld atomic_compare_exchange_strong(volatile atomic_uint *object, uint *expected, uint desired); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_uint *object, uint *expected, + uint desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_uint *object, uint *expected, + uint desired, memory_order success, memory_order failure, memory_scope scope); +bool __ovld atomic_compare_exchange_weak(volatile atomic_int *object, int *expected, int desired); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_int *object, int *expected, + int desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_int *object, int *expected, + int desired, memory_order success, memory_order failure, memory_scope scope); +bool __ovld atomic_compare_exchange_weak(volatile atomic_uint *object, uint *expected, uint desired); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_uint *object, uint *expected, + uint desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_uint *object, uint *expected, + uint desired, memory_order success, memory_order failure, memory_scope scope); +bool __ovld atomic_compare_exchange_strong(volatile atomic_float *object, float *expected, float desired); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_float *object, float *expected, + float desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_float *object, float *expected, + float desired, memory_order success, memory_order failure, memory_scope scope); +bool __ovld atomic_compare_exchange_weak(volatile atomic_float *object, float *expected, float desired); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_float *object, float *expected, + float desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_float *object, float *expected, + float desired, memory_order success, memory_order failure, memory_scope scope); +#if defined(cl_khr_int64_base_atomics) && defined(cl_khr_int64_extended_atomics) +#ifdef cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong(volatile atomic_double *object, double *expected, double desired); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_double *object, double *expected, + double desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_double *object, double *expected, + double desired, memory_order success, memory_order failure, memory_scope scope); +bool __ovld atomic_compare_exchange_weak(volatile atomic_double *object, double *expected, double desired); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_double *object, double *expected, + double desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_double *object, double *expected, + double desired, memory_order success, memory_order failure, memory_scope scope); +#endif //cl_khr_fp64 +bool __ovld atomic_compare_exchange_strong(volatile atomic_long *object, long *expected, long desired); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_long *object, long *expected, + long desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_long *object, long *expected, + long desired, memory_order success, memory_order failure, memory_scope scope); +bool __ovld atomic_compare_exchange_weak(volatile atomic_long *object, long *expected, long desired); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_long *object, long *expected, + long desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_long *object, long *expected, + long desired, memory_order success, memory_order failure, memory_scope scope); +bool __ovld atomic_compare_exchange_strong(volatile atomic_ulong *object, ulong *expected, ulong desired); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_ulong *object, ulong *expected, + ulong desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_strong_explicit(volatile atomic_ulong *object, ulong *expected, + ulong desired, memory_order success, memory_order failure, memory_scope scope); +bool __ovld atomic_compare_exchange_weak(volatile atomic_ulong *object, ulong *expected, ulong desired); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_ulong *object, ulong *expected, + ulong desired, memory_order success, memory_order failure); +bool __ovld atomic_compare_exchange_weak_explicit(volatile atomic_ulong *object, ulong *expected, + ulong desired, memory_order success, memory_order failure, memory_scope scope); +#endif + +// atomic_flag_test_and_set() and atomic_flag_clear() + +bool __ovld atomic_flag_test_and_set(volatile atomic_flag *object); +bool __ovld atomic_flag_test_and_set_explicit(volatile atomic_flag *object, memory_order order); +bool __ovld atomic_flag_test_and_set_explicit(volatile atomic_flag *object, memory_order order, memory_scope scope); +void __ovld atomic_flag_clear(volatile atomic_flag *object); +void __ovld atomic_flag_clear_explicit(volatile atomic_flag *object, memory_order order); +void __ovld atomic_flag_clear_explicit(volatile atomic_flag *object, memory_order order, memory_scope scope); + +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v1.1 s6.11.12, v1.2 s6.12.12, v2.0 s6.13.12 - Miscellaneous Vector Functions + +/** + * The shuffle and shuffle2 built-in functions construct + * a permutation of elements from one or two input + * vectors respectively that are of the same type, + * returning a vector with the same element type as the + * input and length that is the same as the shuffle mask. + * The size of each element in the mask must match the + * size of each element in the result. For shuffle, only + * the ilogb(2m-1) least significant bits of each mask + * element are considered. For shuffle2, only the + * ilogb(2m-1)+1 least significant bits of each mask + * element are considered. Other bits in the mask shall + * be ignored. + * The elements of the input vectors are numbered from + * left to right across one or both of the vectors. For this + * purpose, the number of elements in a vector is given + * by vec_step(gentypem). The shuffle mask operand + * specifies, for each element of the result vector, which + * element of the one or two input vectors the result + * element gets. + * Examples: + * uint4 mask = (uint4)(3, 2, + * 1, 0); + * float4 a; + * float4 r = shuffle(a, mask); + * // r.s0123 = a.wzyx + * uint8 mask = (uint8)(0, 1, 2, 3, + * 4, 5, 6, 7); + * float4 a, b; + * float8 r = shuffle2(a, b, mask); + * // r.s0123 = a.xyzw + * // r.s4567 = b.xyzw + * uint4 mask; + * float8 a; + * float4 b; + * b = shuffle(a, mask); + * Examples that are not valid are: + * uint8 mask; + * short16 a; + * short8 b; + * b = shuffle(a, mask); <- not valid + */ +char2 __ovld __cnfn shuffle(char2 x, uchar2 mask); +char2 __ovld __cnfn shuffle(char4 x, uchar2 mask); +char2 __ovld __cnfn shuffle(char8 x, uchar2 mask); +char2 __ovld __cnfn shuffle(char16 x, uchar2 mask); + +uchar2 __ovld __cnfn shuffle(uchar2 x, uchar2 mask); +uchar2 __ovld __cnfn shuffle(uchar4 x, uchar2 mask); +uchar2 __ovld __cnfn shuffle(uchar8 x, uchar2 mask); +uchar2 __ovld __cnfn shuffle(uchar16 x, uchar2 mask); + +short2 __ovld __cnfn shuffle(short2 x, ushort2 mask); +short2 __ovld __cnfn shuffle(short4 x, ushort2 mask); +short2 __ovld __cnfn shuffle(short8 x, ushort2 mask); +short2 __ovld __cnfn shuffle(short16 x, ushort2 mask); + +ushort2 __ovld __cnfn shuffle(ushort2 x, ushort2 mask); +ushort2 __ovld __cnfn shuffle(ushort4 x, ushort2 mask); +ushort2 __ovld __cnfn shuffle(ushort8 x, ushort2 mask); +ushort2 __ovld __cnfn shuffle(ushort16 x, ushort2 mask); + +int2 __ovld __cnfn shuffle(int2 x, uint2 mask); +int2 __ovld __cnfn shuffle(int4 x, uint2 mask); +int2 __ovld __cnfn shuffle(int8 x, uint2 mask); +int2 __ovld __cnfn shuffle(int16 x, uint2 mask); + +uint2 __ovld __cnfn shuffle(uint2 x, uint2 mask); +uint2 __ovld __cnfn shuffle(uint4 x, uint2 mask); +uint2 __ovld __cnfn shuffle(uint8 x, uint2 mask); +uint2 __ovld __cnfn shuffle(uint16 x, uint2 mask); + +long2 __ovld __cnfn shuffle(long2 x, ulong2 mask); +long2 __ovld __cnfn shuffle(long4 x, ulong2 mask); +long2 __ovld __cnfn shuffle(long8 x, ulong2 mask); +long2 __ovld __cnfn shuffle(long16 x, ulong2 mask); + +ulong2 __ovld __cnfn shuffle(ulong2 x, ulong2 mask); +ulong2 __ovld __cnfn shuffle(ulong4 x, ulong2 mask); +ulong2 __ovld __cnfn shuffle(ulong8 x, ulong2 mask); +ulong2 __ovld __cnfn shuffle(ulong16 x, ulong2 mask); + +float2 __ovld __cnfn shuffle(float2 x, uint2 mask); +float2 __ovld __cnfn shuffle(float4 x, uint2 mask); +float2 __ovld __cnfn shuffle(float8 x, uint2 mask); +float2 __ovld __cnfn shuffle(float16 x, uint2 mask); + +char4 __ovld __cnfn shuffle(char2 x, uchar4 mask); +char4 __ovld __cnfn shuffle(char4 x, uchar4 mask); +char4 __ovld __cnfn shuffle(char8 x, uchar4 mask); +char4 __ovld __cnfn shuffle(char16 x, uchar4 mask); + +uchar4 __ovld __cnfn shuffle(uchar2 x, uchar4 mask); +uchar4 __ovld __cnfn shuffle(uchar4 x, uchar4 mask); +uchar4 __ovld __cnfn shuffle(uchar8 x, uchar4 mask); +uchar4 __ovld __cnfn shuffle(uchar16 x, uchar4 mask); + +short4 __ovld __cnfn shuffle(short2 x, ushort4 mask); +short4 __ovld __cnfn shuffle(short4 x, ushort4 mask); +short4 __ovld __cnfn shuffle(short8 x, ushort4 mask); +short4 __ovld __cnfn shuffle(short16 x, ushort4 mask); + +ushort4 __ovld __cnfn shuffle(ushort2 x, ushort4 mask); +ushort4 __ovld __cnfn shuffle(ushort4 x, ushort4 mask); +ushort4 __ovld __cnfn shuffle(ushort8 x, ushort4 mask); +ushort4 __ovld __cnfn shuffle(ushort16 x, ushort4 mask); + +int4 __ovld __cnfn shuffle(int2 x, uint4 mask); +int4 __ovld __cnfn shuffle(int4 x, uint4 mask); +int4 __ovld __cnfn shuffle(int8 x, uint4 mask); +int4 __ovld __cnfn shuffle(int16 x, uint4 mask); + +uint4 __ovld __cnfn shuffle(uint2 x, uint4 mask); +uint4 __ovld __cnfn shuffle(uint4 x, uint4 mask); +uint4 __ovld __cnfn shuffle(uint8 x, uint4 mask); +uint4 __ovld __cnfn shuffle(uint16 x, uint4 mask); + +long4 __ovld __cnfn shuffle(long2 x, ulong4 mask); +long4 __ovld __cnfn shuffle(long4 x, ulong4 mask); +long4 __ovld __cnfn shuffle(long8 x, ulong4 mask); +long4 __ovld __cnfn shuffle(long16 x, ulong4 mask); + +ulong4 __ovld __cnfn shuffle(ulong2 x, ulong4 mask); +ulong4 __ovld __cnfn shuffle(ulong4 x, ulong4 mask); +ulong4 __ovld __cnfn shuffle(ulong8 x, ulong4 mask); +ulong4 __ovld __cnfn shuffle(ulong16 x, ulong4 mask); + +float4 __ovld __cnfn shuffle(float2 x, uint4 mask); +float4 __ovld __cnfn shuffle(float4 x, uint4 mask); +float4 __ovld __cnfn shuffle(float8 x, uint4 mask); +float4 __ovld __cnfn shuffle(float16 x, uint4 mask); + +char8 __ovld __cnfn shuffle(char2 x, uchar8 mask); +char8 __ovld __cnfn shuffle(char4 x, uchar8 mask); +char8 __ovld __cnfn shuffle(char8 x, uchar8 mask); +char8 __ovld __cnfn shuffle(char16 x, uchar8 mask); + +uchar8 __ovld __cnfn shuffle(uchar2 x, uchar8 mask); +uchar8 __ovld __cnfn shuffle(uchar4 x, uchar8 mask); +uchar8 __ovld __cnfn shuffle(uchar8 x, uchar8 mask); +uchar8 __ovld __cnfn shuffle(uchar16 x, uchar8 mask); + +short8 __ovld __cnfn shuffle(short2 x, ushort8 mask); +short8 __ovld __cnfn shuffle(short4 x, ushort8 mask); +short8 __ovld __cnfn shuffle(short8 x, ushort8 mask); +short8 __ovld __cnfn shuffle(short16 x, ushort8 mask); + +ushort8 __ovld __cnfn shuffle(ushort2 x, ushort8 mask); +ushort8 __ovld __cnfn shuffle(ushort4 x, ushort8 mask); +ushort8 __ovld __cnfn shuffle(ushort8 x, ushort8 mask); +ushort8 __ovld __cnfn shuffle(ushort16 x, ushort8 mask); + +int8 __ovld __cnfn shuffle(int2 x, uint8 mask); +int8 __ovld __cnfn shuffle(int4 x, uint8 mask); +int8 __ovld __cnfn shuffle(int8 x, uint8 mask); +int8 __ovld __cnfn shuffle(int16 x, uint8 mask); + +uint8 __ovld __cnfn shuffle(uint2 x, uint8 mask); +uint8 __ovld __cnfn shuffle(uint4 x, uint8 mask); +uint8 __ovld __cnfn shuffle(uint8 x, uint8 mask); +uint8 __ovld __cnfn shuffle(uint16 x, uint8 mask); + +long8 __ovld __cnfn shuffle(long2 x, ulong8 mask); +long8 __ovld __cnfn shuffle(long4 x, ulong8 mask); +long8 __ovld __cnfn shuffle(long8 x, ulong8 mask); +long8 __ovld __cnfn shuffle(long16 x, ulong8 mask); + +ulong8 __ovld __cnfn shuffle(ulong2 x, ulong8 mask); +ulong8 __ovld __cnfn shuffle(ulong4 x, ulong8 mask); +ulong8 __ovld __cnfn shuffle(ulong8 x, ulong8 mask); +ulong8 __ovld __cnfn shuffle(ulong16 x, ulong8 mask); + +float8 __ovld __cnfn shuffle(float2 x, uint8 mask); +float8 __ovld __cnfn shuffle(float4 x, uint8 mask); +float8 __ovld __cnfn shuffle(float8 x, uint8 mask); +float8 __ovld __cnfn shuffle(float16 x, uint8 mask); + +char16 __ovld __cnfn shuffle(char2 x, uchar16 mask); +char16 __ovld __cnfn shuffle(char4 x, uchar16 mask); +char16 __ovld __cnfn shuffle(char8 x, uchar16 mask); +char16 __ovld __cnfn shuffle(char16 x, uchar16 mask); + +uchar16 __ovld __cnfn shuffle(uchar2 x, uchar16 mask); +uchar16 __ovld __cnfn shuffle(uchar4 x, uchar16 mask); +uchar16 __ovld __cnfn shuffle(uchar8 x, uchar16 mask); +uchar16 __ovld __cnfn shuffle(uchar16 x, uchar16 mask); + +short16 __ovld __cnfn shuffle(short2 x, ushort16 mask); +short16 __ovld __cnfn shuffle(short4 x, ushort16 mask); +short16 __ovld __cnfn shuffle(short8 x, ushort16 mask); +short16 __ovld __cnfn shuffle(short16 x, ushort16 mask); + +ushort16 __ovld __cnfn shuffle(ushort2 x, ushort16 mask); +ushort16 __ovld __cnfn shuffle(ushort4 x, ushort16 mask); +ushort16 __ovld __cnfn shuffle(ushort8 x, ushort16 mask); +ushort16 __ovld __cnfn shuffle(ushort16 x, ushort16 mask); + +int16 __ovld __cnfn shuffle(int2 x, uint16 mask); +int16 __ovld __cnfn shuffle(int4 x, uint16 mask); +int16 __ovld __cnfn shuffle(int8 x, uint16 mask); +int16 __ovld __cnfn shuffle(int16 x, uint16 mask); + +uint16 __ovld __cnfn shuffle(uint2 x, uint16 mask); +uint16 __ovld __cnfn shuffle(uint4 x, uint16 mask); +uint16 __ovld __cnfn shuffle(uint8 x, uint16 mask); +uint16 __ovld __cnfn shuffle(uint16 x, uint16 mask); + +long16 __ovld __cnfn shuffle(long2 x, ulong16 mask); +long16 __ovld __cnfn shuffle(long4 x, ulong16 mask); +long16 __ovld __cnfn shuffle(long8 x, ulong16 mask); +long16 __ovld __cnfn shuffle(long16 x, ulong16 mask); + +ulong16 __ovld __cnfn shuffle(ulong2 x, ulong16 mask); +ulong16 __ovld __cnfn shuffle(ulong4 x, ulong16 mask); +ulong16 __ovld __cnfn shuffle(ulong8 x, ulong16 mask); +ulong16 __ovld __cnfn shuffle(ulong16 x, ulong16 mask); + +float16 __ovld __cnfn shuffle(float2 x, uint16 mask); +float16 __ovld __cnfn shuffle(float4 x, uint16 mask); +float16 __ovld __cnfn shuffle(float8 x, uint16 mask); +float16 __ovld __cnfn shuffle(float16 x, uint16 mask); + +#ifdef cl_khr_fp64 +double2 __ovld __cnfn shuffle(double2 x, ulong2 mask); +double2 __ovld __cnfn shuffle(double4 x, ulong2 mask); +double2 __ovld __cnfn shuffle(double8 x, ulong2 mask); +double2 __ovld __cnfn shuffle(double16 x, ulong2 mask); + +double4 __ovld __cnfn shuffle(double2 x, ulong4 mask); +double4 __ovld __cnfn shuffle(double4 x, ulong4 mask); +double4 __ovld __cnfn shuffle(double8 x, ulong4 mask); +double4 __ovld __cnfn shuffle(double16 x, ulong4 mask); + +double8 __ovld __cnfn shuffle(double2 x, ulong8 mask); +double8 __ovld __cnfn shuffle(double4 x, ulong8 mask); +double8 __ovld __cnfn shuffle(double8 x, ulong8 mask); +double8 __ovld __cnfn shuffle(double16 x, ulong8 mask); + +double16 __ovld __cnfn shuffle(double2 x, ulong16 mask); +double16 __ovld __cnfn shuffle(double4 x, ulong16 mask); +double16 __ovld __cnfn shuffle(double8 x, ulong16 mask); +double16 __ovld __cnfn shuffle(double16 x, ulong16 mask); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half2 __ovld __cnfn shuffle(half2 x, ushort2 mask); +half2 __ovld __cnfn shuffle(half4 x, ushort2 mask); +half2 __ovld __cnfn shuffle(half8 x, ushort2 mask); +half2 __ovld __cnfn shuffle(half16 x, ushort2 mask); + +half4 __ovld __cnfn shuffle(half2 x, ushort4 mask); +half4 __ovld __cnfn shuffle(half4 x, ushort4 mask); +half4 __ovld __cnfn shuffle(half8 x, ushort4 mask); +half4 __ovld __cnfn shuffle(half16 x, ushort4 mask); + +half8 __ovld __cnfn shuffle(half2 x, ushort8 mask); +half8 __ovld __cnfn shuffle(half4 x, ushort8 mask); +half8 __ovld __cnfn shuffle(half8 x, ushort8 mask); +half8 __ovld __cnfn shuffle(half16 x, ushort8 mask); + +half16 __ovld __cnfn shuffle(half2 x, ushort16 mask); +half16 __ovld __cnfn shuffle(half4 x, ushort16 mask); +half16 __ovld __cnfn shuffle(half8 x, ushort16 mask); +half16 __ovld __cnfn shuffle(half16 x, ushort16 mask); +#endif //cl_khr_fp16 + +char2 __ovld __cnfn shuffle2(char2 x, char2 y, uchar2 mask); +char2 __ovld __cnfn shuffle2(char4 x, char4 y, uchar2 mask); +char2 __ovld __cnfn shuffle2(char8 x, char8 y, uchar2 mask); +char2 __ovld __cnfn shuffle2(char16 x, char16 y, uchar2 mask); + +uchar2 __ovld __cnfn shuffle2(uchar2 x, uchar2 y, uchar2 mask); +uchar2 __ovld __cnfn shuffle2(uchar4 x, uchar4 y, uchar2 mask); +uchar2 __ovld __cnfn shuffle2(uchar8 x, uchar8 y, uchar2 mask); +uchar2 __ovld __cnfn shuffle2(uchar16 x, uchar16 y, uchar2 mask); + +short2 __ovld __cnfn shuffle2(short2 x, short2 y, ushort2 mask); +short2 __ovld __cnfn shuffle2(short4 x, short4 y, ushort2 mask); +short2 __ovld __cnfn shuffle2(short8 x, short8 y, ushort2 mask); +short2 __ovld __cnfn shuffle2(short16 x, short16 y, ushort2 mask); + +ushort2 __ovld __cnfn shuffle2(ushort2 x, ushort2 y, ushort2 mask); +ushort2 __ovld __cnfn shuffle2(ushort4 x, ushort4 y, ushort2 mask); +ushort2 __ovld __cnfn shuffle2(ushort8 x, ushort8 y, ushort2 mask); +ushort2 __ovld __cnfn shuffle2(ushort16 x, ushort16 y, ushort2 mask); + +int2 __ovld __cnfn shuffle2(int2 x, int2 y, uint2 mask); +int2 __ovld __cnfn shuffle2(int4 x, int4 y, uint2 mask); +int2 __ovld __cnfn shuffle2(int8 x, int8 y, uint2 mask); +int2 __ovld __cnfn shuffle2(int16 x, int16 y, uint2 mask); + +uint2 __ovld __cnfn shuffle2(uint2 x, uint2 y, uint2 mask); +uint2 __ovld __cnfn shuffle2(uint4 x, uint4 y, uint2 mask); +uint2 __ovld __cnfn shuffle2(uint8 x, uint8 y, uint2 mask); +uint2 __ovld __cnfn shuffle2(uint16 x, uint16 y, uint2 mask); + +long2 __ovld __cnfn shuffle2(long2 x, long2 y, ulong2 mask); +long2 __ovld __cnfn shuffle2(long4 x, long4 y, ulong2 mask); +long2 __ovld __cnfn shuffle2(long8 x, long8 y, ulong2 mask); +long2 __ovld __cnfn shuffle2(long16 x, long16 y, ulong2 mask); + +ulong2 __ovld __cnfn shuffle2(ulong2 x, ulong2 y, ulong2 mask); +ulong2 __ovld __cnfn shuffle2(ulong4 x, ulong4 y, ulong2 mask); +ulong2 __ovld __cnfn shuffle2(ulong8 x, ulong8 y, ulong2 mask); +ulong2 __ovld __cnfn shuffle2(ulong16 x, ulong16 y, ulong2 mask); + +float2 __ovld __cnfn shuffle2(float2 x, float2 y, uint2 mask); +float2 __ovld __cnfn shuffle2(float4 x, float4 y, uint2 mask); +float2 __ovld __cnfn shuffle2(float8 x, float8 y, uint2 mask); +float2 __ovld __cnfn shuffle2(float16 x, float16 y, uint2 mask); + +char4 __ovld __cnfn shuffle2(char2 x, char2 y, uchar4 mask); +char4 __ovld __cnfn shuffle2(char4 x, char4 y, uchar4 mask); +char4 __ovld __cnfn shuffle2(char8 x, char8 y, uchar4 mask); +char4 __ovld __cnfn shuffle2(char16 x, char16 y, uchar4 mask); + +uchar4 __ovld __cnfn shuffle2(uchar2 x, uchar2 y, uchar4 mask); +uchar4 __ovld __cnfn shuffle2(uchar4 x, uchar4 y, uchar4 mask); +uchar4 __ovld __cnfn shuffle2(uchar8 x, uchar8 y, uchar4 mask); +uchar4 __ovld __cnfn shuffle2(uchar16 x, uchar16 y, uchar4 mask); + +short4 __ovld __cnfn shuffle2(short2 x, short2 y, ushort4 mask); +short4 __ovld __cnfn shuffle2(short4 x, short4 y, ushort4 mask); +short4 __ovld __cnfn shuffle2(short8 x, short8 y, ushort4 mask); +short4 __ovld __cnfn shuffle2(short16 x, short16 y, ushort4 mask); + +ushort4 __ovld __cnfn shuffle2(ushort2 x, ushort2 y, ushort4 mask); +ushort4 __ovld __cnfn shuffle2(ushort4 x, ushort4 y, ushort4 mask); +ushort4 __ovld __cnfn shuffle2(ushort8 x, ushort8 y, ushort4 mask); +ushort4 __ovld __cnfn shuffle2(ushort16 x, ushort16 y, ushort4 mask); + +int4 __ovld __cnfn shuffle2(int2 x, int2 y, uint4 mask); +int4 __ovld __cnfn shuffle2(int4 x, int4 y, uint4 mask); +int4 __ovld __cnfn shuffle2(int8 x, int8 y, uint4 mask); +int4 __ovld __cnfn shuffle2(int16 x, int16 y, uint4 mask); + +uint4 __ovld __cnfn shuffle2(uint2 x, uint2 y, uint4 mask); +uint4 __ovld __cnfn shuffle2(uint4 x, uint4 y, uint4 mask); +uint4 __ovld __cnfn shuffle2(uint8 x, uint8 y, uint4 mask); +uint4 __ovld __cnfn shuffle2(uint16 x, uint16 y, uint4 mask); + +long4 __ovld __cnfn shuffle2(long2 x, long2 y, ulong4 mask); +long4 __ovld __cnfn shuffle2(long4 x, long4 y, ulong4 mask); +long4 __ovld __cnfn shuffle2(long8 x, long8 y, ulong4 mask); +long4 __ovld __cnfn shuffle2(long16 x, long16 y, ulong4 mask); + +ulong4 __ovld __cnfn shuffle2(ulong2 x, ulong2 y, ulong4 mask); +ulong4 __ovld __cnfn shuffle2(ulong4 x, ulong4 y, ulong4 mask); +ulong4 __ovld __cnfn shuffle2(ulong8 x, ulong8 y, ulong4 mask); +ulong4 __ovld __cnfn shuffle2(ulong16 x, ulong16 y, ulong4 mask); + +float4 __ovld __cnfn shuffle2(float2 x, float2 y, uint4 mask); +float4 __ovld __cnfn shuffle2(float4 x, float4 y, uint4 mask); +float4 __ovld __cnfn shuffle2(float8 x, float8 y, uint4 mask); +float4 __ovld __cnfn shuffle2(float16 x, float16 y, uint4 mask); + +char8 __ovld __cnfn shuffle2(char2 x, char2 y, uchar8 mask); +char8 __ovld __cnfn shuffle2(char4 x, char4 y, uchar8 mask); +char8 __ovld __cnfn shuffle2(char8 x, char8 y, uchar8 mask); +char8 __ovld __cnfn shuffle2(char16 x, char16 y, uchar8 mask); + +uchar8 __ovld __cnfn shuffle2(uchar2 x, uchar2 y, uchar8 mask); +uchar8 __ovld __cnfn shuffle2(uchar4 x, uchar4 y, uchar8 mask); +uchar8 __ovld __cnfn shuffle2(uchar8 x, uchar8 y, uchar8 mask); +uchar8 __ovld __cnfn shuffle2(uchar16 x, uchar16 y, uchar8 mask); + +short8 __ovld __cnfn shuffle2(short2 x, short2 y, ushort8 mask); +short8 __ovld __cnfn shuffle2(short4 x, short4 y, ushort8 mask); +short8 __ovld __cnfn shuffle2(short8 x, short8 y, ushort8 mask); +short8 __ovld __cnfn shuffle2(short16 x, short16 y, ushort8 mask); + +ushort8 __ovld __cnfn shuffle2(ushort2 x, ushort2 y, ushort8 mask); +ushort8 __ovld __cnfn shuffle2(ushort4 x, ushort4 y, ushort8 mask); +ushort8 __ovld __cnfn shuffle2(ushort8 x, ushort8 y, ushort8 mask); +ushort8 __ovld __cnfn shuffle2(ushort16 x, ushort16 y, ushort8 mask); + +int8 __ovld __cnfn shuffle2(int2 x, int2 y, uint8 mask); +int8 __ovld __cnfn shuffle2(int4 x, int4 y, uint8 mask); +int8 __ovld __cnfn shuffle2(int8 x, int8 y, uint8 mask); +int8 __ovld __cnfn shuffle2(int16 x, int16 y, uint8 mask); + +uint8 __ovld __cnfn shuffle2(uint2 x, uint2 y, uint8 mask); +uint8 __ovld __cnfn shuffle2(uint4 x, uint4 y, uint8 mask); +uint8 __ovld __cnfn shuffle2(uint8 x, uint8 y, uint8 mask); +uint8 __ovld __cnfn shuffle2(uint16 x, uint16 y, uint8 mask); + +long8 __ovld __cnfn shuffle2(long2 x, long2 y, ulong8 mask); +long8 __ovld __cnfn shuffle2(long4 x, long4 y, ulong8 mask); +long8 __ovld __cnfn shuffle2(long8 x, long8 y, ulong8 mask); +long8 __ovld __cnfn shuffle2(long16 x, long16 y, ulong8 mask); + +ulong8 __ovld __cnfn shuffle2(ulong2 x, ulong2 y, ulong8 mask); +ulong8 __ovld __cnfn shuffle2(ulong4 x, ulong4 y, ulong8 mask); +ulong8 __ovld __cnfn shuffle2(ulong8 x, ulong8 y, ulong8 mask); +ulong8 __ovld __cnfn shuffle2(ulong16 x, ulong16 y, ulong8 mask); + +float8 __ovld __cnfn shuffle2(float2 x, float2 y, uint8 mask); +float8 __ovld __cnfn shuffle2(float4 x, float4 y, uint8 mask); +float8 __ovld __cnfn shuffle2(float8 x, float8 y, uint8 mask); +float8 __ovld __cnfn shuffle2(float16 x, float16 y, uint8 mask); + +char16 __ovld __cnfn shuffle2(char2 x, char2 y, uchar16 mask); +char16 __ovld __cnfn shuffle2(char4 x, char4 y, uchar16 mask); +char16 __ovld __cnfn shuffle2(char8 x, char8 y, uchar16 mask); +char16 __ovld __cnfn shuffle2(char16 x, char16 y, uchar16 mask); + +uchar16 __ovld __cnfn shuffle2(uchar2 x, uchar2 y, uchar16 mask); +uchar16 __ovld __cnfn shuffle2(uchar4 x, uchar4 y, uchar16 mask); +uchar16 __ovld __cnfn shuffle2(uchar8 x, uchar8 y, uchar16 mask); +uchar16 __ovld __cnfn shuffle2(uchar16 x, uchar16 y, uchar16 mask); + +short16 __ovld __cnfn shuffle2(short2 x, short2 y, ushort16 mask); +short16 __ovld __cnfn shuffle2(short4 x, short4 y, ushort16 mask); +short16 __ovld __cnfn shuffle2(short8 x, short8 y, ushort16 mask); +short16 __ovld __cnfn shuffle2(short16 x, short16 y, ushort16 mask); + +ushort16 __ovld __cnfn shuffle2(ushort2 x, ushort2 y, ushort16 mask); +ushort16 __ovld __cnfn shuffle2(ushort4 x, ushort4 y, ushort16 mask); +ushort16 __ovld __cnfn shuffle2(ushort8 x, ushort8 y, ushort16 mask); +ushort16 __ovld __cnfn shuffle2(ushort16 x, ushort16 y, ushort16 mask); + +int16 __ovld __cnfn shuffle2(int2 x, int2 y, uint16 mask); +int16 __ovld __cnfn shuffle2(int4 x, int4 y, uint16 mask); +int16 __ovld __cnfn shuffle2(int8 x, int8 y, uint16 mask); +int16 __ovld __cnfn shuffle2(int16 x, int16 y, uint16 mask); + +uint16 __ovld __cnfn shuffle2(uint2 x, uint2 y, uint16 mask); +uint16 __ovld __cnfn shuffle2(uint4 x, uint4 y, uint16 mask); +uint16 __ovld __cnfn shuffle2(uint8 x, uint8 y, uint16 mask); +uint16 __ovld __cnfn shuffle2(uint16 x, uint16 y, uint16 mask); + +long16 __ovld __cnfn shuffle2(long2 x, long2 y, ulong16 mask); +long16 __ovld __cnfn shuffle2(long4 x, long4 y, ulong16 mask); +long16 __ovld __cnfn shuffle2(long8 x, long8 y, ulong16 mask); +long16 __ovld __cnfn shuffle2(long16 x, long16 y, ulong16 mask); + +ulong16 __ovld __cnfn shuffle2(ulong2 x, ulong2 y, ulong16 mask); +ulong16 __ovld __cnfn shuffle2(ulong4 x, ulong4 y, ulong16 mask); +ulong16 __ovld __cnfn shuffle2(ulong8 x, ulong8 y, ulong16 mask); +ulong16 __ovld __cnfn shuffle2(ulong16 x, ulong16 y, ulong16 mask); + +float16 __ovld __cnfn shuffle2(float2 x, float2 y, uint16 mask); +float16 __ovld __cnfn shuffle2(float4 x, float4 y, uint16 mask); +float16 __ovld __cnfn shuffle2(float8 x, float8 y, uint16 mask); +float16 __ovld __cnfn shuffle2(float16 x, float16 y, uint16 mask); + +#ifdef cl_khr_fp64 +double2 __ovld __cnfn shuffle2(double2 x, double2 y, ulong2 mask); +double2 __ovld __cnfn shuffle2(double4 x, double4 y, ulong2 mask); +double2 __ovld __cnfn shuffle2(double8 x, double8 y, ulong2 mask); +double2 __ovld __cnfn shuffle2(double16 x, double16 y, ulong2 mask); + +double4 __ovld __cnfn shuffle2(double2 x, double2 y, ulong4 mask); +double4 __ovld __cnfn shuffle2(double4 x, double4 y, ulong4 mask); +double4 __ovld __cnfn shuffle2(double8 x, double8 y, ulong4 mask); +double4 __ovld __cnfn shuffle2(double16 x, double16 y, ulong4 mask); + +double8 __ovld __cnfn shuffle2(double2 x, double2 y, ulong8 mask); +double8 __ovld __cnfn shuffle2(double4 x, double4 y, ulong8 mask); +double8 __ovld __cnfn shuffle2(double8 x, double8 y, ulong8 mask); +double8 __ovld __cnfn shuffle2(double16 x, double16 y, ulong8 mask); + +double16 __ovld __cnfn shuffle2(double2 x, double2 y, ulong16 mask); +double16 __ovld __cnfn shuffle2(double4 x, double4 y, ulong16 mask); +double16 __ovld __cnfn shuffle2(double8 x, double8 y, ulong16 mask); +double16 __ovld __cnfn shuffle2(double16 x, double16 y, ulong16 mask); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half2 __ovld __cnfn shuffle2(half2 x, half2 y, ushort2 mask); +half2 __ovld __cnfn shuffle2(half4 x, half4 y, ushort2 mask); +half2 __ovld __cnfn shuffle2(half8 x, half8 y, ushort2 mask); +half2 __ovld __cnfn shuffle2(half16 x, half16 y, ushort2 mask); + +half4 __ovld __cnfn shuffle2(half2 x, half2 y, ushort4 mask); +half4 __ovld __cnfn shuffle2(half4 x, half4 y, ushort4 mask); +half4 __ovld __cnfn shuffle2(half8 x, half8 y, ushort4 mask); +half4 __ovld __cnfn shuffle2(half16 x, half16 y, ushort4 mask); + +half8 __ovld __cnfn shuffle2(half2 x, half2 y, ushort8 mask); +half8 __ovld __cnfn shuffle2(half4 x, half4 y, ushort8 mask); +half8 __ovld __cnfn shuffle2(half8 x, half8 y, ushort8 mask); +half8 __ovld __cnfn shuffle2(half16 x, half16 y, ushort8 mask); + +half16 __ovld __cnfn shuffle2(half2 x, half2 y, ushort16 mask); +half16 __ovld __cnfn shuffle2(half4 x, half4 y, ushort16 mask); +half16 __ovld __cnfn shuffle2(half8 x, half8 y, ushort16 mask); +half16 __ovld __cnfn shuffle2(half16 x, half16 y, ushort16 mask); +#endif //cl_khr_fp16 + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +// OpenCL v1.2 s6.12.13, v2.0 s6.13.13 - printf + +int printf(__constant const char* st, ...) __attribute__((format(printf, 1, 2))); +#endif + +// OpenCL v1.1 s6.11.3, v1.2 s6.12.14, v2.0 s6.13.14 - Image Read and Write Functions + +#ifdef cl_khr_gl_msaa_sharing +#pragma OPENCL EXTENSION cl_khr_gl_msaa_sharing : enable +#endif //cl_khr_gl_msaa_sharing + +/** + * Use the coordinate (coord.xy) to do an element lookup in + * the 2D image object specified by image. + * + * Use the coordinate (coord.x, coord.y, coord.z) to do + * an element lookup in the 3D image object specified + * by image. coord.w is ignored. + * + * Use the coordinate (coord.z) to index into the + * 2D image array object specified by image_array + * and (coord.x, coord.y) to do an element lookup in + * the 2D image object specified by image. + * + * Use the coordinate (x) to do an element lookup in + * the 1D image object specified by image. + * + * Use the coordinate (coord.y) to index into the + * 1D image array object specified by image_array + * and (coord.x) to do an element lookup in + * the 1D image object specified by image. + * + * Use the coordinate (cood.xy) and sample to do an + * element lookup in the 2D multi-sample image specified + * by image. + * + * Use coord.xy and sample to do an element + * lookup in the 2D multi-sample image layer + * identified by index coord.z in the 2D multi-sample + * image array specified by image. + * + * For mipmap images, use the mip-level specified by + * the Level-of-Detail (lod) or use gradients for LOD + * computation. + * + * read_imagef returns floating-point values in the + * range [0.0 ... 1.0] for image objects created with + * image_channel_data_type set to one of the predefined + * packed formats or CL_UNORM_INT8, or + * CL_UNORM_INT16. + * + * read_imagef returns floating-point values in the + * range [-1.0 ... 1.0] for image objects created with + * image_channel_data_type set to CL_SNORM_INT8, + * or CL_SNORM_INT16. + * + * read_imagef returns floating-point values for image + * objects created with image_channel_data_type set to + * CL_HALF_FLOAT or CL_FLOAT. + * + * read_imagei and read_imageui return + * unnormalized signed integer and unsigned integer + * values respectively. Each channel will be stored in a + * 32-bit integer. + * + * read_imagei can only be used with image objects + * created with image_channel_data_type set to one of + * the following values: + * CL_SIGNED_INT8, + * CL_SIGNED_INT16 and + * CL_SIGNED_INT32. + * If the image_channel_data_type is not one of the + * above values, the values returned by read_imagei + * are undefined. + * + * read_imageui can only be used with image objects + * created with image_channel_data_type set to one of + * the following values: + * CL_UNSIGNED_INT8, + * CL_UNSIGNED_INT16 and + * CL_UNSIGNED_INT32. + * If the image_channel_data_type is not one of the + * above values, the values returned by read_imageui + * are undefined. + * + * The read_image{i|ui} calls support a nearest filter + * only. The filter_mode specified in sampler + * must be set to CLK_FILTER_NEAREST; otherwise + * the values returned are undefined. + + * The read_image{f|i|ui} calls that take + * integer coordinates must use a sampler with + * normalized coordinates set to + * CLK_NORMALIZED_COORDS_FALSE and + * addressing mode set to + * CLK_ADDRESS_CLAMP_TO_EDGE, + * CLK_ADDRESS_CLAMP or CLK_ADDRESS_NONE; + * otherwise the values returned are undefined. + * + * Values returned by read_imagef for image objects + * with image_channel_data_type values not specified + * in the description above are undefined. + */ + +float4 __purefn __ovld read_imagef(read_only image2d_t image, sampler_t sampler, int2 coord); +float4 __purefn __ovld read_imagef(read_only image2d_t image, sampler_t sampler, float2 coord); + +int4 __purefn __ovld read_imagei(read_only image2d_t image, sampler_t sampler, int2 coord); +int4 __purefn __ovld read_imagei(read_only image2d_t image, sampler_t sampler, float2 coord); +uint4 __purefn __ovld read_imageui(read_only image2d_t image, sampler_t sampler, int2 coord); +uint4 __purefn __ovld read_imageui(read_only image2d_t image, sampler_t sampler, float2 coord); + +float4 __purefn __ovld read_imagef(read_only image3d_t image, sampler_t sampler, int4 coord); +float4 __purefn __ovld read_imagef(read_only image3d_t image, sampler_t sampler, float4 coord); + +int4 __purefn __ovld read_imagei(read_only image3d_t image, sampler_t sampler, int4 coord); +int4 __purefn __ovld read_imagei(read_only image3d_t image, sampler_t sampler, float4 coord); +uint4 __purefn __ovld read_imageui(read_only image3d_t image, sampler_t sampler, int4 coord); +uint4 __purefn __ovld read_imageui(read_only image3d_t image, sampler_t sampler, float4 coord); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +float4 __purefn __ovld read_imagef(read_only image2d_array_t image_array, sampler_t sampler, int4 coord); +float4 __purefn __ovld read_imagef(read_only image2d_array_t image_array, sampler_t sampler, float4 coord); + +int4 __purefn __ovld read_imagei(read_only image2d_array_t image_array, sampler_t sampler, int4 coord); +int4 __purefn __ovld read_imagei(read_only image2d_array_t image_array, sampler_t sampler, float4 coord); +uint4 __purefn __ovld read_imageui(read_only image2d_array_t image_array, sampler_t sampler, int4 coord); +uint4 __purefn __ovld read_imageui(read_only image2d_array_t image_array, sampler_t sampler, float4 coord); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) + +float4 __purefn __ovld read_imagef(read_only image1d_t image, sampler_t sampler, int coord); +float4 __purefn __ovld read_imagef(read_only image1d_t image, sampler_t sampler, float coord); + +int4 __purefn __ovld read_imagei(read_only image1d_t image, sampler_t sampler, int coord); +int4 __purefn __ovld read_imagei(read_only image1d_t image, sampler_t sampler, float coord); +uint4 __purefn __ovld read_imageui(read_only image1d_t image, sampler_t sampler, int coord); +uint4 __purefn __ovld read_imageui(read_only image1d_t image, sampler_t sampler, float coord); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +float4 __purefn __ovld read_imagef(read_only image1d_array_t image_array, sampler_t sampler, int2 coord); +float4 __purefn __ovld read_imagef(read_only image1d_array_t image_array, sampler_t sampler, float2 coord); + +int4 __purefn __ovld read_imagei(read_only image1d_array_t image_array, sampler_t sampler, int2 coord); +int4 __purefn __ovld read_imagei(read_only image1d_array_t image_array, sampler_t sampler, float2 coord); +uint4 __purefn __ovld read_imageui(read_only image1d_array_t image_array, sampler_t sampler, int2 coord); +uint4 __purefn __ovld read_imageui(read_only image1d_array_t image_array, sampler_t sampler, float2 coord); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) + +#ifdef cl_khr_depth_images +float __purefn __ovld read_imagef(read_only image2d_depth_t image, sampler_t sampler, float2 coord); +float __purefn __ovld read_imagef(read_only image2d_depth_t image, sampler_t sampler, int2 coord); + +float __purefn __ovld read_imagef(read_only image2d_array_depth_t image, sampler_t sampler, float4 coord); +float __purefn __ovld read_imagef(read_only image2d_array_depth_t image, sampler_t sampler, int4 coord); +#endif //cl_khr_depth_images + +#if defined(cl_khr_gl_msaa_sharing) +float4 __purefn __ovld read_imagef(read_only image2d_msaa_t image, int2 coord, int sample); +int4 __purefn __ovld read_imagei(read_only image2d_msaa_t image, int2 coord, int sample); +uint4 __purefn __ovld read_imageui(read_only image2d_msaa_t image, int2 coord, int sample); + +float __purefn __ovld read_imagef(read_only image2d_msaa_depth_t image, int2 coord, int sample); + +float4 __purefn __ovld read_imagef(read_only image2d_array_msaa_t image, int4 coord, int sample); +int4 __purefn __ovld read_imagei(read_only image2d_array_msaa_t image, int4 coord, int sample); +uint4 __purefn __ovld read_imageui(read_only image2d_array_msaa_t image, int4 coord, int sample); + +float __purefn __ovld read_imagef(read_only image2d_array_msaa_depth_t image, int4 coord, int sample); +#endif //cl_khr_gl_msaa_sharing + +// OpenCL Extension v2.0 s9.18 - Mipmaps +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#ifdef cl_khr_mipmap_image + +float4 __purefn __ovld read_imagef(read_only image1d_t image, sampler_t sampler, float coord, float lod); +int4 __purefn __ovld read_imagei(read_only image1d_t image, sampler_t sampler, float coord, float lod); +uint4 __purefn __ovld read_imageui(read_only image1d_t image, sampler_t sampler, float coord, float lod); + +float4 __purefn __ovld read_imagef(read_only image1d_array_t image_array, sampler_t sampler, float2 coord, float lod); +int4 __purefn __ovld read_imagei(read_only image1d_array_t image_array, sampler_t sampler, float2 coord, float lod); +uint4 __purefn __ovld read_imageui(read_only image1d_array_t image_array, sampler_t sampler, float2 coord, float lod); + +float4 __purefn __ovld read_imagef(read_only image2d_t image, sampler_t sampler, float2 coord, float lod); +int4 __purefn __ovld read_imagei(read_only image2d_t image, sampler_t sampler, float2 coord, float lod); +uint4 __purefn __ovld read_imageui(read_only image2d_t image, sampler_t sampler, float2 coord, float lod); + +float __purefn __ovld read_imagef(read_only image2d_depth_t image, sampler_t sampler, float2 coord, float lod); + +float4 __purefn __ovld read_imagef(read_only image2d_array_t image_array, sampler_t sampler, float4 coord, float lod); +int4 __purefn __ovld read_imagei(read_only image2d_array_t image_array, sampler_t sampler, float4 coord, float lod); +uint4 __purefn __ovld read_imageui(read_only image2d_array_t image_array, sampler_t sampler, float4 coord, float lod); + +float __purefn __ovld read_imagef(read_only image2d_array_depth_t image, sampler_t sampler, float4 coord, float lod); + +float4 __purefn __ovld read_imagef(read_only image3d_t image, sampler_t sampler, float4 coord, float lod); +int4 __purefn __ovld read_imagei(read_only image3d_t image, sampler_t sampler, float4 coord, float lod); +uint4 __purefn __ovld read_imageui(read_only image3d_t image, sampler_t sampler, float4 coord, float lod); + +float4 __purefn __ovld read_imagef(read_only image1d_t image, sampler_t sampler, float coord, float gradientX, float gradientY); +int4 __purefn __ovld read_imagei(read_only image1d_t image, sampler_t sampler, float coord, float gradientX, float gradientY); +uint4 __purefn __ovld read_imageui(read_only image1d_t image, sampler_t sampler, float coord, float gradientX, float gradientY); + +float4 __purefn __ovld read_imagef(read_only image1d_array_t image_array, sampler_t sampler, float2 coord, float gradientX, float gradientY); +int4 __purefn __ovld read_imagei(read_only image1d_array_t image_array, sampler_t sampler, float2 coord, float gradientX, float gradientY); +uint4 __purefn __ovld read_imageui(read_only image1d_array_t image_array, sampler_t sampler, float2 coord, float gradientX, float gradientY); + +float4 __purefn __ovld read_imagef(read_only image2d_t image, sampler_t sampler, float2 coord, float2 gradientX, float2 gradientY); +int4 __purefn __ovld read_imagei(read_only image2d_t image, sampler_t sampler, float2 coord, float2 gradientX, float2 gradientY); +uint4 __purefn __ovld read_imageui(read_only image2d_t image, sampler_t sampler, float2 coord, float2 gradientX, float2 gradientY); + +float __purefn __ovld read_imagef(read_only image2d_depth_t image, sampler_t sampler, float2 coord, float2 gradientX, float2 gradientY); + +float4 __purefn __ovld read_imagef(read_only image2d_array_t image_array, sampler_t sampler, float4 coord, float2 gradientX, float2 gradientY); +int4 __purefn __ovld read_imagei(read_only image2d_array_t image_array, sampler_t sampler, float4 coord, float2 gradientX, float2 gradientY); +uint4 __purefn __ovld read_imageui(read_only image2d_array_t image_array, sampler_t sampler, float4 coord, float2 gradientX, float2 gradientY); + +float __purefn __ovld read_imagef(read_only image2d_array_depth_t image, sampler_t sampler, float4 coord, float2 gradientX, float2 gradientY); + +float4 __purefn __ovld read_imagef(read_only image3d_t image, sampler_t sampler, float4 coord, float4 gradientX, float4 gradientY); +int4 __purefn __ovld read_imagei(read_only image3d_t image, sampler_t sampler, float4 coord, float4 gradientX, float4 gradientY); +uint4 __purefn __ovld read_imageui(read_only image3d_t image, sampler_t sampler, float4 coord, float4 gradientX, float4 gradientY); + +#endif //cl_khr_mipmap_image +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) + +/** +* Sampler-less Image Access +*/ + +float4 __purefn __ovld read_imagef(read_only image1d_t image, int coord); +int4 __purefn __ovld read_imagei(read_only image1d_t image, int coord); +uint4 __purefn __ovld read_imageui(read_only image1d_t image, int coord); + +float4 __purefn __ovld read_imagef(read_only image1d_buffer_t image, int coord); +int4 __purefn __ovld read_imagei(read_only image1d_buffer_t image, int coord); +uint4 __purefn __ovld read_imageui(read_only image1d_buffer_t image, int coord); + +float4 __purefn __ovld read_imagef(read_only image1d_array_t image, int2 coord); +int4 __purefn __ovld read_imagei(read_only image1d_array_t image, int2 coord); +uint4 __purefn __ovld read_imageui(read_only image1d_array_t image, int2 coord); + +float4 __purefn __ovld read_imagef(read_only image2d_t image, int2 coord); +int4 __purefn __ovld read_imagei(read_only image2d_t image, int2 coord); +uint4 __purefn __ovld read_imageui(read_only image2d_t image, int2 coord); + +float4 __purefn __ovld read_imagef(read_only image2d_array_t image, int4 coord); +int4 __purefn __ovld read_imagei(read_only image2d_array_t image, int4 coord); +uint4 __purefn __ovld read_imageui(read_only image2d_array_t image, int4 coord); + +#ifdef cl_khr_depth_images +float __purefn __ovld read_imagef(read_only image2d_depth_t image, int2 coord); +float __purefn __ovld read_imagef(read_only image2d_array_depth_t image, int4 coord); +#endif //cl_khr_depth_images + +float4 __purefn __ovld read_imagef(read_only image3d_t image, int4 coord); +int4 __purefn __ovld read_imagei(read_only image3d_t image, int4 coord); +uint4 __purefn __ovld read_imageui(read_only image3d_t image, int4 coord); + +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) + +// Image read functions returning half4 type +#ifdef cl_khr_fp16 +half4 __purefn __ovld read_imageh(read_only image1d_t image, sampler_t sampler, int coord); +half4 __purefn __ovld read_imageh(read_only image1d_t image, sampler_t sampler, float coord); +half4 __purefn __ovld read_imageh(read_only image2d_t image, sampler_t sampler, int2 coord); +half4 __purefn __ovld read_imageh(read_only image2d_t image, sampler_t sampler, float2 coord); +half4 __purefn __ovld read_imageh(read_only image3d_t image, sampler_t sampler, int4 coord); +half4 __purefn __ovld read_imageh(read_only image3d_t image, sampler_t sampler, float4 coord); +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +half4 __purefn __ovld read_imageh(read_only image1d_array_t image, sampler_t sampler, int2 coord); +half4 __purefn __ovld read_imageh(read_only image1d_array_t image, sampler_t sampler, float2 coord); +half4 __purefn __ovld read_imageh(read_only image2d_array_t image, sampler_t sampler, int4 coord); +half4 __purefn __ovld read_imageh(read_only image2d_array_t image, sampler_t sampler, float4 coord); +/** + * Sampler-less Image Access + */ +half4 __purefn __ovld read_imageh(read_only image1d_t image, int coord); +half4 __purefn __ovld read_imageh(read_only image2d_t image, int2 coord); +half4 __purefn __ovld read_imageh(read_only image3d_t image, int4 coord); +half4 __purefn __ovld read_imageh(read_only image1d_array_t image, int2 coord); +half4 __purefn __ovld read_imageh(read_only image2d_array_t image, int4 coord); +half4 __purefn __ovld read_imageh(read_only image1d_buffer_t image, int coord); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_1_2) +#endif //cl_khr_fp16 + +// Image read functions for read_write images +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +float4 __purefn __ovld read_imagef(read_write image1d_t image, int coord); +int4 __purefn __ovld read_imagei(read_write image1d_t image, int coord); +uint4 __purefn __ovld read_imageui(read_write image1d_t image, int coord); + +float4 __purefn __ovld read_imagef(read_write image1d_buffer_t image, int coord); +int4 __purefn __ovld read_imagei(read_write image1d_buffer_t image, int coord); +uint4 __purefn __ovld read_imageui(read_write image1d_buffer_t image, int coord); + +float4 __purefn __ovld read_imagef(read_write image1d_array_t image, int2 coord); +int4 __purefn __ovld read_imagei(read_write image1d_array_t image, int2 coord); +uint4 __purefn __ovld read_imageui(read_write image1d_array_t image, int2 coord); + +float4 __purefn __ovld read_imagef(read_write image2d_t image, int2 coord); +int4 __purefn __ovld read_imagei(read_write image2d_t image, int2 coord); +uint4 __purefn __ovld read_imageui(read_write image2d_t image, int2 coord); + +float4 __purefn __ovld read_imagef(read_write image2d_array_t image, int4 coord); +int4 __purefn __ovld read_imagei(read_write image2d_array_t image, int4 coord); +uint4 __purefn __ovld read_imageui(read_write image2d_array_t image, int4 coord); + +float4 __purefn __ovld read_imagef(read_write image3d_t image, int4 coord); +int4 __purefn __ovld read_imagei(read_write image3d_t image, int4 coord); +uint4 __purefn __ovld read_imageui(read_write image3d_t image, int4 coord); + +#ifdef cl_khr_depth_images +float __purefn __ovld read_imagef(read_write image2d_depth_t image, int2 coord); +float __purefn __ovld read_imagef(read_write image2d_array_depth_t image, int4 coord); +#endif //cl_khr_depth_images + +#if cl_khr_gl_msaa_sharing +float4 __purefn __ovld read_imagef(read_write image2d_msaa_t image, int2 coord, int sample); +int4 __purefn __ovld read_imagei(read_write image2d_msaa_t image, int2 coord, int sample); +uint4 __purefn __ovld read_imageui(read_write image2d_msaa_t image, int2 coord, int sample); + +float4 __purefn __ovld read_imagef(read_write image2d_array_msaa_t image, int4 coord, int sample); +int4 __purefn __ovld read_imagei(read_write image2d_array_msaa_t image, int4 coord, int sample); +uint4 __purefn __ovld read_imageui(read_write image2d_array_msaa_t image, int4 coord, int sample); + +float __purefn __ovld read_imagef(read_write image2d_msaa_depth_t image, int2 coord, int sample); +float __purefn __ovld read_imagef(read_write image2d_array_msaa_depth_t image, int4 coord, int sample); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#ifdef cl_khr_mipmap_image +float4 __purefn __ovld read_imagef(read_write image1d_t image, sampler_t sampler, float coord, float lod); +int4 __purefn __ovld read_imagei(read_write image1d_t image, sampler_t sampler, float coord, float lod); +uint4 __purefn __ovld read_imageui(read_write image1d_t image, sampler_t sampler, float coord, float lod); + +float4 __purefn __ovld read_imagef(read_write image1d_array_t image_array, sampler_t sampler, float2 coord, float lod); +int4 __purefn __ovld read_imagei(read_write image1d_array_t image_array, sampler_t sampler, float2 coord, float lod); +uint4 __purefn __ovld read_imageui(read_write image1d_array_t image_array, sampler_t sampler, float2 coord, float lod); + +float4 __purefn __ovld read_imagef(read_write image2d_t image, sampler_t sampler, float2 coord, float lod); +int4 __purefn __ovld read_imagei(read_write image2d_t image, sampler_t sampler, float2 coord, float lod); +uint4 __purefn __ovld read_imageui(read_write image2d_t image, sampler_t sampler, float2 coord, float lod); + +float __purefn __ovld read_imagef(read_write image2d_depth_t image, sampler_t sampler, float2 coord, float lod); + +float4 __purefn __ovld read_imagef(read_write image2d_array_t image_array, sampler_t sampler, float4 coord, float lod); +int4 __purefn __ovld read_imagei(read_write image2d_array_t image_array, sampler_t sampler, float4 coord, float lod); +uint4 __purefn __ovld read_imageui(read_write image2d_array_t image_array, sampler_t sampler, float4 coord, float lod); + +float __purefn __ovld read_imagef(read_write image2d_array_depth_t image, sampler_t sampler, float4 coord, float lod); + +float4 __purefn __ovld read_imagef(read_write image3d_t image, sampler_t sampler, float4 coord, float lod); +int4 __purefn __ovld read_imagei(read_write image3d_t image, sampler_t sampler, float4 coord, float lod); +uint4 __purefn __ovld read_imageui(read_write image3d_t image, sampler_t sampler, float4 coord, float lod); + +float4 __purefn __ovld read_imagef(read_write image1d_t image, sampler_t sampler, float coord, float gradientX, float gradientY); +int4 __purefn __ovld read_imagei(read_write image1d_t image, sampler_t sampler, float coord, float gradientX, float gradientY); +uint4 __purefn __ovld read_imageui(read_write image1d_t image, sampler_t sampler, float coord, float gradientX, float gradientY); + +float4 __purefn __ovld read_imagef(read_write image1d_array_t image_array, sampler_t sampler, float2 coord, float gradientX, float gradientY); +int4 __purefn __ovld read_imagei(read_write image1d_array_t image_array, sampler_t sampler, float2 coord, float gradientX, float gradientY); +uint4 __purefn __ovld read_imageui(read_write image1d_array_t image_array, sampler_t sampler, float2 coord, float gradientX, float gradientY); + +float4 __purefn __ovld read_imagef(read_write image2d_t image, sampler_t sampler, float2 coord, float2 gradientX, float2 gradientY); +int4 __purefn __ovld read_imagei(read_write image2d_t image, sampler_t sampler, float2 coord, float2 gradientX, float2 gradientY); +uint4 __purefn __ovld read_imageui(read_write image2d_t image, sampler_t sampler, float2 coord, float2 gradientX, float2 gradientY); + +float __purefn __ovld read_imagef(read_write image2d_depth_t image, sampler_t sampler, float2 coord, float2 gradientX, float2 gradientY); + +float4 __purefn __ovld read_imagef(read_write image2d_array_t image_array, sampler_t sampler, float4 coord, float2 gradientX, float2 gradientY); +int4 __purefn __ovld read_imagei(read_write image2d_array_t image_array, sampler_t sampler, float4 coord, float2 gradientX, float2 gradientY); +uint4 __purefn __ovld read_imageui(read_write image2d_array_t image_array, sampler_t sampler, float4 coord, float2 gradientX, float2 gradientY); + +float __purefn __ovld read_imagef(read_write image2d_array_depth_t image, sampler_t sampler, float4 coord, float2 gradientX, float2 gradientY); + +float4 __purefn __ovld read_imagef(read_write image3d_t image, sampler_t sampler, float4 coord, float4 gradientX, float4 gradientY); +int4 __purefn __ovld read_imagei(read_write image3d_t image, sampler_t sampler, float4 coord, float4 gradientX, float4 gradientY); +uint4 __purefn __ovld read_imageui(read_write image3d_t image, sampler_t sampler, float4 coord, float4 gradientX, float4 gradientY); + +#endif //cl_khr_mipmap_image +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// Image read functions returning half4 type +#ifdef cl_khr_fp16 +half4 __purefn __ovld read_imageh(read_write image1d_t image, int coord); +half4 __purefn __ovld read_imageh(read_write image2d_t image, int2 coord); +half4 __purefn __ovld read_imageh(read_write image3d_t image, int4 coord); +half4 __purefn __ovld read_imageh(read_write image1d_array_t image, int2 coord); +half4 __purefn __ovld read_imageh(read_write image2d_array_t image, int4 coord); +half4 __purefn __ovld read_imageh(read_write image1d_buffer_t image, int coord); +#endif //cl_khr_fp16 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Write color value to location specified by coordinate + * (coord.x, coord.y) in the 2D image object specified by image. + * (coord.x, coord.y) are considered to be unnormalized coordinates + * and must be in the range 0 ... image width - 1, and 0 + * ... image height - 1. + + * Write color value to location specified by coordinate + * (coord.x, coord.y) in the 2D image object specified by index + * (coord.z) of the 2D image array object image_array. + * (coord.x, coord.y) are considered to be unnormalized + * coordinates and must be in the range 0 ... image width + * - 1. + * + * Write color value to location specified by coordinate + * (coord) in the 1D image (buffer) object specified by image. + * coord is considered to be unnormalized coordinates + * and must be in the range 0 ... image width - 1. + * + * Write color value to location specified by coordinate + * (coord.x) in the 1D image object specified by index + * (coord.y) of the 1D image array object image_array. + * x is considered to be unnormalized coordinates + * and must be in the range 0 ... image width - 1. + * + * Write color value to location specified by coordinate + * (coord.x, coord.y, coord.z) in the 3D image object specified by image. + * coord.x & coord.y are considered to be unnormalized coordinates + * and must be in the range 0 ... image width - 1, and 0 + * ... image height - 1. + * + * For mipmap images, use mip-level specified by lod. + * + * Appropriate data format conversion to the specified + * image format is done before writing the color value. + * + * write_imagef can only be used with image objects + * created with image_channel_data_type set to one of + * the pre-defined packed formats or set to + * CL_SNORM_INT8, CL_UNORM_INT8, + * CL_SNORM_INT16, CL_UNORM_INT16, + * CL_HALF_FLOAT or CL_FLOAT. Appropriate data + * format conversion will be done to convert channel + * data from a floating-point value to actual data format + * in which the channels are stored. + * + * write_imagei can only be used with image objects + * created with image_channel_data_type set to one of + * the following values: + * CL_SIGNED_INT8, + * CL_SIGNED_INT16 and + * CL_SIGNED_INT32. + * + * write_imageui can only be used with image objects + * created with image_channel_data_type set to one of + * the following values: + * CL_UNSIGNED_INT8, + * CL_UNSIGNED_INT16 and + * CL_UNSIGNED_INT32. + * + * The behavior of write_imagef, write_imagei and + * write_imageui for image objects created with + * image_channel_data_type values not specified in + * the description above or with (x, y) coordinate + * values that are not in the range (0 ... image width -1, + * 0 ... image height - 1), respectively, is undefined. + */ +void __ovld write_imagef(write_only image2d_t image, int2 coord, float4 color); +void __ovld write_imagei(write_only image2d_t image, int2 coord, int4 color); +void __ovld write_imageui(write_only image2d_t image, int2 coord, uint4 color); + +void __ovld write_imagef(write_only image2d_array_t image_array, int4 coord, float4 color); +void __ovld write_imagei(write_only image2d_array_t image_array, int4 coord, int4 color); +void __ovld write_imageui(write_only image2d_array_t image_array, int4 coord, uint4 color); + +void __ovld write_imagef(write_only image1d_t image, int coord, float4 color); +void __ovld write_imagei(write_only image1d_t image, int coord, int4 color); +void __ovld write_imageui(write_only image1d_t image, int coord, uint4 color); + +void __ovld write_imagef(write_only image1d_buffer_t image, int coord, float4 color); +void __ovld write_imagei(write_only image1d_buffer_t image, int coord, int4 color); +void __ovld write_imageui(write_only image1d_buffer_t image, int coord, uint4 color); + +void __ovld write_imagef(write_only image1d_array_t image_array, int2 coord, float4 color); +void __ovld write_imagei(write_only image1d_array_t image_array, int2 coord, int4 color); +void __ovld write_imageui(write_only image1d_array_t image_array, int2 coord, uint4 color); + +#ifdef cl_khr_3d_image_writes +void __ovld write_imagef(write_only image3d_t image, int4 coord, float4 color); +void __ovld write_imagei(write_only image3d_t image, int4 coord, int4 color); +void __ovld write_imageui(write_only image3d_t image, int4 coord, uint4 color); +#endif + +#ifdef cl_khr_depth_images +void __ovld write_imagef(write_only image2d_depth_t image, int2 coord, float color); +void __ovld write_imagef(write_only image2d_array_depth_t image, int4 coord, float color); +#endif //cl_khr_depth_images + +// OpenCL Extension v2.0 s9.18 - Mipmaps +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#ifdef cl_khr_mipmap_image +void __ovld write_imagef(write_only image1d_t image, int coord, int lod, float4 color); +void __ovld write_imagei(write_only image1d_t image, int coord, int lod, int4 color); +void __ovld write_imageui(write_only image1d_t image, int coord, int lod, uint4 color); + +void __ovld write_imagef(write_only image1d_array_t image_array, int2 coord, int lod, float4 color); +void __ovld write_imagei(write_only image1d_array_t image_array, int2 coord, int lod, int4 color); +void __ovld write_imageui(write_only image1d_array_t image_array, int2 coord, int lod, uint4 color); + +void __ovld write_imagef(write_only image2d_t image, int2 coord, int lod, float4 color); +void __ovld write_imagei(write_only image2d_t image, int2 coord, int lod, int4 color); +void __ovld write_imageui(write_only image2d_t image, int2 coord, int lod, uint4 color); + +void __ovld write_imagef(write_only image2d_array_t image_array, int4 coord, int lod, float4 color); +void __ovld write_imagei(write_only image2d_array_t image_array, int4 coord, int lod, int4 color); +void __ovld write_imageui(write_only image2d_array_t image_array, int4 coord, int lod, uint4 color); + +void __ovld write_imagef(write_only image2d_depth_t image, int2 coord, int lod, float color); +void __ovld write_imagef(write_only image2d_array_depth_t image, int4 coord, int lod, float color); + +#ifdef cl_khr_3d_image_writes +void __ovld write_imagef(write_only image3d_t image, int4 coord, int lod, float4 color); +void __ovld write_imagei(write_only image3d_t image, int4 coord, int lod, int4 color); +void __ovld write_imageui(write_only image3d_t image, int4 coord, int lod, uint4 color); +#endif +#endif //cl_khr_mipmap_image +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// Image write functions for half4 type +#ifdef cl_khr_fp16 +void __ovld write_imageh(write_only image1d_t image, int coord, half4 color); +void __ovld write_imageh(write_only image2d_t image, int2 coord, half4 color); +#ifdef cl_khr_3d_image_writes +void __ovld write_imageh(write_only image3d_t image, int4 coord, half4 color); +#endif +void __ovld write_imageh(write_only image1d_array_t image, int2 coord, half4 color); +void __ovld write_imageh(write_only image2d_array_t image, int4 coord, half4 color); +void __ovld write_imageh(write_only image1d_buffer_t image, int coord, half4 color); +#endif //cl_khr_fp16 + +// Image write functions for read_write images +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld write_imagef(read_write image2d_t image, int2 coord, float4 color); +void __ovld write_imagei(read_write image2d_t image, int2 coord, int4 color); +void __ovld write_imageui(read_write image2d_t image, int2 coord, uint4 color); + +void __ovld write_imagef(read_write image2d_array_t image_array, int4 coord, float4 color); +void __ovld write_imagei(read_write image2d_array_t image_array, int4 coord, int4 color); +void __ovld write_imageui(read_write image2d_array_t image_array, int4 coord, uint4 color); + +void __ovld write_imagef(read_write image1d_t image, int coord, float4 color); +void __ovld write_imagei(read_write image1d_t image, int coord, int4 color); +void __ovld write_imageui(read_write image1d_t image, int coord, uint4 color); + +void __ovld write_imagef(read_write image1d_buffer_t image, int coord, float4 color); +void __ovld write_imagei(read_write image1d_buffer_t image, int coord, int4 color); +void __ovld write_imageui(read_write image1d_buffer_t image, int coord, uint4 color); + +void __ovld write_imagef(read_write image1d_array_t image_array, int2 coord, float4 color); +void __ovld write_imagei(read_write image1d_array_t image_array, int2 coord, int4 color); +void __ovld write_imageui(read_write image1d_array_t image_array, int2 coord, uint4 color); + +#ifdef cl_khr_3d_image_writes +void __ovld write_imagef(read_write image3d_t image, int4 coord, float4 color); +void __ovld write_imagei(read_write image3d_t image, int4 coord, int4 color); +void __ovld write_imageui(read_write image3d_t image, int4 coord, uint4 color); +#endif + +#ifdef cl_khr_depth_images +void __ovld write_imagef(read_write image2d_depth_t image, int2 coord, float color); +void __ovld write_imagef(read_write image2d_array_depth_t image, int4 coord, float color); +#endif //cl_khr_depth_images + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#ifdef cl_khr_mipmap_image +void __ovld write_imagef(read_write image1d_t image, int coord, int lod, float4 color); +void __ovld write_imagei(read_write image1d_t image, int coord, int lod, int4 color); +void __ovld write_imageui(read_write image1d_t image, int coord, int lod, uint4 color); + +void __ovld write_imagef(read_write image1d_array_t image_array, int2 coord, int lod, float4 color); +void __ovld write_imagei(read_write image1d_array_t image_array, int2 coord, int lod, int4 color); +void __ovld write_imageui(read_write image1d_array_t image_array, int2 coord, int lod, uint4 color); + +void __ovld write_imagef(read_write image2d_t image, int2 coord, int lod, float4 color); +void __ovld write_imagei(read_write image2d_t image, int2 coord, int lod, int4 color); +void __ovld write_imageui(read_write image2d_t image, int2 coord, int lod, uint4 color); + +void __ovld write_imagef(read_write image2d_array_t image_array, int4 coord, int lod, float4 color); +void __ovld write_imagei(read_write image2d_array_t image_array, int4 coord, int lod, int4 color); +void __ovld write_imageui(read_write image2d_array_t image_array, int4 coord, int lod, uint4 color); + +void __ovld write_imagef(read_write image2d_depth_t image, int2 coord, int lod, float color); +void __ovld write_imagef(read_write image2d_array_depth_t image, int4 coord, int lod, float color); + +#ifdef cl_khr_3d_image_writes +void __ovld write_imagef(read_write image3d_t image, int4 coord, int lod, float4 color); +void __ovld write_imagei(read_write image3d_t image, int4 coord, int lod, int4 color); +void __ovld write_imageui(read_write image3d_t image, int4 coord, int lod, uint4 color); +#endif +#endif //cl_khr_mipmap_image +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// Image write functions for half4 type +#ifdef cl_khr_fp16 +void __ovld write_imageh(read_write image1d_t image, int coord, half4 color); +void __ovld write_imageh(read_write image2d_t image, int2 coord, half4 color); +#ifdef cl_khr_3d_image_writes +void __ovld write_imageh(read_write image3d_t image, int4 coord, half4 color); +#endif +void __ovld write_imageh(read_write image1d_array_t image, int2 coord, half4 color); +void __ovld write_imageh(read_write image2d_array_t image, int4 coord, half4 color); +void __ovld write_imageh(read_write image1d_buffer_t image, int coord, half4 color); +#endif //cl_khr_fp16 +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// Note: In OpenCL v1.0/1.1/1.2, image argument of image query builtin functions does not have +// access qualifier, which by default assume read_only access qualifier. Image query builtin +// functions with write_only image argument should also be declared. + +/** + * Return the image width in pixels. + * + */ +int __ovld __cnfn get_image_width(read_only image1d_t image); +int __ovld __cnfn get_image_width(read_only image1d_buffer_t image); +int __ovld __cnfn get_image_width(read_only image2d_t image); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_width(read_only image3d_t image); +#endif +int __ovld __cnfn get_image_width(read_only image1d_array_t image); +int __ovld __cnfn get_image_width(read_only image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_width(read_only image2d_depth_t image); +int __ovld __cnfn get_image_width(read_only image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_width(read_only image2d_msaa_t image); +int __ovld __cnfn get_image_width(read_only image2d_msaa_depth_t image); +int __ovld __cnfn get_image_width(read_only image2d_array_msaa_t image); +int __ovld __cnfn get_image_width(read_only image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing + +int __ovld __cnfn get_image_width(write_only image1d_t image); +int __ovld __cnfn get_image_width(write_only image1d_buffer_t image); +int __ovld __cnfn get_image_width(write_only image2d_t image); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_width(write_only image3d_t image); +#endif +int __ovld __cnfn get_image_width(write_only image1d_array_t image); +int __ovld __cnfn get_image_width(write_only image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_width(write_only image2d_depth_t image); +int __ovld __cnfn get_image_width(write_only image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_width(write_only image2d_msaa_t image); +int __ovld __cnfn get_image_width(write_only image2d_msaa_depth_t image); +int __ovld __cnfn get_image_width(write_only image2d_array_msaa_t image); +int __ovld __cnfn get_image_width(write_only image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +int __ovld __cnfn get_image_width(read_write image1d_t image); +int __ovld __cnfn get_image_width(read_write image1d_buffer_t image); +int __ovld __cnfn get_image_width(read_write image2d_t image); +int __ovld __cnfn get_image_width(read_write image3d_t image); +int __ovld __cnfn get_image_width(read_write image1d_array_t image); +int __ovld __cnfn get_image_width(read_write image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_width(read_write image2d_depth_t image); +int __ovld __cnfn get_image_width(read_write image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_width(read_write image2d_msaa_t image); +int __ovld __cnfn get_image_width(read_write image2d_msaa_depth_t image); +int __ovld __cnfn get_image_width(read_write image2d_array_msaa_t image); +int __ovld __cnfn get_image_width(read_write image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Return the image height in pixels. + */ +int __ovld __cnfn get_image_height(read_only image2d_t image); +int __ovld __cnfn get_image_height(read_only image3d_t image); +int __ovld __cnfn get_image_height(read_only image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_height(read_only image2d_depth_t image); +int __ovld __cnfn get_image_height(read_only image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_height(read_only image2d_msaa_t image); +int __ovld __cnfn get_image_height(read_only image2d_msaa_depth_t image); +int __ovld __cnfn get_image_height(read_only image2d_array_msaa_t image); +int __ovld __cnfn get_image_height(read_only image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing + +int __ovld __cnfn get_image_height(write_only image2d_t image); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_height(write_only image3d_t image); +#endif +int __ovld __cnfn get_image_height(write_only image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_height(write_only image2d_depth_t image); +int __ovld __cnfn get_image_height(write_only image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_height(write_only image2d_msaa_t image); +int __ovld __cnfn get_image_height(write_only image2d_msaa_depth_t image); +int __ovld __cnfn get_image_height(write_only image2d_array_msaa_t image); +int __ovld __cnfn get_image_height(write_only image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +int __ovld __cnfn get_image_height(read_write image2d_t image); +int __ovld __cnfn get_image_height(read_write image3d_t image); +int __ovld __cnfn get_image_height(read_write image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_height(read_write image2d_depth_t image); +int __ovld __cnfn get_image_height(read_write image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_height(read_write image2d_msaa_t image); +int __ovld __cnfn get_image_height(read_write image2d_msaa_depth_t image); +int __ovld __cnfn get_image_height(read_write image2d_array_msaa_t image); +int __ovld __cnfn get_image_height(read_write image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Return the image depth in pixels. + */ +int __ovld __cnfn get_image_depth(read_only image3d_t image); + +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_depth(write_only image3d_t image); +#endif + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +int __ovld __cnfn get_image_depth(read_write image3d_t image); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL Extension v2.0 s9.18 - Mipmaps +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#ifdef cl_khr_mipmap_image +/** + * Return the image miplevels. + */ + +int __ovld get_image_num_mip_levels(read_only image1d_t image); +int __ovld get_image_num_mip_levels(read_only image2d_t image); +int __ovld get_image_num_mip_levels(read_only image3d_t image); + +int __ovld get_image_num_mip_levels(write_only image1d_t image); +int __ovld get_image_num_mip_levels(write_only image2d_t image); +#ifdef cl_khr_3d_image_writes +int __ovld get_image_num_mip_levels(write_only image3d_t image); +#endif + +int __ovld get_image_num_mip_levels(read_write image1d_t image); +int __ovld get_image_num_mip_levels(read_write image2d_t image); +int __ovld get_image_num_mip_levels(read_write image3d_t image); + +int __ovld get_image_num_mip_levels(read_only image1d_array_t image); +int __ovld get_image_num_mip_levels(read_only image2d_array_t image); +int __ovld get_image_num_mip_levels(read_only image2d_array_depth_t image); +int __ovld get_image_num_mip_levels(read_only image2d_depth_t image); + +int __ovld get_image_num_mip_levels(write_only image1d_array_t image); +int __ovld get_image_num_mip_levels(write_only image2d_array_t image); +int __ovld get_image_num_mip_levels(write_only image2d_array_depth_t image); +int __ovld get_image_num_mip_levels(write_only image2d_depth_t image); + +int __ovld get_image_num_mip_levels(read_write image1d_array_t image); +int __ovld get_image_num_mip_levels(read_write image2d_array_t image); +int __ovld get_image_num_mip_levels(read_write image2d_array_depth_t image); +int __ovld get_image_num_mip_levels(read_write image2d_depth_t image); + +#endif //cl_khr_mipmap_image +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Return the channel data type. Valid values are: + * CLK_SNORM_INT8 + * CLK_SNORM_INT16 + * CLK_UNORM_INT8 + * CLK_UNORM_INT16 + * CLK_UNORM_SHORT_565 + * CLK_UNORM_SHORT_555 + * CLK_UNORM_SHORT_101010 + * CLK_SIGNED_INT8 + * CLK_SIGNED_INT16 + * CLK_SIGNED_INT32 + * CLK_UNSIGNED_INT8 + * CLK_UNSIGNED_INT16 + * CLK_UNSIGNED_INT32 + * CLK_HALF_FLOAT + * CLK_FLOAT + */ + +int __ovld __cnfn get_image_channel_data_type(read_only image1d_t image); +int __ovld __cnfn get_image_channel_data_type(read_only image1d_buffer_t image); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_t image); +int __ovld __cnfn get_image_channel_data_type(read_only image3d_t image); +int __ovld __cnfn get_image_channel_data_type(read_only image1d_array_t image); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_data_type(read_only image2d_depth_t image); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_data_type(read_only image2d_msaa_t image); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_msaa_depth_t image); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_array_msaa_t image); +int __ovld __cnfn get_image_channel_data_type(read_only image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing + +int __ovld __cnfn get_image_channel_data_type(write_only image1d_t image); +int __ovld __cnfn get_image_channel_data_type(write_only image1d_buffer_t image); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_t image); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_channel_data_type(write_only image3d_t image); +#endif +int __ovld __cnfn get_image_channel_data_type(write_only image1d_array_t image); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_data_type(write_only image2d_depth_t image); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_data_type(write_only image2d_msaa_t image); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_msaa_depth_t image); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_array_msaa_t image); +int __ovld __cnfn get_image_channel_data_type(write_only image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +int __ovld __cnfn get_image_channel_data_type(read_write image1d_t image); +int __ovld __cnfn get_image_channel_data_type(read_write image1d_buffer_t image); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_t image); +int __ovld __cnfn get_image_channel_data_type(read_write image3d_t image); +int __ovld __cnfn get_image_channel_data_type(read_write image1d_array_t image); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_data_type(read_write image2d_depth_t image); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_data_type(read_write image2d_msaa_t image); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_msaa_depth_t image); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_array_msaa_t image); +int __ovld __cnfn get_image_channel_data_type(read_write image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Return the image channel order. Valid values are: + * CLK_A + * CLK_R + * CLK_Rx + * CLK_RG + * CLK_RGx + * CLK_RA + * CLK_RGB + * CLK_RGBx + * CLK_RGBA + * CLK_ARGB + * CLK_BGRA + * CLK_INTENSITY + * CLK_LUMINANCE + */ + +int __ovld __cnfn get_image_channel_order(read_only image1d_t image); +int __ovld __cnfn get_image_channel_order(read_only image1d_buffer_t image); +int __ovld __cnfn get_image_channel_order(read_only image2d_t image); +int __ovld __cnfn get_image_channel_order(read_only image3d_t image); +int __ovld __cnfn get_image_channel_order(read_only image1d_array_t image); +int __ovld __cnfn get_image_channel_order(read_only image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_order(read_only image2d_depth_t image); +int __ovld __cnfn get_image_channel_order(read_only image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_order(read_only image2d_msaa_t image); +int __ovld __cnfn get_image_channel_order(read_only image2d_msaa_depth_t image); +int __ovld __cnfn get_image_channel_order(read_only image2d_array_msaa_t image); +int __ovld __cnfn get_image_channel_order(read_only image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing + +int __ovld __cnfn get_image_channel_order(write_only image1d_t image); +int __ovld __cnfn get_image_channel_order(write_only image1d_buffer_t image); +int __ovld __cnfn get_image_channel_order(write_only image2d_t image); +#ifdef cl_khr_3d_image_writes +int __ovld __cnfn get_image_channel_order(write_only image3d_t image); +#endif +int __ovld __cnfn get_image_channel_order(write_only image1d_array_t image); +int __ovld __cnfn get_image_channel_order(write_only image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_order(write_only image2d_depth_t image); +int __ovld __cnfn get_image_channel_order(write_only image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_order(write_only image2d_msaa_t image); +int __ovld __cnfn get_image_channel_order(write_only image2d_msaa_depth_t image); +int __ovld __cnfn get_image_channel_order(write_only image2d_array_msaa_t image); +int __ovld __cnfn get_image_channel_order(write_only image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +int __ovld __cnfn get_image_channel_order(read_write image1d_t image); +int __ovld __cnfn get_image_channel_order(read_write image1d_buffer_t image); +int __ovld __cnfn get_image_channel_order(read_write image2d_t image); +int __ovld __cnfn get_image_channel_order(read_write image3d_t image); +int __ovld __cnfn get_image_channel_order(read_write image1d_array_t image); +int __ovld __cnfn get_image_channel_order(read_write image2d_array_t image); +#ifdef cl_khr_depth_images +int __ovld __cnfn get_image_channel_order(read_write image2d_depth_t image); +int __ovld __cnfn get_image_channel_order(read_write image2d_array_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int __ovld __cnfn get_image_channel_order(read_write image2d_msaa_t image); +int __ovld __cnfn get_image_channel_order(read_write image2d_msaa_depth_t image); +int __ovld __cnfn get_image_channel_order(read_write image2d_array_msaa_t image); +int __ovld __cnfn get_image_channel_order(read_write image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Return the 2D image width and height as an int2 + * type. The width is returned in the x component, and + * the height in the y component. + */ +int2 __ovld __cnfn get_image_dim(read_only image2d_t image); +int2 __ovld __cnfn get_image_dim(read_only image2d_array_t image); +#ifdef cl_khr_depth_images +int2 __ovld __cnfn get_image_dim(read_only image2d_array_depth_t image); +int2 __ovld __cnfn get_image_dim(read_only image2d_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int2 __ovld __cnfn get_image_dim(read_only image2d_msaa_t image); +int2 __ovld __cnfn get_image_dim(read_only image2d_msaa_depth_t image); +int2 __ovld __cnfn get_image_dim(read_only image2d_array_msaa_t image); +int2 __ovld __cnfn get_image_dim(read_only image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing + +int2 __ovld __cnfn get_image_dim(write_only image2d_t image); +int2 __ovld __cnfn get_image_dim(write_only image2d_array_t image); +#ifdef cl_khr_depth_images +int2 __ovld __cnfn get_image_dim(write_only image2d_array_depth_t image); +int2 __ovld __cnfn get_image_dim(write_only image2d_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int2 __ovld __cnfn get_image_dim(write_only image2d_msaa_t image); +int2 __ovld __cnfn get_image_dim(write_only image2d_msaa_depth_t image); +int2 __ovld __cnfn get_image_dim(write_only image2d_array_msaa_t image); +int2 __ovld __cnfn get_image_dim(write_only image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +int2 __ovld __cnfn get_image_dim(read_write image2d_t image); +int2 __ovld __cnfn get_image_dim(read_write image2d_array_t image); +#ifdef cl_khr_depth_images +int2 __ovld __cnfn get_image_dim(read_write image2d_array_depth_t image); +int2 __ovld __cnfn get_image_dim(read_write image2d_depth_t image); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +int2 __ovld __cnfn get_image_dim(read_write image2d_msaa_t image); +int2 __ovld __cnfn get_image_dim(read_write image2d_msaa_depth_t image); +int2 __ovld __cnfn get_image_dim(read_write image2d_array_msaa_t image); +int2 __ovld __cnfn get_image_dim(read_write image2d_array_msaa_depth_t image); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Return the 3D image width, height, and depth as an + * int4 type. The width is returned in the x + * component, height in the y component, depth in the z + * component and the w component is 0. + */ +int4 __ovld __cnfn get_image_dim(read_only image3d_t image); +#ifdef cl_khr_3d_image_writes +int4 __ovld __cnfn get_image_dim(write_only image3d_t image); +#endif +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +int4 __ovld __cnfn get_image_dim(read_write image3d_t image); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** + * Return the image array size. + */ + +size_t __ovld __cnfn get_image_array_size(read_only image1d_array_t image_array); +size_t __ovld __cnfn get_image_array_size(read_only image2d_array_t image_array); +#ifdef cl_khr_depth_images +size_t __ovld __cnfn get_image_array_size(read_only image2d_array_depth_t image_array); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +size_t __ovld __cnfn get_image_array_size(read_only image2d_array_msaa_t image_array); +size_t __ovld __cnfn get_image_array_size(read_only image2d_array_msaa_depth_t image_array); +#endif //cl_khr_gl_msaa_sharing + +size_t __ovld __cnfn get_image_array_size(write_only image1d_array_t image_array); +size_t __ovld __cnfn get_image_array_size(write_only image2d_array_t image_array); +#ifdef cl_khr_depth_images +size_t __ovld __cnfn get_image_array_size(write_only image2d_array_depth_t image_array); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +size_t __ovld __cnfn get_image_array_size(write_only image2d_array_msaa_t image_array); +size_t __ovld __cnfn get_image_array_size(write_only image2d_array_msaa_depth_t image_array); +#endif //cl_khr_gl_msaa_sharing + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +size_t __ovld __cnfn get_image_array_size(read_write image1d_array_t image_array); +size_t __ovld __cnfn get_image_array_size(read_write image2d_array_t image_array); +#ifdef cl_khr_depth_images +size_t __ovld __cnfn get_image_array_size(read_write image2d_array_depth_t image_array); +#endif //cl_khr_depth_images +#if defined(cl_khr_gl_msaa_sharing) +size_t __ovld __cnfn get_image_array_size(read_write image2d_array_msaa_t image_array); +size_t __ovld __cnfn get_image_array_size(read_write image2d_array_msaa_depth_t image_array); +#endif //cl_khr_gl_msaa_sharing +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +/** +* Return the number of samples associated with image +*/ +#if defined(cl_khr_gl_msaa_sharing) +int __ovld get_image_num_samples(read_only image2d_msaa_t image); +int __ovld get_image_num_samples(read_only image2d_msaa_depth_t image); +int __ovld get_image_num_samples(read_only image2d_array_msaa_t image); +int __ovld get_image_num_samples(read_only image2d_array_msaa_depth_t image); + +int __ovld get_image_num_samples(write_only image2d_msaa_t image); +int __ovld get_image_num_samples(write_only image2d_msaa_depth_t image); +int __ovld get_image_num_samples(write_only image2d_array_msaa_t image); +int __ovld get_image_num_samples(write_only image2d_array_msaa_depth_t image); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +int __ovld get_image_num_samples(read_write image2d_msaa_t image); +int __ovld get_image_num_samples(read_write image2d_msaa_depth_t image); +int __ovld get_image_num_samples(read_write image2d_array_msaa_t image); +int __ovld get_image_num_samples(read_write image2d_array_msaa_depth_t image); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +#endif + +// OpenCL v2.0 s6.13.15 - Work-group Functions + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +int __ovld __conv work_group_all(int predicate); +int __ovld __conv work_group_any(int predicate); + +#ifdef cl_khr_fp16 +half __ovld __conv work_group_broadcast(half a, size_t local_id); +half __ovld __conv work_group_broadcast(half a, size_t x, size_t y); +half __ovld __conv work_group_broadcast(half a, size_t x, size_t y, size_t z); +#endif +int __ovld __conv work_group_broadcast(int a, size_t local_id); +int __ovld __conv work_group_broadcast(int a, size_t x, size_t y); +int __ovld __conv work_group_broadcast(int a, size_t x, size_t y, size_t z); +uint __ovld __conv work_group_broadcast(uint a, size_t local_id); +uint __ovld __conv work_group_broadcast(uint a, size_t x, size_t y); +uint __ovld __conv work_group_broadcast(uint a, size_t x, size_t y, size_t z); +long __ovld __conv work_group_broadcast(long a, size_t local_id); +long __ovld __conv work_group_broadcast(long a, size_t x, size_t y); +long __ovld __conv work_group_broadcast(long a, size_t x, size_t y, size_t z); +ulong __ovld __conv work_group_broadcast(ulong a, size_t local_id); +ulong __ovld __conv work_group_broadcast(ulong a, size_t x, size_t y); +ulong __ovld __conv work_group_broadcast(ulong a, size_t x, size_t y, size_t z); +float __ovld __conv work_group_broadcast(float a, size_t local_id); +float __ovld __conv work_group_broadcast(float a, size_t x, size_t y); +float __ovld __conv work_group_broadcast(float a, size_t x, size_t y, size_t z); +#ifdef cl_khr_fp64 +double __ovld __conv work_group_broadcast(double a, size_t local_id); +double __ovld __conv work_group_broadcast(double a, size_t x, size_t y); +double __ovld __conv work_group_broadcast(double a, size_t x, size_t y, size_t z); +#endif //cl_khr_fp64 + +#ifdef cl_khr_fp16 +half __ovld __conv work_group_reduce_add(half x); +half __ovld __conv work_group_reduce_min(half x); +half __ovld __conv work_group_reduce_max(half x); +half __ovld __conv work_group_scan_exclusive_add(half x); +half __ovld __conv work_group_scan_exclusive_min(half x); +half __ovld __conv work_group_scan_exclusive_max(half x); +half __ovld __conv work_group_scan_inclusive_add(half x); +half __ovld __conv work_group_scan_inclusive_min(half x); +half __ovld __conv work_group_scan_inclusive_max(half x); +#endif +int __ovld __conv work_group_reduce_add(int x); +int __ovld __conv work_group_reduce_min(int x); +int __ovld __conv work_group_reduce_max(int x); +int __ovld __conv work_group_scan_exclusive_add(int x); +int __ovld __conv work_group_scan_exclusive_min(int x); +int __ovld __conv work_group_scan_exclusive_max(int x); +int __ovld __conv work_group_scan_inclusive_add(int x); +int __ovld __conv work_group_scan_inclusive_min(int x); +int __ovld __conv work_group_scan_inclusive_max(int x); +uint __ovld __conv work_group_reduce_add(uint x); +uint __ovld __conv work_group_reduce_min(uint x); +uint __ovld __conv work_group_reduce_max(uint x); +uint __ovld __conv work_group_scan_exclusive_add(uint x); +uint __ovld __conv work_group_scan_exclusive_min(uint x); +uint __ovld __conv work_group_scan_exclusive_max(uint x); +uint __ovld __conv work_group_scan_inclusive_add(uint x); +uint __ovld __conv work_group_scan_inclusive_min(uint x); +uint __ovld __conv work_group_scan_inclusive_max(uint x); +long __ovld __conv work_group_reduce_add(long x); +long __ovld __conv work_group_reduce_min(long x); +long __ovld __conv work_group_reduce_max(long x); +long __ovld __conv work_group_scan_exclusive_add(long x); +long __ovld __conv work_group_scan_exclusive_min(long x); +long __ovld __conv work_group_scan_exclusive_max(long x); +long __ovld __conv work_group_scan_inclusive_add(long x); +long __ovld __conv work_group_scan_inclusive_min(long x); +long __ovld __conv work_group_scan_inclusive_max(long x); +ulong __ovld __conv work_group_reduce_add(ulong x); +ulong __ovld __conv work_group_reduce_min(ulong x); +ulong __ovld __conv work_group_reduce_max(ulong x); +ulong __ovld __conv work_group_scan_exclusive_add(ulong x); +ulong __ovld __conv work_group_scan_exclusive_min(ulong x); +ulong __ovld __conv work_group_scan_exclusive_max(ulong x); +ulong __ovld __conv work_group_scan_inclusive_add(ulong x); +ulong __ovld __conv work_group_scan_inclusive_min(ulong x); +ulong __ovld __conv work_group_scan_inclusive_max(ulong x); +float __ovld __conv work_group_reduce_add(float x); +float __ovld __conv work_group_reduce_min(float x); +float __ovld __conv work_group_reduce_max(float x); +float __ovld __conv work_group_scan_exclusive_add(float x); +float __ovld __conv work_group_scan_exclusive_min(float x); +float __ovld __conv work_group_scan_exclusive_max(float x); +float __ovld __conv work_group_scan_inclusive_add(float x); +float __ovld __conv work_group_scan_inclusive_min(float x); +float __ovld __conv work_group_scan_inclusive_max(float x); +#ifdef cl_khr_fp64 +double __ovld __conv work_group_reduce_add(double x); +double __ovld __conv work_group_reduce_min(double x); +double __ovld __conv work_group_reduce_max(double x); +double __ovld __conv work_group_scan_exclusive_add(double x); +double __ovld __conv work_group_scan_exclusive_min(double x); +double __ovld __conv work_group_scan_exclusive_max(double x); +double __ovld __conv work_group_scan_inclusive_add(double x); +double __ovld __conv work_group_scan_inclusive_min(double x); +double __ovld __conv work_group_scan_inclusive_max(double x); +#endif //cl_khr_fp64 + +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL v2.0 s6.13.16 - Pipe Functions +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +bool __ovld is_valid_reserve_id(reserve_id_t reserve_id); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + + +// OpenCL v2.0 s6.13.17 - Enqueue Kernels +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +ndrange_t __ovld ndrange_1D(size_t); +ndrange_t __ovld ndrange_1D(size_t, size_t); +ndrange_t __ovld ndrange_1D(size_t, size_t, size_t); + +ndrange_t __ovld ndrange_2D(const size_t[2]); +ndrange_t __ovld ndrange_2D(const size_t[2], const size_t[2]); +ndrange_t __ovld ndrange_2D(const size_t[2], const size_t[2], const size_t[2]); + +ndrange_t __ovld ndrange_3D(const size_t[3]); +ndrange_t __ovld ndrange_3D(const size_t[3], const size_t[3]); +ndrange_t __ovld ndrange_3D(const size_t[3], const size_t[3], const size_t[3]); + +int __ovld enqueue_marker(queue_t, uint, const clk_event_t*, clk_event_t*); + +void __ovld retain_event(clk_event_t); + +void __ovld release_event(clk_event_t); + +clk_event_t __ovld create_user_event(void); + +void __ovld set_user_event_status(clk_event_t e, int state); + +bool __ovld is_valid_event (clk_event_t event); + +void __ovld capture_event_profiling_info(clk_event_t, clk_profiling_info, __global void* value); + +queue_t __ovld get_default_queue(void); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +// OpenCL Extension v2.0 s9.17 - Sub-groups + +#if defined(cl_intel_subgroups) || defined(cl_khr_subgroups) +// Shared Sub Group Functions +uint __ovld get_sub_group_size(void); +uint __ovld get_max_sub_group_size(void); +uint __ovld get_num_sub_groups(void); +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +uint __ovld get_enqueued_num_sub_groups(void); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +uint __ovld get_sub_group_id(void); +uint __ovld get_sub_group_local_id(void); + +void __ovld __conv sub_group_barrier(cl_mem_fence_flags flags); +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld __conv sub_group_barrier(cl_mem_fence_flags flags, memory_scope scope); +#endif //defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +int __ovld __conv sub_group_all(int predicate); +int __ovld __conv sub_group_any(int predicate); + +int __ovld __conv sub_group_broadcast(int x, uint sub_group_local_id); +uint __ovld __conv sub_group_broadcast(uint x, uint sub_group_local_id); +long __ovld __conv sub_group_broadcast(long x, uint sub_group_local_id); +ulong __ovld __conv sub_group_broadcast(ulong x, uint sub_group_local_id); +float __ovld __conv sub_group_broadcast(float x, uint sub_group_local_id); + +int __ovld __conv sub_group_reduce_add(int x); +uint __ovld __conv sub_group_reduce_add(uint x); +long __ovld __conv sub_group_reduce_add(long x); +ulong __ovld __conv sub_group_reduce_add(ulong x); +float __ovld __conv sub_group_reduce_add(float x); +int __ovld __conv sub_group_reduce_min(int x); +uint __ovld __conv sub_group_reduce_min(uint x); +long __ovld __conv sub_group_reduce_min(long x); +ulong __ovld __conv sub_group_reduce_min(ulong x); +float __ovld __conv sub_group_reduce_min(float x); +int __ovld __conv sub_group_reduce_max(int x); +uint __ovld __conv sub_group_reduce_max(uint x); +long __ovld __conv sub_group_reduce_max(long x); +ulong __ovld __conv sub_group_reduce_max(ulong x); +float __ovld __conv sub_group_reduce_max(float x); + +int __ovld __conv sub_group_scan_exclusive_add(int x); +uint __ovld __conv sub_group_scan_exclusive_add(uint x); +long __ovld __conv sub_group_scan_exclusive_add(long x); +ulong __ovld __conv sub_group_scan_exclusive_add(ulong x); +float __ovld __conv sub_group_scan_exclusive_add(float x); +int __ovld __conv sub_group_scan_exclusive_min(int x); +uint __ovld __conv sub_group_scan_exclusive_min(uint x); +long __ovld __conv sub_group_scan_exclusive_min(long x); +ulong __ovld __conv sub_group_scan_exclusive_min(ulong x); +float __ovld __conv sub_group_scan_exclusive_min(float x); +int __ovld __conv sub_group_scan_exclusive_max(int x); +uint __ovld __conv sub_group_scan_exclusive_max(uint x); +long __ovld __conv sub_group_scan_exclusive_max(long x); +ulong __ovld __conv sub_group_scan_exclusive_max(ulong x); +float __ovld __conv sub_group_scan_exclusive_max(float x); + +int __ovld __conv sub_group_scan_inclusive_add(int x); +uint __ovld __conv sub_group_scan_inclusive_add(uint x); +long __ovld __conv sub_group_scan_inclusive_add(long x); +ulong __ovld __conv sub_group_scan_inclusive_add(ulong x); +float __ovld __conv sub_group_scan_inclusive_add(float x); +int __ovld __conv sub_group_scan_inclusive_min(int x); +uint __ovld __conv sub_group_scan_inclusive_min(uint x); +long __ovld __conv sub_group_scan_inclusive_min(long x); +ulong __ovld __conv sub_group_scan_inclusive_min(ulong x); +float __ovld __conv sub_group_scan_inclusive_min(float x); +int __ovld __conv sub_group_scan_inclusive_max(int x); +uint __ovld __conv sub_group_scan_inclusive_max(uint x); +long __ovld __conv sub_group_scan_inclusive_max(long x); +ulong __ovld __conv sub_group_scan_inclusive_max(ulong x); +float __ovld __conv sub_group_scan_inclusive_max(float x); + +#ifdef cl_khr_fp16 +half __ovld __conv sub_group_broadcast(half x, uint sub_group_local_id); +half __ovld __conv sub_group_reduce_add(half x); +half __ovld __conv sub_group_reduce_min(half x); +half __ovld __conv sub_group_reduce_max(half x); +half __ovld __conv sub_group_scan_exclusive_add(half x); +half __ovld __conv sub_group_scan_exclusive_min(half x); +half __ovld __conv sub_group_scan_exclusive_max(half x); +half __ovld __conv sub_group_scan_inclusive_add(half x); +half __ovld __conv sub_group_scan_inclusive_min(half x); +half __ovld __conv sub_group_scan_inclusive_max(half x); +#endif //cl_khr_fp16 + +#ifdef cl_khr_fp64 +double __ovld __conv sub_group_broadcast(double x, uint sub_group_local_id); +double __ovld __conv sub_group_reduce_add(double x); +double __ovld __conv sub_group_reduce_min(double x); +double __ovld __conv sub_group_reduce_max(double x); +double __ovld __conv sub_group_scan_exclusive_add(double x); +double __ovld __conv sub_group_scan_exclusive_min(double x); +double __ovld __conv sub_group_scan_exclusive_max(double x); +double __ovld __conv sub_group_scan_inclusive_add(double x); +double __ovld __conv sub_group_scan_inclusive_min(double x); +double __ovld __conv sub_group_scan_inclusive_max(double x); +#endif //cl_khr_fp64 + +#endif //cl_khr_subgroups cl_intel_subgroups + +#if defined(cl_intel_subgroups) +// Intel-Specific Sub Group Functions +float __ovld __conv intel_sub_group_shuffle( float x, uint c ); +float2 __ovld __conv intel_sub_group_shuffle( float2 x, uint c ); +float3 __ovld __conv intel_sub_group_shuffle( float3 x, uint c ); +float4 __ovld __conv intel_sub_group_shuffle( float4 x, uint c ); +float8 __ovld __conv intel_sub_group_shuffle( float8 x, uint c ); +float16 __ovld __conv intel_sub_group_shuffle( float16 x, uint c ); + +int __ovld __conv intel_sub_group_shuffle( int x, uint c ); +int2 __ovld __conv intel_sub_group_shuffle( int2 x, uint c ); +int3 __ovld __conv intel_sub_group_shuffle( int3 x, uint c ); +int4 __ovld __conv intel_sub_group_shuffle( int4 x, uint c ); +int8 __ovld __conv intel_sub_group_shuffle( int8 x, uint c ); +int16 __ovld __conv intel_sub_group_shuffle( int16 x, uint c ); + +uint __ovld __conv intel_sub_group_shuffle( uint x, uint c ); +uint2 __ovld __conv intel_sub_group_shuffle( uint2 x, uint c ); +uint3 __ovld __conv intel_sub_group_shuffle( uint3 x, uint c ); +uint4 __ovld __conv intel_sub_group_shuffle( uint4 x, uint c ); +uint8 __ovld __conv intel_sub_group_shuffle( uint8 x, uint c ); +uint16 __ovld __conv intel_sub_group_shuffle( uint16 x, uint c ); + +long __ovld __conv intel_sub_group_shuffle( long x, uint c ); +ulong __ovld __conv intel_sub_group_shuffle( ulong x, uint c ); + +float __ovld __conv intel_sub_group_shuffle_down( float cur, float next, uint c ); +float2 __ovld __conv intel_sub_group_shuffle_down( float2 cur, float2 next, uint c ); +float3 __ovld __conv intel_sub_group_shuffle_down( float3 cur, float3 next, uint c ); +float4 __ovld __conv intel_sub_group_shuffle_down( float4 cur, float4 next, uint c ); +float8 __ovld __conv intel_sub_group_shuffle_down( float8 cur, float8 next, uint c ); +float16 __ovld __conv intel_sub_group_shuffle_down( float16 cur, float16 next, uint c ); + +int __ovld __conv intel_sub_group_shuffle_down( int cur, int next, uint c ); +int2 __ovld __conv intel_sub_group_shuffle_down( int2 cur, int2 next, uint c ); +int3 __ovld __conv intel_sub_group_shuffle_down( int3 cur, int3 next, uint c ); +int4 __ovld __conv intel_sub_group_shuffle_down( int4 cur, int4 next, uint c ); +int8 __ovld __conv intel_sub_group_shuffle_down( int8 cur, int8 next, uint c ); +int16 __ovld __conv intel_sub_group_shuffle_down( int16 cur, int16 next, uint c ); + +uint __ovld __conv intel_sub_group_shuffle_down( uint cur, uint next, uint c ); +uint2 __ovld __conv intel_sub_group_shuffle_down( uint2 cur, uint2 next, uint c ); +uint3 __ovld __conv intel_sub_group_shuffle_down( uint3 cur, uint3 next, uint c ); +uint4 __ovld __conv intel_sub_group_shuffle_down( uint4 cur, uint4 next, uint c ); +uint8 __ovld __conv intel_sub_group_shuffle_down( uint8 cur, uint8 next, uint c ); +uint16 __ovld __conv intel_sub_group_shuffle_down( uint16 cur, uint16 next, uint c ); + +long __ovld __conv intel_sub_group_shuffle_down( long prev, long cur, uint c ); +ulong __ovld __conv intel_sub_group_shuffle_down( ulong prev, ulong cur, uint c ); + +float __ovld __conv intel_sub_group_shuffle_up( float prev, float cur, uint c ); +float2 __ovld __conv intel_sub_group_shuffle_up( float2 prev, float2 cur, uint c ); +float3 __ovld __conv intel_sub_group_shuffle_up( float3 prev, float3 cur, uint c ); +float4 __ovld __conv intel_sub_group_shuffle_up( float4 prev, float4 cur, uint c ); +float8 __ovld __conv intel_sub_group_shuffle_up( float8 prev, float8 cur, uint c ); +float16 __ovld __conv intel_sub_group_shuffle_up( float16 prev, float16 cur, uint c ); + +int __ovld __conv intel_sub_group_shuffle_up( int prev, int cur, uint c ); +int2 __ovld __conv intel_sub_group_shuffle_up( int2 prev, int2 cur, uint c ); +int3 __ovld __conv intel_sub_group_shuffle_up( int3 prev, int3 cur, uint c ); +int4 __ovld __conv intel_sub_group_shuffle_up( int4 prev, int4 cur, uint c ); +int8 __ovld __conv intel_sub_group_shuffle_up( int8 prev, int8 cur, uint c ); +int16 __ovld __conv intel_sub_group_shuffle_up( int16 prev, int16 cur, uint c ); + +uint __ovld __conv intel_sub_group_shuffle_up( uint prev, uint cur, uint c ); +uint2 __ovld __conv intel_sub_group_shuffle_up( uint2 prev, uint2 cur, uint c ); +uint3 __ovld __conv intel_sub_group_shuffle_up( uint3 prev, uint3 cur, uint c ); +uint4 __ovld __conv intel_sub_group_shuffle_up( uint4 prev, uint4 cur, uint c ); +uint8 __ovld __conv intel_sub_group_shuffle_up( uint8 prev, uint8 cur, uint c ); +uint16 __ovld __conv intel_sub_group_shuffle_up( uint16 prev, uint16 cur, uint c ); + +long __ovld __conv intel_sub_group_shuffle_up( long prev, long cur, uint c ); +ulong __ovld __conv intel_sub_group_shuffle_up( ulong prev, ulong cur, uint c ); + +float __ovld __conv intel_sub_group_shuffle_xor( float x, uint c ); +float2 __ovld __conv intel_sub_group_shuffle_xor( float2 x, uint c ); +float3 __ovld __conv intel_sub_group_shuffle_xor( float3 x, uint c ); +float4 __ovld __conv intel_sub_group_shuffle_xor( float4 x, uint c ); +float8 __ovld __conv intel_sub_group_shuffle_xor( float8 x, uint c ); +float16 __ovld __conv intel_sub_group_shuffle_xor( float16 x, uint c ); + +int __ovld __conv intel_sub_group_shuffle_xor( int x, uint c ); +int2 __ovld __conv intel_sub_group_shuffle_xor( int2 x, uint c ); +int3 __ovld __conv intel_sub_group_shuffle_xor( int3 x, uint c ); +int4 __ovld __conv intel_sub_group_shuffle_xor( int4 x, uint c ); +int8 __ovld __conv intel_sub_group_shuffle_xor( int8 x, uint c ); +int16 __ovld __conv intel_sub_group_shuffle_xor( int16 x, uint c ); + +uint __ovld __conv intel_sub_group_shuffle_xor( uint x, uint c ); +uint2 __ovld __conv intel_sub_group_shuffle_xor( uint2 x, uint c ); +uint3 __ovld __conv intel_sub_group_shuffle_xor( uint3 x, uint c ); +uint4 __ovld __conv intel_sub_group_shuffle_xor( uint4 x, uint c ); +uint8 __ovld __conv intel_sub_group_shuffle_xor( uint8 x, uint c ); +uint16 __ovld __conv intel_sub_group_shuffle_xor( uint16 x, uint c ); + +long __ovld __conv intel_sub_group_shuffle_xor( long x, uint c ); +ulong __ovld __conv intel_sub_group_shuffle_xor( ulong x, uint c ); + +uint __ovld __conv intel_sub_group_block_read( read_only image2d_t image, int2 coord ); +uint2 __ovld __conv intel_sub_group_block_read2( read_only image2d_t image, int2 coord ); +uint4 __ovld __conv intel_sub_group_block_read4( read_only image2d_t image, int2 coord ); +uint8 __ovld __conv intel_sub_group_block_read8( read_only image2d_t image, int2 coord ); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +uint __ovld __conv intel_sub_group_block_read(read_write image2d_t image, int2 coord); +uint2 __ovld __conv intel_sub_group_block_read2(read_write image2d_t image, int2 coord); +uint4 __ovld __conv intel_sub_group_block_read4(read_write image2d_t image, int2 coord); +uint8 __ovld __conv intel_sub_group_block_read8(read_write image2d_t image, int2 coord); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +uint __ovld __conv intel_sub_group_block_read( const __global uint* p ); +uint2 __ovld __conv intel_sub_group_block_read2( const __global uint* p ); +uint4 __ovld __conv intel_sub_group_block_read4( const __global uint* p ); +uint8 __ovld __conv intel_sub_group_block_read8( const __global uint* p ); + +void __ovld __conv intel_sub_group_block_write(write_only image2d_t image, int2 coord, uint data); +void __ovld __conv intel_sub_group_block_write2(write_only image2d_t image, int2 coord, uint2 data); +void __ovld __conv intel_sub_group_block_write4(write_only image2d_t image, int2 coord, uint4 data); +void __ovld __conv intel_sub_group_block_write8(write_only image2d_t image, int2 coord, uint8 data); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld __conv intel_sub_group_block_write(read_write image2d_t image, int2 coord, uint data); +void __ovld __conv intel_sub_group_block_write2(read_write image2d_t image, int2 coord, uint2 data); +void __ovld __conv intel_sub_group_block_write4(read_write image2d_t image, int2 coord, uint4 data); +void __ovld __conv intel_sub_group_block_write8(read_write image2d_t image, int2 coord, uint8 data); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +void __ovld __conv intel_sub_group_block_write( __global uint* p, uint data ); +void __ovld __conv intel_sub_group_block_write2( __global uint* p, uint2 data ); +void __ovld __conv intel_sub_group_block_write4( __global uint* p, uint4 data ); +void __ovld __conv intel_sub_group_block_write8( __global uint* p, uint8 data ); + +#ifdef cl_khr_fp16 +half __ovld __conv intel_sub_group_shuffle( half x, uint c ); +half __ovld __conv intel_sub_group_shuffle_down( half prev, half cur, uint c ); +half __ovld __conv intel_sub_group_shuffle_up( half prev, half cur, uint c ); +half __ovld __conv intel_sub_group_shuffle_xor( half x, uint c ); +#endif + +#if defined(cl_khr_fp64) +double __ovld __conv intel_sub_group_shuffle( double x, uint c ); +double __ovld __conv intel_sub_group_shuffle_down( double prev, double cur, uint c ); +double __ovld __conv intel_sub_group_shuffle_up( double prev, double cur, uint c ); +double __ovld __conv intel_sub_group_shuffle_xor( double x, uint c ); +#endif + +#endif //cl_intel_subgroups + +#if defined(cl_intel_subgroups_short) +short __ovld __conv intel_sub_group_broadcast( short x, uint sub_group_local_id ); +short2 __ovld __conv intel_sub_group_broadcast( short2 x, uint sub_group_local_id ); +short3 __ovld __conv intel_sub_group_broadcast( short3 x, uint sub_group_local_id ); +short4 __ovld __conv intel_sub_group_broadcast( short4 x, uint sub_group_local_id ); +short8 __ovld __conv intel_sub_group_broadcast( short8 x, uint sub_group_local_id ); + +ushort __ovld __conv intel_sub_group_broadcast( ushort x, uint sub_group_local_id ); +ushort2 __ovld __conv intel_sub_group_broadcast( ushort2 x, uint sub_group_local_id ); +ushort3 __ovld __conv intel_sub_group_broadcast( ushort3 x, uint sub_group_local_id ); +ushort4 __ovld __conv intel_sub_group_broadcast( ushort4 x, uint sub_group_local_id ); +ushort8 __ovld __conv intel_sub_group_broadcast( ushort8 x, uint sub_group_local_id ); + +short __ovld __conv intel_sub_group_shuffle( short x, uint c ); +short2 __ovld __conv intel_sub_group_shuffle( short2 x, uint c ); +short3 __ovld __conv intel_sub_group_shuffle( short3 x, uint c ); +short4 __ovld __conv intel_sub_group_shuffle( short4 x, uint c ); +short8 __ovld __conv intel_sub_group_shuffle( short8 x, uint c ); +short16 __ovld __conv intel_sub_group_shuffle( short16 x, uint c); + +ushort __ovld __conv intel_sub_group_shuffle( ushort x, uint c ); +ushort2 __ovld __conv intel_sub_group_shuffle( ushort2 x, uint c ); +ushort3 __ovld __conv intel_sub_group_shuffle( ushort3 x, uint c ); +ushort4 __ovld __conv intel_sub_group_shuffle( ushort4 x, uint c ); +ushort8 __ovld __conv intel_sub_group_shuffle( ushort8 x, uint c ); +ushort16 __ovld __conv intel_sub_group_shuffle( ushort16 x, uint c ); + +short __ovld __conv intel_sub_group_shuffle_down( short cur, short next, uint c ); +short2 __ovld __conv intel_sub_group_shuffle_down( short2 cur, short2 next, uint c ); +short3 __ovld __conv intel_sub_group_shuffle_down( short3 cur, short3 next, uint c ); +short4 __ovld __conv intel_sub_group_shuffle_down( short4 cur, short4 next, uint c ); +short8 __ovld __conv intel_sub_group_shuffle_down( short8 cur, short8 next, uint c ); +short16 __ovld __conv intel_sub_group_shuffle_down( short16 cur, short16 next, uint c ); + +ushort __ovld __conv intel_sub_group_shuffle_down( ushort cur, ushort next, uint c ); +ushort2 __ovld __conv intel_sub_group_shuffle_down( ushort2 cur, ushort2 next, uint c ); +ushort3 __ovld __conv intel_sub_group_shuffle_down( ushort3 cur, ushort3 next, uint c ); +ushort4 __ovld __conv intel_sub_group_shuffle_down( ushort4 cur, ushort4 next, uint c ); +ushort8 __ovld __conv intel_sub_group_shuffle_down( ushort8 cur, ushort8 next, uint c ); +ushort16 __ovld __conv intel_sub_group_shuffle_down( ushort16 cur, ushort16 next, uint c ); + +short __ovld __conv intel_sub_group_shuffle_up( short cur, short next, uint c ); +short2 __ovld __conv intel_sub_group_shuffle_up( short2 cur, short2 next, uint c ); +short3 __ovld __conv intel_sub_group_shuffle_up( short3 cur, short3 next, uint c ); +short4 __ovld __conv intel_sub_group_shuffle_up( short4 cur, short4 next, uint c ); +short8 __ovld __conv intel_sub_group_shuffle_up( short8 cur, short8 next, uint c ); +short16 __ovld __conv intel_sub_group_shuffle_up( short16 cur, short16 next, uint c ); + +ushort __ovld __conv intel_sub_group_shuffle_up( ushort cur, ushort next, uint c ); +ushort2 __ovld __conv intel_sub_group_shuffle_up( ushort2 cur, ushort2 next, uint c ); +ushort3 __ovld __conv intel_sub_group_shuffle_up( ushort3 cur, ushort3 next, uint c ); +ushort4 __ovld __conv intel_sub_group_shuffle_up( ushort4 cur, ushort4 next, uint c ); +ushort8 __ovld __conv intel_sub_group_shuffle_up( ushort8 cur, ushort8 next, uint c ); +ushort16 __ovld __conv intel_sub_group_shuffle_up( ushort16 cur, ushort16 next, uint c ); + +short __ovld __conv intel_sub_group_shuffle_xor( short x, uint c ); +short2 __ovld __conv intel_sub_group_shuffle_xor( short2 x, uint c ); +short3 __ovld __conv intel_sub_group_shuffle_xor( short3 x, uint c ); +short4 __ovld __conv intel_sub_group_shuffle_xor( short4 x, uint c ); +short8 __ovld __conv intel_sub_group_shuffle_xor( short8 x, uint c ); +short16 __ovld __conv intel_sub_group_shuffle_xor( short16 x, uint c ); + +ushort __ovld __conv intel_sub_group_shuffle_xor( ushort x, uint c ); +ushort2 __ovld __conv intel_sub_group_shuffle_xor( ushort2 x, uint c ); +ushort3 __ovld __conv intel_sub_group_shuffle_xor( ushort3 x, uint c ); +ushort4 __ovld __conv intel_sub_group_shuffle_xor( ushort4 x, uint c ); +ushort8 __ovld __conv intel_sub_group_shuffle_xor( ushort8 x, uint c ); +ushort16 __ovld __conv intel_sub_group_shuffle_xor( ushort16 x, uint c ); + +short __ovld __conv intel_sub_group_reduce_add( short x ); +ushort __ovld __conv intel_sub_group_reduce_add( ushort x ); +short __ovld __conv intel_sub_group_reduce_min( short x ); +ushort __ovld __conv intel_sub_group_reduce_min( ushort x ); +short __ovld __conv intel_sub_group_reduce_max( short x ); +ushort __ovld __conv intel_sub_group_reduce_max( ushort x ); + +short __ovld __conv intel_sub_group_scan_exclusive_add( short x ); +ushort __ovld __conv intel_sub_group_scan_exclusive_add( ushort x ); +short __ovld __conv intel_sub_group_scan_exclusive_min( short x ); +ushort __ovld __conv intel_sub_group_scan_exclusive_min( ushort x ); +short __ovld __conv intel_sub_group_scan_exclusive_max( short x ); +ushort __ovld __conv intel_sub_group_scan_exclusive_max( ushort x ); + +short __ovld __conv intel_sub_group_scan_inclusive_add( short x ); +ushort __ovld __conv intel_sub_group_scan_inclusive_add( ushort x ); +short __ovld __conv intel_sub_group_scan_inclusive_min( short x ); +ushort __ovld __conv intel_sub_group_scan_inclusive_min( ushort x ); +short __ovld __conv intel_sub_group_scan_inclusive_max( short x ); +ushort __ovld __conv intel_sub_group_scan_inclusive_max( ushort x ); + +uint __ovld __conv intel_sub_group_block_read_ui( read_only image2d_t image, int2 byte_coord ); +uint2 __ovld __conv intel_sub_group_block_read_ui2( read_only image2d_t image, int2 byte_coord ); +uint4 __ovld __conv intel_sub_group_block_read_ui4( read_only image2d_t image, int2 byte_coord ); +uint8 __ovld __conv intel_sub_group_block_read_ui8( read_only image2d_t image, int2 byte_coord ); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +uint __ovld __conv intel_sub_group_block_read_ui( read_write image2d_t image, int2 byte_coord ); +uint2 __ovld __conv intel_sub_group_block_read_ui2( read_write image2d_t image, int2 byte_coord ); +uint4 __ovld __conv intel_sub_group_block_read_ui4( read_write image2d_t image, int2 byte_coord ); +uint8 __ovld __conv intel_sub_group_block_read_ui8( read_write image2d_t image, int2 byte_coord ); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +uint __ovld __conv intel_sub_group_block_read_ui( const __global uint* p ); +uint2 __ovld __conv intel_sub_group_block_read_ui2( const __global uint* p ); +uint4 __ovld __conv intel_sub_group_block_read_ui4( const __global uint* p ); +uint8 __ovld __conv intel_sub_group_block_read_ui8( const __global uint* p ); + +void __ovld __conv intel_sub_group_block_write_ui( read_only image2d_t image, int2 byte_coord, uint data ); +void __ovld __conv intel_sub_group_block_write_ui2( read_only image2d_t image, int2 byte_coord, uint2 data ); +void __ovld __conv intel_sub_group_block_write_ui4( read_only image2d_t image, int2 byte_coord, uint4 data ); +void __ovld __conv intel_sub_group_block_write_ui8( read_only image2d_t image, int2 byte_coord, uint8 data ); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld __conv intel_sub_group_block_write_ui( read_write image2d_t image, int2 byte_coord, uint data ); +void __ovld __conv intel_sub_group_block_write_ui2( read_write image2d_t image, int2 byte_coord, uint2 data ); +void __ovld __conv intel_sub_group_block_write_ui4( read_write image2d_t image, int2 byte_coord, uint4 data ); +void __ovld __conv intel_sub_group_block_write_ui8( read_write image2d_t image, int2 byte_coord, uint8 data ); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +void __ovld __conv intel_sub_group_block_write_ui( __global uint* p, uint data ); +void __ovld __conv intel_sub_group_block_write_ui2( __global uint* p, uint2 data ); +void __ovld __conv intel_sub_group_block_write_ui4( __global uint* p, uint4 data ); +void __ovld __conv intel_sub_group_block_write_ui8( __global uint* p, uint8 data ); + +ushort __ovld __conv intel_sub_group_block_read_us( read_only image2d_t image, int2 coord ); +ushort2 __ovld __conv intel_sub_group_block_read_us2( read_only image2d_t image, int2 coord ); +ushort4 __ovld __conv intel_sub_group_block_read_us4( read_only image2d_t image, int2 coord ); +ushort8 __ovld __conv intel_sub_group_block_read_us8( read_only image2d_t image, int2 coord ); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +ushort __ovld __conv intel_sub_group_block_read_us(read_write image2d_t image, int2 coord); +ushort2 __ovld __conv intel_sub_group_block_read_us2(read_write image2d_t image, int2 coord); +ushort4 __ovld __conv intel_sub_group_block_read_us4(read_write image2d_t image, int2 coord); +ushort8 __ovld __conv intel_sub_group_block_read_us8(read_write image2d_t image, int2 coord); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +ushort __ovld __conv intel_sub_group_block_read_us( const __global ushort* p ); +ushort2 __ovld __conv intel_sub_group_block_read_us2( const __global ushort* p ); +ushort4 __ovld __conv intel_sub_group_block_read_us4( const __global ushort* p ); +ushort8 __ovld __conv intel_sub_group_block_read_us8( const __global ushort* p ); + +void __ovld __conv intel_sub_group_block_write_us(write_only image2d_t image, int2 coord, ushort data); +void __ovld __conv intel_sub_group_block_write_us2(write_only image2d_t image, int2 coord, ushort2 data); +void __ovld __conv intel_sub_group_block_write_us4(write_only image2d_t image, int2 coord, ushort4 data); +void __ovld __conv intel_sub_group_block_write_us8(write_only image2d_t image, int2 coord, ushort8 data); + +#if defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) +void __ovld __conv intel_sub_group_block_write_us(read_write image2d_t image, int2 coord, ushort data); +void __ovld __conv intel_sub_group_block_write_us2(read_write image2d_t image, int2 coord, ushort2 data); +void __ovld __conv intel_sub_group_block_write_us4(read_write image2d_t image, int2 coord, ushort4 data); +void __ovld __conv intel_sub_group_block_write_us8(read_write image2d_t image, int2 coord, ushort8 data); +#endif // defined(__OPENCL_CPP_VERSION__) || (__OPENCL_C_VERSION__ >= CL_VERSION_2_0) + +void __ovld __conv intel_sub_group_block_write_us( __global ushort* p, ushort data ); +void __ovld __conv intel_sub_group_block_write_us2( __global ushort* p, ushort2 data ); +void __ovld __conv intel_sub_group_block_write_us4( __global ushort* p, ushort4 data ); +void __ovld __conv intel_sub_group_block_write_us8( __global ushort* p, ushort8 data ); +#endif // cl_intel_subgroups_short + +#ifdef cl_intel_device_side_avc_motion_estimation +#pragma OPENCL EXTENSION cl_intel_device_side_avc_motion_estimation : begin + +// MCE built-in functions +uchar __ovld +intel_sub_group_avc_mce_get_default_inter_base_multi_reference_penalty( + uchar slice_type, uchar qp); +ulong __ovld intel_sub_group_avc_mce_get_default_inter_shape_penalty( + uchar slice_type, uchar qp); +uchar __ovld intel_sub_group_avc_mce_get_default_inter_direction_penalty( + uchar slice_type, uchar qp); +uint __ovld intel_sub_group_avc_mce_get_default_intra_luma_shape_penalty( + uchar slice_type, uchar qp); +uint2 __ovld +intel_sub_group_avc_mce_get_default_inter_motion_vector_cost_table( + uchar slice_type, uchar qp); +uchar __ovld intel_sub_group_avc_mce_get_default_intra_luma_mode_penalty( + uchar slice_type, uchar qp); + +uint2 __ovld intel_sub_group_avc_mce_get_default_high_penalty_cost_table(); +uint2 __ovld intel_sub_group_avc_mce_get_default_medium_penalty_cost_table(); +uint2 __ovld intel_sub_group_avc_mce_get_default_low_penalty_cost_table(); +uint __ovld intel_sub_group_avc_mce_get_default_non_dc_luma_intra_penalty(); +uchar __ovld +intel_sub_group_avc_mce_get_default_intra_chroma_mode_base_penalty(); + +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_inter_base_multi_reference_penalty( + uchar reference_base_penalty, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_inter_shape_penalty( + ulong packed_shape_penalty, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_inter_direction_penalty( + uchar direction_cost, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_motion_vector_cost_function( + ulong packed_cost_center_delta, uint2 packed_cost_table, + uchar cost_precision, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_ac_only_haar( + intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_source_interlaced_field_polarity( + uchar src_field_polarity, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_single_reference_interlaced_field_polarity( + uchar ref_field_polarity, intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_mce_set_dual_reference_interlaced_field_polarities( + uchar fwd_ref_field_polarity, uchar bwd_ref_field_polarity, + intel_sub_group_avc_mce_payload_t payload); + +ulong __ovld intel_sub_group_avc_mce_get_motion_vectors( + intel_sub_group_avc_mce_result_t result); +ushort __ovld intel_sub_group_avc_mce_get_inter_distortions( + intel_sub_group_avc_mce_result_t result); +ushort __ovld intel_sub_group_avc_mce_get_best_inter_distortion( + intel_sub_group_avc_mce_result_t result); +uchar __ovld intel_sub_group_avc_mce_get_inter_major_shape( + intel_sub_group_avc_mce_result_t result); +uchar __ovld intel_sub_group_avc_mce_get_inter_minor_shapes( + intel_sub_group_avc_mce_result_t result); +uchar __ovld intel_sub_group_avc_mce_get_inter_directions( + intel_sub_group_avc_mce_result_t result); +uchar __ovld intel_sub_group_avc_mce_get_inter_motion_vector_count( + intel_sub_group_avc_mce_result_t result); +uint __ovld intel_sub_group_avc_mce_get_inter_reference_ids( + intel_sub_group_avc_mce_result_t result); +uchar __ovld +intel_sub_group_avc_mce_get_inter_reference_interlaced_field_polarities( + uint packed_reference_ids, uint packed_reference_parameter_field_polarities, + intel_sub_group_avc_mce_result_t result); + +// IME built-in functions +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_initialize( + ushort2 src_coord, uchar partition_mask, uchar sad_adjustment); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_single_reference( + short2 ref_offset, uchar search_window_config, + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_dual_reference( + short2 fwd_ref_offset, short2 bwd_ref_offset, uchar search_window_config, + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_max_motion_vector_count( + uchar max_motion_vector_count, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_unidirectional_mix_disable( + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_early_search_termination_threshold( + uchar threshold, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_weighted_sad( + uint packed_sad_weights, intel_sub_group_avc_ime_payload_t payload); + +__attribute__((deprecated("If you use the latest Intel driver, please use " + "intel_sub_group_avc_ime_ref_window_size instead", + "intel_sub_group_avc_ime_ref_window_size"))) +ushort2 __ovld +intel_sub_group_ime_ref_window_size(uchar search_window_config, char dual_ref); +ushort2 __ovld intel_sub_group_avc_ime_ref_window_size( + uchar search_window_config, char dual_ref); +short2 __ovld intel_sub_group_avc_ime_adjust_ref_offset( + short2 ref_offset, ushort2 src_coord, ushort2 ref_window_size, + ushort2 image_size); + +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_evaluate_with_single_reference( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_evaluate_with_dual_reference( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_result_single_reference_streamout_t __ovld +intel_sub_group_avc_ime_evaluate_with_single_reference_streamout( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_result_dual_reference_streamout_t __ovld +intel_sub_group_avc_ime_evaluate_with_dual_reference_streamout( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_evaluate_with_single_reference_streamin( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_ime_payload_t payload, + intel_sub_group_avc_ime_single_reference_streamin_t streamin_components); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_evaluate_with_dual_reference_streamin( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_ime_payload_t payload, + intel_sub_group_avc_ime_dual_reference_streamin_t streamin_components); +intel_sub_group_avc_ime_result_single_reference_streamout_t __ovld +intel_sub_group_avc_ime_evaluate_with_single_reference_streaminout( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_ime_payload_t payload, + intel_sub_group_avc_ime_single_reference_streamin_t streamin_components); +intel_sub_group_avc_ime_result_dual_reference_streamout_t __ovld +intel_sub_group_avc_ime_evaluate_with_dual_reference_streaminout( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_ime_payload_t payload, + intel_sub_group_avc_ime_dual_reference_streamin_t streamin_components); + +intel_sub_group_avc_ime_single_reference_streamin_t __ovld +intel_sub_group_avc_ime_get_single_reference_streamin( + intel_sub_group_avc_ime_result_single_reference_streamout_t result); +intel_sub_group_avc_ime_dual_reference_streamin_t __ovld +intel_sub_group_avc_ime_get_dual_reference_streamin( + intel_sub_group_avc_ime_result_dual_reference_streamout_t result); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_strip_single_reference_streamout( + intel_sub_group_avc_ime_result_single_reference_streamout_t result); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_ime_strip_dual_reference_streamout( + intel_sub_group_avc_ime_result_dual_reference_streamout_t result); + +uint __ovld intel_sub_group_avc_ime_get_streamout_major_shape_motion_vectors( + intel_sub_group_avc_ime_result_single_reference_streamout_t result, + uchar major_shape); +ushort __ovld intel_sub_group_avc_ime_get_streamout_major_shape_distortions( + intel_sub_group_avc_ime_result_single_reference_streamout_t result, + uchar major_shape); +uchar __ovld intel_sub_group_avc_ime_get_streamout_major_shape_reference_ids( + intel_sub_group_avc_ime_result_single_reference_streamout_t result, + uchar major_shape); +uint __ovld intel_sub_group_avc_ime_get_streamout_major_shape_motion_vectors( + intel_sub_group_avc_ime_result_dual_reference_streamout_t result, + uchar major_shape, uchar direction); +ushort __ovld intel_sub_group_avc_ime_get_streamout_major_shape_distortions( + intel_sub_group_avc_ime_result_dual_reference_streamout_t result, + uchar major_shape, uchar direction); +uchar __ovld intel_sub_group_avc_ime_get_streamout_major_shape_reference_ids( + intel_sub_group_avc_ime_result_dual_reference_streamout_t result, + uchar major_shape, uchar direction); + +uchar __ovld intel_sub_group_avc_ime_get_border_reached( + uchar image_select, intel_sub_group_avc_ime_result_t result); +uchar __ovld intel_sub_group_avc_ime_get_truncated_search_indication( + intel_sub_group_avc_ime_result_t result); +uchar __ovld +intel_sub_group_avc_ime_get_unidirectional_early_search_termination( + intel_sub_group_avc_ime_result_t result); +uint __ovld intel_sub_group_avc_ime_get_weighting_pattern_minimum_motion_vector( + intel_sub_group_avc_ime_result_t result); +ushort __ovld intel_sub_group_avc_ime_get_weighting_pattern_minimum_distortion( + intel_sub_group_avc_ime_result_t result); + +// REF built-in functions +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_fme_initialize( + ushort2 src_coord, ulong motion_vectors, uchar major_shapes, + uchar minor_shapes, uchar directions, uchar pixel_resolution, + uchar sad_adjustment); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_bme_initialize( + ushort2 src_coord, ulong motion_vectors, uchar major_shapes, + uchar minor_shapes, uchar directions, uchar pixel_resolution, + uchar bidirectional_weight, uchar sad_adjustment); + +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_bidirectional_mix_disable( + intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_bilinear_filter_enable( + intel_sub_group_avc_ref_payload_t payload); + +intel_sub_group_avc_ref_result_t __ovld +intel_sub_group_avc_ref_evaluate_with_single_reference( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_ref_result_t __ovld +intel_sub_group_avc_ref_evaluate_with_dual_reference( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_ref_result_t __ovld +intel_sub_group_avc_ref_evaluate_with_multi_reference( + read_only image2d_t src_image, uint packed_reference_ids, + sampler_t vme_media_sampler, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_ref_result_t __ovld +intel_sub_group_avc_ref_evaluate_with_multi_reference( + read_only image2d_t src_image, uint packed_reference_ids, + uchar packed_reference_field_polarities, sampler_t vme_media_sampler, + intel_sub_group_avc_ref_payload_t payload); + +// SIC built-in functions +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_initialize( + ushort2 src_coord); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_configure_skc( + uint skip_block_partition_type, uint skip_motion_vector_mask, + ulong motion_vectors, uchar bidirectional_weight, uchar skip_sad_adjustment, + intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_configure_ipe( + uchar luma_intra_partition_mask, uchar intra_neighbour_availabilty, + uchar left_edge_luma_pixels, uchar upper_left_corner_luma_pixel, + uchar upper_edge_luma_pixels, uchar upper_right_edge_luma_pixels, + uchar intra_sad_adjustment, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_configure_ipe( + uchar luma_intra_partition_mask, uchar intra_neighbour_availabilty, + uchar left_edge_luma_pixels, uchar upper_left_corner_luma_pixel, + uchar upper_edge_luma_pixels, uchar upper_right_edge_luma_pixels, + ushort left_edge_chroma_pixels, ushort upper_left_corner_chroma_pixel, + ushort upper_edge_chroma_pixels, uchar intra_sad_adjustment, + intel_sub_group_avc_sic_payload_t payload); +uint __ovld +intel_sub_group_avc_sic_get_motion_vector_mask( + uint skip_block_partition_type, uchar direction); + +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_intra_luma_shape_penalty( + uint packed_shape_cost, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_intra_luma_mode_cost_function( + uchar luma_mode_penalty, uint luma_packed_neighbor_modes, + uint luma_packed_non_dc_penalty, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_intra_chroma_mode_cost_function( + uchar chroma_mode_penalty, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_skc_bilinear_filter_enable( + intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_skc_forward_transform_enable( + ulong packed_sad_coefficients, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_block_based_raw_skip_sad( + uchar block_based_skip_type, + intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_sic_evaluate_ipe( + read_only image2d_t src_image, sampler_t vme_media_sampler, + intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_sic_evaluate_with_single_reference( + read_only image2d_t src_image, read_only image2d_t ref_image, + sampler_t vme_media_sampler, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_sic_evaluate_with_dual_reference( + read_only image2d_t src_image, read_only image2d_t fwd_ref_image, + read_only image2d_t bwd_ref_image, sampler_t vme_media_sampler, + intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_sic_evaluate_with_multi_reference( + read_only image2d_t src_image, uint packed_reference_ids, + sampler_t vme_media_sampler, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_sic_evaluate_with_multi_reference( + read_only image2d_t src_image, uint packed_reference_ids, + uchar packed_reference_field_polarities, sampler_t vme_media_sampler, + intel_sub_group_avc_sic_payload_t payload); + +uchar __ovld intel_sub_group_avc_sic_get_ipe_luma_shape( + intel_sub_group_avc_sic_result_t result); +ushort __ovld intel_sub_group_avc_sic_get_best_ipe_luma_distortion( + intel_sub_group_avc_sic_result_t result); +ushort __ovld intel_sub_group_avc_sic_get_best_ipe_chroma_distortion( + intel_sub_group_avc_sic_result_t result); +ulong __ovld intel_sub_group_avc_sic_get_packed_ipe_luma_modes( + intel_sub_group_avc_sic_result_t result); +uchar __ovld intel_sub_group_avc_sic_get_ipe_chroma_mode( + intel_sub_group_avc_sic_result_t result); +uint __ovld intel_sub_group_avc_sic_get_packed_skc_luma_count_threshold( + intel_sub_group_avc_sic_result_t result); +ulong __ovld intel_sub_group_avc_sic_get_packed_skc_luma_sum_threshold( + intel_sub_group_avc_sic_result_t result); +ushort __ovld intel_sub_group_avc_sic_get_inter_raw_sads( + intel_sub_group_avc_sic_result_t result); + +// Wrappers +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_inter_base_multi_reference_penalty( + uchar reference_base_penalty, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_inter_base_multi_reference_penalty( + uchar reference_base_penalty, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_inter_base_multi_reference_penalty( + uchar reference_base_penalty, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_inter_shape_penalty( + ulong packed_shape_cost, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_inter_shape_penalty( + ulong packed_shape_cost, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_inter_shape_penalty( + ulong packed_shape_cost, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_inter_direction_penalty( + uchar direction_cost, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_inter_direction_penalty( + uchar direction_cost, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_inter_direction_penalty( + uchar direction_cost, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_motion_vector_cost_function( + ulong packed_cost_center_delta, uint2 packed_cost_table, + uchar cost_precision, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_motion_vector_cost_function( + ulong packed_cost_center_delta, uint2 packed_cost_table, + uchar cost_precision, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_motion_vector_cost_function( + ulong packed_cost_center_delta, uint2 packed_cost_table, + uchar cost_precision, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_source_interlaced_field_polarity( + uchar src_field_polarity, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_source_interlaced_field_polarity( + uchar src_field_polarity, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_source_interlaced_field_polarity( + uchar src_field_polarity, intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_single_reference_interlaced_field_polarity( + uchar ref_field_polarity, intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_single_reference_interlaced_field_polarity( + uchar ref_field_polarity, intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_single_reference_interlaced_field_polarity( + uchar ref_field_polarity, intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_dual_reference_interlaced_field_polarities( + uchar fwd_ref_field_polarity, uchar bwd_ref_field_polarity, + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_dual_reference_interlaced_field_polarities( + uchar fwd_ref_field_polarity, uchar bwd_ref_field_polarity, + intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_dual_reference_interlaced_field_polarities( + uchar fwd_ref_field_polarity, uchar bwd_ref_field_polarity, + intel_sub_group_avc_sic_payload_t payload); + +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_ime_set_ac_only_haar( + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_ref_set_ac_only_haar( + intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_sic_set_ac_only_haar( + intel_sub_group_avc_sic_payload_t payload); + +ulong __ovld intel_sub_group_avc_ime_get_motion_vectors( + intel_sub_group_avc_ime_result_t result); +ulong __ovld intel_sub_group_avc_ref_get_motion_vectors( + intel_sub_group_avc_ref_result_t result); + +ushort __ovld intel_sub_group_avc_ime_get_inter_distortions( + intel_sub_group_avc_ime_result_t result); +ushort __ovld intel_sub_group_avc_ref_get_inter_distortions( + intel_sub_group_avc_ref_result_t result); +ushort __ovld intel_sub_group_avc_sic_get_inter_distortions( + intel_sub_group_avc_sic_result_t result); + +ushort __ovld intel_sub_group_avc_ime_get_best_inter_distortion( + intel_sub_group_avc_ime_result_t result); +ushort __ovld intel_sub_group_avc_ref_get_best_inter_distortion( + intel_sub_group_avc_ref_result_t result); + +uchar __ovld intel_sub_group_avc_ime_get_inter_major_shape( + intel_sub_group_avc_ime_result_t result); +uchar __ovld intel_sub_group_avc_ref_get_inter_major_shape( + intel_sub_group_avc_ref_result_t result); +uchar __ovld intel_sub_group_avc_ime_get_inter_minor_shapes( + intel_sub_group_avc_ime_result_t result); +uchar __ovld intel_sub_group_avc_ref_get_inter_minor_shapes( + intel_sub_group_avc_ref_result_t result); + +uchar __ovld intel_sub_group_avc_ime_get_inter_directions( + intel_sub_group_avc_ime_result_t result); +uchar __ovld intel_sub_group_avc_ref_get_inter_directions( + intel_sub_group_avc_ref_result_t result); + +uchar __ovld intel_sub_group_avc_ime_get_inter_motion_vector_count( + intel_sub_group_avc_ime_result_t result); +uchar __ovld intel_sub_group_avc_ref_get_inter_motion_vector_count( + intel_sub_group_avc_ref_result_t result); + +uint __ovld intel_sub_group_avc_ime_get_inter_reference_ids( + intel_sub_group_avc_ime_result_t result); +uint __ovld intel_sub_group_avc_ref_get_inter_reference_ids( + intel_sub_group_avc_ref_result_t result); + +uchar __ovld +intel_sub_group_avc_ime_get_inter_reference_interlaced_field_polarities( + uint packed_reference_ids, uint packed_reference_parameter_field_polarities, + intel_sub_group_avc_ime_result_t result); +uchar __ovld +intel_sub_group_avc_ref_get_inter_reference_interlaced_field_polarities( + uint packed_reference_ids, uint packed_reference_parameter_field_polarities, + intel_sub_group_avc_ref_result_t result); + +// Type conversion functions +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_ime_convert_to_mce_payload( + intel_sub_group_avc_ime_payload_t payload); +intel_sub_group_avc_ime_payload_t __ovld +intel_sub_group_avc_mce_convert_to_ime_payload( + intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_ref_convert_to_mce_payload( + intel_sub_group_avc_ref_payload_t payload); +intel_sub_group_avc_ref_payload_t __ovld +intel_sub_group_avc_mce_convert_to_ref_payload( + intel_sub_group_avc_mce_payload_t payload); +intel_sub_group_avc_mce_payload_t __ovld +intel_sub_group_avc_sic_convert_to_mce_payload( + intel_sub_group_avc_sic_payload_t payload); +intel_sub_group_avc_sic_payload_t __ovld +intel_sub_group_avc_mce_convert_to_sic_payload( + intel_sub_group_avc_mce_payload_t payload); + +intel_sub_group_avc_mce_result_t __ovld +intel_sub_group_avc_ime_convert_to_mce_result( + intel_sub_group_avc_ime_result_t result); +intel_sub_group_avc_ime_result_t __ovld +intel_sub_group_avc_mce_convert_to_ime_result( + intel_sub_group_avc_mce_result_t result); +intel_sub_group_avc_mce_result_t __ovld +intel_sub_group_avc_ref_convert_to_mce_result( + intel_sub_group_avc_ref_result_t result); +intel_sub_group_avc_ref_result_t __ovld +intel_sub_group_avc_mce_convert_to_ref_result( + intel_sub_group_avc_mce_result_t result); +intel_sub_group_avc_mce_result_t __ovld +intel_sub_group_avc_sic_convert_to_mce_result( + intel_sub_group_avc_sic_result_t result); +intel_sub_group_avc_sic_result_t __ovld +intel_sub_group_avc_mce_convert_to_sic_result( + intel_sub_group_avc_mce_result_t result); +#pragma OPENCL EXTENSION cl_intel_device_side_avc_motion_estimation : end +#endif // cl_intel_device_side_avc_motion_estimation + +#ifdef cl_amd_media_ops +uint __ovld amd_bitalign(uint a, uint b, uint c); +uint2 __ovld amd_bitalign(uint2 a, uint2 b, uint2 c); +uint3 __ovld amd_bitalign(uint3 a, uint3 b, uint3 c); +uint4 __ovld amd_bitalign(uint4 a, uint4 b, uint4 c); +uint8 __ovld amd_bitalign(uint8 a, uint8 b, uint8 c); +uint16 __ovld amd_bitalign(uint16 a, uint16 b, uint16 c); + +uint __ovld amd_bytealign(uint a, uint b, uint c); +uint2 __ovld amd_bytealign(uint2 a, uint2 b, uint2 c); +uint3 __ovld amd_bytealign(uint3 a, uint3 b, uint3 c); +uint4 __ovld amd_bytealign(uint4 a, uint4 b, uint4 c); +uint8 __ovld amd_bytealign(uint8 a, uint8 b, uint8 c); +uint16 __ovld amd_bytealign(uint16 a, uint16 b, uint16 c); + +uint __ovld amd_lerp(uint a, uint b, uint c); +uint2 __ovld amd_lerp(uint2 a, uint2 b, uint2 c); +uint3 __ovld amd_lerp(uint3 a, uint3 b, uint3 c); +uint4 __ovld amd_lerp(uint4 a, uint4 b, uint4 c); +uint8 __ovld amd_lerp(uint8 a, uint8 b, uint8 c); +uint16 __ovld amd_lerp(uint16 a, uint16 b, uint16 c); + +uint __ovld amd_pack(float4 v); + +uint __ovld amd_sad4(uint4 x, uint4 y, uint z); + +uint __ovld amd_sadhi(uint a, uint b, uint c); +uint2 __ovld amd_sadhi(uint2 a, uint2 b, uint2 c); +uint3 __ovld amd_sadhi(uint3 a, uint3 b, uint3 c); +uint4 __ovld amd_sadhi(uint4 a, uint4 b, uint4 c); +uint8 __ovld amd_sadhi(uint8 a, uint8 b, uint8 c); +uint16 __ovld amd_sadhi(uint16 a, uint16 b, uint16 c); + +uint __ovld amd_sad(uint a, uint b, uint c); +uint2 __ovld amd_sad(uint2 a, uint2 b, uint2 c); +uint3 __ovld amd_sad(uint3 a, uint3 b, uint3 c); +uint4 __ovld amd_sad(uint4 a, uint4 b, uint4 c); +uint8 __ovld amd_sad(uint8 a, uint8 b, uint8 c); +uint16 __ovld amd_sad(uint16 a, uint16 b, uint16 c); + +float __ovld amd_unpack0(uint a); +float2 __ovld amd_unpack0(uint2 a); +float3 __ovld amd_unpack0(uint3 a); +float4 __ovld amd_unpack0(uint4 a); +float8 __ovld amd_unpack0(uint8 a); +float16 __ovld amd_unpack0(uint16 a); + +float __ovld amd_unpack1(uint a); +float2 __ovld amd_unpack1(uint2 a); +float3 __ovld amd_unpack1(uint3 a); +float4 __ovld amd_unpack1(uint4 a); +float8 __ovld amd_unpack1(uint8 a); +float16 __ovld amd_unpack1(uint16 a); + +float __ovld amd_unpack2(uint a); +float2 __ovld amd_unpack2(uint2 a); +float3 __ovld amd_unpack2(uint3 a); +float4 __ovld amd_unpack2(uint4 a); +float8 __ovld amd_unpack2(uint8 a); +float16 __ovld amd_unpack2(uint16 a); + +float __ovld amd_unpack3(uint a); +float2 __ovld amd_unpack3(uint2 a); +float3 __ovld amd_unpack3(uint3 a); +float4 __ovld amd_unpack3(uint4 a); +float8 __ovld amd_unpack3(uint8 a); +float16 __ovld amd_unpack3(uint16 a); +#endif // cl_amd_media_ops + +#ifdef cl_amd_media_ops2 +int __ovld amd_bfe(int src0, uint src1, uint src2); +int2 __ovld amd_bfe(int2 src0, uint2 src1, uint2 src2); +int3 __ovld amd_bfe(int3 src0, uint3 src1, uint3 src2); +int4 __ovld amd_bfe(int4 src0, uint4 src1, uint4 src2); +int8 __ovld amd_bfe(int8 src0, uint8 src1, uint8 src2); +int16 __ovld amd_bfe(int16 src0, uint16 src1, uint16 src2); + +uint __ovld amd_bfe(uint src0, uint src1, uint src2); +uint2 __ovld amd_bfe(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_bfe(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_bfe(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_bfe(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_bfe(uint16 src0, uint16 src1, uint16 src2); + +uint __ovld amd_bfm(uint src0, uint src1); +uint2 __ovld amd_bfm(uint2 src0, uint2 src1); +uint3 __ovld amd_bfm(uint3 src0, uint3 src1); +uint4 __ovld amd_bfm(uint4 src0, uint4 src1); +uint8 __ovld amd_bfm(uint8 src0, uint8 src1); +uint16 __ovld amd_bfm(uint16 src0, uint16 src1); + +float __ovld amd_max3(float src0, float src1, float src2); +float2 __ovld amd_max3(float2 src0, float2 src1, float2 src2); +float3 __ovld amd_max3(float3 src0, float3 src1, float3 src2); +float4 __ovld amd_max3(float4 src0, float4 src1, float4 src2); +float8 __ovld amd_max3(float8 src0, float8 src1, float8 src2); +float16 __ovld amd_max3(float16 src0, float16 src1, float16 src2); + +int __ovld amd_max3(int src0, int src1, int src2); +int2 __ovld amd_max3(int2 src0, int2 src1, int2 src2); +int3 __ovld amd_max3(int3 src0, int3 src1, int3 src2); +int4 __ovld amd_max3(int4 src0, int4 src1, int4 src2); +int8 __ovld amd_max3(int8 src0, int8 src1, int8 src2); +int16 __ovld amd_max3(int16 src0, int16 src1, int16 src2); + +uint __ovld amd_max3(uint src0, uint src1, uint src2); +uint2 __ovld amd_max3(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_max3(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_max3(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_max3(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_max3(uint16 src0, uint16 src1, uint16 src2); + +float __ovld amd_median3(float src0, float src1, float src2); +float2 __ovld amd_median3(float2 src0, float2 src1, float2 src2); +float3 __ovld amd_median3(float3 src0, float3 src1, float3 src2); +float4 __ovld amd_median3(float4 src0, float4 src1, float4 src2); +float8 __ovld amd_median3(float8 src0, float8 src1, float8 src2); +float16 __ovld amd_median3(float16 src0, float16 src1, float16 src2); + +int __ovld amd_median3(int src0, int src1, int src2); +int2 __ovld amd_median3(int2 src0, int2 src1, int2 src2); +int3 __ovld amd_median3(int3 src0, int3 src1, int3 src2); +int4 __ovld amd_median3(int4 src0, int4 src1, int4 src2); +int8 __ovld amd_median3(int8 src0, int8 src1, int8 src2); +int16 __ovld amd_median3(int16 src0, int16 src1, int16 src2); + +uint __ovld amd_median3(uint src0, uint src1, uint src2); +uint2 __ovld amd_median3(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_median3(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_median3(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_median3(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_median3(uint16 src0, uint16 src1, uint16 src2); + +float __ovld amd_min3(float src0, float src1, float src); +float2 __ovld amd_min3(float2 src0, float2 src1, float2 src); +float3 __ovld amd_min3(float3 src0, float3 src1, float3 src); +float4 __ovld amd_min3(float4 src0, float4 src1, float4 src); +float8 __ovld amd_min3(float8 src0, float8 src1, float8 src); +float16 __ovld amd_min3(float16 src0, float16 src1, float16 src); + +int __ovld amd_min3(int src0, int src1, int src2); +int2 __ovld amd_min3(int2 src0, int2 src1, int2 src2); +int3 __ovld amd_min3(int3 src0, int3 src1, int3 src2); +int4 __ovld amd_min3(int4 src0, int4 src1, int4 src2); +int8 __ovld amd_min3(int8 src0, int8 src1, int8 src2); +int16 __ovld amd_min3(int16 src0, int16 src1, int16 src2); + +uint __ovld amd_min3(uint src0, uint src1, uint src2); +uint2 __ovld amd_min3(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_min3(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_min3(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_min3(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_min3(uint16 src0, uint16 src1, uint16 src2); + +ulong __ovld amd_mqsad(ulong src0, uint src1, ulong src2); +ulong2 __ovld amd_mqsad(ulong2 src0, uint2 src1, ulong2 src2); +ulong3 __ovld amd_mqsad(ulong3 src0, uint3 src1, ulong3 src2); +ulong4 __ovld amd_mqsad(ulong4 src0, uint4 src1, ulong4 src2); +ulong8 __ovld amd_mqsad(ulong8 src0, uint8 src1, ulong8 src2); +ulong16 __ovld amd_mqsad(ulong16 src0, uint16 src1, ulong16 src2); + +ulong __ovld amd_qsad(ulong src0, uint src1, ulong src2); +ulong2 __ovld amd_qsad(ulong2 src0, uint2 src1, ulong2 src2); +ulong3 __ovld amd_qsad(ulong3 src0, uint3 src1, ulong3 src2); +ulong4 __ovld amd_qsad(ulong4 src0, uint4 src1, ulong4 src2); +ulong8 __ovld amd_qsad(ulong8 src0, uint8 src1, ulong8 src2); +ulong16 __ovld amd_qsad(ulong16 src0, uint16 src1, ulong16 src2); + +uint __ovld amd_msad(uint src0, uint src1, uint src2); +uint2 __ovld amd_msad(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_msad(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_msad(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_msad(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_msad(uint16 src0, uint16 src1, uint16 src2); + +uint __ovld amd_sadd(uint src0, uint src1, uint src2); +uint2 __ovld amd_sadd(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_sadd(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_sadd(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_sadd(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_sadd(uint16 src0, uint16 src1, uint16 src2); + +uint __ovld amd_sadw(uint src0, uint src1, uint src2); +uint2 __ovld amd_sadw(uint2 src0, uint2 src1, uint2 src2); +uint3 __ovld amd_sadw(uint3 src0, uint3 src1, uint3 src2); +uint4 __ovld amd_sadw(uint4 src0, uint4 src1, uint4 src2); +uint8 __ovld amd_sadw(uint8 src0, uint8 src1, uint8 src2); +uint16 __ovld amd_sadw(uint16 src0, uint16 src1, uint16 src2); +#endif // cl_amd_media_ops2 + +#if defined(cl_arm_integer_dot_product_int8) +#pragma OPENCL EXTENSION cl_arm_integer_dot_product_int8 : begin +uint __ovld arm_dot(uchar4 a, uchar4 b); +int __ovld arm_dot(char4 a, char4 b); +#pragma OPENCL EXTENSION cl_arm_integer_dot_product_int8 : end +#endif // defined(cl_arm_integer_dot_product_int8) + +#if defined(cl_arm_integer_dot_product_accumulate_int8) +#pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_int8 : begin +uint __ovld arm_dot_acc(uchar4 a, uchar4 b, uint c); +int __ovld arm_dot_acc(char4 a, char4 b, int c); +#pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_int8 : end +#endif // defined(cl_arm_integer_dot_product_accumulate_int8) + +#if defined(cl_arm_integer_dot_product_accumulate_int16) +#pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_int16 : begin +uint __ovld arm_dot_acc(ushort2 a, ushort2 b, uint c); +int __ovld arm_dot_acc(short2 a, short2 b, int c); +#pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_int16 : end +#endif // defined(cl_arm_integer_dot_product_accumulate_int16) + +#if defined(cl_arm_integer_dot_product_accumulate_saturate_int8) +#pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_saturate_int8 : begin +uint __ovld arm_dot_acc_sat(uchar4 a, uchar4 b, uint c); +int __ovld arm_dot_acc_sat(char4 a, char4 b, int c); +#pragma OPENCL EXTENSION cl_arm_integer_dot_product_accumulate_saturate_int8 : end +#endif // defined(cl_arm_integer_dot_product_accumulate_saturate_int8) + +// Disable any extensions we may have enabled previously. +#pragma OPENCL EXTENSION all : disable + +#undef __cnfn +#undef __ovld +#endif //_OPENCL_H_ diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/pocl.h b/benchmarks/new_opencl/compiler/share/pocl/include/pocl.h new file mode 100644 index 00000000..e062e742 --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/pocl.h @@ -0,0 +1,395 @@ +/* pocl.h - global pocl declarations for the host side runtime. + + Copyright (c) 2011 Universidad Rey Juan Carlos + 2011-2019 Pekka Jääskeläinen + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. +*/ + +/** + * @file pocl.h + * + * The declarations in this file are such that are used both in the + * libpocl implementation CL and the kernel compiler. Others should be + * moved to pocl_cl.h of lib/CL or under the kernel compiler dir. + * @todo Check if there are extra declarations here that could be moved. + */ +#ifndef POCL_H +#define POCL_H + +#ifndef CL_TARGET_OPENCL_VERSION +#define CL_TARGET_OPENCL_VERSION 220 +#endif +#include + +#include "config.h" + +#include "pocl_context.h" + +/* detects restrict, variadic macros etc */ +#include "pocl_compiler_features.h" + +#define POCL_FILENAME_LENGTH 1024 + +#define WORKGROUP_STRING_LENGTH 1024 + +typedef struct _mem_mapping mem_mapping_t; +/* represents a single buffer to host memory mapping */ +struct _mem_mapping { + void *host_ptr; /* the location of the mapped buffer chunk in the host memory */ + size_t offset; /* offset to the beginning of the buffer */ + size_t size; + mem_mapping_t *prev, *next; + /* This is required, because two clEnqueueMap() with the same buffer+size+offset, + will create two identical mappings in the buffer->mappings LL. + Without this flag, both corresponding clEnqUnmap()s will find + the same mapping (the first one in mappings LL), which will lead + to memory double-free corruption later. */ + long unmap_requested; + cl_map_flags map_flags; + /* image mapping data */ + size_t origin[3]; + size_t region[3]; + size_t row_pitch; + size_t slice_pitch; +}; + +/* memory identifier: id to point the global memory where memory resides + + pointer to actual data */ +typedef struct _pocl_mem_identifier +{ + int available; /* ... in this mem objs context */ + int global_mem_id; + void *mem_ptr; + void *image_data; +} pocl_mem_identifier; + +typedef struct _mem_destructor_callback mem_destructor_callback_t; +/* represents a memory object destructor callback */ +struct _mem_destructor_callback +{ + void (CL_CALLBACK * pfn_notify) (cl_mem, void*); /* callback function */ + void *user_data; /* user supplied data passed to callback function */ + mem_destructor_callback_t *next; +}; + +typedef struct _build_program_callback build_program_callback_t; +struct _build_program_callback +{ + void (CL_CALLBACK * callback_function) (cl_program, void*); /* callback function */ + void *user_data; /* user supplied data passed to callback function */ +}; + +// Command Queue datatypes + +#define POCL_KERNEL_DIGEST_SIZE 16 +typedef uint8_t pocl_kernel_hash_t[POCL_KERNEL_DIGEST_SIZE]; + +// clEnqueueNDRangeKernel +typedef struct +{ + void *hash; + void *wg; /* The work group function ptr. Device specific. */ + cl_kernel kernel; + /* The launch data that can be passed to the kernel execution environment. */ + struct pocl_context pc; + struct pocl_argument *arguments; + /* Can be used to store/cache arbitrary device-specific data. */ + void *device_data; + /* If set to 1, disallow any work-group function specialization. */ + int force_generic_wg_func; + /* If set to 1, disallow "small grid" WG function specialization. */ + int force_large_grid_wg_func; + unsigned device_i; +} _cl_command_run; + +// clEnqueueNativeKernel +typedef struct +{ + void *args; + size_t cb_args; + void (*user_func)(void *); +} _cl_command_native; + +// clEnqueueReadBuffer +typedef struct +{ + void *__restrict__ dst_host_ptr; + pocl_mem_identifier *src_mem_id; + size_t offset; + size_t size; +} _cl_command_read; + +// clEnqueueWriteBuffer +typedef struct +{ + const void *__restrict__ src_host_ptr; + pocl_mem_identifier *dst_mem_id; + size_t offset; + size_t size; +} _cl_command_write; + +// clEnqueueCopyBuffer +typedef struct +{ + pocl_mem_identifier *src_mem_id; + pocl_mem_identifier *dst_mem_id; + size_t src_offset; + size_t dst_offset; + size_t size; +} _cl_command_copy; + +// clEnqueueReadBufferRect +typedef struct +{ + void *__restrict__ dst_host_ptr; + pocl_mem_identifier *src_mem_id; + size_t buffer_origin[3]; + size_t host_origin[3]; + size_t region[3]; + size_t buffer_row_pitch; + size_t buffer_slice_pitch; + size_t host_row_pitch; + size_t host_slice_pitch; +} _cl_command_read_rect; + +// clEnqueueWriteBufferRect +typedef struct +{ + const void *__restrict__ src_host_ptr; + pocl_mem_identifier *dst_mem_id; + size_t buffer_origin[3]; + size_t host_origin[3]; + size_t region[3]; + size_t buffer_row_pitch; + size_t buffer_slice_pitch; + size_t host_row_pitch; + size_t host_slice_pitch; +} _cl_command_write_rect; + +// clEnqueueCopyBufferRect +typedef struct +{ + pocl_mem_identifier *src_mem_id; + pocl_mem_identifier *dst_mem_id; + size_t dst_origin[3]; + size_t src_origin[3]; + size_t region[3]; + size_t src_row_pitch; + size_t src_slice_pitch; + size_t dst_row_pitch; + size_t dst_slice_pitch; +} _cl_command_copy_rect; + +// clEnqueueMapBuffer +typedef struct +{ + pocl_mem_identifier *mem_id; + mem_mapping_t *mapping; +} _cl_command_map; + +/* clEnqueueUnMapMemObject */ +typedef struct +{ + pocl_mem_identifier *mem_id; + mem_mapping_t *mapping; +} _cl_command_unmap; + +/* clEnqueueFillBuffer */ +typedef struct +{ + pocl_mem_identifier *dst_mem_id; + size_t size; + size_t offset; + void *__restrict__ pattern; + size_t pattern_size; +} _cl_command_fill_mem; + +/* clEnqueue(Write/Read)Image */ +typedef struct +{ + pocl_mem_identifier *src_mem_id; + void *__restrict__ dst_host_ptr; + pocl_mem_identifier *dst_mem_id; + size_t dst_offset; + size_t origin[3]; + size_t region[3]; + size_t dst_row_pitch; + size_t dst_slice_pitch; +} _cl_command_read_image; + +typedef struct +{ + pocl_mem_identifier *dst_mem_id; + const void *__restrict__ src_host_ptr; + pocl_mem_identifier *src_mem_id; + size_t src_offset; + size_t origin[3]; + size_t region[3]; + size_t src_row_pitch; + size_t src_slice_pitch; +} _cl_command_write_image; + +typedef struct +{ + pocl_mem_identifier *src_mem_id; + pocl_mem_identifier *dst_mem_id; + size_t dst_origin[3]; + size_t src_origin[3]; + size_t region[3]; +} _cl_command_copy_image; + +/* clEnqueueFillImage */ +typedef struct +{ + pocl_mem_identifier *mem_id; + size_t origin[3]; + size_t region[3]; + void *__restrict__ fill_pixel; + size_t pixel_size; +} _cl_command_fill_image; + +/* clEnqueueMarkerWithWaitlist */ +typedef struct +{ + void *data; + int has_wait_list; +} _cl_command_marker; + +/* clEnqueueBarrierWithWaitlist */ +typedef _cl_command_marker _cl_command_barrier; + +/* clEnqueueMigrateMemObjects */ +typedef struct +{ + void *data; + size_t num_mem_objects; + cl_mem *mem_objects; + cl_device_id *source_devices; +} _cl_command_migrate; + +typedef struct +{ + void* data; + void* queue; + unsigned num_svm_pointers; + void **svm_pointers; + void (CL_CALLBACK *pfn_free_func) ( cl_command_queue queue, + cl_uint num_svm_pointers, + void *svm_pointers[], + void *user_data); +} _cl_command_svm_free; + +typedef struct +{ + void* svm_ptr; + size_t size; + cl_map_flags flags; +} _cl_command_svm_map; + +typedef struct +{ + void* svm_ptr; +} _cl_command_svm_unmap; + +typedef struct +{ + const void *__restrict__ src; + void *__restrict__ dst; + size_t size; +} _cl_command_svm_cpy; + +typedef struct +{ + void *__restrict__ svm_ptr; + size_t size; + void *__restrict__ pattern; + size_t pattern_size; +} _cl_command_svm_fill; + +typedef union +{ + _cl_command_run run; + _cl_command_native native; + + _cl_command_read read; + _cl_command_write write; + _cl_command_copy copy; + _cl_command_read_rect read_rect; + _cl_command_write_rect write_rect; + _cl_command_copy_rect copy_rect; + _cl_command_fill_mem memfill; + + _cl_command_read_image read_image; + _cl_command_write_image write_image; + _cl_command_copy_image copy_image; + _cl_command_fill_image fill_image; + + _cl_command_map map; + _cl_command_unmap unmap; + + _cl_command_marker marker; + _cl_command_barrier barrier; + _cl_command_migrate migrate; + + _cl_command_svm_free svm_free; + _cl_command_svm_map svm_map; + _cl_command_svm_unmap svm_unmap; + _cl_command_svm_cpy svm_memcpy; + _cl_command_svm_fill svm_fill; +} _cl_command_t; + +// one item in the command queue +typedef struct _cl_command_node _cl_command_node; +struct _cl_command_node +{ + _cl_command_t command; + cl_command_type type; + _cl_command_node *next; // for linked-list storage + _cl_command_node *prev; + cl_event event; + const cl_event *event_wait_list; + cl_device_id device; + /* The index of the targeted device in the platform's device list. */ + unsigned device_i; + cl_int ready; +}; + +#ifndef LLVM_10_0 +#define LLVM_OLDER_THAN_10_0 1 + +#ifndef LLVM_9_0 +#define LLVM_OLDER_THAN_9_0 1 + +#ifndef LLVM_8_0 +#define LLVM_OLDER_THAN_8_0 1 + +#ifndef LLVM_7_0 +#define LLVM_OLDER_THAN_7_0 1 + +#ifndef LLVM_6_0 +#define LLVM_OLDER_THAN_6_0 1 + +#endif +#endif +#endif +#endif +#endif + +#endif /* POCL_H */ diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/pocl_device.h b/benchmarks/new_opencl/compiler/share/pocl/include/pocl_device.h new file mode 100644 index 00000000..66747df7 --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/pocl_device.h @@ -0,0 +1,80 @@ +/* pocl_device.h - global pocl declarations to be used in the device binaries in + case applicable by the target + + Copyright (c) 2012-2018 Pekka Jääskeläinen / Tampere University of Technology + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. +*/ + +#ifndef POCL_DEVICE_H +#define POCL_DEVICE_H + +#include "pocl_types.h" + +#define MAX_KERNEL_ARGS 64 +#define MAX_KERNEL_NAME_LENGTH 64 + +/* Metadata of a single kernel stored in the device.*/ +typedef struct { + const uchar name[MAX_KERNEL_NAME_LENGTH]; + ushort num_args; + ushort num_locals; + void *work_group_func; +} __kernel_metadata; + +#ifdef _MSC_VER + #define ALIGN4(x) __declspec(align(4)) x + #define ALIGN8(x) __declspec(align(4)) x +#else + #define ALIGN4(x) x __attribute__ ((aligned (4))) + #define ALIGN8(x) x __attribute__ ((aligned (8))) +#endif + +/* A kernel invocation command. */ +typedef struct { + /* The execution status of this queue slot. */ + ALIGN8(uint status); + /* The kernel to execute. Points to the metadata in the device global + memory. It will be casted to a __kernel_metadata* */ + ALIGN8(uint kernel); + /* Pointers to the kernel arguments in the global memory. Will be + casted to 32 bit void* */ + ALIGN8(uint args[MAX_KERNEL_ARGS]); + /* Sizes of the dynamically allocated local buffers. */ +/* uint32_t dynamic_local_arg_sizes[MAX_KERNEL_ARGS] ALIGN4; */ + /* Number of dimensions in the work space. */ + ALIGN4(uint work_dim); + ALIGN4(uint num_groups[3]); + ALIGN4(uint global_offset[3]); +} __kernel_exec_cmd; + +/* Kernel execution statuses. */ + +/* The invocation entry is free to use. */ +#define POCL_KST_FREE 1 +/* The kernel structure has been populated and is waiting to be + executed. */ +#define POCL_KST_READY 2 +/* The kernel is currently running in the device. */ +#define POCL_KST_RUNNING 3 +/* The kernel has finished execution. The results can be collected and the + execution entry be freed (by writing POCL_KST_FREE to the status). */ +#define POCL_KST_FINISHED 4 + +#endif diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/pocl_image_types.h b/benchmarks/new_opencl/compiler/share/pocl/include/pocl_image_types.h new file mode 100644 index 00000000..a8db3c7b --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/pocl_image_types.h @@ -0,0 +1,52 @@ +/* pocl_image_types.h - image data structure used by device implementations + + Copyright (c) 2013 Ville Korhonen + Copyright (c) 2017 Michal Babej / Tampere University of Technology + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. +*/ + +#ifndef __X86_IMAGE_H__ +#define __X86_IMAGE_H__ + +#ifdef __CBUILD__ +#define INTTYPE cl_int +#else +#define INTTYPE int +#endif + +typedef uintptr_t dev_sampler_t; + +typedef struct dev_image_t { + void *_data; + INTTYPE _width; + INTTYPE _height; + INTTYPE _depth; + INTTYPE _image_array_size; + INTTYPE _row_pitch; + INTTYPE _slice_pitch; + INTTYPE _num_mip_levels; /* maybe not needed */ + INTTYPE _num_samples; /* maybe not needed */ + INTTYPE _order; + INTTYPE _data_type; + INTTYPE _num_channels; + INTTYPE _elem_size; +} dev_image_t; + +#endif diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/pocl_spir.h b/benchmarks/new_opencl/compiler/share/pocl/include/pocl_spir.h new file mode 100644 index 00000000..33f2b697 --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/pocl_spir.h @@ -0,0 +1,33 @@ +/* pocl-spir.h - global pocl declarations for the SPIR support. + + Copyright (c) 2018-2019 Pekka Jääskeläinen + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. +*/ + +#ifndef POCL_SPIR_H +#define POCL_SPIR_H + +#define SPIR_ADDRESS_SPACE_PRIVATE 0 +#define SPIR_ADDRESS_SPACE_GLOBAL 1 +#define SPIR_ADDRESS_SPACE_CONSTANT 2 +#define SPIR_ADDRESS_SPACE_LOCAL 3 +#define SPIR_ADDRESS_SPACE_GENERIC 4 + +#endif diff --git a/benchmarks/new_opencl/compiler/share/pocl/include/pocl_types.h b/benchmarks/new_opencl/compiler/share/pocl/include/pocl_types.h new file mode 100644 index 00000000..aff4d910 --- /dev/null +++ b/benchmarks/new_opencl/compiler/share/pocl/include/pocl_types.h @@ -0,0 +1,171 @@ +/* pocl_types.h - The basic OpenCL C device side scalar data types. + + Copyright (c) 2018 Pekka Jääskeläinen / Tampere University of Technology + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in + all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + THE SOFTWARE. +*/ + +/* This header is designed to be included both from the device and the host. + In case compiling OpenCL C sources, __OPENCL_VERSION__ should be set. + In case compiling in the host, all but the device-specific types are + defined (size_t and others). Devices should avoid including the C + stdint.h instead of this one as OpenCL C size_t et al. is allowed to + be of different width than when targeting C. + + TODO: replace this header (partially) with Clang's opencl-c.h +*/ + +#ifndef POCL_DEVICE_TYPES_H +#define POCL_DEVICE_TYPES_H + +#ifdef __OPENCL_VERSION__ + +#ifdef __USE_CLANG_OPENCL_C_H + +/* Minimal definitions, only the target specific macro overrides, + just in case Clang export the C ones which might differ for + OpenCL C. */ + +#ifdef __INTPTR_TYPE__ +#undef __INTPTR_TYPE__ +#endif + +#ifdef __UINTPTR_TYPE__ +#undef __UINTPTR_TYPE__ +#endif + +#ifdef __SIZE_TYPE__ +#undef __SIZE_TYPE__ +#endif + +#ifdef __SIZE_MAX__ +#undef __SIZE_MAX__ +#endif + +#if defined(POCL_DEVICE_ADDRESS_BITS) && POCL_DEVICE_ADDRESS_BITS == 32 +#define __SIZE_TYPE__ uint +#define __SIZE_MAX__ UINT_MAX +#else +#define __SIZE_TYPE__ ulong +#define __SIZE_MAX__ ULONG_MAX +#endif + +#define __INTPTR_TYPE__ __SIZE_TYPE__ +#define __UINTPTR_TYPE__ __INTPTR_TYPE__ + +#else + +/* Compiling Device-specific OpenCL C or builtin library C. */ + +#if defined cl_khr_fp64 && !defined cl_khr_int64 +#error "cl_khr_fp64 requires cl_khr_int64" +#endif + +/* TODO FIXME We should not use these in OpenCL library's C code at all. + * The problem is that 1) these are predefined by glibc, 2) while we can + * re-define "ulong", we cannot control the size of "long" at all. + * which can lead to "ulong" being 64bit and "long" 32bit, resulting in + * mysterious errors and bugs. Therefore OpenCL library's C code should + * use the fixed size C types where integer size matters. */ + +#ifdef __CBUILD__ + +/* Builtin library C code definitions. */ + +#define size_t csize_t +#define uintptr_t cuintptr_t + +#include + +#undef size_t +#undef uintptr_t + +typedef uint8_t uchar; +typedef uint16_t ushort; +typedef uint32_t uint; + +#ifdef cl_khr_int64 +typedef uint64_t ulong; +#else +typedef uint32_t ulong; +#endif + +#ifndef cl_khr_fp16 +typedef short half; +#endif + +#endif + +/* The definitions below intentionally lead to errors if these types + are used when they are not available in the language. This prevents + accidentally using them if the compiler does not disable these + types, but only e.g. defines them with an incorrect size.*/ + +#ifndef cl_khr_fp64 +typedef struct error_undefined_type_double error_undefined_type_double; +#define double error_undefined_type_double +#endif + +#ifdef __SIZE_TYPE__ +#undef __SIZE_TYPE__ +#endif + +#ifdef __SIZE_MAX__ +#undef __SIZE_MAX__ +#endif + +#if defined(POCL_DEVICE_ADDRESS_BITS) && POCL_DEVICE_ADDRESS_BITS == 32 +#define __SIZE_TYPE__ uint +#define __SIZE_MAX__ UINT_MAX +#else +#define __SIZE_TYPE__ ulong +#define __SIZE_MAX__ ULONG_MAX +#endif + +typedef __SIZE_TYPE__ size_t; +typedef __PTRDIFF_TYPE__ ptrdiff_t; +typedef ptrdiff_t intptr_t; +typedef size_t uintptr_t; + +#endif /* #ifdef __USE_CLANG_OPENCL_C_H */ + +#else /* #ifdef __OPENCL_VERSION__ */ + +/* Including from a host source (runtime API implementation). Introduce + the fixed width datatypes, but do not override C's size_t and other + target specific datatypes. */ + +typedef unsigned char uchar; + +/* FIXME see the above TODO about these types. */ + +#if !(defined(_SYS_TYPES_H) && defined(__USE_MISC)) +/* glibc, when including sys/types.h, typedefs these. */ + +typedef unsigned long int ulong; +typedef unsigned short int ushort; +typedef unsigned int uint; + +#endif + +#include + +#endif + +#endif diff --git a/benchmarks/new_opencl/compiler/share/pocl/kernel-riscv32-unknown-unknown-elf-skylake.bc b/benchmarks/new_opencl/compiler/share/pocl/kernel-riscv32-unknown-unknown-elf-skylake.bc new file mode 100644 index 00000000..fc115233 Binary files /dev/null and b/benchmarks/new_opencl/compiler/share/pocl/kernel-riscv32-unknown-unknown-elf-skylake.bc differ diff --git a/benchmarks/new_opencl/guassian/Makefile b/benchmarks/new_opencl/guassian/Makefile index 4330e3c9..0bec2a95 100644 --- a/benchmarks/new_opencl/guassian/Makefile +++ b/benchmarks/new_opencl/guassian/Makefile @@ -1,6 +1,6 @@ -RISCV_TOOL_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops) -POCLCC_PATH ?= $(wildcard ~/dev/pocl/drops_vortex_cc) -POCLRT_PATH ?= $(wildcard ..) +LLVM_LIB_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops/lib) +POCLCC_PATH ?= $(wildcard ../compiler) +POCLRT_PATH ?= $(wildcard ../runtime) DRIVER_PATH ?= $(wildcard ../../../driver/sw) CXXFLAGS += -std=c++11 -O0 -g -fpermissive -Wall -Wextra -pedantic -Wfatal-errors @@ -16,7 +16,7 @@ SRCS = main.cc clutils.cpp utils.cpp all: $(PROJECT) kernel.pocl: kernel.cl - POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl + POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(LLVM_LIB_PATH):$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl $(PROJECT): $(SRCS) $(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@ diff --git a/benchmarks/new_opencl/nearn/Makefile b/benchmarks/new_opencl/nearn/Makefile index 99d6bfb7..0dcc3c01 100644 --- a/benchmarks/new_opencl/nearn/Makefile +++ b/benchmarks/new_opencl/nearn/Makefile @@ -1,6 +1,6 @@ -RISCV_TOOL_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops) -POCLCC_PATH ?= $(wildcard ~/dev/pocl/drops_vortex_cc) -POCLRT_PATH ?= $(wildcard ..) +LLVM_LIB_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops/lib) +POCLCC_PATH ?= $(wildcard ../compiler) +POCLRT_PATH ?= $(wildcard ../runtime) DRIVER_PATH ?= $(wildcard ../../../driver/sw) CXXFLAGS += -std=c++11 -O0 -g -fpermissive -Wall -Wextra -pedantic -Wfatal-errors @@ -16,7 +16,7 @@ SRCS = main.cc clutils.cpp utils.cpp all: $(PROJECT) kernel.pocl: kernel.cl - POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl + POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(LLVM_LIB_PATH):$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl $(PROJECT): $(SRCS) $(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@ diff --git a/benchmarks/new_opencl/results.txt b/benchmarks/new_opencl/results.txt index 54e40ece..e69de29b 100644 --- a/benchmarks/new_opencl/results.txt +++ b/benchmarks/new_opencl/results.txt @@ -1,7 +0,0 @@ -# Dynamic Instructions: -1 -# of total cycles: 2519 -# of forwarding stalls: 0 -# of branch stalls: 0 -# CPI: -2519 -# time to simulate: 4.94066e-323 milliseconds -# GRADE: Failed on test: 0 diff --git a/benchmarks/new_opencl/runtime/include/CL/cl.h b/benchmarks/new_opencl/runtime/include/CL/cl.h new file mode 100644 index 00000000..32ae73fc --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl.h @@ -0,0 +1,1804 @@ +/******************************************************************************* + * Copyright (c) 2008-2019 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + ******************************************************************************/ + +#ifndef __OPENCL_CL_H +#define __OPENCL_CL_H + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/******************************************************************************/ + +typedef struct _cl_platform_id * cl_platform_id; +typedef struct _cl_device_id * cl_device_id; +typedef struct _cl_context * cl_context; +typedef struct _cl_command_queue * cl_command_queue; +typedef struct _cl_mem * cl_mem; +typedef struct _cl_program * cl_program; +typedef struct _cl_kernel * cl_kernel; +typedef struct _cl_event * cl_event; +typedef struct _cl_sampler * cl_sampler; + +typedef cl_uint cl_bool; /* WARNING! Unlike cl_ types in cl_platform.h, cl_bool is not guaranteed to be the same size as the bool in kernels. */ +typedef cl_ulong cl_bitfield; +typedef cl_bitfield cl_device_type; +typedef cl_uint cl_platform_info; +typedef cl_uint cl_device_info; +typedef cl_bitfield cl_device_fp_config; +typedef cl_uint cl_device_mem_cache_type; +typedef cl_uint cl_device_local_mem_type; +typedef cl_bitfield cl_device_exec_capabilities; +#ifdef CL_VERSION_2_0 +typedef cl_bitfield cl_device_svm_capabilities; +#endif +typedef cl_bitfield cl_command_queue_properties; +#ifdef CL_VERSION_1_2 +typedef intptr_t cl_device_partition_property; +typedef cl_bitfield cl_device_affinity_domain; +#endif + +typedef intptr_t cl_context_properties; +typedef cl_uint cl_context_info; +#ifdef CL_VERSION_2_0 +typedef cl_bitfield cl_queue_properties; +#endif +typedef cl_uint cl_command_queue_info; +typedef cl_uint cl_channel_order; +typedef cl_uint cl_channel_type; +typedef cl_bitfield cl_mem_flags; +#ifdef CL_VERSION_2_0 +typedef cl_bitfield cl_svm_mem_flags; +#endif +typedef cl_uint cl_mem_object_type; +typedef cl_uint cl_mem_info; +#ifdef CL_VERSION_1_2 +typedef cl_bitfield cl_mem_migration_flags; +#endif +typedef cl_uint cl_image_info; +#ifdef CL_VERSION_1_1 +typedef cl_uint cl_buffer_create_type; +#endif +typedef cl_uint cl_addressing_mode; +typedef cl_uint cl_filter_mode; +typedef cl_uint cl_sampler_info; +typedef cl_bitfield cl_map_flags; +#ifdef CL_VERSION_2_0 +typedef intptr_t cl_pipe_properties; +typedef cl_uint cl_pipe_info; +#endif +typedef cl_uint cl_program_info; +typedef cl_uint cl_program_build_info; +#ifdef CL_VERSION_1_2 +typedef cl_uint cl_program_binary_type; +#endif +typedef cl_int cl_build_status; +typedef cl_uint cl_kernel_info; +#ifdef CL_VERSION_1_2 +typedef cl_uint cl_kernel_arg_info; +typedef cl_uint cl_kernel_arg_address_qualifier; +typedef cl_uint cl_kernel_arg_access_qualifier; +typedef cl_bitfield cl_kernel_arg_type_qualifier; +#endif +typedef cl_uint cl_kernel_work_group_info; +#ifdef CL_VERSION_2_1 +typedef cl_uint cl_kernel_sub_group_info; +#endif +typedef cl_uint cl_event_info; +typedef cl_uint cl_command_type; +typedef cl_uint cl_profiling_info; +#ifdef CL_VERSION_2_0 +typedef cl_bitfield cl_sampler_properties; +typedef cl_uint cl_kernel_exec_info; +#endif + +typedef struct _cl_image_format { + cl_channel_order image_channel_order; + cl_channel_type image_channel_data_type; +} cl_image_format; + +#ifdef CL_VERSION_1_2 + +typedef struct _cl_image_desc { + cl_mem_object_type image_type; + size_t image_width; + size_t image_height; + size_t image_depth; + size_t image_array_size; + size_t image_row_pitch; + size_t image_slice_pitch; + cl_uint num_mip_levels; + cl_uint num_samples; +#ifdef CL_VERSION_2_0 +#ifdef __GNUC__ + __extension__ /* Prevents warnings about anonymous union in -pedantic builds */ +#endif +#ifdef _MSC_VER +#pragma warning( push ) +#pragma warning( disable : 4201 ) /* Prevents warning about nameless struct/union in /W4 /Za builds */ +#endif + union { +#endif + cl_mem buffer; +#ifdef CL_VERSION_2_0 + cl_mem mem_object; + }; +#ifdef _MSC_VER +#pragma warning( pop ) +#endif +#endif +} cl_image_desc; + +#endif + +#ifdef CL_VERSION_1_1 + +typedef struct _cl_buffer_region { + size_t origin; + size_t size; +} cl_buffer_region; + +#endif + +/******************************************************************************/ + +/* Error Codes */ +#define CL_SUCCESS 0 +#define CL_DEVICE_NOT_FOUND -1 +#define CL_DEVICE_NOT_AVAILABLE -2 +#define CL_COMPILER_NOT_AVAILABLE -3 +#define CL_MEM_OBJECT_ALLOCATION_FAILURE -4 +#define CL_OUT_OF_RESOURCES -5 +#define CL_OUT_OF_HOST_MEMORY -6 +#define CL_PROFILING_INFO_NOT_AVAILABLE -7 +#define CL_MEM_COPY_OVERLAP -8 +#define CL_IMAGE_FORMAT_MISMATCH -9 +#define CL_IMAGE_FORMAT_NOT_SUPPORTED -10 +#define CL_BUILD_PROGRAM_FAILURE -11 +#define CL_MAP_FAILURE -12 +#ifdef CL_VERSION_1_1 +#define CL_MISALIGNED_SUB_BUFFER_OFFSET -13 +#define CL_EXEC_STATUS_ERROR_FOR_EVENTS_IN_WAIT_LIST -14 +#endif +#ifdef CL_VERSION_1_2 +#define CL_COMPILE_PROGRAM_FAILURE -15 +#define CL_LINKER_NOT_AVAILABLE -16 +#define CL_LINK_PROGRAM_FAILURE -17 +#define CL_DEVICE_PARTITION_FAILED -18 +#define CL_KERNEL_ARG_INFO_NOT_AVAILABLE -19 +#endif + +#define CL_INVALID_VALUE -30 +#define CL_INVALID_DEVICE_TYPE -31 +#define CL_INVALID_PLATFORM -32 +#define CL_INVALID_DEVICE -33 +#define CL_INVALID_CONTEXT -34 +#define CL_INVALID_QUEUE_PROPERTIES -35 +#define CL_INVALID_COMMAND_QUEUE -36 +#define CL_INVALID_HOST_PTR -37 +#define CL_INVALID_MEM_OBJECT -38 +#define CL_INVALID_IMAGE_FORMAT_DESCRIPTOR -39 +#define CL_INVALID_IMAGE_SIZE -40 +#define CL_INVALID_SAMPLER -41 +#define CL_INVALID_BINARY -42 +#define CL_INVALID_BUILD_OPTIONS -43 +#define CL_INVALID_PROGRAM -44 +#define CL_INVALID_PROGRAM_EXECUTABLE -45 +#define CL_INVALID_KERNEL_NAME -46 +#define CL_INVALID_KERNEL_DEFINITION -47 +#define CL_INVALID_KERNEL -48 +#define CL_INVALID_ARG_INDEX -49 +#define CL_INVALID_ARG_VALUE -50 +#define CL_INVALID_ARG_SIZE -51 +#define CL_INVALID_KERNEL_ARGS -52 +#define CL_INVALID_WORK_DIMENSION -53 +#define CL_INVALID_WORK_GROUP_SIZE -54 +#define CL_INVALID_WORK_ITEM_SIZE -55 +#define CL_INVALID_GLOBAL_OFFSET -56 +#define CL_INVALID_EVENT_WAIT_LIST -57 +#define CL_INVALID_EVENT -58 +#define CL_INVALID_OPERATION -59 +#define CL_INVALID_GL_OBJECT -60 +#define CL_INVALID_BUFFER_SIZE -61 +#define CL_INVALID_MIP_LEVEL -62 +#define CL_INVALID_GLOBAL_WORK_SIZE -63 +#ifdef CL_VERSION_1_1 +#define CL_INVALID_PROPERTY -64 +#endif +#ifdef CL_VERSION_1_2 +#define CL_INVALID_IMAGE_DESCRIPTOR -65 +#define CL_INVALID_COMPILER_OPTIONS -66 +#define CL_INVALID_LINKER_OPTIONS -67 +#define CL_INVALID_DEVICE_PARTITION_COUNT -68 +#endif +#ifdef CL_VERSION_2_0 +#define CL_INVALID_PIPE_SIZE -69 +#define CL_INVALID_DEVICE_QUEUE -70 +#endif +#ifdef CL_VERSION_2_2 +#define CL_INVALID_SPEC_ID -71 +#define CL_MAX_SIZE_RESTRICTION_EXCEEDED -72 +#endif + + +/* cl_bool */ +#define CL_FALSE 0 +#define CL_TRUE 1 +#ifdef CL_VERSION_1_2 +#define CL_BLOCKING CL_TRUE +#define CL_NON_BLOCKING CL_FALSE +#endif + +/* cl_platform_info */ +#define CL_PLATFORM_PROFILE 0x0900 +#define CL_PLATFORM_VERSION 0x0901 +#define CL_PLATFORM_NAME 0x0902 +#define CL_PLATFORM_VENDOR 0x0903 +#define CL_PLATFORM_EXTENSIONS 0x0904 +#ifdef CL_VERSION_2_1 +#define CL_PLATFORM_HOST_TIMER_RESOLUTION 0x0905 +#endif + +/* cl_device_type - bitfield */ +#define CL_DEVICE_TYPE_DEFAULT (1 << 0) +#define CL_DEVICE_TYPE_CPU (1 << 1) +#define CL_DEVICE_TYPE_GPU (1 << 2) +#define CL_DEVICE_TYPE_ACCELERATOR (1 << 3) +#ifdef CL_VERSION_1_2 +#define CL_DEVICE_TYPE_CUSTOM (1 << 4) +#endif +#define CL_DEVICE_TYPE_ALL 0xFFFFFFFF + +/* cl_device_info */ +#define CL_DEVICE_TYPE 0x1000 +#define CL_DEVICE_VENDOR_ID 0x1001 +#define CL_DEVICE_MAX_COMPUTE_UNITS 0x1002 +#define CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS 0x1003 +#define CL_DEVICE_MAX_WORK_GROUP_SIZE 0x1004 +#define CL_DEVICE_MAX_WORK_ITEM_SIZES 0x1005 +#define CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR 0x1006 +#define CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT 0x1007 +#define CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT 0x1008 +#define CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG 0x1009 +#define CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT 0x100A +#define CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE 0x100B +#define CL_DEVICE_MAX_CLOCK_FREQUENCY 0x100C +#define CL_DEVICE_ADDRESS_BITS 0x100D +#define CL_DEVICE_MAX_READ_IMAGE_ARGS 0x100E +#define CL_DEVICE_MAX_WRITE_IMAGE_ARGS 0x100F +#define CL_DEVICE_MAX_MEM_ALLOC_SIZE 0x1010 +#define CL_DEVICE_IMAGE2D_MAX_WIDTH 0x1011 +#define CL_DEVICE_IMAGE2D_MAX_HEIGHT 0x1012 +#define CL_DEVICE_IMAGE3D_MAX_WIDTH 0x1013 +#define CL_DEVICE_IMAGE3D_MAX_HEIGHT 0x1014 +#define CL_DEVICE_IMAGE3D_MAX_DEPTH 0x1015 +#define CL_DEVICE_IMAGE_SUPPORT 0x1016 +#define CL_DEVICE_MAX_PARAMETER_SIZE 0x1017 +#define CL_DEVICE_MAX_SAMPLERS 0x1018 +#define CL_DEVICE_MEM_BASE_ADDR_ALIGN 0x1019 +#define CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE 0x101A +#define CL_DEVICE_SINGLE_FP_CONFIG 0x101B +#define CL_DEVICE_GLOBAL_MEM_CACHE_TYPE 0x101C +#define CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE 0x101D +#define CL_DEVICE_GLOBAL_MEM_CACHE_SIZE 0x101E +#define CL_DEVICE_GLOBAL_MEM_SIZE 0x101F +#define CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE 0x1020 +#define CL_DEVICE_MAX_CONSTANT_ARGS 0x1021 +#define CL_DEVICE_LOCAL_MEM_TYPE 0x1022 +#define CL_DEVICE_LOCAL_MEM_SIZE 0x1023 +#define CL_DEVICE_ERROR_CORRECTION_SUPPORT 0x1024 +#define CL_DEVICE_PROFILING_TIMER_RESOLUTION 0x1025 +#define CL_DEVICE_ENDIAN_LITTLE 0x1026 +#define CL_DEVICE_AVAILABLE 0x1027 +#define CL_DEVICE_COMPILER_AVAILABLE 0x1028 +#define CL_DEVICE_EXECUTION_CAPABILITIES 0x1029 +#define CL_DEVICE_QUEUE_PROPERTIES 0x102A /* deprecated */ +#ifdef CL_VERSION_2_0 +#define CL_DEVICE_QUEUE_ON_HOST_PROPERTIES 0x102A +#endif +#define CL_DEVICE_NAME 0x102B +#define CL_DEVICE_VENDOR 0x102C +#define CL_DRIVER_VERSION 0x102D +#define CL_DEVICE_PROFILE 0x102E +#define CL_DEVICE_VERSION 0x102F +#define CL_DEVICE_EXTENSIONS 0x1030 +#define CL_DEVICE_PLATFORM 0x1031 +#ifdef CL_VERSION_1_2 +#define CL_DEVICE_DOUBLE_FP_CONFIG 0x1032 +#endif +/* 0x1033 reserved for CL_DEVICE_HALF_FP_CONFIG which is already defined in "cl_ext.h" */ +#ifdef CL_VERSION_1_1 +#define CL_DEVICE_PREFERRED_VECTOR_WIDTH_HALF 0x1034 +#define CL_DEVICE_HOST_UNIFIED_MEMORY 0x1035 /* deprecated */ +#define CL_DEVICE_NATIVE_VECTOR_WIDTH_CHAR 0x1036 +#define CL_DEVICE_NATIVE_VECTOR_WIDTH_SHORT 0x1037 +#define CL_DEVICE_NATIVE_VECTOR_WIDTH_INT 0x1038 +#define CL_DEVICE_NATIVE_VECTOR_WIDTH_LONG 0x1039 +#define CL_DEVICE_NATIVE_VECTOR_WIDTH_FLOAT 0x103A +#define CL_DEVICE_NATIVE_VECTOR_WIDTH_DOUBLE 0x103B +#define CL_DEVICE_NATIVE_VECTOR_WIDTH_HALF 0x103C +#define CL_DEVICE_OPENCL_C_VERSION 0x103D +#endif +#ifdef CL_VERSION_1_2 +#define CL_DEVICE_LINKER_AVAILABLE 0x103E +#define CL_DEVICE_BUILT_IN_KERNELS 0x103F +#define CL_DEVICE_IMAGE_MAX_BUFFER_SIZE 0x1040 +#define CL_DEVICE_IMAGE_MAX_ARRAY_SIZE 0x1041 +#define CL_DEVICE_PARENT_DEVICE 0x1042 +#define CL_DEVICE_PARTITION_MAX_SUB_DEVICES 0x1043 +#define CL_DEVICE_PARTITION_PROPERTIES 0x1044 +#define CL_DEVICE_PARTITION_AFFINITY_DOMAIN 0x1045 +#define CL_DEVICE_PARTITION_TYPE 0x1046 +#define CL_DEVICE_REFERENCE_COUNT 0x1047 +#define CL_DEVICE_PREFERRED_INTEROP_USER_SYNC 0x1048 +#define CL_DEVICE_PRINTF_BUFFER_SIZE 0x1049 +#endif +#ifdef CL_VERSION_2_0 +#define CL_DEVICE_IMAGE_PITCH_ALIGNMENT 0x104A +#define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT 0x104B +#define CL_DEVICE_MAX_READ_WRITE_IMAGE_ARGS 0x104C +#define CL_DEVICE_MAX_GLOBAL_VARIABLE_SIZE 0x104D +#define CL_DEVICE_QUEUE_ON_DEVICE_PROPERTIES 0x104E +#define CL_DEVICE_QUEUE_ON_DEVICE_PREFERRED_SIZE 0x104F +#define CL_DEVICE_QUEUE_ON_DEVICE_MAX_SIZE 0x1050 +#define CL_DEVICE_MAX_ON_DEVICE_QUEUES 0x1051 +#define CL_DEVICE_MAX_ON_DEVICE_EVENTS 0x1052 +#define CL_DEVICE_SVM_CAPABILITIES 0x1053 +#define CL_DEVICE_GLOBAL_VARIABLE_PREFERRED_TOTAL_SIZE 0x1054 +#define CL_DEVICE_MAX_PIPE_ARGS 0x1055 +#define CL_DEVICE_PIPE_MAX_ACTIVE_RESERVATIONS 0x1056 +#define CL_DEVICE_PIPE_MAX_PACKET_SIZE 0x1057 +#define CL_DEVICE_PREFERRED_PLATFORM_ATOMIC_ALIGNMENT 0x1058 +#define CL_DEVICE_PREFERRED_GLOBAL_ATOMIC_ALIGNMENT 0x1059 +#define CL_DEVICE_PREFERRED_LOCAL_ATOMIC_ALIGNMENT 0x105A +#endif +#ifdef CL_VERSION_2_1 +#define CL_DEVICE_IL_VERSION 0x105B +#define CL_DEVICE_MAX_NUM_SUB_GROUPS 0x105C +#define CL_DEVICE_SUB_GROUP_INDEPENDENT_FORWARD_PROGRESS 0x105D +#endif + +/* cl_device_fp_config - bitfield */ +#define CL_FP_DENORM (1 << 0) +#define CL_FP_INF_NAN (1 << 1) +#define CL_FP_ROUND_TO_NEAREST (1 << 2) +#define CL_FP_ROUND_TO_ZERO (1 << 3) +#define CL_FP_ROUND_TO_INF (1 << 4) +#define CL_FP_FMA (1 << 5) +#ifdef CL_VERSION_1_1 +#define CL_FP_SOFT_FLOAT (1 << 6) +#endif +#ifdef CL_VERSION_1_2 +#define CL_FP_CORRECTLY_ROUNDED_DIVIDE_SQRT (1 << 7) +#endif + +/* cl_device_mem_cache_type */ +#define CL_NONE 0x0 +#define CL_READ_ONLY_CACHE 0x1 +#define CL_READ_WRITE_CACHE 0x2 + +/* cl_device_local_mem_type */ +#define CL_LOCAL 0x1 +#define CL_GLOBAL 0x2 + +/* cl_device_exec_capabilities - bitfield */ +#define CL_EXEC_KERNEL (1 << 0) +#define CL_EXEC_NATIVE_KERNEL (1 << 1) + +/* cl_command_queue_properties - bitfield */ +#define CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE (1 << 0) +#define CL_QUEUE_PROFILING_ENABLE (1 << 1) +#ifdef CL_VERSION_2_0 +#define CL_QUEUE_ON_DEVICE (1 << 2) +#define CL_QUEUE_ON_DEVICE_DEFAULT (1 << 3) +#endif + +/* cl_context_info */ +#define CL_CONTEXT_REFERENCE_COUNT 0x1080 +#define CL_CONTEXT_DEVICES 0x1081 +#define CL_CONTEXT_PROPERTIES 0x1082 +#ifdef CL_VERSION_1_1 +#define CL_CONTEXT_NUM_DEVICES 0x1083 +#endif + +/* cl_context_properties */ +#define CL_CONTEXT_PLATFORM 0x1084 +#ifdef CL_VERSION_1_2 +#define CL_CONTEXT_INTEROP_USER_SYNC 0x1085 +#endif + +#ifdef CL_VERSION_1_2 + +/* cl_device_partition_property */ +#define CL_DEVICE_PARTITION_EQUALLY 0x1086 +#define CL_DEVICE_PARTITION_BY_COUNTS 0x1087 +#define CL_DEVICE_PARTITION_BY_COUNTS_LIST_END 0x0 +#define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN 0x1088 + +#endif + +#ifdef CL_VERSION_1_2 + +/* cl_device_affinity_domain */ +#define CL_DEVICE_AFFINITY_DOMAIN_NUMA (1 << 0) +#define CL_DEVICE_AFFINITY_DOMAIN_L4_CACHE (1 << 1) +#define CL_DEVICE_AFFINITY_DOMAIN_L3_CACHE (1 << 2) +#define CL_DEVICE_AFFINITY_DOMAIN_L2_CACHE (1 << 3) +#define CL_DEVICE_AFFINITY_DOMAIN_L1_CACHE (1 << 4) +#define CL_DEVICE_AFFINITY_DOMAIN_NEXT_PARTITIONABLE (1 << 5) + +#endif + +#ifdef CL_VERSION_2_0 + +/* cl_device_svm_capabilities */ +#define CL_DEVICE_SVM_COARSE_GRAIN_BUFFER (1 << 0) +#define CL_DEVICE_SVM_FINE_GRAIN_BUFFER (1 << 1) +#define CL_DEVICE_SVM_FINE_GRAIN_SYSTEM (1 << 2) +#define CL_DEVICE_SVM_ATOMICS (1 << 3) + +#endif + +/* cl_command_queue_info */ +#define CL_QUEUE_CONTEXT 0x1090 +#define CL_QUEUE_DEVICE 0x1091 +#define CL_QUEUE_REFERENCE_COUNT 0x1092 +#define CL_QUEUE_PROPERTIES 0x1093 +#ifdef CL_VERSION_2_0 +#define CL_QUEUE_SIZE 0x1094 +#endif +#ifdef CL_VERSION_2_1 +#define CL_QUEUE_DEVICE_DEFAULT 0x1095 +#endif + +/* cl_mem_flags and cl_svm_mem_flags - bitfield */ +#define CL_MEM_READ_WRITE (1 << 0) +#define CL_MEM_WRITE_ONLY (1 << 1) +#define CL_MEM_READ_ONLY (1 << 2) +#define CL_MEM_USE_HOST_PTR (1 << 3) +#define CL_MEM_ALLOC_HOST_PTR (1 << 4) +#define CL_MEM_COPY_HOST_PTR (1 << 5) +/* reserved (1 << 6) */ +#ifdef CL_VERSION_1_2 +#define CL_MEM_HOST_WRITE_ONLY (1 << 7) +#define CL_MEM_HOST_READ_ONLY (1 << 8) +#define CL_MEM_HOST_NO_ACCESS (1 << 9) +#endif +#ifdef CL_VERSION_2_0 +#define CL_MEM_SVM_FINE_GRAIN_BUFFER (1 << 10) /* used by cl_svm_mem_flags only */ +#define CL_MEM_SVM_ATOMICS (1 << 11) /* used by cl_svm_mem_flags only */ +#define CL_MEM_KERNEL_READ_AND_WRITE (1 << 12) +#endif + +#ifdef CL_VERSION_1_2 + +/* cl_mem_migration_flags - bitfield */ +#define CL_MIGRATE_MEM_OBJECT_HOST (1 << 0) +#define CL_MIGRATE_MEM_OBJECT_CONTENT_UNDEFINED (1 << 1) + +#endif + +/* cl_channel_order */ +#define CL_R 0x10B0 +#define CL_A 0x10B1 +#define CL_RG 0x10B2 +#define CL_RA 0x10B3 +#define CL_RGB 0x10B4 +#define CL_RGBA 0x10B5 +#define CL_BGRA 0x10B6 +#define CL_ARGB 0x10B7 +#define CL_INTENSITY 0x10B8 +#define CL_LUMINANCE 0x10B9 +#ifdef CL_VERSION_1_1 +#define CL_Rx 0x10BA +#define CL_RGx 0x10BB +#define CL_RGBx 0x10BC +#endif +#ifdef CL_VERSION_1_2 +#define CL_DEPTH 0x10BD +#define CL_DEPTH_STENCIL 0x10BE +#endif +#ifdef CL_VERSION_2_0 +#define CL_sRGB 0x10BF +#define CL_sRGBx 0x10C0 +#define CL_sRGBA 0x10C1 +#define CL_sBGRA 0x10C2 +#define CL_ABGR 0x10C3 +#endif + +/* cl_channel_type */ +#define CL_SNORM_INT8 0x10D0 +#define CL_SNORM_INT16 0x10D1 +#define CL_UNORM_INT8 0x10D2 +#define CL_UNORM_INT16 0x10D3 +#define CL_UNORM_SHORT_565 0x10D4 +#define CL_UNORM_SHORT_555 0x10D5 +#define CL_UNORM_INT_101010 0x10D6 +#define CL_SIGNED_INT8 0x10D7 +#define CL_SIGNED_INT16 0x10D8 +#define CL_SIGNED_INT32 0x10D9 +#define CL_UNSIGNED_INT8 0x10DA +#define CL_UNSIGNED_INT16 0x10DB +#define CL_UNSIGNED_INT32 0x10DC +#define CL_HALF_FLOAT 0x10DD +#define CL_FLOAT 0x10DE +#ifdef CL_VERSION_1_2 +#define CL_UNORM_INT24 0x10DF +#endif +#ifdef CL_VERSION_2_1 +#define CL_UNORM_INT_101010_2 0x10E0 +#endif + +/* cl_mem_object_type */ +#define CL_MEM_OBJECT_BUFFER 0x10F0 +#define CL_MEM_OBJECT_IMAGE2D 0x10F1 +#define CL_MEM_OBJECT_IMAGE3D 0x10F2 +#ifdef CL_VERSION_1_2 +#define CL_MEM_OBJECT_IMAGE2D_ARRAY 0x10F3 +#define CL_MEM_OBJECT_IMAGE1D 0x10F4 +#define CL_MEM_OBJECT_IMAGE1D_ARRAY 0x10F5 +#define CL_MEM_OBJECT_IMAGE1D_BUFFER 0x10F6 +#endif +#ifdef CL_VERSION_2_0 +#define CL_MEM_OBJECT_PIPE 0x10F7 +#endif + +/* cl_mem_info */ +#define CL_MEM_TYPE 0x1100 +#define CL_MEM_FLAGS 0x1101 +#define CL_MEM_SIZE 0x1102 +#define CL_MEM_HOST_PTR 0x1103 +#define CL_MEM_MAP_COUNT 0x1104 +#define CL_MEM_REFERENCE_COUNT 0x1105 +#define CL_MEM_CONTEXT 0x1106 +#ifdef CL_VERSION_1_1 +#define CL_MEM_ASSOCIATED_MEMOBJECT 0x1107 +#define CL_MEM_OFFSET 0x1108 +#endif +#ifdef CL_VERSION_2_0 +#define CL_MEM_USES_SVM_POINTER 0x1109 +#endif + +/* cl_image_info */ +#define CL_IMAGE_FORMAT 0x1110 +#define CL_IMAGE_ELEMENT_SIZE 0x1111 +#define CL_IMAGE_ROW_PITCH 0x1112 +#define CL_IMAGE_SLICE_PITCH 0x1113 +#define CL_IMAGE_WIDTH 0x1114 +#define CL_IMAGE_HEIGHT 0x1115 +#define CL_IMAGE_DEPTH 0x1116 +#ifdef CL_VERSION_1_2 +#define CL_IMAGE_ARRAY_SIZE 0x1117 +#define CL_IMAGE_BUFFER 0x1118 +#define CL_IMAGE_NUM_MIP_LEVELS 0x1119 +#define CL_IMAGE_NUM_SAMPLES 0x111A +#endif + +#ifdef CL_VERSION_2_0 + +/* cl_pipe_info */ +#define CL_PIPE_PACKET_SIZE 0x1120 +#define CL_PIPE_MAX_PACKETS 0x1121 + +#endif + +/* cl_addressing_mode */ +#define CL_ADDRESS_NONE 0x1130 +#define CL_ADDRESS_CLAMP_TO_EDGE 0x1131 +#define CL_ADDRESS_CLAMP 0x1132 +#define CL_ADDRESS_REPEAT 0x1133 +#ifdef CL_VERSION_1_1 +#define CL_ADDRESS_MIRRORED_REPEAT 0x1134 +#endif + +/* cl_filter_mode */ +#define CL_FILTER_NEAREST 0x1140 +#define CL_FILTER_LINEAR 0x1141 + +/* cl_sampler_info */ +#define CL_SAMPLER_REFERENCE_COUNT 0x1150 +#define CL_SAMPLER_CONTEXT 0x1151 +#define CL_SAMPLER_NORMALIZED_COORDS 0x1152 +#define CL_SAMPLER_ADDRESSING_MODE 0x1153 +#define CL_SAMPLER_FILTER_MODE 0x1154 +#ifdef CL_VERSION_2_0 +/* These enumerants are for the cl_khr_mipmap_image extension. + They have since been added to cl_ext.h with an appropriate + KHR suffix, but are left here for backwards compatibility. */ +#define CL_SAMPLER_MIP_FILTER_MODE 0x1155 +#define CL_SAMPLER_LOD_MIN 0x1156 +#define CL_SAMPLER_LOD_MAX 0x1157 +#endif + +/* cl_map_flags - bitfield */ +#define CL_MAP_READ (1 << 0) +#define CL_MAP_WRITE (1 << 1) +#ifdef CL_VERSION_1_2 +#define CL_MAP_WRITE_INVALIDATE_REGION (1 << 2) +#endif + +/* cl_program_info */ +#define CL_PROGRAM_REFERENCE_COUNT 0x1160 +#define CL_PROGRAM_CONTEXT 0x1161 +#define CL_PROGRAM_NUM_DEVICES 0x1162 +#define CL_PROGRAM_DEVICES 0x1163 +#define CL_PROGRAM_SOURCE 0x1164 +#define CL_PROGRAM_BINARY_SIZES 0x1165 +#define CL_PROGRAM_BINARIES 0x1166 +#ifdef CL_VERSION_1_2 +#define CL_PROGRAM_NUM_KERNELS 0x1167 +#define CL_PROGRAM_KERNEL_NAMES 0x1168 +#endif +#ifdef CL_VERSION_2_1 +#define CL_PROGRAM_IL 0x1169 +#endif +#ifdef CL_VERSION_2_2 +#define CL_PROGRAM_SCOPE_GLOBAL_CTORS_PRESENT 0x116A +#define CL_PROGRAM_SCOPE_GLOBAL_DTORS_PRESENT 0x116B +#endif + +/* cl_program_build_info */ +#define CL_PROGRAM_BUILD_STATUS 0x1181 +#define CL_PROGRAM_BUILD_OPTIONS 0x1182 +#define CL_PROGRAM_BUILD_LOG 0x1183 +#ifdef CL_VERSION_1_2 +#define CL_PROGRAM_BINARY_TYPE 0x1184 +#endif +#ifdef CL_VERSION_2_0 +#define CL_PROGRAM_BUILD_GLOBAL_VARIABLE_TOTAL_SIZE 0x1185 +#endif + +#ifdef CL_VERSION_1_2 + +/* cl_program_binary_type */ +#define CL_PROGRAM_BINARY_TYPE_NONE 0x0 +#define CL_PROGRAM_BINARY_TYPE_COMPILED_OBJECT 0x1 +#define CL_PROGRAM_BINARY_TYPE_LIBRARY 0x2 +#define CL_PROGRAM_BINARY_TYPE_EXECUTABLE 0x4 + +#endif + +/* cl_build_status */ +#define CL_BUILD_SUCCESS 0 +#define CL_BUILD_NONE -1 +#define CL_BUILD_ERROR -2 +#define CL_BUILD_IN_PROGRESS -3 + +/* cl_kernel_info */ +#define CL_KERNEL_FUNCTION_NAME 0x1190 +#define CL_KERNEL_NUM_ARGS 0x1191 +#define CL_KERNEL_REFERENCE_COUNT 0x1192 +#define CL_KERNEL_CONTEXT 0x1193 +#define CL_KERNEL_PROGRAM 0x1194 +#ifdef CL_VERSION_1_2 +#define CL_KERNEL_ATTRIBUTES 0x1195 +#endif +#ifdef CL_VERSION_2_1 +#define CL_KERNEL_MAX_NUM_SUB_GROUPS 0x11B9 +#define CL_KERNEL_COMPILE_NUM_SUB_GROUPS 0x11BA +#endif + +#ifdef CL_VERSION_1_2 + +/* cl_kernel_arg_info */ +#define CL_KERNEL_ARG_ADDRESS_QUALIFIER 0x1196 +#define CL_KERNEL_ARG_ACCESS_QUALIFIER 0x1197 +#define CL_KERNEL_ARG_TYPE_NAME 0x1198 +#define CL_KERNEL_ARG_TYPE_QUALIFIER 0x1199 +#define CL_KERNEL_ARG_NAME 0x119A + +#endif + +#ifdef CL_VERSION_1_2 + +/* cl_kernel_arg_address_qualifier */ +#define CL_KERNEL_ARG_ADDRESS_GLOBAL 0x119B +#define CL_KERNEL_ARG_ADDRESS_LOCAL 0x119C +#define CL_KERNEL_ARG_ADDRESS_CONSTANT 0x119D +#define CL_KERNEL_ARG_ADDRESS_PRIVATE 0x119E + +#endif + +#ifdef CL_VERSION_1_2 + +/* cl_kernel_arg_access_qualifier */ +#define CL_KERNEL_ARG_ACCESS_READ_ONLY 0x11A0 +#define CL_KERNEL_ARG_ACCESS_WRITE_ONLY 0x11A1 +#define CL_KERNEL_ARG_ACCESS_READ_WRITE 0x11A2 +#define CL_KERNEL_ARG_ACCESS_NONE 0x11A3 + +#endif + +#ifdef CL_VERSION_1_2 + +/* cl_kernel_arg_type_qualifier */ +#define CL_KERNEL_ARG_TYPE_NONE 0 +#define CL_KERNEL_ARG_TYPE_CONST (1 << 0) +#define CL_KERNEL_ARG_TYPE_RESTRICT (1 << 1) +#define CL_KERNEL_ARG_TYPE_VOLATILE (1 << 2) +#ifdef CL_VERSION_2_0 +#define CL_KERNEL_ARG_TYPE_PIPE (1 << 3) +#endif + +#endif + +/* cl_kernel_work_group_info */ +#define CL_KERNEL_WORK_GROUP_SIZE 0x11B0 +#define CL_KERNEL_COMPILE_WORK_GROUP_SIZE 0x11B1 +#define CL_KERNEL_LOCAL_MEM_SIZE 0x11B2 +#define CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE 0x11B3 +#define CL_KERNEL_PRIVATE_MEM_SIZE 0x11B4 +#ifdef CL_VERSION_1_2 +#define CL_KERNEL_GLOBAL_WORK_SIZE 0x11B5 +#endif + +#ifdef CL_VERSION_2_1 + +/* cl_kernel_sub_group_info */ +#define CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE 0x2033 +#define CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE 0x2034 +#define CL_KERNEL_LOCAL_SIZE_FOR_SUB_GROUP_COUNT 0x11B8 + +#endif + +#ifdef CL_VERSION_2_0 + +/* cl_kernel_exec_info */ +#define CL_KERNEL_EXEC_INFO_SVM_PTRS 0x11B6 +#define CL_KERNEL_EXEC_INFO_SVM_FINE_GRAIN_SYSTEM 0x11B7 + +#endif + +/* cl_event_info */ +#define CL_EVENT_COMMAND_QUEUE 0x11D0 +#define CL_EVENT_COMMAND_TYPE 0x11D1 +#define CL_EVENT_REFERENCE_COUNT 0x11D2 +#define CL_EVENT_COMMAND_EXECUTION_STATUS 0x11D3 +#ifdef CL_VERSION_1_1 +#define CL_EVENT_CONTEXT 0x11D4 +#endif + +/* cl_command_type */ +#define CL_COMMAND_NDRANGE_KERNEL 0x11F0 +#define CL_COMMAND_TASK 0x11F1 +#define CL_COMMAND_NATIVE_KERNEL 0x11F2 +#define CL_COMMAND_READ_BUFFER 0x11F3 +#define CL_COMMAND_WRITE_BUFFER 0x11F4 +#define CL_COMMAND_COPY_BUFFER 0x11F5 +#define CL_COMMAND_READ_IMAGE 0x11F6 +#define CL_COMMAND_WRITE_IMAGE 0x11F7 +#define CL_COMMAND_COPY_IMAGE 0x11F8 +#define CL_COMMAND_COPY_IMAGE_TO_BUFFER 0x11F9 +#define CL_COMMAND_COPY_BUFFER_TO_IMAGE 0x11FA +#define CL_COMMAND_MAP_BUFFER 0x11FB +#define CL_COMMAND_MAP_IMAGE 0x11FC +#define CL_COMMAND_UNMAP_MEM_OBJECT 0x11FD +#define CL_COMMAND_MARKER 0x11FE +#define CL_COMMAND_ACQUIRE_GL_OBJECTS 0x11FF +#define CL_COMMAND_RELEASE_GL_OBJECTS 0x1200 +#ifdef CL_VERSION_1_1 +#define CL_COMMAND_READ_BUFFER_RECT 0x1201 +#define CL_COMMAND_WRITE_BUFFER_RECT 0x1202 +#define CL_COMMAND_COPY_BUFFER_RECT 0x1203 +#define CL_COMMAND_USER 0x1204 +#endif +#ifdef CL_VERSION_1_2 +#define CL_COMMAND_BARRIER 0x1205 +#define CL_COMMAND_MIGRATE_MEM_OBJECTS 0x1206 +#define CL_COMMAND_FILL_BUFFER 0x1207 +#define CL_COMMAND_FILL_IMAGE 0x1208 +#endif +#ifdef CL_VERSION_2_0 +#define CL_COMMAND_SVM_FREE 0x1209 +#define CL_COMMAND_SVM_MEMCPY 0x120A +#define CL_COMMAND_SVM_MEMFILL 0x120B +#define CL_COMMAND_SVM_MAP 0x120C +#define CL_COMMAND_SVM_UNMAP 0x120D +#endif + +/* command execution status */ +#define CL_COMPLETE 0x0 +#define CL_RUNNING 0x1 +#define CL_SUBMITTED 0x2 +#define CL_QUEUED 0x3 + +#ifdef CL_VERSION_1_1 + +/* cl_buffer_create_type */ +#define CL_BUFFER_CREATE_TYPE_REGION 0x1220 + +#endif + +/* cl_profiling_info */ +#define CL_PROFILING_COMMAND_QUEUED 0x1280 +#define CL_PROFILING_COMMAND_SUBMIT 0x1281 +#define CL_PROFILING_COMMAND_START 0x1282 +#define CL_PROFILING_COMMAND_END 0x1283 +#ifdef CL_VERSION_2_0 +#define CL_PROFILING_COMMAND_COMPLETE 0x1284 +#endif + +/********************************************************************************************************/ + +/* Platform API */ +extern CL_API_ENTRY cl_int CL_API_CALL +clGetPlatformIDs(cl_uint num_entries, + cl_platform_id * platforms, + cl_uint * num_platforms) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetPlatformInfo(cl_platform_id platform, + cl_platform_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +/* Device APIs */ +extern CL_API_ENTRY cl_int CL_API_CALL +clGetDeviceIDs(cl_platform_id platform, + cl_device_type device_type, + cl_uint num_entries, + cl_device_id * devices, + cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetDeviceInfo(cl_device_id device, + cl_device_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_int CL_API_CALL +clCreateSubDevices(cl_device_id in_device, + const cl_device_partition_property * properties, + cl_uint num_devices, + cl_device_id * out_devices, + cl_uint * num_devices_ret) CL_API_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clRetainDevice(cl_device_id device) CL_API_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clReleaseDevice(cl_device_id device) CL_API_SUFFIX__VERSION_1_2; + +#endif + +#ifdef CL_VERSION_2_1 + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetDefaultDeviceCommandQueue(cl_context context, + cl_device_id device, + cl_command_queue command_queue) CL_API_SUFFIX__VERSION_2_1; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetDeviceAndHostTimer(cl_device_id device, + cl_ulong* device_timestamp, + cl_ulong* host_timestamp) CL_API_SUFFIX__VERSION_2_1; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetHostTimer(cl_device_id device, + cl_ulong * host_timestamp) CL_API_SUFFIX__VERSION_2_1; + +#endif + +/* Context APIs */ +extern CL_API_ENTRY cl_context CL_API_CALL +clCreateContext(const cl_context_properties * properties, + cl_uint num_devices, + const cl_device_id * devices, + void (CL_CALLBACK * pfn_notify)(const char * errinfo, + const void * private_info, + size_t cb, + void * user_data), + void * user_data, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_context CL_API_CALL +clCreateContextFromType(const cl_context_properties * properties, + cl_device_type device_type, + void (CL_CALLBACK * pfn_notify)(const char * errinfo, + const void * private_info, + size_t cb, + void * user_data), + void * user_data, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clRetainContext(cl_context context) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clReleaseContext(cl_context context) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetContextInfo(cl_context context, + cl_context_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +/* Command Queue APIs */ + +#ifdef CL_VERSION_2_0 + +extern CL_API_ENTRY cl_command_queue CL_API_CALL +clCreateCommandQueueWithProperties(cl_context context, + cl_device_id device, + const cl_queue_properties * properties, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_2_0; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clRetainCommandQueue(cl_command_queue command_queue) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clReleaseCommandQueue(cl_command_queue command_queue) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetCommandQueueInfo(cl_command_queue command_queue, + cl_command_queue_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +/* Memory Object APIs */ +extern CL_API_ENTRY cl_mem CL_API_CALL +clCreateBuffer(cl_context context, + cl_mem_flags flags, + size_t size, + void * host_ptr, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_1 + +extern CL_API_ENTRY cl_mem CL_API_CALL +clCreateSubBuffer(cl_mem buffer, + cl_mem_flags flags, + cl_buffer_create_type buffer_create_type, + const void * buffer_create_info, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_1; + +#endif + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_mem CL_API_CALL +clCreateImage(cl_context context, + cl_mem_flags flags, + const cl_image_format * image_format, + const cl_image_desc * image_desc, + void * host_ptr, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2; + +#endif + +#ifdef CL_VERSION_2_0 + +extern CL_API_ENTRY cl_mem CL_API_CALL +clCreatePipe(cl_context context, + cl_mem_flags flags, + cl_uint pipe_packet_size, + cl_uint pipe_max_packets, + const cl_pipe_properties * properties, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_2_0; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clRetainMemObject(cl_mem memobj) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clReleaseMemObject(cl_mem memobj) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetSupportedImageFormats(cl_context context, + cl_mem_flags flags, + cl_mem_object_type image_type, + cl_uint num_entries, + cl_image_format * image_formats, + cl_uint * num_image_formats) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetMemObjectInfo(cl_mem memobj, + cl_mem_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetImageInfo(cl_mem image, + cl_image_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_2_0 + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetPipeInfo(cl_mem pipe, + cl_pipe_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_2_0; + +#endif + +#ifdef CL_VERSION_1_1 + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetMemObjectDestructorCallback(cl_mem memobj, + void (CL_CALLBACK * pfn_notify)(cl_mem memobj, + void * user_data), + void * user_data) CL_API_SUFFIX__VERSION_1_1; + +#endif + +/* SVM Allocation APIs */ + +#ifdef CL_VERSION_2_0 + +extern CL_API_ENTRY void * CL_API_CALL +clSVMAlloc(cl_context context, + cl_svm_mem_flags flags, + size_t size, + cl_uint alignment) CL_API_SUFFIX__VERSION_2_0; + +extern CL_API_ENTRY void CL_API_CALL +clSVMFree(cl_context context, + void * svm_pointer) CL_API_SUFFIX__VERSION_2_0; + +#endif + +/* Sampler APIs */ + +#ifdef CL_VERSION_2_0 + +extern CL_API_ENTRY cl_sampler CL_API_CALL +clCreateSamplerWithProperties(cl_context context, + const cl_sampler_properties * sampler_properties, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_2_0; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clRetainSampler(cl_sampler sampler) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clReleaseSampler(cl_sampler sampler) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetSamplerInfo(cl_sampler sampler, + cl_sampler_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +/* Program Object APIs */ +extern CL_API_ENTRY cl_program CL_API_CALL +clCreateProgramWithSource(cl_context context, + cl_uint count, + const char ** strings, + const size_t * lengths, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_program CL_API_CALL +clCreateProgramWithBinary(cl_context context, + cl_uint num_devices, + const cl_device_id * device_list, + const size_t * lengths, + const unsigned char ** binaries, + cl_int * binary_status, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_program CL_API_CALL +clCreateProgramWithBuiltInKernels(cl_context context, + cl_uint num_devices, + const cl_device_id * device_list, + const char * kernel_names, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2; + +#endif + +#ifdef CL_VERSION_2_1 + +extern CL_API_ENTRY cl_program CL_API_CALL +clCreateProgramWithIL(cl_context context, + const void* il, + size_t length, + cl_int* errcode_ret) CL_API_SUFFIX__VERSION_2_1; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clRetainProgram(cl_program program) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clReleaseProgram(cl_program program) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clBuildProgram(cl_program program, + cl_uint num_devices, + const cl_device_id * device_list, + const char * options, + void (CL_CALLBACK * pfn_notify)(cl_program program, + void * user_data), + void * user_data) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_int CL_API_CALL +clCompileProgram(cl_program program, + cl_uint num_devices, + const cl_device_id * device_list, + const char * options, + cl_uint num_input_headers, + const cl_program * input_headers, + const char ** header_include_names, + void (CL_CALLBACK * pfn_notify)(cl_program program, + void * user_data), + void * user_data) CL_API_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_program CL_API_CALL +clLinkProgram(cl_context context, + cl_uint num_devices, + const cl_device_id * device_list, + const char * options, + cl_uint num_input_programs, + const cl_program * input_programs, + void (CL_CALLBACK * pfn_notify)(cl_program program, + void * user_data), + void * user_data, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2; + +#endif + +#ifdef CL_VERSION_2_2 + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetProgramReleaseCallback(cl_program program, + void (CL_CALLBACK * pfn_notify)(cl_program program, + void * user_data), + void * user_data) CL_API_SUFFIX__VERSION_2_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetProgramSpecializationConstant(cl_program program, + cl_uint spec_id, + size_t spec_size, + const void* spec_value) CL_API_SUFFIX__VERSION_2_2; + +#endif + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_int CL_API_CALL +clUnloadPlatformCompiler(cl_platform_id platform) CL_API_SUFFIX__VERSION_1_2; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetProgramInfo(cl_program program, + cl_program_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetProgramBuildInfo(cl_program program, + cl_device_id device, + cl_program_build_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +/* Kernel Object APIs */ +extern CL_API_ENTRY cl_kernel CL_API_CALL +clCreateKernel(cl_program program, + const char * kernel_name, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clCreateKernelsInProgram(cl_program program, + cl_uint num_kernels, + cl_kernel * kernels, + cl_uint * num_kernels_ret) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_2_1 + +extern CL_API_ENTRY cl_kernel CL_API_CALL +clCloneKernel(cl_kernel source_kernel, + cl_int* errcode_ret) CL_API_SUFFIX__VERSION_2_1; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clRetainKernel(cl_kernel kernel) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clReleaseKernel(cl_kernel kernel) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetKernelArg(cl_kernel kernel, + cl_uint arg_index, + size_t arg_size, + const void * arg_value) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_2_0 + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetKernelArgSVMPointer(cl_kernel kernel, + cl_uint arg_index, + const void * arg_value) CL_API_SUFFIX__VERSION_2_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetKernelExecInfo(cl_kernel kernel, + cl_kernel_exec_info param_name, + size_t param_value_size, + const void * param_value) CL_API_SUFFIX__VERSION_2_0; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetKernelInfo(cl_kernel kernel, + cl_kernel_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetKernelArgInfo(cl_kernel kernel, + cl_uint arg_indx, + cl_kernel_arg_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_2; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetKernelWorkGroupInfo(cl_kernel kernel, + cl_device_id device, + cl_kernel_work_group_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_2_1 + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetKernelSubGroupInfo(cl_kernel kernel, + cl_device_id device, + cl_kernel_sub_group_info param_name, + size_t input_value_size, + const void* input_value, + size_t param_value_size, + void* param_value, + size_t* param_value_size_ret) CL_API_SUFFIX__VERSION_2_1; + +#endif + +/* Event Object APIs */ +extern CL_API_ENTRY cl_int CL_API_CALL +clWaitForEvents(cl_uint num_events, + const cl_event * event_list) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetEventInfo(cl_event event, + cl_event_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_1 + +extern CL_API_ENTRY cl_event CL_API_CALL +clCreateUserEvent(cl_context context, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_1; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clRetainEvent(cl_event event) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clReleaseEvent(cl_event event) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_1 + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetUserEventStatus(cl_event event, + cl_int execution_status) CL_API_SUFFIX__VERSION_1_1; + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetEventCallback(cl_event event, + cl_int command_exec_callback_type, + void (CL_CALLBACK * pfn_notify)(cl_event event, + cl_int event_command_status, + void * user_data), + void * user_data) CL_API_SUFFIX__VERSION_1_1; + +#endif + +/* Profiling APIs */ +extern CL_API_ENTRY cl_int CL_API_CALL +clGetEventProfilingInfo(cl_event event, + cl_profiling_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +/* Flush and Finish APIs */ +extern CL_API_ENTRY cl_int CL_API_CALL +clFlush(cl_command_queue command_queue) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clFinish(cl_command_queue command_queue) CL_API_SUFFIX__VERSION_1_0; + +/* Enqueued Commands APIs */ +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueReadBuffer(cl_command_queue command_queue, + cl_mem buffer, + cl_bool blocking_read, + size_t offset, + size_t size, + void * ptr, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_1 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueReadBufferRect(cl_command_queue command_queue, + cl_mem buffer, + cl_bool blocking_read, + const size_t * buffer_offset, + const size_t * host_offset, + const size_t * region, + size_t buffer_row_pitch, + size_t buffer_slice_pitch, + size_t host_row_pitch, + size_t host_slice_pitch, + void * ptr, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_1; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueWriteBuffer(cl_command_queue command_queue, + cl_mem buffer, + cl_bool blocking_write, + size_t offset, + size_t size, + const void * ptr, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_1 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueWriteBufferRect(cl_command_queue command_queue, + cl_mem buffer, + cl_bool blocking_write, + const size_t * buffer_offset, + const size_t * host_offset, + const size_t * region, + size_t buffer_row_pitch, + size_t buffer_slice_pitch, + size_t host_row_pitch, + size_t host_slice_pitch, + const void * ptr, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_1; + +#endif + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueFillBuffer(cl_command_queue command_queue, + cl_mem buffer, + const void * pattern, + size_t pattern_size, + size_t offset, + size_t size, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_2; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueCopyBuffer(cl_command_queue command_queue, + cl_mem src_buffer, + cl_mem dst_buffer, + size_t src_offset, + size_t dst_offset, + size_t size, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_1 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueCopyBufferRect(cl_command_queue command_queue, + cl_mem src_buffer, + cl_mem dst_buffer, + const size_t * src_origin, + const size_t * dst_origin, + const size_t * region, + size_t src_row_pitch, + size_t src_slice_pitch, + size_t dst_row_pitch, + size_t dst_slice_pitch, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_1; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueReadImage(cl_command_queue command_queue, + cl_mem image, + cl_bool blocking_read, + const size_t * origin, + const size_t * region, + size_t row_pitch, + size_t slice_pitch, + void * ptr, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueWriteImage(cl_command_queue command_queue, + cl_mem image, + cl_bool blocking_write, + const size_t * origin, + const size_t * region, + size_t input_row_pitch, + size_t input_slice_pitch, + const void * ptr, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueFillImage(cl_command_queue command_queue, + cl_mem image, + const void * fill_color, + const size_t * origin, + const size_t * region, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_2; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueCopyImage(cl_command_queue command_queue, + cl_mem src_image, + cl_mem dst_image, + const size_t * src_origin, + const size_t * dst_origin, + const size_t * region, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueCopyImageToBuffer(cl_command_queue command_queue, + cl_mem src_image, + cl_mem dst_buffer, + const size_t * src_origin, + const size_t * region, + size_t dst_offset, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueCopyBufferToImage(cl_command_queue command_queue, + cl_mem src_buffer, + cl_mem dst_image, + size_t src_offset, + const size_t * dst_origin, + const size_t * region, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY void * CL_API_CALL +clEnqueueMapBuffer(cl_command_queue command_queue, + cl_mem buffer, + cl_bool blocking_map, + cl_map_flags map_flags, + size_t offset, + size_t size, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY void * CL_API_CALL +clEnqueueMapImage(cl_command_queue command_queue, + cl_mem image, + cl_bool blocking_map, + cl_map_flags map_flags, + const size_t * origin, + const size_t * region, + size_t * image_row_pitch, + size_t * image_slice_pitch, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueUnmapMemObject(cl_command_queue command_queue, + cl_mem memobj, + void * mapped_ptr, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueMigrateMemObjects(cl_command_queue command_queue, + cl_uint num_mem_objects, + const cl_mem * mem_objects, + cl_mem_migration_flags flags, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_2; + +#endif + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueNDRangeKernel(cl_command_queue command_queue, + cl_kernel kernel, + cl_uint work_dim, + const size_t * global_work_offset, + const size_t * global_work_size, + const size_t * local_work_size, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueNativeKernel(cl_command_queue command_queue, + void (CL_CALLBACK * user_func)(void *), + void * args, + size_t cb_args, + cl_uint num_mem_objects, + const cl_mem * mem_list, + const void ** args_mem_loc, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueMarkerWithWaitList(cl_command_queue command_queue, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueBarrierWithWaitList(cl_command_queue command_queue, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_2; + +#endif + +#ifdef CL_VERSION_2_0 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMFree(cl_command_queue command_queue, + cl_uint num_svm_pointers, + void * svm_pointers[], + void (CL_CALLBACK * pfn_free_func)(cl_command_queue queue, + cl_uint num_svm_pointers, + void * svm_pointers[], + void * user_data), + void * user_data, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_2_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMMemcpy(cl_command_queue command_queue, + cl_bool blocking_copy, + void * dst_ptr, + const void * src_ptr, + size_t size, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_2_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMMemFill(cl_command_queue command_queue, + void * svm_ptr, + const void * pattern, + size_t pattern_size, + size_t size, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_2_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMMap(cl_command_queue command_queue, + cl_bool blocking_map, + cl_map_flags flags, + void * svm_ptr, + size_t size, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_2_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMUnmap(cl_command_queue command_queue, + void * svm_ptr, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_2_0; + +#endif + +#ifdef CL_VERSION_2_1 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMMigrateMem(cl_command_queue command_queue, + cl_uint num_svm_pointers, + const void ** svm_pointers, + const size_t * sizes, + cl_mem_migration_flags flags, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_2_1; + +#endif + +#ifdef CL_VERSION_1_2 + +/* Extension function access + * + * Returns the extension function address for the given function name, + * or NULL if a valid function can not be found. The client must + * check to make sure the address is not NULL, before using or + * calling the returned function address. + */ +extern CL_API_ENTRY void * CL_API_CALL +clGetExtensionFunctionAddressForPlatform(cl_platform_id platform, + const char * func_name) CL_API_SUFFIX__VERSION_1_2; + +#endif + +#ifdef CL_USE_DEPRECATED_OPENCL_1_0_APIS + /* + * WARNING: + * This API introduces mutable state into the OpenCL implementation. It has been REMOVED + * to better facilitate thread safety. The 1.0 API is not thread safe. It is not tested by the + * OpenCL 1.1 conformance test, and consequently may not work or may not work dependably. + * It is likely to be non-performant. Use of this API is not advised. Use at your own risk. + * + * Software developers previously relying on this API are instructed to set the command queue + * properties when creating the queue, instead. + */ + extern CL_API_ENTRY cl_int CL_API_CALL + clSetCommandQueueProperty(cl_command_queue command_queue, + cl_command_queue_properties properties, + cl_bool enable, + cl_command_queue_properties * old_properties) CL_EXT_SUFFIX__VERSION_1_0_DEPRECATED; +#endif /* CL_USE_DEPRECATED_OPENCL_1_0_APIS */ + +/* Deprecated OpenCL 1.1 APIs */ +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_mem CL_API_CALL +clCreateImage2D(cl_context context, + cl_mem_flags flags, + const cl_image_format * image_format, + size_t image_width, + size_t image_height, + size_t image_row_pitch, + void * host_ptr, + cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; + +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_mem CL_API_CALL +clCreateImage3D(cl_context context, + cl_mem_flags flags, + const cl_image_format * image_format, + size_t image_width, + size_t image_height, + size_t image_depth, + size_t image_row_pitch, + size_t image_slice_pitch, + void * host_ptr, + cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; + +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_int CL_API_CALL +clEnqueueMarker(cl_command_queue command_queue, + cl_event * event) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; + +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_int CL_API_CALL +clEnqueueWaitForEvents(cl_command_queue command_queue, + cl_uint num_events, + const cl_event * event_list) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; + +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_int CL_API_CALL +clEnqueueBarrier(cl_command_queue command_queue) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; + +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_int CL_API_CALL +clUnloadCompiler(void) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; + +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED void * CL_API_CALL +clGetExtensionFunctionAddress(const char * func_name) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; + +/* Deprecated OpenCL 2.0 APIs */ +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_2_DEPRECATED cl_command_queue CL_API_CALL +clCreateCommandQueue(cl_context context, + cl_device_id device, + cl_command_queue_properties properties, + cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_2_DEPRECATED; + +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_2_DEPRECATED cl_sampler CL_API_CALL +clCreateSampler(cl_context context, + cl_bool normalized_coords, + cl_addressing_mode addressing_mode, + cl_filter_mode filter_mode, + cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_2_DEPRECATED; + +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_2_DEPRECATED cl_int CL_API_CALL +clEnqueueTask(cl_command_queue command_queue, + cl_kernel kernel, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_EXT_SUFFIX__VERSION_1_2_DEPRECATED; + +#ifdef __cplusplus +} +#endif + +#endif /* __OPENCL_CL_H */ diff --git a/benchmarks/new_opencl/runtime/include/CL/cl.hpp b/benchmarks/new_opencl/runtime/include/CL/cl.hpp new file mode 100644 index 00000000..9edb0e47 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl.hpp @@ -0,0 +1,12459 @@ +/******************************************************************************* + * Copyright (c) 2008-2013 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + ******************************************************************************/ + +/*! \file + * + * \brief C++ bindings for OpenCL 1.0 (rev 48), OpenCL 1.1 (rev 33) and + * OpenCL 1.2 (rev 15) + * \author Benedict R. Gaster, Laurent Morichetti and Lee Howes + * + * Additions and fixes from: + * Brian Cole, March 3rd 2010 and April 2012 + * Matt Gruenke, April 2012. + * Bruce Merry, February 2013. + * Tom Deakin and Simon McIntosh-Smith, July 2013 + * + * \version 1.2.6 + * \date August 2013 + * + * Optional extension support + * + * cl + * cl_ext_device_fission + * #define USE_CL_DEVICE_FISSION + */ + +/*! \mainpage + * \section intro Introduction + * For many large applications C++ is the language of choice and so it seems + * reasonable to define C++ bindings for OpenCL. + * + * + * The interface is contained with a single C++ header file \em cl.hpp and all + * definitions are contained within the namespace \em cl. There is no additional + * requirement to include \em cl.h and to use either the C++ or original C + * bindings it is enough to simply include \em cl.hpp. + * + * The bindings themselves are lightweight and correspond closely to the + * underlying C API. Using the C++ bindings introduces no additional execution + * overhead. + * + * For detail documentation on the bindings see: + * + * The OpenCL C++ Wrapper API 1.2 (revision 09) + * http://www.khronos.org/registry/cl/specs/opencl-cplusplus-1.2.pdf + * + * \section example Example + * + * The following example shows a general use case for the C++ + * bindings, including support for the optional exception feature and + * also the supplied vector and string classes, see following sections for + * decriptions of these features. + * + * \code + * #define __CL_ENABLE_EXCEPTIONS + * + * #if defined(__APPLE__) || defined(__MACOSX) + * #include + * #else + * #include + * #endif + * #include + * #include + * #include + * + * const char * helloStr = "__kernel void " + * "hello(void) " + * "{ " + * " " + * "} "; + * + * int + * main(void) + * { + * cl_int err = CL_SUCCESS; + * try { + * + * std::vector platforms; + * cl::Platform::get(&platforms); + * if (platforms.size() == 0) { + * std::cout << "Platform size 0\n"; + * return -1; + * } + * + * cl_context_properties properties[] = + * { CL_CONTEXT_PLATFORM, (cl_context_properties)(platforms[0])(), 0}; + * cl::Context context(CL_DEVICE_TYPE_CPU, properties); + * + * std::vector devices = context.getInfo(); + * + * cl::Program::Sources source(1, + * std::make_pair(helloStr,strlen(helloStr))); + * cl::Program program_ = cl::Program(context, source); + * program_.build(devices); + * + * cl::Kernel kernel(program_, "hello", &err); + * + * cl::Event event; + * cl::CommandQueue queue(context, devices[0], 0, &err); + * queue.enqueueNDRangeKernel( + * kernel, + * cl::NullRange, + * cl::NDRange(4,4), + * cl::NullRange, + * NULL, + * &event); + * + * event.wait(); + * } + * catch (cl::Error err) { + * std::cerr + * << "ERROR: " + * << err.what() + * << "(" + * << err.err() + * << ")" + * << std::endl; + * } + * + * return EXIT_SUCCESS; + * } + * + * \endcode + * + */ +#ifndef CL_HPP_ +#define CL_HPP_ + +#ifdef _WIN32 + +#include +#include +#include +#include + +#if defined(__CL_ENABLE_EXCEPTIONS) +#include +#endif // #if defined(__CL_ENABLE_EXCEPTIONS) + +#pragma push_macro("max") +#undef max +#if defined(USE_DX_INTEROP) +#include +#include +#endif +#endif // _WIN32 + +// +#if defined(USE_CL_DEVICE_FISSION) +#include +#endif + +#if defined(__APPLE__) || defined(__MACOSX) +#include +#include +#include +#elif defined(__ANDROID__) +#include +#include +#else +#include +#include +#endif // !__APPLE__ + +// To avoid accidentally taking ownership of core OpenCL types +// such as cl_kernel constructors are made explicit +// under OpenCL 1.2 +#if defined(CL_VERSION_1_2) && !defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) +#define __CL_EXPLICIT_CONSTRUCTORS explicit +#else // #if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) +#define __CL_EXPLICIT_CONSTRUCTORS +#endif // #if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + +// Define deprecated prefixes and suffixes to ensure compilation +// in case they are not pre-defined +#if !defined(CL_EXT_PREFIX__VERSION_1_1_DEPRECATED) +#define CL_EXT_PREFIX__VERSION_1_1_DEPRECATED +#endif // #if !defined(CL_EXT_PREFIX__VERSION_1_1_DEPRECATED) +#if !defined(CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED) +#define CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED +#endif // #if !defined(CL_EXT_PREFIX__VERSION_1_1_DEPRECATED) + +#if !defined(CL_CALLBACK) +#define CL_CALLBACK +#endif //CL_CALLBACK + +#include +#include + +#if !defined(__NO_STD_VECTOR) +#include +#endif + +#if !defined(__NO_STD_STRING) +#include +#endif + +#if defined(linux) || defined(__APPLE__) || defined(__MACOSX) || defined(__ANDROID__) || defined(__FreeBSD_kernel__) || defined(__GNU__) +#include + +#endif // linux + +#include + + +/*! \namespace cl + * + * \brief The OpenCL C++ bindings are defined within this namespace. + * + */ +namespace cl { + +class Memory; + +/** + * Deprecated APIs for 1.2 + */ +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) || (defined(CL_VERSION_1_1) && !defined(CL_VERSION_1_2)) +#define __INIT_CL_EXT_FCN_PTR(name) \ + if(!pfn_##name) { \ + pfn_##name = (PFN_##name) \ + clGetExtensionFunctionAddress(#name); \ + if(!pfn_##name) { \ + } \ + } +#endif // #if defined(CL_VERSION_1_1) + +#if defined(CL_VERSION_1_2) +#define __INIT_CL_EXT_FCN_PTR_PLATFORM(platform, name) \ + if(!pfn_##name) { \ + pfn_##name = (PFN_##name) \ + clGetExtensionFunctionAddressForPlatform(platform, #name); \ + if(!pfn_##name) { \ + } \ + } +#endif // #if defined(CL_VERSION_1_1) + +class Program; +class Device; +class Context; +class CommandQueue; +class Memory; +class Buffer; + +#if defined(__CL_ENABLE_EXCEPTIONS) +/*! \brief Exception class + * + * This may be thrown by API functions when __CL_ENABLE_EXCEPTIONS is defined. + */ +class Error : public std::exception +{ +private: + cl_int err_; + const char * errStr_; +public: + /*! \brief Create a new CL error exception for a given error code + * and corresponding message. + * + * \param err error code value. + * + * \param errStr a descriptive string that must remain in scope until + * handling of the exception has concluded. If set, it + * will be returned by what(). + */ + Error(cl_int err, const char * errStr = NULL) : err_(err), errStr_(errStr) + {} + + ~Error() throw() {} + + /*! \brief Get error string associated with exception + * + * \return A memory pointer to the error message string. + */ + virtual const char * what() const throw () + { + if (errStr_ == NULL) { + return "empty"; + } + else { + return errStr_; + } + } + + /*! \brief Get error code associated with exception + * + * \return The error code. + */ + cl_int err(void) const { return err_; } +}; + +#define __ERR_STR(x) #x +#else +#define __ERR_STR(x) NULL +#endif // __CL_ENABLE_EXCEPTIONS + + +namespace detail +{ +#if defined(__CL_ENABLE_EXCEPTIONS) +static inline cl_int errHandler ( + cl_int err, + const char * errStr = NULL) +{ + if (err != CL_SUCCESS) { + throw Error(err, errStr); + } + return err; +} +#else +static inline cl_int errHandler (cl_int err, const char * errStr = NULL) +{ + (void) errStr; // suppress unused variable warning + return err; +} +#endif // __CL_ENABLE_EXCEPTIONS +} + + + +//! \cond DOXYGEN_DETAIL +#if !defined(__CL_USER_OVERRIDE_ERROR_STRINGS) +#define __GET_DEVICE_INFO_ERR __ERR_STR(clGetDeviceInfo) +#define __GET_PLATFORM_INFO_ERR __ERR_STR(clGetPlatformInfo) +#define __GET_DEVICE_IDS_ERR __ERR_STR(clGetDeviceIDs) +#define __GET_PLATFORM_IDS_ERR __ERR_STR(clGetPlatformIDs) +#define __GET_CONTEXT_INFO_ERR __ERR_STR(clGetContextInfo) +#define __GET_EVENT_INFO_ERR __ERR_STR(clGetEventInfo) +#define __GET_EVENT_PROFILE_INFO_ERR __ERR_STR(clGetEventProfileInfo) +#define __GET_MEM_OBJECT_INFO_ERR __ERR_STR(clGetMemObjectInfo) +#define __GET_IMAGE_INFO_ERR __ERR_STR(clGetImageInfo) +#define __GET_SAMPLER_INFO_ERR __ERR_STR(clGetSamplerInfo) +#define __GET_KERNEL_INFO_ERR __ERR_STR(clGetKernelInfo) +#if defined(CL_VERSION_1_2) +#define __GET_KERNEL_ARG_INFO_ERR __ERR_STR(clGetKernelArgInfo) +#endif // #if defined(CL_VERSION_1_2) +#define __GET_KERNEL_WORK_GROUP_INFO_ERR __ERR_STR(clGetKernelWorkGroupInfo) +#define __GET_PROGRAM_INFO_ERR __ERR_STR(clGetProgramInfo) +#define __GET_PROGRAM_BUILD_INFO_ERR __ERR_STR(clGetProgramBuildInfo) +#define __GET_COMMAND_QUEUE_INFO_ERR __ERR_STR(clGetCommandQueueInfo) + +#define __CREATE_CONTEXT_ERR __ERR_STR(clCreateContext) +#define __CREATE_CONTEXT_FROM_TYPE_ERR __ERR_STR(clCreateContextFromType) +#define __GET_SUPPORTED_IMAGE_FORMATS_ERR __ERR_STR(clGetSupportedImageFormats) + +#define __CREATE_BUFFER_ERR __ERR_STR(clCreateBuffer) +#define __COPY_ERR __ERR_STR(cl::copy) +#define __CREATE_SUBBUFFER_ERR __ERR_STR(clCreateSubBuffer) +#define __CREATE_GL_BUFFER_ERR __ERR_STR(clCreateFromGLBuffer) +#define __CREATE_GL_RENDER_BUFFER_ERR __ERR_STR(clCreateFromGLBuffer) +#define __GET_GL_OBJECT_INFO_ERR __ERR_STR(clGetGLObjectInfo) +#if defined(CL_VERSION_1_2) +#define __CREATE_IMAGE_ERR __ERR_STR(clCreateImage) +#define __CREATE_GL_TEXTURE_ERR __ERR_STR(clCreateFromGLTexture) +#define __IMAGE_DIMENSION_ERR __ERR_STR(Incorrect image dimensions) +#endif // #if defined(CL_VERSION_1_2) +#define __CREATE_SAMPLER_ERR __ERR_STR(clCreateSampler) +#define __SET_MEM_OBJECT_DESTRUCTOR_CALLBACK_ERR __ERR_STR(clSetMemObjectDestructorCallback) + +#define __CREATE_USER_EVENT_ERR __ERR_STR(clCreateUserEvent) +#define __SET_USER_EVENT_STATUS_ERR __ERR_STR(clSetUserEventStatus) +#define __SET_EVENT_CALLBACK_ERR __ERR_STR(clSetEventCallback) +#define __WAIT_FOR_EVENTS_ERR __ERR_STR(clWaitForEvents) + +#define __CREATE_KERNEL_ERR __ERR_STR(clCreateKernel) +#define __SET_KERNEL_ARGS_ERR __ERR_STR(clSetKernelArg) +#define __CREATE_PROGRAM_WITH_SOURCE_ERR __ERR_STR(clCreateProgramWithSource) +#define __CREATE_PROGRAM_WITH_BINARY_ERR __ERR_STR(clCreateProgramWithBinary) +#if defined(CL_VERSION_1_2) +#define __CREATE_PROGRAM_WITH_BUILT_IN_KERNELS_ERR __ERR_STR(clCreateProgramWithBuiltInKernels) +#endif // #if defined(CL_VERSION_1_2) +#define __BUILD_PROGRAM_ERR __ERR_STR(clBuildProgram) +#if defined(CL_VERSION_1_2) +#define __COMPILE_PROGRAM_ERR __ERR_STR(clCompileProgram) + +#endif // #if defined(CL_VERSION_1_2) +#define __CREATE_KERNELS_IN_PROGRAM_ERR __ERR_STR(clCreateKernelsInProgram) + +#define __CREATE_COMMAND_QUEUE_ERR __ERR_STR(clCreateCommandQueue) +#define __SET_COMMAND_QUEUE_PROPERTY_ERR __ERR_STR(clSetCommandQueueProperty) +#define __ENQUEUE_READ_BUFFER_ERR __ERR_STR(clEnqueueReadBuffer) +#define __ENQUEUE_READ_BUFFER_RECT_ERR __ERR_STR(clEnqueueReadBufferRect) +#define __ENQUEUE_WRITE_BUFFER_ERR __ERR_STR(clEnqueueWriteBuffer) +#define __ENQUEUE_WRITE_BUFFER_RECT_ERR __ERR_STR(clEnqueueWriteBufferRect) +#define __ENQUEUE_COPY_BUFFER_ERR __ERR_STR(clEnqueueCopyBuffer) +#define __ENQUEUE_COPY_BUFFER_RECT_ERR __ERR_STR(clEnqueueCopyBufferRect) +#define __ENQUEUE_FILL_BUFFER_ERR __ERR_STR(clEnqueueFillBuffer) +#define __ENQUEUE_READ_IMAGE_ERR __ERR_STR(clEnqueueReadImage) +#define __ENQUEUE_WRITE_IMAGE_ERR __ERR_STR(clEnqueueWriteImage) +#define __ENQUEUE_COPY_IMAGE_ERR __ERR_STR(clEnqueueCopyImage) +#define __ENQUEUE_FILL_IMAGE_ERR __ERR_STR(clEnqueueFillImage) +#define __ENQUEUE_COPY_IMAGE_TO_BUFFER_ERR __ERR_STR(clEnqueueCopyImageToBuffer) +#define __ENQUEUE_COPY_BUFFER_TO_IMAGE_ERR __ERR_STR(clEnqueueCopyBufferToImage) +#define __ENQUEUE_MAP_BUFFER_ERR __ERR_STR(clEnqueueMapBuffer) +#define __ENQUEUE_MAP_IMAGE_ERR __ERR_STR(clEnqueueMapImage) +#define __ENQUEUE_UNMAP_MEM_OBJECT_ERR __ERR_STR(clEnqueueUnMapMemObject) +#define __ENQUEUE_NDRANGE_KERNEL_ERR __ERR_STR(clEnqueueNDRangeKernel) +#define __ENQUEUE_TASK_ERR __ERR_STR(clEnqueueTask) +#define __ENQUEUE_NATIVE_KERNEL __ERR_STR(clEnqueueNativeKernel) +#if defined(CL_VERSION_1_2) +#define __ENQUEUE_MIGRATE_MEM_OBJECTS_ERR __ERR_STR(clEnqueueMigrateMemObjects) +#endif // #if defined(CL_VERSION_1_2) + +#define __ENQUEUE_ACQUIRE_GL_ERR __ERR_STR(clEnqueueAcquireGLObjects) +#define __ENQUEUE_RELEASE_GL_ERR __ERR_STR(clEnqueueReleaseGLObjects) + + +#define __RETAIN_ERR __ERR_STR(Retain Object) +#define __RELEASE_ERR __ERR_STR(Release Object) +#define __FLUSH_ERR __ERR_STR(clFlush) +#define __FINISH_ERR __ERR_STR(clFinish) +#define __VECTOR_CAPACITY_ERR __ERR_STR(Vector capacity error) + +/** + * CL 1.2 version that uses device fission. + */ +#if defined(CL_VERSION_1_2) +#define __CREATE_SUB_DEVICES __ERR_STR(clCreateSubDevices) +#else +#define __CREATE_SUB_DEVICES __ERR_STR(clCreateSubDevicesEXT) +#endif // #if defined(CL_VERSION_1_2) + +/** + * Deprecated APIs for 1.2 + */ +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) || (defined(CL_VERSION_1_1) && !defined(CL_VERSION_1_2)) +#define __ENQUEUE_MARKER_ERR __ERR_STR(clEnqueueMarker) +#define __ENQUEUE_WAIT_FOR_EVENTS_ERR __ERR_STR(clEnqueueWaitForEvents) +#define __ENQUEUE_BARRIER_ERR __ERR_STR(clEnqueueBarrier) +#define __UNLOAD_COMPILER_ERR __ERR_STR(clUnloadCompiler) +#define __CREATE_GL_TEXTURE_2D_ERR __ERR_STR(clCreateFromGLTexture2D) +#define __CREATE_GL_TEXTURE_3D_ERR __ERR_STR(clCreateFromGLTexture3D) +#define __CREATE_IMAGE2D_ERR __ERR_STR(clCreateImage2D) +#define __CREATE_IMAGE3D_ERR __ERR_STR(clCreateImage3D) +#endif // #if defined(CL_VERSION_1_1) + +#endif // __CL_USER_OVERRIDE_ERROR_STRINGS +//! \endcond + +/** + * CL 1.2 marker and barrier commands + */ +#if defined(CL_VERSION_1_2) +#define __ENQUEUE_MARKER_WAIT_LIST_ERR __ERR_STR(clEnqueueMarkerWithWaitList) +#define __ENQUEUE_BARRIER_WAIT_LIST_ERR __ERR_STR(clEnqueueBarrierWithWaitList) +#endif // #if defined(CL_VERSION_1_2) + +#if !defined(__USE_DEV_STRING) && !defined(__NO_STD_STRING) +typedef std::string STRING_CLASS; +#elif !defined(__USE_DEV_STRING) + +/*! \class string + * \brief Simple string class, that provides a limited subset of std::string + * functionality but avoids many of the issues that come with that class. + + * \note Deprecated. Please use std::string as default or + * re-define the string class to match the std::string + * interface by defining STRING_CLASS + */ +class CL_EXT_PREFIX__VERSION_1_1_DEPRECATED string CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED +{ +private: + ::size_t size_; + char * str_; +public: + //! \brief Constructs an empty string, allocating no memory. + string(void) : size_(0), str_(NULL) + { + } + + /*! \brief Constructs a string populated from an arbitrary value of + * specified size. + * + * An extra '\0' is added, in case none was contained in str. + * + * \param str the initial value of the string instance. Note that '\0' + * characters receive no special treatment. If NULL, + * the string is left empty, with a size of 0. + * + * \param size the number of characters to copy from str. + */ + string(const char * str, ::size_t size) : + size_(size), + str_(NULL) + { + if( size > 0 ) { + str_ = new char[size_+1]; + if (str_ != NULL) { + memcpy(str_, str, size_ * sizeof(char)); + str_[size_] = '\0'; + } + else { + size_ = 0; + } + } + } + + /*! \brief Constructs a string populated from a null-terminated value. + * + * \param str the null-terminated initial value of the string instance. + * If NULL, the string is left empty, with a size of 0. + */ + string(const char * str) : + size_(0), + str_(NULL) + { + if( str ) { + size_= ::strlen(str); + } + if( size_ > 0 ) { + str_ = new char[size_ + 1]; + if (str_ != NULL) { + memcpy(str_, str, (size_ + 1) * sizeof(char)); + } + } + } + + void resize( ::size_t n ) + { + if( size_ == n ) { + return; + } + if (n == 0) { + if( str_ ) { + delete [] str_; + } + str_ = NULL; + size_ = 0; + } + else { + char *newString = new char[n + 1]; + int copySize = n; + if( size_ < n ) { + copySize = size_; + } + size_ = n; + + if(str_) { + memcpy(newString, str_, (copySize + 1) * sizeof(char)); + } + if( copySize < size_ ) { + memset(newString + copySize, 0, size_ - copySize); + } + newString[size_] = '\0'; + + delete [] str_; + str_ = newString; + } + } + + const char& operator[] ( ::size_t pos ) const + { + return str_[pos]; + } + + char& operator[] ( ::size_t pos ) + { + return str_[pos]; + } + + /*! \brief Copies the value of another string to this one. + * + * \param rhs the string to copy. + * + * \returns a reference to the modified instance. + */ + string& operator=(const string& rhs) + { + if (this == &rhs) { + return *this; + } + + if( str_ != NULL ) { + delete [] str_; + str_ = NULL; + size_ = 0; + } + + if (rhs.size_ == 0 || rhs.str_ == NULL) { + str_ = NULL; + size_ = 0; + } + else { + str_ = new char[rhs.size_ + 1]; + size_ = rhs.size_; + + if (str_ != NULL) { + memcpy(str_, rhs.str_, (size_ + 1) * sizeof(char)); + } + else { + size_ = 0; + } + } + + return *this; + } + + /*! \brief Constructs a string by copying the value of another instance. + * + * \param rhs the string to copy. + */ + string(const string& rhs) : + size_(0), + str_(NULL) + { + *this = rhs; + } + + //! \brief Destructor - frees memory used to hold the current value. + ~string() + { + delete[] str_; + str_ = NULL; + } + + //! \brief Queries the length of the string, excluding any added '\0's. + ::size_t size(void) const { return size_; } + + //! \brief Queries the length of the string, excluding any added '\0's. + ::size_t length(void) const { return size(); } + + /*! \brief Returns a pointer to the private copy held by this instance, + * or "" if empty/unset. + */ + const char * c_str(void) const { return (str_) ? str_ : "";} +}; +typedef cl::string STRING_CLASS; +#endif // #elif !defined(__USE_DEV_STRING) + +#if !defined(__USE_DEV_VECTOR) && !defined(__NO_STD_VECTOR) +#define VECTOR_CLASS std::vector +#elif !defined(__USE_DEV_VECTOR) +#define VECTOR_CLASS cl::vector + +#if !defined(__MAX_DEFAULT_VECTOR_SIZE) +#define __MAX_DEFAULT_VECTOR_SIZE 10 +#endif + +/*! \class vector + * \brief Fixed sized vector implementation that mirroring + * + * \note Deprecated. Please use std::vector as default or + * re-define the vector class to match the std::vector + * interface by defining VECTOR_CLASS + + * \note Not recommended for use with custom objects as + * current implementation will construct N elements + * + * std::vector functionality. + * \brief Fixed sized vector compatible with std::vector. + * + * \note + * This differs from std::vector<> not just in memory allocation, + * but also in terms of when members are constructed, destroyed, + * and assigned instead of being copy constructed. + * + * \param T type of element contained in the vector. + * + * \param N maximum size of the vector. + */ +template +class CL_EXT_PREFIX__VERSION_1_1_DEPRECATED vector CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED +{ +private: + T data_[N]; + unsigned int size_; + +public: + //! \brief Constructs an empty vector with no memory allocated. + vector() : + size_(static_cast(0)) + {} + + //! \brief Deallocates the vector's memory and destroys all of its elements. + ~vector() + { + clear(); + } + + //! \brief Returns the number of elements currently contained. + unsigned int size(void) const + { + return size_; + } + + /*! \brief Empties the vector of all elements. + * \note + * This does not deallocate memory but will invoke destructors + * on contained elements. + */ + void clear() + { + while(!empty()) { + pop_back(); + } + } + + /*! \brief Appends an element after the last valid element. + * Calling this on a vector that has reached capacity will throw an + * exception if exceptions are enabled. + */ + void push_back (const T& x) + { + if (size() < N) { + new (&data_[size_]) T(x); + size_++; + } else { + detail::errHandler(CL_MEM_OBJECT_ALLOCATION_FAILURE, __VECTOR_CAPACITY_ERR); + } + } + + /*! \brief Removes the last valid element from the vector. + * Calling this on an empty vector will throw an exception + * if exceptions are enabled. + */ + void pop_back(void) + { + if (size_ != 0) { + --size_; + data_[size_].~T(); + } else { + detail::errHandler(CL_MEM_OBJECT_ALLOCATION_FAILURE, __VECTOR_CAPACITY_ERR); + } + } + + /*! \brief Constructs with a value copied from another. + * + * \param vec the vector to copy. + */ + vector(const vector& vec) : + size_(vec.size_) + { + if (size_ != 0) { + assign(vec.begin(), vec.end()); + } + } + + /*! \brief Constructs with a specified number of initial elements. + * + * \param size number of initial elements. + * + * \param val value of initial elements. + */ + vector(unsigned int size, const T& val = T()) : + size_(0) + { + for (unsigned int i = 0; i < size; i++) { + push_back(val); + } + } + + /*! \brief Overwrites the current content with that copied from another + * instance. + * + * \param rhs vector to copy. + * + * \returns a reference to this. + */ + vector& operator=(const vector& rhs) + { + if (this == &rhs) { + return *this; + } + + if (rhs.size_ != 0) { + assign(rhs.begin(), rhs.end()); + } else { + clear(); + } + + return *this; + } + + /*! \brief Tests equality against another instance. + * + * \param vec the vector against which to compare. + */ + bool operator==(vector &vec) + { + if (size() != vec.size()) { + return false; + } + + for( unsigned int i = 0; i < size(); ++i ) { + if( operator[](i) != vec[i] ) { + return false; + } + } + return true; + } + + //! \brief Conversion operator to T*. + operator T* () { return data_; } + + //! \brief Conversion operator to const T*. + operator const T* () const { return data_; } + + //! \brief Tests whether this instance has any elements. + bool empty (void) const + { + return size_==0; + } + + //! \brief Returns the maximum number of elements this instance can hold. + unsigned int max_size (void) const + { + return N; + } + + //! \brief Returns the maximum number of elements this instance can hold. + unsigned int capacity () const + { + return N; + } + + /*! \brief Returns a reference to a given element. + * + * \param index which element to access. * + * \note + * The caller is responsible for ensuring index is >= 0 and < size(). + */ + T& operator[](int index) + { + return data_[index]; + } + + /*! \brief Returns a const reference to a given element. + * + * \param index which element to access. + * + * \note + * The caller is responsible for ensuring index is >= 0 and < size(). + */ + const T& operator[](int index) const + { + return data_[index]; + } + + /*! \brief Assigns elements of the vector based on a source iterator range. + * + * \param start Beginning iterator of source range + * \param end Enditerator of source range + * + * \note + * Will throw an exception if exceptions are enabled and size exceeded. + */ + template + void assign(I start, I end) + { + clear(); + while(start != end) { + push_back(*start); + start++; + } + } + + /*! \class iterator + * \brief Const iterator class for vectors + */ + class iterator + { + private: + const vector *vec_; + int index_; + + /** + * Internal iterator constructor to capture reference + * to the vector it iterates over rather than taking + * the vector by copy. + */ + iterator (const vector &vec, int index) : + vec_(&vec) + { + if( !vec.empty() ) { + index_ = index; + } else { + index_ = -1; + } + } + + public: + iterator(void) : + index_(-1), + vec_(NULL) + { + } + + iterator(const iterator& rhs) : + vec_(rhs.vec_), + index_(rhs.index_) + { + } + + ~iterator(void) {} + + static iterator begin(const cl::vector &vec) + { + iterator i(vec, 0); + + return i; + } + + static iterator end(const cl::vector &vec) + { + iterator i(vec, vec.size()); + + return i; + } + + bool operator==(iterator i) + { + return ((vec_ == i.vec_) && + (index_ == i.index_)); + } + + bool operator!=(iterator i) + { + return (!(*this==i)); + } + + iterator& operator++() + { + ++index_; + return *this; + } + + iterator operator++(int) + { + iterator retVal(*this); + ++index_; + return retVal; + } + + iterator& operator--() + { + --index_; + return *this; + } + + iterator operator--(int) + { + iterator retVal(*this); + --index_; + return retVal; + } + + const T& operator *() const + { + return (*vec_)[index_]; + } + }; + + iterator begin(void) + { + return iterator::begin(*this); + } + + iterator begin(void) const + { + return iterator::begin(*this); + } + + iterator end(void) + { + return iterator::end(*this); + } + + iterator end(void) const + { + return iterator::end(*this); + } + + T& front(void) + { + return data_[0]; + } + + T& back(void) + { + return data_[size_]; + } + + const T& front(void) const + { + return data_[0]; + } + + const T& back(void) const + { + return data_[size_-1]; + } +}; +#endif // #if !defined(__USE_DEV_VECTOR) && !defined(__NO_STD_VECTOR) + + + + + +namespace detail { +#define __DEFAULT_NOT_INITIALIZED 1 +#define __DEFAULT_BEING_INITIALIZED 2 +#define __DEFAULT_INITIALIZED 4 + + /* + * Compare and exchange primitives are needed for handling of defaults + */ + inline int compare_exchange(volatile int * dest, int exchange, int comparand) + { +#ifdef _WIN32 + return (int)(InterlockedCompareExchange( + (volatile long*)dest, + (long)exchange, + (long)comparand)); +#elif defined(__APPLE__) || defined(__MACOSX) + return OSAtomicOr32Orig((uint32_t)exchange, (volatile uint32_t*)dest); +#else // !_WIN32 || defined(__APPLE__) || defined(__MACOSX) + return (__sync_val_compare_and_swap( + dest, + comparand, + exchange)); +#endif // !_WIN32 + } + + inline void fence() { +#ifdef _MSC_VER + _mm_mfence(); +#else + __sync_synchronize(); +#endif + } +} // namespace details + + +/*! \brief class used to interface between C++ and + * OpenCL C calls that require arrays of size_t values, whose + * size is known statically. + */ +template +class size_t +{ +private: + ::size_t data_[N]; + +public: + //! \brief Initialize size_t to all 0s + size_t() + { + for( int i = 0; i < N; ++i ) { + data_[i] = 0; + } + } + + ::size_t& operator[](int index) + { + return data_[index]; + } + + const ::size_t& operator[](int index) const + { + return data_[index]; + } + + //! \brief Conversion operator to T*. + operator ::size_t* () { return data_; } + + //! \brief Conversion operator to const T*. + operator const ::size_t* () const { return data_; } +}; + +namespace detail { + +// Generic getInfoHelper. The final parameter is used to guide overload +// resolution: the actual parameter passed is an int, which makes this +// a worse conversion sequence than a specialization that declares the +// parameter as an int. +template +inline cl_int getInfoHelper(Functor f, cl_uint name, T* param, long) +{ + return f(name, sizeof(T), param, NULL); +} + +// Specialized getInfoHelper for VECTOR_CLASS params +template +inline cl_int getInfoHelper(Func f, cl_uint name, VECTOR_CLASS* param, long) +{ + ::size_t required; + cl_int err = f(name, 0, NULL, &required); + if (err != CL_SUCCESS) { + return err; + } + + T* value = (T*) alloca(required); + err = f(name, required, value, NULL); + if (err != CL_SUCCESS) { + return err; + } + + param->assign(&value[0], &value[required/sizeof(T)]); + return CL_SUCCESS; +} + +/* Specialization for reference-counted types. This depends on the + * existence of Wrapper::cl_type, and none of the other types having the + * cl_type member. Note that simplify specifying the parameter as Wrapper + * does not work, because when using a derived type (e.g. Context) the generic + * template will provide a better match. + */ +template +inline cl_int getInfoHelper(Func f, cl_uint name, VECTOR_CLASS* param, int, typename T::cl_type = 0) +{ + ::size_t required; + cl_int err = f(name, 0, NULL, &required); + if (err != CL_SUCCESS) { + return err; + } + + typename T::cl_type * value = (typename T::cl_type *) alloca(required); + err = f(name, required, value, NULL); + if (err != CL_SUCCESS) { + return err; + } + + ::size_t elements = required / sizeof(typename T::cl_type); + param->assign(&value[0], &value[elements]); + for (::size_t i = 0; i < elements; i++) + { + if (value[i] != NULL) + { + err = (*param)[i].retain(); + if (err != CL_SUCCESS) { + return err; + } + } + } + return CL_SUCCESS; +} + +// Specialized for getInfo +template +inline cl_int getInfoHelper(Func f, cl_uint name, VECTOR_CLASS* param, int) +{ + cl_int err = f(name, param->size() * sizeof(char *), &(*param)[0], NULL); + + if (err != CL_SUCCESS) { + return err; + } + + return CL_SUCCESS; +} + +// Specialized GetInfoHelper for STRING_CLASS params +template +inline cl_int getInfoHelper(Func f, cl_uint name, STRING_CLASS* param, long) +{ + ::size_t required; + cl_int err = f(name, 0, NULL, &required); + if (err != CL_SUCCESS) { + return err; + } + + char* value = (char*) alloca(required); + err = f(name, required, value, NULL); + if (err != CL_SUCCESS) { + return err; + } + + *param = value; + return CL_SUCCESS; +} + +// Specialized GetInfoHelper for cl::size_t params +template +inline cl_int getInfoHelper(Func f, cl_uint name, size_t* param, long) +{ + ::size_t required; + cl_int err = f(name, 0, NULL, &required); + if (err != CL_SUCCESS) { + return err; + } + + ::size_t* value = (::size_t*) alloca(required); + err = f(name, required, value, NULL); + if (err != CL_SUCCESS) { + return err; + } + + for(int i = 0; i < N; ++i) { + (*param)[i] = value[i]; + } + + return CL_SUCCESS; +} + +template struct ReferenceHandler; + +/* Specialization for reference-counted types. This depends on the + * existence of Wrapper::cl_type, and none of the other types having the + * cl_type member. Note that simplify specifying the parameter as Wrapper + * does not work, because when using a derived type (e.g. Context) the generic + * template will provide a better match. + */ +template +inline cl_int getInfoHelper(Func f, cl_uint name, T* param, int, typename T::cl_type = 0) +{ + typename T::cl_type value; + cl_int err = f(name, sizeof(value), &value, NULL); + if (err != CL_SUCCESS) { + return err; + } + *param = value; + if (value != NULL) + { + err = param->retain(); + if (err != CL_SUCCESS) { + return err; + } + } + return CL_SUCCESS; +} + +#define __PARAM_NAME_INFO_1_0(F) \ + F(cl_platform_info, CL_PLATFORM_PROFILE, STRING_CLASS) \ + F(cl_platform_info, CL_PLATFORM_VERSION, STRING_CLASS) \ + F(cl_platform_info, CL_PLATFORM_NAME, STRING_CLASS) \ + F(cl_platform_info, CL_PLATFORM_VENDOR, STRING_CLASS) \ + F(cl_platform_info, CL_PLATFORM_EXTENSIONS, STRING_CLASS) \ + \ + F(cl_device_info, CL_DEVICE_TYPE, cl_device_type) \ + F(cl_device_info, CL_DEVICE_VENDOR_ID, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_COMPUTE_UNITS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_WORK_GROUP_SIZE, ::size_t) \ + F(cl_device_info, CL_DEVICE_MAX_WORK_ITEM_SIZES, VECTOR_CLASS< ::size_t>) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_CLOCK_FREQUENCY, cl_uint) \ + F(cl_device_info, CL_DEVICE_ADDRESS_BITS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_READ_IMAGE_ARGS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_WRITE_IMAGE_ARGS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_MEM_ALLOC_SIZE, cl_ulong) \ + F(cl_device_info, CL_DEVICE_IMAGE2D_MAX_WIDTH, ::size_t) \ + F(cl_device_info, CL_DEVICE_IMAGE2D_MAX_HEIGHT, ::size_t) \ + F(cl_device_info, CL_DEVICE_IMAGE3D_MAX_WIDTH, ::size_t) \ + F(cl_device_info, CL_DEVICE_IMAGE3D_MAX_HEIGHT, ::size_t) \ + F(cl_device_info, CL_DEVICE_IMAGE3D_MAX_DEPTH, ::size_t) \ + F(cl_device_info, CL_DEVICE_IMAGE_SUPPORT, cl_bool) \ + F(cl_device_info, CL_DEVICE_MAX_PARAMETER_SIZE, ::size_t) \ + F(cl_device_info, CL_DEVICE_MAX_SAMPLERS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MEM_BASE_ADDR_ALIGN, cl_uint) \ + F(cl_device_info, CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE, cl_uint) \ + F(cl_device_info, CL_DEVICE_SINGLE_FP_CONFIG, cl_device_fp_config) \ + F(cl_device_info, CL_DEVICE_GLOBAL_MEM_CACHE_TYPE, cl_device_mem_cache_type) \ + F(cl_device_info, CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE, cl_uint)\ + F(cl_device_info, CL_DEVICE_GLOBAL_MEM_CACHE_SIZE, cl_ulong) \ + F(cl_device_info, CL_DEVICE_GLOBAL_MEM_SIZE, cl_ulong) \ + F(cl_device_info, CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE, cl_ulong) \ + F(cl_device_info, CL_DEVICE_MAX_CONSTANT_ARGS, cl_uint) \ + F(cl_device_info, CL_DEVICE_LOCAL_MEM_TYPE, cl_device_local_mem_type) \ + F(cl_device_info, CL_DEVICE_LOCAL_MEM_SIZE, cl_ulong) \ + F(cl_device_info, CL_DEVICE_ERROR_CORRECTION_SUPPORT, cl_bool) \ + F(cl_device_info, CL_DEVICE_PROFILING_TIMER_RESOLUTION, ::size_t) \ + F(cl_device_info, CL_DEVICE_ENDIAN_LITTLE, cl_bool) \ + F(cl_device_info, CL_DEVICE_AVAILABLE, cl_bool) \ + F(cl_device_info, CL_DEVICE_COMPILER_AVAILABLE, cl_bool) \ + F(cl_device_info, CL_DEVICE_EXECUTION_CAPABILITIES, cl_device_exec_capabilities) \ + F(cl_device_info, CL_DEVICE_QUEUE_PROPERTIES, cl_command_queue_properties) \ + F(cl_device_info, CL_DEVICE_PLATFORM, cl_platform_id) \ + F(cl_device_info, CL_DEVICE_NAME, STRING_CLASS) \ + F(cl_device_info, CL_DEVICE_VENDOR, STRING_CLASS) \ + F(cl_device_info, CL_DRIVER_VERSION, STRING_CLASS) \ + F(cl_device_info, CL_DEVICE_PROFILE, STRING_CLASS) \ + F(cl_device_info, CL_DEVICE_VERSION, STRING_CLASS) \ + F(cl_device_info, CL_DEVICE_EXTENSIONS, STRING_CLASS) \ + \ + F(cl_context_info, CL_CONTEXT_REFERENCE_COUNT, cl_uint) \ + F(cl_context_info, CL_CONTEXT_DEVICES, VECTOR_CLASS) \ + F(cl_context_info, CL_CONTEXT_PROPERTIES, VECTOR_CLASS) \ + \ + F(cl_event_info, CL_EVENT_COMMAND_QUEUE, cl::CommandQueue) \ + F(cl_event_info, CL_EVENT_COMMAND_TYPE, cl_command_type) \ + F(cl_event_info, CL_EVENT_REFERENCE_COUNT, cl_uint) \ + F(cl_event_info, CL_EVENT_COMMAND_EXECUTION_STATUS, cl_uint) \ + \ + F(cl_profiling_info, CL_PROFILING_COMMAND_QUEUED, cl_ulong) \ + F(cl_profiling_info, CL_PROFILING_COMMAND_SUBMIT, cl_ulong) \ + F(cl_profiling_info, CL_PROFILING_COMMAND_START, cl_ulong) \ + F(cl_profiling_info, CL_PROFILING_COMMAND_END, cl_ulong) \ + \ + F(cl_mem_info, CL_MEM_TYPE, cl_mem_object_type) \ + F(cl_mem_info, CL_MEM_FLAGS, cl_mem_flags) \ + F(cl_mem_info, CL_MEM_SIZE, ::size_t) \ + F(cl_mem_info, CL_MEM_HOST_PTR, void*) \ + F(cl_mem_info, CL_MEM_MAP_COUNT, cl_uint) \ + F(cl_mem_info, CL_MEM_REFERENCE_COUNT, cl_uint) \ + F(cl_mem_info, CL_MEM_CONTEXT, cl::Context) \ + \ + F(cl_image_info, CL_IMAGE_FORMAT, cl_image_format) \ + F(cl_image_info, CL_IMAGE_ELEMENT_SIZE, ::size_t) \ + F(cl_image_info, CL_IMAGE_ROW_PITCH, ::size_t) \ + F(cl_image_info, CL_IMAGE_SLICE_PITCH, ::size_t) \ + F(cl_image_info, CL_IMAGE_WIDTH, ::size_t) \ + F(cl_image_info, CL_IMAGE_HEIGHT, ::size_t) \ + F(cl_image_info, CL_IMAGE_DEPTH, ::size_t) \ + \ + F(cl_sampler_info, CL_SAMPLER_REFERENCE_COUNT, cl_uint) \ + F(cl_sampler_info, CL_SAMPLER_CONTEXT, cl::Context) \ + F(cl_sampler_info, CL_SAMPLER_NORMALIZED_COORDS, cl_addressing_mode) \ + F(cl_sampler_info, CL_SAMPLER_ADDRESSING_MODE, cl_filter_mode) \ + F(cl_sampler_info, CL_SAMPLER_FILTER_MODE, cl_bool) \ + \ + F(cl_program_info, CL_PROGRAM_REFERENCE_COUNT, cl_uint) \ + F(cl_program_info, CL_PROGRAM_CONTEXT, cl::Context) \ + F(cl_program_info, CL_PROGRAM_NUM_DEVICES, cl_uint) \ + F(cl_program_info, CL_PROGRAM_DEVICES, VECTOR_CLASS) \ + F(cl_program_info, CL_PROGRAM_SOURCE, STRING_CLASS) \ + F(cl_program_info, CL_PROGRAM_BINARY_SIZES, VECTOR_CLASS< ::size_t>) \ + F(cl_program_info, CL_PROGRAM_BINARIES, VECTOR_CLASS) \ + \ + F(cl_program_build_info, CL_PROGRAM_BUILD_STATUS, cl_build_status) \ + F(cl_program_build_info, CL_PROGRAM_BUILD_OPTIONS, STRING_CLASS) \ + F(cl_program_build_info, CL_PROGRAM_BUILD_LOG, STRING_CLASS) \ + \ + F(cl_kernel_info, CL_KERNEL_FUNCTION_NAME, STRING_CLASS) \ + F(cl_kernel_info, CL_KERNEL_NUM_ARGS, cl_uint) \ + F(cl_kernel_info, CL_KERNEL_REFERENCE_COUNT, cl_uint) \ + F(cl_kernel_info, CL_KERNEL_CONTEXT, cl::Context) \ + F(cl_kernel_info, CL_KERNEL_PROGRAM, cl::Program) \ + \ + F(cl_kernel_work_group_info, CL_KERNEL_WORK_GROUP_SIZE, ::size_t) \ + F(cl_kernel_work_group_info, CL_KERNEL_COMPILE_WORK_GROUP_SIZE, cl::size_t<3>) \ + F(cl_kernel_work_group_info, CL_KERNEL_LOCAL_MEM_SIZE, cl_ulong) \ + \ + F(cl_command_queue_info, CL_QUEUE_CONTEXT, cl::Context) \ + F(cl_command_queue_info, CL_QUEUE_DEVICE, cl::Device) \ + F(cl_command_queue_info, CL_QUEUE_REFERENCE_COUNT, cl_uint) \ + F(cl_command_queue_info, CL_QUEUE_PROPERTIES, cl_command_queue_properties) + +#if defined(CL_VERSION_1_1) +#define __PARAM_NAME_INFO_1_1(F) \ + F(cl_context_info, CL_CONTEXT_NUM_DEVICES, cl_uint)\ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_HALF, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_CHAR, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_SHORT, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_INT, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_LONG, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_FLOAT, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_DOUBLE, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_HALF, cl_uint) \ + F(cl_device_info, CL_DEVICE_DOUBLE_FP_CONFIG, cl_device_fp_config) \ + F(cl_device_info, CL_DEVICE_HALF_FP_CONFIG, cl_device_fp_config) \ + F(cl_device_info, CL_DEVICE_HOST_UNIFIED_MEMORY, cl_bool) \ + F(cl_device_info, CL_DEVICE_OPENCL_C_VERSION, STRING_CLASS) \ + \ + F(cl_mem_info, CL_MEM_ASSOCIATED_MEMOBJECT, cl::Memory) \ + F(cl_mem_info, CL_MEM_OFFSET, ::size_t) \ + \ + F(cl_kernel_work_group_info, CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE, ::size_t) \ + F(cl_kernel_work_group_info, CL_KERNEL_PRIVATE_MEM_SIZE, cl_ulong) \ + \ + F(cl_event_info, CL_EVENT_CONTEXT, cl::Context) +#endif // CL_VERSION_1_1 + + +#if defined(CL_VERSION_1_2) +#define __PARAM_NAME_INFO_1_2(F) \ + F(cl_image_info, CL_IMAGE_BUFFER, cl::Buffer) \ + \ + F(cl_program_info, CL_PROGRAM_NUM_KERNELS, ::size_t) \ + F(cl_program_info, CL_PROGRAM_KERNEL_NAMES, STRING_CLASS) \ + \ + F(cl_program_build_info, CL_PROGRAM_BINARY_TYPE, cl_program_binary_type) \ + \ + F(cl_kernel_info, CL_KERNEL_ATTRIBUTES, STRING_CLASS) \ + \ + F(cl_kernel_arg_info, CL_KERNEL_ARG_ADDRESS_QUALIFIER, cl_kernel_arg_address_qualifier) \ + F(cl_kernel_arg_info, CL_KERNEL_ARG_ACCESS_QUALIFIER, cl_kernel_arg_access_qualifier) \ + F(cl_kernel_arg_info, CL_KERNEL_ARG_TYPE_NAME, STRING_CLASS) \ + F(cl_kernel_arg_info, CL_KERNEL_ARG_NAME, STRING_CLASS) \ + \ + F(cl_device_info, CL_DEVICE_PARENT_DEVICE, cl_device_id) \ + F(cl_device_info, CL_DEVICE_PARTITION_PROPERTIES, VECTOR_CLASS) \ + F(cl_device_info, CL_DEVICE_PARTITION_TYPE, VECTOR_CLASS) \ + F(cl_device_info, CL_DEVICE_REFERENCE_COUNT, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_INTEROP_USER_SYNC, ::size_t) \ + F(cl_device_info, CL_DEVICE_PARTITION_AFFINITY_DOMAIN, cl_device_affinity_domain) \ + F(cl_device_info, CL_DEVICE_BUILT_IN_KERNELS, STRING_CLASS) +#endif // #if defined(CL_VERSION_1_2) + +#if defined(USE_CL_DEVICE_FISSION) +#define __PARAM_NAME_DEVICE_FISSION(F) \ + F(cl_device_info, CL_DEVICE_PARENT_DEVICE_EXT, cl_device_id) \ + F(cl_device_info, CL_DEVICE_PARTITION_TYPES_EXT, VECTOR_CLASS) \ + F(cl_device_info, CL_DEVICE_AFFINITY_DOMAINS_EXT, VECTOR_CLASS) \ + F(cl_device_info, CL_DEVICE_REFERENCE_COUNT_EXT , cl_uint) \ + F(cl_device_info, CL_DEVICE_PARTITION_STYLE_EXT, VECTOR_CLASS) +#endif // USE_CL_DEVICE_FISSION + +template +struct param_traits {}; + +#define __CL_DECLARE_PARAM_TRAITS(token, param_name, T) \ +struct token; \ +template<> \ +struct param_traits \ +{ \ + enum { value = param_name }; \ + typedef T param_type; \ +}; + +__PARAM_NAME_INFO_1_0(__CL_DECLARE_PARAM_TRAITS) +#if defined(CL_VERSION_1_1) +__PARAM_NAME_INFO_1_1(__CL_DECLARE_PARAM_TRAITS) +#endif // CL_VERSION_1_1 +#if defined(CL_VERSION_1_2) +__PARAM_NAME_INFO_1_2(__CL_DECLARE_PARAM_TRAITS) +#endif // CL_VERSION_1_1 + +#if defined(USE_CL_DEVICE_FISSION) +__PARAM_NAME_DEVICE_FISSION(__CL_DECLARE_PARAM_TRAITS); +#endif // USE_CL_DEVICE_FISSION + +#ifdef CL_PLATFORM_ICD_SUFFIX_KHR +__CL_DECLARE_PARAM_TRAITS(cl_platform_info, CL_PLATFORM_ICD_SUFFIX_KHR, STRING_CLASS) +#endif + +#ifdef CL_DEVICE_PROFILING_TIMER_OFFSET_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_PROFILING_TIMER_OFFSET_AMD, cl_ulong) +#endif + +#ifdef CL_DEVICE_GLOBAL_FREE_MEMORY_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_GLOBAL_FREE_MEMORY_AMD, VECTOR_CLASS< ::size_t>) +#endif +#ifdef CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_SIMD_WIDTH_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_SIMD_WIDTH_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_WAVEFRONT_WIDTH_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_WAVEFRONT_WIDTH_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_LOCAL_MEM_BANKS_AMD +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_LOCAL_MEM_BANKS_AMD, cl_uint) +#endif + +#ifdef CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV, cl_uint) +#endif +#ifdef CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV, cl_uint) +#endif +#ifdef CL_DEVICE_REGISTERS_PER_BLOCK_NV +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_REGISTERS_PER_BLOCK_NV, cl_uint) +#endif +#ifdef CL_DEVICE_WARP_SIZE_NV +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_WARP_SIZE_NV, cl_uint) +#endif +#ifdef CL_DEVICE_GPU_OVERLAP_NV +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_GPU_OVERLAP_NV, cl_bool) +#endif +#ifdef CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV, cl_bool) +#endif +#ifdef CL_DEVICE_INTEGRATED_MEMORY_NV +__CL_DECLARE_PARAM_TRAITS(cl_device_info, CL_DEVICE_INTEGRATED_MEMORY_NV, cl_bool) +#endif + +// Convenience functions + +template +inline cl_int +getInfo(Func f, cl_uint name, T* param) +{ + return getInfoHelper(f, name, param, 0); +} + +template +struct GetInfoFunctor0 +{ + Func f_; const Arg0& arg0_; + cl_int operator ()( + cl_uint param, ::size_t size, void* value, ::size_t* size_ret) + { return f_(arg0_, param, size, value, size_ret); } +}; + +template +struct GetInfoFunctor1 +{ + Func f_; const Arg0& arg0_; const Arg1& arg1_; + cl_int operator ()( + cl_uint param, ::size_t size, void* value, ::size_t* size_ret) + { return f_(arg0_, arg1_, param, size, value, size_ret); } +}; + +template +inline cl_int +getInfo(Func f, const Arg0& arg0, cl_uint name, T* param) +{ + GetInfoFunctor0 f0 = { f, arg0 }; + return getInfoHelper(f0, name, param, 0); +} + +template +inline cl_int +getInfo(Func f, const Arg0& arg0, const Arg1& arg1, cl_uint name, T* param) +{ + GetInfoFunctor1 f0 = { f, arg0, arg1 }; + return getInfoHelper(f0, name, param, 0); +} + +template +struct ReferenceHandler +{ }; + +#if defined(CL_VERSION_1_2) +/** + * OpenCL 1.2 devices do have retain/release. + */ +template <> +struct ReferenceHandler +{ + /** + * Retain the device. + * \param device A valid device created using createSubDevices + * \return + * CL_SUCCESS if the function executed successfully. + * CL_INVALID_DEVICE if device was not a valid subdevice + * CL_OUT_OF_RESOURCES + * CL_OUT_OF_HOST_MEMORY + */ + static cl_int retain(cl_device_id device) + { return ::clRetainDevice(device); } + /** + * Retain the device. + * \param device A valid device created using createSubDevices + * \return + * CL_SUCCESS if the function executed successfully. + * CL_INVALID_DEVICE if device was not a valid subdevice + * CL_OUT_OF_RESOURCES + * CL_OUT_OF_HOST_MEMORY + */ + static cl_int release(cl_device_id device) + { return ::clReleaseDevice(device); } +}; +#else // #if defined(CL_VERSION_1_2) +/** + * OpenCL 1.1 devices do not have retain/release. + */ +template <> +struct ReferenceHandler +{ + // cl_device_id does not have retain(). + static cl_int retain(cl_device_id) + { return CL_SUCCESS; } + // cl_device_id does not have release(). + static cl_int release(cl_device_id) + { return CL_SUCCESS; } +}; +#endif // #if defined(CL_VERSION_1_2) + +template <> +struct ReferenceHandler +{ + // cl_platform_id does not have retain(). + static cl_int retain(cl_platform_id) + { return CL_SUCCESS; } + // cl_platform_id does not have release(). + static cl_int release(cl_platform_id) + { return CL_SUCCESS; } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_context context) + { return ::clRetainContext(context); } + static cl_int release(cl_context context) + { return ::clReleaseContext(context); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_command_queue queue) + { return ::clRetainCommandQueue(queue); } + static cl_int release(cl_command_queue queue) + { return ::clReleaseCommandQueue(queue); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_mem memory) + { return ::clRetainMemObject(memory); } + static cl_int release(cl_mem memory) + { return ::clReleaseMemObject(memory); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_sampler sampler) + { return ::clRetainSampler(sampler); } + static cl_int release(cl_sampler sampler) + { return ::clReleaseSampler(sampler); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_program program) + { return ::clRetainProgram(program); } + static cl_int release(cl_program program) + { return ::clReleaseProgram(program); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_kernel kernel) + { return ::clRetainKernel(kernel); } + static cl_int release(cl_kernel kernel) + { return ::clReleaseKernel(kernel); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_event event) + { return ::clRetainEvent(event); } + static cl_int release(cl_event event) + { return ::clReleaseEvent(event); } +}; + + +// Extracts version number with major in the upper 16 bits, minor in the lower 16 +static cl_uint getVersion(const char *versionInfo) +{ + int highVersion = 0; + int lowVersion = 0; + int index = 7; + while(versionInfo[index] != '.' ) { + highVersion *= 10; + highVersion += versionInfo[index]-'0'; + ++index; + } + ++index; + while(versionInfo[index] != ' ' ) { + lowVersion *= 10; + lowVersion += versionInfo[index]-'0'; + ++index; + } + return (highVersion << 16) | lowVersion; +} + +static cl_uint getPlatformVersion(cl_platform_id platform) +{ + ::size_t size = 0; + clGetPlatformInfo(platform, CL_PLATFORM_VERSION, 0, NULL, &size); + char *versionInfo = (char *) alloca(size); + clGetPlatformInfo(platform, CL_PLATFORM_VERSION, size, &versionInfo[0], &size); + return getVersion(versionInfo); +} + +static cl_uint getDevicePlatformVersion(cl_device_id device) +{ + cl_platform_id platform; + clGetDeviceInfo(device, CL_DEVICE_PLATFORM, sizeof(platform), &platform, NULL); + return getPlatformVersion(platform); +} + +#if defined(CL_VERSION_1_2) && defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) +static cl_uint getContextPlatformVersion(cl_context context) +{ + // The platform cannot be queried directly, so we first have to grab a + // device and obtain its context + ::size_t size = 0; + clGetContextInfo(context, CL_CONTEXT_DEVICES, 0, NULL, &size); + if (size == 0) + return 0; + cl_device_id *devices = (cl_device_id *) alloca(size); + clGetContextInfo(context, CL_CONTEXT_DEVICES, size, devices, NULL); + return getDevicePlatformVersion(devices[0]); +} +#endif // #if defined(CL_VERSION_1_2) && defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + +template +class Wrapper +{ +public: + typedef T cl_type; + +protected: + cl_type object_; + +public: + Wrapper() : object_(NULL) { } + + Wrapper(const cl_type &obj) : object_(obj) { } + + ~Wrapper() + { + if (object_ != NULL) { release(); } + } + + Wrapper(const Wrapper& rhs) + { + object_ = rhs.object_; + if (object_ != NULL) { detail::errHandler(retain(), __RETAIN_ERR); } + } + + Wrapper& operator = (const Wrapper& rhs) + { + if (object_ != NULL) { detail::errHandler(release(), __RELEASE_ERR); } + object_ = rhs.object_; + if (object_ != NULL) { detail::errHandler(retain(), __RETAIN_ERR); } + return *this; + } + + Wrapper& operator = (const cl_type &rhs) + { + if (object_ != NULL) { detail::errHandler(release(), __RELEASE_ERR); } + object_ = rhs; + return *this; + } + + cl_type operator ()() const { return object_; } + + cl_type& operator ()() { return object_; } + +protected: + template + friend inline cl_int getInfoHelper(Func, cl_uint, U*, int, typename U::cl_type); + + cl_int retain() const + { + return ReferenceHandler::retain(object_); + } + + cl_int release() const + { + return ReferenceHandler::release(object_); + } +}; + +template <> +class Wrapper +{ +public: + typedef cl_device_id cl_type; + +protected: + cl_type object_; + bool referenceCountable_; + + static bool isReferenceCountable(cl_device_id device) + { + bool retVal = false; + if (device != NULL) { + int version = getDevicePlatformVersion(device); + if(version > ((1 << 16) + 1)) { + retVal = true; + } + } + return retVal; + } + +public: + Wrapper() : object_(NULL), referenceCountable_(false) + { + } + + Wrapper(const cl_type &obj) : object_(obj), referenceCountable_(false) + { + referenceCountable_ = isReferenceCountable(obj); + } + + ~Wrapper() + { + if (object_ != NULL) { release(); } + } + + Wrapper(const Wrapper& rhs) + { + object_ = rhs.object_; + referenceCountable_ = isReferenceCountable(object_); + if (object_ != NULL) { detail::errHandler(retain(), __RETAIN_ERR); } + } + + Wrapper& operator = (const Wrapper& rhs) + { + if (object_ != NULL) { detail::errHandler(release(), __RELEASE_ERR); } + object_ = rhs.object_; + referenceCountable_ = rhs.referenceCountable_; + if (object_ != NULL) { detail::errHandler(retain(), __RETAIN_ERR); } + return *this; + } + + Wrapper& operator = (const cl_type &rhs) + { + if (object_ != NULL) { detail::errHandler(release(), __RELEASE_ERR); } + object_ = rhs; + referenceCountable_ = isReferenceCountable(object_); + return *this; + } + + cl_type operator ()() const { return object_; } + + cl_type& operator ()() { return object_; } + +protected: + template + friend inline cl_int getInfoHelper(Func, cl_uint, U*, int, typename U::cl_type); + + template + friend inline cl_int getInfoHelper(Func, cl_uint, VECTOR_CLASS*, int, typename U::cl_type); + + cl_int retain() const + { + if( referenceCountable_ ) { + return ReferenceHandler::retain(object_); + } + else { + return CL_SUCCESS; + } + } + + cl_int release() const + { + if( referenceCountable_ ) { + return ReferenceHandler::release(object_); + } + else { + return CL_SUCCESS; + } + } +}; + +} // namespace detail +//! \endcond + +/*! \stuct ImageFormat + * \brief Adds constructors and member functions for cl_image_format. + * + * \see cl_image_format + */ +struct ImageFormat : public cl_image_format +{ + //! \brief Default constructor - performs no initialization. + ImageFormat(){} + + //! \brief Initializing constructor. + ImageFormat(cl_channel_order order, cl_channel_type type) + { + image_channel_order = order; + image_channel_data_type = type; + } + + //! \brief Assignment operator. + ImageFormat& operator = (const ImageFormat& rhs) + { + if (this != &rhs) { + this->image_channel_data_type = rhs.image_channel_data_type; + this->image_channel_order = rhs.image_channel_order; + } + return *this; + } +}; + +/*! \brief Class interface for cl_device_id. + * + * \note Copies of these objects are inexpensive, since they don't 'own' + * any underlying resources or data structures. + * + * \see cl_device_id + */ +class Device : public detail::Wrapper +{ +public: + //! \brief Default constructor - initializes to NULL. + Device() : detail::Wrapper() { } + + /*! \brief Copy constructor. + * + * This simply copies the device ID value, which is an inexpensive operation. + */ + Device(const Device& device) : detail::Wrapper(device) { } + + /*! \brief Constructor from cl_device_id. + * + * This simply copies the device ID value, which is an inexpensive operation. + */ + Device(const cl_device_id &device) : detail::Wrapper(device) { } + + /*! \brief Returns the first device on the default context. + * + * \see Context::getDefault() + */ + static Device getDefault(cl_int * err = NULL); + + /*! \brief Assignment operator from Device. + * + * This simply copies the device ID value, which is an inexpensive operation. + */ + Device& operator = (const Device& rhs) + { + if (this != &rhs) { + detail::Wrapper::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment operator from cl_device_id. + * + * This simply copies the device ID value, which is an inexpensive operation. + */ + Device& operator = (const cl_device_id& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + //! \brief Wrapper for clGetDeviceInfo(). + template + cl_int getInfo(cl_device_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetDeviceInfo, object_, name, param), + __GET_DEVICE_INFO_ERR); + } + + //! \brief Wrapper for clGetDeviceInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_device_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + /** + * CL 1.2 version + */ +#if defined(CL_VERSION_1_2) + //! \brief Wrapper for clCreateSubDevicesEXT(). + cl_int createSubDevices( + const cl_device_partition_property * properties, + VECTOR_CLASS* devices) + { + cl_uint n = 0; + cl_int err = clCreateSubDevices(object_, properties, 0, NULL, &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_SUB_DEVICES); + } + + cl_device_id* ids = (cl_device_id*) alloca(n * sizeof(cl_device_id)); + err = clCreateSubDevices(object_, properties, n, ids, NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_SUB_DEVICES); + } + + devices->assign(&ids[0], &ids[n]); + return CL_SUCCESS; + } +#endif // #if defined(CL_VERSION_1_2) + +/** + * CL 1.1 version that uses device fission. + */ +#if defined(CL_VERSION_1_1) +#if defined(USE_CL_DEVICE_FISSION) + cl_int createSubDevices( + const cl_device_partition_property_ext * properties, + VECTOR_CLASS* devices) + { + typedef CL_API_ENTRY cl_int + ( CL_API_CALL * PFN_clCreateSubDevicesEXT)( + cl_device_id /*in_device*/, + const cl_device_partition_property_ext * /* properties */, + cl_uint /*num_entries*/, + cl_device_id * /*out_devices*/, + cl_uint * /*num_devices*/ ) CL_EXT_SUFFIX__VERSION_1_1; + + static PFN_clCreateSubDevicesEXT pfn_clCreateSubDevicesEXT = NULL; + __INIT_CL_EXT_FCN_PTR(clCreateSubDevicesEXT); + + cl_uint n = 0; + cl_int err = pfn_clCreateSubDevicesEXT(object_, properties, 0, NULL, &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_SUB_DEVICES); + } + + cl_device_id* ids = (cl_device_id*) alloca(n * sizeof(cl_device_id)); + err = pfn_clCreateSubDevicesEXT(object_, properties, n, ids, NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_SUB_DEVICES); + } + + devices->assign(&ids[0], &ids[n]); + return CL_SUCCESS; + } +#endif // #if defined(USE_CL_DEVICE_FISSION) +#endif // #if defined(CL_VERSION_1_1) +}; + +/*! \brief Class interface for cl_platform_id. + * + * \note Copies of these objects are inexpensive, since they don't 'own' + * any underlying resources or data structures. + * + * \see cl_platform_id + */ +class Platform : public detail::Wrapper +{ +public: + //! \brief Default constructor - initializes to NULL. + Platform() : detail::Wrapper() { } + + /*! \brief Copy constructor. + * + * This simply copies the platform ID value, which is an inexpensive operation. + */ + Platform(const Platform& platform) : detail::Wrapper(platform) { } + + /*! \brief Constructor from cl_platform_id. + * + * This simply copies the platform ID value, which is an inexpensive operation. + */ + Platform(const cl_platform_id &platform) : detail::Wrapper(platform) { } + + /*! \brief Assignment operator from Platform. + * + * This simply copies the platform ID value, which is an inexpensive operation. + */ + Platform& operator = (const Platform& rhs) + { + if (this != &rhs) { + detail::Wrapper::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment operator from cl_platform_id. + * + * This simply copies the platform ID value, which is an inexpensive operation. + */ + Platform& operator = (const cl_platform_id& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + //! \brief Wrapper for clGetPlatformInfo(). + cl_int getInfo(cl_platform_info name, STRING_CLASS* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetPlatformInfo, object_, name, param), + __GET_PLATFORM_INFO_ERR); + } + + //! \brief Wrapper for clGetPlatformInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_platform_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + /*! \brief Gets a list of devices for this platform. + * + * Wraps clGetDeviceIDs(). + */ + cl_int getDevices( + cl_device_type type, + VECTOR_CLASS* devices) const + { + cl_uint n = 0; + if( devices == NULL ) { + return detail::errHandler(CL_INVALID_ARG_VALUE, __GET_DEVICE_IDS_ERR); + } + cl_int err = ::clGetDeviceIDs(object_, type, 0, NULL, &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_DEVICE_IDS_ERR); + } + + cl_device_id* ids = (cl_device_id*) alloca(n * sizeof(cl_device_id)); + err = ::clGetDeviceIDs(object_, type, n, ids, NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_DEVICE_IDS_ERR); + } + + devices->assign(&ids[0], &ids[n]); + return CL_SUCCESS; + } + +#if defined(USE_DX_INTEROP) + /*! \brief Get the list of available D3D10 devices. + * + * \param d3d_device_source. + * + * \param d3d_object. + * + * \param d3d_device_set. + * + * \param devices returns a vector of OpenCL D3D10 devices found. The cl::Device + * values returned in devices can be used to identify a specific OpenCL + * device. If \a devices argument is NULL, this argument is ignored. + * + * \return One of the following values: + * - CL_SUCCESS if the function is executed successfully. + * + * The application can query specific capabilities of the OpenCL device(s) + * returned by cl::getDevices. This can be used by the application to + * determine which device(s) to use. + * + * \note In the case that exceptions are enabled and a return value + * other than CL_SUCCESS is generated, then cl::Error exception is + * generated. + */ + cl_int getDevices( + cl_d3d10_device_source_khr d3d_device_source, + void * d3d_object, + cl_d3d10_device_set_khr d3d_device_set, + VECTOR_CLASS* devices) const + { + typedef CL_API_ENTRY cl_int (CL_API_CALL *PFN_clGetDeviceIDsFromD3D10KHR)( + cl_platform_id platform, + cl_d3d10_device_source_khr d3d_device_source, + void * d3d_object, + cl_d3d10_device_set_khr d3d_device_set, + cl_uint num_entries, + cl_device_id * devices, + cl_uint* num_devices); + + if( devices == NULL ) { + return detail::errHandler(CL_INVALID_ARG_VALUE, __GET_DEVICE_IDS_ERR); + } + + static PFN_clGetDeviceIDsFromD3D10KHR pfn_clGetDeviceIDsFromD3D10KHR = NULL; + __INIT_CL_EXT_FCN_PTR_PLATFORM(object_, clGetDeviceIDsFromD3D10KHR); + + cl_uint n = 0; + cl_int err = pfn_clGetDeviceIDsFromD3D10KHR( + object_, + d3d_device_source, + d3d_object, + d3d_device_set, + 0, + NULL, + &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_DEVICE_IDS_ERR); + } + + cl_device_id* ids = (cl_device_id*) alloca(n * sizeof(cl_device_id)); + err = pfn_clGetDeviceIDsFromD3D10KHR( + object_, + d3d_device_source, + d3d_object, + d3d_device_set, + n, + ids, + NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_DEVICE_IDS_ERR); + } + + devices->assign(&ids[0], &ids[n]); + return CL_SUCCESS; + } +#endif + + /*! \brief Gets a list of available platforms. + * + * Wraps clGetPlatformIDs(). + */ + static cl_int get( + VECTOR_CLASS* platforms) + { + cl_uint n = 0; + + if( platforms == NULL ) { + return detail::errHandler(CL_INVALID_ARG_VALUE, __GET_PLATFORM_IDS_ERR); + } + + cl_int err = ::clGetPlatformIDs(0, NULL, &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_PLATFORM_IDS_ERR); + } + + cl_platform_id* ids = (cl_platform_id*) alloca( + n * sizeof(cl_platform_id)); + err = ::clGetPlatformIDs(n, ids, NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_PLATFORM_IDS_ERR); + } + + platforms->assign(&ids[0], &ids[n]); + return CL_SUCCESS; + } + + /*! \brief Gets the first available platform. + * + * Wraps clGetPlatformIDs(), returning the first result. + */ + static cl_int get( + Platform * platform) + { + cl_uint n = 0; + + if( platform == NULL ) { + return detail::errHandler(CL_INVALID_ARG_VALUE, __GET_PLATFORM_IDS_ERR); + } + + cl_int err = ::clGetPlatformIDs(0, NULL, &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_PLATFORM_IDS_ERR); + } + + cl_platform_id* ids = (cl_platform_id*) alloca( + n * sizeof(cl_platform_id)); + err = ::clGetPlatformIDs(n, ids, NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_PLATFORM_IDS_ERR); + } + + *platform = ids[0]; + return CL_SUCCESS; + } + + /*! \brief Gets the first available platform, returning it by value. + * + * Wraps clGetPlatformIDs(), returning the first result. + */ + static Platform get( + cl_int * errResult = NULL) + { + Platform platform; + cl_uint n = 0; + cl_int err = ::clGetPlatformIDs(0, NULL, &n); + if (err != CL_SUCCESS) { + detail::errHandler(err, __GET_PLATFORM_IDS_ERR); + if (errResult != NULL) { + *errResult = err; + } + } + + cl_platform_id* ids = (cl_platform_id*) alloca( + n * sizeof(cl_platform_id)); + err = ::clGetPlatformIDs(n, ids, NULL); + + if (err != CL_SUCCESS) { + detail::errHandler(err, __GET_PLATFORM_IDS_ERR); + } + + if (errResult != NULL) { + *errResult = err; + } + + return ids[0]; + } + + static Platform getDefault( + cl_int *errResult = NULL ) + { + return get(errResult); + } + + +#if defined(CL_VERSION_1_2) + //! \brief Wrapper for clUnloadCompiler(). + cl_int + unloadCompiler() + { + return ::clUnloadPlatformCompiler(object_); + } +#endif // #if defined(CL_VERSION_1_2) +}; // class Platform + +/** + * Deprecated APIs for 1.2 + */ +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) || (defined(CL_VERSION_1_1) && !defined(CL_VERSION_1_2)) +/** + * Unload the OpenCL compiler. + * \note Deprecated for OpenCL 1.2. Use Platform::unloadCompiler instead. + */ +inline CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_int +UnloadCompiler() CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; +inline cl_int +UnloadCompiler() +{ + return ::clUnloadCompiler(); +} +#endif // #if defined(CL_VERSION_1_1) + +/*! \brief Class interface for cl_context. + * + * \note Copies of these objects are shallow, meaning that the copy will refer + * to the same underlying cl_context as the original. For details, see + * clRetainContext() and clReleaseContext(). + * + * \see cl_context + */ +class Context + : public detail::Wrapper +{ +private: + static volatile int default_initialized_; + static Context default_; + static volatile cl_int default_error_; +public: + /*! \brief Destructor. + * + * This calls clReleaseContext() on the value held by this instance. + */ + ~Context() { } + + /*! \brief Constructs a context including a list of specified devices. + * + * Wraps clCreateContext(). + */ + Context( + const VECTOR_CLASS& devices, + cl_context_properties* properties = NULL, + void (CL_CALLBACK * notifyFptr)( + const char *, + const void *, + ::size_t, + void *) = NULL, + void* data = NULL, + cl_int* err = NULL) + { + cl_int error; + + ::size_t numDevices = devices.size(); + cl_device_id* deviceIDs = (cl_device_id*) alloca(numDevices * sizeof(cl_device_id)); + for( ::size_t deviceIndex = 0; deviceIndex < numDevices; ++deviceIndex ) { + deviceIDs[deviceIndex] = (devices[deviceIndex])(); + } + + object_ = ::clCreateContext( + properties, (cl_uint) numDevices, + deviceIDs, + notifyFptr, data, &error); + + detail::errHandler(error, __CREATE_CONTEXT_ERR); + if (err != NULL) { + *err = error; + } + } + + Context( + const Device& device, + cl_context_properties* properties = NULL, + void (CL_CALLBACK * notifyFptr)( + const char *, + const void *, + ::size_t, + void *) = NULL, + void* data = NULL, + cl_int* err = NULL) + { + cl_int error; + + cl_device_id deviceID = device(); + + object_ = ::clCreateContext( + properties, 1, + &deviceID, + notifyFptr, data, &error); + + detail::errHandler(error, __CREATE_CONTEXT_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! \brief Constructs a context including all or a subset of devices of a specified type. + * + * Wraps clCreateContextFromType(). + */ + Context( + cl_device_type type, + cl_context_properties* properties = NULL, + void (CL_CALLBACK * notifyFptr)( + const char *, + const void *, + ::size_t, + void *) = NULL, + void* data = NULL, + cl_int* err = NULL) + { + cl_int error; + +#if !defined(__APPLE__) || !defined(__MACOS) + cl_context_properties prop[4] = {CL_CONTEXT_PLATFORM, 0, 0, 0 }; + + if (properties == NULL) { + // Get a valid platform ID as we cannot send in a blank one + VECTOR_CLASS platforms; + error = Platform::get(&platforms); + if (error != CL_SUCCESS) { + detail::errHandler(error, __CREATE_CONTEXT_FROM_TYPE_ERR); + if (err != NULL) { + *err = error; + } + return; + } + + // Check the platforms we found for a device of our specified type + cl_context_properties platform_id = 0; + for (unsigned int i = 0; i < platforms.size(); i++) { + + VECTOR_CLASS devices; + +#if defined(__CL_ENABLE_EXCEPTIONS) + try { +#endif + + error = platforms[i].getDevices(type, &devices); + +#if defined(__CL_ENABLE_EXCEPTIONS) + } catch (Error) {} + // Catch if exceptions are enabled as we don't want to exit if first platform has no devices of type + // We do error checking next anyway, and can throw there if needed +#endif + + // Only squash CL_SUCCESS and CL_DEVICE_NOT_FOUND + if (error != CL_SUCCESS && error != CL_DEVICE_NOT_FOUND) { + detail::errHandler(error, __CREATE_CONTEXT_FROM_TYPE_ERR); + if (err != NULL) { + *err = error; + } + } + + if (devices.size() > 0) { + platform_id = (cl_context_properties)platforms[i](); + break; + } + } + + if (platform_id == 0) { + detail::errHandler(CL_DEVICE_NOT_FOUND, __CREATE_CONTEXT_FROM_TYPE_ERR); + if (err != NULL) { + *err = CL_DEVICE_NOT_FOUND; + } + return; + } + + prop[1] = platform_id; + properties = &prop[0]; + } +#endif + object_ = ::clCreateContextFromType( + properties, type, notifyFptr, data, &error); + + detail::errHandler(error, __CREATE_CONTEXT_FROM_TYPE_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! \brief Returns a singleton context including all devices of CL_DEVICE_TYPE_DEFAULT. + * + * \note All calls to this function return the same cl_context as the first. + */ + static Context getDefault(cl_int * err = NULL) + { + int state = detail::compare_exchange( + &default_initialized_, + __DEFAULT_BEING_INITIALIZED, __DEFAULT_NOT_INITIALIZED); + + if (state & __DEFAULT_INITIALIZED) { + if (err != NULL) { + *err = default_error_; + } + return default_; + } + + if (state & __DEFAULT_BEING_INITIALIZED) { + // Assume writes will propagate eventually... + while(default_initialized_ != __DEFAULT_INITIALIZED) { + detail::fence(); + } + + if (err != NULL) { + *err = default_error_; + } + return default_; + } + + cl_int error; + default_ = Context( + CL_DEVICE_TYPE_DEFAULT, + NULL, + NULL, + NULL, + &error); + + detail::fence(); + + default_error_ = error; + // Assume writes will propagate eventually... + default_initialized_ = __DEFAULT_INITIALIZED; + + detail::fence(); + + if (err != NULL) { + *err = default_error_; + } + return default_; + + } + + //! \brief Default constructor - initializes to NULL. + Context() : detail::Wrapper() { } + + /*! \brief Copy constructor. + * + * This calls clRetainContext() on the parameter's cl_context. + */ + Context(const Context& context) : detail::Wrapper(context) { } + + /*! \brief Constructor from cl_context - takes ownership. + * + * This effectively transfers ownership of a refcount on the cl_context + * into the new Context object. + */ + __CL_EXPLICIT_CONSTRUCTORS Context(const cl_context& context) : detail::Wrapper(context) { } + + /*! \brief Assignment operator from Context. + * + * This calls clRetainContext() on the parameter and clReleaseContext() on + * the previous value held by this instance. + */ + Context& operator = (const Context& rhs) + { + if (this != &rhs) { + detail::Wrapper::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment operator from cl_context - takes ownership. + * + * This effectively transfers ownership of a refcount on the rhs and calls + * clReleaseContext() on the value previously held by this instance. + */ + Context& operator = (const cl_context& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + //! \brief Wrapper for clGetContextInfo(). + template + cl_int getInfo(cl_context_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetContextInfo, object_, name, param), + __GET_CONTEXT_INFO_ERR); + } + + //! \brief Wrapper for clGetContextInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_context_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + /*! \brief Gets a list of supported image formats. + * + * Wraps clGetSupportedImageFormats(). + */ + cl_int getSupportedImageFormats( + cl_mem_flags flags, + cl_mem_object_type type, + VECTOR_CLASS* formats) const + { + cl_uint numEntries; + cl_int err = ::clGetSupportedImageFormats( + object_, + flags, + type, + 0, + NULL, + &numEntries); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_SUPPORTED_IMAGE_FORMATS_ERR); + } + + ImageFormat* value = (ImageFormat*) + alloca(numEntries * sizeof(ImageFormat)); + err = ::clGetSupportedImageFormats( + object_, + flags, + type, + numEntries, + (cl_image_format*) value, + NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_SUPPORTED_IMAGE_FORMATS_ERR); + } + + formats->assign(&value[0], &value[numEntries]); + return CL_SUCCESS; + } +}; + +inline Device Device::getDefault(cl_int * err) +{ + cl_int error; + Device device; + + Context context = Context::getDefault(&error); + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + + if (error != CL_SUCCESS) { + if (err != NULL) { + *err = error; + } + } + else { + device = context.getInfo()[0]; + if (err != NULL) { + *err = CL_SUCCESS; + } + } + + return device; +} + + +#ifdef _WIN32 +__declspec(selectany) volatile int Context::default_initialized_ = __DEFAULT_NOT_INITIALIZED; +__declspec(selectany) Context Context::default_; +__declspec(selectany) volatile cl_int Context::default_error_ = CL_SUCCESS; +#else +__attribute__((weak)) volatile int Context::default_initialized_ = __DEFAULT_NOT_INITIALIZED; +__attribute__((weak)) Context Context::default_; +__attribute__((weak)) volatile cl_int Context::default_error_ = CL_SUCCESS; +#endif + +/*! \brief Class interface for cl_event. + * + * \note Copies of these objects are shallow, meaning that the copy will refer + * to the same underlying cl_event as the original. For details, see + * clRetainEvent() and clReleaseEvent(). + * + * \see cl_event + */ +class Event : public detail::Wrapper +{ +public: + /*! \brief Destructor. + * + * This calls clReleaseEvent() on the value held by this instance. + */ + ~Event() { } + + //! \brief Default constructor - initializes to NULL. + Event() : detail::Wrapper() { } + + /*! \brief Copy constructor. + * + * This calls clRetainEvent() on the parameter's cl_event. + */ + Event(const Event& event) : detail::Wrapper(event) { } + + /*! \brief Constructor from cl_event - takes ownership. + * + * This effectively transfers ownership of a refcount on the cl_event + * into the new Event object. + */ + Event(const cl_event& event) : detail::Wrapper(event) { } + + /*! \brief Assignment operator from cl_event - takes ownership. + * + * This effectively transfers ownership of a refcount on the rhs and calls + * clReleaseEvent() on the value previously held by this instance. + */ + Event& operator = (const Event& rhs) + { + if (this != &rhs) { + detail::Wrapper::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment operator from cl_event. + * + * This calls clRetainEvent() on the parameter and clReleaseEvent() on + * the previous value held by this instance. + */ + Event& operator = (const cl_event& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + //! \brief Wrapper for clGetEventInfo(). + template + cl_int getInfo(cl_event_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetEventInfo, object_, name, param), + __GET_EVENT_INFO_ERR); + } + + //! \brief Wrapper for clGetEventInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_event_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + //! \brief Wrapper for clGetEventProfilingInfo(). + template + cl_int getProfilingInfo(cl_profiling_info name, T* param) const + { + return detail::errHandler(detail::getInfo( + &::clGetEventProfilingInfo, object_, name, param), + __GET_EVENT_PROFILE_INFO_ERR); + } + + //! \brief Wrapper for clGetEventProfilingInfo() that returns by value. + template typename + detail::param_traits::param_type + getProfilingInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_profiling_info, name>::param_type param; + cl_int result = getProfilingInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + /*! \brief Blocks the calling thread until this event completes. + * + * Wraps clWaitForEvents(). + */ + cl_int wait() const + { + return detail::errHandler( + ::clWaitForEvents(1, &object_), + __WAIT_FOR_EVENTS_ERR); + } + +#if defined(CL_VERSION_1_1) + /*! \brief Registers a user callback function for a specific command execution status. + * + * Wraps clSetEventCallback(). + */ + cl_int setCallback( + cl_int type, + void (CL_CALLBACK * pfn_notify)(cl_event, cl_int, void *), + void * user_data = NULL) + { + return detail::errHandler( + ::clSetEventCallback( + object_, + type, + pfn_notify, + user_data), + __SET_EVENT_CALLBACK_ERR); + } +#endif + + /*! \brief Blocks the calling thread until every event specified is complete. + * + * Wraps clWaitForEvents(). + */ + static cl_int + waitForEvents(const VECTOR_CLASS& events) + { + return detail::errHandler( + ::clWaitForEvents( + (cl_uint) events.size(), (cl_event*)&events.front()), + __WAIT_FOR_EVENTS_ERR); + } +}; + +#if defined(CL_VERSION_1_1) +/*! \brief Class interface for user events (a subset of cl_event's). + * + * See Event for details about copy semantics, etc. + */ +class UserEvent : public Event +{ +public: + /*! \brief Constructs a user event on a given context. + * + * Wraps clCreateUserEvent(). + */ + UserEvent( + const Context& context, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateUserEvent( + context(), + &error); + + detail::errHandler(error, __CREATE_USER_EVENT_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + UserEvent() : Event() { } + + //! \brief Copy constructor - performs shallow copy. + UserEvent(const UserEvent& event) : Event(event) { } + + //! \brief Assignment Operator - performs shallow copy. + UserEvent& operator = (const UserEvent& rhs) + { + if (this != &rhs) { + Event::operator=(rhs); + } + return *this; + } + + /*! \brief Sets the execution status of a user event object. + * + * Wraps clSetUserEventStatus(). + */ + cl_int setStatus(cl_int status) + { + return detail::errHandler( + ::clSetUserEventStatus(object_,status), + __SET_USER_EVENT_STATUS_ERR); + } +}; +#endif + +/*! \brief Blocks the calling thread until every event specified is complete. + * + * Wraps clWaitForEvents(). + */ +inline static cl_int +WaitForEvents(const VECTOR_CLASS& events) +{ + return detail::errHandler( + ::clWaitForEvents( + (cl_uint) events.size(), (cl_event*)&events.front()), + __WAIT_FOR_EVENTS_ERR); +} + +/*! \brief Class interface for cl_mem. + * + * \note Copies of these objects are shallow, meaning that the copy will refer + * to the same underlying cl_mem as the original. For details, see + * clRetainMemObject() and clReleaseMemObject(). + * + * \see cl_mem + */ +class Memory : public detail::Wrapper +{ +public: + + /*! \brief Destructor. + * + * This calls clReleaseMemObject() on the value held by this instance. + */ + ~Memory() {} + + //! \brief Default constructor - initializes to NULL. + Memory() : detail::Wrapper() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * This calls clRetainMemObject() on the parameter's cl_mem. + */ + Memory(const Memory& memory) : detail::Wrapper(memory) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * This effectively transfers ownership of a refcount on the cl_mem + * into the new Memory object. + */ + __CL_EXPLICIT_CONSTRUCTORS Memory(const cl_mem& memory) : detail::Wrapper(memory) { } + + /*! \brief Assignment operator from Memory. + * + * This calls clRetainMemObject() on the parameter and clReleaseMemObject() + * on the previous value held by this instance. + */ + Memory& operator = (const Memory& rhs) + { + if (this != &rhs) { + detail::Wrapper::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment operator from cl_mem - takes ownership. + * + * This effectively transfers ownership of a refcount on the rhs and calls + * clReleaseMemObject() on the value previously held by this instance. + */ + Memory& operator = (const cl_mem& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + //! \brief Wrapper for clGetMemObjectInfo(). + template + cl_int getInfo(cl_mem_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetMemObjectInfo, object_, name, param), + __GET_MEM_OBJECT_INFO_ERR); + } + + //! \brief Wrapper for clGetMemObjectInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_mem_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + +#if defined(CL_VERSION_1_1) + /*! \brief Registers a callback function to be called when the memory object + * is no longer needed. + * + * Wraps clSetMemObjectDestructorCallback(). + * + * Repeated calls to this function, for a given cl_mem value, will append + * to the list of functions called (in reverse order) when memory object's + * resources are freed and the memory object is deleted. + * + * \note + * The registered callbacks are associated with the underlying cl_mem + * value - not the Memory class instance. + */ + cl_int setDestructorCallback( + void (CL_CALLBACK * pfn_notify)(cl_mem, void *), + void * user_data = NULL) + { + return detail::errHandler( + ::clSetMemObjectDestructorCallback( + object_, + pfn_notify, + user_data), + __SET_MEM_OBJECT_DESTRUCTOR_CALLBACK_ERR); + } +#endif + +}; + +// Pre-declare copy functions +class Buffer; +template< typename IteratorType > +cl_int copy( IteratorType startIterator, IteratorType endIterator, cl::Buffer &buffer ); +template< typename IteratorType > +cl_int copy( const cl::Buffer &buffer, IteratorType startIterator, IteratorType endIterator ); +template< typename IteratorType > +cl_int copy( const CommandQueue &queue, IteratorType startIterator, IteratorType endIterator, cl::Buffer &buffer ); +template< typename IteratorType > +cl_int copy( const CommandQueue &queue, const cl::Buffer &buffer, IteratorType startIterator, IteratorType endIterator ); + + +/*! \brief Class interface for Buffer Memory Objects. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Buffer : public Memory +{ +public: + + /*! \brief Constructs a Buffer in a specified context. + * + * Wraps clCreateBuffer(). + * + * \param host_ptr Storage to be used if the CL_MEM_USE_HOST_PTR flag was + * specified. Note alignment & exclusivity requirements. + */ + Buffer( + const Context& context, + cl_mem_flags flags, + ::size_t size, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + object_ = ::clCreateBuffer(context(), flags, size, host_ptr, &error); + + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! \brief Constructs a Buffer in the default context. + * + * Wraps clCreateBuffer(). + * + * \param host_ptr Storage to be used if the CL_MEM_USE_HOST_PTR flag was + * specified. Note alignment & exclusivity requirements. + * + * \see Context::getDefault() + */ + Buffer( + cl_mem_flags flags, + ::size_t size, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + + Context context = Context::getDefault(err); + + object_ = ::clCreateBuffer(context(), flags, size, host_ptr, &error); + + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! + * \brief Construct a Buffer from a host container via iterators. + * IteratorType must be random access. + * If useHostPtr is specified iterators must represent contiguous data. + */ + template< typename IteratorType > + Buffer( + IteratorType startIterator, + IteratorType endIterator, + bool readOnly, + bool useHostPtr = false, + cl_int* err = NULL) + { + typedef typename std::iterator_traits::value_type DataType; + cl_int error; + + cl_mem_flags flags = 0; + if( readOnly ) { + flags |= CL_MEM_READ_ONLY; + } + else { + flags |= CL_MEM_READ_WRITE; + } + if( useHostPtr ) { + flags |= CL_MEM_USE_HOST_PTR; + } + + ::size_t size = sizeof(DataType)*(endIterator - startIterator); + + Context context = Context::getDefault(err); + + if( useHostPtr ) { + object_ = ::clCreateBuffer(context(), flags, size, static_cast(&*startIterator), &error); + } else { + object_ = ::clCreateBuffer(context(), flags, size, 0, &error); + } + + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + + if( !useHostPtr ) { + error = cl::copy(startIterator, endIterator, *this); + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + } + + /*! + * \brief Construct a Buffer from a host container via iterators using a specified context. + * IteratorType must be random access. + * If useHostPtr is specified iterators must represent contiguous data. + */ + template< typename IteratorType > + Buffer(const Context &context, IteratorType startIterator, IteratorType endIterator, + bool readOnly, bool useHostPtr = false, cl_int* err = NULL); + + //! \brief Default constructor - initializes to NULL. + Buffer() : Memory() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * See Memory for further details. + */ + Buffer(const Buffer& buffer) : Memory(buffer) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * See Memory for further details. + */ + __CL_EXPLICIT_CONSTRUCTORS Buffer(const cl_mem& buffer) : Memory(buffer) { } + + /*! \brief Assignment from Buffer - performs shallow copy. + * + * See Memory for further details. + */ + Buffer& operator = (const Buffer& rhs) + { + if (this != &rhs) { + Memory::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Buffer& operator = (const cl_mem& rhs) + { + Memory::operator=(rhs); + return *this; + } + +#if defined(CL_VERSION_1_1) + /*! \brief Creates a new buffer object from this. + * + * Wraps clCreateSubBuffer(). + */ + Buffer createSubBuffer( + cl_mem_flags flags, + cl_buffer_create_type buffer_create_type, + const void * buffer_create_info, + cl_int * err = NULL) + { + Buffer result; + cl_int error; + result.object_ = ::clCreateSubBuffer( + object_, + flags, + buffer_create_type, + buffer_create_info, + &error); + + detail::errHandler(error, __CREATE_SUBBUFFER_ERR); + if (err != NULL) { + *err = error; + } + + return result; + } +#endif +}; + +#if defined (USE_DX_INTEROP) +/*! \brief Class interface for creating OpenCL buffers from ID3D10Buffer's. + * + * This is provided to facilitate interoperability with Direct3D. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class BufferD3D10 : public Buffer +{ +public: + typedef CL_API_ENTRY cl_mem (CL_API_CALL *PFN_clCreateFromD3D10BufferKHR)( + cl_context context, cl_mem_flags flags, ID3D10Buffer* buffer, + cl_int* errcode_ret); + + /*! \brief Constructs a BufferD3D10, in a specified context, from a + * given ID3D10Buffer. + * + * Wraps clCreateFromD3D10BufferKHR(). + */ + BufferD3D10( + const Context& context, + cl_mem_flags flags, + ID3D10Buffer* bufobj, + cl_int * err = NULL) + { + static PFN_clCreateFromD3D10BufferKHR pfn_clCreateFromD3D10BufferKHR = NULL; + +#if defined(CL_VERSION_1_2) + vector props = context.getInfo(); + cl_platform platform = -1; + for( int i = 0; i < props.size(); ++i ) { + if( props[i] == CL_CONTEXT_PLATFORM ) { + platform = props[i+1]; + } + } + __INIT_CL_EXT_FCN_PTR_PLATFORM(platform, clCreateFromD3D10BufferKHR); +#endif +#if defined(CL_VERSION_1_1) + __INIT_CL_EXT_FCN_PTR(clCreateFromD3D10BufferKHR); +#endif + + cl_int error; + object_ = pfn_clCreateFromD3D10BufferKHR( + context(), + flags, + bufobj, + &error); + + detail::errHandler(error, __CREATE_GL_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + BufferD3D10() : Buffer() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * See Memory for further details. + */ + BufferD3D10(const BufferD3D10& buffer) : Buffer(buffer) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * See Memory for further details. + */ + __CL_EXPLICIT_CONSTRUCTORS BufferD3D10(const cl_mem& buffer) : Buffer(buffer) { } + + /*! \brief Assignment from BufferD3D10 - performs shallow copy. + * + * See Memory for further details. + */ + BufferD3D10& operator = (const BufferD3D10& rhs) + { + if (this != &rhs) { + Buffer::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + BufferD3D10& operator = (const cl_mem& rhs) + { + Buffer::operator=(rhs); + return *this; + } +}; +#endif + +/*! \brief Class interface for GL Buffer Memory Objects. + * + * This is provided to facilitate interoperability with OpenGL. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class BufferGL : public Buffer +{ +public: + /*! \brief Constructs a BufferGL in a specified context, from a given + * GL buffer. + * + * Wraps clCreateFromGLBuffer(). + */ + BufferGL( + const Context& context, + cl_mem_flags flags, + GLuint bufobj, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateFromGLBuffer( + context(), + flags, + bufobj, + &error); + + detail::errHandler(error, __CREATE_GL_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + BufferGL() : Buffer() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * See Memory for further details. + */ + BufferGL(const BufferGL& buffer) : Buffer(buffer) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * See Memory for further details. + */ + __CL_EXPLICIT_CONSTRUCTORS BufferGL(const cl_mem& buffer) : Buffer(buffer) { } + + /*! \brief Assignment from BufferGL - performs shallow copy. + * + * See Memory for further details. + */ + BufferGL& operator = (const BufferGL& rhs) + { + if (this != &rhs) { + Buffer::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + BufferGL& operator = (const cl_mem& rhs) + { + Buffer::operator=(rhs); + return *this; + } + + //! \brief Wrapper for clGetGLObjectInfo(). + cl_int getObjectInfo( + cl_gl_object_type *type, + GLuint * gl_object_name) + { + return detail::errHandler( + ::clGetGLObjectInfo(object_,type,gl_object_name), + __GET_GL_OBJECT_INFO_ERR); + } +}; + +/*! \brief Class interface for GL Render Buffer Memory Objects. + * + * This is provided to facilitate interoperability with OpenGL. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class BufferRenderGL : public Buffer +{ +public: + /*! \brief Constructs a BufferRenderGL in a specified context, from a given + * GL Renderbuffer. + * + * Wraps clCreateFromGLRenderbuffer(). + */ + BufferRenderGL( + const Context& context, + cl_mem_flags flags, + GLuint bufobj, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateFromGLRenderbuffer( + context(), + flags, + bufobj, + &error); + + detail::errHandler(error, __CREATE_GL_RENDER_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + BufferRenderGL() : Buffer() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * See Memory for further details. + */ + BufferRenderGL(const BufferGL& buffer) : Buffer(buffer) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * See Memory for further details. + */ + __CL_EXPLICIT_CONSTRUCTORS BufferRenderGL(const cl_mem& buffer) : Buffer(buffer) { } + + /*! \brief Assignment from BufferGL - performs shallow copy. + * + * See Memory for further details. + */ + BufferRenderGL& operator = (const BufferRenderGL& rhs) + { + if (this != &rhs) { + Buffer::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + BufferRenderGL& operator = (const cl_mem& rhs) + { + Buffer::operator=(rhs); + return *this; + } + + //! \brief Wrapper for clGetGLObjectInfo(). + cl_int getObjectInfo( + cl_gl_object_type *type, + GLuint * gl_object_name) + { + return detail::errHandler( + ::clGetGLObjectInfo(object_,type,gl_object_name), + __GET_GL_OBJECT_INFO_ERR); + } +}; + +/*! \brief C++ base class for Image Memory objects. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Image : public Memory +{ +protected: + //! \brief Default constructor - initializes to NULL. + Image() : Memory() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * See Memory for further details. + */ + Image(const Image& image) : Memory(image) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * See Memory for further details. + */ + __CL_EXPLICIT_CONSTRUCTORS Image(const cl_mem& image) : Memory(image) { } + + /*! \brief Assignment from Image - performs shallow copy. + * + * See Memory for further details. + */ + Image& operator = (const Image& rhs) + { + if (this != &rhs) { + Memory::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image& operator = (const cl_mem& rhs) + { + Memory::operator=(rhs); + return *this; + } + +public: + //! \brief Wrapper for clGetImageInfo(). + template + cl_int getImageInfo(cl_image_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetImageInfo, object_, name, param), + __GET_IMAGE_INFO_ERR); + } + + //! \brief Wrapper for clGetImageInfo() that returns by value. + template typename + detail::param_traits::param_type + getImageInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_image_info, name>::param_type param; + cl_int result = getImageInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } +}; + +#if defined(CL_VERSION_1_2) +/*! \brief Class interface for 1D Image Memory objects. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Image1D : public Image +{ +public: + /*! \brief Constructs a 1D Image in a specified context. + * + * Wraps clCreateImage(). + */ + Image1D( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + ::size_t width, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE1D, + width, + 0, 0, 0, 0, 0, 0, 0, 0 + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + host_ptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + Image1D() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * See Memory for further details. + */ + Image1D(const Image1D& image1D) : Image(image1D) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * See Memory for further details. + */ + __CL_EXPLICIT_CONSTRUCTORS Image1D(const cl_mem& image1D) : Image(image1D) { } + + /*! \brief Assignment from Image1D - performs shallow copy. + * + * See Memory for further details. + */ + Image1D& operator = (const Image1D& rhs) + { + if (this != &rhs) { + Image::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image1D& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } +}; + +/*! \class Image1DBuffer + * \brief Image interface for 1D buffer images. + */ +class Image1DBuffer : public Image +{ +public: + Image1DBuffer( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + ::size_t width, + const Buffer &buffer, + cl_int* err = NULL) + { + cl_int error; + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE1D_BUFFER, + width, + 0, 0, 0, 0, 0, 0, 0, + buffer() + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + NULL, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } + + Image1DBuffer() { } + + Image1DBuffer(const Image1DBuffer& image1D) : Image(image1D) { } + + __CL_EXPLICIT_CONSTRUCTORS Image1DBuffer(const cl_mem& image1D) : Image(image1D) { } + + Image1DBuffer& operator = (const Image1DBuffer& rhs) + { + if (this != &rhs) { + Image::operator=(rhs); + } + return *this; + } + + Image1DBuffer& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } +}; + +/*! \class Image1DArray + * \brief Image interface for arrays of 1D images. + */ +class Image1DArray : public Image +{ +public: + Image1DArray( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + ::size_t arraySize, + ::size_t width, + ::size_t rowPitch, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE1D_ARRAY, + width, + 0, 0, // height, depth (unused) + arraySize, + rowPitch, + 0, 0, 0, 0 + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + host_ptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } + + Image1DArray() { } + + Image1DArray(const Image1DArray& imageArray) : Image(imageArray) { } + + __CL_EXPLICIT_CONSTRUCTORS Image1DArray(const cl_mem& imageArray) : Image(imageArray) { } + + Image1DArray& operator = (const Image1DArray& rhs) + { + if (this != &rhs) { + Image::operator=(rhs); + } + return *this; + } + + Image1DArray& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } +}; +#endif // #if defined(CL_VERSION_1_2) + + +/*! \brief Class interface for 2D Image Memory objects. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Image2D : public Image +{ +public: + /*! \brief Constructs a 1D Image in a specified context. + * + * Wraps clCreateImage(). + */ + Image2D( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + ::size_t width, + ::size_t height, + ::size_t row_pitch = 0, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + bool useCreateImage; + +#if defined(CL_VERSION_1_2) && defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + // Run-time decision based on the actual platform + { + cl_uint version = detail::getContextPlatformVersion(context()); + useCreateImage = (version >= 0x10002); // OpenCL 1.2 or above + } +#elif defined(CL_VERSION_1_2) + useCreateImage = true; +#else + useCreateImage = false; +#endif + +#if defined(CL_VERSION_1_2) + if (useCreateImage) + { + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE2D, + width, + height, + 0, 0, // depth, array size (unused) + row_pitch, + 0, 0, 0, 0 + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + host_ptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // #if defined(CL_VERSION_1_2) +#if !defined(CL_VERSION_1_2) || defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + if (!useCreateImage) + { + object_ = ::clCreateImage2D( + context(), flags,&format, width, height, row_pitch, host_ptr, &error); + + detail::errHandler(error, __CREATE_IMAGE2D_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // #if !defined(CL_VERSION_1_2) || defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + } + + //! \brief Default constructor - initializes to NULL. + Image2D() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * See Memory for further details. + */ + Image2D(const Image2D& image2D) : Image(image2D) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * See Memory for further details. + */ + __CL_EXPLICIT_CONSTRUCTORS Image2D(const cl_mem& image2D) : Image(image2D) { } + + /*! \brief Assignment from Image2D - performs shallow copy. + * + * See Memory for further details. + */ + Image2D& operator = (const Image2D& rhs) + { + if (this != &rhs) { + Image::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image2D& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } +}; + + +#if !defined(CL_VERSION_1_2) +/*! \brief Class interface for GL 2D Image Memory objects. + * + * This is provided to facilitate interoperability with OpenGL. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + * \note Deprecated for OpenCL 1.2. Please use ImageGL instead. + */ +class CL_EXT_PREFIX__VERSION_1_1_DEPRECATED Image2DGL CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED : public Image2D +{ +public: + /*! \brief Constructs an Image2DGL in a specified context, from a given + * GL Texture. + * + * Wraps clCreateFromGLTexture2D(). + */ + Image2DGL( + const Context& context, + cl_mem_flags flags, + GLenum target, + GLint miplevel, + GLuint texobj, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateFromGLTexture2D( + context(), + flags, + target, + miplevel, + texobj, + &error); + + detail::errHandler(error, __CREATE_GL_TEXTURE_2D_ERR); + if (err != NULL) { + *err = error; + } + + } + + //! \brief Default constructor - initializes to NULL. + Image2DGL() : Image2D() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * See Memory for further details. + */ + Image2DGL(const Image2DGL& image) : Image2D(image) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * See Memory for further details. + */ + __CL_EXPLICIT_CONSTRUCTORS Image2DGL(const cl_mem& image) : Image2D(image) { } + + /*! \brief Assignment from Image2DGL - performs shallow copy. + * + * See Memory for further details. + */ + Image2DGL& operator = (const Image2DGL& rhs) + { + if (this != &rhs) { + Image2D::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image2DGL& operator = (const cl_mem& rhs) + { + Image2D::operator=(rhs); + return *this; + } +}; +#endif // #if !defined(CL_VERSION_1_2) + +#if defined(CL_VERSION_1_2) +/*! \class Image2DArray + * \brief Image interface for arrays of 2D images. + */ +class Image2DArray : public Image +{ +public: + Image2DArray( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + ::size_t arraySize, + ::size_t width, + ::size_t height, + ::size_t rowPitch, + ::size_t slicePitch, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE2D_ARRAY, + width, + height, + 0, // depth (unused) + arraySize, + rowPitch, + slicePitch, + 0, 0, 0 + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + host_ptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } + + Image2DArray() { } + + Image2DArray(const Image2DArray& imageArray) : Image(imageArray) { } + + __CL_EXPLICIT_CONSTRUCTORS Image2DArray(const cl_mem& imageArray) : Image(imageArray) { } + + Image2DArray& operator = (const Image2DArray& rhs) + { + if (this != &rhs) { + Image::operator=(rhs); + } + return *this; + } + + Image2DArray& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } +}; +#endif // #if defined(CL_VERSION_1_2) + +/*! \brief Class interface for 3D Image Memory objects. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Image3D : public Image +{ +public: + /*! \brief Constructs a 3D Image in a specified context. + * + * Wraps clCreateImage(). + */ + Image3D( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + ::size_t width, + ::size_t height, + ::size_t depth, + ::size_t row_pitch = 0, + ::size_t slice_pitch = 0, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + bool useCreateImage; + +#if defined(CL_VERSION_1_2) && defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + // Run-time decision based on the actual platform + { + cl_uint version = detail::getContextPlatformVersion(context()); + useCreateImage = (version >= 0x10002); // OpenCL 1.2 or above + } +#elif defined(CL_VERSION_1_2) + useCreateImage = true; +#else + useCreateImage = false; +#endif + +#if defined(CL_VERSION_1_2) + if (useCreateImage) + { + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE3D, + width, + height, + depth, + 0, // array size (unused) + row_pitch, + slice_pitch, + 0, 0, 0 + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + host_ptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // #if defined(CL_VERSION_1_2) +#if !defined(CL_VERSION_1_2) || defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + if (!useCreateImage) + { + object_ = ::clCreateImage3D( + context(), flags, &format, width, height, depth, row_pitch, + slice_pitch, host_ptr, &error); + + detail::errHandler(error, __CREATE_IMAGE3D_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // #if !defined(CL_VERSION_1_2) || defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + } + + //! \brief Default constructor - initializes to NULL. + Image3D() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * See Memory for further details. + */ + Image3D(const Image3D& image3D) : Image(image3D) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * See Memory for further details. + */ + __CL_EXPLICIT_CONSTRUCTORS Image3D(const cl_mem& image3D) : Image(image3D) { } + + /*! \brief Assignment from Image3D - performs shallow copy. + * + * See Memory for further details. + */ + Image3D& operator = (const Image3D& rhs) + { + if (this != &rhs) { + Image::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image3D& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } +}; + +#if !defined(CL_VERSION_1_2) +/*! \brief Class interface for GL 3D Image Memory objects. + * + * This is provided to facilitate interoperability with OpenGL. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Image3DGL : public Image3D +{ +public: + /*! \brief Constructs an Image3DGL in a specified context, from a given + * GL Texture. + * + * Wraps clCreateFromGLTexture3D(). + */ + Image3DGL( + const Context& context, + cl_mem_flags flags, + GLenum target, + GLint miplevel, + GLuint texobj, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateFromGLTexture3D( + context(), + flags, + target, + miplevel, + texobj, + &error); + + detail::errHandler(error, __CREATE_GL_TEXTURE_3D_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + Image3DGL() : Image3D() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * See Memory for further details. + */ + Image3DGL(const Image3DGL& image) : Image3D(image) { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * See Memory for further details. + */ + __CL_EXPLICIT_CONSTRUCTORS Image3DGL(const cl_mem& image) : Image3D(image) { } + + /*! \brief Assignment from Image3DGL - performs shallow copy. + * + * See Memory for further details. + */ + Image3DGL& operator = (const Image3DGL& rhs) + { + if (this != &rhs) { + Image3D::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image3DGL& operator = (const cl_mem& rhs) + { + Image3D::operator=(rhs); + return *this; + } +}; +#endif // #if !defined(CL_VERSION_1_2) + +#if defined(CL_VERSION_1_2) +/*! \class ImageGL + * \brief general image interface for GL interop. + * We abstract the 2D and 3D GL images into a single instance here + * that wraps all GL sourced images on the grounds that setup information + * was performed by OpenCL anyway. + */ +class ImageGL : public Image +{ +public: + ImageGL( + const Context& context, + cl_mem_flags flags, + GLenum target, + GLint miplevel, + GLuint texobj, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateFromGLTexture( + context(), + flags, + target, + miplevel, + texobj, + &error); + + detail::errHandler(error, __CREATE_GL_TEXTURE_ERR); + if (err != NULL) { + *err = error; + } + } + + ImageGL() : Image() { } + + ImageGL(const ImageGL& image) : Image(image) { } + + __CL_EXPLICIT_CONSTRUCTORS ImageGL(const cl_mem& image) : Image(image) { } + + ImageGL& operator = (const ImageGL& rhs) + { + if (this != &rhs) { + Image::operator=(rhs); + } + return *this; + } + + ImageGL& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } +}; +#endif // #if defined(CL_VERSION_1_2) + +/*! \brief Class interface for cl_sampler. + * + * \note Copies of these objects are shallow, meaning that the copy will refer + * to the same underlying cl_sampler as the original. For details, see + * clRetainSampler() and clReleaseSampler(). + * + * \see cl_sampler + */ +class Sampler : public detail::Wrapper +{ +public: + /*! \brief Destructor. + * + * This calls clReleaseSampler() on the value held by this instance. + */ + ~Sampler() { } + + //! \brief Default constructor - initializes to NULL. + Sampler() { } + + /*! \brief Constructs a Sampler in a specified context. + * + * Wraps clCreateSampler(). + */ + Sampler( + const Context& context, + cl_bool normalized_coords, + cl_addressing_mode addressing_mode, + cl_filter_mode filter_mode, + cl_int* err = NULL) + { + cl_int error; + object_ = ::clCreateSampler( + context(), + normalized_coords, + addressing_mode, + filter_mode, + &error); + + detail::errHandler(error, __CREATE_SAMPLER_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! \brief Copy constructor - performs shallow copy. + * + * This calls clRetainSampler() on the parameter's cl_sampler. + */ + Sampler(const Sampler& sampler) : detail::Wrapper(sampler) { } + + /*! \brief Constructor from cl_sampler - takes ownership. + * + * This effectively transfers ownership of a refcount on the cl_sampler + * into the new Sampler object. + */ + Sampler(const cl_sampler& sampler) : detail::Wrapper(sampler) { } + + /*! \brief Assignment operator from Sampler. + * + * This calls clRetainSampler() on the parameter and clReleaseSampler() + * on the previous value held by this instance. + */ + Sampler& operator = (const Sampler& rhs) + { + if (this != &rhs) { + detail::Wrapper::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment operator from cl_sampler - takes ownership. + * + * This effectively transfers ownership of a refcount on the rhs and calls + * clReleaseSampler() on the value previously held by this instance. + */ + Sampler& operator = (const cl_sampler& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + //! \brief Wrapper for clGetSamplerInfo(). + template + cl_int getInfo(cl_sampler_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetSamplerInfo, object_, name, param), + __GET_SAMPLER_INFO_ERR); + } + + //! \brief Wrapper for clGetSamplerInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_sampler_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } +}; + +class Program; +class CommandQueue; +class Kernel; + +//! \brief Class interface for specifying NDRange values. +class NDRange +{ +private: + size_t<3> sizes_; + cl_uint dimensions_; + +public: + //! \brief Default constructor - resulting range has zero dimensions. + NDRange() + : dimensions_(0) + { } + + //! \brief Constructs one-dimensional range. + NDRange(::size_t size0) + : dimensions_(1) + { + sizes_[0] = size0; + } + + //! \brief Constructs two-dimensional range. + NDRange(::size_t size0, ::size_t size1) + : dimensions_(2) + { + sizes_[0] = size0; + sizes_[1] = size1; + } + + //! \brief Constructs three-dimensional range. + NDRange(::size_t size0, ::size_t size1, ::size_t size2) + : dimensions_(3) + { + sizes_[0] = size0; + sizes_[1] = size1; + sizes_[2] = size2; + } + + /*! \brief Conversion operator to const ::size_t *. + * + * \returns a pointer to the size of the first dimension. + */ + operator const ::size_t*() const { + return (const ::size_t*) sizes_; + } + + //! \brief Queries the number of dimensions in the range. + ::size_t dimensions() const { return dimensions_; } +}; + +//! \brief A zero-dimensional range. +static const NDRange NullRange; + +//! \brief Local address wrapper for use with Kernel::setArg +struct LocalSpaceArg +{ + ::size_t size_; +}; + +namespace detail { + +template +struct KernelArgumentHandler +{ + static ::size_t size(const T&) { return sizeof(T); } + static T* ptr(T& value) { return &value; } +}; + +template <> +struct KernelArgumentHandler +{ + static ::size_t size(const LocalSpaceArg& value) { return value.size_; } + static void* ptr(LocalSpaceArg&) { return NULL; } +}; + +} +//! \endcond + +/*! __local + * \brief Helper function for generating LocalSpaceArg objects. + * Deprecated. Replaced with Local. + */ +inline CL_EXT_PREFIX__VERSION_1_1_DEPRECATED LocalSpaceArg +__local(::size_t size) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; +inline LocalSpaceArg +__local(::size_t size) +{ + LocalSpaceArg ret = { size }; + return ret; +} + +/*! Local + * \brief Helper function for generating LocalSpaceArg objects. + */ +inline LocalSpaceArg +Local(::size_t size) +{ + LocalSpaceArg ret = { size }; + return ret; +} + +//class KernelFunctor; + +/*! \brief Class interface for cl_kernel. + * + * \note Copies of these objects are shallow, meaning that the copy will refer + * to the same underlying cl_kernel as the original. For details, see + * clRetainKernel() and clReleaseKernel(). + * + * \see cl_kernel + */ +class Kernel : public detail::Wrapper +{ +public: + inline Kernel(const Program& program, const char* name, cl_int* err = NULL); + + /*! \brief Destructor. + * + * This calls clReleaseKernel() on the value held by this instance. + */ + ~Kernel() { } + + //! \brief Default constructor - initializes to NULL. + Kernel() { } + + /*! \brief Copy constructor - performs shallow copy. + * + * This calls clRetainKernel() on the parameter's cl_kernel. + */ + Kernel(const Kernel& kernel) : detail::Wrapper(kernel) { } + + /*! \brief Constructor from cl_kernel - takes ownership. + * + * This effectively transfers ownership of a refcount on the cl_kernel + * into the new Kernel object. + */ + __CL_EXPLICIT_CONSTRUCTORS Kernel(const cl_kernel& kernel) : detail::Wrapper(kernel) { } + + /*! \brief Assignment operator from Kernel. + * + * This calls clRetainKernel() on the parameter and clReleaseKernel() + * on the previous value held by this instance. + */ + Kernel& operator = (const Kernel& rhs) + { + if (this != &rhs) { + detail::Wrapper::operator=(rhs); + } + return *this; + } + + /*! \brief Assignment operator from cl_kernel - takes ownership. + * + * This effectively transfers ownership of a refcount on the rhs and calls + * clReleaseKernel() on the value previously held by this instance. + */ + Kernel& operator = (const cl_kernel& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + template + cl_int getInfo(cl_kernel_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetKernelInfo, object_, name, param), + __GET_KERNEL_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_kernel_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + +#if defined(CL_VERSION_1_2) + template + cl_int getArgInfo(cl_uint argIndex, cl_kernel_arg_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetKernelArgInfo, object_, argIndex, name, param), + __GET_KERNEL_ARG_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getArgInfo(cl_uint argIndex, cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_kernel_arg_info, name>::param_type param; + cl_int result = getArgInfo(argIndex, name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } +#endif // #if defined(CL_VERSION_1_2) + + template + cl_int getWorkGroupInfo( + const Device& device, cl_kernel_work_group_info name, T* param) const + { + return detail::errHandler( + detail::getInfo( + &::clGetKernelWorkGroupInfo, object_, device(), name, param), + __GET_KERNEL_WORK_GROUP_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getWorkGroupInfo(const Device& device, cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_kernel_work_group_info, name>::param_type param; + cl_int result = getWorkGroupInfo(device, name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + template + cl_int setArg(cl_uint index, T value) + { + return detail::errHandler( + ::clSetKernelArg( + object_, + index, + detail::KernelArgumentHandler::size(value), + detail::KernelArgumentHandler::ptr(value)), + __SET_KERNEL_ARGS_ERR); + } + + cl_int setArg(cl_uint index, ::size_t size, void* argPtr) + { + return detail::errHandler( + ::clSetKernelArg(object_, index, size, argPtr), + __SET_KERNEL_ARGS_ERR); + } +}; + +/*! \class Program + * \brief Program interface that implements cl_program. + */ +class Program : public detail::Wrapper +{ +public: + typedef VECTOR_CLASS > Binaries; + typedef VECTOR_CLASS > Sources; + + Program( + const STRING_CLASS& source, + bool build = false, + cl_int* err = NULL) + { + cl_int error; + + const char * strings = source.c_str(); + const ::size_t length = source.size(); + + Context context = Context::getDefault(err); + + object_ = ::clCreateProgramWithSource( + context(), (cl_uint)1, &strings, &length, &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_SOURCE_ERR); + + if (error == CL_SUCCESS && build) { + + error = ::clBuildProgram( + object_, + 0, + NULL, + "", + NULL, + NULL); + + detail::errHandler(error, __BUILD_PROGRAM_ERR); + } + + if (err != NULL) { + *err = error; + } + } + + Program( + const Context& context, + const STRING_CLASS& source, + bool build = false, + cl_int* err = NULL) + { + cl_int error; + + const char * strings = source.c_str(); + const ::size_t length = source.size(); + + object_ = ::clCreateProgramWithSource( + context(), (cl_uint)1, &strings, &length, &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_SOURCE_ERR); + + if (error == CL_SUCCESS && build) { + + error = ::clBuildProgram( + object_, + 0, + NULL, + "", + NULL, + NULL); + + detail::errHandler(error, __BUILD_PROGRAM_ERR); + } + + if (err != NULL) { + *err = error; + } + } + + Program( + const Context& context, + const Sources& sources, + cl_int* err = NULL) + { + cl_int error; + + const ::size_t n = (::size_t)sources.size(); + ::size_t* lengths = (::size_t*) alloca(n * sizeof(::size_t)); + const char** strings = (const char**) alloca(n * sizeof(const char*)); + + for (::size_t i = 0; i < n; ++i) { + strings[i] = sources[(int)i].first; + lengths[i] = sources[(int)i].second; + } + + object_ = ::clCreateProgramWithSource( + context(), (cl_uint)n, strings, lengths, &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_SOURCE_ERR); + if (err != NULL) { + *err = error; + } + } + + /** + * Construct a program object from a list of devices and a per-device list of binaries. + * \param context A valid OpenCL context in which to construct the program. + * \param devices A vector of OpenCL device objects for which the program will be created. + * \param binaries A vector of pairs of a pointer to a binary object and its length. + * \param binaryStatus An optional vector that on completion will be resized to + * match the size of binaries and filled with values to specify if each binary + * was successfully loaded. + * Set to CL_SUCCESS if the binary was successfully loaded. + * Set to CL_INVALID_VALUE if the length is 0 or the binary pointer is NULL. + * Set to CL_INVALID_BINARY if the binary provided is not valid for the matching device. + * \param err if non-NULL will be set to CL_SUCCESS on successful operation or one of the following errors: + * CL_INVALID_CONTEXT if context is not a valid context. + * CL_INVALID_VALUE if the length of devices is zero; or if the length of binaries does not match the length of devices; + * or if any entry in binaries is NULL or has length 0. + * CL_INVALID_DEVICE if OpenCL devices listed in devices are not in the list of devices associated with context. + * CL_INVALID_BINARY if an invalid program binary was encountered for any device. binaryStatus will return specific status for each device. + * CL_OUT_OF_HOST_MEMORY if there is a failure to allocate resources required by the OpenCL implementation on the host. + */ + Program( + const Context& context, + const VECTOR_CLASS& devices, + const Binaries& binaries, + VECTOR_CLASS* binaryStatus = NULL, + cl_int* err = NULL) + { + cl_int error; + + const ::size_t numDevices = devices.size(); + + // Catch size mismatch early and return + if(binaries.size() != numDevices) { + error = CL_INVALID_VALUE; + detail::errHandler(error, __CREATE_PROGRAM_WITH_BINARY_ERR); + if (err != NULL) { + *err = error; + } + return; + } + + ::size_t* lengths = (::size_t*) alloca(numDevices * sizeof(::size_t)); + const unsigned char** images = (const unsigned char**) alloca(numDevices * sizeof(const unsigned char**)); + + for (::size_t i = 0; i < numDevices; ++i) { + images[i] = (const unsigned char*)binaries[i].first; + lengths[i] = binaries[(int)i].second; + } + + cl_device_id* deviceIDs = (cl_device_id*) alloca(numDevices * sizeof(cl_device_id)); + for( ::size_t deviceIndex = 0; deviceIndex < numDevices; ++deviceIndex ) { + deviceIDs[deviceIndex] = (devices[deviceIndex])(); + } + + if(binaryStatus) { + binaryStatus->resize(numDevices); + } + + object_ = ::clCreateProgramWithBinary( + context(), (cl_uint) devices.size(), + deviceIDs, + lengths, images, binaryStatus != NULL + ? &binaryStatus->front() + : NULL, &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_BINARY_ERR); + if (err != NULL) { + *err = error; + } + } + + +#if defined(CL_VERSION_1_2) + /** + * Create program using builtin kernels. + * \param kernelNames Semi-colon separated list of builtin kernel names + */ + Program( + const Context& context, + const VECTOR_CLASS& devices, + const STRING_CLASS& kernelNames, + cl_int* err = NULL) + { + cl_int error; + + + ::size_t numDevices = devices.size(); + cl_device_id* deviceIDs = (cl_device_id*) alloca(numDevices * sizeof(cl_device_id)); + for( ::size_t deviceIndex = 0; deviceIndex < numDevices; ++deviceIndex ) { + deviceIDs[deviceIndex] = (devices[deviceIndex])(); + } + + object_ = ::clCreateProgramWithBuiltInKernels( + context(), + (cl_uint) devices.size(), + deviceIDs, + kernelNames.c_str(), + &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_BUILT_IN_KERNELS_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // #if defined(CL_VERSION_1_2) + + Program() { } + + Program(const Program& program) : detail::Wrapper(program) { } + + __CL_EXPLICIT_CONSTRUCTORS Program(const cl_program& program) : detail::Wrapper(program) { } + + Program& operator = (const Program& rhs) + { + if (this != &rhs) { + detail::Wrapper::operator=(rhs); + } + return *this; + } + + Program& operator = (const cl_program& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + cl_int build( + const VECTOR_CLASS& devices, + const char* options = NULL, + void (CL_CALLBACK * notifyFptr)(cl_program, void *) = NULL, + void* data = NULL) const + { + ::size_t numDevices = devices.size(); + cl_device_id* deviceIDs = (cl_device_id*) alloca(numDevices * sizeof(cl_device_id)); + for( ::size_t deviceIndex = 0; deviceIndex < numDevices; ++deviceIndex ) { + deviceIDs[deviceIndex] = (devices[deviceIndex])(); + } + + return detail::errHandler( + ::clBuildProgram( + object_, + (cl_uint) + devices.size(), + deviceIDs, + options, + notifyFptr, + data), + __BUILD_PROGRAM_ERR); + } + + cl_int build( + const char* options = NULL, + void (CL_CALLBACK * notifyFptr)(cl_program, void *) = NULL, + void* data = NULL) const + { + return detail::errHandler( + ::clBuildProgram( + object_, + 0, + NULL, + options, + notifyFptr, + data), + __BUILD_PROGRAM_ERR); + } + +#if defined(CL_VERSION_1_2) + cl_int compile( + const char* options = NULL, + void (CL_CALLBACK * notifyFptr)(cl_program, void *) = NULL, + void* data = NULL) const + { + return detail::errHandler( + ::clCompileProgram( + object_, + 0, + NULL, + options, + 0, + NULL, + NULL, + notifyFptr, + data), + __COMPILE_PROGRAM_ERR); + } +#endif + + template + cl_int getInfo(cl_program_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetProgramInfo, object_, name, param), + __GET_PROGRAM_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_program_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + template + cl_int getBuildInfo( + const Device& device, cl_program_build_info name, T* param) const + { + return detail::errHandler( + detail::getInfo( + &::clGetProgramBuildInfo, object_, device(), name, param), + __GET_PROGRAM_BUILD_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getBuildInfo(const Device& device, cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_program_build_info, name>::param_type param; + cl_int result = getBuildInfo(device, name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + cl_int createKernels(VECTOR_CLASS* kernels) + { + cl_uint numKernels; + cl_int err = ::clCreateKernelsInProgram(object_, 0, NULL, &numKernels); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_KERNELS_IN_PROGRAM_ERR); + } + + Kernel* value = (Kernel*) alloca(numKernels * sizeof(Kernel)); + err = ::clCreateKernelsInProgram( + object_, numKernels, (cl_kernel*) value, NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_KERNELS_IN_PROGRAM_ERR); + } + + kernels->assign(&value[0], &value[numKernels]); + return CL_SUCCESS; + } +}; + +#if defined(CL_VERSION_1_2) +inline Program linkProgram( + Program input1, + Program input2, + const char* options = NULL, + void (CL_CALLBACK * notifyFptr)(cl_program, void *) = NULL, + void* data = NULL, + cl_int* err = NULL) +{ + cl_int err_local = CL_SUCCESS; + + cl_program programs[2] = { input1(), input2() }; + + Context ctx = input1.getInfo(); + + cl_program prog = ::clLinkProgram( + ctx(), + 0, + NULL, + options, + 2, + programs, + notifyFptr, + data, + &err_local); + + detail::errHandler(err_local,__COMPILE_PROGRAM_ERR); + if (err != NULL) { + *err = err_local; + } + + return Program(prog); +} + +inline Program linkProgram( + VECTOR_CLASS inputPrograms, + const char* options = NULL, + void (CL_CALLBACK * notifyFptr)(cl_program, void *) = NULL, + void* data = NULL, + cl_int* err = NULL) +{ + cl_int err_local = CL_SUCCESS; + + cl_program * programs = (cl_program*) alloca(inputPrograms.size() * sizeof(cl_program)); + + if (programs != NULL) { + for (unsigned int i = 0; i < inputPrograms.size(); i++) { + programs[i] = inputPrograms[i](); + } + } + + cl_program prog = ::clLinkProgram( + Context::getDefault()(), + 0, + NULL, + options, + (cl_uint)inputPrograms.size(), + programs, + notifyFptr, + data, + &err_local); + + detail::errHandler(err_local,__COMPILE_PROGRAM_ERR); + if (err != NULL) { + *err = err_local; + } + + return Program(prog); +} +#endif + +template<> +inline VECTOR_CLASS cl::Program::getInfo(cl_int* err) const +{ + VECTOR_CLASS< ::size_t> sizes = getInfo(); + VECTOR_CLASS binaries; + for (VECTOR_CLASS< ::size_t>::iterator s = sizes.begin(); s != sizes.end(); ++s) + { + char *ptr = NULL; + if (*s != 0) + ptr = new char[*s]; + binaries.push_back(ptr); + } + + cl_int result = getInfo(CL_PROGRAM_BINARIES, &binaries); + if (err != NULL) { + *err = result; + } + return binaries; +} + +inline Kernel::Kernel(const Program& program, const char* name, cl_int* err) +{ + cl_int error; + + object_ = ::clCreateKernel(program(), name, &error); + detail::errHandler(error, __CREATE_KERNEL_ERR); + + if (err != NULL) { + *err = error; + } + +} + +/*! \class CommandQueue + * \brief CommandQueue interface for cl_command_queue. + */ +class CommandQueue : public detail::Wrapper +{ +private: + static volatile int default_initialized_; + static CommandQueue default_; + static volatile cl_int default_error_; +public: + CommandQueue( + cl_command_queue_properties properties, + cl_int* err = NULL) + { + cl_int error; + + Context context = Context::getDefault(&error); + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + + if (error != CL_SUCCESS) { + if (err != NULL) { + *err = error; + } + } + else { + Device device = context.getInfo()[0]; + + object_ = ::clCreateCommandQueue( + context(), device(), properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + if (err != NULL) { + *err = error; + } + } + } + /*! + * \brief Constructs a CommandQueue for an implementation defined device in the given context + */ + explicit CommandQueue( + const Context& context, + cl_command_queue_properties properties = 0, + cl_int* err = NULL) + { + cl_int error; + VECTOR_CLASS devices; + error = context.getInfo(CL_CONTEXT_DEVICES, &devices); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + + if (error != CL_SUCCESS) + { + if (err != NULL) { + *err = error; + } + return; + } + + object_ = ::clCreateCommandQueue(context(), devices[0](), properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + + if (err != NULL) { + *err = error; + } + + } + + CommandQueue( + const Context& context, + const Device& device, + cl_command_queue_properties properties = 0, + cl_int* err = NULL) + { + cl_int error; + object_ = ::clCreateCommandQueue( + context(), device(), properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + if (err != NULL) { + *err = error; + } + } + + static CommandQueue getDefault(cl_int * err = NULL) + { + int state = detail::compare_exchange( + &default_initialized_, + __DEFAULT_BEING_INITIALIZED, __DEFAULT_NOT_INITIALIZED); + + if (state & __DEFAULT_INITIALIZED) { + if (err != NULL) { + *err = default_error_; + } + return default_; + } + + if (state & __DEFAULT_BEING_INITIALIZED) { + // Assume writes will propagate eventually... + while(default_initialized_ != __DEFAULT_INITIALIZED) { + detail::fence(); + } + + if (err != NULL) { + *err = default_error_; + } + return default_; + } + + cl_int error; + + Context context = Context::getDefault(&error); + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + + if (error != CL_SUCCESS) { + if (err != NULL) { + *err = error; + } + } + else { + Device device = context.getInfo()[0]; + + default_ = CommandQueue(context, device, 0, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + if (err != NULL) { + *err = error; + } + } + + detail::fence(); + + default_error_ = error; + // Assume writes will propagate eventually... + default_initialized_ = __DEFAULT_INITIALIZED; + + detail::fence(); + + if (err != NULL) { + *err = default_error_; + } + return default_; + + } + + CommandQueue() { } + + CommandQueue(const CommandQueue& commandQueue) : detail::Wrapper(commandQueue) { } + + CommandQueue(const cl_command_queue& commandQueue) : detail::Wrapper(commandQueue) { } + + CommandQueue& operator = (const CommandQueue& rhs) + { + if (this != &rhs) { + detail::Wrapper::operator=(rhs); + } + return *this; + } + + CommandQueue& operator = (const cl_command_queue& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + template + cl_int getInfo(cl_command_queue_info name, T* param) const + { + return detail::errHandler( + detail::getInfo( + &::clGetCommandQueueInfo, object_, name, param), + __GET_COMMAND_QUEUE_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_command_queue_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + cl_int enqueueReadBuffer( + const Buffer& buffer, + cl_bool blocking, + ::size_t offset, + ::size_t size, + void* ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueReadBuffer( + object_, buffer(), blocking, offset, size, + ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_READ_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueWriteBuffer( + const Buffer& buffer, + cl_bool blocking, + ::size_t offset, + ::size_t size, + const void* ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueWriteBuffer( + object_, buffer(), blocking, offset, size, + ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_WRITE_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueCopyBuffer( + const Buffer& src, + const Buffer& dst, + ::size_t src_offset, + ::size_t dst_offset, + ::size_t size, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueCopyBuffer( + object_, src(), dst(), src_offset, dst_offset, size, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_COPY_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueReadBufferRect( + const Buffer& buffer, + cl_bool blocking, + const size_t<3>& buffer_offset, + const size_t<3>& host_offset, + const size_t<3>& region, + ::size_t buffer_row_pitch, + ::size_t buffer_slice_pitch, + ::size_t host_row_pitch, + ::size_t host_slice_pitch, + void *ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueReadBufferRect( + object_, + buffer(), + blocking, + (const ::size_t *)buffer_offset, + (const ::size_t *)host_offset, + (const ::size_t *)region, + buffer_row_pitch, + buffer_slice_pitch, + host_row_pitch, + host_slice_pitch, + ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_READ_BUFFER_RECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueWriteBufferRect( + const Buffer& buffer, + cl_bool blocking, + const size_t<3>& buffer_offset, + const size_t<3>& host_offset, + const size_t<3>& region, + ::size_t buffer_row_pitch, + ::size_t buffer_slice_pitch, + ::size_t host_row_pitch, + ::size_t host_slice_pitch, + void *ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueWriteBufferRect( + object_, + buffer(), + blocking, + (const ::size_t *)buffer_offset, + (const ::size_t *)host_offset, + (const ::size_t *)region, + buffer_row_pitch, + buffer_slice_pitch, + host_row_pitch, + host_slice_pitch, + ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_WRITE_BUFFER_RECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueCopyBufferRect( + const Buffer& src, + const Buffer& dst, + const size_t<3>& src_origin, + const size_t<3>& dst_origin, + const size_t<3>& region, + ::size_t src_row_pitch, + ::size_t src_slice_pitch, + ::size_t dst_row_pitch, + ::size_t dst_slice_pitch, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueCopyBufferRect( + object_, + src(), + dst(), + (const ::size_t *)src_origin, + (const ::size_t *)dst_origin, + (const ::size_t *)region, + src_row_pitch, + src_slice_pitch, + dst_row_pitch, + dst_slice_pitch, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_COPY_BUFFER_RECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + +#if defined(CL_VERSION_1_2) + /** + * Enqueue a command to fill a buffer object with a pattern + * of a given size. The pattern is specified a as vector. + * \tparam PatternType The datatype of the pattern field. + * The pattern type must be an accepted OpenCL data type. + */ + template + cl_int enqueueFillBuffer( + const Buffer& buffer, + PatternType pattern, + ::size_t offset, + ::size_t size, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueFillBuffer( + object_, + buffer(), + static_cast(&pattern), + sizeof(PatternType), + offset, + size, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_FILL_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif // #if defined(CL_VERSION_1_2) + + cl_int enqueueReadImage( + const Image& image, + cl_bool blocking, + const size_t<3>& origin, + const size_t<3>& region, + ::size_t row_pitch, + ::size_t slice_pitch, + void* ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueReadImage( + object_, image(), blocking, (const ::size_t *) origin, + (const ::size_t *) region, row_pitch, slice_pitch, ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_READ_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueWriteImage( + const Image& image, + cl_bool blocking, + const size_t<3>& origin, + const size_t<3>& region, + ::size_t row_pitch, + ::size_t slice_pitch, + void* ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueWriteImage( + object_, image(), blocking, (const ::size_t *) origin, + (const ::size_t *) region, row_pitch, slice_pitch, ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_WRITE_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueCopyImage( + const Image& src, + const Image& dst, + const size_t<3>& src_origin, + const size_t<3>& dst_origin, + const size_t<3>& region, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueCopyImage( + object_, src(), dst(), (const ::size_t *) src_origin, + (const ::size_t *)dst_origin, (const ::size_t *) region, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_COPY_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + +#if defined(CL_VERSION_1_2) + /** + * Enqueue a command to fill an image object with a specified color. + * \param fillColor is the color to use to fill the image. + * This is a four component RGBA floating-point color value if + * the image channel data type is not an unnormalized signed or + * unsigned data type. + */ + cl_int enqueueFillImage( + const Image& image, + cl_float4 fillColor, + const size_t<3>& origin, + const size_t<3>& region, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueFillImage( + object_, + image(), + static_cast(&fillColor), + (const ::size_t *) origin, + (const ::size_t *) region, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_FILL_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * Enqueue a command to fill an image object with a specified color. + * \param fillColor is the color to use to fill the image. + * This is a four component RGBA signed integer color value if + * the image channel data type is an unnormalized signed integer + * type. + */ + cl_int enqueueFillImage( + const Image& image, + cl_int4 fillColor, + const size_t<3>& origin, + const size_t<3>& region, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueFillImage( + object_, + image(), + static_cast(&fillColor), + (const ::size_t *) origin, + (const ::size_t *) region, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_FILL_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * Enqueue a command to fill an image object with a specified color. + * \param fillColor is the color to use to fill the image. + * This is a four component RGBA unsigned integer color value if + * the image channel data type is an unnormalized unsigned integer + * type. + */ + cl_int enqueueFillImage( + const Image& image, + cl_uint4 fillColor, + const size_t<3>& origin, + const size_t<3>& region, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueFillImage( + object_, + image(), + static_cast(&fillColor), + (const ::size_t *) origin, + (const ::size_t *) region, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_FILL_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif // #if defined(CL_VERSION_1_2) + + cl_int enqueueCopyImageToBuffer( + const Image& src, + const Buffer& dst, + const size_t<3>& src_origin, + const size_t<3>& region, + ::size_t dst_offset, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueCopyImageToBuffer( + object_, src(), dst(), (const ::size_t *) src_origin, + (const ::size_t *) region, dst_offset, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_COPY_IMAGE_TO_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueCopyBufferToImage( + const Buffer& src, + const Image& dst, + ::size_t src_offset, + const size_t<3>& dst_origin, + const size_t<3>& region, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueCopyBufferToImage( + object_, src(), dst(), src_offset, + (const ::size_t *) dst_origin, (const ::size_t *) region, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_COPY_BUFFER_TO_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + void* enqueueMapBuffer( + const Buffer& buffer, + cl_bool blocking, + cl_map_flags flags, + ::size_t offset, + ::size_t size, + const VECTOR_CLASS* events = NULL, + Event* event = NULL, + cl_int* err = NULL) const + { + cl_int error; + void * result = ::clEnqueueMapBuffer( + object_, buffer(), blocking, flags, offset, size, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (cl_event*) event, + &error); + + detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + return result; + } + + void* enqueueMapImage( + const Image& buffer, + cl_bool blocking, + cl_map_flags flags, + const size_t<3>& origin, + const size_t<3>& region, + ::size_t * row_pitch, + ::size_t * slice_pitch, + const VECTOR_CLASS* events = NULL, + Event* event = NULL, + cl_int* err = NULL) const + { + cl_int error; + void * result = ::clEnqueueMapImage( + object_, buffer(), blocking, flags, + (const ::size_t *) origin, (const ::size_t *) region, + row_pitch, slice_pitch, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (cl_event*) event, + &error); + + detail::errHandler(error, __ENQUEUE_MAP_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + return result; + } + + cl_int enqueueUnmapMemObject( + const Memory& memory, + void* mapped_ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueUnmapMemObject( + object_, memory(), mapped_ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + +#if defined(CL_VERSION_1_2) + /** + * Enqueues a marker command which waits for either a list of events to complete, + * or all previously enqueued commands to complete. + * + * Enqueues a marker command which waits for either a list of events to complete, + * or if the list is empty it waits for all commands previously enqueued in command_queue + * to complete before it completes. This command returns an event which can be waited on, + * i.e. this event can be waited on to insure that all events either in the event_wait_list + * or all previously enqueued commands, queued before this command to command_queue, + * have completed. + */ + cl_int enqueueMarkerWithWaitList( + const VECTOR_CLASS *events = 0, + Event *event = 0) + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueMarkerWithWaitList( + object_, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_MARKER_WAIT_LIST_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * A synchronization point that enqueues a barrier operation. + * + * Enqueues a barrier command which waits for either a list of events to complete, + * or if the list is empty it waits for all commands previously enqueued in command_queue + * to complete before it completes. This command blocks command execution, that is, any + * following commands enqueued after it do not execute until it completes. This command + * returns an event which can be waited on, i.e. this event can be waited on to insure that + * all events either in the event_wait_list or all previously enqueued commands, queued + * before this command to command_queue, have completed. + */ + cl_int enqueueBarrierWithWaitList( + const VECTOR_CLASS *events = 0, + Event *event = 0) + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueBarrierWithWaitList( + object_, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_BARRIER_WAIT_LIST_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * Enqueues a command to indicate with which device a set of memory objects + * should be associated. + */ + cl_int enqueueMigrateMemObjects( + const VECTOR_CLASS &memObjects, + cl_mem_migration_flags flags, + const VECTOR_CLASS* events = NULL, + Event* event = NULL + ) + { + cl_event tmp; + + cl_mem* localMemObjects = static_cast(alloca(memObjects.size() * sizeof(cl_mem))); + for( int i = 0; i < (int)memObjects.size(); ++i ) { + localMemObjects[i] = memObjects[i](); + } + + + cl_int err = detail::errHandler( + ::clEnqueueMigrateMemObjects( + object_, + (cl_uint)memObjects.size(), + static_cast(localMemObjects), + flags, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif // #if defined(CL_VERSION_1_2) + + cl_int enqueueNDRangeKernel( + const Kernel& kernel, + const NDRange& offset, + const NDRange& global, + const NDRange& local = NullRange, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueNDRangeKernel( + object_, kernel(), (cl_uint) global.dimensions(), + offset.dimensions() != 0 ? (const ::size_t*) offset : NULL, + (const ::size_t*) global, + local.dimensions() != 0 ? (const ::size_t*) local : NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_NDRANGE_KERNEL_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueTask( + const Kernel& kernel, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueTask( + object_, kernel(), + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_TASK_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueNativeKernel( + void (CL_CALLBACK *userFptr)(void *), + std::pair args, + const VECTOR_CLASS* mem_objects = NULL, + const VECTOR_CLASS* mem_locs = NULL, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_mem * mems = (mem_objects != NULL && mem_objects->size() > 0) + ? (cl_mem*) alloca(mem_objects->size() * sizeof(cl_mem)) + : NULL; + + if (mems != NULL) { + for (unsigned int i = 0; i < mem_objects->size(); i++) { + mems[i] = ((*mem_objects)[i])(); + } + } + + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueNativeKernel( + object_, userFptr, args.first, args.second, + (mem_objects != NULL) ? (cl_uint) mem_objects->size() : 0, + mems, + (mem_locs != NULL) ? (const void **) &mem_locs->front() : NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_NATIVE_KERNEL); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + +/** + * Deprecated APIs for 1.2 + */ +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) || (defined(CL_VERSION_1_1) && !defined(CL_VERSION_1_2)) + CL_EXT_PREFIX__VERSION_1_1_DEPRECATED + cl_int enqueueMarker(Event* event = NULL) const CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED + { + return detail::errHandler( + ::clEnqueueMarker(object_, (cl_event*) event), + __ENQUEUE_MARKER_ERR); + } + + CL_EXT_PREFIX__VERSION_1_1_DEPRECATED + cl_int enqueueWaitForEvents(const VECTOR_CLASS& events) const CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED + { + return detail::errHandler( + ::clEnqueueWaitForEvents( + object_, + (cl_uint) events.size(), + (const cl_event*) &events.front()), + __ENQUEUE_WAIT_FOR_EVENTS_ERR); + } +#endif // #if defined(CL_VERSION_1_1) + + cl_int enqueueAcquireGLObjects( + const VECTOR_CLASS* mem_objects = NULL, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueAcquireGLObjects( + object_, + (mem_objects != NULL) ? (cl_uint) mem_objects->size() : 0, + (mem_objects != NULL) ? (const cl_mem *) &mem_objects->front(): NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_ACQUIRE_GL_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueReleaseGLObjects( + const VECTOR_CLASS* mem_objects = NULL, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueReleaseGLObjects( + object_, + (mem_objects != NULL) ? (cl_uint) mem_objects->size() : 0, + (mem_objects != NULL) ? (const cl_mem *) &mem_objects->front(): NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_RELEASE_GL_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + +#if defined (USE_DX_INTEROP) +typedef CL_API_ENTRY cl_int (CL_API_CALL *PFN_clEnqueueAcquireD3D10ObjectsKHR)( + cl_command_queue command_queue, cl_uint num_objects, + const cl_mem* mem_objects, cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, cl_event* event); +typedef CL_API_ENTRY cl_int (CL_API_CALL *PFN_clEnqueueReleaseD3D10ObjectsKHR)( + cl_command_queue command_queue, cl_uint num_objects, + const cl_mem* mem_objects, cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, cl_event* event); + + cl_int enqueueAcquireD3D10Objects( + const VECTOR_CLASS* mem_objects = NULL, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + static PFN_clEnqueueAcquireD3D10ObjectsKHR pfn_clEnqueueAcquireD3D10ObjectsKHR = NULL; +#if defined(CL_VERSION_1_2) + cl_context context = getInfo(); + cl::Device device(getInfo()); + cl_platform_id platform = device.getInfo(); + __INIT_CL_EXT_FCN_PTR_PLATFORM(platform, clEnqueueAcquireD3D10ObjectsKHR); +#endif +#if defined(CL_VERSION_1_1) + __INIT_CL_EXT_FCN_PTR(clEnqueueAcquireD3D10ObjectsKHR); +#endif + + cl_event tmp; + cl_int err = detail::errHandler( + pfn_clEnqueueAcquireD3D10ObjectsKHR( + object_, + (mem_objects != NULL) ? (cl_uint) mem_objects->size() : 0, + (mem_objects != NULL) ? (const cl_mem *) &mem_objects->front(): NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_ACQUIRE_GL_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueReleaseD3D10Objects( + const VECTOR_CLASS* mem_objects = NULL, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) const + { + static PFN_clEnqueueReleaseD3D10ObjectsKHR pfn_clEnqueueReleaseD3D10ObjectsKHR = NULL; +#if defined(CL_VERSION_1_2) + cl_context context = getInfo(); + cl::Device device(getInfo()); + cl_platform_id platform = device.getInfo(); + __INIT_CL_EXT_FCN_PTR_PLATFORM(platform, clEnqueueReleaseD3D10ObjectsKHR); +#endif // #if defined(CL_VERSION_1_2) +#if defined(CL_VERSION_1_1) + __INIT_CL_EXT_FCN_PTR(clEnqueueReleaseD3D10ObjectsKHR); +#endif // #if defined(CL_VERSION_1_1) + + cl_event tmp; + cl_int err = detail::errHandler( + pfn_clEnqueueReleaseD3D10ObjectsKHR( + object_, + (mem_objects != NULL) ? (cl_uint) mem_objects->size() : 0, + (mem_objects != NULL) ? (const cl_mem *) &mem_objects->front(): NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_RELEASE_GL_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif + +/** + * Deprecated APIs for 1.2 + */ +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) || (defined(CL_VERSION_1_1) && !defined(CL_VERSION_1_2)) + CL_EXT_PREFIX__VERSION_1_1_DEPRECATED + cl_int enqueueBarrier() const CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED + { + return detail::errHandler( + ::clEnqueueBarrier(object_), + __ENQUEUE_BARRIER_ERR); + } +#endif // #if defined(CL_VERSION_1_1) + + cl_int flush() const + { + return detail::errHandler(::clFlush(object_), __FLUSH_ERR); + } + + cl_int finish() const + { + return detail::errHandler(::clFinish(object_), __FINISH_ERR); + } +}; + +#ifdef _WIN32 +__declspec(selectany) volatile int CommandQueue::default_initialized_ = __DEFAULT_NOT_INITIALIZED; +__declspec(selectany) CommandQueue CommandQueue::default_; +__declspec(selectany) volatile cl_int CommandQueue::default_error_ = CL_SUCCESS; +#else +__attribute__((weak)) volatile int CommandQueue::default_initialized_ = __DEFAULT_NOT_INITIALIZED; +__attribute__((weak)) CommandQueue CommandQueue::default_; +__attribute__((weak)) volatile cl_int CommandQueue::default_error_ = CL_SUCCESS; +#endif + +template< typename IteratorType > +Buffer::Buffer( + const Context &context, + IteratorType startIterator, + IteratorType endIterator, + bool readOnly, + bool useHostPtr, + cl_int* err) +{ + typedef typename std::iterator_traits::value_type DataType; + cl_int error; + + cl_mem_flags flags = 0; + if( readOnly ) { + flags |= CL_MEM_READ_ONLY; + } + else { + flags |= CL_MEM_READ_WRITE; + } + if( useHostPtr ) { + flags |= CL_MEM_USE_HOST_PTR; + } + + ::size_t size = sizeof(DataType)*(endIterator - startIterator); + + if( useHostPtr ) { + object_ = ::clCreateBuffer(context(), flags, size, static_cast(&*startIterator), &error); + } else { + object_ = ::clCreateBuffer(context(), flags, size, 0, &error); + } + + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + + if( !useHostPtr ) { + CommandQueue queue(context, 0, &error); + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + + error = cl::copy(queue, startIterator, endIterator, *this); + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } +} + +inline cl_int enqueueReadBuffer( + const Buffer& buffer, + cl_bool blocking, + ::size_t offset, + ::size_t size, + void* ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueReadBuffer(buffer, blocking, offset, size, ptr, events, event); +} + +inline cl_int enqueueWriteBuffer( + const Buffer& buffer, + cl_bool blocking, + ::size_t offset, + ::size_t size, + const void* ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueWriteBuffer(buffer, blocking, offset, size, ptr, events, event); +} + +inline void* enqueueMapBuffer( + const Buffer& buffer, + cl_bool blocking, + cl_map_flags flags, + ::size_t offset, + ::size_t size, + const VECTOR_CLASS* events = NULL, + Event* event = NULL, + cl_int* err = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + + void * result = ::clEnqueueMapBuffer( + queue(), buffer(), blocking, flags, offset, size, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (cl_event*) event, + &error); + + detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + return result; +} + +inline cl_int enqueueUnmapMemObject( + const Memory& memory, + void* mapped_ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + if (error != CL_SUCCESS) { + return error; + } + + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueUnmapMemObject( + queue(), memory(), mapped_ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; +} + +inline cl_int enqueueCopyBuffer( + const Buffer& src, + const Buffer& dst, + ::size_t src_offset, + ::size_t dst_offset, + ::size_t size, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueCopyBuffer(src, dst, src_offset, dst_offset, size, events, event); +} + +/** + * Blocking copy operation between iterators and a buffer. + * Host to Device. + * Uses default command queue. + */ +template< typename IteratorType > +inline cl_int copy( IteratorType startIterator, IteratorType endIterator, cl::Buffer &buffer ) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + if (error != CL_SUCCESS) + return error; + + return cl::copy(queue, startIterator, endIterator, buffer); +} + +/** + * Blocking copy operation between iterators and a buffer. + * Device to Host. + * Uses default command queue. + */ +template< typename IteratorType > +inline cl_int copy( const cl::Buffer &buffer, IteratorType startIterator, IteratorType endIterator ) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + if (error != CL_SUCCESS) + return error; + + return cl::copy(queue, buffer, startIterator, endIterator); +} + +/** + * Blocking copy operation between iterators and a buffer. + * Host to Device. + * Uses specified queue. + */ +template< typename IteratorType > +inline cl_int copy( const CommandQueue &queue, IteratorType startIterator, IteratorType endIterator, cl::Buffer &buffer ) +{ + typedef typename std::iterator_traits::value_type DataType; + cl_int error; + + ::size_t length = endIterator-startIterator; + ::size_t byteLength = length*sizeof(DataType); + + DataType *pointer = + static_cast(queue.enqueueMapBuffer(buffer, CL_TRUE, CL_MAP_WRITE, 0, byteLength, 0, 0, &error)); + // if exceptions enabled, enqueueMapBuffer will throw + if( error != CL_SUCCESS ) { + return error; + } +#if defined(_MSC_VER) + std::copy( + startIterator, + endIterator, + stdext::checked_array_iterator( + pointer, length)); +#else + std::copy(startIterator, endIterator, pointer); +#endif + Event endEvent; + error = queue.enqueueUnmapMemObject(buffer, pointer, 0, &endEvent); + // if exceptions enabled, enqueueUnmapMemObject will throw + if( error != CL_SUCCESS ) { + return error; + } + endEvent.wait(); + return CL_SUCCESS; +} + +/** + * Blocking copy operation between iterators and a buffer. + * Device to Host. + * Uses specified queue. + */ +template< typename IteratorType > +inline cl_int copy( const CommandQueue &queue, const cl::Buffer &buffer, IteratorType startIterator, IteratorType endIterator ) +{ + typedef typename std::iterator_traits::value_type DataType; + cl_int error; + + ::size_t length = endIterator-startIterator; + ::size_t byteLength = length*sizeof(DataType); + + DataType *pointer = + static_cast(queue.enqueueMapBuffer(buffer, CL_TRUE, CL_MAP_READ, 0, byteLength, 0, 0, &error)); + // if exceptions enabled, enqueueMapBuffer will throw + if( error != CL_SUCCESS ) { + return error; + } + std::copy(pointer, pointer + length, startIterator); + Event endEvent; + error = queue.enqueueUnmapMemObject(buffer, pointer, 0, &endEvent); + // if exceptions enabled, enqueueUnmapMemObject will throw + if( error != CL_SUCCESS ) { + return error; + } + endEvent.wait(); + return CL_SUCCESS; +} + +#if defined(CL_VERSION_1_1) +inline cl_int enqueueReadBufferRect( + const Buffer& buffer, + cl_bool blocking, + const size_t<3>& buffer_offset, + const size_t<3>& host_offset, + const size_t<3>& region, + ::size_t buffer_row_pitch, + ::size_t buffer_slice_pitch, + ::size_t host_row_pitch, + ::size_t host_slice_pitch, + void *ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueReadBufferRect( + buffer, + blocking, + buffer_offset, + host_offset, + region, + buffer_row_pitch, + buffer_slice_pitch, + host_row_pitch, + host_slice_pitch, + ptr, + events, + event); +} + +inline cl_int enqueueWriteBufferRect( + const Buffer& buffer, + cl_bool blocking, + const size_t<3>& buffer_offset, + const size_t<3>& host_offset, + const size_t<3>& region, + ::size_t buffer_row_pitch, + ::size_t buffer_slice_pitch, + ::size_t host_row_pitch, + ::size_t host_slice_pitch, + void *ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueWriteBufferRect( + buffer, + blocking, + buffer_offset, + host_offset, + region, + buffer_row_pitch, + buffer_slice_pitch, + host_row_pitch, + host_slice_pitch, + ptr, + events, + event); +} + +inline cl_int enqueueCopyBufferRect( + const Buffer& src, + const Buffer& dst, + const size_t<3>& src_origin, + const size_t<3>& dst_origin, + const size_t<3>& region, + ::size_t src_row_pitch, + ::size_t src_slice_pitch, + ::size_t dst_row_pitch, + ::size_t dst_slice_pitch, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueCopyBufferRect( + src, + dst, + src_origin, + dst_origin, + region, + src_row_pitch, + src_slice_pitch, + dst_row_pitch, + dst_slice_pitch, + events, + event); +} +#endif + +inline cl_int enqueueReadImage( + const Image& image, + cl_bool blocking, + const size_t<3>& origin, + const size_t<3>& region, + ::size_t row_pitch, + ::size_t slice_pitch, + void* ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueReadImage( + image, + blocking, + origin, + region, + row_pitch, + slice_pitch, + ptr, + events, + event); +} + +inline cl_int enqueueWriteImage( + const Image& image, + cl_bool blocking, + const size_t<3>& origin, + const size_t<3>& region, + ::size_t row_pitch, + ::size_t slice_pitch, + void* ptr, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueWriteImage( + image, + blocking, + origin, + region, + row_pitch, + slice_pitch, + ptr, + events, + event); +} + +inline cl_int enqueueCopyImage( + const Image& src, + const Image& dst, + const size_t<3>& src_origin, + const size_t<3>& dst_origin, + const size_t<3>& region, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueCopyImage( + src, + dst, + src_origin, + dst_origin, + region, + events, + event); +} + +inline cl_int enqueueCopyImageToBuffer( + const Image& src, + const Buffer& dst, + const size_t<3>& src_origin, + const size_t<3>& region, + ::size_t dst_offset, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueCopyImageToBuffer( + src, + dst, + src_origin, + region, + dst_offset, + events, + event); +} + +inline cl_int enqueueCopyBufferToImage( + const Buffer& src, + const Image& dst, + ::size_t src_offset, + const size_t<3>& dst_origin, + const size_t<3>& region, + const VECTOR_CLASS* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueCopyBufferToImage( + src, + dst, + src_offset, + dst_origin, + region, + events, + event); +} + + +inline cl_int flush(void) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.flush(); +} + +inline cl_int finish(void) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + + return queue.finish(); +} + +// Kernel Functor support +// New interface as of September 2011 +// Requires the C++11 std::tr1::function (note do not support TR1) +// Visual Studio 2010 and GCC 4.2 + +struct EnqueueArgs +{ + CommandQueue queue_; + const NDRange offset_; + const NDRange global_; + const NDRange local_; + VECTOR_CLASS events_; + + EnqueueArgs(NDRange global) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(NullRange) + { + + } + + EnqueueArgs(NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(local) + { + + } + + EnqueueArgs(NDRange offset, NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(offset), + global_(global), + local_(local) + { + + } + + EnqueueArgs(Event e, NDRange global) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(NullRange) + { + events_.push_back(e); + } + + EnqueueArgs(Event e, NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(local) + { + events_.push_back(e); + } + + EnqueueArgs(Event e, NDRange offset, NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(offset), + global_(global), + local_(local) + { + events_.push_back(e); + } + + EnqueueArgs(const VECTOR_CLASS &events, NDRange global) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(NullRange), + events_(events) + { + + } + + EnqueueArgs(const VECTOR_CLASS &events, NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(local), + events_(events) + { + + } + + EnqueueArgs(const VECTOR_CLASS &events, NDRange offset, NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(offset), + global_(global), + local_(local), + events_(events) + { + + } + + EnqueueArgs(CommandQueue &queue, NDRange global) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(NullRange) + { + + } + + EnqueueArgs(CommandQueue &queue, NDRange global, NDRange local) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(local) + { + + } + + EnqueueArgs(CommandQueue &queue, NDRange offset, NDRange global, NDRange local) : + queue_(queue), + offset_(offset), + global_(global), + local_(local) + { + + } + + EnqueueArgs(CommandQueue &queue, Event e, NDRange global) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(NullRange) + { + events_.push_back(e); + } + + EnqueueArgs(CommandQueue &queue, Event e, NDRange global, NDRange local) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(local) + { + events_.push_back(e); + } + + EnqueueArgs(CommandQueue &queue, Event e, NDRange offset, NDRange global, NDRange local) : + queue_(queue), + offset_(offset), + global_(global), + local_(local) + { + events_.push_back(e); + } + + EnqueueArgs(CommandQueue &queue, const VECTOR_CLASS &events, NDRange global) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(NullRange), + events_(events) + { + + } + + EnqueueArgs(CommandQueue &queue, const VECTOR_CLASS &events, NDRange global, NDRange local) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(local), + events_(events) + { + + } + + EnqueueArgs(CommandQueue &queue, const VECTOR_CLASS &events, NDRange offset, NDRange global, NDRange local) : + queue_(queue), + offset_(offset), + global_(global), + local_(local), + events_(events) + { + + } +}; + +namespace detail { + +class NullType {}; + +template +struct SetArg +{ + static void set (Kernel kernel, T0 arg) + { + kernel.setArg(index, arg); + } +}; + +template +struct SetArg +{ + static void set (Kernel, NullType) + { + } +}; + +template < + typename T0, typename T1, typename T2, typename T3, + typename T4, typename T5, typename T6, typename T7, + typename T8, typename T9, typename T10, typename T11, + typename T12, typename T13, typename T14, typename T15, + typename T16, typename T17, typename T18, typename T19, + typename T20, typename T21, typename T22, typename T23, + typename T24, typename T25, typename T26, typename T27, + typename T28, typename T29, typename T30, typename T31 +> +class KernelFunctorGlobal +{ +private: + Kernel kernel_; + +public: + KernelFunctorGlobal( + Kernel kernel) : + kernel_(kernel) + {} + + KernelFunctorGlobal( + const Program& program, + const STRING_CLASS name, + cl_int * err = NULL) : + kernel_(program, name.c_str(), err) + {} + + Event operator() ( + const EnqueueArgs& args, + T0 t0, + T1 t1 = NullType(), + T2 t2 = NullType(), + T3 t3 = NullType(), + T4 t4 = NullType(), + T5 t5 = NullType(), + T6 t6 = NullType(), + T7 t7 = NullType(), + T8 t8 = NullType(), + T9 t9 = NullType(), + T10 t10 = NullType(), + T11 t11 = NullType(), + T12 t12 = NullType(), + T13 t13 = NullType(), + T14 t14 = NullType(), + T15 t15 = NullType(), + T16 t16 = NullType(), + T17 t17 = NullType(), + T18 t18 = NullType(), + T19 t19 = NullType(), + T20 t20 = NullType(), + T21 t21 = NullType(), + T22 t22 = NullType(), + T23 t23 = NullType(), + T24 t24 = NullType(), + T25 t25 = NullType(), + T26 t26 = NullType(), + T27 t27 = NullType(), + T28 t28 = NullType(), + T29 t29 = NullType(), + T30 t30 = NullType(), + T31 t31 = NullType() + ) + { + Event event; + SetArg<0, T0>::set(kernel_, t0); + SetArg<1, T1>::set(kernel_, t1); + SetArg<2, T2>::set(kernel_, t2); + SetArg<3, T3>::set(kernel_, t3); + SetArg<4, T4>::set(kernel_, t4); + SetArg<5, T5>::set(kernel_, t5); + SetArg<6, T6>::set(kernel_, t6); + SetArg<7, T7>::set(kernel_, t7); + SetArg<8, T8>::set(kernel_, t8); + SetArg<9, T9>::set(kernel_, t9); + SetArg<10, T10>::set(kernel_, t10); + SetArg<11, T11>::set(kernel_, t11); + SetArg<12, T12>::set(kernel_, t12); + SetArg<13, T13>::set(kernel_, t13); + SetArg<14, T14>::set(kernel_, t14); + SetArg<15, T15>::set(kernel_, t15); + SetArg<16, T16>::set(kernel_, t16); + SetArg<17, T17>::set(kernel_, t17); + SetArg<18, T18>::set(kernel_, t18); + SetArg<19, T19>::set(kernel_, t19); + SetArg<20, T20>::set(kernel_, t20); + SetArg<21, T21>::set(kernel_, t21); + SetArg<22, T22>::set(kernel_, t22); + SetArg<23, T23>::set(kernel_, t23); + SetArg<24, T24>::set(kernel_, t24); + SetArg<25, T25>::set(kernel_, t25); + SetArg<26, T26>::set(kernel_, t26); + SetArg<27, T27>::set(kernel_, t27); + SetArg<28, T28>::set(kernel_, t28); + SetArg<29, T29>::set(kernel_, t29); + SetArg<30, T30>::set(kernel_, t30); + SetArg<31, T31>::set(kernel_, t31); + + args.queue_.enqueueNDRangeKernel( + kernel_, + args.offset_, + args.global_, + args.local_, + &args.events_, + &event); + + return event; + } + +}; + +//------------------------------------------------------------------------------------------------------ + + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21, + typename T22, + typename T23, + typename T24, + typename T25, + typename T26, + typename T27, + typename T28, + typename T29, + typename T30, + typename T31> +struct functionImplementation_ +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28, + T29, + T30, + T31> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 32)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28, + T29, + T30, + T31); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21, + T22 arg22, + T23 arg23, + T24 arg24, + T25 arg25, + T26 arg26, + T27 arg27, + T28 arg28, + T29 arg29, + T30 arg30, + T31 arg31) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21, + arg22, + arg23, + arg24, + arg25, + arg26, + arg27, + arg28, + arg29, + arg30, + arg31); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21, + typename T22, + typename T23, + typename T24, + typename T25, + typename T26, + typename T27, + typename T28, + typename T29, + typename T30> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28, + T29, + T30, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28, + T29, + T30, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 31)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28, + T29, + T30); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21, + T22 arg22, + T23 arg23, + T24 arg24, + T25 arg25, + T26 arg26, + T27 arg27, + T28 arg28, + T29 arg29, + T30 arg30) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21, + arg22, + arg23, + arg24, + arg25, + arg26, + arg27, + arg28, + arg29, + arg30); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21, + typename T22, + typename T23, + typename T24, + typename T25, + typename T26, + typename T27, + typename T28, + typename T29> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28, + T29, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28, + T29, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 30)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28, + T29); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21, + T22 arg22, + T23 arg23, + T24 arg24, + T25 arg25, + T26 arg26, + T27 arg27, + T28 arg28, + T29 arg29) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21, + arg22, + arg23, + arg24, + arg25, + arg26, + arg27, + arg28, + arg29); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21, + typename T22, + typename T23, + typename T24, + typename T25, + typename T26, + typename T27, + typename T28> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 29)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + T28); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21, + T22 arg22, + T23 arg23, + T24 arg24, + T25 arg25, + T26 arg26, + T27 arg27, + T28 arg28) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21, + arg22, + arg23, + arg24, + arg25, + arg26, + arg27, + arg28); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21, + typename T22, + typename T23, + typename T24, + typename T25, + typename T26, + typename T27> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 28)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + T27); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21, + T22 arg22, + T23 arg23, + T24 arg24, + T25 arg25, + T26 arg26, + T27 arg27) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21, + arg22, + arg23, + arg24, + arg25, + arg26, + arg27); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21, + typename T22, + typename T23, + typename T24, + typename T25, + typename T26> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 27)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + T26); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21, + T22 arg22, + T23 arg23, + T24 arg24, + T25 arg25, + T26 arg26) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21, + arg22, + arg23, + arg24, + arg25, + arg26); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21, + typename T22, + typename T23, + typename T24, + typename T25> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 26)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + T25); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21, + T22 arg22, + T23 arg23, + T24 arg24, + T25 arg25) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21, + arg22, + arg23, + arg24, + arg25); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21, + typename T22, + typename T23, + typename T24> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 25)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + T24); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21, + T22 arg22, + T23 arg23, + T24 arg24) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21, + arg22, + arg23, + arg24); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21, + typename T22, + typename T23> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 24)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + T23); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21, + T22 arg22, + T23 arg23) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21, + arg22, + arg23); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21, + typename T22> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 23)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + T22); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21, + T22 arg22) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21, + arg22); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20, + typename T21> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 22)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + T21); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20, + T21 arg21) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20, + arg21); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19, + typename T20> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 21)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + T20); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19, + T20 arg20) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19, + arg20); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18, + typename T19> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 20)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + T19); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18, + T19 arg19) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18, + arg19); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17, + typename T18> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 19)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + T18); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17, + T18 arg18) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17, + arg18); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16, + typename T17> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 18)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + T17); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16, + T17 arg17) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16, + arg17); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15, + typename T16> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 17)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + T16); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15, + T16 arg16) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15, + arg16); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14, + typename T15> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 16)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + T15); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14, + T15 arg15) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14, + arg15); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13, + typename T14> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 15)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + T14); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13, + T14 arg14) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13, + arg14); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12, + typename T13> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 14)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + T13); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12, + T13 arg13) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12, + arg13); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11, + typename T12> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 13)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + T12); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11, + T12 arg12) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11, + arg12); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10, + typename T11> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 12)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + T11); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10, + T11 arg11) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10, + arg11); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9, + typename T10> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 11)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + T10); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9, + T10 arg10) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9, + arg10); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8, + typename T9> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 10)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + T9); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8, + T9 arg9) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8, + arg9); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7, + typename T8> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 9)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + T8); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7, + T8 arg8) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7, + arg8); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6, + typename T7> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 8)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6, + T7); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6, + T7 arg7) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6, + arg7); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5, + typename T6> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + T6, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + T6, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 7)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5, + T6); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5, + T6 arg6) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5, + arg6); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4, + typename T5> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + T5, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + T5, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 6)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4, + T5); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4, + T5 arg5) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4, + arg5); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3, + typename T4> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + T4, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + T4, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 5)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3, + T4); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3, + T4 arg4) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3, + arg4); + } + + +}; + +template< + typename T0, + typename T1, + typename T2, + typename T3> +struct functionImplementation_ +< T0, + T1, + T2, + T3, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + T3, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 4)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2, + T3); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2, + T3 arg3) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2, + arg3); + } + + +}; + +template< + typename T0, + typename T1, + typename T2> +struct functionImplementation_ +< T0, + T1, + T2, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + T2, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 3)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1, + T2); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1, + T2 arg2) + { + return functor_( + enqueueArgs, + arg0, + arg1, + arg2); + } + + +}; + +template< + typename T0, + typename T1> +struct functionImplementation_ +< T0, + T1, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + T1, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 2)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0, + T1); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0, + T1 arg1) + { + return functor_( + enqueueArgs, + arg0, + arg1); + } + + +}; + +template< + typename T0> +struct functionImplementation_ +< T0, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> +{ + typedef detail::KernelFunctorGlobal< + T0, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType, + NullType> FunctorType; + + FunctorType functor_; + + functionImplementation_(const FunctorType &functor) : + functor_(functor) + { + + #if (defined(_WIN32) && defined(_VARIADIC_MAX) && (_VARIADIC_MAX < 1)) + // Fail variadic expansion for dev11 + static_assert(0, "Visual Studio has a hard limit of argument count for a std::function expansion. Please define _VARIADIC_MAX to be 10. If you need more arguments than that VC12 and below cannot support it."); + #endif + + } + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + T0); + + Event operator()( + const EnqueueArgs& enqueueArgs, + T0 arg0) + { + return functor_( + enqueueArgs, + arg0); + } + + +}; + + + + + +} // namespace detail + +//---------------------------------------------------------------------------------------------- + +template < + typename T0, typename T1 = detail::NullType, typename T2 = detail::NullType, + typename T3 = detail::NullType, typename T4 = detail::NullType, + typename T5 = detail::NullType, typename T6 = detail::NullType, + typename T7 = detail::NullType, typename T8 = detail::NullType, + typename T9 = detail::NullType, typename T10 = detail::NullType, + typename T11 = detail::NullType, typename T12 = detail::NullType, + typename T13 = detail::NullType, typename T14 = detail::NullType, + typename T15 = detail::NullType, typename T16 = detail::NullType, + typename T17 = detail::NullType, typename T18 = detail::NullType, + typename T19 = detail::NullType, typename T20 = detail::NullType, + typename T21 = detail::NullType, typename T22 = detail::NullType, + typename T23 = detail::NullType, typename T24 = detail::NullType, + typename T25 = detail::NullType, typename T26 = detail::NullType, + typename T27 = detail::NullType, typename T28 = detail::NullType, + typename T29 = detail::NullType, typename T30 = detail::NullType, + typename T31 = detail::NullType +> +struct make_kernel : + public detail::functionImplementation_< + T0, T1, T2, T3, + T4, T5, T6, T7, + T8, T9, T10, T11, + T12, T13, T14, T15, + T16, T17, T18, T19, + T20, T21, T22, T23, + T24, T25, T26, T27, + T28, T29, T30, T31 + > +{ +public: + typedef detail::KernelFunctorGlobal< + T0, T1, T2, T3, + T4, T5, T6, T7, + T8, T9, T10, T11, + T12, T13, T14, T15, + T16, T17, T18, T19, + T20, T21, T22, T23, + T24, T25, T26, T27, + T28, T29, T30, T31 + > FunctorType; + + make_kernel( + const Program& program, + const STRING_CLASS name, + cl_int * err = NULL) : + detail::functionImplementation_< + T0, T1, T2, T3, + T4, T5, T6, T7, + T8, T9, T10, T11, + T12, T13, T14, T15, + T16, T17, T18, T19, + T20, T21, T22, T23, + T24, T25, T26, T27, + T28, T29, T30, T31 + >( + FunctorType(program, name, err)) + {} + + make_kernel( + const Kernel kernel) : + detail::functionImplementation_< + T0, T1, T2, T3, + T4, T5, T6, T7, + T8, T9, T10, T11, + T12, T13, T14, T15, + T16, T17, T18, T19, + T20, T21, T22, T23, + T24, T25, T26, T27, + T28, T29, T30, T31 + >( + FunctorType(kernel)) + {} +}; + + +//---------------------------------------------------------------------------------------------------------------------- + +#undef __ERR_STR +#if !defined(__CL_USER_OVERRIDE_ERROR_STRINGS) +#undef __GET_DEVICE_INFO_ERR +#undef __GET_PLATFORM_INFO_ERR +#undef __GET_DEVICE_IDS_ERR +#undef __GET_CONTEXT_INFO_ERR +#undef __GET_EVENT_INFO_ERR +#undef __GET_EVENT_PROFILE_INFO_ERR +#undef __GET_MEM_OBJECT_INFO_ERR +#undef __GET_IMAGE_INFO_ERR +#undef __GET_SAMPLER_INFO_ERR +#undef __GET_KERNEL_INFO_ERR +#undef __GET_KERNEL_ARG_INFO_ERR +#undef __GET_KERNEL_WORK_GROUP_INFO_ERR +#undef __GET_PROGRAM_INFO_ERR +#undef __GET_PROGRAM_BUILD_INFO_ERR +#undef __GET_COMMAND_QUEUE_INFO_ERR + +#undef __CREATE_CONTEXT_ERR +#undef __CREATE_CONTEXT_FROM_TYPE_ERR +#undef __GET_SUPPORTED_IMAGE_FORMATS_ERR + +#undef __CREATE_BUFFER_ERR +#undef __CREATE_SUBBUFFER_ERR +#undef __CREATE_IMAGE2D_ERR +#undef __CREATE_IMAGE3D_ERR +#undef __CREATE_SAMPLER_ERR +#undef __SET_MEM_OBJECT_DESTRUCTOR_CALLBACK_ERR + +#undef __CREATE_USER_EVENT_ERR +#undef __SET_USER_EVENT_STATUS_ERR +#undef __SET_EVENT_CALLBACK_ERR +#undef __SET_PRINTF_CALLBACK_ERR + +#undef __WAIT_FOR_EVENTS_ERR + +#undef __CREATE_KERNEL_ERR +#undef __SET_KERNEL_ARGS_ERR +#undef __CREATE_PROGRAM_WITH_SOURCE_ERR +#undef __CREATE_PROGRAM_WITH_BINARY_ERR +#undef __CREATE_PROGRAM_WITH_BUILT_IN_KERNELS_ERR +#undef __BUILD_PROGRAM_ERR +#undef __CREATE_KERNELS_IN_PROGRAM_ERR + +#undef __CREATE_COMMAND_QUEUE_ERR +#undef __SET_COMMAND_QUEUE_PROPERTY_ERR +#undef __ENQUEUE_READ_BUFFER_ERR +#undef __ENQUEUE_WRITE_BUFFER_ERR +#undef __ENQUEUE_READ_BUFFER_RECT_ERR +#undef __ENQUEUE_WRITE_BUFFER_RECT_ERR +#undef __ENQUEUE_COPY_BUFFER_ERR +#undef __ENQUEUE_COPY_BUFFER_RECT_ERR +#undef __ENQUEUE_READ_IMAGE_ERR +#undef __ENQUEUE_WRITE_IMAGE_ERR +#undef __ENQUEUE_COPY_IMAGE_ERR +#undef __ENQUEUE_COPY_IMAGE_TO_BUFFER_ERR +#undef __ENQUEUE_COPY_BUFFER_TO_IMAGE_ERR +#undef __ENQUEUE_MAP_BUFFER_ERR +#undef __ENQUEUE_MAP_IMAGE_ERR +#undef __ENQUEUE_UNMAP_MEM_OBJECT_ERR +#undef __ENQUEUE_NDRANGE_KERNEL_ERR +#undef __ENQUEUE_TASK_ERR +#undef __ENQUEUE_NATIVE_KERNEL + +#undef __CL_EXPLICIT_CONSTRUCTORS + +#undef __UNLOAD_COMPILER_ERR +#endif //__CL_USER_OVERRIDE_ERROR_STRINGS + +#undef __CL_FUNCTION_TYPE + +// Extensions +/** + * Deprecated APIs for 1.2 + */ +#if defined(CL_VERSION_1_1) +#undef __INIT_CL_EXT_FCN_PTR +#endif // #if defined(CL_VERSION_1_1) +#undef __CREATE_SUB_DEVICES + +#if defined(USE_CL_DEVICE_FISSION) +#undef __PARAM_NAME_DEVICE_FISSION +#endif // USE_CL_DEVICE_FISSION + +#undef __DEFAULT_NOT_INITIALIZED +#undef __DEFAULT_BEING_INITIALIZED +#undef __DEFAULT_INITIALIZED + +} // namespace cl + +#ifdef _WIN32 +#pragma pop_macro("max") +#endif // _WIN32 + +#endif // CL_HPP_ diff --git a/benchmarks/new_opencl/runtime/include/CL/cl2.hpp b/benchmarks/new_opencl/runtime/include/CL/cl2.hpp new file mode 100644 index 00000000..da5ee88c --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl2.hpp @@ -0,0 +1,10119 @@ +/******************************************************************************* + * Copyright (c) 2008-2016 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + ******************************************************************************/ + +/*! \file + * + * \brief C++ bindings for OpenCL 1.0 (rev 48), OpenCL 1.1 (rev 33), + * OpenCL 1.2 (rev 15), OpenCL 2.0 (rev 29) and OpenCL 2.1 (rev 17). + * \author Lee Howes and Bruce Merry + * + * Derived from the OpenCL 1.x C++ bindings written by + * Benedict R. Gaster, Laurent Morichetti and Lee Howes + * With additions and fixes from: + * Brian Cole, March 3rd 2010 and April 2012 + * Matt Gruenke, April 2012. + * Bruce Merry, February 2013. + * Tom Deakin and Simon McIntosh-Smith, July 2013 + * James Price, 2015- + * \version 2.1.0 + * \date 2018-12-07 + * + * Optional extension support + * + * cl_ext_device_fission + * #define CL_HPP_USE_CL_DEVICE_FISSION + * cl_khr_d3d10_sharing + * #define CL_HPP_USE_DX_INTEROP + * cl_khr_sub_groups + * #define CL_HPP_USE_CL_SUB_GROUPS_KHR + * cl_khr_image2d_from_buffer + * #define CL_HPP_USE_CL_IMAGE2D_FROM_BUFFER_KHR + * + * Doxygen documentation for this header is available here: + * + * http://khronosgroup.github.io/OpenCL-CLHPP/ + * + * The latest version of this header can be found on the GitHub releases page: + * + * https://github.com/KhronosGroup/OpenCL-CLHPP/releases + * + * Bugs and patches can be submitted to the GitHub repository: + * + * https://github.com/KhronosGroup/OpenCL-CLHPP + */ + +/*! \mainpage + * \section intro Introduction + * For many large applications C++ is the language of choice and so it seems + * reasonable to define C++ bindings for OpenCL. + * + * The interface is contained with a single C++ header file \em cl2.hpp and all + * definitions are contained within the namespace \em cl. There is no additional + * requirement to include \em cl.h and to use either the C++ or original C + * bindings; it is enough to simply include \em cl2.hpp. + * + * The bindings themselves are lightweight and correspond closely to the + * underlying C API. Using the C++ bindings introduces no additional execution + * overhead. + * + * There are numerous compatibility, portability and memory management + * fixes in the new header as well as additional OpenCL 2.0 features. + * As a result the header is not directly backward compatible and for this + * reason we release it as cl2.hpp rather than a new version of cl.hpp. + * + * + * \section compatibility Compatibility + * Due to the evolution of the underlying OpenCL API the 2.0 C++ bindings + * include an updated approach to defining supported feature versions + * and the range of valid underlying OpenCL runtime versions supported. + * + * The combination of preprocessor macros CL_HPP_TARGET_OPENCL_VERSION and + * CL_HPP_MINIMUM_OPENCL_VERSION control this range. These are three digit + * decimal values representing OpenCL runime versions. The default for + * the target is 200, representing OpenCL 2.0 and the minimum is also + * defined as 200. These settings would use 2.0 API calls only. + * If backward compatibility with a 1.2 runtime is required, the minimum + * version may be set to 120. + * + * Note that this is a compile-time setting, and so affects linking against + * a particular SDK version rather than the versioning of the loaded runtime. + * + * The earlier versions of the header included basic vector and string + * classes based loosely on STL versions. These were difficult to + * maintain and very rarely used. For the 2.0 header we now assume + * the presence of the standard library unless requested otherwise. + * We use std::array, std::vector, std::shared_ptr and std::string + * throughout to safely manage memory and reduce the chance of a + * recurrance of earlier memory management bugs. + * + * These classes are used through typedefs in the cl namespace: + * cl::array, cl::vector, cl::pointer and cl::string. + * In addition cl::allocate_pointer forwards to std::allocate_shared + * by default. + * In all cases these standard library classes can be replaced with + * custom interface-compatible versions using the CL_HPP_NO_STD_ARRAY, + * CL_HPP_NO_STD_VECTOR, CL_HPP_NO_STD_UNIQUE_PTR and + * CL_HPP_NO_STD_STRING macros. + * + * The OpenCL 1.x versions of the C++ bindings included a size_t wrapper + * class to interface with kernel enqueue. This caused unpleasant interactions + * with the standard size_t declaration and led to namespacing bugs. + * In the 2.0 version we have replaced this with a std::array-based interface. + * However, the old behaviour can be regained for backward compatibility + * using the CL_HPP_ENABLE_SIZE_T_COMPATIBILITY macro. + * + * Finally, the program construction interface used a clumsy vector-of-pairs + * design in the earlier versions. We have replaced that with a cleaner + * vector-of-vectors and vector-of-strings design. However, for backward + * compatibility old behaviour can be regained with the + * CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY macro. + * + * In OpenCL 2.0 OpenCL C is not entirely backward compatibility with + * earlier versions. As a result a flag must be passed to the OpenCL C + * compiled to request OpenCL 2.0 compilation of kernels with 1.2 as + * the default in the absence of the flag. + * In some cases the C++ bindings automatically compile code for ease. + * For those cases the compilation defaults to OpenCL C 2.0. + * If this is not wanted, the CL_HPP_CL_1_2_DEFAULT_BUILD macro may + * be specified to assume 1.2 compilation. + * If more fine-grained decisions on a per-kernel bases are required + * then explicit build operations that take the flag should be used. + * + * + * \section parameterization Parameters + * This header may be parameterized by a set of preprocessor macros. + * + * - CL_HPP_TARGET_OPENCL_VERSION + * + * Defines the target OpenCL runtime version to build the header + * against. Defaults to 200, representing OpenCL 2.0. + * + * - CL_HPP_NO_STD_STRING + * + * Do not use the standard library string class. cl::string is not + * defined and may be defined by the user before cl2.hpp is + * included. + * + * - CL_HPP_NO_STD_VECTOR + * + * Do not use the standard library vector class. cl::vector is not + * defined and may be defined by the user before cl2.hpp is + * included. + * + * - CL_HPP_NO_STD_ARRAY + * + * Do not use the standard library array class. cl::array is not + * defined and may be defined by the user before cl2.hpp is + * included. + * + * - CL_HPP_NO_STD_UNIQUE_PTR + * + * Do not use the standard library unique_ptr class. cl::pointer and + * the cl::allocate_pointer functions are not defined and may be + * defined by the user before cl2.hpp is included. + * + * - CL_HPP_ENABLE_DEVICE_FISSION + * + * Enables device fission for OpenCL 1.2 platforms. + * + * - CL_HPP_ENABLE_EXCEPTIONS + * + * Enable exceptions for use in the C++ bindings header. This is the + * preferred error handling mechanism but is not required. + * + * - CL_HPP_ENABLE_SIZE_T_COMPATIBILITY + * + * Backward compatibility option to support cl.hpp-style size_t + * class. Replaces the updated std::array derived version and + * removal of size_t from the namespace. Note that in this case the + * new size_t class is placed in the cl::compatibility namespace and + * thus requires an additional using declaration for direct backward + * compatibility. + * + * - CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY + * + * Enable older vector of pairs interface for construction of + * programs. + * + * - CL_HPP_CL_1_2_DEFAULT_BUILD + * + * Default to OpenCL C 1.2 compilation rather than OpenCL C 2.0 + * applies to use of cl::Program construction and other program + * build variants. + * + * - CL_HPP_USE_CL_SUB_GROUPS_KHR + * + * Enable the cl_khr_subgroups extension. + * + * - CL_HPP_USE_IL_KHR + * + * Enable the cl_khr_il_program extension. + * + * + * \section example Example + * + * The following example shows a general use case for the C++ + * bindings, including support for the optional exception feature and + * also the supplied vector and string classes, see following sections for + * decriptions of these features. + * + * \code + #define CL_HPP_ENABLE_EXCEPTIONS + #define CL_HPP_TARGET_OPENCL_VERSION 200 + + #include + #include + #include + #include + #include + + const int numElements = 32; + + int main(void) + { + // Filter for a 2.0 platform and set it as the default + std::vector platforms; + cl::Platform::get(&platforms); + cl::Platform plat; + for (auto &p : platforms) { + std::string platver = p.getInfo(); + if (platver.find("OpenCL 2.") != std::string::npos) { + plat = p; + } + } + if (plat() == 0) { + std::cout << "No OpenCL 2.0 platform found."; + return -1; + } + + cl::Platform newP = cl::Platform::setDefault(plat); + if (newP != plat) { + std::cout << "Error setting default platform."; + return -1; + } + + // Use C++11 raw string literals for kernel source code + std::string kernel1{R"CLC( + global int globalA; + kernel void updateGlobal() + { + globalA = 75; + } + )CLC"}; + std::string kernel2{R"CLC( + typedef struct { global int *bar; } Foo; + kernel void vectorAdd(global const Foo* aNum, global const int *inputA, global const int *inputB, + global int *output, int val, write_only pipe int outPipe, queue_t childQueue) + { + output[get_global_id(0)] = inputA[get_global_id(0)] + inputB[get_global_id(0)] + val + *(aNum->bar); + write_pipe(outPipe, &val); + queue_t default_queue = get_default_queue(); + ndrange_t ndrange = ndrange_1D(get_global_size(0)/2, get_global_size(0)/2); + + // Have a child kernel write into third quarter of output + enqueue_kernel(default_queue, CLK_ENQUEUE_FLAGS_WAIT_KERNEL, ndrange, + ^{ + output[get_global_size(0)*2 + get_global_id(0)] = + inputA[get_global_size(0)*2 + get_global_id(0)] + inputB[get_global_size(0)*2 + get_global_id(0)] + globalA; + }); + + // Have a child kernel write into last quarter of output + enqueue_kernel(childQueue, CLK_ENQUEUE_FLAGS_WAIT_KERNEL, ndrange, + ^{ + output[get_global_size(0)*3 + get_global_id(0)] = + inputA[get_global_size(0)*3 + get_global_id(0)] + inputB[get_global_size(0)*3 + get_global_id(0)] + globalA + 2; + }); + } + )CLC"}; + + // New simpler string interface style + std::vector programStrings {kernel1, kernel2}; + + cl::Program vectorAddProgram(programStrings); + try { + vectorAddProgram.build("-cl-std=CL2.0"); + } + catch (...) { + // Print build info for all devices + cl_int buildErr = CL_SUCCESS; + auto buildInfo = vectorAddProgram.getBuildInfo(&buildErr); + for (auto &pair : buildInfo) { + std::cerr << pair.second << std::endl << std::endl; + } + + return 1; + } + + typedef struct { int *bar; } Foo; + + // Get and run kernel that initializes the program-scope global + // A test for kernels that take no arguments + auto program2Kernel = + cl::KernelFunctor<>(vectorAddProgram, "updateGlobal"); + program2Kernel( + cl::EnqueueArgs( + cl::NDRange(1))); + + ////////////////// + // SVM allocations + + auto anSVMInt = cl::allocate_svm>(); + *anSVMInt = 5; + cl::SVMAllocator>> svmAllocReadOnly; + auto fooPointer = cl::allocate_pointer(svmAllocReadOnly); + fooPointer->bar = anSVMInt.get(); + cl::SVMAllocator> svmAlloc; + std::vector>> inputA(numElements, 1, svmAlloc); + cl::coarse_svm_vector inputB(numElements, 2, svmAlloc); + + // + ////////////// + + // Traditional cl_mem allocations + std::vector output(numElements, 0xdeadbeef); + cl::Buffer outputBuffer(begin(output), end(output), false); + cl::Pipe aPipe(sizeof(cl_int), numElements / 2); + + // Default command queue, also passed in as a parameter + cl::DeviceCommandQueue defaultDeviceQueue = cl::DeviceCommandQueue::makeDefault( + cl::Context::getDefault(), cl::Device::getDefault()); + + auto vectorAddKernel = + cl::KernelFunctor< + decltype(fooPointer)&, + int*, + cl::coarse_svm_vector&, + cl::Buffer, + int, + cl::Pipe&, + cl::DeviceCommandQueue + >(vectorAddProgram, "vectorAdd"); + + // Ensure that the additional SVM pointer is available to the kernel + // This one was not passed as a parameter + vectorAddKernel.setSVMPointers(anSVMInt); + + // Hand control of coarse allocations to runtime + cl::enqueueUnmapSVM(anSVMInt); + cl::enqueueUnmapSVM(fooPointer); + cl::unmapSVM(inputB); + cl::unmapSVM(output2); + + cl_int error; + vectorAddKernel( + cl::EnqueueArgs( + cl::NDRange(numElements/2), + cl::NDRange(numElements/2)), + fooPointer, + inputA.data(), + inputB, + outputBuffer, + 3, + aPipe, + defaultDeviceQueue, + error + ); + + cl::copy(outputBuffer, begin(output), end(output)); + // Grab the SVM output vector using a map + cl::mapSVM(output2); + + cl::Device d = cl::Device::getDefault(); + + std::cout << "Output:\n"; + for (int i = 1; i < numElements; ++i) { + std::cout << "\t" << output[i] << "\n"; + } + std::cout << "\n\n"; + + return 0; + } + * + * \endcode + * + */ +#ifndef CL_HPP_ +#define CL_HPP_ + +/* Handle deprecated preprocessor definitions. In each case, we only check for + * the old name if the new name is not defined, so that user code can define + * both and hence work with either version of the bindings. + */ +#if !defined(CL_HPP_USE_DX_INTEROP) && defined(USE_DX_INTEROP) +# pragma message("cl2.hpp: USE_DX_INTEROP is deprecated. Define CL_HPP_USE_DX_INTEROP instead") +# define CL_HPP_USE_DX_INTEROP +#endif +#if !defined(CL_HPP_USE_CL_DEVICE_FISSION) && defined(USE_CL_DEVICE_FISSION) +# pragma message("cl2.hpp: USE_CL_DEVICE_FISSION is deprecated. Define CL_HPP_USE_CL_DEVICE_FISSION instead") +# define CL_HPP_USE_CL_DEVICE_FISSION +#endif +#if !defined(CL_HPP_ENABLE_EXCEPTIONS) && defined(__CL_ENABLE_EXCEPTIONS) +# pragma message("cl2.hpp: __CL_ENABLE_EXCEPTIONS is deprecated. Define CL_HPP_ENABLE_EXCEPTIONS instead") +# define CL_HPP_ENABLE_EXCEPTIONS +#endif +#if !defined(CL_HPP_NO_STD_VECTOR) && defined(__NO_STD_VECTOR) +# pragma message("cl2.hpp: __NO_STD_VECTOR is deprecated. Define CL_HPP_NO_STD_VECTOR instead") +# define CL_HPP_NO_STD_VECTOR +#endif +#if !defined(CL_HPP_NO_STD_STRING) && defined(__NO_STD_STRING) +# pragma message("cl2.hpp: __NO_STD_STRING is deprecated. Define CL_HPP_NO_STD_STRING instead") +# define CL_HPP_NO_STD_STRING +#endif +#if defined(VECTOR_CLASS) +# pragma message("cl2.hpp: VECTOR_CLASS is deprecated. Alias cl::vector instead") +#endif +#if defined(STRING_CLASS) +# pragma message("cl2.hpp: STRING_CLASS is deprecated. Alias cl::string instead.") +#endif +#if !defined(CL_HPP_USER_OVERRIDE_ERROR_STRINGS) && defined(__CL_USER_OVERRIDE_ERROR_STRINGS) +# pragma message("cl2.hpp: __CL_USER_OVERRIDE_ERROR_STRINGS is deprecated. Define CL_HPP_USER_OVERRIDE_ERROR_STRINGS instead") +# define CL_HPP_USER_OVERRIDE_ERROR_STRINGS +#endif + +/* Warn about features that are no longer supported + */ +#if defined(__USE_DEV_VECTOR) +# pragma message("cl2.hpp: __USE_DEV_VECTOR is no longer supported. Expect compilation errors") +#endif +#if defined(__USE_DEV_STRING) +# pragma message("cl2.hpp: __USE_DEV_STRING is no longer supported. Expect compilation errors") +#endif + +/* Detect which version to target */ +#if !defined(CL_HPP_TARGET_OPENCL_VERSION) +# pragma message("cl2.hpp: CL_HPP_TARGET_OPENCL_VERSION is not defined. It will default to 210 (OpenCL 2.1)") +# define CL_HPP_TARGET_OPENCL_VERSION 210 +#endif +#if CL_HPP_TARGET_OPENCL_VERSION != 100 && CL_HPP_TARGET_OPENCL_VERSION != 110 && CL_HPP_TARGET_OPENCL_VERSION != 120 && CL_HPP_TARGET_OPENCL_VERSION != 200 && CL_HPP_TARGET_OPENCL_VERSION != 210 +# pragma message("cl2.hpp: CL_HPP_TARGET_OPENCL_VERSION is not a valid value (100, 110, 120, 200 or 210). It will be set to 210") +# undef CL_HPP_TARGET_OPENCL_VERSION +# define CL_HPP_TARGET_OPENCL_VERSION 210 +#endif + +/* Forward target OpenCL version to C headers if necessary */ +#if defined(CL_TARGET_OPENCL_VERSION) +/* Warn if prior definition of CL_TARGET_OPENCL_VERSION is lower than + * requested C++ bindings version */ +#if CL_TARGET_OPENCL_VERSION < CL_HPP_TARGET_OPENCL_VERSION +# pragma message("CL_TARGET_OPENCL_VERSION is already defined as is lower than CL_HPP_TARGET_OPENCL_VERSION") +#endif +#else +# define CL_TARGET_OPENCL_VERSION CL_HPP_TARGET_OPENCL_VERSION +#endif + +#if !defined(CL_HPP_MINIMUM_OPENCL_VERSION) +# define CL_HPP_MINIMUM_OPENCL_VERSION 200 +#endif +#if CL_HPP_MINIMUM_OPENCL_VERSION != 100 && CL_HPP_MINIMUM_OPENCL_VERSION != 110 && CL_HPP_MINIMUM_OPENCL_VERSION != 120 && CL_HPP_MINIMUM_OPENCL_VERSION != 200 && CL_HPP_MINIMUM_OPENCL_VERSION != 210 +# pragma message("cl2.hpp: CL_HPP_MINIMUM_OPENCL_VERSION is not a valid value (100, 110, 120, 200 or 210). It will be set to 100") +# undef CL_HPP_MINIMUM_OPENCL_VERSION +# define CL_HPP_MINIMUM_OPENCL_VERSION 100 +#endif +#if CL_HPP_MINIMUM_OPENCL_VERSION > CL_HPP_TARGET_OPENCL_VERSION +# error "CL_HPP_MINIMUM_OPENCL_VERSION must not be greater than CL_HPP_TARGET_OPENCL_VERSION" +#endif + +#if CL_HPP_MINIMUM_OPENCL_VERSION <= 100 && !defined(CL_USE_DEPRECATED_OPENCL_1_0_APIS) +# define CL_USE_DEPRECATED_OPENCL_1_0_APIS +#endif +#if CL_HPP_MINIMUM_OPENCL_VERSION <= 110 && !defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) +# define CL_USE_DEPRECATED_OPENCL_1_1_APIS +#endif +#if CL_HPP_MINIMUM_OPENCL_VERSION <= 120 && !defined(CL_USE_DEPRECATED_OPENCL_1_2_APIS) +# define CL_USE_DEPRECATED_OPENCL_1_2_APIS +#endif +#if CL_HPP_MINIMUM_OPENCL_VERSION <= 200 && !defined(CL_USE_DEPRECATED_OPENCL_2_0_APIS) +# define CL_USE_DEPRECATED_OPENCL_2_0_APIS +#endif +#if CL_HPP_MINIMUM_OPENCL_VERSION <= 210 && !defined(CL_USE_DEPRECATED_OPENCL_2_1_APIS) +# define CL_USE_DEPRECATED_OPENCL_2_1_APIS +#endif + +#ifdef _WIN32 + +#include + +#if defined(CL_HPP_USE_DX_INTEROP) +#include +#include +#endif +#endif // _WIN32 + +#if defined(_MSC_VER) +#include +#endif // _MSC_VER + + // Check for a valid C++ version + +// Need to do both tests here because for some reason __cplusplus is not +// updated in visual studio +#if (!defined(_MSC_VER) && __cplusplus < 201103L) || (defined(_MSC_VER) && _MSC_VER < 1700) +#error Visual studio 2013 or another C++11-supporting compiler required +#endif + +// +#if defined(CL_HPP_USE_CL_DEVICE_FISSION) || defined(CL_HPP_USE_CL_SUB_GROUPS_KHR) +#include +#endif + +#if defined(__APPLE__) || defined(__MACOSX) +#include +#else +#include +#endif // !__APPLE__ + +#if (__cplusplus >= 201103L) +#define CL_HPP_NOEXCEPT_ noexcept +#else +#define CL_HPP_NOEXCEPT_ +#endif + +#if defined(_MSC_VER) +# define CL_HPP_DEFINE_STATIC_MEMBER_ __declspec(selectany) +#else +# define CL_HPP_DEFINE_STATIC_MEMBER_ +#endif // !_MSC_VER + +// Define deprecated prefixes and suffixes to ensure compilation +// in case they are not pre-defined +#if !defined(CL_EXT_PREFIX__VERSION_1_1_DEPRECATED) +#define CL_EXT_PREFIX__VERSION_1_1_DEPRECATED +#endif // #if !defined(CL_EXT_PREFIX__VERSION_1_1_DEPRECATED) +#if !defined(CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED) +#define CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED +#endif // #if !defined(CL_EXT_PREFIX__VERSION_1_1_DEPRECATED) + +#if !defined(CL_EXT_PREFIX__VERSION_1_2_DEPRECATED) +#define CL_EXT_PREFIX__VERSION_1_2_DEPRECATED +#endif // #if !defined(CL_EXT_PREFIX__VERSION_1_2_DEPRECATED) +#if !defined(CL_EXT_SUFFIX__VERSION_1_2_DEPRECATED) +#define CL_EXT_SUFFIX__VERSION_1_2_DEPRECATED +#endif // #if !defined(CL_EXT_PREFIX__VERSION_1_2_DEPRECATED) + +#if !defined(CL_CALLBACK) +#define CL_CALLBACK +#endif //CL_CALLBACK + +#include +#include +#include +#include +#include +#include + + +// Define a size_type to represent a correctly resolved size_t +#if defined(CL_HPP_ENABLE_SIZE_T_COMPATIBILITY) +namespace cl { + using size_type = ::size_t; +} // namespace cl +#else // #if defined(CL_HPP_ENABLE_SIZE_T_COMPATIBILITY) +namespace cl { + using size_type = size_t; +} // namespace cl +#endif // #if defined(CL_HPP_ENABLE_SIZE_T_COMPATIBILITY) + + +#if defined(CL_HPP_ENABLE_EXCEPTIONS) +#include +#endif // #if defined(CL_HPP_ENABLE_EXCEPTIONS) + +#if !defined(CL_HPP_NO_STD_VECTOR) +#include +namespace cl { + template < class T, class Alloc = std::allocator > + using vector = std::vector; +} // namespace cl +#endif // #if !defined(CL_HPP_NO_STD_VECTOR) + +#if !defined(CL_HPP_NO_STD_STRING) +#include +namespace cl { + using string = std::string; +} // namespace cl +#endif // #if !defined(CL_HPP_NO_STD_STRING) + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + +#if !defined(CL_HPP_NO_STD_UNIQUE_PTR) +#include +namespace cl { + // Replace unique_ptr and allocate_pointer for internal use + // to allow user to replace them + template + using pointer = std::unique_ptr; +} // namespace cl +#endif +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 +#if !defined(CL_HPP_NO_STD_ARRAY) +#include +namespace cl { + template < class T, size_type N > + using array = std::array; +} // namespace cl +#endif // #if !defined(CL_HPP_NO_STD_ARRAY) + +// Define size_type appropriately to allow backward-compatibility +// use of the old size_t interface class +#if defined(CL_HPP_ENABLE_SIZE_T_COMPATIBILITY) +namespace cl { + namespace compatibility { + /*! \brief class used to interface between C++ and + * OpenCL C calls that require arrays of size_t values, whose + * size is known statically. + */ + template + class size_t + { + private: + size_type data_[N]; + + public: + //! \brief Initialize size_t to all 0s + size_t() + { + for (int i = 0; i < N; ++i) { + data_[i] = 0; + } + } + + size_t(const array &rhs) + { + for (int i = 0; i < N; ++i) { + data_[i] = rhs[i]; + } + } + + size_type& operator[](int index) + { + return data_[index]; + } + + const size_type& operator[](int index) const + { + return data_[index]; + } + + //! \brief Conversion operator to T*. + operator size_type* () { return data_; } + + //! \brief Conversion operator to const T*. + operator const size_type* () const { return data_; } + + operator array() const + { + array ret; + + for (int i = 0; i < N; ++i) { + ret[i] = data_[i]; + } + return ret; + } + }; + } // namespace compatibility + + template + using size_t = compatibility::size_t; +} // namespace cl +#endif // #if defined(CL_HPP_ENABLE_SIZE_T_COMPATIBILITY) + +// Helper alias to avoid confusing the macros +namespace cl { + namespace detail { + using size_t_array = array; + } // namespace detail +} // namespace cl + + +/*! \namespace cl + * + * \brief The OpenCL C++ bindings are defined within this namespace. + * + */ +namespace cl { + class Memory; + +#define CL_HPP_INIT_CL_EXT_FCN_PTR_(name) \ + if (!pfn_##name) { \ + pfn_##name = (PFN_##name) \ + clGetExtensionFunctionAddress(#name); \ + if (!pfn_##name) { \ + } \ + } + +#define CL_HPP_INIT_CL_EXT_FCN_PTR_PLATFORM_(platform, name) \ + if (!pfn_##name) { \ + pfn_##name = (PFN_##name) \ + clGetExtensionFunctionAddressForPlatform(platform, #name); \ + if (!pfn_##name) { \ + } \ + } + + class Program; + class Device; + class Context; + class CommandQueue; + class DeviceCommandQueue; + class Memory; + class Buffer; + class Pipe; + +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + /*! \brief Exception class + * + * This may be thrown by API functions when CL_HPP_ENABLE_EXCEPTIONS is defined. + */ + class Error : public std::exception + { + private: + cl_int err_; + const char * errStr_; + public: + /*! \brief Create a new CL error exception for a given error code + * and corresponding message. + * + * \param err error code value. + * + * \param errStr a descriptive string that must remain in scope until + * handling of the exception has concluded. If set, it + * will be returned by what(). + */ + Error(cl_int err, const char * errStr = NULL) : err_(err), errStr_(errStr) + {} + + ~Error() throw() {} + + /*! \brief Get error string associated with exception + * + * \return A memory pointer to the error message string. + */ + virtual const char * what() const throw () + { + if (errStr_ == NULL) { + return "empty"; + } + else { + return errStr_; + } + } + + /*! \brief Get error code associated with exception + * + * \return The error code. + */ + cl_int err(void) const { return err_; } + }; +#define CL_HPP_ERR_STR_(x) #x +#else +#define CL_HPP_ERR_STR_(x) NULL +#endif // CL_HPP_ENABLE_EXCEPTIONS + + +namespace detail +{ +#if defined(CL_HPP_ENABLE_EXCEPTIONS) +static inline cl_int errHandler ( + cl_int err, + const char * errStr = NULL) +{ + if (err != CL_SUCCESS) { + throw Error(err, errStr); + } + return err; +} +#else +static inline cl_int errHandler (cl_int err, const char * errStr = NULL) +{ + (void) errStr; // suppress unused variable warning + return err; +} +#endif // CL_HPP_ENABLE_EXCEPTIONS +} + + + +//! \cond DOXYGEN_DETAIL +#if !defined(CL_HPP_USER_OVERRIDE_ERROR_STRINGS) +#define __GET_DEVICE_INFO_ERR CL_HPP_ERR_STR_(clGetDeviceInfo) +#define __GET_PLATFORM_INFO_ERR CL_HPP_ERR_STR_(clGetPlatformInfo) +#define __GET_DEVICE_IDS_ERR CL_HPP_ERR_STR_(clGetDeviceIDs) +#define __GET_PLATFORM_IDS_ERR CL_HPP_ERR_STR_(clGetPlatformIDs) +#define __GET_CONTEXT_INFO_ERR CL_HPP_ERR_STR_(clGetContextInfo) +#define __GET_EVENT_INFO_ERR CL_HPP_ERR_STR_(clGetEventInfo) +#define __GET_EVENT_PROFILE_INFO_ERR CL_HPP_ERR_STR_(clGetEventProfileInfo) +#define __GET_MEM_OBJECT_INFO_ERR CL_HPP_ERR_STR_(clGetMemObjectInfo) +#define __GET_IMAGE_INFO_ERR CL_HPP_ERR_STR_(clGetImageInfo) +#define __GET_SAMPLER_INFO_ERR CL_HPP_ERR_STR_(clGetSamplerInfo) +#define __GET_KERNEL_INFO_ERR CL_HPP_ERR_STR_(clGetKernelInfo) +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +#define __GET_KERNEL_ARG_INFO_ERR CL_HPP_ERR_STR_(clGetKernelArgInfo) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 +#define __GET_KERNEL_SUB_GROUP_INFO_ERR CL_HPP_ERR_STR_(clGetKernelSubGroupInfo) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 +#define __GET_KERNEL_WORK_GROUP_INFO_ERR CL_HPP_ERR_STR_(clGetKernelWorkGroupInfo) +#define __GET_PROGRAM_INFO_ERR CL_HPP_ERR_STR_(clGetProgramInfo) +#define __GET_PROGRAM_BUILD_INFO_ERR CL_HPP_ERR_STR_(clGetProgramBuildInfo) +#define __GET_COMMAND_QUEUE_INFO_ERR CL_HPP_ERR_STR_(clGetCommandQueueInfo) + +#define __CREATE_CONTEXT_ERR CL_HPP_ERR_STR_(clCreateContext) +#define __CREATE_CONTEXT_FROM_TYPE_ERR CL_HPP_ERR_STR_(clCreateContextFromType) +#define __GET_SUPPORTED_IMAGE_FORMATS_ERR CL_HPP_ERR_STR_(clGetSupportedImageFormats) + +#define __CREATE_BUFFER_ERR CL_HPP_ERR_STR_(clCreateBuffer) +#define __COPY_ERR CL_HPP_ERR_STR_(cl::copy) +#define __CREATE_SUBBUFFER_ERR CL_HPP_ERR_STR_(clCreateSubBuffer) +#define __CREATE_GL_BUFFER_ERR CL_HPP_ERR_STR_(clCreateFromGLBuffer) +#define __CREATE_GL_RENDER_BUFFER_ERR CL_HPP_ERR_STR_(clCreateFromGLBuffer) +#define __GET_GL_OBJECT_INFO_ERR CL_HPP_ERR_STR_(clGetGLObjectInfo) +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +#define __CREATE_IMAGE_ERR CL_HPP_ERR_STR_(clCreateImage) +#define __CREATE_GL_TEXTURE_ERR CL_HPP_ERR_STR_(clCreateFromGLTexture) +#define __IMAGE_DIMENSION_ERR CL_HPP_ERR_STR_(Incorrect image dimensions) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 +#define __SET_MEM_OBJECT_DESTRUCTOR_CALLBACK_ERR CL_HPP_ERR_STR_(clSetMemObjectDestructorCallback) + +#define __CREATE_USER_EVENT_ERR CL_HPP_ERR_STR_(clCreateUserEvent) +#define __SET_USER_EVENT_STATUS_ERR CL_HPP_ERR_STR_(clSetUserEventStatus) +#define __SET_EVENT_CALLBACK_ERR CL_HPP_ERR_STR_(clSetEventCallback) +#define __WAIT_FOR_EVENTS_ERR CL_HPP_ERR_STR_(clWaitForEvents) + +#define __CREATE_KERNEL_ERR CL_HPP_ERR_STR_(clCreateKernel) +#define __SET_KERNEL_ARGS_ERR CL_HPP_ERR_STR_(clSetKernelArg) +#define __CREATE_PROGRAM_WITH_SOURCE_ERR CL_HPP_ERR_STR_(clCreateProgramWithSource) +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 +#define __CREATE_PROGRAM_WITH_IL_ERR CL_HPP_ERR_STR_(clCreateProgramWithIL) +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 +#define __CREATE_PROGRAM_WITH_BINARY_ERR CL_HPP_ERR_STR_(clCreateProgramWithBinary) +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 +#define __CREATE_PROGRAM_WITH_IL_ERR CL_HPP_ERR_STR_(clCreateProgramWithIL) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 210 +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +#define __CREATE_PROGRAM_WITH_BUILT_IN_KERNELS_ERR CL_HPP_ERR_STR_(clCreateProgramWithBuiltInKernels) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 +#define __BUILD_PROGRAM_ERR CL_HPP_ERR_STR_(clBuildProgram) +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +#define __COMPILE_PROGRAM_ERR CL_HPP_ERR_STR_(clCompileProgram) +#define __LINK_PROGRAM_ERR CL_HPP_ERR_STR_(clLinkProgram) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 +#define __CREATE_KERNELS_IN_PROGRAM_ERR CL_HPP_ERR_STR_(clCreateKernelsInProgram) + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 +#define __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR CL_HPP_ERR_STR_(clCreateCommandQueueWithProperties) +#define __CREATE_SAMPLER_WITH_PROPERTIES_ERR CL_HPP_ERR_STR_(clCreateSamplerWithProperties) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 +#define __SET_COMMAND_QUEUE_PROPERTY_ERR CL_HPP_ERR_STR_(clSetCommandQueueProperty) +#define __ENQUEUE_READ_BUFFER_ERR CL_HPP_ERR_STR_(clEnqueueReadBuffer) +#define __ENQUEUE_READ_BUFFER_RECT_ERR CL_HPP_ERR_STR_(clEnqueueReadBufferRect) +#define __ENQUEUE_WRITE_BUFFER_ERR CL_HPP_ERR_STR_(clEnqueueWriteBuffer) +#define __ENQUEUE_WRITE_BUFFER_RECT_ERR CL_HPP_ERR_STR_(clEnqueueWriteBufferRect) +#define __ENQEUE_COPY_BUFFER_ERR CL_HPP_ERR_STR_(clEnqueueCopyBuffer) +#define __ENQEUE_COPY_BUFFER_RECT_ERR CL_HPP_ERR_STR_(clEnqueueCopyBufferRect) +#define __ENQUEUE_FILL_BUFFER_ERR CL_HPP_ERR_STR_(clEnqueueFillBuffer) +#define __ENQUEUE_READ_IMAGE_ERR CL_HPP_ERR_STR_(clEnqueueReadImage) +#define __ENQUEUE_WRITE_IMAGE_ERR CL_HPP_ERR_STR_(clEnqueueWriteImage) +#define __ENQUEUE_COPY_IMAGE_ERR CL_HPP_ERR_STR_(clEnqueueCopyImage) +#define __ENQUEUE_FILL_IMAGE_ERR CL_HPP_ERR_STR_(clEnqueueFillImage) +#define __ENQUEUE_COPY_IMAGE_TO_BUFFER_ERR CL_HPP_ERR_STR_(clEnqueueCopyImageToBuffer) +#define __ENQUEUE_COPY_BUFFER_TO_IMAGE_ERR CL_HPP_ERR_STR_(clEnqueueCopyBufferToImage) +#define __ENQUEUE_MAP_BUFFER_ERR CL_HPP_ERR_STR_(clEnqueueMapBuffer) +#define __ENQUEUE_MAP_IMAGE_ERR CL_HPP_ERR_STR_(clEnqueueMapImage) +#define __ENQUEUE_UNMAP_MEM_OBJECT_ERR CL_HPP_ERR_STR_(clEnqueueUnMapMemObject) +#define __ENQUEUE_NDRANGE_KERNEL_ERR CL_HPP_ERR_STR_(clEnqueueNDRangeKernel) +#define __ENQUEUE_NATIVE_KERNEL CL_HPP_ERR_STR_(clEnqueueNativeKernel) +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +#define __ENQUEUE_MIGRATE_MEM_OBJECTS_ERR CL_HPP_ERR_STR_(clEnqueueMigrateMemObjects) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 +#define __ENQUEUE_MIGRATE_SVM_ERR CL_HPP_ERR_STR_(clEnqueueSVMMigrateMem) +#define __SET_DEFAULT_DEVICE_COMMAND_QUEUE_ERR CL_HPP_ERR_STR_(clSetDefaultDeviceCommandQueue) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 210 + + +#define __ENQUEUE_ACQUIRE_GL_ERR CL_HPP_ERR_STR_(clEnqueueAcquireGLObjects) +#define __ENQUEUE_RELEASE_GL_ERR CL_HPP_ERR_STR_(clEnqueueReleaseGLObjects) + +#define __CREATE_PIPE_ERR CL_HPP_ERR_STR_(clCreatePipe) +#define __GET_PIPE_INFO_ERR CL_HPP_ERR_STR_(clGetPipeInfo) + + +#define __RETAIN_ERR CL_HPP_ERR_STR_(Retain Object) +#define __RELEASE_ERR CL_HPP_ERR_STR_(Release Object) +#define __FLUSH_ERR CL_HPP_ERR_STR_(clFlush) +#define __FINISH_ERR CL_HPP_ERR_STR_(clFinish) +#define __VECTOR_CAPACITY_ERR CL_HPP_ERR_STR_(Vector capacity error) + +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 +#define __GET_HOST_TIMER_ERR CL_HPP_ERR_STR_(clGetHostTimer) +#define __GET_DEVICE_AND_HOST_TIMER_ERR CL_HPP_ERR_STR_(clGetDeviceAndHostTimer) +#endif + + +/** + * CL 1.2 version that uses device fission. + */ +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +#define __CREATE_SUB_DEVICES_ERR CL_HPP_ERR_STR_(clCreateSubDevices) +#else +#define __CREATE_SUB_DEVICES_ERR CL_HPP_ERR_STR_(clCreateSubDevicesEXT) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + +/** + * Deprecated APIs for 1.2 + */ +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) +#define __ENQUEUE_MARKER_ERR CL_HPP_ERR_STR_(clEnqueueMarker) +#define __ENQUEUE_WAIT_FOR_EVENTS_ERR CL_HPP_ERR_STR_(clEnqueueWaitForEvents) +#define __ENQUEUE_BARRIER_ERR CL_HPP_ERR_STR_(clEnqueueBarrier) +#define __UNLOAD_COMPILER_ERR CL_HPP_ERR_STR_(clUnloadCompiler) +#define __CREATE_GL_TEXTURE_2D_ERR CL_HPP_ERR_STR_(clCreateFromGLTexture2D) +#define __CREATE_GL_TEXTURE_3D_ERR CL_HPP_ERR_STR_(clCreateFromGLTexture3D) +#define __CREATE_IMAGE2D_ERR CL_HPP_ERR_STR_(clCreateImage2D) +#define __CREATE_IMAGE3D_ERR CL_HPP_ERR_STR_(clCreateImage3D) +#endif // #if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + +/** + * Deprecated APIs for 2.0 + */ +#if defined(CL_USE_DEPRECATED_OPENCL_1_2_APIS) +#define __CREATE_COMMAND_QUEUE_ERR CL_HPP_ERR_STR_(clCreateCommandQueue) +#define __ENQUEUE_TASK_ERR CL_HPP_ERR_STR_(clEnqueueTask) +#define __CREATE_SAMPLER_ERR CL_HPP_ERR_STR_(clCreateSampler) +#endif // #if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + +/** + * CL 1.2 marker and barrier commands + */ +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +#define __ENQUEUE_MARKER_WAIT_LIST_ERR CL_HPP_ERR_STR_(clEnqueueMarkerWithWaitList) +#define __ENQUEUE_BARRIER_WAIT_LIST_ERR CL_HPP_ERR_STR_(clEnqueueBarrierWithWaitList) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 +#define __CLONE_KERNEL_ERR CL_HPP_ERR_STR_(clCloneKernel) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 210 + +#endif // CL_HPP_USER_OVERRIDE_ERROR_STRINGS +//! \endcond + + +namespace detail { + +// Generic getInfoHelper. The final parameter is used to guide overload +// resolution: the actual parameter passed is an int, which makes this +// a worse conversion sequence than a specialization that declares the +// parameter as an int. +template +inline cl_int getInfoHelper(Functor f, cl_uint name, T* param, long) +{ + return f(name, sizeof(T), param, NULL); +} + +// Specialized for getInfo +// Assumes that the output vector was correctly resized on the way in +template +inline cl_int getInfoHelper(Func f, cl_uint name, vector>* param, int) +{ + if (name != CL_PROGRAM_BINARIES) { + return CL_INVALID_VALUE; + } + if (param) { + // Create array of pointers, calculate total size and pass pointer array in + size_type numBinaries = param->size(); + vector binariesPointers(numBinaries); + + for (size_type i = 0; i < numBinaries; ++i) + { + binariesPointers[i] = (*param)[i].data(); + } + + cl_int err = f(name, numBinaries * sizeof(unsigned char*), binariesPointers.data(), NULL); + + if (err != CL_SUCCESS) { + return err; + } + } + + + return CL_SUCCESS; +} + +// Specialized getInfoHelper for vector params +template +inline cl_int getInfoHelper(Func f, cl_uint name, vector* param, long) +{ + size_type required; + cl_int err = f(name, 0, NULL, &required); + if (err != CL_SUCCESS) { + return err; + } + const size_type elements = required / sizeof(T); + + // Temporary to avoid changing param on an error + vector localData(elements); + err = f(name, required, localData.data(), NULL); + if (err != CL_SUCCESS) { + return err; + } + if (param) { + *param = std::move(localData); + } + + return CL_SUCCESS; +} + +/* Specialization for reference-counted types. This depends on the + * existence of Wrapper::cl_type, and none of the other types having the + * cl_type member. Note that simplify specifying the parameter as Wrapper + * does not work, because when using a derived type (e.g. Context) the generic + * template will provide a better match. + */ +template +inline cl_int getInfoHelper( + Func f, cl_uint name, vector* param, int, typename T::cl_type = 0) +{ + size_type required; + cl_int err = f(name, 0, NULL, &required); + if (err != CL_SUCCESS) { + return err; + } + + const size_type elements = required / sizeof(typename T::cl_type); + + vector value(elements); + err = f(name, required, value.data(), NULL); + if (err != CL_SUCCESS) { + return err; + } + + if (param) { + // Assign to convert CL type to T for each element + param->resize(elements); + + // Assign to param, constructing with retain behaviour + // to correctly capture each underlying CL object + for (size_type i = 0; i < elements; i++) { + (*param)[i] = T(value[i], true); + } + } + return CL_SUCCESS; +} + +// Specialized GetInfoHelper for string params +template +inline cl_int getInfoHelper(Func f, cl_uint name, string* param, long) +{ + size_type required; + cl_int err = f(name, 0, NULL, &required); + if (err != CL_SUCCESS) { + return err; + } + + // std::string has a constant data member + // a char vector does not + if (required > 0) { + vector value(required); + err = f(name, required, value.data(), NULL); + if (err != CL_SUCCESS) { + return err; + } + if (param) { + param->assign(begin(value), prev(end(value))); + } + } + else if (param) { + param->assign(""); + } + return CL_SUCCESS; +} + +// Specialized GetInfoHelper for clsize_t params +template +inline cl_int getInfoHelper(Func f, cl_uint name, array* param, long) +{ + size_type required; + cl_int err = f(name, 0, NULL, &required); + if (err != CL_SUCCESS) { + return err; + } + + size_type elements = required / sizeof(size_type); + vector value(elements, 0); + + err = f(name, required, value.data(), NULL); + if (err != CL_SUCCESS) { + return err; + } + + // Bound the copy with N to prevent overruns + // if passed N > than the amount copied + if (elements > N) { + elements = N; + } + for (size_type i = 0; i < elements; ++i) { + (*param)[i] = value[i]; + } + + return CL_SUCCESS; +} + +template struct ReferenceHandler; + +/* Specialization for reference-counted types. This depends on the + * existence of Wrapper::cl_type, and none of the other types having the + * cl_type member. Note that simplify specifying the parameter as Wrapper + * does not work, because when using a derived type (e.g. Context) the generic + * template will provide a better match. + */ +template +inline cl_int getInfoHelper(Func f, cl_uint name, T* param, int, typename T::cl_type = 0) +{ + typename T::cl_type value; + cl_int err = f(name, sizeof(value), &value, NULL); + if (err != CL_SUCCESS) { + return err; + } + *param = value; + if (value != NULL) + { + err = param->retain(); + if (err != CL_SUCCESS) { + return err; + } + } + return CL_SUCCESS; +} + +#define CL_HPP_PARAM_NAME_INFO_1_0_(F) \ + F(cl_platform_info, CL_PLATFORM_PROFILE, string) \ + F(cl_platform_info, CL_PLATFORM_VERSION, string) \ + F(cl_platform_info, CL_PLATFORM_NAME, string) \ + F(cl_platform_info, CL_PLATFORM_VENDOR, string) \ + F(cl_platform_info, CL_PLATFORM_EXTENSIONS, string) \ + \ + F(cl_device_info, CL_DEVICE_TYPE, cl_device_type) \ + F(cl_device_info, CL_DEVICE_VENDOR_ID, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_COMPUTE_UNITS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_WORK_GROUP_SIZE, size_type) \ + F(cl_device_info, CL_DEVICE_MAX_WORK_ITEM_SIZES, cl::vector) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_CLOCK_FREQUENCY, cl_uint) \ + F(cl_device_info, CL_DEVICE_ADDRESS_BITS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_READ_IMAGE_ARGS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_WRITE_IMAGE_ARGS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_MEM_ALLOC_SIZE, cl_ulong) \ + F(cl_device_info, CL_DEVICE_IMAGE2D_MAX_WIDTH, size_type) \ + F(cl_device_info, CL_DEVICE_IMAGE2D_MAX_HEIGHT, size_type) \ + F(cl_device_info, CL_DEVICE_IMAGE3D_MAX_WIDTH, size_type) \ + F(cl_device_info, CL_DEVICE_IMAGE3D_MAX_HEIGHT, size_type) \ + F(cl_device_info, CL_DEVICE_IMAGE3D_MAX_DEPTH, size_type) \ + F(cl_device_info, CL_DEVICE_IMAGE_SUPPORT, cl_bool) \ + F(cl_device_info, CL_DEVICE_MAX_PARAMETER_SIZE, size_type) \ + F(cl_device_info, CL_DEVICE_MAX_SAMPLERS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MEM_BASE_ADDR_ALIGN, cl_uint) \ + F(cl_device_info, CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE, cl_uint) \ + F(cl_device_info, CL_DEVICE_SINGLE_FP_CONFIG, cl_device_fp_config) \ + F(cl_device_info, CL_DEVICE_DOUBLE_FP_CONFIG, cl_device_fp_config) \ + F(cl_device_info, CL_DEVICE_HALF_FP_CONFIG, cl_device_fp_config) \ + F(cl_device_info, CL_DEVICE_GLOBAL_MEM_CACHE_TYPE, cl_device_mem_cache_type) \ + F(cl_device_info, CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE, cl_uint)\ + F(cl_device_info, CL_DEVICE_GLOBAL_MEM_CACHE_SIZE, cl_ulong) \ + F(cl_device_info, CL_DEVICE_GLOBAL_MEM_SIZE, cl_ulong) \ + F(cl_device_info, CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE, cl_ulong) \ + F(cl_device_info, CL_DEVICE_MAX_CONSTANT_ARGS, cl_uint) \ + F(cl_device_info, CL_DEVICE_LOCAL_MEM_TYPE, cl_device_local_mem_type) \ + F(cl_device_info, CL_DEVICE_LOCAL_MEM_SIZE, cl_ulong) \ + F(cl_device_info, CL_DEVICE_ERROR_CORRECTION_SUPPORT, cl_bool) \ + F(cl_device_info, CL_DEVICE_PROFILING_TIMER_RESOLUTION, size_type) \ + F(cl_device_info, CL_DEVICE_ENDIAN_LITTLE, cl_bool) \ + F(cl_device_info, CL_DEVICE_AVAILABLE, cl_bool) \ + F(cl_device_info, CL_DEVICE_COMPILER_AVAILABLE, cl_bool) \ + F(cl_device_info, CL_DEVICE_EXECUTION_CAPABILITIES, cl_device_exec_capabilities) \ + F(cl_device_info, CL_DEVICE_PLATFORM, cl_platform_id) \ + F(cl_device_info, CL_DEVICE_NAME, string) \ + F(cl_device_info, CL_DEVICE_VENDOR, string) \ + F(cl_device_info, CL_DRIVER_VERSION, string) \ + F(cl_device_info, CL_DEVICE_PROFILE, string) \ + F(cl_device_info, CL_DEVICE_VERSION, string) \ + F(cl_device_info, CL_DEVICE_EXTENSIONS, string) \ + \ + F(cl_context_info, CL_CONTEXT_REFERENCE_COUNT, cl_uint) \ + F(cl_context_info, CL_CONTEXT_DEVICES, cl::vector) \ + F(cl_context_info, CL_CONTEXT_PROPERTIES, cl::vector) \ + \ + F(cl_event_info, CL_EVENT_COMMAND_QUEUE, cl::CommandQueue) \ + F(cl_event_info, CL_EVENT_COMMAND_TYPE, cl_command_type) \ + F(cl_event_info, CL_EVENT_REFERENCE_COUNT, cl_uint) \ + F(cl_event_info, CL_EVENT_COMMAND_EXECUTION_STATUS, cl_int) \ + \ + F(cl_profiling_info, CL_PROFILING_COMMAND_QUEUED, cl_ulong) \ + F(cl_profiling_info, CL_PROFILING_COMMAND_SUBMIT, cl_ulong) \ + F(cl_profiling_info, CL_PROFILING_COMMAND_START, cl_ulong) \ + F(cl_profiling_info, CL_PROFILING_COMMAND_END, cl_ulong) \ + \ + F(cl_mem_info, CL_MEM_TYPE, cl_mem_object_type) \ + F(cl_mem_info, CL_MEM_FLAGS, cl_mem_flags) \ + F(cl_mem_info, CL_MEM_SIZE, size_type) \ + F(cl_mem_info, CL_MEM_HOST_PTR, void*) \ + F(cl_mem_info, CL_MEM_MAP_COUNT, cl_uint) \ + F(cl_mem_info, CL_MEM_REFERENCE_COUNT, cl_uint) \ + F(cl_mem_info, CL_MEM_CONTEXT, cl::Context) \ + \ + F(cl_image_info, CL_IMAGE_FORMAT, cl_image_format) \ + F(cl_image_info, CL_IMAGE_ELEMENT_SIZE, size_type) \ + F(cl_image_info, CL_IMAGE_ROW_PITCH, size_type) \ + F(cl_image_info, CL_IMAGE_SLICE_PITCH, size_type) \ + F(cl_image_info, CL_IMAGE_WIDTH, size_type) \ + F(cl_image_info, CL_IMAGE_HEIGHT, size_type) \ + F(cl_image_info, CL_IMAGE_DEPTH, size_type) \ + \ + F(cl_sampler_info, CL_SAMPLER_REFERENCE_COUNT, cl_uint) \ + F(cl_sampler_info, CL_SAMPLER_CONTEXT, cl::Context) \ + F(cl_sampler_info, CL_SAMPLER_NORMALIZED_COORDS, cl_bool) \ + F(cl_sampler_info, CL_SAMPLER_ADDRESSING_MODE, cl_addressing_mode) \ + F(cl_sampler_info, CL_SAMPLER_FILTER_MODE, cl_filter_mode) \ + \ + F(cl_program_info, CL_PROGRAM_REFERENCE_COUNT, cl_uint) \ + F(cl_program_info, CL_PROGRAM_CONTEXT, cl::Context) \ + F(cl_program_info, CL_PROGRAM_NUM_DEVICES, cl_uint) \ + F(cl_program_info, CL_PROGRAM_DEVICES, cl::vector) \ + F(cl_program_info, CL_PROGRAM_SOURCE, string) \ + F(cl_program_info, CL_PROGRAM_BINARY_SIZES, cl::vector) \ + F(cl_program_info, CL_PROGRAM_BINARIES, cl::vector>) \ + \ + F(cl_program_build_info, CL_PROGRAM_BUILD_STATUS, cl_build_status) \ + F(cl_program_build_info, CL_PROGRAM_BUILD_OPTIONS, string) \ + F(cl_program_build_info, CL_PROGRAM_BUILD_LOG, string) \ + \ + F(cl_kernel_info, CL_KERNEL_FUNCTION_NAME, string) \ + F(cl_kernel_info, CL_KERNEL_NUM_ARGS, cl_uint) \ + F(cl_kernel_info, CL_KERNEL_REFERENCE_COUNT, cl_uint) \ + F(cl_kernel_info, CL_KERNEL_CONTEXT, cl::Context) \ + F(cl_kernel_info, CL_KERNEL_PROGRAM, cl::Program) \ + \ + F(cl_kernel_work_group_info, CL_KERNEL_WORK_GROUP_SIZE, size_type) \ + F(cl_kernel_work_group_info, CL_KERNEL_COMPILE_WORK_GROUP_SIZE, cl::detail::size_t_array) \ + F(cl_kernel_work_group_info, CL_KERNEL_LOCAL_MEM_SIZE, cl_ulong) \ + \ + F(cl_command_queue_info, CL_QUEUE_CONTEXT, cl::Context) \ + F(cl_command_queue_info, CL_QUEUE_DEVICE, cl::Device) \ + F(cl_command_queue_info, CL_QUEUE_REFERENCE_COUNT, cl_uint) \ + F(cl_command_queue_info, CL_QUEUE_PROPERTIES, cl_command_queue_properties) + + +#define CL_HPP_PARAM_NAME_INFO_1_1_(F) \ + F(cl_context_info, CL_CONTEXT_NUM_DEVICES, cl_uint)\ + F(cl_device_info, CL_DEVICE_PREFERRED_VECTOR_WIDTH_HALF, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_CHAR, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_SHORT, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_INT, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_LONG, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_FLOAT, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_DOUBLE, cl_uint) \ + F(cl_device_info, CL_DEVICE_NATIVE_VECTOR_WIDTH_HALF, cl_uint) \ + F(cl_device_info, CL_DEVICE_OPENCL_C_VERSION, string) \ + \ + F(cl_mem_info, CL_MEM_ASSOCIATED_MEMOBJECT, cl::Memory) \ + F(cl_mem_info, CL_MEM_OFFSET, size_type) \ + \ + F(cl_kernel_work_group_info, CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE, size_type) \ + F(cl_kernel_work_group_info, CL_KERNEL_PRIVATE_MEM_SIZE, cl_ulong) \ + \ + F(cl_event_info, CL_EVENT_CONTEXT, cl::Context) + +#define CL_HPP_PARAM_NAME_INFO_1_2_(F) \ + F(cl_program_info, CL_PROGRAM_NUM_KERNELS, size_type) \ + F(cl_program_info, CL_PROGRAM_KERNEL_NAMES, string) \ + \ + F(cl_program_build_info, CL_PROGRAM_BINARY_TYPE, cl_program_binary_type) \ + \ + F(cl_kernel_info, CL_KERNEL_ATTRIBUTES, string) \ + \ + F(cl_kernel_arg_info, CL_KERNEL_ARG_ADDRESS_QUALIFIER, cl_kernel_arg_address_qualifier) \ + F(cl_kernel_arg_info, CL_KERNEL_ARG_ACCESS_QUALIFIER, cl_kernel_arg_access_qualifier) \ + F(cl_kernel_arg_info, CL_KERNEL_ARG_TYPE_NAME, string) \ + F(cl_kernel_arg_info, CL_KERNEL_ARG_NAME, string) \ + F(cl_kernel_arg_info, CL_KERNEL_ARG_TYPE_QUALIFIER, cl_kernel_arg_type_qualifier) \ + \ + F(cl_device_info, CL_DEVICE_PARENT_DEVICE, cl::Device) \ + F(cl_device_info, CL_DEVICE_PARTITION_PROPERTIES, cl::vector) \ + F(cl_device_info, CL_DEVICE_PARTITION_TYPE, cl::vector) \ + F(cl_device_info, CL_DEVICE_REFERENCE_COUNT, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_INTEROP_USER_SYNC, size_type) \ + F(cl_device_info, CL_DEVICE_PARTITION_AFFINITY_DOMAIN, cl_device_affinity_domain) \ + F(cl_device_info, CL_DEVICE_BUILT_IN_KERNELS, string) \ + \ + F(cl_image_info, CL_IMAGE_ARRAY_SIZE, size_type) \ + F(cl_image_info, CL_IMAGE_NUM_MIP_LEVELS, cl_uint) \ + F(cl_image_info, CL_IMAGE_NUM_SAMPLES, cl_uint) + +#define CL_HPP_PARAM_NAME_INFO_2_0_(F) \ + F(cl_device_info, CL_DEVICE_QUEUE_ON_HOST_PROPERTIES, cl_command_queue_properties) \ + F(cl_device_info, CL_DEVICE_QUEUE_ON_DEVICE_PROPERTIES, cl_command_queue_properties) \ + F(cl_device_info, CL_DEVICE_QUEUE_ON_DEVICE_PREFERRED_SIZE, cl_uint) \ + F(cl_device_info, CL_DEVICE_QUEUE_ON_DEVICE_MAX_SIZE, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_ON_DEVICE_QUEUES, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_ON_DEVICE_EVENTS, cl_uint) \ + F(cl_device_info, CL_DEVICE_MAX_PIPE_ARGS, cl_uint) \ + F(cl_device_info, CL_DEVICE_PIPE_MAX_ACTIVE_RESERVATIONS, cl_uint) \ + F(cl_device_info, CL_DEVICE_PIPE_MAX_PACKET_SIZE, cl_uint) \ + F(cl_device_info, CL_DEVICE_SVM_CAPABILITIES, cl_device_svm_capabilities) \ + F(cl_device_info, CL_DEVICE_PREFERRED_PLATFORM_ATOMIC_ALIGNMENT, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_GLOBAL_ATOMIC_ALIGNMENT, cl_uint) \ + F(cl_device_info, CL_DEVICE_PREFERRED_LOCAL_ATOMIC_ALIGNMENT, cl_uint) \ + F(cl_command_queue_info, CL_QUEUE_SIZE, cl_uint) \ + F(cl_mem_info, CL_MEM_USES_SVM_POINTER, cl_bool) \ + F(cl_program_build_info, CL_PROGRAM_BUILD_GLOBAL_VARIABLE_TOTAL_SIZE, size_type) \ + F(cl_pipe_info, CL_PIPE_PACKET_SIZE, cl_uint) \ + F(cl_pipe_info, CL_PIPE_MAX_PACKETS, cl_uint) + +#define CL_HPP_PARAM_NAME_INFO_SUBGROUP_KHR_(F) \ + F(cl_kernel_sub_group_info, CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE_KHR, size_type) \ + F(cl_kernel_sub_group_info, CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE_KHR, size_type) + +#define CL_HPP_PARAM_NAME_INFO_IL_KHR_(F) \ + F(cl_device_info, CL_DEVICE_IL_VERSION_KHR, string) \ + F(cl_program_info, CL_PROGRAM_IL_KHR, cl::vector) + +#define CL_HPP_PARAM_NAME_INFO_2_1_(F) \ + F(cl_platform_info, CL_PLATFORM_HOST_TIMER_RESOLUTION, size_type) \ + F(cl_program_info, CL_PROGRAM_IL, cl::vector) \ + F(cl_kernel_info, CL_KERNEL_MAX_NUM_SUB_GROUPS, size_type) \ + F(cl_kernel_info, CL_KERNEL_COMPILE_NUM_SUB_GROUPS, size_type) \ + F(cl_device_info, CL_DEVICE_MAX_NUM_SUB_GROUPS, cl_uint) \ + F(cl_device_info, CL_DEVICE_IL_VERSION, string) \ + F(cl_device_info, CL_DEVICE_SUB_GROUP_INDEPENDENT_FORWARD_PROGRESS, cl_bool) \ + F(cl_command_queue_info, CL_QUEUE_DEVICE_DEFAULT, cl::DeviceCommandQueue) \ + F(cl_kernel_sub_group_info, CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE, size_type) \ + F(cl_kernel_sub_group_info, CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE, size_type) \ + F(cl_kernel_sub_group_info, CL_KERNEL_LOCAL_SIZE_FOR_SUB_GROUP_COUNT, cl::detail::size_t_array) + +#define CL_HPP_PARAM_NAME_DEVICE_FISSION_(F) \ + F(cl_device_info, CL_DEVICE_PARENT_DEVICE_EXT, cl_device_id) \ + F(cl_device_info, CL_DEVICE_PARTITION_TYPES_EXT, cl::vector) \ + F(cl_device_info, CL_DEVICE_AFFINITY_DOMAINS_EXT, cl::vector) \ + F(cl_device_info, CL_DEVICE_REFERENCE_COUNT_EXT , cl_uint) \ + F(cl_device_info, CL_DEVICE_PARTITION_STYLE_EXT, cl::vector) + +template +struct param_traits {}; + +#define CL_HPP_DECLARE_PARAM_TRAITS_(token, param_name, T) \ +struct token; \ +template<> \ +struct param_traits \ +{ \ + enum { value = param_name }; \ + typedef T param_type; \ +}; + +CL_HPP_PARAM_NAME_INFO_1_0_(CL_HPP_DECLARE_PARAM_TRAITS_) +#if CL_HPP_TARGET_OPENCL_VERSION >= 110 +CL_HPP_PARAM_NAME_INFO_1_1_(CL_HPP_DECLARE_PARAM_TRAITS_) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 110 +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +CL_HPP_PARAM_NAME_INFO_1_2_(CL_HPP_DECLARE_PARAM_TRAITS_) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 +CL_HPP_PARAM_NAME_INFO_2_0_(CL_HPP_DECLARE_PARAM_TRAITS_) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 +CL_HPP_PARAM_NAME_INFO_2_1_(CL_HPP_DECLARE_PARAM_TRAITS_) +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 210 + +#if defined(CL_HPP_USE_CL_SUB_GROUPS_KHR) && CL_HPP_TARGET_OPENCL_VERSION < 210 +CL_HPP_PARAM_NAME_INFO_SUBGROUP_KHR_(CL_HPP_DECLARE_PARAM_TRAITS_) +#endif // #if defined(CL_HPP_USE_CL_SUB_GROUPS_KHR) && CL_HPP_TARGET_OPENCL_VERSION < 210 + +#if defined(CL_HPP_USE_IL_KHR) +CL_HPP_PARAM_NAME_INFO_IL_KHR_(CL_HPP_DECLARE_PARAM_TRAITS_) +#endif // #if defined(CL_HPP_USE_IL_KHR) + + +// Flags deprecated in OpenCL 2.0 +#define CL_HPP_PARAM_NAME_INFO_1_0_DEPRECATED_IN_2_0_(F) \ + F(cl_device_info, CL_DEVICE_QUEUE_PROPERTIES, cl_command_queue_properties) + +#define CL_HPP_PARAM_NAME_INFO_1_1_DEPRECATED_IN_2_0_(F) \ + F(cl_device_info, CL_DEVICE_HOST_UNIFIED_MEMORY, cl_bool) + +#define CL_HPP_PARAM_NAME_INFO_1_2_DEPRECATED_IN_2_0_(F) \ + F(cl_image_info, CL_IMAGE_BUFFER, cl::Buffer) + +// Include deprecated query flags based on versions +// Only include deprecated 1.0 flags if 2.0 not active as there is an enum clash +#if CL_HPP_TARGET_OPENCL_VERSION > 100 && CL_HPP_MINIMUM_OPENCL_VERSION < 200 && CL_HPP_TARGET_OPENCL_VERSION < 200 +CL_HPP_PARAM_NAME_INFO_1_0_DEPRECATED_IN_2_0_(CL_HPP_DECLARE_PARAM_TRAITS_) +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 110 +#if CL_HPP_TARGET_OPENCL_VERSION > 110 && CL_HPP_MINIMUM_OPENCL_VERSION < 200 +CL_HPP_PARAM_NAME_INFO_1_1_DEPRECATED_IN_2_0_(CL_HPP_DECLARE_PARAM_TRAITS_) +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 120 +#if CL_HPP_TARGET_OPENCL_VERSION > 120 && CL_HPP_MINIMUM_OPENCL_VERSION < 200 +CL_HPP_PARAM_NAME_INFO_1_2_DEPRECATED_IN_2_0_(CL_HPP_DECLARE_PARAM_TRAITS_) +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 200 + +#if defined(CL_HPP_USE_CL_DEVICE_FISSION) +CL_HPP_PARAM_NAME_DEVICE_FISSION_(CL_HPP_DECLARE_PARAM_TRAITS_); +#endif // CL_HPP_USE_CL_DEVICE_FISSION + +#ifdef CL_PLATFORM_ICD_SUFFIX_KHR +CL_HPP_DECLARE_PARAM_TRAITS_(cl_platform_info, CL_PLATFORM_ICD_SUFFIX_KHR, string) +#endif + +#ifdef CL_DEVICE_PROFILING_TIMER_OFFSET_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_PROFILING_TIMER_OFFSET_AMD, cl_ulong) +#endif + +#ifdef CL_DEVICE_GLOBAL_FREE_MEMORY_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_GLOBAL_FREE_MEMORY_AMD, vector) +#endif +#ifdef CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_SIMD_PER_COMPUTE_UNIT_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_SIMD_WIDTH_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_SIMD_WIDTH_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_SIMD_INSTRUCTION_WIDTH_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_WAVEFRONT_WIDTH_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_WAVEFRONT_WIDTH_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_GLOBAL_MEM_CHANNELS_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_GLOBAL_MEM_CHANNEL_BANKS_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_GLOBAL_MEM_CHANNEL_BANK_WIDTH_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_LOCAL_MEM_SIZE_PER_COMPUTE_UNIT_AMD, cl_uint) +#endif +#ifdef CL_DEVICE_LOCAL_MEM_BANKS_AMD +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_LOCAL_MEM_BANKS_AMD, cl_uint) +#endif + +#ifdef CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV, cl_uint) +#endif +#ifdef CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV, cl_uint) +#endif +#ifdef CL_DEVICE_REGISTERS_PER_BLOCK_NV +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_REGISTERS_PER_BLOCK_NV, cl_uint) +#endif +#ifdef CL_DEVICE_WARP_SIZE_NV +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_WARP_SIZE_NV, cl_uint) +#endif +#ifdef CL_DEVICE_GPU_OVERLAP_NV +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_GPU_OVERLAP_NV, cl_bool) +#endif +#ifdef CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV, cl_bool) +#endif +#ifdef CL_DEVICE_INTEGRATED_MEMORY_NV +CL_HPP_DECLARE_PARAM_TRAITS_(cl_device_info, CL_DEVICE_INTEGRATED_MEMORY_NV, cl_bool) +#endif + +// Convenience functions + +template +inline cl_int +getInfo(Func f, cl_uint name, T* param) +{ + return getInfoHelper(f, name, param, 0); +} + +template +struct GetInfoFunctor0 +{ + Func f_; const Arg0& arg0_; + cl_int operator ()( + cl_uint param, size_type size, void* value, size_type* size_ret) + { return f_(arg0_, param, size, value, size_ret); } +}; + +template +struct GetInfoFunctor1 +{ + Func f_; const Arg0& arg0_; const Arg1& arg1_; + cl_int operator ()( + cl_uint param, size_type size, void* value, size_type* size_ret) + { return f_(arg0_, arg1_, param, size, value, size_ret); } +}; + +template +inline cl_int +getInfo(Func f, const Arg0& arg0, cl_uint name, T* param) +{ + GetInfoFunctor0 f0 = { f, arg0 }; + return getInfoHelper(f0, name, param, 0); +} + +template +inline cl_int +getInfo(Func f, const Arg0& arg0, const Arg1& arg1, cl_uint name, T* param) +{ + GetInfoFunctor1 f0 = { f, arg0, arg1 }; + return getInfoHelper(f0, name, param, 0); +} + + +template +struct ReferenceHandler +{ }; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +/** + * OpenCL 1.2 devices do have retain/release. + */ +template <> +struct ReferenceHandler +{ + /** + * Retain the device. + * \param device A valid device created using createSubDevices + * \return + * CL_SUCCESS if the function executed successfully. + * CL_INVALID_DEVICE if device was not a valid subdevice + * CL_OUT_OF_RESOURCES + * CL_OUT_OF_HOST_MEMORY + */ + static cl_int retain(cl_device_id device) + { return ::clRetainDevice(device); } + /** + * Retain the device. + * \param device A valid device created using createSubDevices + * \return + * CL_SUCCESS if the function executed successfully. + * CL_INVALID_DEVICE if device was not a valid subdevice + * CL_OUT_OF_RESOURCES + * CL_OUT_OF_HOST_MEMORY + */ + static cl_int release(cl_device_id device) + { return ::clReleaseDevice(device); } +}; +#else // CL_HPP_TARGET_OPENCL_VERSION >= 120 +/** + * OpenCL 1.1 devices do not have retain/release. + */ +template <> +struct ReferenceHandler +{ + // cl_device_id does not have retain(). + static cl_int retain(cl_device_id) + { return CL_SUCCESS; } + // cl_device_id does not have release(). + static cl_int release(cl_device_id) + { return CL_SUCCESS; } +}; +#endif // ! (CL_HPP_TARGET_OPENCL_VERSION >= 120) + +template <> +struct ReferenceHandler +{ + // cl_platform_id does not have retain(). + static cl_int retain(cl_platform_id) + { return CL_SUCCESS; } + // cl_platform_id does not have release(). + static cl_int release(cl_platform_id) + { return CL_SUCCESS; } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_context context) + { return ::clRetainContext(context); } + static cl_int release(cl_context context) + { return ::clReleaseContext(context); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_command_queue queue) + { return ::clRetainCommandQueue(queue); } + static cl_int release(cl_command_queue queue) + { return ::clReleaseCommandQueue(queue); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_mem memory) + { return ::clRetainMemObject(memory); } + static cl_int release(cl_mem memory) + { return ::clReleaseMemObject(memory); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_sampler sampler) + { return ::clRetainSampler(sampler); } + static cl_int release(cl_sampler sampler) + { return ::clReleaseSampler(sampler); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_program program) + { return ::clRetainProgram(program); } + static cl_int release(cl_program program) + { return ::clReleaseProgram(program); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_kernel kernel) + { return ::clRetainKernel(kernel); } + static cl_int release(cl_kernel kernel) + { return ::clReleaseKernel(kernel); } +}; + +template <> +struct ReferenceHandler +{ + static cl_int retain(cl_event event) + { return ::clRetainEvent(event); } + static cl_int release(cl_event event) + { return ::clReleaseEvent(event); } +}; + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 && CL_HPP_MINIMUM_OPENCL_VERSION < 120 +// Extracts version number with major in the upper 16 bits, minor in the lower 16 +static cl_uint getVersion(const vector &versionInfo) +{ + int highVersion = 0; + int lowVersion = 0; + int index = 7; + while(versionInfo[index] != '.' ) { + highVersion *= 10; + highVersion += versionInfo[index]-'0'; + ++index; + } + ++index; + while(versionInfo[index] != ' ' && versionInfo[index] != '\0') { + lowVersion *= 10; + lowVersion += versionInfo[index]-'0'; + ++index; + } + return (highVersion << 16) | lowVersion; +} + +static cl_uint getPlatformVersion(cl_platform_id platform) +{ + size_type size = 0; + clGetPlatformInfo(platform, CL_PLATFORM_VERSION, 0, NULL, &size); + + vector versionInfo(size); + clGetPlatformInfo(platform, CL_PLATFORM_VERSION, size, versionInfo.data(), &size); + return getVersion(versionInfo); +} + +static cl_uint getDevicePlatformVersion(cl_device_id device) +{ + cl_platform_id platform; + clGetDeviceInfo(device, CL_DEVICE_PLATFORM, sizeof(platform), &platform, NULL); + return getPlatformVersion(platform); +} + +static cl_uint getContextPlatformVersion(cl_context context) +{ + // The platform cannot be queried directly, so we first have to grab a + // device and obtain its context + size_type size = 0; + clGetContextInfo(context, CL_CONTEXT_DEVICES, 0, NULL, &size); + if (size == 0) + return 0; + vector devices(size/sizeof(cl_device_id)); + clGetContextInfo(context, CL_CONTEXT_DEVICES, size, devices.data(), NULL); + return getDevicePlatformVersion(devices[0]); +} +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 && CL_HPP_MINIMUM_OPENCL_VERSION < 120 + +template +class Wrapper +{ +public: + typedef T cl_type; + +protected: + cl_type object_; + +public: + Wrapper() : object_(NULL) { } + + Wrapper(const cl_type &obj, bool retainObject) : object_(obj) + { + if (retainObject) { + detail::errHandler(retain(), __RETAIN_ERR); + } + } + + ~Wrapper() + { + if (object_ != NULL) { release(); } + } + + Wrapper(const Wrapper& rhs) + { + object_ = rhs.object_; + detail::errHandler(retain(), __RETAIN_ERR); + } + + Wrapper(Wrapper&& rhs) CL_HPP_NOEXCEPT_ + { + object_ = rhs.object_; + rhs.object_ = NULL; + } + + Wrapper& operator = (const Wrapper& rhs) + { + if (this != &rhs) { + detail::errHandler(release(), __RELEASE_ERR); + object_ = rhs.object_; + detail::errHandler(retain(), __RETAIN_ERR); + } + return *this; + } + + Wrapper& operator = (Wrapper&& rhs) + { + if (this != &rhs) { + detail::errHandler(release(), __RELEASE_ERR); + object_ = rhs.object_; + rhs.object_ = NULL; + } + return *this; + } + + Wrapper& operator = (const cl_type &rhs) + { + detail::errHandler(release(), __RELEASE_ERR); + object_ = rhs; + return *this; + } + + const cl_type& operator ()() const { return object_; } + + cl_type& operator ()() { return object_; } + + const cl_type get() const { return object_; } + + cl_type get() { return object_; } + + +protected: + template + friend inline cl_int getInfoHelper(Func, cl_uint, U*, int, typename U::cl_type); + + cl_int retain() const + { + if (object_ != nullptr) { + return ReferenceHandler::retain(object_); + } + else { + return CL_SUCCESS; + } + } + + cl_int release() const + { + if (object_ != nullptr) { + return ReferenceHandler::release(object_); + } + else { + return CL_SUCCESS; + } + } +}; + +template <> +class Wrapper +{ +public: + typedef cl_device_id cl_type; + +protected: + cl_type object_; + bool referenceCountable_; + + static bool isReferenceCountable(cl_device_id device) + { + bool retVal = false; +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +#if CL_HPP_MINIMUM_OPENCL_VERSION < 120 + if (device != NULL) { + int version = getDevicePlatformVersion(device); + if(version > ((1 << 16) + 1)) { + retVal = true; + } + } +#else // CL_HPP_MINIMUM_OPENCL_VERSION < 120 + retVal = true; +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 120 +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + return retVal; + } + +public: + Wrapper() : object_(NULL), referenceCountable_(false) + { + } + + Wrapper(const cl_type &obj, bool retainObject) : + object_(obj), + referenceCountable_(false) + { + referenceCountable_ = isReferenceCountable(obj); + + if (retainObject) { + detail::errHandler(retain(), __RETAIN_ERR); + } + } + + ~Wrapper() + { + release(); + } + + Wrapper(const Wrapper& rhs) + { + object_ = rhs.object_; + referenceCountable_ = isReferenceCountable(object_); + detail::errHandler(retain(), __RETAIN_ERR); + } + + Wrapper(Wrapper&& rhs) CL_HPP_NOEXCEPT_ + { + object_ = rhs.object_; + referenceCountable_ = rhs.referenceCountable_; + rhs.object_ = NULL; + rhs.referenceCountable_ = false; + } + + Wrapper& operator = (const Wrapper& rhs) + { + if (this != &rhs) { + detail::errHandler(release(), __RELEASE_ERR); + object_ = rhs.object_; + referenceCountable_ = rhs.referenceCountable_; + detail::errHandler(retain(), __RETAIN_ERR); + } + return *this; + } + + Wrapper& operator = (Wrapper&& rhs) + { + if (this != &rhs) { + detail::errHandler(release(), __RELEASE_ERR); + object_ = rhs.object_; + referenceCountable_ = rhs.referenceCountable_; + rhs.object_ = NULL; + rhs.referenceCountable_ = false; + } + return *this; + } + + Wrapper& operator = (const cl_type &rhs) + { + detail::errHandler(release(), __RELEASE_ERR); + object_ = rhs; + referenceCountable_ = isReferenceCountable(object_); + return *this; + } + + const cl_type& operator ()() const { return object_; } + + cl_type& operator ()() { return object_; } + + cl_type get() const { return object_; } + +protected: + template + friend inline cl_int getInfoHelper(Func, cl_uint, U*, int, typename U::cl_type); + + template + friend inline cl_int getInfoHelper(Func, cl_uint, vector*, int, typename U::cl_type); + + cl_int retain() const + { + if( object_ != nullptr && referenceCountable_ ) { + return ReferenceHandler::retain(object_); + } + else { + return CL_SUCCESS; + } + } + + cl_int release() const + { + if (object_ != nullptr && referenceCountable_) { + return ReferenceHandler::release(object_); + } + else { + return CL_SUCCESS; + } + } +}; + +template +inline bool operator==(const Wrapper &lhs, const Wrapper &rhs) +{ + return lhs() == rhs(); +} + +template +inline bool operator!=(const Wrapper &lhs, const Wrapper &rhs) +{ + return !operator==(lhs, rhs); +} + +} // namespace detail +//! \endcond + + +using BuildLogType = vector::param_type>>; +#if defined(CL_HPP_ENABLE_EXCEPTIONS) +/** +* Exception class for build errors to carry build info +*/ +class BuildError : public Error +{ +private: + BuildLogType buildLogs; +public: + BuildError(cl_int err, const char * errStr, const BuildLogType &vec) : Error(err, errStr), buildLogs(vec) + { + } + + BuildLogType getBuildLog() const + { + return buildLogs; + } +}; +namespace detail { + static inline cl_int buildErrHandler( + cl_int err, + const char * errStr, + const BuildLogType &buildLogs) + { + if (err != CL_SUCCESS) { + throw BuildError(err, errStr, buildLogs); + } + return err; + } +} // namespace detail + +#else +namespace detail { + static inline cl_int buildErrHandler( + cl_int err, + const char * errStr, + const BuildLogType &buildLogs) + { + (void)buildLogs; // suppress unused variable warning + (void)errStr; + return err; + } +} // namespace detail +#endif // #if defined(CL_HPP_ENABLE_EXCEPTIONS) + + +/*! \stuct ImageFormat + * \brief Adds constructors and member functions for cl_image_format. + * + * \see cl_image_format + */ +struct ImageFormat : public cl_image_format +{ + //! \brief Default constructor - performs no initialization. + ImageFormat(){} + + //! \brief Initializing constructor. + ImageFormat(cl_channel_order order, cl_channel_type type) + { + image_channel_order = order; + image_channel_data_type = type; + } + + //! \brief Assignment operator. + ImageFormat& operator = (const ImageFormat& rhs) + { + if (this != &rhs) { + this->image_channel_data_type = rhs.image_channel_data_type; + this->image_channel_order = rhs.image_channel_order; + } + return *this; + } +}; + +/*! \brief Class interface for cl_device_id. + * + * \note Copies of these objects are inexpensive, since they don't 'own' + * any underlying resources or data structures. + * + * \see cl_device_id + */ +class Device : public detail::Wrapper +{ +private: + static std::once_flag default_initialized_; + static Device default_; + static cl_int default_error_; + + /*! \brief Create the default context. + * + * This sets @c default_ and @c default_error_. It does not throw + * @c cl::Error. + */ + static void makeDefault(); + + /*! \brief Create the default platform from a provided platform. + * + * This sets @c default_. It does not throw + * @c cl::Error. + */ + static void makeDefaultProvided(const Device &p) { + default_ = p; + } + +public: +#ifdef CL_HPP_UNIT_TEST_ENABLE + /*! \brief Reset the default. + * + * This sets @c default_ to an empty value to support cleanup in + * the unit test framework. + * This function is not thread safe. + */ + static void unitTestClearDefault() { + default_ = Device(); + } +#endif // #ifdef CL_HPP_UNIT_TEST_ENABLE + + //! \brief Default constructor - initializes to NULL. + Device() : detail::Wrapper() { } + + /*! \brief Constructor from cl_device_id. + * + * This simply copies the device ID value, which is an inexpensive operation. + */ + explicit Device(const cl_device_id &device, bool retainObject = false) : + detail::Wrapper(device, retainObject) { } + + /*! \brief Returns the first device on the default context. + * + * \see Context::getDefault() + */ + static Device getDefault( + cl_int *errResult = NULL) + { + std::call_once(default_initialized_, makeDefault); + detail::errHandler(default_error_); + if (errResult != NULL) { + *errResult = default_error_; + } + return default_; + } + + /** + * Modify the default device to be used by + * subsequent operations. + * Will only set the default if no default was previously created. + * @return updated default device. + * Should be compared to the passed value to ensure that it was updated. + */ + static Device setDefault(const Device &default_device) + { + std::call_once(default_initialized_, makeDefaultProvided, std::cref(default_device)); + detail::errHandler(default_error_); + return default_; + } + + /*! \brief Assignment operator from cl_device_id. + * + * This simply copies the device ID value, which is an inexpensive operation. + */ + Device& operator = (const cl_device_id& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Device(const Device& dev) : detail::Wrapper(dev) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Device& operator = (const Device &dev) + { + detail::Wrapper::operator=(dev); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Device(Device&& dev) CL_HPP_NOEXCEPT_ : detail::Wrapper(std::move(dev)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Device& operator = (Device &&dev) + { + detail::Wrapper::operator=(std::move(dev)); + return *this; + } + + //! \brief Wrapper for clGetDeviceInfo(). + template + cl_int getInfo(cl_device_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetDeviceInfo, object_, name, param), + __GET_DEVICE_INFO_ERR); + } + + //! \brief Wrapper for clGetDeviceInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_device_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 + /** + * Return the current value of the host clock as seen by the device. + * The resolution of the device timer may be queried with the + * CL_DEVICE_PROFILING_TIMER_RESOLUTION query. + * @return The host timer value. + */ + cl_ulong getHostTimer(cl_int *error = nullptr) + { + cl_ulong retVal = 0; + cl_int err = + clGetHostTimer(this->get(), &retVal); + detail::errHandler( + err, + __GET_HOST_TIMER_ERR); + if (error) { + *error = err; + } + return retVal; + } + + /** + * Return a synchronized pair of host and device timestamps as seen by device. + * Use to correlate the clocks and get the host timer only using getHostTimer + * as a lower cost mechanism in between calls. + * The resolution of the host timer may be queried with the + * CL_PLATFORM_HOST_TIMER_RESOLUTION query. + * The resolution of the device timer may be queried with the + * CL_DEVICE_PROFILING_TIMER_RESOLUTION query. + * @return A pair of (device timer, host timer) timer values. + */ + std::pair getDeviceAndHostTimer(cl_int *error = nullptr) + { + std::pair retVal; + cl_int err = + clGetDeviceAndHostTimer(this->get(), &(retVal.first), &(retVal.second)); + detail::errHandler( + err, + __GET_DEVICE_AND_HOST_TIMER_ERR); + if (error) { + *error = err; + } + return retVal; + } +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + /** + * CL 1.2 version + */ +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + //! \brief Wrapper for clCreateSubDevices(). + cl_int createSubDevices( + const cl_device_partition_property * properties, + vector* devices) + { + cl_uint n = 0; + cl_int err = clCreateSubDevices(object_, properties, 0, NULL, &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_SUB_DEVICES_ERR); + } + + vector ids(n); + err = clCreateSubDevices(object_, properties, n, ids.data(), NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_SUB_DEVICES_ERR); + } + + // Cannot trivially assign because we need to capture intermediates + // with safe construction + if (devices) { + devices->resize(ids.size()); + + // Assign to param, constructing with retain behaviour + // to correctly capture each underlying CL object + for (size_type i = 0; i < ids.size(); i++) { + // We do not need to retain because this device is being created + // by the runtime + (*devices)[i] = Device(ids[i], false); + } + } + + return CL_SUCCESS; + } +#elif defined(CL_HPP_USE_CL_DEVICE_FISSION) + +/** + * CL 1.1 version that uses device fission extension. + */ + cl_int createSubDevices( + const cl_device_partition_property_ext * properties, + vector* devices) + { + typedef CL_API_ENTRY cl_int + ( CL_API_CALL * PFN_clCreateSubDevicesEXT)( + cl_device_id /*in_device*/, + const cl_device_partition_property_ext * /* properties */, + cl_uint /*num_entries*/, + cl_device_id * /*out_devices*/, + cl_uint * /*num_devices*/ ) CL_EXT_SUFFIX__VERSION_1_1; + + static PFN_clCreateSubDevicesEXT pfn_clCreateSubDevicesEXT = NULL; + CL_HPP_INIT_CL_EXT_FCN_PTR_(clCreateSubDevicesEXT); + + cl_uint n = 0; + cl_int err = pfn_clCreateSubDevicesEXT(object_, properties, 0, NULL, &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_SUB_DEVICES_ERR); + } + + vector ids(n); + err = pfn_clCreateSubDevicesEXT(object_, properties, n, ids.data(), NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_SUB_DEVICES_ERR); + } + // Cannot trivially assign because we need to capture intermediates + // with safe construction + if (devices) { + devices->resize(ids.size()); + + // Assign to param, constructing with retain behaviour + // to correctly capture each underlying CL object + for (size_type i = 0; i < ids.size(); i++) { + // We do not need to retain because this device is being created + // by the runtime + (*devices)[i] = Device(ids[i], false); + } + } + return CL_SUCCESS; + } +#endif // defined(CL_HPP_USE_CL_DEVICE_FISSION) +}; + +CL_HPP_DEFINE_STATIC_MEMBER_ std::once_flag Device::default_initialized_; +CL_HPP_DEFINE_STATIC_MEMBER_ Device Device::default_; +CL_HPP_DEFINE_STATIC_MEMBER_ cl_int Device::default_error_ = CL_SUCCESS; + +/*! \brief Class interface for cl_platform_id. + * + * \note Copies of these objects are inexpensive, since they don't 'own' + * any underlying resources or data structures. + * + * \see cl_platform_id + */ +class Platform : public detail::Wrapper +{ +private: + static std::once_flag default_initialized_; + static Platform default_; + static cl_int default_error_; + + /*! \brief Create the default context. + * + * This sets @c default_ and @c default_error_. It does not throw + * @c cl::Error. + */ + static void makeDefault() { + /* Throwing an exception from a call_once invocation does not do + * what we wish, so we catch it and save the error. + */ +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + try +#endif + { + // If default wasn't passed ,generate one + // Otherwise set it + cl_uint n = 0; + + cl_int err = ::clGetPlatformIDs(0, NULL, &n); + if (err != CL_SUCCESS) { + default_error_ = err; + return; + } + if (n == 0) { + default_error_ = CL_INVALID_PLATFORM; + return; + } + + vector ids(n); + err = ::clGetPlatformIDs(n, ids.data(), NULL); + if (err != CL_SUCCESS) { + default_error_ = err; + return; + } + + default_ = Platform(ids[0]); + } +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + catch (cl::Error &e) { + default_error_ = e.err(); + } +#endif + } + + /*! \brief Create the default platform from a provided platform. + * + * This sets @c default_. It does not throw + * @c cl::Error. + */ + static void makeDefaultProvided(const Platform &p) { + default_ = p; + } + +public: +#ifdef CL_HPP_UNIT_TEST_ENABLE + /*! \brief Reset the default. + * + * This sets @c default_ to an empty value to support cleanup in + * the unit test framework. + * This function is not thread safe. + */ + static void unitTestClearDefault() { + default_ = Platform(); + } +#endif // #ifdef CL_HPP_UNIT_TEST_ENABLE + + //! \brief Default constructor - initializes to NULL. + Platform() : detail::Wrapper() { } + + /*! \brief Constructor from cl_platform_id. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * This simply copies the platform ID value, which is an inexpensive operation. + */ + explicit Platform(const cl_platform_id &platform, bool retainObject = false) : + detail::Wrapper(platform, retainObject) { } + + /*! \brief Assignment operator from cl_platform_id. + * + * This simply copies the platform ID value, which is an inexpensive operation. + */ + Platform& operator = (const cl_platform_id& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + static Platform getDefault( + cl_int *errResult = NULL) + { + std::call_once(default_initialized_, makeDefault); + detail::errHandler(default_error_); + if (errResult != NULL) { + *errResult = default_error_; + } + return default_; + } + + /** + * Modify the default platform to be used by + * subsequent operations. + * Will only set the default if no default was previously created. + * @return updated default platform. + * Should be compared to the passed value to ensure that it was updated. + */ + static Platform setDefault(const Platform &default_platform) + { + std::call_once(default_initialized_, makeDefaultProvided, std::cref(default_platform)); + detail::errHandler(default_error_); + return default_; + } + + //! \brief Wrapper for clGetPlatformInfo(). + cl_int getInfo(cl_platform_info name, string* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetPlatformInfo, object_, name, param), + __GET_PLATFORM_INFO_ERR); + } + + //! \brief Wrapper for clGetPlatformInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_platform_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + /*! \brief Gets a list of devices for this platform. + * + * Wraps clGetDeviceIDs(). + */ + cl_int getDevices( + cl_device_type type, + vector* devices) const + { + cl_uint n = 0; + if( devices == NULL ) { + return detail::errHandler(CL_INVALID_ARG_VALUE, __GET_DEVICE_IDS_ERR); + } + cl_int err = ::clGetDeviceIDs(object_, type, 0, NULL, &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_DEVICE_IDS_ERR); + } + + vector ids(n); + err = ::clGetDeviceIDs(object_, type, n, ids.data(), NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_DEVICE_IDS_ERR); + } + + // Cannot trivially assign because we need to capture intermediates + // with safe construction + // We must retain things we obtain from the API to avoid releasing + // API-owned objects. + if (devices) { + devices->resize(ids.size()); + + // Assign to param, constructing with retain behaviour + // to correctly capture each underlying CL object + for (size_type i = 0; i < ids.size(); i++) { + (*devices)[i] = Device(ids[i], true); + } + } + return CL_SUCCESS; + } + +#if defined(CL_HPP_USE_DX_INTEROP) + /*! \brief Get the list of available D3D10 devices. + * + * \param d3d_device_source. + * + * \param d3d_object. + * + * \param d3d_device_set. + * + * \param devices returns a vector of OpenCL D3D10 devices found. The cl::Device + * values returned in devices can be used to identify a specific OpenCL + * device. If \a devices argument is NULL, this argument is ignored. + * + * \return One of the following values: + * - CL_SUCCESS if the function is executed successfully. + * + * The application can query specific capabilities of the OpenCL device(s) + * returned by cl::getDevices. This can be used by the application to + * determine which device(s) to use. + * + * \note In the case that exceptions are enabled and a return value + * other than CL_SUCCESS is generated, then cl::Error exception is + * generated. + */ + cl_int getDevices( + cl_d3d10_device_source_khr d3d_device_source, + void * d3d_object, + cl_d3d10_device_set_khr d3d_device_set, + vector* devices) const + { + typedef CL_API_ENTRY cl_int (CL_API_CALL *PFN_clGetDeviceIDsFromD3D10KHR)( + cl_platform_id platform, + cl_d3d10_device_source_khr d3d_device_source, + void * d3d_object, + cl_d3d10_device_set_khr d3d_device_set, + cl_uint num_entries, + cl_device_id * devices, + cl_uint* num_devices); + + if( devices == NULL ) { + return detail::errHandler(CL_INVALID_ARG_VALUE, __GET_DEVICE_IDS_ERR); + } + + static PFN_clGetDeviceIDsFromD3D10KHR pfn_clGetDeviceIDsFromD3D10KHR = NULL; + CL_HPP_INIT_CL_EXT_FCN_PTR_PLATFORM_(object_, clGetDeviceIDsFromD3D10KHR); + + cl_uint n = 0; + cl_int err = pfn_clGetDeviceIDsFromD3D10KHR( + object_, + d3d_device_source, + d3d_object, + d3d_device_set, + 0, + NULL, + &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_DEVICE_IDS_ERR); + } + + vector ids(n); + err = pfn_clGetDeviceIDsFromD3D10KHR( + object_, + d3d_device_source, + d3d_object, + d3d_device_set, + n, + ids.data(), + NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_DEVICE_IDS_ERR); + } + + // Cannot trivially assign because we need to capture intermediates + // with safe construction + // We must retain things we obtain from the API to avoid releasing + // API-owned objects. + if (devices) { + devices->resize(ids.size()); + + // Assign to param, constructing with retain behaviour + // to correctly capture each underlying CL object + for (size_type i = 0; i < ids.size(); i++) { + (*devices)[i] = Device(ids[i], true); + } + } + return CL_SUCCESS; + } +#endif + + /*! \brief Gets a list of available platforms. + * + * Wraps clGetPlatformIDs(). + */ + static cl_int get( + vector* platforms) + { + cl_uint n = 0; + + if( platforms == NULL ) { + return detail::errHandler(CL_INVALID_ARG_VALUE, __GET_PLATFORM_IDS_ERR); + } + + cl_int err = ::clGetPlatformIDs(0, NULL, &n); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_PLATFORM_IDS_ERR); + } + + vector ids(n); + err = ::clGetPlatformIDs(n, ids.data(), NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_PLATFORM_IDS_ERR); + } + + if (platforms) { + platforms->resize(ids.size()); + + // Platforms don't reference count + for (size_type i = 0; i < ids.size(); i++) { + (*platforms)[i] = Platform(ids[i]); + } + } + return CL_SUCCESS; + } + + /*! \brief Gets the first available platform. + * + * Wraps clGetPlatformIDs(), returning the first result. + */ + static cl_int get( + Platform * platform) + { + cl_int err; + Platform default_platform = Platform::getDefault(&err); + if (platform) { + *platform = default_platform; + } + return err; + } + + /*! \brief Gets the first available platform, returning it by value. + * + * \return Returns a valid platform if one is available. + * If no platform is available will return a null platform. + * Throws an exception if no platforms are available + * or an error condition occurs. + * Wraps clGetPlatformIDs(), returning the first result. + */ + static Platform get( + cl_int * errResult = NULL) + { + cl_int err; + Platform default_platform = Platform::getDefault(&err); + if (errResult) { + *errResult = err; + } + return default_platform; + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + //! \brief Wrapper for clUnloadCompiler(). + cl_int + unloadCompiler() + { + return ::clUnloadPlatformCompiler(object_); + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 +}; // class Platform + +CL_HPP_DEFINE_STATIC_MEMBER_ std::once_flag Platform::default_initialized_; +CL_HPP_DEFINE_STATIC_MEMBER_ Platform Platform::default_; +CL_HPP_DEFINE_STATIC_MEMBER_ cl_int Platform::default_error_ = CL_SUCCESS; + + +/** + * Deprecated APIs for 1.2 + */ +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) +/** + * Unload the OpenCL compiler. + * \note Deprecated for OpenCL 1.2. Use Platform::unloadCompiler instead. + */ +inline CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_int +UnloadCompiler() CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; +inline cl_int +UnloadCompiler() +{ + return ::clUnloadCompiler(); +} +#endif // #if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + +/*! \brief Class interface for cl_context. + * + * \note Copies of these objects are shallow, meaning that the copy will refer + * to the same underlying cl_context as the original. For details, see + * clRetainContext() and clReleaseContext(). + * + * \see cl_context + */ +class Context + : public detail::Wrapper +{ +private: + static std::once_flag default_initialized_; + static Context default_; + static cl_int default_error_; + + /*! \brief Create the default context from the default device type in the default platform. + * + * This sets @c default_ and @c default_error_. It does not throw + * @c cl::Error. + */ + static void makeDefault() { + /* Throwing an exception from a call_once invocation does not do + * what we wish, so we catch it and save the error. + */ +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + try +#endif + { +#if !defined(__APPLE__) && !defined(__MACOS) + const Platform &p = Platform::getDefault(); + cl_platform_id defaultPlatform = p(); + cl_context_properties properties[3] = { + CL_CONTEXT_PLATFORM, (cl_context_properties)defaultPlatform, 0 + }; +#else // #if !defined(__APPLE__) && !defined(__MACOS) + cl_context_properties *properties = nullptr; +#endif // #if !defined(__APPLE__) && !defined(__MACOS) + + default_ = Context( + CL_DEVICE_TYPE_DEFAULT, + properties, + NULL, + NULL, + &default_error_); + } +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + catch (cl::Error &e) { + default_error_ = e.err(); + } +#endif + } + + + /*! \brief Create the default context from a provided Context. + * + * This sets @c default_. It does not throw + * @c cl::Error. + */ + static void makeDefaultProvided(const Context &c) { + default_ = c; + } + +public: +#ifdef CL_HPP_UNIT_TEST_ENABLE + /*! \brief Reset the default. + * + * This sets @c default_ to an empty value to support cleanup in + * the unit test framework. + * This function is not thread safe. + */ + static void unitTestClearDefault() { + default_ = Context(); + } +#endif // #ifdef CL_HPP_UNIT_TEST_ENABLE + + /*! \brief Constructs a context including a list of specified devices. + * + * Wraps clCreateContext(). + */ + Context( + const vector& devices, + cl_context_properties* properties = NULL, + void (CL_CALLBACK * notifyFptr)( + const char *, + const void *, + size_type, + void *) = NULL, + void* data = NULL, + cl_int* err = NULL) + { + cl_int error; + + size_type numDevices = devices.size(); + vector deviceIDs(numDevices); + + for( size_type deviceIndex = 0; deviceIndex < numDevices; ++deviceIndex ) { + deviceIDs[deviceIndex] = (devices[deviceIndex])(); + } + + object_ = ::clCreateContext( + properties, (cl_uint) numDevices, + deviceIDs.data(), + notifyFptr, data, &error); + + detail::errHandler(error, __CREATE_CONTEXT_ERR); + if (err != NULL) { + *err = error; + } + } + + Context( + const Device& device, + cl_context_properties* properties = NULL, + void (CL_CALLBACK * notifyFptr)( + const char *, + const void *, + size_type, + void *) = NULL, + void* data = NULL, + cl_int* err = NULL) + { + cl_int error; + + cl_device_id deviceID = device(); + + object_ = ::clCreateContext( + properties, 1, + &deviceID, + notifyFptr, data, &error); + + detail::errHandler(error, __CREATE_CONTEXT_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! \brief Constructs a context including all or a subset of devices of a specified type. + * + * Wraps clCreateContextFromType(). + */ + Context( + cl_device_type type, + cl_context_properties* properties = NULL, + void (CL_CALLBACK * notifyFptr)( + const char *, + const void *, + size_type, + void *) = NULL, + void* data = NULL, + cl_int* err = NULL) + { + cl_int error; + +#if !defined(__APPLE__) && !defined(__MACOS) + cl_context_properties prop[4] = {CL_CONTEXT_PLATFORM, 0, 0, 0 }; + + if (properties == NULL) { + // Get a valid platform ID as we cannot send in a blank one + vector platforms; + error = Platform::get(&platforms); + if (error != CL_SUCCESS) { + detail::errHandler(error, __CREATE_CONTEXT_FROM_TYPE_ERR); + if (err != NULL) { + *err = error; + } + return; + } + + // Check the platforms we found for a device of our specified type + cl_context_properties platform_id = 0; + for (unsigned int i = 0; i < platforms.size(); i++) { + + vector devices; + +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + try { +#endif + + error = platforms[i].getDevices(type, &devices); + +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + } catch (cl::Error& e) { + error = e.err(); + } + // Catch if exceptions are enabled as we don't want to exit if first platform has no devices of type + // We do error checking next anyway, and can throw there if needed +#endif + + // Only squash CL_SUCCESS and CL_DEVICE_NOT_FOUND + if (error != CL_SUCCESS && error != CL_DEVICE_NOT_FOUND) { + detail::errHandler(error, __CREATE_CONTEXT_FROM_TYPE_ERR); + if (err != NULL) { + *err = error; + } + } + + if (devices.size() > 0) { + platform_id = (cl_context_properties)platforms[i](); + break; + } + } + + if (platform_id == 0) { + detail::errHandler(CL_DEVICE_NOT_FOUND, __CREATE_CONTEXT_FROM_TYPE_ERR); + if (err != NULL) { + *err = CL_DEVICE_NOT_FOUND; + } + return; + } + + prop[1] = platform_id; + properties = &prop[0]; + } +#endif + object_ = ::clCreateContextFromType( + properties, type, notifyFptr, data, &error); + + detail::errHandler(error, __CREATE_CONTEXT_FROM_TYPE_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Context(const Context& ctx) : detail::Wrapper(ctx) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Context& operator = (const Context &ctx) + { + detail::Wrapper::operator=(ctx); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Context(Context&& ctx) CL_HPP_NOEXCEPT_ : detail::Wrapper(std::move(ctx)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Context& operator = (Context &&ctx) + { + detail::Wrapper::operator=(std::move(ctx)); + return *this; + } + + + /*! \brief Returns a singleton context including all devices of CL_DEVICE_TYPE_DEFAULT. + * + * \note All calls to this function return the same cl_context as the first. + */ + static Context getDefault(cl_int * err = NULL) + { + std::call_once(default_initialized_, makeDefault); + detail::errHandler(default_error_); + if (err != NULL) { + *err = default_error_; + } + return default_; + } + + /** + * Modify the default context to be used by + * subsequent operations. + * Will only set the default if no default was previously created. + * @return updated default context. + * Should be compared to the passed value to ensure that it was updated. + */ + static Context setDefault(const Context &default_context) + { + std::call_once(default_initialized_, makeDefaultProvided, std::cref(default_context)); + detail::errHandler(default_error_); + return default_; + } + + //! \brief Default constructor - initializes to NULL. + Context() : detail::Wrapper() { } + + /*! \brief Constructor from cl_context - takes ownership. + * + * This effectively transfers ownership of a refcount on the cl_context + * into the new Context object. + */ + explicit Context(const cl_context& context, bool retainObject = false) : + detail::Wrapper(context, retainObject) { } + + /*! \brief Assignment operator from cl_context - takes ownership. + * + * This effectively transfers ownership of a refcount on the rhs and calls + * clReleaseContext() on the value previously held by this instance. + */ + Context& operator = (const cl_context& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + //! \brief Wrapper for clGetContextInfo(). + template + cl_int getInfo(cl_context_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetContextInfo, object_, name, param), + __GET_CONTEXT_INFO_ERR); + } + + //! \brief Wrapper for clGetContextInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_context_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + /*! \brief Gets a list of supported image formats. + * + * Wraps clGetSupportedImageFormats(). + */ + cl_int getSupportedImageFormats( + cl_mem_flags flags, + cl_mem_object_type type, + vector* formats) const + { + cl_uint numEntries; + + if (!formats) { + return CL_SUCCESS; + } + + cl_int err = ::clGetSupportedImageFormats( + object_, + flags, + type, + 0, + NULL, + &numEntries); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_SUPPORTED_IMAGE_FORMATS_ERR); + } + + if (numEntries > 0) { + vector value(numEntries); + err = ::clGetSupportedImageFormats( + object_, + flags, + type, + numEntries, + (cl_image_format*)value.data(), + NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __GET_SUPPORTED_IMAGE_FORMATS_ERR); + } + + formats->assign(begin(value), end(value)); + } + else { + // If no values are being returned, ensure an empty vector comes back + formats->clear(); + } + + return CL_SUCCESS; + } +}; + +inline void Device::makeDefault() +{ + /* Throwing an exception from a call_once invocation does not do + * what we wish, so we catch it and save the error. + */ +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + try +#endif + { + cl_int error = 0; + + Context context = Context::getDefault(&error); + detail::errHandler(error, __CREATE_CONTEXT_ERR); + + if (error != CL_SUCCESS) { + default_error_ = error; + } + else { + default_ = context.getInfo()[0]; + default_error_ = CL_SUCCESS; + } + } +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + catch (cl::Error &e) { + default_error_ = e.err(); + } +#endif +} + +CL_HPP_DEFINE_STATIC_MEMBER_ std::once_flag Context::default_initialized_; +CL_HPP_DEFINE_STATIC_MEMBER_ Context Context::default_; +CL_HPP_DEFINE_STATIC_MEMBER_ cl_int Context::default_error_ = CL_SUCCESS; + +/*! \brief Class interface for cl_event. + * + * \note Copies of these objects are shallow, meaning that the copy will refer + * to the same underlying cl_event as the original. For details, see + * clRetainEvent() and clReleaseEvent(). + * + * \see cl_event + */ +class Event : public detail::Wrapper +{ +public: + //! \brief Default constructor - initializes to NULL. + Event() : detail::Wrapper() { } + + /*! \brief Constructor from cl_event - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * This effectively transfers ownership of a refcount on the cl_event + * into the new Event object. + */ + explicit Event(const cl_event& event, bool retainObject = false) : + detail::Wrapper(event, retainObject) { } + + /*! \brief Assignment operator from cl_event - takes ownership. + * + * This effectively transfers ownership of a refcount on the rhs and calls + * clReleaseEvent() on the value previously held by this instance. + */ + Event& operator = (const cl_event& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + //! \brief Wrapper for clGetEventInfo(). + template + cl_int getInfo(cl_event_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetEventInfo, object_, name, param), + __GET_EVENT_INFO_ERR); + } + + //! \brief Wrapper for clGetEventInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_event_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + //! \brief Wrapper for clGetEventProfilingInfo(). + template + cl_int getProfilingInfo(cl_profiling_info name, T* param) const + { + return detail::errHandler(detail::getInfo( + &::clGetEventProfilingInfo, object_, name, param), + __GET_EVENT_PROFILE_INFO_ERR); + } + + //! \brief Wrapper for clGetEventProfilingInfo() that returns by value. + template typename + detail::param_traits::param_type + getProfilingInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_profiling_info, name>::param_type param; + cl_int result = getProfilingInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + /*! \brief Blocks the calling thread until this event completes. + * + * Wraps clWaitForEvents(). + */ + cl_int wait() const + { + return detail::errHandler( + ::clWaitForEvents(1, &object_), + __WAIT_FOR_EVENTS_ERR); + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 110 + /*! \brief Registers a user callback function for a specific command execution status. + * + * Wraps clSetEventCallback(). + */ + cl_int setCallback( + cl_int type, + void (CL_CALLBACK * pfn_notify)(cl_event, cl_int, void *), + void * user_data = NULL) + { + return detail::errHandler( + ::clSetEventCallback( + object_, + type, + pfn_notify, + user_data), + __SET_EVENT_CALLBACK_ERR); + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 110 + + /*! \brief Blocks the calling thread until every event specified is complete. + * + * Wraps clWaitForEvents(). + */ + static cl_int + waitForEvents(const vector& events) + { + return detail::errHandler( + ::clWaitForEvents( + (cl_uint) events.size(), (events.size() > 0) ? (cl_event*)&events.front() : NULL), + __WAIT_FOR_EVENTS_ERR); + } +}; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 110 +/*! \brief Class interface for user events (a subset of cl_event's). + * + * See Event for details about copy semantics, etc. + */ +class UserEvent : public Event +{ +public: + /*! \brief Constructs a user event on a given context. + * + * Wraps clCreateUserEvent(). + */ + UserEvent( + const Context& context, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateUserEvent( + context(), + &error); + + detail::errHandler(error, __CREATE_USER_EVENT_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + UserEvent() : Event() { } + + /*! \brief Sets the execution status of a user event object. + * + * Wraps clSetUserEventStatus(). + */ + cl_int setStatus(cl_int status) + { + return detail::errHandler( + ::clSetUserEventStatus(object_,status), + __SET_USER_EVENT_STATUS_ERR); + } +}; +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 110 + +/*! \brief Blocks the calling thread until every event specified is complete. + * + * Wraps clWaitForEvents(). + */ +inline static cl_int +WaitForEvents(const vector& events) +{ + return detail::errHandler( + ::clWaitForEvents( + (cl_uint) events.size(), (events.size() > 0) ? (cl_event*)&events.front() : NULL), + __WAIT_FOR_EVENTS_ERR); +} + +/*! \brief Class interface for cl_mem. + * + * \note Copies of these objects are shallow, meaning that the copy will refer + * to the same underlying cl_mem as the original. For details, see + * clRetainMemObject() and clReleaseMemObject(). + * + * \see cl_mem + */ +class Memory : public detail::Wrapper +{ +public: + //! \brief Default constructor - initializes to NULL. + Memory() : detail::Wrapper() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * Optionally transfer ownership of a refcount on the cl_mem + * into the new Memory object. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * + * See Memory for further details. + */ + explicit Memory(const cl_mem& memory, bool retainObject) : + detail::Wrapper(memory, retainObject) { } + + /*! \brief Assignment operator from cl_mem - takes ownership. + * + * This effectively transfers ownership of a refcount on the rhs and calls + * clReleaseMemObject() on the value previously held by this instance. + */ + Memory& operator = (const cl_mem& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Memory(const Memory& mem) : detail::Wrapper(mem) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Memory& operator = (const Memory &mem) + { + detail::Wrapper::operator=(mem); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Memory(Memory&& mem) CL_HPP_NOEXCEPT_ : detail::Wrapper(std::move(mem)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Memory& operator = (Memory &&mem) + { + detail::Wrapper::operator=(std::move(mem)); + return *this; + } + + + //! \brief Wrapper for clGetMemObjectInfo(). + template + cl_int getInfo(cl_mem_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetMemObjectInfo, object_, name, param), + __GET_MEM_OBJECT_INFO_ERR); + } + + //! \brief Wrapper for clGetMemObjectInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_mem_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 110 + /*! \brief Registers a callback function to be called when the memory object + * is no longer needed. + * + * Wraps clSetMemObjectDestructorCallback(). + * + * Repeated calls to this function, for a given cl_mem value, will append + * to the list of functions called (in reverse order) when memory object's + * resources are freed and the memory object is deleted. + * + * \note + * The registered callbacks are associated with the underlying cl_mem + * value - not the Memory class instance. + */ + cl_int setDestructorCallback( + void (CL_CALLBACK * pfn_notify)(cl_mem, void *), + void * user_data = NULL) + { + return detail::errHandler( + ::clSetMemObjectDestructorCallback( + object_, + pfn_notify, + user_data), + __SET_MEM_OBJECT_DESTRUCTOR_CALLBACK_ERR); + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 110 + +}; + +// Pre-declare copy functions +class Buffer; +template< typename IteratorType > +cl_int copy( IteratorType startIterator, IteratorType endIterator, cl::Buffer &buffer ); +template< typename IteratorType > +cl_int copy( const cl::Buffer &buffer, IteratorType startIterator, IteratorType endIterator ); +template< typename IteratorType > +cl_int copy( const CommandQueue &queue, IteratorType startIterator, IteratorType endIterator, cl::Buffer &buffer ); +template< typename IteratorType > +cl_int copy( const CommandQueue &queue, const cl::Buffer &buffer, IteratorType startIterator, IteratorType endIterator ); + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 +namespace detail +{ + class SVMTraitNull + { + public: + static cl_svm_mem_flags getSVMMemFlags() + { + return 0; + } + }; +} // namespace detail + +template +class SVMTraitReadWrite +{ +public: + static cl_svm_mem_flags getSVMMemFlags() + { + return CL_MEM_READ_WRITE | + Trait::getSVMMemFlags(); + } +}; + +template +class SVMTraitReadOnly +{ +public: + static cl_svm_mem_flags getSVMMemFlags() + { + return CL_MEM_READ_ONLY | + Trait::getSVMMemFlags(); + } +}; + +template +class SVMTraitWriteOnly +{ +public: + static cl_svm_mem_flags getSVMMemFlags() + { + return CL_MEM_WRITE_ONLY | + Trait::getSVMMemFlags(); + } +}; + +template> +class SVMTraitCoarse +{ +public: + static cl_svm_mem_flags getSVMMemFlags() + { + return Trait::getSVMMemFlags(); + } +}; + +template> +class SVMTraitFine +{ +public: + static cl_svm_mem_flags getSVMMemFlags() + { + return CL_MEM_SVM_FINE_GRAIN_BUFFER | + Trait::getSVMMemFlags(); + } +}; + +template> +class SVMTraitAtomic +{ +public: + static cl_svm_mem_flags getSVMMemFlags() + { + return + CL_MEM_SVM_FINE_GRAIN_BUFFER | + CL_MEM_SVM_ATOMICS | + Trait::getSVMMemFlags(); + } +}; + +// Pre-declare SVM map function +template +inline cl_int enqueueMapSVM( + T* ptr, + cl_bool blocking, + cl_map_flags flags, + size_type size, + const vector* events = NULL, + Event* event = NULL); + +/** + * STL-like allocator class for managing SVM objects provided for convenience. + * + * Note that while this behaves like an allocator for the purposes of constructing vectors and similar objects, + * care must be taken when using with smart pointers. + * The allocator should not be used to construct a unique_ptr if we are using coarse-grained SVM mode because + * the coarse-grained management behaviour would behave incorrectly with respect to reference counting. + * + * Instead the allocator embeds a Deleter which may be used with unique_ptr and is used + * with the allocate_shared and allocate_ptr supplied operations. + */ +template +class SVMAllocator { +private: + Context context_; + +public: + typedef T value_type; + typedef value_type* pointer; + typedef const value_type* const_pointer; + typedef value_type& reference; + typedef const value_type& const_reference; + typedef std::size_t size_type; + typedef std::ptrdiff_t difference_type; + + template + struct rebind + { + typedef SVMAllocator other; + }; + + template + friend class SVMAllocator; + + SVMAllocator() : + context_(Context::getDefault()) + { + } + + explicit SVMAllocator(cl::Context context) : + context_(context) + { + } + + + SVMAllocator(const SVMAllocator &other) : + context_(other.context_) + { + } + + template + SVMAllocator(const SVMAllocator &other) : + context_(other.context_) + { + } + + ~SVMAllocator() + { + } + + pointer address(reference r) CL_HPP_NOEXCEPT_ + { + return std::addressof(r); + } + + const_pointer address(const_reference r) CL_HPP_NOEXCEPT_ + { + return std::addressof(r); + } + + /** + * Allocate an SVM pointer. + * + * If the allocator is coarse-grained, this will take ownership to allow + * containers to correctly construct data in place. + */ + pointer allocate( + size_type size, + typename cl::SVMAllocator::const_pointer = 0) + { + // Allocate memory with default alignment matching the size of the type + void* voidPointer = + clSVMAlloc( + context_(), + SVMTrait::getSVMMemFlags(), + size*sizeof(T), + 0); + pointer retValue = reinterpret_cast( + voidPointer); +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + if (!retValue) { + std::bad_alloc excep; + throw excep; + } +#endif // #if defined(CL_HPP_ENABLE_EXCEPTIONS) + + // If allocation was coarse-grained then map it + if (!(SVMTrait::getSVMMemFlags() & CL_MEM_SVM_FINE_GRAIN_BUFFER)) { + cl_int err = enqueueMapSVM(retValue, CL_TRUE, CL_MAP_READ | CL_MAP_WRITE, size*sizeof(T)); + if (err != CL_SUCCESS) { + std::bad_alloc excep; + throw excep; + } + } + + // If exceptions disabled, return null pointer from allocator + return retValue; + } + + void deallocate(pointer p, size_type) + { + clSVMFree(context_(), p); + } + + /** + * Return the maximum possible allocation size. + * This is the minimum of the maximum sizes of all devices in the context. + */ + size_type max_size() const CL_HPP_NOEXCEPT_ + { + size_type maxSize = std::numeric_limits::max() / sizeof(T); + + for (const Device &d : context_.getInfo()) { + maxSize = std::min( + maxSize, + static_cast(d.getInfo())); + } + + return maxSize; + } + + template< class U, class... Args > + void construct(U* p, Args&&... args) + { + new(p)T(args...); + } + + template< class U > + void destroy(U* p) + { + p->~U(); + } + + /** + * Returns true if the contexts match. + */ + inline bool operator==(SVMAllocator const& rhs) + { + return (context_==rhs.context_); + } + + inline bool operator!=(SVMAllocator const& a) + { + return !operator==(a); + } +}; // class SVMAllocator return cl::pointer(tmp, detail::Deleter{alloc, copies}); + + +template +class SVMAllocator { +public: + typedef void value_type; + typedef value_type* pointer; + typedef const value_type* const_pointer; + + template + struct rebind + { + typedef SVMAllocator other; + }; + + template + friend class SVMAllocator; +}; + +#if !defined(CL_HPP_NO_STD_UNIQUE_PTR) +namespace detail +{ + template + class Deleter { + private: + Alloc alloc_; + size_type copies_; + + public: + typedef typename std::allocator_traits::pointer pointer; + + Deleter(const Alloc &alloc, size_type copies) : alloc_{ alloc }, copies_{ copies } + { + } + + void operator()(pointer ptr) const { + Alloc tmpAlloc{ alloc_ }; + std::allocator_traits::destroy(tmpAlloc, std::addressof(*ptr)); + std::allocator_traits::deallocate(tmpAlloc, ptr, copies_); + } + }; +} // namespace detail + +/** + * Allocation operation compatible with std::allocate_ptr. + * Creates a unique_ptr by default. + * This requirement is to ensure that the control block is not + * allocated in memory inaccessible to the host. + */ +template +cl::pointer> allocate_pointer(const Alloc &alloc_, Args&&... args) +{ + Alloc alloc(alloc_); + static const size_type copies = 1; + + // Ensure that creation of the management block and the + // object are dealt with separately such that we only provide a deleter + + T* tmp = std::allocator_traits::allocate(alloc, copies); + if (!tmp) { + std::bad_alloc excep; + throw excep; + } + try { + std::allocator_traits::construct( + alloc, + std::addressof(*tmp), + std::forward(args)...); + + return cl::pointer>(tmp, detail::Deleter{alloc, copies}); + } + catch (std::bad_alloc b) + { + std::allocator_traits::deallocate(alloc, tmp, copies); + throw; + } +} + +template< class T, class SVMTrait, class... Args > +cl::pointer>> allocate_svm(Args... args) +{ + SVMAllocator alloc; + return cl::allocate_pointer(alloc, args...); +} + +template< class T, class SVMTrait, class... Args > +cl::pointer>> allocate_svm(const cl::Context &c, Args... args) +{ + SVMAllocator alloc(c); + return cl::allocate_pointer(alloc, args...); +} +#endif // #if !defined(CL_HPP_NO_STD_UNIQUE_PTR) + +/*! \brief Vector alias to simplify contruction of coarse-grained SVM containers. + * + */ +template < class T > +using coarse_svm_vector = vector>>; + +/*! \brief Vector alias to simplify contruction of fine-grained SVM containers. +* +*/ +template < class T > +using fine_svm_vector = vector>>; + +/*! \brief Vector alias to simplify contruction of fine-grained SVM containers that support platform atomics. +* +*/ +template < class T > +using atomic_svm_vector = vector>>; + +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + + +/*! \brief Class interface for Buffer Memory Objects. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Buffer : public Memory +{ +public: + + /*! \brief Constructs a Buffer in a specified context. + * + * Wraps clCreateBuffer(). + * + * \param host_ptr Storage to be used if the CL_MEM_USE_HOST_PTR flag was + * specified. Note alignment & exclusivity requirements. + */ + Buffer( + const Context& context, + cl_mem_flags flags, + size_type size, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + object_ = ::clCreateBuffer(context(), flags, size, host_ptr, &error); + + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! \brief Constructs a Buffer in the default context. + * + * Wraps clCreateBuffer(). + * + * \param host_ptr Storage to be used if the CL_MEM_USE_HOST_PTR flag was + * specified. Note alignment & exclusivity requirements. + * + * \see Context::getDefault() + */ + Buffer( + cl_mem_flags flags, + size_type size, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + + Context context = Context::getDefault(err); + + object_ = ::clCreateBuffer(context(), flags, size, host_ptr, &error); + + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! + * \brief Construct a Buffer from a host container via iterators. + * IteratorType must be random access. + * If useHostPtr is specified iterators must represent contiguous data. + */ + template< typename IteratorType > + Buffer( + IteratorType startIterator, + IteratorType endIterator, + bool readOnly, + bool useHostPtr = false, + cl_int* err = NULL) + { + typedef typename std::iterator_traits::value_type DataType; + cl_int error; + + cl_mem_flags flags = 0; + if( readOnly ) { + flags |= CL_MEM_READ_ONLY; + } + else { + flags |= CL_MEM_READ_WRITE; + } + if( useHostPtr ) { + flags |= CL_MEM_USE_HOST_PTR; + } + + size_type size = sizeof(DataType)*(endIterator - startIterator); + + Context context = Context::getDefault(err); + + if( useHostPtr ) { + object_ = ::clCreateBuffer(context(), flags, size, static_cast(&*startIterator), &error); + } else { + object_ = ::clCreateBuffer(context(), flags, size, 0, &error); + } + + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + + if( !useHostPtr ) { + error = cl::copy(startIterator, endIterator, *this); + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + } + + /*! + * \brief Construct a Buffer from a host container via iterators using a specified context. + * IteratorType must be random access. + * If useHostPtr is specified iterators must represent contiguous data. + */ + template< typename IteratorType > + Buffer(const Context &context, IteratorType startIterator, IteratorType endIterator, + bool readOnly, bool useHostPtr = false, cl_int* err = NULL); + + /*! + * \brief Construct a Buffer from a host container via iterators using a specified queue. + * If useHostPtr is specified iterators must be random access. + */ + template< typename IteratorType > + Buffer(const CommandQueue &queue, IteratorType startIterator, IteratorType endIterator, + bool readOnly, bool useHostPtr = false, cl_int* err = NULL); + + //! \brief Default constructor - initializes to NULL. + Buffer() : Memory() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with earlier versions. + * + * See Memory for further details. + */ + explicit Buffer(const cl_mem& buffer, bool retainObject = false) : + Memory(buffer, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Buffer& operator = (const cl_mem& rhs) + { + Memory::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Buffer(const Buffer& buf) : Memory(buf) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Buffer& operator = (const Buffer &buf) + { + Memory::operator=(buf); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Buffer(Buffer&& buf) CL_HPP_NOEXCEPT_ : Memory(std::move(buf)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Buffer& operator = (Buffer &&buf) + { + Memory::operator=(std::move(buf)); + return *this; + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 110 + /*! \brief Creates a new buffer object from this. + * + * Wraps clCreateSubBuffer(). + */ + Buffer createSubBuffer( + cl_mem_flags flags, + cl_buffer_create_type buffer_create_type, + const void * buffer_create_info, + cl_int * err = NULL) + { + Buffer result; + cl_int error; + result.object_ = ::clCreateSubBuffer( + object_, + flags, + buffer_create_type, + buffer_create_info, + &error); + + detail::errHandler(error, __CREATE_SUBBUFFER_ERR); + if (err != NULL) { + *err = error; + } + + return result; + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 110 +}; + +#if defined (CL_HPP_USE_DX_INTEROP) +/*! \brief Class interface for creating OpenCL buffers from ID3D10Buffer's. + * + * This is provided to facilitate interoperability with Direct3D. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class BufferD3D10 : public Buffer +{ +public: + + + /*! \brief Constructs a BufferD3D10, in a specified context, from a + * given ID3D10Buffer. + * + * Wraps clCreateFromD3D10BufferKHR(). + */ + BufferD3D10( + const Context& context, + cl_mem_flags flags, + ID3D10Buffer* bufobj, + cl_int * err = NULL) : pfn_clCreateFromD3D10BufferKHR(nullptr) + { + typedef CL_API_ENTRY cl_mem (CL_API_CALL *PFN_clCreateFromD3D10BufferKHR)( + cl_context context, cl_mem_flags flags, ID3D10Buffer* buffer, + cl_int* errcode_ret); + PFN_clCreateFromD3D10BufferKHR pfn_clCreateFromD3D10BufferKHR; +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + vector props = context.getInfo(); + cl_platform platform = -1; + for( int i = 0; i < props.size(); ++i ) { + if( props[i] == CL_CONTEXT_PLATFORM ) { + platform = props[i+1]; + } + } + CL_HPP_INIT_CL_EXT_FCN_PTR_PLATFORM_(platform, clCreateFromD3D10BufferKHR); +#elif CL_HPP_TARGET_OPENCL_VERSION >= 110 + CL_HPP_INIT_CL_EXT_FCN_PTR_(clCreateFromD3D10BufferKHR); +#endif + + cl_int error; + object_ = pfn_clCreateFromD3D10BufferKHR( + context(), + flags, + bufobj, + &error); + + detail::errHandler(error, __CREATE_GL_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + BufferD3D10() : Buffer() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit BufferD3D10(const cl_mem& buffer, bool retainObject = false) : + Buffer(buffer, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + BufferD3D10& operator = (const cl_mem& rhs) + { + Buffer::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + BufferD3D10(const BufferD3D10& buf) : + Buffer(buf) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + BufferD3D10& operator = (const BufferD3D10 &buf) + { + Buffer::operator=(buf); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + BufferD3D10(BufferD3D10&& buf) CL_HPP_NOEXCEPT_ : Buffer(std::move(buf)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + BufferD3D10& operator = (BufferD3D10 &&buf) + { + Buffer::operator=(std::move(buf)); + return *this; + } +}; +#endif + +/*! \brief Class interface for GL Buffer Memory Objects. + * + * This is provided to facilitate interoperability with OpenGL. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class BufferGL : public Buffer +{ +public: + /*! \brief Constructs a BufferGL in a specified context, from a given + * GL buffer. + * + * Wraps clCreateFromGLBuffer(). + */ + BufferGL( + const Context& context, + cl_mem_flags flags, + cl_GLuint bufobj, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateFromGLBuffer( + context(), + flags, + bufobj, + &error); + + detail::errHandler(error, __CREATE_GL_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + BufferGL() : Buffer() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit BufferGL(const cl_mem& buffer, bool retainObject = false) : + Buffer(buffer, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + BufferGL& operator = (const cl_mem& rhs) + { + Buffer::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + BufferGL(const BufferGL& buf) : Buffer(buf) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + BufferGL& operator = (const BufferGL &buf) + { + Buffer::operator=(buf); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + BufferGL(BufferGL&& buf) CL_HPP_NOEXCEPT_ : Buffer(std::move(buf)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + BufferGL& operator = (BufferGL &&buf) + { + Buffer::operator=(std::move(buf)); + return *this; + } + + //! \brief Wrapper for clGetGLObjectInfo(). + cl_int getObjectInfo( + cl_gl_object_type *type, + cl_GLuint * gl_object_name) + { + return detail::errHandler( + ::clGetGLObjectInfo(object_,type,gl_object_name), + __GET_GL_OBJECT_INFO_ERR); + } +}; + +/*! \brief Class interface for GL Render Buffer Memory Objects. + * + * This is provided to facilitate interoperability with OpenGL. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class BufferRenderGL : public Buffer +{ +public: + /*! \brief Constructs a BufferRenderGL in a specified context, from a given + * GL Renderbuffer. + * + * Wraps clCreateFromGLRenderbuffer(). + */ + BufferRenderGL( + const Context& context, + cl_mem_flags flags, + cl_GLuint bufobj, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateFromGLRenderbuffer( + context(), + flags, + bufobj, + &error); + + detail::errHandler(error, __CREATE_GL_RENDER_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + BufferRenderGL() : Buffer() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit BufferRenderGL(const cl_mem& buffer, bool retainObject = false) : + Buffer(buffer, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + BufferRenderGL& operator = (const cl_mem& rhs) + { + Buffer::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + BufferRenderGL(const BufferRenderGL& buf) : Buffer(buf) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + BufferRenderGL& operator = (const BufferRenderGL &buf) + { + Buffer::operator=(buf); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + BufferRenderGL(BufferRenderGL&& buf) CL_HPP_NOEXCEPT_ : Buffer(std::move(buf)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + BufferRenderGL& operator = (BufferRenderGL &&buf) + { + Buffer::operator=(std::move(buf)); + return *this; + } + + //! \brief Wrapper for clGetGLObjectInfo(). + cl_int getObjectInfo( + cl_gl_object_type *type, + cl_GLuint * gl_object_name) + { + return detail::errHandler( + ::clGetGLObjectInfo(object_,type,gl_object_name), + __GET_GL_OBJECT_INFO_ERR); + } +}; + +/*! \brief C++ base class for Image Memory objects. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Image : public Memory +{ +protected: + //! \brief Default constructor - initializes to NULL. + Image() : Memory() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit Image(const cl_mem& image, bool retainObject = false) : + Memory(image, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image& operator = (const cl_mem& rhs) + { + Memory::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image(const Image& img) : Memory(img) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image& operator = (const Image &img) + { + Memory::operator=(img); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Image(Image&& img) CL_HPP_NOEXCEPT_ : Memory(std::move(img)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Image& operator = (Image &&img) + { + Memory::operator=(std::move(img)); + return *this; + } + + +public: + //! \brief Wrapper for clGetImageInfo(). + template + cl_int getImageInfo(cl_image_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetImageInfo, object_, name, param), + __GET_IMAGE_INFO_ERR); + } + + //! \brief Wrapper for clGetImageInfo() that returns by value. + template typename + detail::param_traits::param_type + getImageInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_image_info, name>::param_type param; + cl_int result = getImageInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } +}; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +/*! \brief Class interface for 1D Image Memory objects. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Image1D : public Image +{ +public: + /*! \brief Constructs a 1D Image in a specified context. + * + * Wraps clCreateImage(). + */ + Image1D( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + size_type width, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE1D, + width, + 0, 0, 0, 0, 0, 0, 0, 0 + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + host_ptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + Image1D() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit Image1D(const cl_mem& image1D, bool retainObject = false) : + Image(image1D, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image1D& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image1D(const Image1D& img) : Image(img) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image1D& operator = (const Image1D &img) + { + Image::operator=(img); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Image1D(Image1D&& img) CL_HPP_NOEXCEPT_ : Image(std::move(img)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Image1D& operator = (Image1D &&img) + { + Image::operator=(std::move(img)); + return *this; + } + +}; + +/*! \class Image1DBuffer + * \brief Image interface for 1D buffer images. + */ +class Image1DBuffer : public Image +{ +public: + Image1DBuffer( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + size_type width, + const Buffer &buffer, + cl_int* err = NULL) + { + cl_int error; + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE1D_BUFFER, + width, + 0, 0, 0, 0, 0, 0, 0, + buffer() + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + NULL, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } + + Image1DBuffer() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit Image1DBuffer(const cl_mem& image1D, bool retainObject = false) : + Image(image1D, retainObject) { } + + Image1DBuffer& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image1DBuffer(const Image1DBuffer& img) : Image(img) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image1DBuffer& operator = (const Image1DBuffer &img) + { + Image::operator=(img); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Image1DBuffer(Image1DBuffer&& img) CL_HPP_NOEXCEPT_ : Image(std::move(img)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Image1DBuffer& operator = (Image1DBuffer &&img) + { + Image::operator=(std::move(img)); + return *this; + } + +}; + +/*! \class Image1DArray + * \brief Image interface for arrays of 1D images. + */ +class Image1DArray : public Image +{ +public: + Image1DArray( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + size_type arraySize, + size_type width, + size_type rowPitch, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE1D_ARRAY, + width, + 0, 0, // height, depth (unused) + arraySize, + rowPitch, + 0, 0, 0, 0 + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + host_ptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } + + Image1DArray() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit Image1DArray(const cl_mem& imageArray, bool retainObject = false) : + Image(imageArray, retainObject) { } + + + Image1DArray& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image1DArray(const Image1DArray& img) : Image(img) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image1DArray& operator = (const Image1DArray &img) + { + Image::operator=(img); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Image1DArray(Image1DArray&& img) CL_HPP_NOEXCEPT_ : Image(std::move(img)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Image1DArray& operator = (Image1DArray &&img) + { + Image::operator=(std::move(img)); + return *this; + } + +}; +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 120 + + +/*! \brief Class interface for 2D Image Memory objects. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Image2D : public Image +{ +public: + /*! \brief Constructs a 2D Image in a specified context. + * + * Wraps clCreateImage(). + */ + Image2D( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + size_type width, + size_type height, + size_type row_pitch = 0, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + bool useCreateImage; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 && CL_HPP_MINIMUM_OPENCL_VERSION < 120 + // Run-time decision based on the actual platform + { + cl_uint version = detail::getContextPlatformVersion(context()); + useCreateImage = (version >= 0x10002); // OpenCL 1.2 or above + } +#elif CL_HPP_TARGET_OPENCL_VERSION >= 120 + useCreateImage = true; +#else + useCreateImage = false; +#endif + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + if (useCreateImage) + { + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE2D, + width, + height, + 0, 0, // depth, array size (unused) + row_pitch, + 0, 0, 0, 0 + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + host_ptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 +#if CL_HPP_MINIMUM_OPENCL_VERSION < 120 + if (!useCreateImage) + { + object_ = ::clCreateImage2D( + context(), flags,&format, width, height, row_pitch, host_ptr, &error); + + detail::errHandler(error, __CREATE_IMAGE2D_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 120 + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 || defined(CL_HPP_USE_CL_IMAGE2D_FROM_BUFFER_KHR) + /*! \brief Constructs a 2D Image from a buffer. + * \note This will share storage with the underlying buffer. + * + * Wraps clCreateImage(). + */ + Image2D( + const Context& context, + ImageFormat format, + const Buffer &sourceBuffer, + size_type width, + size_type height, + size_type row_pitch = 0, + cl_int* err = nullptr) + { + cl_int error; + + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE2D, + width, + height, + 0, 0, // depth, array size (unused) + row_pitch, + 0, 0, 0, + // Use buffer as input to image + sourceBuffer() + }; + object_ = ::clCreateImage( + context(), + 0, // flags inherited from buffer + &format, + &desc, + nullptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != nullptr) { + *err = error; + } + } +#endif //#if CL_HPP_TARGET_OPENCL_VERSION >= 200 || defined(CL_HPP_USE_CL_IMAGE2D_FROM_BUFFER_KHR) + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + /*! \brief Constructs a 2D Image from an image. + * \note This will share storage with the underlying image but may + * reinterpret the channel order and type. + * + * The image will be created matching with a descriptor matching the source. + * + * \param order is the channel order to reinterpret the image data as. + * The channel order may differ as described in the OpenCL + * 2.0 API specification. + * + * Wraps clCreateImage(). + */ + Image2D( + const Context& context, + cl_channel_order order, + const Image &sourceImage, + cl_int* err = nullptr) + { + cl_int error; + + // Descriptor fields have to match source image + size_type sourceWidth = + sourceImage.getImageInfo(); + size_type sourceHeight = + sourceImage.getImageInfo(); + size_type sourceRowPitch = + sourceImage.getImageInfo(); + cl_uint sourceNumMIPLevels = + sourceImage.getImageInfo(); + cl_uint sourceNumSamples = + sourceImage.getImageInfo(); + cl_image_format sourceFormat = + sourceImage.getImageInfo(); + + // Update only the channel order. + // Channel format inherited from source. + sourceFormat.image_channel_order = order; + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE2D, + sourceWidth, + sourceHeight, + 0, 0, // depth (unused), array size (unused) + sourceRowPitch, + 0, // slice pitch (unused) + sourceNumMIPLevels, + sourceNumSamples, + // Use buffer as input to image + sourceImage() + }; + object_ = ::clCreateImage( + context(), + 0, // flags should be inherited from mem_object + &sourceFormat, + &desc, + nullptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != nullptr) { + *err = error; + } + } +#endif //#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + + //! \brief Default constructor - initializes to NULL. + Image2D() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit Image2D(const cl_mem& image2D, bool retainObject = false) : + Image(image2D, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image2D& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image2D(const Image2D& img) : Image(img) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image2D& operator = (const Image2D &img) + { + Image::operator=(img); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Image2D(Image2D&& img) CL_HPP_NOEXCEPT_ : Image(std::move(img)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Image2D& operator = (Image2D &&img) + { + Image::operator=(std::move(img)); + return *this; + } + +}; + + +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) +/*! \brief Class interface for GL 2D Image Memory objects. + * + * This is provided to facilitate interoperability with OpenGL. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + * \note Deprecated for OpenCL 1.2. Please use ImageGL instead. + */ +class CL_EXT_PREFIX__VERSION_1_1_DEPRECATED Image2DGL : public Image2D +{ +public: + /*! \brief Constructs an Image2DGL in a specified context, from a given + * GL Texture. + * + * Wraps clCreateFromGLTexture2D(). + */ + Image2DGL( + const Context& context, + cl_mem_flags flags, + cl_GLenum target, + cl_GLint miplevel, + cl_GLuint texobj, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateFromGLTexture2D( + context(), + flags, + target, + miplevel, + texobj, + &error); + + detail::errHandler(error, __CREATE_GL_TEXTURE_2D_ERR); + if (err != NULL) { + *err = error; + } + + } + + //! \brief Default constructor - initializes to NULL. + Image2DGL() : Image2D() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit Image2DGL(const cl_mem& image, bool retainObject = false) : + Image2D(image, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + *c + * See Memory for further details. + */ + Image2DGL& operator = (const cl_mem& rhs) + { + Image2D::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image2DGL(const Image2DGL& img) : Image2D(img) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image2DGL& operator = (const Image2DGL &img) + { + Image2D::operator=(img); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Image2DGL(Image2DGL&& img) CL_HPP_NOEXCEPT_ : Image2D(std::move(img)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Image2DGL& operator = (Image2DGL &&img) + { + Image2D::operator=(std::move(img)); + return *this; + } + +} CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; +#endif // CL_USE_DEPRECATED_OPENCL_1_1_APIS + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +/*! \class Image2DArray + * \brief Image interface for arrays of 2D images. + */ +class Image2DArray : public Image +{ +public: + Image2DArray( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + size_type arraySize, + size_type width, + size_type height, + size_type rowPitch, + size_type slicePitch, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE2D_ARRAY, + width, + height, + 0, // depth (unused) + arraySize, + rowPitch, + slicePitch, + 0, 0, 0 + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + host_ptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } + + Image2DArray() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit Image2DArray(const cl_mem& imageArray, bool retainObject = false) : Image(imageArray, retainObject) { } + + Image2DArray& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image2DArray(const Image2DArray& img) : Image(img) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image2DArray& operator = (const Image2DArray &img) + { + Image::operator=(img); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Image2DArray(Image2DArray&& img) CL_HPP_NOEXCEPT_ : Image(std::move(img)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Image2DArray& operator = (Image2DArray &&img) + { + Image::operator=(std::move(img)); + return *this; + } +}; +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 120 + +/*! \brief Class interface for 3D Image Memory objects. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Image3D : public Image +{ +public: + /*! \brief Constructs a 3D Image in a specified context. + * + * Wraps clCreateImage(). + */ + Image3D( + const Context& context, + cl_mem_flags flags, + ImageFormat format, + size_type width, + size_type height, + size_type depth, + size_type row_pitch = 0, + size_type slice_pitch = 0, + void* host_ptr = NULL, + cl_int* err = NULL) + { + cl_int error; + bool useCreateImage; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 && CL_HPP_MINIMUM_OPENCL_VERSION < 120 + // Run-time decision based on the actual platform + { + cl_uint version = detail::getContextPlatformVersion(context()); + useCreateImage = (version >= 0x10002); // OpenCL 1.2 or above + } +#elif CL_HPP_TARGET_OPENCL_VERSION >= 120 + useCreateImage = true; +#else + useCreateImage = false; +#endif + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + if (useCreateImage) + { + cl_image_desc desc = + { + CL_MEM_OBJECT_IMAGE3D, + width, + height, + depth, + 0, // array size (unused) + row_pitch, + slice_pitch, + 0, 0, 0 + }; + object_ = ::clCreateImage( + context(), + flags, + &format, + &desc, + host_ptr, + &error); + + detail::errHandler(error, __CREATE_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 +#if CL_HPP_MINIMUM_OPENCL_VERSION < 120 + if (!useCreateImage) + { + object_ = ::clCreateImage3D( + context(), flags, &format, width, height, depth, row_pitch, + slice_pitch, host_ptr, &error); + + detail::errHandler(error, __CREATE_IMAGE3D_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 120 + } + + //! \brief Default constructor - initializes to NULL. + Image3D() : Image() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit Image3D(const cl_mem& image3D, bool retainObject = false) : + Image(image3D, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image3D& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image3D(const Image3D& img) : Image(img) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image3D& operator = (const Image3D &img) + { + Image::operator=(img); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Image3D(Image3D&& img) CL_HPP_NOEXCEPT_ : Image(std::move(img)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Image3D& operator = (Image3D &&img) + { + Image::operator=(std::move(img)); + return *this; + } +}; + +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) +/*! \brief Class interface for GL 3D Image Memory objects. + * + * This is provided to facilitate interoperability with OpenGL. + * + * See Memory for details about copy semantics, etc. + * + * \see Memory + */ +class Image3DGL : public Image3D +{ +public: + /*! \brief Constructs an Image3DGL in a specified context, from a given + * GL Texture. + * + * Wraps clCreateFromGLTexture3D(). + */ + Image3DGL( + const Context& context, + cl_mem_flags flags, + cl_GLenum target, + cl_GLint miplevel, + cl_GLuint texobj, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateFromGLTexture3D( + context(), + flags, + target, + miplevel, + texobj, + &error); + + detail::errHandler(error, __CREATE_GL_TEXTURE_3D_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + Image3DGL() : Image3D() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit Image3DGL(const cl_mem& image, bool retainObject = false) : + Image3D(image, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Image3DGL& operator = (const cl_mem& rhs) + { + Image3D::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image3DGL(const Image3DGL& img) : Image3D(img) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Image3DGL& operator = (const Image3DGL &img) + { + Image3D::operator=(img); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Image3DGL(Image3DGL&& img) CL_HPP_NOEXCEPT_ : Image3D(std::move(img)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Image3DGL& operator = (Image3DGL &&img) + { + Image3D::operator=(std::move(img)); + return *this; + } +}; +#endif // CL_USE_DEPRECATED_OPENCL_1_1_APIS + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +/*! \class ImageGL + * \brief general image interface for GL interop. + * We abstract the 2D and 3D GL images into a single instance here + * that wraps all GL sourced images on the grounds that setup information + * was performed by OpenCL anyway. + */ +class ImageGL : public Image +{ +public: + ImageGL( + const Context& context, + cl_mem_flags flags, + cl_GLenum target, + cl_GLint miplevel, + cl_GLuint texobj, + cl_int * err = NULL) + { + cl_int error; + object_ = ::clCreateFromGLTexture( + context(), + flags, + target, + miplevel, + texobj, + &error); + + detail::errHandler(error, __CREATE_GL_TEXTURE_ERR); + if (err != NULL) { + *err = error; + } + } + + ImageGL() : Image() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * See Memory for further details. + */ + explicit ImageGL(const cl_mem& image, bool retainObject = false) : + Image(image, retainObject) { } + + ImageGL& operator = (const cl_mem& rhs) + { + Image::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + ImageGL(const ImageGL& img) : Image(img) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + ImageGL& operator = (const ImageGL &img) + { + Image::operator=(img); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + ImageGL(ImageGL&& img) CL_HPP_NOEXCEPT_ : Image(std::move(img)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + ImageGL& operator = (ImageGL &&img) + { + Image::operator=(std::move(img)); + return *this; + } +}; +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 +/*! \brief Class interface for Pipe Memory Objects. +* +* See Memory for details about copy semantics, etc. +* +* \see Memory +*/ +class Pipe : public Memory +{ +public: + + /*! \brief Constructs a Pipe in a specified context. + * + * Wraps clCreatePipe(). + * @param context Context in which to create the pipe. + * @param flags Bitfield. Only CL_MEM_READ_WRITE and CL_MEM_HOST_NO_ACCESS are valid. + * @param packet_size Size in bytes of a single packet of the pipe. + * @param max_packets Number of packets that may be stored in the pipe. + * + */ + Pipe( + const Context& context, + cl_uint packet_size, + cl_uint max_packets, + cl_int* err = NULL) + { + cl_int error; + + cl_mem_flags flags = CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS; + object_ = ::clCreatePipe(context(), flags, packet_size, max_packets, nullptr, &error); + + detail::errHandler(error, __CREATE_PIPE_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! \brief Constructs a Pipe in a the default context. + * + * Wraps clCreatePipe(). + * @param flags Bitfield. Only CL_MEM_READ_WRITE and CL_MEM_HOST_NO_ACCESS are valid. + * @param packet_size Size in bytes of a single packet of the pipe. + * @param max_packets Number of packets that may be stored in the pipe. + * + */ + Pipe( + cl_uint packet_size, + cl_uint max_packets, + cl_int* err = NULL) + { + cl_int error; + + Context context = Context::getDefault(err); + + cl_mem_flags flags = CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS; + object_ = ::clCreatePipe(context(), flags, packet_size, max_packets, nullptr, &error); + + detail::errHandler(error, __CREATE_PIPE_ERR); + if (err != NULL) { + *err = error; + } + } + + //! \brief Default constructor - initializes to NULL. + Pipe() : Memory() { } + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with earlier versions. + * + * See Memory for further details. + */ + explicit Pipe(const cl_mem& pipe, bool retainObject = false) : + Memory(pipe, retainObject) { } + + /*! \brief Assignment from cl_mem - performs shallow copy. + * + * See Memory for further details. + */ + Pipe& operator = (const cl_mem& rhs) + { + Memory::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Pipe(const Pipe& pipe) : Memory(pipe) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Pipe& operator = (const Pipe &pipe) + { + Memory::operator=(pipe); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Pipe(Pipe&& pipe) CL_HPP_NOEXCEPT_ : Memory(std::move(pipe)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Pipe& operator = (Pipe &&pipe) + { + Memory::operator=(std::move(pipe)); + return *this; + } + + //! \brief Wrapper for clGetMemObjectInfo(). + template + cl_int getInfo(cl_pipe_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetPipeInfo, object_, name, param), + __GET_PIPE_INFO_ERR); + } + + //! \brief Wrapper for clGetMemObjectInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_pipe_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } +}; // class Pipe +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 + + +/*! \brief Class interface for cl_sampler. + * + * \note Copies of these objects are shallow, meaning that the copy will refer + * to the same underlying cl_sampler as the original. For details, see + * clRetainSampler() and clReleaseSampler(). + * + * \see cl_sampler + */ +class Sampler : public detail::Wrapper +{ +public: + //! \brief Default constructor - initializes to NULL. + Sampler() { } + + /*! \brief Constructs a Sampler in a specified context. + * + * Wraps clCreateSampler(). + */ + Sampler( + const Context& context, + cl_bool normalized_coords, + cl_addressing_mode addressing_mode, + cl_filter_mode filter_mode, + cl_int* err = NULL) + { + cl_int error; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + cl_sampler_properties sampler_properties[] = { + CL_SAMPLER_NORMALIZED_COORDS, normalized_coords, + CL_SAMPLER_ADDRESSING_MODE, addressing_mode, + CL_SAMPLER_FILTER_MODE, filter_mode, + 0 }; + object_ = ::clCreateSamplerWithProperties( + context(), + sampler_properties, + &error); + + detail::errHandler(error, __CREATE_SAMPLER_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } +#else + object_ = ::clCreateSampler( + context(), + normalized_coords, + addressing_mode, + filter_mode, + &error); + + detail::errHandler(error, __CREATE_SAMPLER_ERR); + if (err != NULL) { + *err = error; + } +#endif + } + + /*! \brief Constructor from cl_sampler - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * This effectively transfers ownership of a refcount on the cl_sampler + * into the new Sampler object. + */ + explicit Sampler(const cl_sampler& sampler, bool retainObject = false) : + detail::Wrapper(sampler, retainObject) { } + + /*! \brief Assignment operator from cl_sampler - takes ownership. + * + * This effectively transfers ownership of a refcount on the rhs and calls + * clReleaseSampler() on the value previously held by this instance. + */ + Sampler& operator = (const cl_sampler& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Sampler(const Sampler& sam) : detail::Wrapper(sam) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Sampler& operator = (const Sampler &sam) + { + detail::Wrapper::operator=(sam); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Sampler(Sampler&& sam) CL_HPP_NOEXCEPT_ : detail::Wrapper(std::move(sam)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Sampler& operator = (Sampler &&sam) + { + detail::Wrapper::operator=(std::move(sam)); + return *this; + } + + //! \brief Wrapper for clGetSamplerInfo(). + template + cl_int getInfo(cl_sampler_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetSamplerInfo, object_, name, param), + __GET_SAMPLER_INFO_ERR); + } + + //! \brief Wrapper for clGetSamplerInfo() that returns by value. + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_sampler_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } +}; + +class Program; +class CommandQueue; +class DeviceCommandQueue; +class Kernel; + +//! \brief Class interface for specifying NDRange values. +class NDRange +{ +private: + size_type sizes_[3]; + cl_uint dimensions_; + +public: + //! \brief Default constructor - resulting range has zero dimensions. + NDRange() + : dimensions_(0) + { + sizes_[0] = 0; + sizes_[1] = 0; + sizes_[2] = 0; + } + + //! \brief Constructs one-dimensional range. + NDRange(size_type size0) + : dimensions_(1) + { + sizes_[0] = size0; + sizes_[1] = 1; + sizes_[2] = 1; + } + + //! \brief Constructs two-dimensional range. + NDRange(size_type size0, size_type size1) + : dimensions_(2) + { + sizes_[0] = size0; + sizes_[1] = size1; + sizes_[2] = 1; + } + + //! \brief Constructs three-dimensional range. + NDRange(size_type size0, size_type size1, size_type size2) + : dimensions_(3) + { + sizes_[0] = size0; + sizes_[1] = size1; + sizes_[2] = size2; + } + + /*! \brief Conversion operator to const size_type *. + * + * \returns a pointer to the size of the first dimension. + */ + operator const size_type*() const { + return sizes_; + } + + //! \brief Queries the number of dimensions in the range. + size_type dimensions() const + { + return dimensions_; + } + + //! \brief Returns the size of the object in bytes based on the + // runtime number of dimensions + size_type size() const + { + return dimensions_*sizeof(size_type); + } + + size_type* get() + { + return sizes_; + } + + const size_type* get() const + { + return sizes_; + } +}; + +//! \brief A zero-dimensional range. +static const NDRange NullRange; + +//! \brief Local address wrapper for use with Kernel::setArg +struct LocalSpaceArg +{ + size_type size_; +}; + +namespace detail { + +template +struct KernelArgumentHandler; + +// Enable for objects that are not subclasses of memory +// Pointers, constants etc +template +struct KernelArgumentHandler::value>::type> +{ + static size_type size(const T&) { return sizeof(T); } + static const T* ptr(const T& value) { return &value; } +}; + +// Enable for subclasses of memory where we want to get a reference to the cl_mem out +// and pass that in for safety +template +struct KernelArgumentHandler::value>::type> +{ + static size_type size(const T&) { return sizeof(cl_mem); } + static const cl_mem* ptr(const T& value) { return &(value()); } +}; + +// Specialization for DeviceCommandQueue defined later + +template <> +struct KernelArgumentHandler +{ + static size_type size(const LocalSpaceArg& value) { return value.size_; } + static const void* ptr(const LocalSpaceArg&) { return NULL; } +}; + +} +//! \endcond + +/*! Local + * \brief Helper function for generating LocalSpaceArg objects. + */ +inline LocalSpaceArg +Local(size_type size) +{ + LocalSpaceArg ret = { size }; + return ret; +} + +/*! \brief Class interface for cl_kernel. + * + * \note Copies of these objects are shallow, meaning that the copy will refer + * to the same underlying cl_kernel as the original. For details, see + * clRetainKernel() and clReleaseKernel(). + * + * \see cl_kernel + */ +class Kernel : public detail::Wrapper +{ +public: + inline Kernel(const Program& program, const char* name, cl_int* err = NULL); + + //! \brief Default constructor - initializes to NULL. + Kernel() { } + + /*! \brief Constructor from cl_kernel - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + * This effectively transfers ownership of a refcount on the cl_kernel + * into the new Kernel object. + */ + explicit Kernel(const cl_kernel& kernel, bool retainObject = false) : + detail::Wrapper(kernel, retainObject) { } + + /*! \brief Assignment operator from cl_kernel - takes ownership. + * + * This effectively transfers ownership of a refcount on the rhs and calls + * clReleaseKernel() on the value previously held by this instance. + */ + Kernel& operator = (const cl_kernel& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Kernel(const Kernel& kernel) : detail::Wrapper(kernel) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Kernel& operator = (const Kernel &kernel) + { + detail::Wrapper::operator=(kernel); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Kernel(Kernel&& kernel) CL_HPP_NOEXCEPT_ : detail::Wrapper(std::move(kernel)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Kernel& operator = (Kernel &&kernel) + { + detail::Wrapper::operator=(std::move(kernel)); + return *this; + } + + template + cl_int getInfo(cl_kernel_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetKernelInfo, object_, name, param), + __GET_KERNEL_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_kernel_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + template + cl_int getArgInfo(cl_uint argIndex, cl_kernel_arg_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetKernelArgInfo, object_, argIndex, name, param), + __GET_KERNEL_ARG_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getArgInfo(cl_uint argIndex, cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_kernel_arg_info, name>::param_type param; + cl_int result = getArgInfo(argIndex, name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + + template + cl_int getWorkGroupInfo( + const Device& device, cl_kernel_work_group_info name, T* param) const + { + return detail::errHandler( + detail::getInfo( + &::clGetKernelWorkGroupInfo, object_, device(), name, param), + __GET_KERNEL_WORK_GROUP_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getWorkGroupInfo(const Device& device, cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_kernel_work_group_info, name>::param_type param; + cl_int result = getWorkGroupInfo(device, name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + +#if (CL_HPP_TARGET_OPENCL_VERSION >= 200 && defined(CL_HPP_USE_CL_SUB_GROUPS_KHR)) || CL_HPP_TARGET_OPENCL_VERSION >= 210 + cl_int getSubGroupInfo(const cl::Device &dev, cl_kernel_sub_group_info name, const cl::NDRange &range, size_type* param) const + { +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + return detail::errHandler( + clGetKernelSubGroupInfo(object_, dev(), name, range.size(), range.get(), sizeof(size_type), param, nullptr), + __GET_KERNEL_SUB_GROUP_INFO_ERR); + +#else // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + typedef clGetKernelSubGroupInfoKHR_fn PFN_clGetKernelSubGroupInfoKHR; + static PFN_clGetKernelSubGroupInfoKHR pfn_clGetKernelSubGroupInfoKHR = NULL; + CL_HPP_INIT_CL_EXT_FCN_PTR_(clGetKernelSubGroupInfoKHR); + + return detail::errHandler( + pfn_clGetKernelSubGroupInfoKHR(object_, dev(), name, range.size(), range.get(), sizeof(size_type), param, nullptr), + __GET_KERNEL_SUB_GROUP_INFO_ERR); + +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 + } + + template + size_type getSubGroupInfo(const cl::Device &dev, const cl::NDRange &range, cl_int* err = NULL) const + { + size_type param; + cl_int result = getSubGroupInfo(dev, name, range, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + /*! \brief setArg overload taking a shared_ptr type + */ + template + cl_int setArg(cl_uint index, const cl::pointer &argPtr) + { + return detail::errHandler( + ::clSetKernelArgSVMPointer(object_, index, argPtr.get()), + __SET_KERNEL_ARGS_ERR); + } + + /*! \brief setArg overload taking a vector type. + */ + template + cl_int setArg(cl_uint index, const cl::vector &argPtr) + { + return detail::errHandler( + ::clSetKernelArgSVMPointer(object_, index, argPtr.data()), + __SET_KERNEL_ARGS_ERR); + } + + /*! \brief setArg overload taking a pointer type + */ + template + typename std::enable_if::value, cl_int>::type + setArg(cl_uint index, const T argPtr) + { + return detail::errHandler( + ::clSetKernelArgSVMPointer(object_, index, argPtr), + __SET_KERNEL_ARGS_ERR); + } +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + + /*! \brief setArg overload taking a POD type + */ + template + typename std::enable_if::value, cl_int>::type + setArg(cl_uint index, const T &value) + { + return detail::errHandler( + ::clSetKernelArg( + object_, + index, + detail::KernelArgumentHandler::size(value), + detail::KernelArgumentHandler::ptr(value)), + __SET_KERNEL_ARGS_ERR); + } + + cl_int setArg(cl_uint index, size_type size, const void* argPtr) + { + return detail::errHandler( + ::clSetKernelArg(object_, index, size, argPtr), + __SET_KERNEL_ARGS_ERR); + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + /*! + * Specify a vector of SVM pointers that the kernel may access in + * addition to its arguments. + */ + cl_int setSVMPointers(const vector &pointerList) + { + return detail::errHandler( + ::clSetKernelExecInfo( + object_, + CL_KERNEL_EXEC_INFO_SVM_PTRS, + sizeof(void*)*pointerList.size(), + pointerList.data())); + } + + /*! + * Specify a std::array of SVM pointers that the kernel may access in + * addition to its arguments. + */ + template + cl_int setSVMPointers(const std::array &pointerList) + { + return detail::errHandler( + ::clSetKernelExecInfo( + object_, + CL_KERNEL_EXEC_INFO_SVM_PTRS, + sizeof(void*)*pointerList.size(), + pointerList.data())); + } + + /*! \brief Enable fine-grained system SVM. + * + * \note It is only possible to enable fine-grained system SVM if all devices + * in the context associated with kernel support it. + * + * \param svmEnabled True if fine-grained system SVM is requested. False otherwise. + * \return CL_SUCCESS if the function was executed succesfully. CL_INVALID_OPERATION + * if no devices in the context support fine-grained system SVM. + * + * \see clSetKernelExecInfo + */ + cl_int enableFineGrainedSystemSVM(bool svmEnabled) + { + cl_bool svmEnabled_ = svmEnabled ? CL_TRUE : CL_FALSE; + return detail::errHandler( + ::clSetKernelExecInfo( + object_, + CL_KERNEL_EXEC_INFO_SVM_FINE_GRAIN_SYSTEM, + sizeof(cl_bool), + &svmEnabled_ + ) + ); + } + + template + void setSVMPointersHelper(std::array &pointerList, const pointer &t0, const pointer &t1, Ts & ... ts) + { + pointerList[index] = static_cast(t0.get()); + setSVMPointersHelper(pointerList, t1, ts...); + } + + template + typename std::enable_if::value, void>::type + setSVMPointersHelper(std::array &pointerList, T0 t0, T1 t1, Ts... ts) + { + pointerList[index] = static_cast(t0); + setSVMPointersHelper(pointerList, t1, ts...); + } + + template + void setSVMPointersHelper(std::array &pointerList, const pointer &t0) + { + pointerList[index] = static_cast(t0.get()); + } + + + template + typename std::enable_if::value, void>::type + setSVMPointersHelper(std::array &pointerList, T0 t0) + { + pointerList[index] = static_cast(t0); + } + + template + cl_int setSVMPointers(const T0 &t0, Ts & ... ts) + { + std::array pointerList; + + setSVMPointersHelper<0, 1 + sizeof...(Ts)>(pointerList, t0, ts...); + return detail::errHandler( + ::clSetKernelExecInfo( + object_, + CL_KERNEL_EXEC_INFO_SVM_PTRS, + sizeof(void*)*(1 + sizeof...(Ts)), + pointerList.data())); + } +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 + /** + * Make a deep copy of the kernel object including its arguments. + * @return A new kernel object with internal state entirely separate from that + * of the original but with any arguments set on the original intact. + */ + Kernel clone() + { + cl_int error; + Kernel retValue(clCloneKernel(this->get(), &error)); + + detail::errHandler(error, __CLONE_KERNEL_ERR); + return retValue; + } +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 +}; + +/*! \class Program + * \brief Program interface that implements cl_program. + */ +class Program : public detail::Wrapper +{ +public: +#if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + typedef vector> Binaries; + typedef vector Sources; +#else // #if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + typedef vector > Binaries; + typedef vector > Sources; +#endif // #if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + + Program( + const string& source, + bool build = false, + cl_int* err = NULL) + { + cl_int error; + + const char * strings = source.c_str(); + const size_type length = source.size(); + + Context context = Context::getDefault(err); + + object_ = ::clCreateProgramWithSource( + context(), (cl_uint)1, &strings, &length, &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_SOURCE_ERR); + + if (error == CL_SUCCESS && build) { + + error = ::clBuildProgram( + object_, + 0, + NULL, +#if !defined(CL_HPP_CL_1_2_DEFAULT_BUILD) + "-cl-std=CL2.0", +#else + "", +#endif // #if !defined(CL_HPP_CL_1_2_DEFAULT_BUILD) + NULL, + NULL); + + detail::buildErrHandler(error, __BUILD_PROGRAM_ERR, getBuildInfo()); + } + + if (err != NULL) { + *err = error; + } + } + + Program( + const Context& context, + const string& source, + bool build = false, + cl_int* err = NULL) + { + cl_int error; + + const char * strings = source.c_str(); + const size_type length = source.size(); + + object_ = ::clCreateProgramWithSource( + context(), (cl_uint)1, &strings, &length, &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_SOURCE_ERR); + + if (error == CL_SUCCESS && build) { + error = ::clBuildProgram( + object_, + 0, + NULL, +#if !defined(CL_HPP_CL_1_2_DEFAULT_BUILD) + "-cl-std=CL2.0", +#else + "", +#endif // #if !defined(CL_HPP_CL_1_2_DEFAULT_BUILD) + NULL, + NULL); + + detail::buildErrHandler(error, __BUILD_PROGRAM_ERR, getBuildInfo()); + } + + if (err != NULL) { + *err = error; + } + } + + /** + * Create a program from a vector of source strings and the default context. + * Does not compile or link the program. + */ + Program( + const Sources& sources, + cl_int* err = NULL) + { + cl_int error; + Context context = Context::getDefault(err); + + const size_type n = (size_type)sources.size(); + + vector lengths(n); + vector strings(n); + + for (size_type i = 0; i < n; ++i) { +#if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + strings[i] = sources[(int)i].data(); + lengths[i] = sources[(int)i].length(); +#else // #if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + strings[i] = sources[(int)i].first; + lengths[i] = sources[(int)i].second; +#endif // #if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + } + + object_ = ::clCreateProgramWithSource( + context(), (cl_uint)n, strings.data(), lengths.data(), &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_SOURCE_ERR); + if (err != NULL) { + *err = error; + } + } + + /** + * Create a program from a vector of source strings and a provided context. + * Does not compile or link the program. + */ + Program( + const Context& context, + const Sources& sources, + cl_int* err = NULL) + { + cl_int error; + + const size_type n = (size_type)sources.size(); + + vector lengths(n); + vector strings(n); + + for (size_type i = 0; i < n; ++i) { +#if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + strings[i] = sources[(int)i].data(); + lengths[i] = sources[(int)i].length(); +#else // #if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + strings[i] = sources[(int)i].first; + lengths[i] = sources[(int)i].second; +#endif // #if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + } + + object_ = ::clCreateProgramWithSource( + context(), (cl_uint)n, strings.data(), lengths.data(), &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_SOURCE_ERR); + if (err != NULL) { + *err = error; + } + } + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 || (CL_HPP_TARGET_OPENCL_VERSION==200 && defined(CL_HPP_USE_IL_KHR)) + /** + * Program constructor to allow construction of program from SPIR-V or another IL. + * Valid for either OpenCL >= 2.1 or when CL_HPP_USE_IL_KHR is defined. + */ + Program( + const vector& IL, + bool build = false, + cl_int* err = NULL) + { + cl_int error; + + Context context = Context::getDefault(err); + +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + object_ = ::clCreateProgramWithIL( + context(), static_cast(IL.data()), IL.size(), &error); + +#else // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + typedef clCreateProgramWithILKHR_fn PFN_clCreateProgramWithILKHR; + static PFN_clCreateProgramWithILKHR pfn_clCreateProgramWithILKHR = NULL; + CL_HPP_INIT_CL_EXT_FCN_PTR_(clCreateProgramWithILKHR); + + return detail::errHandler( + pfn_clCreateProgramWithILKHR( + context(), static_cast(IL.data()), IL.size(), &error); + +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + detail::errHandler(error, __CREATE_PROGRAM_WITH_IL_ERR); + + if (error == CL_SUCCESS && build) { + + error = ::clBuildProgram( + object_, + 0, + NULL, +#if !defined(CL_HPP_CL_1_2_DEFAULT_BUILD) + "-cl-std=CL2.0", +#else + "", +#endif // #if !defined(CL_HPP_CL_1_2_DEFAULT_BUILD) + NULL, + NULL); + + detail::buildErrHandler(error, __BUILD_PROGRAM_ERR, getBuildInfo()); + } + + if (err != NULL) { + *err = error; + } + } + + /** + * Program constructor to allow construction of program from SPIR-V or another IL + * for a specific context. + * Valid for either OpenCL >= 2.1 or when CL_HPP_USE_IL_KHR is defined. + */ + Program( + const Context& context, + const vector& IL, + bool build = false, + cl_int* err = NULL) + { + cl_int error; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + object_ = ::clCreateProgramWithIL( + context(), static_cast(IL.data()), IL.size(), &error); + +#else // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + typedef clCreateProgramWithILKHR_fn PFN_clCreateProgramWithILKHR; + static PFN_clCreateProgramWithILKHR pfn_clCreateProgramWithILKHR = NULL; + CL_HPP_INIT_CL_EXT_FCN_PTR_(clCreateProgramWithILKHR); + + return detail::errHandler( + pfn_clCreateProgramWithILKHR( + context(), static_cast(IL.data()), IL.size(), &error); + +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + detail::errHandler(error, __CREATE_PROGRAM_WITH_IL_ERR); + + if (error == CL_SUCCESS && build) { + error = ::clBuildProgram( + object_, + 0, + NULL, +#if !defined(CL_HPP_CL_1_2_DEFAULT_BUILD) + "-cl-std=CL2.0", +#else + "", +#endif // #if !defined(CL_HPP_CL_1_2_DEFAULT_BUILD) + NULL, + NULL); + + detail::buildErrHandler(error, __BUILD_PROGRAM_ERR, getBuildInfo()); + } + + if (err != NULL) { + *err = error; + } + } +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + /** + * Construct a program object from a list of devices and a per-device list of binaries. + * \param context A valid OpenCL context in which to construct the program. + * \param devices A vector of OpenCL device objects for which the program will be created. + * \param binaries A vector of pairs of a pointer to a binary object and its length. + * \param binaryStatus An optional vector that on completion will be resized to + * match the size of binaries and filled with values to specify if each binary + * was successfully loaded. + * Set to CL_SUCCESS if the binary was successfully loaded. + * Set to CL_INVALID_VALUE if the length is 0 or the binary pointer is NULL. + * Set to CL_INVALID_BINARY if the binary provided is not valid for the matching device. + * \param err if non-NULL will be set to CL_SUCCESS on successful operation or one of the following errors: + * CL_INVALID_CONTEXT if context is not a valid context. + * CL_INVALID_VALUE if the length of devices is zero; or if the length of binaries does not match the length of devices; + * or if any entry in binaries is NULL or has length 0. + * CL_INVALID_DEVICE if OpenCL devices listed in devices are not in the list of devices associated with context. + * CL_INVALID_BINARY if an invalid program binary was encountered for any device. binaryStatus will return specific status for each device. + * CL_OUT_OF_HOST_MEMORY if there is a failure to allocate resources required by the OpenCL implementation on the host. + */ + Program( + const Context& context, + const vector& devices, + const Binaries& binaries, + vector* binaryStatus = NULL, + cl_int* err = NULL) + { + cl_int error; + + const size_type numDevices = devices.size(); + + // Catch size mismatch early and return + if(binaries.size() != numDevices) { + error = CL_INVALID_VALUE; + detail::errHandler(error, __CREATE_PROGRAM_WITH_BINARY_ERR); + if (err != NULL) { + *err = error; + } + return; + } + + + vector lengths(numDevices); + vector images(numDevices); +#if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + for (size_type i = 0; i < numDevices; ++i) { + images[i] = binaries[i].data(); + lengths[i] = binaries[(int)i].size(); + } +#else // #if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + for (size_type i = 0; i < numDevices; ++i) { + images[i] = (const unsigned char*)binaries[i].first; + lengths[i] = binaries[(int)i].second; + } +#endif // #if !defined(CL_HPP_ENABLE_PROGRAM_CONSTRUCTION_FROM_ARRAY_COMPATIBILITY) + + vector deviceIDs(numDevices); + for( size_type deviceIndex = 0; deviceIndex < numDevices; ++deviceIndex ) { + deviceIDs[deviceIndex] = (devices[deviceIndex])(); + } + + if(binaryStatus) { + binaryStatus->resize(numDevices); + } + + object_ = ::clCreateProgramWithBinary( + context(), (cl_uint) devices.size(), + deviceIDs.data(), + lengths.data(), images.data(), (binaryStatus != NULL && numDevices > 0) + ? &binaryStatus->front() + : NULL, &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_BINARY_ERR); + if (err != NULL) { + *err = error; + } + } + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + /** + * Create program using builtin kernels. + * \param kernelNames Semi-colon separated list of builtin kernel names + */ + Program( + const Context& context, + const vector& devices, + const string& kernelNames, + cl_int* err = NULL) + { + cl_int error; + + + size_type numDevices = devices.size(); + vector deviceIDs(numDevices); + for( size_type deviceIndex = 0; deviceIndex < numDevices; ++deviceIndex ) { + deviceIDs[deviceIndex] = (devices[deviceIndex])(); + } + + object_ = ::clCreateProgramWithBuiltInKernels( + context(), + (cl_uint) devices.size(), + deviceIDs.data(), + kernelNames.c_str(), + &error); + + detail::errHandler(error, __CREATE_PROGRAM_WITH_BUILT_IN_KERNELS_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + + Program() { } + + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + */ + explicit Program(const cl_program& program, bool retainObject = false) : + detail::Wrapper(program, retainObject) { } + + Program& operator = (const cl_program& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + Program(const Program& program) : detail::Wrapper(program) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + Program& operator = (const Program &program) + { + detail::Wrapper::operator=(program); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + Program(Program&& program) CL_HPP_NOEXCEPT_ : detail::Wrapper(std::move(program)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + Program& operator = (Program &&program) + { + detail::Wrapper::operator=(std::move(program)); + return *this; + } + + cl_int build( + const vector& devices, + const char* options = NULL, + void (CL_CALLBACK * notifyFptr)(cl_program, void *) = NULL, + void* data = NULL) const + { + size_type numDevices = devices.size(); + vector deviceIDs(numDevices); + + for( size_type deviceIndex = 0; deviceIndex < numDevices; ++deviceIndex ) { + deviceIDs[deviceIndex] = (devices[deviceIndex])(); + } + + cl_int buildError = ::clBuildProgram( + object_, + (cl_uint) + devices.size(), + deviceIDs.data(), + options, + notifyFptr, + data); + + return detail::buildErrHandler(buildError, __BUILD_PROGRAM_ERR, getBuildInfo()); + } + + cl_int build( + const char* options = NULL, + void (CL_CALLBACK * notifyFptr)(cl_program, void *) = NULL, + void* data = NULL) const + { + cl_int buildError = ::clBuildProgram( + object_, + 0, + NULL, + options, + notifyFptr, + data); + + + return detail::buildErrHandler(buildError, __BUILD_PROGRAM_ERR, getBuildInfo()); + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + cl_int compile( + const char* options = NULL, + void (CL_CALLBACK * notifyFptr)(cl_program, void *) = NULL, + void* data = NULL) const + { + cl_int error = ::clCompileProgram( + object_, + 0, + NULL, + options, + 0, + NULL, + NULL, + notifyFptr, + data); + return detail::buildErrHandler(error, __COMPILE_PROGRAM_ERR, getBuildInfo()); + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + + template + cl_int getInfo(cl_program_info name, T* param) const + { + return detail::errHandler( + detail::getInfo(&::clGetProgramInfo, object_, name, param), + __GET_PROGRAM_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_program_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + template + cl_int getBuildInfo( + const Device& device, cl_program_build_info name, T* param) const + { + return detail::errHandler( + detail::getInfo( + &::clGetProgramBuildInfo, object_, device(), name, param), + __GET_PROGRAM_BUILD_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getBuildInfo(const Device& device, cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_program_build_info, name>::param_type param; + cl_int result = getBuildInfo(device, name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + /** + * Build info function that returns a vector of device/info pairs for the specified + * info type and for all devices in the program. + * On an error reading the info for any device, an empty vector of info will be returned. + */ + template + vector::param_type>> + getBuildInfo(cl_int *err = NULL) const + { + cl_int result = CL_SUCCESS; + + auto devs = getInfo(&result); + vector::param_type>> + devInfo; + + // If there was an initial error from getInfo return the error + if (result != CL_SUCCESS) { + if (err != NULL) { + *err = result; + } + return devInfo; + } + + for (const cl::Device &d : devs) { + typename detail::param_traits< + detail::cl_program_build_info, name>::param_type param; + result = getBuildInfo(d, name, ¶m); + devInfo.push_back( + std::pair::param_type> + (d, param)); + if (result != CL_SUCCESS) { + // On error, leave the loop and return the error code + break; + } + } + if (err != NULL) { + *err = result; + } + if (result != CL_SUCCESS) { + devInfo.clear(); + } + return devInfo; + } + + cl_int createKernels(vector* kernels) + { + cl_uint numKernels; + cl_int err = ::clCreateKernelsInProgram(object_, 0, NULL, &numKernels); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_KERNELS_IN_PROGRAM_ERR); + } + + vector value(numKernels); + + err = ::clCreateKernelsInProgram( + object_, numKernels, value.data(), NULL); + if (err != CL_SUCCESS) { + return detail::errHandler(err, __CREATE_KERNELS_IN_PROGRAM_ERR); + } + + if (kernels) { + kernels->resize(value.size()); + + // Assign to param, constructing with retain behaviour + // to correctly capture each underlying CL object + for (size_type i = 0; i < value.size(); i++) { + // We do not need to retain because this kernel is being created + // by the runtime + (*kernels)[i] = Kernel(value[i], false); + } + } + return CL_SUCCESS; + } +}; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 +inline Program linkProgram( + Program input1, + Program input2, + const char* options = NULL, + void (CL_CALLBACK * notifyFptr)(cl_program, void *) = NULL, + void* data = NULL, + cl_int* err = NULL) +{ + cl_int error_local = CL_SUCCESS; + + cl_program programs[2] = { input1(), input2() }; + + Context ctx = input1.getInfo(&error_local); + if(error_local!=CL_SUCCESS) { + detail::errHandler(error_local, __LINK_PROGRAM_ERR); + } + + cl_program prog = ::clLinkProgram( + ctx(), + 0, + NULL, + options, + 2, + programs, + notifyFptr, + data, + &error_local); + + detail::errHandler(error_local,__COMPILE_PROGRAM_ERR); + if (err != NULL) { + *err = error_local; + } + + return Program(prog); +} + +inline Program linkProgram( + vector inputPrograms, + const char* options = NULL, + void (CL_CALLBACK * notifyFptr)(cl_program, void *) = NULL, + void* data = NULL, + cl_int* err = NULL) +{ + cl_int error_local = CL_SUCCESS; + + vector programs(inputPrograms.size()); + + for (unsigned int i = 0; i < inputPrograms.size(); i++) { + programs[i] = inputPrograms[i](); + } + + Context ctx; + if(inputPrograms.size() > 0) { + ctx = inputPrograms[0].getInfo(&error_local); + if(error_local!=CL_SUCCESS) { + detail::errHandler(error_local, __LINK_PROGRAM_ERR); + } + } + cl_program prog = ::clLinkProgram( + ctx(), + 0, + NULL, + options, + (cl_uint)inputPrograms.size(), + programs.data(), + notifyFptr, + data, + &error_local); + + detail::errHandler(error_local,__COMPILE_PROGRAM_ERR); + if (err != NULL) { + *err = error_local; + } + + return Program(prog, false); +} +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + +// Template specialization for CL_PROGRAM_BINARIES +template <> +inline cl_int cl::Program::getInfo(cl_program_info name, vector>* param) const +{ + if (name != CL_PROGRAM_BINARIES) { + return CL_INVALID_VALUE; + } + if (param) { + // Resize the parameter array appropriately for each allocation + // and pass down to the helper + + vector sizes = getInfo(); + size_type numBinaries = sizes.size(); + + // Resize the parameter array and constituent arrays + param->resize(numBinaries); + for (size_type i = 0; i < numBinaries; ++i) { + (*param)[i].resize(sizes[i]); + } + + return detail::errHandler( + detail::getInfo(&::clGetProgramInfo, object_, name, param), + __GET_PROGRAM_INFO_ERR); + } + + return CL_SUCCESS; +} + +template<> +inline vector> cl::Program::getInfo(cl_int* err) const +{ + vector> binariesVectors; + + cl_int result = getInfo(CL_PROGRAM_BINARIES, &binariesVectors); + if (err != NULL) { + *err = result; + } + return binariesVectors; +} + +inline Kernel::Kernel(const Program& program, const char* name, cl_int* err) +{ + cl_int error; + + object_ = ::clCreateKernel(program(), name, &error); + detail::errHandler(error, __CREATE_KERNEL_ERR); + + if (err != NULL) { + *err = error; + } + +} + +enum class QueueProperties : cl_command_queue_properties +{ + None = 0, + Profiling = CL_QUEUE_PROFILING_ENABLE, + OutOfOrder = CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE, +}; + +inline QueueProperties operator|(QueueProperties lhs, QueueProperties rhs) +{ + return static_cast(static_cast(lhs) | static_cast(rhs)); +} + +/*! \class CommandQueue + * \brief CommandQueue interface for cl_command_queue. + */ +class CommandQueue : public detail::Wrapper +{ +private: + static std::once_flag default_initialized_; + static CommandQueue default_; + static cl_int default_error_; + + /*! \brief Create the default command queue returned by @ref getDefault. + * + * It sets default_error_ to indicate success or failure. It does not throw + * @c cl::Error. + */ + static void makeDefault() + { + /* We don't want to throw an error from this function, so we have to + * catch and set the error flag. + */ +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + try +#endif + { + int error; + Context context = Context::getDefault(&error); + + if (error != CL_SUCCESS) { + default_error_ = error; + } + else { + Device device = Device::getDefault(); + default_ = CommandQueue(context, device, 0, &default_error_); + } + } +#if defined(CL_HPP_ENABLE_EXCEPTIONS) + catch (cl::Error &e) { + default_error_ = e.err(); + } +#endif + } + + /*! \brief Create the default command queue. + * + * This sets @c default_. It does not throw + * @c cl::Error. + */ + static void makeDefaultProvided(const CommandQueue &c) { + default_ = c; + } + +public: +#ifdef CL_HPP_UNIT_TEST_ENABLE + /*! \brief Reset the default. + * + * This sets @c default_ to an empty value to support cleanup in + * the unit test framework. + * This function is not thread safe. + */ + static void unitTestClearDefault() { + default_ = CommandQueue(); + } +#endif // #ifdef CL_HPP_UNIT_TEST_ENABLE + + + /*! + * \brief Constructs a CommandQueue based on passed properties. + * Will return an CL_INVALID_QUEUE_PROPERTIES error if CL_QUEUE_ON_DEVICE is specified. + */ + CommandQueue( + cl_command_queue_properties properties, + cl_int* err = NULL) + { + cl_int error; + + Context context = Context::getDefault(&error); + detail::errHandler(error, __CREATE_CONTEXT_ERR); + + if (error != CL_SUCCESS) { + if (err != NULL) { + *err = error; + } + } + else { + Device device = context.getInfo()[0]; + bool useWithProperties; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 && CL_HPP_MINIMUM_OPENCL_VERSION < 200 + // Run-time decision based on the actual platform + { + cl_uint version = detail::getContextPlatformVersion(context()); + useWithProperties = (version >= 0x20000); // OpenCL 2.0 or above + } +#elif CL_HPP_TARGET_OPENCL_VERSION >= 200 + useWithProperties = true; +#else + useWithProperties = false; +#endif + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + if (useWithProperties) { + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, properties, 0 }; + if ((properties & CL_QUEUE_ON_DEVICE) == 0) { + object_ = ::clCreateCommandQueueWithProperties( + context(), device(), queue_properties, &error); + } + else { + error = CL_INVALID_QUEUE_PROPERTIES; + } + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 +#if CL_HPP_MINIMUM_OPENCL_VERSION < 200 + if (!useWithProperties) { + object_ = ::clCreateCommandQueue( + context(), device(), properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 200 + } + } + + /*! + * \brief Constructs a CommandQueue based on passed properties. + * Will return an CL_INVALID_QUEUE_PROPERTIES error if CL_QUEUE_ON_DEVICE is specified. + */ + CommandQueue( + QueueProperties properties, + cl_int* err = NULL) + { + cl_int error; + + Context context = Context::getDefault(&error); + detail::errHandler(error, __CREATE_CONTEXT_ERR); + + if (error != CL_SUCCESS) { + if (err != NULL) { + *err = error; + } + } + else { + Device device = context.getInfo()[0]; + bool useWithProperties; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 && CL_HPP_MINIMUM_OPENCL_VERSION < 200 + // Run-time decision based on the actual platform + { + cl_uint version = detail::getContextPlatformVersion(context()); + useWithProperties = (version >= 0x20000); // OpenCL 2.0 or above + } +#elif CL_HPP_TARGET_OPENCL_VERSION >= 200 + useWithProperties = true; +#else + useWithProperties = false; +#endif + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + if (useWithProperties) { + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, static_cast(properties), 0 }; + + object_ = ::clCreateCommandQueueWithProperties( + context(), device(), queue_properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 +#if CL_HPP_MINIMUM_OPENCL_VERSION < 200 + if (!useWithProperties) { + object_ = ::clCreateCommandQueue( + context(), device(), static_cast(properties), &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 200 + + } + } + + /*! + * \brief Constructs a CommandQueue for an implementation defined device in the given context + * Will return an CL_INVALID_QUEUE_PROPERTIES error if CL_QUEUE_ON_DEVICE is specified. + */ + explicit CommandQueue( + const Context& context, + cl_command_queue_properties properties = 0, + cl_int* err = NULL) + { + cl_int error; + bool useWithProperties; + vector devices; + error = context.getInfo(CL_CONTEXT_DEVICES, &devices); + + detail::errHandler(error, __CREATE_CONTEXT_ERR); + + if (error != CL_SUCCESS) + { + if (err != NULL) { + *err = error; + } + return; + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 && CL_HPP_MINIMUM_OPENCL_VERSION < 200 + // Run-time decision based on the actual platform + { + cl_uint version = detail::getContextPlatformVersion(context()); + useWithProperties = (version >= 0x20000); // OpenCL 2.0 or above + } +#elif CL_HPP_TARGET_OPENCL_VERSION >= 200 + useWithProperties = true; +#else + useWithProperties = false; +#endif + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + if (useWithProperties) { + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, properties, 0 }; + if ((properties & CL_QUEUE_ON_DEVICE) == 0) { + object_ = ::clCreateCommandQueueWithProperties( + context(), devices[0](), queue_properties, &error); + } + else { + error = CL_INVALID_QUEUE_PROPERTIES; + } + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 +#if CL_HPP_MINIMUM_OPENCL_VERSION < 200 + if (!useWithProperties) { + object_ = ::clCreateCommandQueue( + context(), devices[0](), properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 200 + } + + /*! + * \brief Constructs a CommandQueue for an implementation defined device in the given context + * Will return an CL_INVALID_QUEUE_PROPERTIES error if CL_QUEUE_ON_DEVICE is specified. + */ + explicit CommandQueue( + const Context& context, + QueueProperties properties, + cl_int* err = NULL) + { + cl_int error; + bool useWithProperties; + vector devices; + error = context.getInfo(CL_CONTEXT_DEVICES, &devices); + + detail::errHandler(error, __CREATE_CONTEXT_ERR); + + if (error != CL_SUCCESS) + { + if (err != NULL) { + *err = error; + } + return; + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 && CL_HPP_MINIMUM_OPENCL_VERSION < 200 + // Run-time decision based on the actual platform + { + cl_uint version = detail::getContextPlatformVersion(context()); + useWithProperties = (version >= 0x20000); // OpenCL 2.0 or above + } +#elif CL_HPP_TARGET_OPENCL_VERSION >= 200 + useWithProperties = true; +#else + useWithProperties = false; +#endif + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + if (useWithProperties) { + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, static_cast(properties), 0 }; + object_ = ::clCreateCommandQueueWithProperties( + context(), devices[0](), queue_properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 +#if CL_HPP_MINIMUM_OPENCL_VERSION < 200 + if (!useWithProperties) { + object_ = ::clCreateCommandQueue( + context(), devices[0](), static_cast(properties), &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 200 + } + + /*! + * \brief Constructs a CommandQueue for a passed device and context + * Will return an CL_INVALID_QUEUE_PROPERTIES error if CL_QUEUE_ON_DEVICE is specified. + */ + CommandQueue( + const Context& context, + const Device& device, + cl_command_queue_properties properties = 0, + cl_int* err = NULL) + { + cl_int error; + bool useWithProperties; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 && CL_HPP_MINIMUM_OPENCL_VERSION < 200 + // Run-time decision based on the actual platform + { + cl_uint version = detail::getContextPlatformVersion(context()); + useWithProperties = (version >= 0x20000); // OpenCL 2.0 or above + } +#elif CL_HPP_TARGET_OPENCL_VERSION >= 200 + useWithProperties = true; +#else + useWithProperties = false; +#endif + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + if (useWithProperties) { + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, properties, 0 }; + object_ = ::clCreateCommandQueueWithProperties( + context(), device(), queue_properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 +#if CL_HPP_MINIMUM_OPENCL_VERSION < 200 + if (!useWithProperties) { + object_ = ::clCreateCommandQueue( + context(), device(), properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 200 + } + + /*! + * \brief Constructs a CommandQueue for a passed device and context + * Will return an CL_INVALID_QUEUE_PROPERTIES error if CL_QUEUE_ON_DEVICE is specified. + */ + CommandQueue( + const Context& context, + const Device& device, + QueueProperties properties, + cl_int* err = NULL) + { + cl_int error; + bool useWithProperties; + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 && CL_HPP_MINIMUM_OPENCL_VERSION < 200 + // Run-time decision based on the actual platform + { + cl_uint version = detail::getContextPlatformVersion(context()); + useWithProperties = (version >= 0x20000); // OpenCL 2.0 or above + } +#elif CL_HPP_TARGET_OPENCL_VERSION >= 200 + useWithProperties = true; +#else + useWithProperties = false; +#endif + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + if (useWithProperties) { + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, static_cast(properties), 0 }; + object_ = ::clCreateCommandQueueWithProperties( + context(), device(), queue_properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 +#if CL_HPP_MINIMUM_OPENCL_VERSION < 200 + if (!useWithProperties) { + object_ = ::clCreateCommandQueue( + context(), device(), static_cast(properties), &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_ERR); + if (err != NULL) { + *err = error; + } + } +#endif // CL_HPP_MINIMUM_OPENCL_VERSION < 200 + } + + static CommandQueue getDefault(cl_int * err = NULL) + { + std::call_once(default_initialized_, makeDefault); +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + detail::errHandler(default_error_, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); +#else // CL_HPP_TARGET_OPENCL_VERSION >= 200 + detail::errHandler(default_error_, __CREATE_COMMAND_QUEUE_ERR); +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 200 + if (err != NULL) { + *err = default_error_; + } + return default_; + } + + /** + * Modify the default command queue to be used by + * subsequent operations. + * Will only set the default if no default was previously created. + * @return updated default command queue. + * Should be compared to the passed value to ensure that it was updated. + */ + static CommandQueue setDefault(const CommandQueue &default_queue) + { + std::call_once(default_initialized_, makeDefaultProvided, std::cref(default_queue)); + detail::errHandler(default_error_); + return default_; + } + + CommandQueue() { } + + + /*! \brief Constructor from cl_mem - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + */ + explicit CommandQueue(const cl_command_queue& commandQueue, bool retainObject = false) : + detail::Wrapper(commandQueue, retainObject) { } + + CommandQueue& operator = (const cl_command_queue& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + CommandQueue(const CommandQueue& queue) : detail::Wrapper(queue) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + CommandQueue& operator = (const CommandQueue &queue) + { + detail::Wrapper::operator=(queue); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + CommandQueue(CommandQueue&& queue) CL_HPP_NOEXCEPT_ : detail::Wrapper(std::move(queue)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + CommandQueue& operator = (CommandQueue &&queue) + { + detail::Wrapper::operator=(std::move(queue)); + return *this; + } + + template + cl_int getInfo(cl_command_queue_info name, T* param) const + { + return detail::errHandler( + detail::getInfo( + &::clGetCommandQueueInfo, object_, name, param), + __GET_COMMAND_QUEUE_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_command_queue_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + cl_int enqueueReadBuffer( + const Buffer& buffer, + cl_bool blocking, + size_type offset, + size_type size, + void* ptr, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueReadBuffer( + object_, buffer(), blocking, offset, size, + ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_READ_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueWriteBuffer( + const Buffer& buffer, + cl_bool blocking, + size_type offset, + size_type size, + const void* ptr, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueWriteBuffer( + object_, buffer(), blocking, offset, size, + ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_WRITE_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueCopyBuffer( + const Buffer& src, + const Buffer& dst, + size_type src_offset, + size_type dst_offset, + size_type size, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueCopyBuffer( + object_, src(), dst(), src_offset, dst_offset, size, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQEUE_COPY_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#if CL_HPP_TARGET_OPENCL_VERSION >= 110 + cl_int enqueueReadBufferRect( + const Buffer& buffer, + cl_bool blocking, + const array& buffer_offset, + const array& host_offset, + const array& region, + size_type buffer_row_pitch, + size_type buffer_slice_pitch, + size_type host_row_pitch, + size_type host_slice_pitch, + void *ptr, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueReadBufferRect( + object_, + buffer(), + blocking, + buffer_offset.data(), + host_offset.data(), + region.data(), + buffer_row_pitch, + buffer_slice_pitch, + host_row_pitch, + host_slice_pitch, + ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_READ_BUFFER_RECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueWriteBufferRect( + const Buffer& buffer, + cl_bool blocking, + const array& buffer_offset, + const array& host_offset, + const array& region, + size_type buffer_row_pitch, + size_type buffer_slice_pitch, + size_type host_row_pitch, + size_type host_slice_pitch, + const void *ptr, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueWriteBufferRect( + object_, + buffer(), + blocking, + buffer_offset.data(), + host_offset.data(), + region.data(), + buffer_row_pitch, + buffer_slice_pitch, + host_row_pitch, + host_slice_pitch, + ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_WRITE_BUFFER_RECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueCopyBufferRect( + const Buffer& src, + const Buffer& dst, + const array& src_origin, + const array& dst_origin, + const array& region, + size_type src_row_pitch, + size_type src_slice_pitch, + size_type dst_row_pitch, + size_type dst_slice_pitch, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueCopyBufferRect( + object_, + src(), + dst(), + src_origin.data(), + dst_origin.data(), + region.data(), + src_row_pitch, + src_slice_pitch, + dst_row_pitch, + dst_slice_pitch, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQEUE_COPY_BUFFER_RECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 110 +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + /** + * Enqueue a command to fill a buffer object with a pattern + * of a given size. The pattern is specified as a vector type. + * \tparam PatternType The datatype of the pattern field. + * The pattern type must be an accepted OpenCL data type. + * \tparam offset Is the offset in bytes into the buffer at + * which to start filling. This must be a multiple of + * the pattern size. + * \tparam size Is the size in bytes of the region to fill. + * This must be a multiple of the pattern size. + */ + template + cl_int enqueueFillBuffer( + const Buffer& buffer, + PatternType pattern, + size_type offset, + size_type size, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueFillBuffer( + object_, + buffer(), + static_cast(&pattern), + sizeof(PatternType), + offset, + size, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_FILL_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + + cl_int enqueueReadImage( + const Image& image, + cl_bool blocking, + const array& origin, + const array& region, + size_type row_pitch, + size_type slice_pitch, + void* ptr, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueReadImage( + object_, + image(), + blocking, + origin.data(), + region.data(), + row_pitch, + slice_pitch, + ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_READ_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueWriteImage( + const Image& image, + cl_bool blocking, + const array& origin, + const array& region, + size_type row_pitch, + size_type slice_pitch, + const void* ptr, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueWriteImage( + object_, + image(), + blocking, + origin.data(), + region.data(), + row_pitch, + slice_pitch, + ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_WRITE_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueCopyImage( + const Image& src, + const Image& dst, + const array& src_origin, + const array& dst_origin, + const array& region, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueCopyImage( + object_, + src(), + dst(), + src_origin.data(), + dst_origin.data(), + region.data(), + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_COPY_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + /** + * Enqueue a command to fill an image object with a specified color. + * \param fillColor is the color to use to fill the image. + * This is a four component RGBA floating-point color value if + * the image channel data type is not an unnormalized signed or + * unsigned data type. + */ + cl_int enqueueFillImage( + const Image& image, + cl_float4 fillColor, + const array& origin, + const array& region, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueFillImage( + object_, + image(), + static_cast(&fillColor), + origin.data(), + region.data(), + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_FILL_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * Enqueue a command to fill an image object with a specified color. + * \param fillColor is the color to use to fill the image. + * This is a four component RGBA signed integer color value if + * the image channel data type is an unnormalized signed integer + * type. + */ + cl_int enqueueFillImage( + const Image& image, + cl_int4 fillColor, + const array& origin, + const array& region, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueFillImage( + object_, + image(), + static_cast(&fillColor), + origin.data(), + region.data(), + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_FILL_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * Enqueue a command to fill an image object with a specified color. + * \param fillColor is the color to use to fill the image. + * This is a four component RGBA unsigned integer color value if + * the image channel data type is an unnormalized unsigned integer + * type. + */ + cl_int enqueueFillImage( + const Image& image, + cl_uint4 fillColor, + const array& origin, + const array& region, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueFillImage( + object_, + image(), + static_cast(&fillColor), + origin.data(), + region.data(), + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_FILL_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + + cl_int enqueueCopyImageToBuffer( + const Image& src, + const Buffer& dst, + const array& src_origin, + const array& region, + size_type dst_offset, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueCopyImageToBuffer( + object_, + src(), + dst(), + src_origin.data(), + region.data(), + dst_offset, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_COPY_IMAGE_TO_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueCopyBufferToImage( + const Buffer& src, + const Image& dst, + size_type src_offset, + const array& dst_origin, + const array& region, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueCopyBufferToImage( + object_, + src(), + dst(), + src_offset, + dst_origin.data(), + region.data(), + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_COPY_BUFFER_TO_IMAGE_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + void* enqueueMapBuffer( + const Buffer& buffer, + cl_bool blocking, + cl_map_flags flags, + size_type offset, + size_type size, + const vector* events = NULL, + Event* event = NULL, + cl_int* err = NULL) const + { + cl_event tmp; + cl_int error; + void * result = ::clEnqueueMapBuffer( + object_, buffer(), blocking, flags, offset, size, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL, + &error); + + detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + if (event != NULL && error == CL_SUCCESS) + *event = tmp; + + return result; + } + + void* enqueueMapImage( + const Image& buffer, + cl_bool blocking, + cl_map_flags flags, + const array& origin, + const array& region, + size_type * row_pitch, + size_type * slice_pitch, + const vector* events = NULL, + Event* event = NULL, + cl_int* err = NULL) const + { + cl_event tmp; + cl_int error; + void * result = ::clEnqueueMapImage( + object_, buffer(), blocking, flags, + origin.data(), + region.data(), + row_pitch, slice_pitch, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL, + &error); + + detail::errHandler(error, __ENQUEUE_MAP_IMAGE_ERR); + if (err != NULL) { + *err = error; + } + if (event != NULL && error == CL_SUCCESS) + *event = tmp; + return result; + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + /** + * Enqueues a command that will allow the host to update a region of a coarse-grained SVM buffer. + * This variant takes a raw SVM pointer. + */ + template + cl_int enqueueMapSVM( + T* ptr, + cl_bool blocking, + cl_map_flags flags, + size_type size, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler(::clEnqueueSVMMap( + object_, blocking, flags, static_cast(ptr), size, + (events != NULL) ? (cl_uint)events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*)&events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_MAP_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + + /** + * Enqueues a command that will allow the host to update a region of a coarse-grained SVM buffer. + * This variant takes a cl::pointer instance. + */ + template + cl_int enqueueMapSVM( + cl::pointer &ptr, + cl_bool blocking, + cl_map_flags flags, + size_type size, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler(::clEnqueueSVMMap( + object_, blocking, flags, static_cast(ptr.get()), size, + (events != NULL) ? (cl_uint)events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*)&events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_MAP_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * Enqueues a command that will allow the host to update a region of a coarse-grained SVM buffer. + * This variant takes a cl::vector instance. + */ + template + cl_int enqueueMapSVM( + cl::vector &container, + cl_bool blocking, + cl_map_flags flags, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler(::clEnqueueSVMMap( + object_, blocking, flags, static_cast(container.data()), container.size(), + (events != NULL) ? (cl_uint)events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*)&events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_MAP_BUFFER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + + cl_int enqueueUnmapMemObject( + const Memory& memory, + void* mapped_ptr, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueUnmapMemObject( + object_, memory(), mapped_ptr, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + /** + * Enqueues a command that will release a coarse-grained SVM buffer back to the OpenCL runtime. + * This variant takes a raw SVM pointer. + */ + template + cl_int enqueueUnmapSVM( + T* ptr, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueSVMUnmap( + object_, static_cast(ptr), + (events != NULL) ? (cl_uint)events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*)&events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * Enqueues a command that will release a coarse-grained SVM buffer back to the OpenCL runtime. + * This variant takes a cl::pointer instance. + */ + template + cl_int enqueueUnmapSVM( + cl::pointer &ptr, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueSVMUnmap( + object_, static_cast(ptr.get()), + (events != NULL) ? (cl_uint)events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*)&events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * Enqueues a command that will release a coarse-grained SVM buffer back to the OpenCL runtime. + * This variant takes a cl::vector instance. + */ + template + cl_int enqueueUnmapSVM( + cl::vector &container, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueSVMUnmap( + object_, static_cast(container.data()), + (events != NULL) ? (cl_uint)events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*)&events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + /** + * Enqueues a marker command which waits for either a list of events to complete, + * or all previously enqueued commands to complete. + * + * Enqueues a marker command which waits for either a list of events to complete, + * or if the list is empty it waits for all commands previously enqueued in command_queue + * to complete before it completes. This command returns an event which can be waited on, + * i.e. this event can be waited on to insure that all events either in the event_wait_list + * or all previously enqueued commands, queued before this command to command_queue, + * have completed. + */ + cl_int enqueueMarkerWithWaitList( + const vector *events = 0, + Event *event = 0) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueMarkerWithWaitList( + object_, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_MARKER_WAIT_LIST_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * A synchronization point that enqueues a barrier operation. + * + * Enqueues a barrier command which waits for either a list of events to complete, + * or if the list is empty it waits for all commands previously enqueued in command_queue + * to complete before it completes. This command blocks command execution, that is, any + * following commands enqueued after it do not execute until it completes. This command + * returns an event which can be waited on, i.e. this event can be waited on to insure that + * all events either in the event_wait_list or all previously enqueued commands, queued + * before this command to command_queue, have completed. + */ + cl_int enqueueBarrierWithWaitList( + const vector *events = 0, + Event *event = 0) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueBarrierWithWaitList( + object_, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_BARRIER_WAIT_LIST_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * Enqueues a command to indicate with which device a set of memory objects + * should be associated. + */ + cl_int enqueueMigrateMemObjects( + const vector &memObjects, + cl_mem_migration_flags flags, + const vector* events = NULL, + Event* event = NULL + ) const + { + cl_event tmp; + + vector localMemObjects(memObjects.size()); + + for( int i = 0; i < (int)memObjects.size(); ++i ) { + localMemObjects[i] = memObjects[i](); + } + + cl_int err = detail::errHandler( + ::clEnqueueMigrateMemObjects( + object_, + (cl_uint)memObjects.size(), + localMemObjects.data(), + flags, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 + /** + * Enqueues a command that will allow the host associate ranges within a set of + * SVM allocations with a device. + * @param sizes - The length from each pointer to migrate. + */ + template + cl_int enqueueMigrateSVM( + const cl::vector &svmRawPointers, + const cl::vector &sizes, + cl_mem_migration_flags flags = 0, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler(::clEnqueueSVMMigrateMem( + object_, + svmRawPointers.size(), static_cast(svmRawPointers.data()), + sizes.data(), // array of sizes not passed + flags, + (events != NULL) ? (cl_uint)events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*)&events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_MIGRATE_SVM_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + /** + * Enqueues a command that will allow the host associate a set of SVM allocations with + * a device. + */ + template + cl_int enqueueMigrateSVM( + const cl::vector &svmRawPointers, + cl_mem_migration_flags flags = 0, + const vector* events = NULL, + Event* event = NULL) const + { + return enqueueMigrateSVM(svmRawPointers, cl::vector(svmRawPointers.size()), flags, events, event); + } + + + /** + * Enqueues a command that will allow the host associate ranges within a set of + * SVM allocations with a device. + * @param sizes - The length from each pointer to migrate. + */ + template + cl_int enqueueMigrateSVM( + const cl::vector> &svmPointers, + const cl::vector &sizes, + cl_mem_migration_flags flags = 0, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl::vector svmRawPointers; + svmRawPointers.reserve(svmPointers.size()); + for (auto p : svmPointers) { + svmRawPointers.push_back(static_cast(p.get())); + } + + return enqueueMigrateSVM(svmRawPointers, sizes, flags, events, event); + } + + + /** + * Enqueues a command that will allow the host associate a set of SVM allocations with + * a device. + */ + template + cl_int enqueueMigrateSVM( + const cl::vector> &svmPointers, + cl_mem_migration_flags flags = 0, + const vector* events = NULL, + Event* event = NULL) const + { + return enqueueMigrateSVM(svmPointers, cl::vector(svmPointers.size()), flags, events, event); + } + + /** + * Enqueues a command that will allow the host associate ranges within a set of + * SVM allocations with a device. + * @param sizes - The length from the beginning of each container to migrate. + */ + template + cl_int enqueueMigrateSVM( + const cl::vector> &svmContainers, + const cl::vector &sizes, + cl_mem_migration_flags flags = 0, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl::vector svmRawPointers; + svmRawPointers.reserve(svmContainers.size()); + for (auto p : svmContainers) { + svmRawPointers.push_back(static_cast(p.data())); + } + + return enqueueMigrateSVM(svmRawPointers, sizes, flags, events, event); + } + + /** + * Enqueues a command that will allow the host associate a set of SVM allocations with + * a device. + */ + template + cl_int enqueueMigrateSVM( + const cl::vector> &svmContainers, + cl_mem_migration_flags flags = 0, + const vector* events = NULL, + Event* event = NULL) const + { + return enqueueMigrateSVM(svmContainers, cl::vector(svmContainers.size()), flags, events, event); + } + +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 + + cl_int enqueueNDRangeKernel( + const Kernel& kernel, + const NDRange& offset, + const NDRange& global, + const NDRange& local = NullRange, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueNDRangeKernel( + object_, kernel(), (cl_uint) global.dimensions(), + offset.dimensions() != 0 ? (const size_type*) offset : NULL, + (const size_type*) global, + local.dimensions() != 0 ? (const size_type*) local : NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_NDRANGE_KERNEL_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + +#if defined(CL_USE_DEPRECATED_OPENCL_1_2_APIS) + CL_EXT_PREFIX__VERSION_1_2_DEPRECATED cl_int enqueueTask( + const Kernel& kernel, + const vector* events = NULL, + Event* event = NULL) const CL_EXT_SUFFIX__VERSION_1_2_DEPRECATED + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueTask( + object_, kernel(), + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_TASK_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif // #if defined(CL_USE_DEPRECATED_OPENCL_1_2_APIS) + + cl_int enqueueNativeKernel( + void (CL_CALLBACK *userFptr)(void *), + std::pair args, + const vector* mem_objects = NULL, + const vector* mem_locs = NULL, + const vector* events = NULL, + Event* event = NULL) const + { + size_type elements = 0; + if (mem_objects != NULL) { + elements = mem_objects->size(); + } + vector mems(elements); + for (unsigned int i = 0; i < elements; i++) { + mems[i] = ((*mem_objects)[i])(); + } + + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueNativeKernel( + object_, userFptr, args.first, args.second, + (mem_objects != NULL) ? (cl_uint) mem_objects->size() : 0, + mems.data(), + (mem_locs != NULL && mem_locs->size() > 0) ? (const void **) &mem_locs->front() : NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_NATIVE_KERNEL); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + +/** + * Deprecated APIs for 1.2 + */ +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + CL_EXT_PREFIX__VERSION_1_1_DEPRECATED + cl_int enqueueMarker(Event* event = NULL) const CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueMarker( + object_, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_MARKER_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + CL_EXT_PREFIX__VERSION_1_1_DEPRECATED + cl_int enqueueWaitForEvents(const vector& events) const CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED + { + return detail::errHandler( + ::clEnqueueWaitForEvents( + object_, + (cl_uint) events.size(), + events.size() > 0 ? (const cl_event*) &events.front() : NULL), + __ENQUEUE_WAIT_FOR_EVENTS_ERR); + } +#endif // defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + + cl_int enqueueAcquireGLObjects( + const vector* mem_objects = NULL, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueAcquireGLObjects( + object_, + (mem_objects != NULL) ? (cl_uint) mem_objects->size() : 0, + (mem_objects != NULL && mem_objects->size() > 0) ? (const cl_mem *) &mem_objects->front(): NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_ACQUIRE_GL_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueReleaseGLObjects( + const vector* mem_objects = NULL, + const vector* events = NULL, + Event* event = NULL) const + { + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueReleaseGLObjects( + object_, + (mem_objects != NULL) ? (cl_uint) mem_objects->size() : 0, + (mem_objects != NULL && mem_objects->size() > 0) ? (const cl_mem *) &mem_objects->front(): NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_RELEASE_GL_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + +#if defined (CL_HPP_USE_DX_INTEROP) +typedef CL_API_ENTRY cl_int (CL_API_CALL *PFN_clEnqueueAcquireD3D10ObjectsKHR)( + cl_command_queue command_queue, cl_uint num_objects, + const cl_mem* mem_objects, cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, cl_event* event); +typedef CL_API_ENTRY cl_int (CL_API_CALL *PFN_clEnqueueReleaseD3D10ObjectsKHR)( + cl_command_queue command_queue, cl_uint num_objects, + const cl_mem* mem_objects, cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, cl_event* event); + + cl_int enqueueAcquireD3D10Objects( + const vector* mem_objects = NULL, + const vector* events = NULL, + Event* event = NULL) const + { + static PFN_clEnqueueAcquireD3D10ObjectsKHR pfn_clEnqueueAcquireD3D10ObjectsKHR = NULL; +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + cl_context context = getInfo(); + cl::Device device(getInfo()); + cl_platform_id platform = device.getInfo(); + CL_HPP_INIT_CL_EXT_FCN_PTR_PLATFORM_(platform, clEnqueueAcquireD3D10ObjectsKHR); +#endif +#if CL_HPP_TARGET_OPENCL_VERSION >= 110 + CL_HPP_INIT_CL_EXT_FCN_PTR_(clEnqueueAcquireD3D10ObjectsKHR); +#endif + + cl_event tmp; + cl_int err = detail::errHandler( + pfn_clEnqueueAcquireD3D10ObjectsKHR( + object_, + (mem_objects != NULL) ? (cl_uint) mem_objects->size() : 0, + (mem_objects != NULL && mem_objects->size() > 0) ? (const cl_mem *) &mem_objects->front(): NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_ACQUIRE_GL_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } + + cl_int enqueueReleaseD3D10Objects( + const vector* mem_objects = NULL, + const vector* events = NULL, + Event* event = NULL) const + { + static PFN_clEnqueueReleaseD3D10ObjectsKHR pfn_clEnqueueReleaseD3D10ObjectsKHR = NULL; +#if CL_HPP_TARGET_OPENCL_VERSION >= 120 + cl_context context = getInfo(); + cl::Device device(getInfo()); + cl_platform_id platform = device.getInfo(); + CL_HPP_INIT_CL_EXT_FCN_PTR_PLATFORM_(platform, clEnqueueReleaseD3D10ObjectsKHR); +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 120 +#if CL_HPP_TARGET_OPENCL_VERSION >= 110 + CL_HPP_INIT_CL_EXT_FCN_PTR_(clEnqueueReleaseD3D10ObjectsKHR); +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 110 + + cl_event tmp; + cl_int err = detail::errHandler( + pfn_clEnqueueReleaseD3D10ObjectsKHR( + object_, + (mem_objects != NULL) ? (cl_uint) mem_objects->size() : 0, + (mem_objects != NULL && mem_objects->size() > 0) ? (const cl_mem *) &mem_objects->front(): NULL, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_RELEASE_GL_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; + } +#endif + +/** + * Deprecated APIs for 1.2 + */ +#if defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) + CL_EXT_PREFIX__VERSION_1_1_DEPRECATED + cl_int enqueueBarrier() const CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED + { + return detail::errHandler( + ::clEnqueueBarrier(object_), + __ENQUEUE_BARRIER_ERR); + } +#endif // CL_USE_DEPRECATED_OPENCL_1_1_APIS + + cl_int flush() const + { + return detail::errHandler(::clFlush(object_), __FLUSH_ERR); + } + + cl_int finish() const + { + return detail::errHandler(::clFinish(object_), __FINISH_ERR); + } +}; // CommandQueue + +CL_HPP_DEFINE_STATIC_MEMBER_ std::once_flag CommandQueue::default_initialized_; +CL_HPP_DEFINE_STATIC_MEMBER_ CommandQueue CommandQueue::default_; +CL_HPP_DEFINE_STATIC_MEMBER_ cl_int CommandQueue::default_error_ = CL_SUCCESS; + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 +enum class DeviceQueueProperties : cl_command_queue_properties +{ + None = 0, + Profiling = CL_QUEUE_PROFILING_ENABLE, +}; + +inline DeviceQueueProperties operator|(DeviceQueueProperties lhs, DeviceQueueProperties rhs) +{ + return static_cast(static_cast(lhs) | static_cast(rhs)); +} + +/*! \class DeviceCommandQueue + * \brief DeviceCommandQueue interface for device cl_command_queues. + */ +class DeviceCommandQueue : public detail::Wrapper +{ +public: + + /*! + * Trivial empty constructor to create a null queue. + */ + DeviceCommandQueue() { } + + /*! + * Default construct device command queue on default context and device + */ + DeviceCommandQueue(DeviceQueueProperties properties, cl_int* err = NULL) + { + cl_int error; + cl::Context context = cl::Context::getDefault(); + cl::Device device = cl::Device::getDefault(); + + cl_command_queue_properties mergedProperties = + CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE | CL_QUEUE_ON_DEVICE | static_cast(properties); + + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, mergedProperties, 0 }; + object_ = ::clCreateCommandQueueWithProperties( + context(), device(), queue_properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! + * Create a device command queue for a specified device in the passed context. + */ + DeviceCommandQueue( + const Context& context, + const Device& device, + DeviceQueueProperties properties = DeviceQueueProperties::None, + cl_int* err = NULL) + { + cl_int error; + + cl_command_queue_properties mergedProperties = + CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE | CL_QUEUE_ON_DEVICE | static_cast(properties); + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, mergedProperties, 0 }; + object_ = ::clCreateCommandQueueWithProperties( + context(), device(), queue_properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! + * Create a device command queue for a specified device in the passed context. + */ + DeviceCommandQueue( + const Context& context, + const Device& device, + cl_uint queueSize, + DeviceQueueProperties properties = DeviceQueueProperties::None, + cl_int* err = NULL) + { + cl_int error; + + cl_command_queue_properties mergedProperties = + CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE | CL_QUEUE_ON_DEVICE | static_cast(properties); + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, mergedProperties, + CL_QUEUE_SIZE, queueSize, + 0 }; + object_ = ::clCreateCommandQueueWithProperties( + context(), device(), queue_properties, &error); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + } + + /*! \brief Constructor from cl_command_queue - takes ownership. + * + * \param retainObject will cause the constructor to retain its cl object. + * Defaults to false to maintain compatibility with + * earlier versions. + */ + explicit DeviceCommandQueue(const cl_command_queue& commandQueue, bool retainObject = false) : + detail::Wrapper(commandQueue, retainObject) { } + + DeviceCommandQueue& operator = (const cl_command_queue& rhs) + { + detail::Wrapper::operator=(rhs); + return *this; + } + + /*! \brief Copy constructor to forward copy to the superclass correctly. + * Required for MSVC. + */ + DeviceCommandQueue(const DeviceCommandQueue& queue) : detail::Wrapper(queue) {} + + /*! \brief Copy assignment to forward copy to the superclass correctly. + * Required for MSVC. + */ + DeviceCommandQueue& operator = (const DeviceCommandQueue &queue) + { + detail::Wrapper::operator=(queue); + return *this; + } + + /*! \brief Move constructor to forward move to the superclass correctly. + * Required for MSVC. + */ + DeviceCommandQueue(DeviceCommandQueue&& queue) CL_HPP_NOEXCEPT_ : detail::Wrapper(std::move(queue)) {} + + /*! \brief Move assignment to forward move to the superclass correctly. + * Required for MSVC. + */ + DeviceCommandQueue& operator = (DeviceCommandQueue &&queue) + { + detail::Wrapper::operator=(std::move(queue)); + return *this; + } + + template + cl_int getInfo(cl_command_queue_info name, T* param) const + { + return detail::errHandler( + detail::getInfo( + &::clGetCommandQueueInfo, object_, name, param), + __GET_COMMAND_QUEUE_INFO_ERR); + } + + template typename + detail::param_traits::param_type + getInfo(cl_int* err = NULL) const + { + typename detail::param_traits< + detail::cl_command_queue_info, name>::param_type param; + cl_int result = getInfo(name, ¶m); + if (err != NULL) { + *err = result; + } + return param; + } + + /*! + * Create a new default device command queue for the default device, + * in the default context and of the default size. + * If there is already a default queue for the specified device this + * function will return the pre-existing queue. + */ + static DeviceCommandQueue makeDefault( + cl_int *err = nullptr) + { + cl_int error; + cl::Context context = cl::Context::getDefault(); + cl::Device device = cl::Device::getDefault(); + + cl_command_queue_properties properties = + CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE | CL_QUEUE_ON_DEVICE | CL_QUEUE_ON_DEVICE_DEFAULT; + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, properties, + 0 }; + DeviceCommandQueue deviceQueue( + ::clCreateCommandQueueWithProperties( + context(), device(), queue_properties, &error)); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + + return deviceQueue; + } + + /*! + * Create a new default device command queue for the specified device + * and of the default size. + * If there is already a default queue for the specified device this + * function will return the pre-existing queue. + */ + static DeviceCommandQueue makeDefault( + const Context &context, const Device &device, cl_int *err = nullptr) + { + cl_int error; + + cl_command_queue_properties properties = + CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE | CL_QUEUE_ON_DEVICE | CL_QUEUE_ON_DEVICE_DEFAULT; + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, properties, + 0 }; + DeviceCommandQueue deviceQueue( + ::clCreateCommandQueueWithProperties( + context(), device(), queue_properties, &error)); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + + return deviceQueue; + } + + /*! + * Create a new default device command queue for the specified device + * and of the requested size in bytes. + * If there is already a default queue for the specified device this + * function will return the pre-existing queue. + */ + static DeviceCommandQueue makeDefault( + const Context &context, const Device &device, cl_uint queueSize, cl_int *err = nullptr) + { + cl_int error; + + cl_command_queue_properties properties = + CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE | CL_QUEUE_ON_DEVICE | CL_QUEUE_ON_DEVICE_DEFAULT; + cl_queue_properties queue_properties[] = { + CL_QUEUE_PROPERTIES, properties, + CL_QUEUE_SIZE, queueSize, + 0 }; + DeviceCommandQueue deviceQueue( + ::clCreateCommandQueueWithProperties( + context(), device(), queue_properties, &error)); + + detail::errHandler(error, __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR); + if (err != NULL) { + *err = error; + } + + return deviceQueue; + } + + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 210 + /*! + * Modify the default device command queue to be used for subsequent kernels. + * This can update the default command queue for a device repeatedly to account + * for kernels that rely on the default. + * @return updated default device command queue. + */ + static DeviceCommandQueue updateDefault(const Context &context, const Device &device, const DeviceCommandQueue &default_queue, cl_int *err = nullptr) + { + cl_int error; + error = clSetDefaultDeviceCommandQueue(context.get(), device.get(), default_queue.get()); + + detail::errHandler(error, __SET_DEFAULT_DEVICE_COMMAND_QUEUE_ERR); + if (err != NULL) { + *err = error; + } + return default_queue; + } + + /*! + * Return the current default command queue for the specified command queue + */ + static DeviceCommandQueue getDefault(const CommandQueue &queue, cl_int * err = NULL) + { + return queue.getInfo(err); + } + +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 210 +}; // DeviceCommandQueue + +namespace detail +{ + // Specialization for device command queue + template <> + struct KernelArgumentHandler + { + static size_type size(const cl::DeviceCommandQueue&) { return sizeof(cl_command_queue); } + static const cl_command_queue* ptr(const cl::DeviceCommandQueue& value) { return &(value()); } + }; +} // namespace detail + +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + + +template< typename IteratorType > +Buffer::Buffer( + const Context &context, + IteratorType startIterator, + IteratorType endIterator, + bool readOnly, + bool useHostPtr, + cl_int* err) +{ + typedef typename std::iterator_traits::value_type DataType; + cl_int error; + + cl_mem_flags flags = 0; + if( readOnly ) { + flags |= CL_MEM_READ_ONLY; + } + else { + flags |= CL_MEM_READ_WRITE; + } + if( useHostPtr ) { + flags |= CL_MEM_USE_HOST_PTR; + } + + size_type size = sizeof(DataType)*(endIterator - startIterator); + + if( useHostPtr ) { + object_ = ::clCreateBuffer(context(), flags, size, static_cast(&*startIterator), &error); + } else { + object_ = ::clCreateBuffer(context(), flags, size, 0, &error); + } + + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + + if( !useHostPtr ) { + CommandQueue queue(context, 0, &error); + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + + error = cl::copy(queue, startIterator, endIterator, *this); + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } +} + +template< typename IteratorType > +Buffer::Buffer( + const CommandQueue &queue, + IteratorType startIterator, + IteratorType endIterator, + bool readOnly, + bool useHostPtr, + cl_int* err) +{ + typedef typename std::iterator_traits::value_type DataType; + cl_int error; + + cl_mem_flags flags = 0; + if (readOnly) { + flags |= CL_MEM_READ_ONLY; + } + else { + flags |= CL_MEM_READ_WRITE; + } + if (useHostPtr) { + flags |= CL_MEM_USE_HOST_PTR; + } + + size_type size = sizeof(DataType)*(endIterator - startIterator); + + Context context = queue.getInfo(); + + if (useHostPtr) { + object_ = ::clCreateBuffer(context(), flags, size, static_cast(&*startIterator), &error); + } + else { + object_ = ::clCreateBuffer(context(), flags, size, 0, &error); + } + + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + + if (!useHostPtr) { + error = cl::copy(queue, startIterator, endIterator, *this); + detail::errHandler(error, __CREATE_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + } +} + +inline cl_int enqueueReadBuffer( + const Buffer& buffer, + cl_bool blocking, + size_type offset, + size_type size, + void* ptr, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueReadBuffer(buffer, blocking, offset, size, ptr, events, event); +} + +inline cl_int enqueueWriteBuffer( + const Buffer& buffer, + cl_bool blocking, + size_type offset, + size_type size, + const void* ptr, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueWriteBuffer(buffer, blocking, offset, size, ptr, events, event); +} + +inline void* enqueueMapBuffer( + const Buffer& buffer, + cl_bool blocking, + cl_map_flags flags, + size_type offset, + size_type size, + const vector* events = NULL, + Event* event = NULL, + cl_int* err = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + + void * result = ::clEnqueueMapBuffer( + queue(), buffer(), blocking, flags, offset, size, + (events != NULL) ? (cl_uint) events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*) &events->front() : NULL, + (cl_event*) event, + &error); + + detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + if (err != NULL) { + *err = error; + } + return result; +} + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 +/** + * Enqueues to the default queue a command that will allow the host to + * update a region of a coarse-grained SVM buffer. + * This variant takes a raw SVM pointer. + */ +template +inline cl_int enqueueMapSVM( + T* ptr, + cl_bool blocking, + cl_map_flags flags, + size_type size, + const vector* events, + Event* event) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + if (error != CL_SUCCESS) { + return detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + } + + return queue.enqueueMapSVM( + ptr, blocking, flags, size, events, event); +} + +/** + * Enqueues to the default queue a command that will allow the host to + * update a region of a coarse-grained SVM buffer. + * This variant takes a cl::pointer instance. + */ +template +inline cl_int enqueueMapSVM( + cl::pointer ptr, + cl_bool blocking, + cl_map_flags flags, + size_type size, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + if (error != CL_SUCCESS) { + return detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + } + + return queue.enqueueMapSVM( + ptr, blocking, flags, size, events, event); +} + +/** + * Enqueues to the default queue a command that will allow the host to + * update a region of a coarse-grained SVM buffer. + * This variant takes a cl::vector instance. + */ +template +inline cl_int enqueueMapSVM( + cl::vector container, + cl_bool blocking, + cl_map_flags flags, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + if (error != CL_SUCCESS) { + return detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + } + + return queue.enqueueMapSVM( + container, blocking, flags, events, event); +} + +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + +inline cl_int enqueueUnmapMemObject( + const Memory& memory, + void* mapped_ptr, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + detail::errHandler(error, __ENQUEUE_MAP_BUFFER_ERR); + if (error != CL_SUCCESS) { + return error; + } + + cl_event tmp; + cl_int err = detail::errHandler( + ::clEnqueueUnmapMemObject( + queue(), memory(), mapped_ptr, + (events != NULL) ? (cl_uint)events->size() : 0, + (events != NULL && events->size() > 0) ? (cl_event*)&events->front() : NULL, + (event != NULL) ? &tmp : NULL), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + + if (event != NULL && err == CL_SUCCESS) + *event = tmp; + + return err; +} + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 +/** + * Enqueues to the default queue a command that will release a coarse-grained + * SVM buffer back to the OpenCL runtime. + * This variant takes a raw SVM pointer. + */ +template +inline cl_int enqueueUnmapSVM( + T* ptr, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + if (error != CL_SUCCESS) { + return detail::errHandler(error, __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + } + + return detail::errHandler(queue.enqueueUnmapSVM(ptr, events, event), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + +} + +/** + * Enqueues to the default queue a command that will release a coarse-grained + * SVM buffer back to the OpenCL runtime. + * This variant takes a cl::pointer instance. + */ +template +inline cl_int enqueueUnmapSVM( + cl::pointer &ptr, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + if (error != CL_SUCCESS) { + return detail::errHandler(error, __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + } + + return detail::errHandler(queue.enqueueUnmapSVM(ptr, events, event), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); +} + +/** + * Enqueues to the default queue a command that will release a coarse-grained + * SVM buffer back to the OpenCL runtime. + * This variant takes a cl::vector instance. + */ +template +inline cl_int enqueueUnmapSVM( + cl::vector &container, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + if (error != CL_SUCCESS) { + return detail::errHandler(error, __ENQUEUE_UNMAP_MEM_OBJECT_ERR); + } + + return detail::errHandler(queue.enqueueUnmapSVM(container, events, event), + __ENQUEUE_UNMAP_MEM_OBJECT_ERR); +} + +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + +inline cl_int enqueueCopyBuffer( + const Buffer& src, + const Buffer& dst, + size_type src_offset, + size_type dst_offset, + size_type size, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueCopyBuffer(src, dst, src_offset, dst_offset, size, events, event); +} + +/** + * Blocking copy operation between iterators and a buffer. + * Host to Device. + * Uses default command queue. + */ +template< typename IteratorType > +inline cl_int copy( IteratorType startIterator, IteratorType endIterator, cl::Buffer &buffer ) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + if (error != CL_SUCCESS) + return error; + + return cl::copy(queue, startIterator, endIterator, buffer); +} + +/** + * Blocking copy operation between iterators and a buffer. + * Device to Host. + * Uses default command queue. + */ +template< typename IteratorType > +inline cl_int copy( const cl::Buffer &buffer, IteratorType startIterator, IteratorType endIterator ) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + if (error != CL_SUCCESS) + return error; + + return cl::copy(queue, buffer, startIterator, endIterator); +} + +/** + * Blocking copy operation between iterators and a buffer. + * Host to Device. + * Uses specified queue. + */ +template< typename IteratorType > +inline cl_int copy( const CommandQueue &queue, IteratorType startIterator, IteratorType endIterator, cl::Buffer &buffer ) +{ + typedef typename std::iterator_traits::value_type DataType; + cl_int error; + + size_type length = endIterator-startIterator; + size_type byteLength = length*sizeof(DataType); + + DataType *pointer = + static_cast(queue.enqueueMapBuffer(buffer, CL_TRUE, CL_MAP_WRITE, 0, byteLength, 0, 0, &error)); + // if exceptions enabled, enqueueMapBuffer will throw + if( error != CL_SUCCESS ) { + return error; + } +#if defined(_MSC_VER) + std::copy( + startIterator, + endIterator, + stdext::checked_array_iterator( + pointer, length)); +#else + std::copy(startIterator, endIterator, pointer); +#endif + Event endEvent; + error = queue.enqueueUnmapMemObject(buffer, pointer, 0, &endEvent); + // if exceptions enabled, enqueueUnmapMemObject will throw + if( error != CL_SUCCESS ) { + return error; + } + endEvent.wait(); + return CL_SUCCESS; +} + +/** + * Blocking copy operation between iterators and a buffer. + * Device to Host. + * Uses specified queue. + */ +template< typename IteratorType > +inline cl_int copy( const CommandQueue &queue, const cl::Buffer &buffer, IteratorType startIterator, IteratorType endIterator ) +{ + typedef typename std::iterator_traits::value_type DataType; + cl_int error; + + size_type length = endIterator-startIterator; + size_type byteLength = length*sizeof(DataType); + + DataType *pointer = + static_cast(queue.enqueueMapBuffer(buffer, CL_TRUE, CL_MAP_READ, 0, byteLength, 0, 0, &error)); + // if exceptions enabled, enqueueMapBuffer will throw + if( error != CL_SUCCESS ) { + return error; + } + std::copy(pointer, pointer + length, startIterator); + Event endEvent; + error = queue.enqueueUnmapMemObject(buffer, pointer, 0, &endEvent); + // if exceptions enabled, enqueueUnmapMemObject will throw + if( error != CL_SUCCESS ) { + return error; + } + endEvent.wait(); + return CL_SUCCESS; +} + + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 +/** + * Blocking SVM map operation - performs a blocking map underneath. + */ +template +inline cl_int mapSVM(cl::vector &container) +{ + return enqueueMapSVM(container, CL_TRUE, CL_MAP_READ | CL_MAP_WRITE); +} + +/** +* Blocking SVM map operation - performs a blocking map underneath. +*/ +template +inline cl_int unmapSVM(cl::vector &container) +{ + return enqueueUnmapSVM(container); +} + +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + +#if CL_HPP_TARGET_OPENCL_VERSION >= 110 +inline cl_int enqueueReadBufferRect( + const Buffer& buffer, + cl_bool blocking, + const array& buffer_offset, + const array& host_offset, + const array& region, + size_type buffer_row_pitch, + size_type buffer_slice_pitch, + size_type host_row_pitch, + size_type host_slice_pitch, + void *ptr, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueReadBufferRect( + buffer, + blocking, + buffer_offset, + host_offset, + region, + buffer_row_pitch, + buffer_slice_pitch, + host_row_pitch, + host_slice_pitch, + ptr, + events, + event); +} + +inline cl_int enqueueWriteBufferRect( + const Buffer& buffer, + cl_bool blocking, + const array& buffer_offset, + const array& host_offset, + const array& region, + size_type buffer_row_pitch, + size_type buffer_slice_pitch, + size_type host_row_pitch, + size_type host_slice_pitch, + const void *ptr, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueWriteBufferRect( + buffer, + blocking, + buffer_offset, + host_offset, + region, + buffer_row_pitch, + buffer_slice_pitch, + host_row_pitch, + host_slice_pitch, + ptr, + events, + event); +} + +inline cl_int enqueueCopyBufferRect( + const Buffer& src, + const Buffer& dst, + const array& src_origin, + const array& dst_origin, + const array& region, + size_type src_row_pitch, + size_type src_slice_pitch, + size_type dst_row_pitch, + size_type dst_slice_pitch, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueCopyBufferRect( + src, + dst, + src_origin, + dst_origin, + region, + src_row_pitch, + src_slice_pitch, + dst_row_pitch, + dst_slice_pitch, + events, + event); +} +#endif // CL_HPP_TARGET_OPENCL_VERSION >= 110 + +inline cl_int enqueueReadImage( + const Image& image, + cl_bool blocking, + const array& origin, + const array& region, + size_type row_pitch, + size_type slice_pitch, + void* ptr, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueReadImage( + image, + blocking, + origin, + region, + row_pitch, + slice_pitch, + ptr, + events, + event); +} + +inline cl_int enqueueWriteImage( + const Image& image, + cl_bool blocking, + const array& origin, + const array& region, + size_type row_pitch, + size_type slice_pitch, + const void* ptr, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueWriteImage( + image, + blocking, + origin, + region, + row_pitch, + slice_pitch, + ptr, + events, + event); +} + +inline cl_int enqueueCopyImage( + const Image& src, + const Image& dst, + const array& src_origin, + const array& dst_origin, + const array& region, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueCopyImage( + src, + dst, + src_origin, + dst_origin, + region, + events, + event); +} + +inline cl_int enqueueCopyImageToBuffer( + const Image& src, + const Buffer& dst, + const array& src_origin, + const array& region, + size_type dst_offset, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueCopyImageToBuffer( + src, + dst, + src_origin, + region, + dst_offset, + events, + event); +} + +inline cl_int enqueueCopyBufferToImage( + const Buffer& src, + const Image& dst, + size_type src_offset, + const array& dst_origin, + const array& region, + const vector* events = NULL, + Event* event = NULL) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.enqueueCopyBufferToImage( + src, + dst, + src_offset, + dst_origin, + region, + events, + event); +} + + +inline cl_int flush(void) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + return queue.flush(); +} + +inline cl_int finish(void) +{ + cl_int error; + CommandQueue queue = CommandQueue::getDefault(&error); + + if (error != CL_SUCCESS) { + return error; + } + + + return queue.finish(); +} + +class EnqueueArgs +{ +private: + CommandQueue queue_; + const NDRange offset_; + const NDRange global_; + const NDRange local_; + vector events_; + + template + friend class KernelFunctor; + +public: + EnqueueArgs(NDRange global) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(NullRange) + { + + } + + EnqueueArgs(NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(local) + { + + } + + EnqueueArgs(NDRange offset, NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(offset), + global_(global), + local_(local) + { + + } + + EnqueueArgs(Event e, NDRange global) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(NullRange) + { + events_.push_back(e); + } + + EnqueueArgs(Event e, NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(local) + { + events_.push_back(e); + } + + EnqueueArgs(Event e, NDRange offset, NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(offset), + global_(global), + local_(local) + { + events_.push_back(e); + } + + EnqueueArgs(const vector &events, NDRange global) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(NullRange), + events_(events) + { + + } + + EnqueueArgs(const vector &events, NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(NullRange), + global_(global), + local_(local), + events_(events) + { + + } + + EnqueueArgs(const vector &events, NDRange offset, NDRange global, NDRange local) : + queue_(CommandQueue::getDefault()), + offset_(offset), + global_(global), + local_(local), + events_(events) + { + + } + + EnqueueArgs(CommandQueue &queue, NDRange global) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(NullRange) + { + + } + + EnqueueArgs(CommandQueue &queue, NDRange global, NDRange local) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(local) + { + + } + + EnqueueArgs(CommandQueue &queue, NDRange offset, NDRange global, NDRange local) : + queue_(queue), + offset_(offset), + global_(global), + local_(local) + { + + } + + EnqueueArgs(CommandQueue &queue, Event e, NDRange global) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(NullRange) + { + events_.push_back(e); + } + + EnqueueArgs(CommandQueue &queue, Event e, NDRange global, NDRange local) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(local) + { + events_.push_back(e); + } + + EnqueueArgs(CommandQueue &queue, Event e, NDRange offset, NDRange global, NDRange local) : + queue_(queue), + offset_(offset), + global_(global), + local_(local) + { + events_.push_back(e); + } + + EnqueueArgs(CommandQueue &queue, const vector &events, NDRange global) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(NullRange), + events_(events) + { + + } + + EnqueueArgs(CommandQueue &queue, const vector &events, NDRange global, NDRange local) : + queue_(queue), + offset_(NullRange), + global_(global), + local_(local), + events_(events) + { + + } + + EnqueueArgs(CommandQueue &queue, const vector &events, NDRange offset, NDRange global, NDRange local) : + queue_(queue), + offset_(offset), + global_(global), + local_(local), + events_(events) + { + + } +}; + + +//---------------------------------------------------------------------------------------------- + + +/** + * Type safe kernel functor. + * + */ +template +class KernelFunctor +{ +private: + Kernel kernel_; + + template + void setArgs(T0&& t0, T1s&&... t1s) + { + kernel_.setArg(index, t0); + setArgs(std::forward(t1s)...); + } + + template + void setArgs(T0&& t0) + { + kernel_.setArg(index, t0); + } + + template + void setArgs() + { + } + + +public: + KernelFunctor(Kernel kernel) : kernel_(kernel) + {} + + KernelFunctor( + const Program& program, + const string name, + cl_int * err = NULL) : + kernel_(program, name.c_str(), err) + {} + + //! \brief Return type of the functor + typedef Event result_type; + + /** + * Enqueue kernel. + * @param args Launch parameters of the kernel. + * @param t0... List of kernel arguments based on the template type of the functor. + */ + Event operator() ( + const EnqueueArgs& args, + Ts... ts) + { + Event event; + setArgs<0>(std::forward(ts)...); + + args.queue_.enqueueNDRangeKernel( + kernel_, + args.offset_, + args.global_, + args.local_, + &args.events_, + &event); + + return event; + } + + /** + * Enqueue kernel with support for error code. + * @param args Launch parameters of the kernel. + * @param t0... List of kernel arguments based on the template type of the functor. + * @param error Out parameter returning the error code from the execution. + */ + Event operator() ( + const EnqueueArgs& args, + Ts... ts, + cl_int &error) + { + Event event; + setArgs<0>(std::forward(ts)...); + + error = args.queue_.enqueueNDRangeKernel( + kernel_, + args.offset_, + args.global_, + args.local_, + &args.events_, + &event); + + return event; + } + +#if CL_HPP_TARGET_OPENCL_VERSION >= 200 + cl_int setSVMPointers(const vector &pointerList) + { + return kernel_.setSVMPointers(pointerList); + } + + template + cl_int setSVMPointers(const T0 &t0, T1s &... ts) + { + return kernel_.setSVMPointers(t0, ts...); + } +#endif // #if CL_HPP_TARGET_OPENCL_VERSION >= 200 + + Kernel getKernel() + { + return kernel_; + } +}; + +namespace compatibility { + /** + * Backward compatibility class to ensure that cl.hpp code works with cl2.hpp. + * Please use KernelFunctor directly. + */ + template + struct make_kernel + { + typedef KernelFunctor FunctorType; + + FunctorType functor_; + + make_kernel( + const Program& program, + const string name, + cl_int * err = NULL) : + functor_(FunctorType(program, name, err)) + {} + + make_kernel( + const Kernel kernel) : + functor_(FunctorType(kernel)) + {} + + //! \brief Return type of the functor + typedef Event result_type; + + //! \brief Function signature of kernel functor with no event dependency. + typedef Event type_( + const EnqueueArgs&, + Ts...); + + Event operator()( + const EnqueueArgs& enqueueArgs, + Ts... args) + { + return functor_( + enqueueArgs, args...); + } + }; +} // namespace compatibility + + +//---------------------------------------------------------------------------------------------------------------------- + +#undef CL_HPP_ERR_STR_ +#if !defined(CL_HPP_USER_OVERRIDE_ERROR_STRINGS) +#undef __GET_DEVICE_INFO_ERR +#undef __GET_PLATFORM_INFO_ERR +#undef __GET_DEVICE_IDS_ERR +#undef __GET_PLATFORM_IDS_ERR +#undef __GET_CONTEXT_INFO_ERR +#undef __GET_EVENT_INFO_ERR +#undef __GET_EVENT_PROFILE_INFO_ERR +#undef __GET_MEM_OBJECT_INFO_ERR +#undef __GET_IMAGE_INFO_ERR +#undef __GET_SAMPLER_INFO_ERR +#undef __GET_KERNEL_INFO_ERR +#undef __GET_KERNEL_ARG_INFO_ERR +#undef __GET_KERNEL_SUB_GROUP_INFO_ERR +#undef __GET_KERNEL_WORK_GROUP_INFO_ERR +#undef __GET_PROGRAM_INFO_ERR +#undef __GET_PROGRAM_BUILD_INFO_ERR +#undef __GET_COMMAND_QUEUE_INFO_ERR +#undef __CREATE_CONTEXT_ERR +#undef __CREATE_CONTEXT_FROM_TYPE_ERR +#undef __GET_SUPPORTED_IMAGE_FORMATS_ERR +#undef __CREATE_BUFFER_ERR +#undef __COPY_ERR +#undef __CREATE_SUBBUFFER_ERR +#undef __CREATE_GL_BUFFER_ERR +#undef __CREATE_GL_RENDER_BUFFER_ERR +#undef __GET_GL_OBJECT_INFO_ERR +#undef __CREATE_IMAGE_ERR +#undef __CREATE_GL_TEXTURE_ERR +#undef __IMAGE_DIMENSION_ERR +#undef __SET_MEM_OBJECT_DESTRUCTOR_CALLBACK_ERR +#undef __CREATE_USER_EVENT_ERR +#undef __SET_USER_EVENT_STATUS_ERR +#undef __SET_EVENT_CALLBACK_ERR +#undef __WAIT_FOR_EVENTS_ERR +#undef __CREATE_KERNEL_ERR +#undef __SET_KERNEL_ARGS_ERR +#undef __CREATE_PROGRAM_WITH_SOURCE_ERR +#undef __CREATE_PROGRAM_WITH_IL_ERR +#undef __CREATE_PROGRAM_WITH_BINARY_ERR +#undef __CREATE_PROGRAM_WITH_IL_ERR +#undef __CREATE_PROGRAM_WITH_BUILT_IN_KERNELS_ERR +#undef __BUILD_PROGRAM_ERR +#undef __COMPILE_PROGRAM_ERR +#undef __LINK_PROGRAM_ERR +#undef __CREATE_KERNELS_IN_PROGRAM_ERR +#undef __CREATE_COMMAND_QUEUE_WITH_PROPERTIES_ERR +#undef __CREATE_SAMPLER_WITH_PROPERTIES_ERR +#undef __SET_COMMAND_QUEUE_PROPERTY_ERR +#undef __ENQUEUE_READ_BUFFER_ERR +#undef __ENQUEUE_READ_BUFFER_RECT_ERR +#undef __ENQUEUE_WRITE_BUFFER_ERR +#undef __ENQUEUE_WRITE_BUFFER_RECT_ERR +#undef __ENQEUE_COPY_BUFFER_ERR +#undef __ENQEUE_COPY_BUFFER_RECT_ERR +#undef __ENQUEUE_FILL_BUFFER_ERR +#undef __ENQUEUE_READ_IMAGE_ERR +#undef __ENQUEUE_WRITE_IMAGE_ERR +#undef __ENQUEUE_COPY_IMAGE_ERR +#undef __ENQUEUE_FILL_IMAGE_ERR +#undef __ENQUEUE_COPY_IMAGE_TO_BUFFER_ERR +#undef __ENQUEUE_COPY_BUFFER_TO_IMAGE_ERR +#undef __ENQUEUE_MAP_BUFFER_ERR +#undef __ENQUEUE_MAP_IMAGE_ERR +#undef __ENQUEUE_UNMAP_MEM_OBJECT_ERR +#undef __ENQUEUE_NDRANGE_KERNEL_ERR +#undef __ENQUEUE_NATIVE_KERNEL +#undef __ENQUEUE_MIGRATE_MEM_OBJECTS_ERR +#undef __ENQUEUE_MIGRATE_SVM_ERR +#undef __ENQUEUE_ACQUIRE_GL_ERR +#undef __ENQUEUE_RELEASE_GL_ERR +#undef __CREATE_PIPE_ERR +#undef __GET_PIPE_INFO_ERR +#undef __RETAIN_ERR +#undef __RELEASE_ERR +#undef __FLUSH_ERR +#undef __FINISH_ERR +#undef __VECTOR_CAPACITY_ERR +#undef __CREATE_SUB_DEVICES_ERR +#undef __CREATE_SUB_DEVICES_ERR +#undef __ENQUEUE_MARKER_ERR +#undef __ENQUEUE_WAIT_FOR_EVENTS_ERR +#undef __ENQUEUE_BARRIER_ERR +#undef __UNLOAD_COMPILER_ERR +#undef __CREATE_GL_TEXTURE_2D_ERR +#undef __CREATE_GL_TEXTURE_3D_ERR +#undef __CREATE_IMAGE2D_ERR +#undef __CREATE_IMAGE3D_ERR +#undef __CREATE_COMMAND_QUEUE_ERR +#undef __ENQUEUE_TASK_ERR +#undef __CREATE_SAMPLER_ERR +#undef __ENQUEUE_MARKER_WAIT_LIST_ERR +#undef __ENQUEUE_BARRIER_WAIT_LIST_ERR +#undef __CLONE_KERNEL_ERR +#undef __GET_HOST_TIMER_ERR +#undef __GET_DEVICE_AND_HOST_TIMER_ERR + +#endif //CL_HPP_USER_OVERRIDE_ERROR_STRINGS + +// Extensions +#undef CL_HPP_INIT_CL_EXT_FCN_PTR_ +#undef CL_HPP_INIT_CL_EXT_FCN_PTR_PLATFORM_ + +#if defined(CL_HPP_USE_CL_DEVICE_FISSION) +#undef CL_HPP_PARAM_NAME_DEVICE_FISSION_ +#endif // CL_HPP_USE_CL_DEVICE_FISSION + +#undef CL_HPP_NOEXCEPT_ +#undef CL_HPP_DEFINE_STATIC_MEMBER_ + +} // namespace cl + +#endif // CL_HPP_ diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_d3d10.h b/benchmarks/new_opencl/runtime/include/CL/cl_d3d10.h new file mode 100644 index 00000000..d5960a43 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_d3d10.h @@ -0,0 +1,131 @@ +/********************************************************************************** + * Copyright (c) 2008-2015 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + **********************************************************************************/ + +/* $Revision: 11708 $ on $Date: 2010-06-13 23:36:24 -0700 (Sun, 13 Jun 2010) $ */ + +#ifndef __OPENCL_CL_D3D10_H +#define __OPENCL_CL_D3D10_H + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/****************************************************************************** + * cl_khr_d3d10_sharing */ +#define cl_khr_d3d10_sharing 1 + +typedef cl_uint cl_d3d10_device_source_khr; +typedef cl_uint cl_d3d10_device_set_khr; + +/******************************************************************************/ + +/* Error Codes */ +#define CL_INVALID_D3D10_DEVICE_KHR -1002 +#define CL_INVALID_D3D10_RESOURCE_KHR -1003 +#define CL_D3D10_RESOURCE_ALREADY_ACQUIRED_KHR -1004 +#define CL_D3D10_RESOURCE_NOT_ACQUIRED_KHR -1005 + +/* cl_d3d10_device_source_nv */ +#define CL_D3D10_DEVICE_KHR 0x4010 +#define CL_D3D10_DXGI_ADAPTER_KHR 0x4011 + +/* cl_d3d10_device_set_nv */ +#define CL_PREFERRED_DEVICES_FOR_D3D10_KHR 0x4012 +#define CL_ALL_DEVICES_FOR_D3D10_KHR 0x4013 + +/* cl_context_info */ +#define CL_CONTEXT_D3D10_DEVICE_KHR 0x4014 +#define CL_CONTEXT_D3D10_PREFER_SHARED_RESOURCES_KHR 0x402C + +/* cl_mem_info */ +#define CL_MEM_D3D10_RESOURCE_KHR 0x4015 + +/* cl_image_info */ +#define CL_IMAGE_D3D10_SUBRESOURCE_KHR 0x4016 + +/* cl_command_type */ +#define CL_COMMAND_ACQUIRE_D3D10_OBJECTS_KHR 0x4017 +#define CL_COMMAND_RELEASE_D3D10_OBJECTS_KHR 0x4018 + +/******************************************************************************/ + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetDeviceIDsFromD3D10KHR_fn)( + cl_platform_id platform, + cl_d3d10_device_source_khr d3d_device_source, + void * d3d_object, + cl_d3d10_device_set_khr d3d_device_set, + cl_uint num_entries, + cl_device_id * devices, + cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_0; + +typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D10BufferKHR_fn)( + cl_context context, + cl_mem_flags flags, + ID3D10Buffer * resource, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D10Texture2DKHR_fn)( + cl_context context, + cl_mem_flags flags, + ID3D10Texture2D * resource, + UINT subresource, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D10Texture3DKHR_fn)( + cl_context context, + cl_mem_flags flags, + ID3D10Texture3D * resource, + UINT subresource, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireD3D10ObjectsKHR_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseD3D10ObjectsKHR_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +#ifdef __cplusplus +} +#endif + +#endif /* __OPENCL_CL_D3D10_H */ + diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_d3d11.h b/benchmarks/new_opencl/runtime/include/CL/cl_d3d11.h new file mode 100644 index 00000000..39f90723 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_d3d11.h @@ -0,0 +1,131 @@ +/********************************************************************************** + * Copyright (c) 2008-2015 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + **********************************************************************************/ + +/* $Revision: 11708 $ on $Date: 2010-06-13 23:36:24 -0700 (Sun, 13 Jun 2010) $ */ + +#ifndef __OPENCL_CL_D3D11_H +#define __OPENCL_CL_D3D11_H + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/****************************************************************************** + * cl_khr_d3d11_sharing */ +#define cl_khr_d3d11_sharing 1 + +typedef cl_uint cl_d3d11_device_source_khr; +typedef cl_uint cl_d3d11_device_set_khr; + +/******************************************************************************/ + +/* Error Codes */ +#define CL_INVALID_D3D11_DEVICE_KHR -1006 +#define CL_INVALID_D3D11_RESOURCE_KHR -1007 +#define CL_D3D11_RESOURCE_ALREADY_ACQUIRED_KHR -1008 +#define CL_D3D11_RESOURCE_NOT_ACQUIRED_KHR -1009 + +/* cl_d3d11_device_source */ +#define CL_D3D11_DEVICE_KHR 0x4019 +#define CL_D3D11_DXGI_ADAPTER_KHR 0x401A + +/* cl_d3d11_device_set */ +#define CL_PREFERRED_DEVICES_FOR_D3D11_KHR 0x401B +#define CL_ALL_DEVICES_FOR_D3D11_KHR 0x401C + +/* cl_context_info */ +#define CL_CONTEXT_D3D11_DEVICE_KHR 0x401D +#define CL_CONTEXT_D3D11_PREFER_SHARED_RESOURCES_KHR 0x402D + +/* cl_mem_info */ +#define CL_MEM_D3D11_RESOURCE_KHR 0x401E + +/* cl_image_info */ +#define CL_IMAGE_D3D11_SUBRESOURCE_KHR 0x401F + +/* cl_command_type */ +#define CL_COMMAND_ACQUIRE_D3D11_OBJECTS_KHR 0x4020 +#define CL_COMMAND_RELEASE_D3D11_OBJECTS_KHR 0x4021 + +/******************************************************************************/ + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetDeviceIDsFromD3D11KHR_fn)( + cl_platform_id platform, + cl_d3d11_device_source_khr d3d_device_source, + void * d3d_object, + cl_d3d11_device_set_khr d3d_device_set, + cl_uint num_entries, + cl_device_id * devices, + cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D11BufferKHR_fn)( + cl_context context, + cl_mem_flags flags, + ID3D11Buffer * resource, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D11Texture2DKHR_fn)( + cl_context context, + cl_mem_flags flags, + ID3D11Texture2D * resource, + UINT subresource, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D11Texture3DKHR_fn)( + cl_context context, + cl_mem_flags flags, + ID3D11Texture3D * resource, + UINT subresource, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireD3D11ObjectsKHR_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseD3D11ObjectsKHR_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_2; + +#ifdef __cplusplus +} +#endif + +#endif /* __OPENCL_CL_D3D11_H */ + diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_dx9_media_sharing.h b/benchmarks/new_opencl/runtime/include/CL/cl_dx9_media_sharing.h new file mode 100644 index 00000000..2729e8b9 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_dx9_media_sharing.h @@ -0,0 +1,132 @@ +/********************************************************************************** + * Copyright (c) 2008-2015 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + **********************************************************************************/ + +/* $Revision: 11708 $ on $Date: 2010-06-13 23:36:24 -0700 (Sun, 13 Jun 2010) $ */ + +#ifndef __OPENCL_CL_DX9_MEDIA_SHARING_H +#define __OPENCL_CL_DX9_MEDIA_SHARING_H + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/******************************************************************************/ +/* cl_khr_dx9_media_sharing */ +#define cl_khr_dx9_media_sharing 1 + +typedef cl_uint cl_dx9_media_adapter_type_khr; +typedef cl_uint cl_dx9_media_adapter_set_khr; + +#if defined(_WIN32) +#include +typedef struct _cl_dx9_surface_info_khr +{ + IDirect3DSurface9 *resource; + HANDLE shared_handle; +} cl_dx9_surface_info_khr; +#endif + + +/******************************************************************************/ + +/* Error Codes */ +#define CL_INVALID_DX9_MEDIA_ADAPTER_KHR -1010 +#define CL_INVALID_DX9_MEDIA_SURFACE_KHR -1011 +#define CL_DX9_MEDIA_SURFACE_ALREADY_ACQUIRED_KHR -1012 +#define CL_DX9_MEDIA_SURFACE_NOT_ACQUIRED_KHR -1013 + +/* cl_media_adapter_type_khr */ +#define CL_ADAPTER_D3D9_KHR 0x2020 +#define CL_ADAPTER_D3D9EX_KHR 0x2021 +#define CL_ADAPTER_DXVA_KHR 0x2022 + +/* cl_media_adapter_set_khr */ +#define CL_PREFERRED_DEVICES_FOR_DX9_MEDIA_ADAPTER_KHR 0x2023 +#define CL_ALL_DEVICES_FOR_DX9_MEDIA_ADAPTER_KHR 0x2024 + +/* cl_context_info */ +#define CL_CONTEXT_ADAPTER_D3D9_KHR 0x2025 +#define CL_CONTEXT_ADAPTER_D3D9EX_KHR 0x2026 +#define CL_CONTEXT_ADAPTER_DXVA_KHR 0x2027 + +/* cl_mem_info */ +#define CL_MEM_DX9_MEDIA_ADAPTER_TYPE_KHR 0x2028 +#define CL_MEM_DX9_MEDIA_SURFACE_INFO_KHR 0x2029 + +/* cl_image_info */ +#define CL_IMAGE_DX9_MEDIA_PLANE_KHR 0x202A + +/* cl_command_type */ +#define CL_COMMAND_ACQUIRE_DX9_MEDIA_SURFACES_KHR 0x202B +#define CL_COMMAND_RELEASE_DX9_MEDIA_SURFACES_KHR 0x202C + +/******************************************************************************/ + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetDeviceIDsFromDX9MediaAdapterKHR_fn)( + cl_platform_id platform, + cl_uint num_media_adapters, + cl_dx9_media_adapter_type_khr * media_adapter_type, + void * media_adapters, + cl_dx9_media_adapter_set_khr media_adapter_set, + cl_uint num_entries, + cl_device_id * devices, + cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromDX9MediaSurfaceKHR_fn)( + cl_context context, + cl_mem_flags flags, + cl_dx9_media_adapter_type_khr adapter_type, + void * surface_info, + cl_uint plane, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireDX9MediaSurfacesKHR_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseDX9MediaSurfacesKHR_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_2; + +#ifdef __cplusplus +} +#endif + +#endif /* __OPENCL_CL_DX9_MEDIA_SHARING_H */ + diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_dx9_media_sharing_intel.h b/benchmarks/new_opencl/runtime/include/CL/cl_dx9_media_sharing_intel.h new file mode 100644 index 00000000..737e6856 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_dx9_media_sharing_intel.h @@ -0,0 +1,182 @@ +/********************************************************************************** + * Copyright (c) 2008-2019 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + **********************************************************************************/ +/*****************************************************************************\ + +Copyright (c) 2013-2019 Intel Corporation All Rights Reserved. + +THESE MATERIALS ARE PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THESE +MATERIALS, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +File Name: cl_dx9_media_sharing_intel.h + +Abstract: + +Notes: + +\*****************************************************************************/ + +#ifndef __OPENCL_CL_DX9_MEDIA_SHARING_INTEL_H +#define __OPENCL_CL_DX9_MEDIA_SHARING_INTEL_H + +#include +#include +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/*************************************** +* cl_intel_dx9_media_sharing extension * +****************************************/ + +#define cl_intel_dx9_media_sharing 1 + +typedef cl_uint cl_dx9_device_source_intel; +typedef cl_uint cl_dx9_device_set_intel; + +/* error codes */ +#define CL_INVALID_DX9_DEVICE_INTEL -1010 +#define CL_INVALID_DX9_RESOURCE_INTEL -1011 +#define CL_DX9_RESOURCE_ALREADY_ACQUIRED_INTEL -1012 +#define CL_DX9_RESOURCE_NOT_ACQUIRED_INTEL -1013 + +/* cl_dx9_device_source_intel */ +#define CL_D3D9_DEVICE_INTEL 0x4022 +#define CL_D3D9EX_DEVICE_INTEL 0x4070 +#define CL_DXVA_DEVICE_INTEL 0x4071 + +/* cl_dx9_device_set_intel */ +#define CL_PREFERRED_DEVICES_FOR_DX9_INTEL 0x4024 +#define CL_ALL_DEVICES_FOR_DX9_INTEL 0x4025 + +/* cl_context_info */ +#define CL_CONTEXT_D3D9_DEVICE_INTEL 0x4026 +#define CL_CONTEXT_D3D9EX_DEVICE_INTEL 0x4072 +#define CL_CONTEXT_DXVA_DEVICE_INTEL 0x4073 + +/* cl_mem_info */ +#define CL_MEM_DX9_RESOURCE_INTEL 0x4027 +#define CL_MEM_DX9_SHARED_HANDLE_INTEL 0x4074 + +/* cl_image_info */ +#define CL_IMAGE_DX9_PLANE_INTEL 0x4075 + +/* cl_command_type */ +#define CL_COMMAND_ACQUIRE_DX9_OBJECTS_INTEL 0x402A +#define CL_COMMAND_RELEASE_DX9_OBJECTS_INTEL 0x402B +/******************************************************************************/ + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetDeviceIDsFromDX9INTEL( + cl_platform_id platform, + cl_dx9_device_source_intel dx9_device_source, + void* dx9_object, + cl_dx9_device_set_intel dx9_device_set, + cl_uint num_entries, + cl_device_id* devices, + cl_uint* num_devices) CL_EXT_SUFFIX__VERSION_1_1; + +typedef CL_API_ENTRY cl_int (CL_API_CALL* clGetDeviceIDsFromDX9INTEL_fn)( + cl_platform_id platform, + cl_dx9_device_source_intel dx9_device_source, + void* dx9_object, + cl_dx9_device_set_intel dx9_device_set, + cl_uint num_entries, + cl_device_id* devices, + cl_uint* num_devices) CL_EXT_SUFFIX__VERSION_1_1; + +extern CL_API_ENTRY cl_mem CL_API_CALL +clCreateFromDX9MediaSurfaceINTEL( + cl_context context, + cl_mem_flags flags, + IDirect3DSurface9* resource, + HANDLE sharedHandle, + UINT plane, + cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_1; + +typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromDX9MediaSurfaceINTEL_fn)( + cl_context context, + cl_mem_flags flags, + IDirect3DSurface9* resource, + HANDLE sharedHandle, + UINT plane, + cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_1; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueAcquireDX9ObjectsINTEL( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem* mem_objects, + cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, + cl_event* event) CL_EXT_SUFFIX__VERSION_1_1; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireDX9ObjectsINTEL_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem* mem_objects, + cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, + cl_event* event) CL_EXT_SUFFIX__VERSION_1_1; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueReleaseDX9ObjectsINTEL( + cl_command_queue command_queue, + cl_uint num_objects, + cl_mem* mem_objects, + cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, + cl_event* event) CL_EXT_SUFFIX__VERSION_1_1; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseDX9ObjectsINTEL_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + cl_mem* mem_objects, + cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, + cl_event* event) CL_EXT_SUFFIX__VERSION_1_1; + +#ifdef __cplusplus +} +#endif + +#endif /* __OPENCL_CL_DX9_MEDIA_SHARING_INTEL_H */ + diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_egl.h b/benchmarks/new_opencl/runtime/include/CL/cl_egl.h new file mode 100644 index 00000000..bc4d998e --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_egl.h @@ -0,0 +1,132 @@ +/******************************************************************************* + * Copyright (c) 2008-2019 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + ******************************************************************************/ + +#ifndef __OPENCL_CL_EGL_H +#define __OPENCL_CL_EGL_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + + +/* Command type for events created with clEnqueueAcquireEGLObjectsKHR */ +#define CL_COMMAND_EGL_FENCE_SYNC_OBJECT_KHR 0x202F +#define CL_COMMAND_ACQUIRE_EGL_OBJECTS_KHR 0x202D +#define CL_COMMAND_RELEASE_EGL_OBJECTS_KHR 0x202E + +/* Error type for clCreateFromEGLImageKHR */ +#define CL_INVALID_EGL_OBJECT_KHR -1093 +#define CL_EGL_RESOURCE_NOT_ACQUIRED_KHR -1092 + +/* CLeglImageKHR is an opaque handle to an EGLImage */ +typedef void* CLeglImageKHR; + +/* CLeglDisplayKHR is an opaque handle to an EGLDisplay */ +typedef void* CLeglDisplayKHR; + +/* CLeglSyncKHR is an opaque handle to an EGLSync object */ +typedef void* CLeglSyncKHR; + +/* properties passed to clCreateFromEGLImageKHR */ +typedef intptr_t cl_egl_image_properties_khr; + + +#define cl_khr_egl_image 1 + +extern CL_API_ENTRY cl_mem CL_API_CALL +clCreateFromEGLImageKHR(cl_context context, + CLeglDisplayKHR egldisplay, + CLeglImageKHR eglimage, + cl_mem_flags flags, + const cl_egl_image_properties_khr * properties, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromEGLImageKHR_fn)( + cl_context context, + CLeglDisplayKHR egldisplay, + CLeglImageKHR eglimage, + cl_mem_flags flags, + const cl_egl_image_properties_khr * properties, + cl_int * errcode_ret); + + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueAcquireEGLObjectsKHR(cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireEGLObjectsKHR_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event); + + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueReleaseEGLObjectsKHR(cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseEGLObjectsKHR_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event); + + +#define cl_khr_egl_event 1 + +extern CL_API_ENTRY cl_event CL_API_CALL +clCreateEventFromEGLSyncKHR(cl_context context, + CLeglSyncKHR sync, + CLeglDisplayKHR display, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +typedef CL_API_ENTRY cl_event (CL_API_CALL *clCreateEventFromEGLSyncKHR_fn)( + cl_context context, + CLeglSyncKHR sync, + CLeglDisplayKHR display, + cl_int * errcode_ret); + +#ifdef __cplusplus +} +#endif + +#endif /* __OPENCL_CL_EGL_H */ diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_ext.h b/benchmarks/new_opencl/runtime/include/CL/cl_ext.h new file mode 100644 index 00000000..5c185915 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_ext.h @@ -0,0 +1,762 @@ +/******************************************************************************* + * Copyright (c) 2008-2019 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + ******************************************************************************/ + +/* cl_ext.h contains OpenCL extensions which don't have external */ +/* (OpenGL, D3D) dependencies. */ + +#ifndef __CL_EXT_H +#define __CL_EXT_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/* cl_khr_fp64 extension - no extension #define since it has no functions */ +/* CL_DEVICE_DOUBLE_FP_CONFIG is defined in CL.h for OpenCL >= 120 */ + +#if CL_TARGET_OPENCL_VERSION <= 110 +#define CL_DEVICE_DOUBLE_FP_CONFIG 0x1032 +#endif + +/* cl_khr_fp16 extension - no extension #define since it has no functions */ +#define CL_DEVICE_HALF_FP_CONFIG 0x1033 + +/* Memory object destruction + * + * Apple extension for use to manage externally allocated buffers used with cl_mem objects with CL_MEM_USE_HOST_PTR + * + * Registers a user callback function that will be called when the memory object is deleted and its resources + * freed. Each call to clSetMemObjectCallbackFn registers the specified user callback function on a callback + * stack associated with memobj. The registered user callback functions are called in the reverse order in + * which they were registered. The user callback functions are called and then the memory object is deleted + * and its resources freed. This provides a mechanism for the application (and libraries) using memobj to be + * notified when the memory referenced by host_ptr, specified when the memory object is created and used as + * the storage bits for the memory object, can be reused or freed. + * + * The application may not call CL api's with the cl_mem object passed to the pfn_notify. + * + * Please check for the "cl_APPLE_SetMemObjectDestructor" extension using clGetDeviceInfo(CL_DEVICE_EXTENSIONS) + * before using. + */ +#define cl_APPLE_SetMemObjectDestructor 1 +cl_int CL_API_ENTRY clSetMemObjectDestructorAPPLE( cl_mem memobj, + void (* pfn_notify)(cl_mem memobj, void * user_data), + void * user_data) CL_EXT_SUFFIX__VERSION_1_0; + + +/* Context Logging Functions + * + * The next three convenience functions are intended to be used as the pfn_notify parameter to clCreateContext(). + * Please check for the "cl_APPLE_ContextLoggingFunctions" extension using clGetDeviceInfo(CL_DEVICE_EXTENSIONS) + * before using. + * + * clLogMessagesToSystemLog forwards on all log messages to the Apple System Logger + */ +#define cl_APPLE_ContextLoggingFunctions 1 +extern void CL_API_ENTRY clLogMessagesToSystemLogAPPLE( const char * errstr, + const void * private_info, + size_t cb, + void * user_data) CL_EXT_SUFFIX__VERSION_1_0; + +/* clLogMessagesToStdout sends all log messages to the file descriptor stdout */ +extern void CL_API_ENTRY clLogMessagesToStdoutAPPLE( const char * errstr, + const void * private_info, + size_t cb, + void * user_data) CL_EXT_SUFFIX__VERSION_1_0; + +/* clLogMessagesToStderr sends all log messages to the file descriptor stderr */ +extern void CL_API_ENTRY clLogMessagesToStderrAPPLE( const char * errstr, + const void * private_info, + size_t cb, + void * user_data) CL_EXT_SUFFIX__VERSION_1_0; + + +/************************ +* cl_khr_icd extension * +************************/ +#define cl_khr_icd 1 + +/* cl_platform_info */ +#define CL_PLATFORM_ICD_SUFFIX_KHR 0x0920 + +/* Additional Error Codes */ +#define CL_PLATFORM_NOT_FOUND_KHR -1001 + +extern CL_API_ENTRY cl_int CL_API_CALL +clIcdGetPlatformIDsKHR(cl_uint num_entries, + cl_platform_id * platforms, + cl_uint * num_platforms); + +typedef CL_API_ENTRY cl_int +(CL_API_CALL *clIcdGetPlatformIDsKHR_fn)(cl_uint num_entries, + cl_platform_id * platforms, + cl_uint * num_platforms); + + +/******************************* + * cl_khr_il_program extension * + *******************************/ +#define cl_khr_il_program 1 + +/* New property to clGetDeviceInfo for retrieving supported intermediate + * languages + */ +#define CL_DEVICE_IL_VERSION_KHR 0x105B + +/* New property to clGetProgramInfo for retrieving for retrieving the IL of a + * program + */ +#define CL_PROGRAM_IL_KHR 0x1169 + +extern CL_API_ENTRY cl_program CL_API_CALL +clCreateProgramWithILKHR(cl_context context, + const void * il, + size_t length, + cl_int * errcode_ret); + +typedef CL_API_ENTRY cl_program +(CL_API_CALL *clCreateProgramWithILKHR_fn)(cl_context context, + const void * il, + size_t length, + cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_2; + +/* Extension: cl_khr_image2d_from_buffer + * + * This extension allows a 2D image to be created from a cl_mem buffer without + * a copy. The type associated with a 2D image created from a buffer in an + * OpenCL program is image2d_t. Both the sampler and sampler-less read_image + * built-in functions are supported for 2D images and 2D images created from + * a buffer. Similarly, the write_image built-ins are also supported for 2D + * images created from a buffer. + * + * When the 2D image from buffer is created, the client must specify the + * width, height, image format (i.e. channel order and channel data type) + * and optionally the row pitch. + * + * The pitch specified must be a multiple of + * CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR pixels. + * The base address of the buffer must be aligned to + * CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR pixels. + */ + +#define CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR 0x104A +#define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR 0x104B + + +/************************************** + * cl_khr_initialize_memory extension * + **************************************/ + +#define CL_CONTEXT_MEMORY_INITIALIZE_KHR 0x2030 + + +/************************************** + * cl_khr_terminate_context extension * + **************************************/ + +#define CL_DEVICE_TERMINATE_CAPABILITY_KHR 0x2031 +#define CL_CONTEXT_TERMINATE_KHR 0x2032 + +#define cl_khr_terminate_context 1 +extern CL_API_ENTRY cl_int CL_API_CALL +clTerminateContextKHR(cl_context context) CL_EXT_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int +(CL_API_CALL *clTerminateContextKHR_fn)(cl_context context) CL_EXT_SUFFIX__VERSION_1_2; + + +/* + * Extension: cl_khr_spir + * + * This extension adds support to create an OpenCL program object from a + * Standard Portable Intermediate Representation (SPIR) instance + */ + +#define CL_DEVICE_SPIR_VERSIONS 0x40E0 +#define CL_PROGRAM_BINARY_TYPE_INTERMEDIATE 0x40E1 + + +/***************************************** + * cl_khr_create_command_queue extension * + *****************************************/ +#define cl_khr_create_command_queue 1 + +typedef cl_bitfield cl_queue_properties_khr; + +extern CL_API_ENTRY cl_command_queue CL_API_CALL +clCreateCommandQueueWithPropertiesKHR(cl_context context, + cl_device_id device, + const cl_queue_properties_khr* properties, + cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_command_queue +(CL_API_CALL *clCreateCommandQueueWithPropertiesKHR_fn)(cl_context context, + cl_device_id device, + const cl_queue_properties_khr* properties, + cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2; + + +/****************************************** +* cl_nv_device_attribute_query extension * +******************************************/ + +/* cl_nv_device_attribute_query extension - no extension #define since it has no functions */ +#define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 0x4000 +#define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 0x4001 +#define CL_DEVICE_REGISTERS_PER_BLOCK_NV 0x4002 +#define CL_DEVICE_WARP_SIZE_NV 0x4003 +#define CL_DEVICE_GPU_OVERLAP_NV 0x4004 +#define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005 +#define CL_DEVICE_INTEGRATED_MEMORY_NV 0x4006 + + +/********************************* +* cl_amd_device_attribute_query * +*********************************/ + +#define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD 0x4036 + + +/********************************* +* cl_arm_printf extension +*********************************/ + +#define CL_PRINTF_CALLBACK_ARM 0x40B0 +#define CL_PRINTF_BUFFERSIZE_ARM 0x40B1 + + +/*********************************** +* cl_ext_device_fission extension +***********************************/ +#define cl_ext_device_fission 1 + +extern CL_API_ENTRY cl_int CL_API_CALL +clReleaseDeviceEXT(cl_device_id device) CL_EXT_SUFFIX__VERSION_1_1; + +typedef CL_API_ENTRY cl_int +(CL_API_CALL *clReleaseDeviceEXT_fn)(cl_device_id device) CL_EXT_SUFFIX__VERSION_1_1; + +extern CL_API_ENTRY cl_int CL_API_CALL +clRetainDeviceEXT(cl_device_id device) CL_EXT_SUFFIX__VERSION_1_1; + +typedef CL_API_ENTRY cl_int +(CL_API_CALL *clRetainDeviceEXT_fn)(cl_device_id device) CL_EXT_SUFFIX__VERSION_1_1; + +typedef cl_ulong cl_device_partition_property_ext; +extern CL_API_ENTRY cl_int CL_API_CALL +clCreateSubDevicesEXT(cl_device_id in_device, + const cl_device_partition_property_ext * properties, + cl_uint num_entries, + cl_device_id * out_devices, + cl_uint * num_devices) CL_EXT_SUFFIX__VERSION_1_1; + +typedef CL_API_ENTRY cl_int +(CL_API_CALL * clCreateSubDevicesEXT_fn)(cl_device_id in_device, + const cl_device_partition_property_ext * properties, + cl_uint num_entries, + cl_device_id * out_devices, + cl_uint * num_devices) CL_EXT_SUFFIX__VERSION_1_1; + +/* cl_device_partition_property_ext */ +#define CL_DEVICE_PARTITION_EQUALLY_EXT 0x4050 +#define CL_DEVICE_PARTITION_BY_COUNTS_EXT 0x4051 +#define CL_DEVICE_PARTITION_BY_NAMES_EXT 0x4052 +#define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN_EXT 0x4053 + +/* clDeviceGetInfo selectors */ +#define CL_DEVICE_PARENT_DEVICE_EXT 0x4054 +#define CL_DEVICE_PARTITION_TYPES_EXT 0x4055 +#define CL_DEVICE_AFFINITY_DOMAINS_EXT 0x4056 +#define CL_DEVICE_REFERENCE_COUNT_EXT 0x4057 +#define CL_DEVICE_PARTITION_STYLE_EXT 0x4058 + +/* error codes */ +#define CL_DEVICE_PARTITION_FAILED_EXT -1057 +#define CL_INVALID_PARTITION_COUNT_EXT -1058 +#define CL_INVALID_PARTITION_NAME_EXT -1059 + +/* CL_AFFINITY_DOMAINs */ +#define CL_AFFINITY_DOMAIN_L1_CACHE_EXT 0x1 +#define CL_AFFINITY_DOMAIN_L2_CACHE_EXT 0x2 +#define CL_AFFINITY_DOMAIN_L3_CACHE_EXT 0x3 +#define CL_AFFINITY_DOMAIN_L4_CACHE_EXT 0x4 +#define CL_AFFINITY_DOMAIN_NUMA_EXT 0x10 +#define CL_AFFINITY_DOMAIN_NEXT_FISSIONABLE_EXT 0x100 + +/* cl_device_partition_property_ext list terminators */ +#define CL_PROPERTIES_LIST_END_EXT ((cl_device_partition_property_ext) 0) +#define CL_PARTITION_BY_COUNTS_LIST_END_EXT ((cl_device_partition_property_ext) 0) +#define CL_PARTITION_BY_NAMES_LIST_END_EXT ((cl_device_partition_property_ext) 0 - 1) + + +/*********************************** + * cl_ext_migrate_memobject extension definitions + ***********************************/ +#define cl_ext_migrate_memobject 1 + +typedef cl_bitfield cl_mem_migration_flags_ext; + +#define CL_MIGRATE_MEM_OBJECT_HOST_EXT 0x1 + +#define CL_COMMAND_MIGRATE_MEM_OBJECT_EXT 0x4040 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueMigrateMemObjectEXT(cl_command_queue command_queue, + cl_uint num_mem_objects, + const cl_mem * mem_objects, + cl_mem_migration_flags_ext flags, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event); + +typedef CL_API_ENTRY cl_int +(CL_API_CALL *clEnqueueMigrateMemObjectEXT_fn)(cl_command_queue command_queue, + cl_uint num_mem_objects, + const cl_mem * mem_objects, + cl_mem_migration_flags_ext flags, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event); + + +/********************************* +* cl_qcom_ext_host_ptr extension +*********************************/ +#define cl_qcom_ext_host_ptr 1 + +#define CL_MEM_EXT_HOST_PTR_QCOM (1 << 29) + +#define CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM 0x40A0 +#define CL_DEVICE_PAGE_SIZE_QCOM 0x40A1 +#define CL_IMAGE_ROW_ALIGNMENT_QCOM 0x40A2 +#define CL_IMAGE_SLICE_ALIGNMENT_QCOM 0x40A3 +#define CL_MEM_HOST_UNCACHED_QCOM 0x40A4 +#define CL_MEM_HOST_WRITEBACK_QCOM 0x40A5 +#define CL_MEM_HOST_WRITETHROUGH_QCOM 0x40A6 +#define CL_MEM_HOST_WRITE_COMBINING_QCOM 0x40A7 + +typedef cl_uint cl_image_pitch_info_qcom; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetDeviceImageInfoQCOM(cl_device_id device, + size_t image_width, + size_t image_height, + const cl_image_format *image_format, + cl_image_pitch_info_qcom param_name, + size_t param_value_size, + void *param_value, + size_t *param_value_size_ret); + +typedef struct _cl_mem_ext_host_ptr +{ + /* Type of external memory allocation. */ + /* Legal values will be defined in layered extensions. */ + cl_uint allocation_type; + + /* Host cache policy for this external memory allocation. */ + cl_uint host_cache_policy; + +} cl_mem_ext_host_ptr; + + +/******************************************* +* cl_qcom_ext_host_ptr_iocoherent extension +********************************************/ + +/* Cache policy specifying io-coherence */ +#define CL_MEM_HOST_IOCOHERENT_QCOM 0x40A9 + + +/********************************* +* cl_qcom_ion_host_ptr extension +*********************************/ + +#define CL_MEM_ION_HOST_PTR_QCOM 0x40A8 + +typedef struct _cl_mem_ion_host_ptr +{ + /* Type of external memory allocation. */ + /* Must be CL_MEM_ION_HOST_PTR_QCOM for ION allocations. */ + cl_mem_ext_host_ptr ext_host_ptr; + + /* ION file descriptor */ + int ion_filedesc; + + /* Host pointer to the ION allocated memory */ + void* ion_hostptr; + +} cl_mem_ion_host_ptr; + + +/********************************* +* cl_qcom_android_native_buffer_host_ptr extension +*********************************/ + +#define CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM 0x40C6 + +typedef struct _cl_mem_android_native_buffer_host_ptr +{ + /* Type of external memory allocation. */ + /* Must be CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM for Android native buffers. */ + cl_mem_ext_host_ptr ext_host_ptr; + + /* Virtual pointer to the android native buffer */ + void* anb_ptr; + +} cl_mem_android_native_buffer_host_ptr; + + +/****************************************** + * cl_img_yuv_image extension * + ******************************************/ + +/* Image formats used in clCreateImage */ +#define CL_NV21_IMG 0x40D0 +#define CL_YV12_IMG 0x40D1 + + +/****************************************** + * cl_img_cached_allocations extension * + ******************************************/ + +/* Flag values used by clCreateBuffer */ +#define CL_MEM_USE_UNCACHED_CPU_MEMORY_IMG (1 << 26) +#define CL_MEM_USE_CACHED_CPU_MEMORY_IMG (1 << 27) + + +/****************************************** + * cl_img_use_gralloc_ptr extension * + ******************************************/ +#define cl_img_use_gralloc_ptr 1 + +/* Flag values used by clCreateBuffer */ +#define CL_MEM_USE_GRALLOC_PTR_IMG (1 << 28) + +/* To be used by clGetEventInfo: */ +#define CL_COMMAND_ACQUIRE_GRALLOC_OBJECTS_IMG 0x40D2 +#define CL_COMMAND_RELEASE_GRALLOC_OBJECTS_IMG 0x40D3 + +/* Error code from clEnqueueReleaseGrallocObjectsIMG */ +#define CL_GRALLOC_RESOURCE_NOT_ACQUIRED_IMG 0x40D4 + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueAcquireGrallocObjectsIMG(cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueReleaseGrallocObjectsIMG(cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_EXT_SUFFIX__VERSION_1_2; + + +/********************************* +* cl_khr_subgroups extension +*********************************/ +#define cl_khr_subgroups 1 + +#if !defined(CL_VERSION_2_1) +/* For OpenCL 2.1 and newer, cl_kernel_sub_group_info is declared in CL.h. + In hindsight, there should have been a khr suffix on this type for + the extension, but keeping it un-suffixed to maintain backwards + compatibility. */ +typedef cl_uint cl_kernel_sub_group_info; +#endif + +/* cl_kernel_sub_group_info */ +#define CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE_KHR 0x2033 +#define CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE_KHR 0x2034 + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetKernelSubGroupInfoKHR(cl_kernel in_kernel, + cl_device_id in_device, + cl_kernel_sub_group_info param_name, + size_t input_value_size, + const void * input_value, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_EXT_SUFFIX__VERSION_2_0_DEPRECATED; + +typedef CL_API_ENTRY cl_int +(CL_API_CALL * clGetKernelSubGroupInfoKHR_fn)(cl_kernel in_kernel, + cl_device_id in_device, + cl_kernel_sub_group_info param_name, + size_t input_value_size, + const void * input_value, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_EXT_SUFFIX__VERSION_2_0_DEPRECATED; + + +/********************************* +* cl_khr_mipmap_image extension +*********************************/ + +/* cl_sampler_properties */ +#define CL_SAMPLER_MIP_FILTER_MODE_KHR 0x1155 +#define CL_SAMPLER_LOD_MIN_KHR 0x1156 +#define CL_SAMPLER_LOD_MAX_KHR 0x1157 + + +/********************************* +* cl_khr_priority_hints extension +*********************************/ +/* This extension define is for backwards compatibility. + It shouldn't be required since this extension has no new functions. */ +#define cl_khr_priority_hints 1 + +typedef cl_uint cl_queue_priority_khr; + +/* cl_command_queue_properties */ +#define CL_QUEUE_PRIORITY_KHR 0x1096 + +/* cl_queue_priority_khr */ +#define CL_QUEUE_PRIORITY_HIGH_KHR (1<<0) +#define CL_QUEUE_PRIORITY_MED_KHR (1<<1) +#define CL_QUEUE_PRIORITY_LOW_KHR (1<<2) + + +/********************************* +* cl_khr_throttle_hints extension +*********************************/ +/* This extension define is for backwards compatibility. + It shouldn't be required since this extension has no new functions. */ +#define cl_khr_throttle_hints 1 + +typedef cl_uint cl_queue_throttle_khr; + +/* cl_command_queue_properties */ +#define CL_QUEUE_THROTTLE_KHR 0x1097 + +/* cl_queue_throttle_khr */ +#define CL_QUEUE_THROTTLE_HIGH_KHR (1<<0) +#define CL_QUEUE_THROTTLE_MED_KHR (1<<1) +#define CL_QUEUE_THROTTLE_LOW_KHR (1<<2) + + +/********************************* +* cl_khr_subgroup_named_barrier +*********************************/ +/* This extension define is for backwards compatibility. + It shouldn't be required since this extension has no new functions. */ +#define cl_khr_subgroup_named_barrier 1 + +/* cl_device_info */ +#define CL_DEVICE_MAX_NAMED_BARRIER_COUNT_KHR 0x2035 + + +/********************************** + * cl_arm_import_memory extension * + **********************************/ +#define cl_arm_import_memory 1 + +typedef intptr_t cl_import_properties_arm; + +/* Default and valid proporties name for cl_arm_import_memory */ +#define CL_IMPORT_TYPE_ARM 0x40B2 + +/* Host process memory type default value for CL_IMPORT_TYPE_ARM property */ +#define CL_IMPORT_TYPE_HOST_ARM 0x40B3 + +/* DMA BUF memory type value for CL_IMPORT_TYPE_ARM property */ +#define CL_IMPORT_TYPE_DMA_BUF_ARM 0x40B4 + +/* Protected DMA BUF memory type value for CL_IMPORT_TYPE_ARM property */ +#define CL_IMPORT_TYPE_PROTECTED_ARM 0x40B5 + +/* This extension adds a new function that allows for direct memory import into + * OpenCL via the clImportMemoryARM function. + * + * Memory imported through this interface will be mapped into the device's page + * tables directly, providing zero copy access. It will never fall back to copy + * operations and aliased buffers. + * + * Types of memory supported for import are specified as additional extension + * strings. + * + * This extension produces cl_mem allocations which are compatible with all other + * users of cl_mem in the standard API. + * + * This extension maps pages with the same properties as the normal buffer creation + * function clCreateBuffer. + */ +extern CL_API_ENTRY cl_mem CL_API_CALL +clImportMemoryARM( cl_context context, + cl_mem_flags flags, + const cl_import_properties_arm *properties, + void *memory, + size_t size, + cl_int *errcode_ret) CL_EXT_SUFFIX__VERSION_1_0; + + +/****************************************** + * cl_arm_shared_virtual_memory extension * + ******************************************/ +#define cl_arm_shared_virtual_memory 1 + +/* Used by clGetDeviceInfo */ +#define CL_DEVICE_SVM_CAPABILITIES_ARM 0x40B6 + +/* Used by clGetMemObjectInfo */ +#define CL_MEM_USES_SVM_POINTER_ARM 0x40B7 + +/* Used by clSetKernelExecInfoARM: */ +#define CL_KERNEL_EXEC_INFO_SVM_PTRS_ARM 0x40B8 +#define CL_KERNEL_EXEC_INFO_SVM_FINE_GRAIN_SYSTEM_ARM 0x40B9 + +/* To be used by clGetEventInfo: */ +#define CL_COMMAND_SVM_FREE_ARM 0x40BA +#define CL_COMMAND_SVM_MEMCPY_ARM 0x40BB +#define CL_COMMAND_SVM_MEMFILL_ARM 0x40BC +#define CL_COMMAND_SVM_MAP_ARM 0x40BD +#define CL_COMMAND_SVM_UNMAP_ARM 0x40BE + +/* Flag values returned by clGetDeviceInfo with CL_DEVICE_SVM_CAPABILITIES_ARM as the param_name. */ +#define CL_DEVICE_SVM_COARSE_GRAIN_BUFFER_ARM (1 << 0) +#define CL_DEVICE_SVM_FINE_GRAIN_BUFFER_ARM (1 << 1) +#define CL_DEVICE_SVM_FINE_GRAIN_SYSTEM_ARM (1 << 2) +#define CL_DEVICE_SVM_ATOMICS_ARM (1 << 3) + +/* Flag values used by clSVMAllocARM: */ +#define CL_MEM_SVM_FINE_GRAIN_BUFFER_ARM (1 << 10) +#define CL_MEM_SVM_ATOMICS_ARM (1 << 11) + +typedef cl_bitfield cl_svm_mem_flags_arm; +typedef cl_uint cl_kernel_exec_info_arm; +typedef cl_bitfield cl_device_svm_capabilities_arm; + +extern CL_API_ENTRY void * CL_API_CALL +clSVMAllocARM(cl_context context, + cl_svm_mem_flags_arm flags, + size_t size, + cl_uint alignment) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY void CL_API_CALL +clSVMFreeARM(cl_context context, + void * svm_pointer) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMFreeARM(cl_command_queue command_queue, + cl_uint num_svm_pointers, + void * svm_pointers[], + void (CL_CALLBACK * pfn_free_func)(cl_command_queue queue, + cl_uint num_svm_pointers, + void * svm_pointers[], + void * user_data), + void * user_data, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMMemcpyARM(cl_command_queue command_queue, + cl_bool blocking_copy, + void * dst_ptr, + const void * src_ptr, + size_t size, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMMemFillARM(cl_command_queue command_queue, + void * svm_ptr, + const void * pattern, + size_t pattern_size, + size_t size, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMMapARM(cl_command_queue command_queue, + cl_bool blocking_map, + cl_map_flags flags, + void * svm_ptr, + size_t size, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueSVMUnmapARM(cl_command_queue command_queue, + void * svm_ptr, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetKernelArgSVMPointerARM(cl_kernel kernel, + cl_uint arg_index, + const void * arg_value) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clSetKernelExecInfoARM(cl_kernel kernel, + cl_kernel_exec_info_arm param_name, + size_t param_value_size, + const void * param_value) CL_EXT_SUFFIX__VERSION_1_2; + +/******************************** + * cl_arm_get_core_id extension * + ********************************/ + +#ifdef CL_VERSION_1_2 + +#define cl_arm_get_core_id 1 + +/* Device info property for bitfield of cores present */ +#define CL_DEVICE_COMPUTE_UNITS_BITFIELD_ARM 0x40BF + +#endif /* CL_VERSION_1_2 */ + +/********************************* +* cl_arm_job_slot_selection +*********************************/ + +#define cl_arm_job_slot_selection 1 + +/* cl_device_info */ +#define CL_DEVICE_JOB_SLOTS_ARM 0x41E0 + +/* cl_command_queue_properties */ +#define CL_QUEUE_JOB_SLOT_ARM 0x41E1 + +#ifdef __cplusplus +} +#endif + + +#endif /* __CL_EXT_H */ diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_ext_intel.h b/benchmarks/new_opencl/runtime/include/CL/cl_ext_intel.h new file mode 100644 index 00000000..9d1e4b58 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_ext_intel.h @@ -0,0 +1,423 @@ +/******************************************************************************* + * Copyright (c) 2008-2019 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + ******************************************************************************/ +/*****************************************************************************\ + +Copyright (c) 2013-2019 Intel Corporation All Rights Reserved. + +THESE MATERIALS ARE PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THESE +MATERIALS, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +File Name: cl_ext_intel.h + +Abstract: + +Notes: + +\*****************************************************************************/ + +#ifndef __CL_EXT_INTEL_H +#define __CL_EXT_INTEL_H + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/*************************************** +* cl_intel_thread_local_exec extension * +****************************************/ + +#define cl_intel_thread_local_exec 1 + +#define CL_QUEUE_THREAD_LOCAL_EXEC_ENABLE_INTEL (((cl_bitfield)1) << 31) + +/*********************************************** +* cl_intel_device_partition_by_names extension * +************************************************/ + +#define cl_intel_device_partition_by_names 1 + +#define CL_DEVICE_PARTITION_BY_NAMES_INTEL 0x4052 +#define CL_PARTITION_BY_NAMES_LIST_END_INTEL -1 + +/************************************************ +* cl_intel_accelerator extension * +* cl_intel_motion_estimation extension * +* cl_intel_advanced_motion_estimation extension * +*************************************************/ + +#define cl_intel_accelerator 1 +#define cl_intel_motion_estimation 1 +#define cl_intel_advanced_motion_estimation 1 + +typedef struct _cl_accelerator_intel* cl_accelerator_intel; +typedef cl_uint cl_accelerator_type_intel; +typedef cl_uint cl_accelerator_info_intel; + +typedef struct _cl_motion_estimation_desc_intel { + cl_uint mb_block_type; + cl_uint subpixel_mode; + cl_uint sad_adjust_mode; + cl_uint search_path_type; +} cl_motion_estimation_desc_intel; + +/* error codes */ +#define CL_INVALID_ACCELERATOR_INTEL -1094 +#define CL_INVALID_ACCELERATOR_TYPE_INTEL -1095 +#define CL_INVALID_ACCELERATOR_DESCRIPTOR_INTEL -1096 +#define CL_ACCELERATOR_TYPE_NOT_SUPPORTED_INTEL -1097 + +/* cl_accelerator_type_intel */ +#define CL_ACCELERATOR_TYPE_MOTION_ESTIMATION_INTEL 0x0 + +/* cl_accelerator_info_intel */ +#define CL_ACCELERATOR_DESCRIPTOR_INTEL 0x4090 +#define CL_ACCELERATOR_REFERENCE_COUNT_INTEL 0x4091 +#define CL_ACCELERATOR_CONTEXT_INTEL 0x4092 +#define CL_ACCELERATOR_TYPE_INTEL 0x4093 + +/* cl_motion_detect_desc_intel flags */ +#define CL_ME_MB_TYPE_16x16_INTEL 0x0 +#define CL_ME_MB_TYPE_8x8_INTEL 0x1 +#define CL_ME_MB_TYPE_4x4_INTEL 0x2 + +#define CL_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0 +#define CL_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1 +#define CL_ME_SUBPIXEL_MODE_QPEL_INTEL 0x2 + +#define CL_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0 +#define CL_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x1 + +#define CL_ME_SEARCH_PATH_RADIUS_2_2_INTEL 0x0 +#define CL_ME_SEARCH_PATH_RADIUS_4_4_INTEL 0x1 +#define CL_ME_SEARCH_PATH_RADIUS_16_12_INTEL 0x5 + +#define CL_ME_SKIP_BLOCK_TYPE_16x16_INTEL 0x0 +#define CL_ME_CHROMA_INTRA_PREDICT_ENABLED_INTEL 0x1 +#define CL_ME_LUMA_INTRA_PREDICT_ENABLED_INTEL 0x2 +#define CL_ME_SKIP_BLOCK_TYPE_8x8_INTEL 0x4 + +#define CL_ME_FORWARD_INPUT_MODE_INTEL 0x1 +#define CL_ME_BACKWARD_INPUT_MODE_INTEL 0x2 +#define CL_ME_BIDIRECTION_INPUT_MODE_INTEL 0x3 + +#define CL_ME_BIDIR_WEIGHT_QUARTER_INTEL 16 +#define CL_ME_BIDIR_WEIGHT_THIRD_INTEL 21 +#define CL_ME_BIDIR_WEIGHT_HALF_INTEL 32 +#define CL_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 43 +#define CL_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 48 + +#define CL_ME_COST_PENALTY_NONE_INTEL 0x0 +#define CL_ME_COST_PENALTY_LOW_INTEL 0x1 +#define CL_ME_COST_PENALTY_NORMAL_INTEL 0x2 +#define CL_ME_COST_PENALTY_HIGH_INTEL 0x3 + +#define CL_ME_COST_PRECISION_QPEL_INTEL 0x0 +#define CL_ME_COST_PRECISION_HPEL_INTEL 0x1 +#define CL_ME_COST_PRECISION_PEL_INTEL 0x2 +#define CL_ME_COST_PRECISION_DPEL_INTEL 0x3 + +#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0 +#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 +#define CL_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2 +#define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3 + +#define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4 +#define CL_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4 +#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5 +#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6 +#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7 +#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8 + +#define CL_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0 +#define CL_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 +#define CL_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2 +#define CL_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3 + +/* cl_device_info */ +#define CL_DEVICE_ME_VERSION_INTEL 0x407E + +#define CL_ME_VERSION_LEGACY_INTEL 0x0 +#define CL_ME_VERSION_ADVANCED_VER_1_INTEL 0x1 +#define CL_ME_VERSION_ADVANCED_VER_2_INTEL 0x2 + +extern CL_API_ENTRY cl_accelerator_intel CL_API_CALL +clCreateAcceleratorINTEL( + cl_context context, + cl_accelerator_type_intel accelerator_type, + size_t descriptor_size, + const void* descriptor, + cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_accelerator_intel (CL_API_CALL *clCreateAcceleratorINTEL_fn)( + cl_context context, + cl_accelerator_type_intel accelerator_type, + size_t descriptor_size, + const void* descriptor, + cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetAcceleratorInfoINTEL( + cl_accelerator_intel accelerator, + cl_accelerator_info_intel param_name, + size_t param_value_size, + void* param_value, + size_t* param_value_size_ret) CL_EXT_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetAcceleratorInfoINTEL_fn)( + cl_accelerator_intel accelerator, + cl_accelerator_info_intel param_name, + size_t param_value_size, + void* param_value, + size_t* param_value_size_ret) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clRetainAcceleratorINTEL( + cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clRetainAcceleratorINTEL_fn)( + cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clReleaseAcceleratorINTEL( + cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clReleaseAcceleratorINTEL_fn)( + cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2; + +/****************************************** +* cl_intel_simultaneous_sharing extension * +*******************************************/ + +#define cl_intel_simultaneous_sharing 1 + +#define CL_DEVICE_SIMULTANEOUS_INTEROPS_INTEL 0x4104 +#define CL_DEVICE_NUM_SIMULTANEOUS_INTEROPS_INTEL 0x4105 + +/*********************************** +* cl_intel_egl_image_yuv extension * +************************************/ + +#define cl_intel_egl_image_yuv 1 + +#define CL_EGL_YUV_PLANE_INTEL 0x4107 + +/******************************** +* cl_intel_packed_yuv extension * +*********************************/ + +#define cl_intel_packed_yuv 1 + +#define CL_YUYV_INTEL 0x4076 +#define CL_UYVY_INTEL 0x4077 +#define CL_YVYU_INTEL 0x4078 +#define CL_VYUY_INTEL 0x4079 + +/******************************************** +* cl_intel_required_subgroup_size extension * +*********************************************/ + +#define cl_intel_required_subgroup_size 1 + +#define CL_DEVICE_SUB_GROUP_SIZES_INTEL 0x4108 +#define CL_KERNEL_SPILL_MEM_SIZE_INTEL 0x4109 +#define CL_KERNEL_COMPILE_SUB_GROUP_SIZE_INTEL 0x410A + +/**************************************** +* cl_intel_driver_diagnostics extension * +*****************************************/ + +#define cl_intel_driver_diagnostics 1 + +typedef cl_uint cl_diagnostics_verbose_level; + +#define CL_CONTEXT_SHOW_DIAGNOSTICS_INTEL 0x4106 + +#define CL_CONTEXT_DIAGNOSTICS_LEVEL_ALL_INTEL ( 0xff ) +#define CL_CONTEXT_DIAGNOSTICS_LEVEL_GOOD_INTEL ( 1 ) +#define CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL ( 1 << 1 ) +#define CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL ( 1 << 2 ) + +/******************************** +* cl_intel_planar_yuv extension * +*********************************/ + +#define CL_NV12_INTEL 0x410E + +#define CL_MEM_NO_ACCESS_INTEL ( 1 << 24 ) +#define CL_MEM_ACCESS_FLAGS_UNRESTRICTED_INTEL ( 1 << 25 ) + +#define CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL 0x417E +#define CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL 0x417F + +/******************************************************* +* cl_intel_device_side_avc_motion_estimation extension * +********************************************************/ + +#define CL_DEVICE_AVC_ME_VERSION_INTEL 0x410B +#define CL_DEVICE_AVC_ME_SUPPORTS_TEXTURE_SAMPLER_USE_INTEL 0x410C +#define CL_DEVICE_AVC_ME_SUPPORTS_PREEMPTION_INTEL 0x410D + +#define CL_AVC_ME_VERSION_0_INTEL 0x0; // No support. +#define CL_AVC_ME_VERSION_1_INTEL 0x1; // First supported version. + +#define CL_AVC_ME_MAJOR_16x16_INTEL 0x0 +#define CL_AVC_ME_MAJOR_16x8_INTEL 0x1 +#define CL_AVC_ME_MAJOR_8x16_INTEL 0x2 +#define CL_AVC_ME_MAJOR_8x8_INTEL 0x3 + +#define CL_AVC_ME_MINOR_8x8_INTEL 0x0 +#define CL_AVC_ME_MINOR_8x4_INTEL 0x1 +#define CL_AVC_ME_MINOR_4x8_INTEL 0x2 +#define CL_AVC_ME_MINOR_4x4_INTEL 0x3 + +#define CL_AVC_ME_MAJOR_FORWARD_INTEL 0x0 +#define CL_AVC_ME_MAJOR_BACKWARD_INTEL 0x1 +#define CL_AVC_ME_MAJOR_BIDIRECTIONAL_INTEL 0x2 + +#define CL_AVC_ME_PARTITION_MASK_ALL_INTEL 0x0 +#define CL_AVC_ME_PARTITION_MASK_16x16_INTEL 0x7E +#define CL_AVC_ME_PARTITION_MASK_16x8_INTEL 0x7D +#define CL_AVC_ME_PARTITION_MASK_8x16_INTEL 0x7B +#define CL_AVC_ME_PARTITION_MASK_8x8_INTEL 0x77 +#define CL_AVC_ME_PARTITION_MASK_8x4_INTEL 0x6F +#define CL_AVC_ME_PARTITION_MASK_4x8_INTEL 0x5F +#define CL_AVC_ME_PARTITION_MASK_4x4_INTEL 0x3F + +#define CL_AVC_ME_SEARCH_WINDOW_EXHAUSTIVE_INTEL 0x0 +#define CL_AVC_ME_SEARCH_WINDOW_SMALL_INTEL 0x1 +#define CL_AVC_ME_SEARCH_WINDOW_TINY_INTEL 0x2 +#define CL_AVC_ME_SEARCH_WINDOW_EXTRA_TINY_INTEL 0x3 +#define CL_AVC_ME_SEARCH_WINDOW_DIAMOND_INTEL 0x4 +#define CL_AVC_ME_SEARCH_WINDOW_LARGE_DIAMOND_INTEL 0x5 +#define CL_AVC_ME_SEARCH_WINDOW_RESERVED0_INTEL 0x6 +#define CL_AVC_ME_SEARCH_WINDOW_RESERVED1_INTEL 0x7 +#define CL_AVC_ME_SEARCH_WINDOW_CUSTOM_INTEL 0x8 +#define CL_AVC_ME_SEARCH_WINDOW_16x12_RADIUS_INTEL 0x9 +#define CL_AVC_ME_SEARCH_WINDOW_4x4_RADIUS_INTEL 0x2 +#define CL_AVC_ME_SEARCH_WINDOW_2x2_RADIUS_INTEL 0xa + +#define CL_AVC_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0 +#define CL_AVC_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x2 + +#define CL_AVC_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0 +#define CL_AVC_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1 +#define CL_AVC_ME_SUBPIXEL_MODE_QPEL_INTEL 0x3 + +#define CL_AVC_ME_COST_PRECISION_QPEL_INTEL 0x0 +#define CL_AVC_ME_COST_PRECISION_HPEL_INTEL 0x1 +#define CL_AVC_ME_COST_PRECISION_PEL_INTEL 0x2 +#define CL_AVC_ME_COST_PRECISION_DPEL_INTEL 0x3 + +#define CL_AVC_ME_BIDIR_WEIGHT_QUARTER_INTEL 0x10 +#define CL_AVC_ME_BIDIR_WEIGHT_THIRD_INTEL 0x15 +#define CL_AVC_ME_BIDIR_WEIGHT_HALF_INTEL 0x20 +#define CL_AVC_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 0x2B +#define CL_AVC_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 0x30 + +#define CL_AVC_ME_BORDER_REACHED_LEFT_INTEL 0x0 +#define CL_AVC_ME_BORDER_REACHED_RIGHT_INTEL 0x2 +#define CL_AVC_ME_BORDER_REACHED_TOP_INTEL 0x4 +#define CL_AVC_ME_BORDER_REACHED_BOTTOM_INTEL 0x8 + +#define CL_AVC_ME_SKIP_BLOCK_PARTITION_16x16_INTEL 0x0 +#define CL_AVC_ME_SKIP_BLOCK_PARTITION_8x8_INTEL 0x4000 + +#define CL_AVC_ME_SKIP_BLOCK_16x16_FORWARD_ENABLE_INTEL ( 0x1 << 24 ) +#define CL_AVC_ME_SKIP_BLOCK_16x16_BACKWARD_ENABLE_INTEL ( 0x2 << 24 ) +#define CL_AVC_ME_SKIP_BLOCK_16x16_DUAL_ENABLE_INTEL ( 0x3 << 24 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_FORWARD_ENABLE_INTEL ( 0x55 << 24 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_BACKWARD_ENABLE_INTEL ( 0xAA << 24 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_DUAL_ENABLE_INTEL ( 0xFF << 24 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_0_FORWARD_ENABLE_INTEL ( 0x1 << 24 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_0_BACKWARD_ENABLE_INTEL ( 0x2 << 24 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_1_FORWARD_ENABLE_INTEL ( 0x1 << 26 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_1_BACKWARD_ENABLE_INTEL ( 0x2 << 26 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_2_FORWARD_ENABLE_INTEL ( 0x1 << 28 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_2_BACKWARD_ENABLE_INTEL ( 0x2 << 28 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_3_FORWARD_ENABLE_INTEL ( 0x1 << 30 ) +#define CL_AVC_ME_SKIP_BLOCK_8x8_3_BACKWARD_ENABLE_INTEL ( 0x2 << 30 ) + +#define CL_AVC_ME_BLOCK_BASED_SKIP_4x4_INTEL 0x00 +#define CL_AVC_ME_BLOCK_BASED_SKIP_8x8_INTEL 0x80 + +#define CL_AVC_ME_INTRA_16x16_INTEL 0x0 +#define CL_AVC_ME_INTRA_8x8_INTEL 0x1 +#define CL_AVC_ME_INTRA_4x4_INTEL 0x2 + +#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_16x16_INTEL 0x6 +#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_8x8_INTEL 0x5 +#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_4x4_INTEL 0x3 + +#define CL_AVC_ME_INTRA_NEIGHBOR_LEFT_MASK_ENABLE_INTEL 0x60 +#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_MASK_ENABLE_INTEL 0x10 +#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_RIGHT_MASK_ENABLE_INTEL 0x8 +#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_LEFT_MASK_ENABLE_INTEL 0x4 + +#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0 +#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 +#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2 +#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3 +#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4 +#define CL_AVC_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4 +#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5 +#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6 +#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7 +#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8 +#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0 +#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1 +#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2 +#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3 + +#define CL_AVC_ME_FRAME_FORWARD_INTEL 0x1 +#define CL_AVC_ME_FRAME_BACKWARD_INTEL 0x2 +#define CL_AVC_ME_FRAME_DUAL_INTEL 0x3 + +#define CL_AVC_ME_SLICE_TYPE_PRED_INTEL 0x0 +#define CL_AVC_ME_SLICE_TYPE_BPRED_INTEL 0x1 +#define CL_AVC_ME_SLICE_TYPE_INTRA_INTEL 0x2 + +#define CL_AVC_ME_INTERLACED_SCAN_TOP_FIELD_INTEL 0x0 +#define CL_AVC_ME_INTERLACED_SCAN_BOTTOM_FIELD_INTEL 0x1 + +#ifdef __cplusplus +} +#endif + +#endif /* __CL_EXT_INTEL_H */ diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_gl.h b/benchmarks/new_opencl/runtime/include/CL/cl_gl.h new file mode 100644 index 00000000..fbdaf629 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_gl.h @@ -0,0 +1,171 @@ +/********************************************************************************** + * Copyright (c) 2008-2019 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + **********************************************************************************/ + +#ifndef __OPENCL_CL_GL_H +#define __OPENCL_CL_GL_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +typedef cl_uint cl_gl_object_type; +typedef cl_uint cl_gl_texture_info; +typedef cl_uint cl_gl_platform_info; +typedef struct __GLsync *cl_GLsync; + +/* cl_gl_object_type = 0x2000 - 0x200F enum values are currently taken */ +#define CL_GL_OBJECT_BUFFER 0x2000 +#define CL_GL_OBJECT_TEXTURE2D 0x2001 +#define CL_GL_OBJECT_TEXTURE3D 0x2002 +#define CL_GL_OBJECT_RENDERBUFFER 0x2003 +#ifdef CL_VERSION_1_2 +#define CL_GL_OBJECT_TEXTURE2D_ARRAY 0x200E +#define CL_GL_OBJECT_TEXTURE1D 0x200F +#define CL_GL_OBJECT_TEXTURE1D_ARRAY 0x2010 +#define CL_GL_OBJECT_TEXTURE_BUFFER 0x2011 +#endif + +/* cl_gl_texture_info */ +#define CL_GL_TEXTURE_TARGET 0x2004 +#define CL_GL_MIPMAP_LEVEL 0x2005 +#ifdef CL_VERSION_1_2 +#define CL_GL_NUM_SAMPLES 0x2012 +#endif + + +extern CL_API_ENTRY cl_mem CL_API_CALL +clCreateFromGLBuffer(cl_context context, + cl_mem_flags flags, + cl_GLuint bufobj, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +#ifdef CL_VERSION_1_2 + +extern CL_API_ENTRY cl_mem CL_API_CALL +clCreateFromGLTexture(cl_context context, + cl_mem_flags flags, + cl_GLenum target, + cl_GLint miplevel, + cl_GLuint texture, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2; + +#endif + +extern CL_API_ENTRY cl_mem CL_API_CALL +clCreateFromGLRenderbuffer(cl_context context, + cl_mem_flags flags, + cl_GLuint renderbuffer, + cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetGLObjectInfo(cl_mem memobj, + cl_gl_object_type * gl_object_type, + cl_GLuint * gl_object_name) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetGLTextureInfo(cl_mem memobj, + cl_gl_texture_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueAcquireGLObjects(cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueReleaseGLObjects(cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem * mem_objects, + cl_uint num_events_in_wait_list, + const cl_event * event_wait_list, + cl_event * event) CL_API_SUFFIX__VERSION_1_0; + + +/* Deprecated OpenCL 1.1 APIs */ +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_mem CL_API_CALL +clCreateFromGLTexture2D(cl_context context, + cl_mem_flags flags, + cl_GLenum target, + cl_GLint miplevel, + cl_GLuint texture, + cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; + +extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_mem CL_API_CALL +clCreateFromGLTexture3D(cl_context context, + cl_mem_flags flags, + cl_GLenum target, + cl_GLint miplevel, + cl_GLuint texture, + cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED; + +/* cl_khr_gl_sharing extension */ + +#define cl_khr_gl_sharing 1 + +typedef cl_uint cl_gl_context_info; + +/* Additional Error Codes */ +#define CL_INVALID_GL_SHAREGROUP_REFERENCE_KHR -1000 + +/* cl_gl_context_info */ +#define CL_CURRENT_DEVICE_FOR_GL_CONTEXT_KHR 0x2006 +#define CL_DEVICES_FOR_GL_CONTEXT_KHR 0x2007 + +/* Additional cl_context_properties */ +#define CL_GL_CONTEXT_KHR 0x2008 +#define CL_EGL_DISPLAY_KHR 0x2009 +#define CL_GLX_DISPLAY_KHR 0x200A +#define CL_WGL_HDC_KHR 0x200B +#define CL_CGL_SHAREGROUP_KHR 0x200C + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetGLContextInfoKHR(const cl_context_properties * properties, + cl_gl_context_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetGLContextInfoKHR_fn)( + const cl_context_properties * properties, + cl_gl_context_info param_name, + size_t param_value_size, + void * param_value, + size_t * param_value_size_ret); + +#ifdef __cplusplus +} +#endif + +#endif /* __OPENCL_CL_GL_H */ diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_gl_ext.h b/benchmarks/new_opencl/runtime/include/CL/cl_gl_ext.h new file mode 100644 index 00000000..c26d31ab --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_gl_ext.h @@ -0,0 +1,52 @@ +/********************************************************************************** + * Copyright (c) 2008-2019 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + **********************************************************************************/ + +#ifndef __OPENCL_CL_GL_EXT_H +#define __OPENCL_CL_GL_EXT_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/* + * cl_khr_gl_event extension + */ +#define CL_COMMAND_GL_FENCE_SYNC_OBJECT_KHR 0x200D + +extern CL_API_ENTRY cl_event CL_API_CALL +clCreateEventFromGLsyncKHR(cl_context context, + cl_GLsync cl_GLsync, + cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_1; + +#ifdef __cplusplus +} +#endif + +#endif /* __OPENCL_CL_GL_EXT_H */ diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_platform.h b/benchmarks/new_opencl/runtime/include/CL/cl_platform.h new file mode 100644 index 00000000..7f4ddea5 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_platform.h @@ -0,0 +1,1384 @@ +/********************************************************************************** + * Copyright (c) 2008-2018 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + **********************************************************************************/ + +#ifndef __CL_PLATFORM_H +#define __CL_PLATFORM_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(_WIN32) + #define CL_API_ENTRY + #define CL_API_CALL __stdcall + #define CL_CALLBACK __stdcall +#else + #define CL_API_ENTRY + #define CL_API_CALL + #define CL_CALLBACK +#endif + +/* + * Deprecation flags refer to the last version of the header in which the + * feature was not deprecated. + * + * E.g. VERSION_1_1_DEPRECATED means the feature is present in 1.1 without + * deprecation but is deprecated in versions later than 1.1. + */ + +#define CL_EXTENSION_WEAK_LINK +#define CL_API_SUFFIX__VERSION_1_0 +#define CL_EXT_SUFFIX__VERSION_1_0 +#define CL_API_SUFFIX__VERSION_1_1 +#define CL_EXT_SUFFIX__VERSION_1_1 +#define CL_API_SUFFIX__VERSION_1_2 +#define CL_EXT_SUFFIX__VERSION_1_2 +#define CL_API_SUFFIX__VERSION_2_0 +#define CL_EXT_SUFFIX__VERSION_2_0 +#define CL_API_SUFFIX__VERSION_2_1 +#define CL_EXT_SUFFIX__VERSION_2_1 +#define CL_API_SUFFIX__VERSION_2_2 +#define CL_EXT_SUFFIX__VERSION_2_2 + + +#ifdef __GNUC__ + #define CL_EXT_SUFFIX_DEPRECATED __attribute__((deprecated)) + #define CL_EXT_PREFIX_DEPRECATED +#elif defined(_WIN32) + #define CL_EXT_SUFFIX_DEPRECATED + #define CL_EXT_PREFIX_DEPRECATED __declspec(deprecated) +#else + #define CL_EXT_SUFFIX_DEPRECATED + #define CL_EXT_PREFIX_DEPRECATED +#endif + +#ifdef CL_USE_DEPRECATED_OPENCL_1_0_APIS + #define CL_EXT_SUFFIX__VERSION_1_0_DEPRECATED + #define CL_EXT_PREFIX__VERSION_1_0_DEPRECATED +#else + #define CL_EXT_SUFFIX__VERSION_1_0_DEPRECATED CL_EXT_SUFFIX_DEPRECATED + #define CL_EXT_PREFIX__VERSION_1_0_DEPRECATED CL_EXT_PREFIX_DEPRECATED +#endif + +#ifdef CL_USE_DEPRECATED_OPENCL_1_1_APIS + #define CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED + #define CL_EXT_PREFIX__VERSION_1_1_DEPRECATED +#else + #define CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED CL_EXT_SUFFIX_DEPRECATED + #define CL_EXT_PREFIX__VERSION_1_1_DEPRECATED CL_EXT_PREFIX_DEPRECATED +#endif + +#ifdef CL_USE_DEPRECATED_OPENCL_1_2_APIS + #define CL_EXT_SUFFIX__VERSION_1_2_DEPRECATED + #define CL_EXT_PREFIX__VERSION_1_2_DEPRECATED +#else + #define CL_EXT_SUFFIX__VERSION_1_2_DEPRECATED CL_EXT_SUFFIX_DEPRECATED + #define CL_EXT_PREFIX__VERSION_1_2_DEPRECATED CL_EXT_PREFIX_DEPRECATED + #endif + +#ifdef CL_USE_DEPRECATED_OPENCL_2_0_APIS + #define CL_EXT_SUFFIX__VERSION_2_0_DEPRECATED + #define CL_EXT_PREFIX__VERSION_2_0_DEPRECATED +#else + #define CL_EXT_SUFFIX__VERSION_2_0_DEPRECATED CL_EXT_SUFFIX_DEPRECATED + #define CL_EXT_PREFIX__VERSION_2_0_DEPRECATED CL_EXT_PREFIX_DEPRECATED +#endif + +#ifdef CL_USE_DEPRECATED_OPENCL_2_1_APIS + #define CL_EXT_SUFFIX__VERSION_2_1_DEPRECATED + #define CL_EXT_PREFIX__VERSION_2_1_DEPRECATED +#else + #define CL_EXT_SUFFIX__VERSION_2_1_DEPRECATED CL_EXT_SUFFIX_DEPRECATED + #define CL_EXT_PREFIX__VERSION_2_1_DEPRECATED CL_EXT_PREFIX_DEPRECATED +#endif + +#if (defined (_WIN32) && defined(_MSC_VER)) + +/* scalar types */ +typedef signed __int8 cl_char; +typedef unsigned __int8 cl_uchar; +typedef signed __int16 cl_short; +typedef unsigned __int16 cl_ushort; +typedef signed __int32 cl_int; +typedef unsigned __int32 cl_uint; +typedef signed __int64 cl_long; +typedef unsigned __int64 cl_ulong; + +typedef unsigned __int16 cl_half; +typedef float cl_float; +typedef double cl_double; + +/* Macro names and corresponding values defined by OpenCL */ +#define CL_CHAR_BIT 8 +#define CL_SCHAR_MAX 127 +#define CL_SCHAR_MIN (-127-1) +#define CL_CHAR_MAX CL_SCHAR_MAX +#define CL_CHAR_MIN CL_SCHAR_MIN +#define CL_UCHAR_MAX 255 +#define CL_SHRT_MAX 32767 +#define CL_SHRT_MIN (-32767-1) +#define CL_USHRT_MAX 65535 +#define CL_INT_MAX 2147483647 +#define CL_INT_MIN (-2147483647-1) +#define CL_UINT_MAX 0xffffffffU +#define CL_LONG_MAX ((cl_long) 0x7FFFFFFFFFFFFFFFLL) +#define CL_LONG_MIN ((cl_long) -0x7FFFFFFFFFFFFFFFLL - 1LL) +#define CL_ULONG_MAX ((cl_ulong) 0xFFFFFFFFFFFFFFFFULL) + +#define CL_FLT_DIG 6 +#define CL_FLT_MANT_DIG 24 +#define CL_FLT_MAX_10_EXP +38 +#define CL_FLT_MAX_EXP +128 +#define CL_FLT_MIN_10_EXP -37 +#define CL_FLT_MIN_EXP -125 +#define CL_FLT_RADIX 2 +#define CL_FLT_MAX 340282346638528859811704183484516925440.0f +#define CL_FLT_MIN 1.175494350822287507969e-38f +#define CL_FLT_EPSILON 1.1920928955078125e-7f + +#define CL_HALF_DIG 3 +#define CL_HALF_MANT_DIG 11 +#define CL_HALF_MAX_10_EXP +4 +#define CL_HALF_MAX_EXP +16 +#define CL_HALF_MIN_10_EXP -4 +#define CL_HALF_MIN_EXP -13 +#define CL_HALF_RADIX 2 +#define CL_HALF_MAX 65504.0f +#define CL_HALF_MIN 6.103515625e-05f +#define CL_HALF_EPSILON 9.765625e-04f + +#define CL_DBL_DIG 15 +#define CL_DBL_MANT_DIG 53 +#define CL_DBL_MAX_10_EXP +308 +#define CL_DBL_MAX_EXP +1024 +#define CL_DBL_MIN_10_EXP -307 +#define CL_DBL_MIN_EXP -1021 +#define CL_DBL_RADIX 2 +#define CL_DBL_MAX 1.7976931348623158e+308 +#define CL_DBL_MIN 2.225073858507201383090e-308 +#define CL_DBL_EPSILON 2.220446049250313080847e-16 + +#define CL_M_E 2.7182818284590452354 +#define CL_M_LOG2E 1.4426950408889634074 +#define CL_M_LOG10E 0.43429448190325182765 +#define CL_M_LN2 0.69314718055994530942 +#define CL_M_LN10 2.30258509299404568402 +#define CL_M_PI 3.14159265358979323846 +#define CL_M_PI_2 1.57079632679489661923 +#define CL_M_PI_4 0.78539816339744830962 +#define CL_M_1_PI 0.31830988618379067154 +#define CL_M_2_PI 0.63661977236758134308 +#define CL_M_2_SQRTPI 1.12837916709551257390 +#define CL_M_SQRT2 1.41421356237309504880 +#define CL_M_SQRT1_2 0.70710678118654752440 + +#define CL_M_E_F 2.718281828f +#define CL_M_LOG2E_F 1.442695041f +#define CL_M_LOG10E_F 0.434294482f +#define CL_M_LN2_F 0.693147181f +#define CL_M_LN10_F 2.302585093f +#define CL_M_PI_F 3.141592654f +#define CL_M_PI_2_F 1.570796327f +#define CL_M_PI_4_F 0.785398163f +#define CL_M_1_PI_F 0.318309886f +#define CL_M_2_PI_F 0.636619772f +#define CL_M_2_SQRTPI_F 1.128379167f +#define CL_M_SQRT2_F 1.414213562f +#define CL_M_SQRT1_2_F 0.707106781f + +#define CL_NAN (CL_INFINITY - CL_INFINITY) +#define CL_HUGE_VALF ((cl_float) 1e50) +#define CL_HUGE_VAL ((cl_double) 1e500) +#define CL_MAXFLOAT CL_FLT_MAX +#define CL_INFINITY CL_HUGE_VALF + +#else + +#include + +/* scalar types */ +typedef int8_t cl_char; +typedef uint8_t cl_uchar; +typedef int16_t cl_short; +typedef uint16_t cl_ushort; +typedef int32_t cl_int; +typedef uint32_t cl_uint; +typedef int64_t cl_long; +typedef uint64_t cl_ulong; + +typedef uint16_t cl_half; +typedef float cl_float; +typedef double cl_double; + +/* Macro names and corresponding values defined by OpenCL */ +#define CL_CHAR_BIT 8 +#define CL_SCHAR_MAX 127 +#define CL_SCHAR_MIN (-127-1) +#define CL_CHAR_MAX CL_SCHAR_MAX +#define CL_CHAR_MIN CL_SCHAR_MIN +#define CL_UCHAR_MAX 255 +#define CL_SHRT_MAX 32767 +#define CL_SHRT_MIN (-32767-1) +#define CL_USHRT_MAX 65535 +#define CL_INT_MAX 2147483647 +#define CL_INT_MIN (-2147483647-1) +#define CL_UINT_MAX 0xffffffffU +#define CL_LONG_MAX ((cl_long) 0x7FFFFFFFFFFFFFFFLL) +#define CL_LONG_MIN ((cl_long) -0x7FFFFFFFFFFFFFFFLL - 1LL) +#define CL_ULONG_MAX ((cl_ulong) 0xFFFFFFFFFFFFFFFFULL) + +#define CL_FLT_DIG 6 +#define CL_FLT_MANT_DIG 24 +#define CL_FLT_MAX_10_EXP +38 +#define CL_FLT_MAX_EXP +128 +#define CL_FLT_MIN_10_EXP -37 +#define CL_FLT_MIN_EXP -125 +#define CL_FLT_RADIX 2 +#define CL_FLT_MAX 340282346638528859811704183484516925440.0f +#define CL_FLT_MIN 1.175494350822287507969e-38f +#define CL_FLT_EPSILON 1.1920928955078125e-7f + +#define CL_HALF_DIG 3 +#define CL_HALF_MANT_DIG 11 +#define CL_HALF_MAX_10_EXP +4 +#define CL_HALF_MAX_EXP +16 +#define CL_HALF_MIN_10_EXP -4 +#define CL_HALF_MIN_EXP -13 +#define CL_HALF_RADIX 2 +#define CL_HALF_MAX 65504.0f +#define CL_HALF_MIN 6.103515625e-05f +#define CL_HALF_EPSILON 9.765625e-04f + +#define CL_DBL_DIG 15 +#define CL_DBL_MANT_DIG 53 +#define CL_DBL_MAX_10_EXP +308 +#define CL_DBL_MAX_EXP +1024 +#define CL_DBL_MIN_10_EXP -307 +#define CL_DBL_MIN_EXP -1021 +#define CL_DBL_RADIX 2 +#define CL_DBL_MAX 179769313486231570814527423731704356798070567525844996598917476803157260780028538760589558632766878171540458953514382464234321326889464182768467546703537516986049910576551282076245490090389328944075868508455133942304583236903222948165808559332123348274797826204144723168738177180919299881250404026184124858368.0 +#define CL_DBL_MIN 2.225073858507201383090e-308 +#define CL_DBL_EPSILON 2.220446049250313080847e-16 + +#define CL_M_E 2.7182818284590452354 +#define CL_M_LOG2E 1.4426950408889634074 +#define CL_M_LOG10E 0.43429448190325182765 +#define CL_M_LN2 0.69314718055994530942 +#define CL_M_LN10 2.30258509299404568402 +#define CL_M_PI 3.14159265358979323846 +#define CL_M_PI_2 1.57079632679489661923 +#define CL_M_PI_4 0.78539816339744830962 +#define CL_M_1_PI 0.31830988618379067154 +#define CL_M_2_PI 0.63661977236758134308 +#define CL_M_2_SQRTPI 1.12837916709551257390 +#define CL_M_SQRT2 1.41421356237309504880 +#define CL_M_SQRT1_2 0.70710678118654752440 + +#define CL_M_E_F 2.718281828f +#define CL_M_LOG2E_F 1.442695041f +#define CL_M_LOG10E_F 0.434294482f +#define CL_M_LN2_F 0.693147181f +#define CL_M_LN10_F 2.302585093f +#define CL_M_PI_F 3.141592654f +#define CL_M_PI_2_F 1.570796327f +#define CL_M_PI_4_F 0.785398163f +#define CL_M_1_PI_F 0.318309886f +#define CL_M_2_PI_F 0.636619772f +#define CL_M_2_SQRTPI_F 1.128379167f +#define CL_M_SQRT2_F 1.414213562f +#define CL_M_SQRT1_2_F 0.707106781f + +#if defined( __GNUC__ ) + #define CL_HUGE_VALF __builtin_huge_valf() + #define CL_HUGE_VAL __builtin_huge_val() + #define CL_NAN __builtin_nanf( "" ) +#else + #define CL_HUGE_VALF ((cl_float) 1e50) + #define CL_HUGE_VAL ((cl_double) 1e500) + float nanf( const char * ); + #define CL_NAN nanf( "" ) +#endif +#define CL_MAXFLOAT CL_FLT_MAX +#define CL_INFINITY CL_HUGE_VALF + +#endif + +#include + +/* Mirror types to GL types. Mirror types allow us to avoid deciding which 87s to load based on whether we are using GL or GLES here. */ +typedef unsigned int cl_GLuint; +typedef int cl_GLint; +typedef unsigned int cl_GLenum; + +/* + * Vector types + * + * Note: OpenCL requires that all types be naturally aligned. + * This means that vector types must be naturally aligned. + * For example, a vector of four floats must be aligned to + * a 16 byte boundary (calculated as 4 * the natural 4-byte + * alignment of the float). The alignment qualifiers here + * will only function properly if your compiler supports them + * and if you don't actively work to defeat them. For example, + * in order for a cl_float4 to be 16 byte aligned in a struct, + * the start of the struct must itself be 16-byte aligned. + * + * Maintaining proper alignment is the user's responsibility. + */ + +/* Define basic vector types */ +#if defined( __VEC__ ) + #include /* may be omitted depending on compiler. AltiVec spec provides no way to detect whether the header is required. */ + typedef __vector unsigned char __cl_uchar16; + typedef __vector signed char __cl_char16; + typedef __vector unsigned short __cl_ushort8; + typedef __vector signed short __cl_short8; + typedef __vector unsigned int __cl_uint4; + typedef __vector signed int __cl_int4; + typedef __vector float __cl_float4; + #define __CL_UCHAR16__ 1 + #define __CL_CHAR16__ 1 + #define __CL_USHORT8__ 1 + #define __CL_SHORT8__ 1 + #define __CL_UINT4__ 1 + #define __CL_INT4__ 1 + #define __CL_FLOAT4__ 1 +#endif + +#if defined( __SSE__ ) + #if defined( __MINGW64__ ) + #include + #else + #include + #endif + #if defined( __GNUC__ ) + typedef float __cl_float4 __attribute__((vector_size(16))); + #else + typedef __m128 __cl_float4; + #endif + #define __CL_FLOAT4__ 1 +#endif + +#if defined( __SSE2__ ) + #if defined( __MINGW64__ ) + #include + #else + #include + #endif + #if defined( __GNUC__ ) + typedef cl_uchar __cl_uchar16 __attribute__((vector_size(16))); + typedef cl_char __cl_char16 __attribute__((vector_size(16))); + typedef cl_ushort __cl_ushort8 __attribute__((vector_size(16))); + typedef cl_short __cl_short8 __attribute__((vector_size(16))); + typedef cl_uint __cl_uint4 __attribute__((vector_size(16))); + typedef cl_int __cl_int4 __attribute__((vector_size(16))); + typedef cl_ulong __cl_ulong2 __attribute__((vector_size(16))); + typedef cl_long __cl_long2 __attribute__((vector_size(16))); + typedef cl_double __cl_double2 __attribute__((vector_size(16))); + #else + typedef __m128i __cl_uchar16; + typedef __m128i __cl_char16; + typedef __m128i __cl_ushort8; + typedef __m128i __cl_short8; + typedef __m128i __cl_uint4; + typedef __m128i __cl_int4; + typedef __m128i __cl_ulong2; + typedef __m128i __cl_long2; + typedef __m128d __cl_double2; + #endif + #define __CL_UCHAR16__ 1 + #define __CL_CHAR16__ 1 + #define __CL_USHORT8__ 1 + #define __CL_SHORT8__ 1 + #define __CL_INT4__ 1 + #define __CL_UINT4__ 1 + #define __CL_ULONG2__ 1 + #define __CL_LONG2__ 1 + #define __CL_DOUBLE2__ 1 +#endif + +#if defined( __MMX__ ) + #include + #if defined( __GNUC__ ) + typedef cl_uchar __cl_uchar8 __attribute__((vector_size(8))); + typedef cl_char __cl_char8 __attribute__((vector_size(8))); + typedef cl_ushort __cl_ushort4 __attribute__((vector_size(8))); + typedef cl_short __cl_short4 __attribute__((vector_size(8))); + typedef cl_uint __cl_uint2 __attribute__((vector_size(8))); + typedef cl_int __cl_int2 __attribute__((vector_size(8))); + typedef cl_ulong __cl_ulong1 __attribute__((vector_size(8))); + typedef cl_long __cl_long1 __attribute__((vector_size(8))); + typedef cl_float __cl_float2 __attribute__((vector_size(8))); + #else + typedef __m64 __cl_uchar8; + typedef __m64 __cl_char8; + typedef __m64 __cl_ushort4; + typedef __m64 __cl_short4; + typedef __m64 __cl_uint2; + typedef __m64 __cl_int2; + typedef __m64 __cl_ulong1; + typedef __m64 __cl_long1; + typedef __m64 __cl_float2; + #endif + #define __CL_UCHAR8__ 1 + #define __CL_CHAR8__ 1 + #define __CL_USHORT4__ 1 + #define __CL_SHORT4__ 1 + #define __CL_INT2__ 1 + #define __CL_UINT2__ 1 + #define __CL_ULONG1__ 1 + #define __CL_LONG1__ 1 + #define __CL_FLOAT2__ 1 +#endif + +#if defined( __AVX__ ) + #if defined( __MINGW64__ ) + #include + #else + #include + #endif + #if defined( __GNUC__ ) + typedef cl_float __cl_float8 __attribute__((vector_size(32))); + typedef cl_double __cl_double4 __attribute__((vector_size(32))); + #else + typedef __m256 __cl_float8; + typedef __m256d __cl_double4; + #endif + #define __CL_FLOAT8__ 1 + #define __CL_DOUBLE4__ 1 +#endif + +/* Define capabilities for anonymous struct members. */ +#if !defined(__cplusplus) && defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L +#define __CL_HAS_ANON_STRUCT__ 1 +#define __CL_ANON_STRUCT__ +#elif defined( __GNUC__) && ! defined( __STRICT_ANSI__ ) +#define __CL_HAS_ANON_STRUCT__ 1 +#define __CL_ANON_STRUCT__ __extension__ +#elif defined( _WIN32) && defined(_MSC_VER) + #if _MSC_VER >= 1500 + /* Microsoft Developer Studio 2008 supports anonymous structs, but + * complains by default. */ + #define __CL_HAS_ANON_STRUCT__ 1 + #define __CL_ANON_STRUCT__ + /* Disable warning C4201: nonstandard extension used : nameless + * struct/union */ + #pragma warning( push ) + #pragma warning( disable : 4201 ) + #endif +#else +#define __CL_HAS_ANON_STRUCT__ 0 +#define __CL_ANON_STRUCT__ +#endif + +/* Define alignment keys */ +#if defined( __GNUC__ ) + #define CL_ALIGNED(_x) __attribute__ ((aligned(_x))) +#elif defined( _WIN32) && (_MSC_VER) + /* Alignment keys neutered on windows because MSVC can't swallow function arguments with alignment requirements */ + /* http://msdn.microsoft.com/en-us/library/373ak2y1%28VS.71%29.aspx */ + /* #include */ + /* #define CL_ALIGNED(_x) _CRT_ALIGN(_x) */ + #define CL_ALIGNED(_x) +#else + #warning Need to implement some method to align data here + #define CL_ALIGNED(_x) +#endif + +/* Indicate whether .xyzw, .s0123 and .hi.lo are supported */ +#if __CL_HAS_ANON_STRUCT__ + /* .xyzw and .s0123...{f|F} are supported */ + #define CL_HAS_NAMED_VECTOR_FIELDS 1 + /* .hi and .lo are supported */ + #define CL_HAS_HI_LO_VECTOR_FIELDS 1 +#endif + +/* Define cl_vector types */ + +/* ---- cl_charn ---- */ +typedef union +{ + cl_char CL_ALIGNED(2) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_char x, y; }; + __CL_ANON_STRUCT__ struct{ cl_char s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_char lo, hi; }; +#endif +#if defined( __CL_CHAR2__) + __cl_char2 v2; +#endif +}cl_char2; + +typedef union +{ + cl_char CL_ALIGNED(4) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_char x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_char s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_char2 lo, hi; }; +#endif +#if defined( __CL_CHAR2__) + __cl_char2 v2[2]; +#endif +#if defined( __CL_CHAR4__) + __cl_char4 v4; +#endif +}cl_char4; + +/* cl_char3 is identical in size, alignment and behavior to cl_char4. See section 6.1.5. */ +typedef cl_char4 cl_char3; + +typedef union +{ + cl_char CL_ALIGNED(8) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_char x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_char s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_char4 lo, hi; }; +#endif +#if defined( __CL_CHAR2__) + __cl_char2 v2[4]; +#endif +#if defined( __CL_CHAR4__) + __cl_char4 v4[2]; +#endif +#if defined( __CL_CHAR8__ ) + __cl_char8 v8; +#endif +}cl_char8; + +typedef union +{ + cl_char CL_ALIGNED(16) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_char x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_char s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_char8 lo, hi; }; +#endif +#if defined( __CL_CHAR2__) + __cl_char2 v2[8]; +#endif +#if defined( __CL_CHAR4__) + __cl_char4 v4[4]; +#endif +#if defined( __CL_CHAR8__ ) + __cl_char8 v8[2]; +#endif +#if defined( __CL_CHAR16__ ) + __cl_char16 v16; +#endif +}cl_char16; + + +/* ---- cl_ucharn ---- */ +typedef union +{ + cl_uchar CL_ALIGNED(2) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_uchar x, y; }; + __CL_ANON_STRUCT__ struct{ cl_uchar s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_uchar lo, hi; }; +#endif +#if defined( __cl_uchar2__) + __cl_uchar2 v2; +#endif +}cl_uchar2; + +typedef union +{ + cl_uchar CL_ALIGNED(4) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_uchar x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_uchar s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_uchar2 lo, hi; }; +#endif +#if defined( __CL_UCHAR2__) + __cl_uchar2 v2[2]; +#endif +#if defined( __CL_UCHAR4__) + __cl_uchar4 v4; +#endif +}cl_uchar4; + +/* cl_uchar3 is identical in size, alignment and behavior to cl_uchar4. See section 6.1.5. */ +typedef cl_uchar4 cl_uchar3; + +typedef union +{ + cl_uchar CL_ALIGNED(8) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_uchar x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_uchar s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_uchar4 lo, hi; }; +#endif +#if defined( __CL_UCHAR2__) + __cl_uchar2 v2[4]; +#endif +#if defined( __CL_UCHAR4__) + __cl_uchar4 v4[2]; +#endif +#if defined( __CL_UCHAR8__ ) + __cl_uchar8 v8; +#endif +}cl_uchar8; + +typedef union +{ + cl_uchar CL_ALIGNED(16) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_uchar x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_uchar s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_uchar8 lo, hi; }; +#endif +#if defined( __CL_UCHAR2__) + __cl_uchar2 v2[8]; +#endif +#if defined( __CL_UCHAR4__) + __cl_uchar4 v4[4]; +#endif +#if defined( __CL_UCHAR8__ ) + __cl_uchar8 v8[2]; +#endif +#if defined( __CL_UCHAR16__ ) + __cl_uchar16 v16; +#endif +}cl_uchar16; + + +/* ---- cl_shortn ---- */ +typedef union +{ + cl_short CL_ALIGNED(4) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_short x, y; }; + __CL_ANON_STRUCT__ struct{ cl_short s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_short lo, hi; }; +#endif +#if defined( __CL_SHORT2__) + __cl_short2 v2; +#endif +}cl_short2; + +typedef union +{ + cl_short CL_ALIGNED(8) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_short x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_short s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_short2 lo, hi; }; +#endif +#if defined( __CL_SHORT2__) + __cl_short2 v2[2]; +#endif +#if defined( __CL_SHORT4__) + __cl_short4 v4; +#endif +}cl_short4; + +/* cl_short3 is identical in size, alignment and behavior to cl_short4. See section 6.1.5. */ +typedef cl_short4 cl_short3; + +typedef union +{ + cl_short CL_ALIGNED(16) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_short x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_short s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_short4 lo, hi; }; +#endif +#if defined( __CL_SHORT2__) + __cl_short2 v2[4]; +#endif +#if defined( __CL_SHORT4__) + __cl_short4 v4[2]; +#endif +#if defined( __CL_SHORT8__ ) + __cl_short8 v8; +#endif +}cl_short8; + +typedef union +{ + cl_short CL_ALIGNED(32) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_short x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_short s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_short8 lo, hi; }; +#endif +#if defined( __CL_SHORT2__) + __cl_short2 v2[8]; +#endif +#if defined( __CL_SHORT4__) + __cl_short4 v4[4]; +#endif +#if defined( __CL_SHORT8__ ) + __cl_short8 v8[2]; +#endif +#if defined( __CL_SHORT16__ ) + __cl_short16 v16; +#endif +}cl_short16; + + +/* ---- cl_ushortn ---- */ +typedef union +{ + cl_ushort CL_ALIGNED(4) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_ushort x, y; }; + __CL_ANON_STRUCT__ struct{ cl_ushort s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_ushort lo, hi; }; +#endif +#if defined( __CL_USHORT2__) + __cl_ushort2 v2; +#endif +}cl_ushort2; + +typedef union +{ + cl_ushort CL_ALIGNED(8) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_ushort x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_ushort s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_ushort2 lo, hi; }; +#endif +#if defined( __CL_USHORT2__) + __cl_ushort2 v2[2]; +#endif +#if defined( __CL_USHORT4__) + __cl_ushort4 v4; +#endif +}cl_ushort4; + +/* cl_ushort3 is identical in size, alignment and behavior to cl_ushort4. See section 6.1.5. */ +typedef cl_ushort4 cl_ushort3; + +typedef union +{ + cl_ushort CL_ALIGNED(16) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_ushort x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_ushort s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_ushort4 lo, hi; }; +#endif +#if defined( __CL_USHORT2__) + __cl_ushort2 v2[4]; +#endif +#if defined( __CL_USHORT4__) + __cl_ushort4 v4[2]; +#endif +#if defined( __CL_USHORT8__ ) + __cl_ushort8 v8; +#endif +}cl_ushort8; + +typedef union +{ + cl_ushort CL_ALIGNED(32) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_ushort x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_ushort s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_ushort8 lo, hi; }; +#endif +#if defined( __CL_USHORT2__) + __cl_ushort2 v2[8]; +#endif +#if defined( __CL_USHORT4__) + __cl_ushort4 v4[4]; +#endif +#if defined( __CL_USHORT8__ ) + __cl_ushort8 v8[2]; +#endif +#if defined( __CL_USHORT16__ ) + __cl_ushort16 v16; +#endif +}cl_ushort16; + + +/* ---- cl_halfn ---- */ +typedef union +{ + cl_half CL_ALIGNED(4) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_half x, y; }; + __CL_ANON_STRUCT__ struct{ cl_half s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_half lo, hi; }; +#endif +#if defined( __CL_HALF2__) + __cl_half2 v2; +#endif +}cl_half2; + +typedef union +{ + cl_half CL_ALIGNED(8) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_half x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_half s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_half2 lo, hi; }; +#endif +#if defined( __CL_HALF2__) + __cl_half2 v2[2]; +#endif +#if defined( __CL_HALF4__) + __cl_half4 v4; +#endif +}cl_half4; + +/* cl_half3 is identical in size, alignment and behavior to cl_half4. See section 6.1.5. */ +typedef cl_half4 cl_half3; + +typedef union +{ + cl_half CL_ALIGNED(16) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_half x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_half s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_half4 lo, hi; }; +#endif +#if defined( __CL_HALF2__) + __cl_half2 v2[4]; +#endif +#if defined( __CL_HALF4__) + __cl_half4 v4[2]; +#endif +#if defined( __CL_HALF8__ ) + __cl_half8 v8; +#endif +}cl_half8; + +typedef union +{ + cl_half CL_ALIGNED(32) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_half x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_half s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_half8 lo, hi; }; +#endif +#if defined( __CL_HALF2__) + __cl_half2 v2[8]; +#endif +#if defined( __CL_HALF4__) + __cl_half4 v4[4]; +#endif +#if defined( __CL_HALF8__ ) + __cl_half8 v8[2]; +#endif +#if defined( __CL_HALF16__ ) + __cl_half16 v16; +#endif +}cl_half16; + +/* ---- cl_intn ---- */ +typedef union +{ + cl_int CL_ALIGNED(8) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_int x, y; }; + __CL_ANON_STRUCT__ struct{ cl_int s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_int lo, hi; }; +#endif +#if defined( __CL_INT2__) + __cl_int2 v2; +#endif +}cl_int2; + +typedef union +{ + cl_int CL_ALIGNED(16) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_int x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_int s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_int2 lo, hi; }; +#endif +#if defined( __CL_INT2__) + __cl_int2 v2[2]; +#endif +#if defined( __CL_INT4__) + __cl_int4 v4; +#endif +}cl_int4; + +/* cl_int3 is identical in size, alignment and behavior to cl_int4. See section 6.1.5. */ +typedef cl_int4 cl_int3; + +typedef union +{ + cl_int CL_ALIGNED(32) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_int x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_int s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_int4 lo, hi; }; +#endif +#if defined( __CL_INT2__) + __cl_int2 v2[4]; +#endif +#if defined( __CL_INT4__) + __cl_int4 v4[2]; +#endif +#if defined( __CL_INT8__ ) + __cl_int8 v8; +#endif +}cl_int8; + +typedef union +{ + cl_int CL_ALIGNED(64) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_int x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_int s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_int8 lo, hi; }; +#endif +#if defined( __CL_INT2__) + __cl_int2 v2[8]; +#endif +#if defined( __CL_INT4__) + __cl_int4 v4[4]; +#endif +#if defined( __CL_INT8__ ) + __cl_int8 v8[2]; +#endif +#if defined( __CL_INT16__ ) + __cl_int16 v16; +#endif +}cl_int16; + + +/* ---- cl_uintn ---- */ +typedef union +{ + cl_uint CL_ALIGNED(8) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_uint x, y; }; + __CL_ANON_STRUCT__ struct{ cl_uint s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_uint lo, hi; }; +#endif +#if defined( __CL_UINT2__) + __cl_uint2 v2; +#endif +}cl_uint2; + +typedef union +{ + cl_uint CL_ALIGNED(16) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_uint x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_uint s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_uint2 lo, hi; }; +#endif +#if defined( __CL_UINT2__) + __cl_uint2 v2[2]; +#endif +#if defined( __CL_UINT4__) + __cl_uint4 v4; +#endif +}cl_uint4; + +/* cl_uint3 is identical in size, alignment and behavior to cl_uint4. See section 6.1.5. */ +typedef cl_uint4 cl_uint3; + +typedef union +{ + cl_uint CL_ALIGNED(32) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_uint x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_uint s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_uint4 lo, hi; }; +#endif +#if defined( __CL_UINT2__) + __cl_uint2 v2[4]; +#endif +#if defined( __CL_UINT4__) + __cl_uint4 v4[2]; +#endif +#if defined( __CL_UINT8__ ) + __cl_uint8 v8; +#endif +}cl_uint8; + +typedef union +{ + cl_uint CL_ALIGNED(64) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_uint x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_uint s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_uint8 lo, hi; }; +#endif +#if defined( __CL_UINT2__) + __cl_uint2 v2[8]; +#endif +#if defined( __CL_UINT4__) + __cl_uint4 v4[4]; +#endif +#if defined( __CL_UINT8__ ) + __cl_uint8 v8[2]; +#endif +#if defined( __CL_UINT16__ ) + __cl_uint16 v16; +#endif +}cl_uint16; + +/* ---- cl_longn ---- */ +typedef union +{ + cl_long CL_ALIGNED(16) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_long x, y; }; + __CL_ANON_STRUCT__ struct{ cl_long s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_long lo, hi; }; +#endif +#if defined( __CL_LONG2__) + __cl_long2 v2; +#endif +}cl_long2; + +typedef union +{ + cl_long CL_ALIGNED(32) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_long x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_long s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_long2 lo, hi; }; +#endif +#if defined( __CL_LONG2__) + __cl_long2 v2[2]; +#endif +#if defined( __CL_LONG4__) + __cl_long4 v4; +#endif +}cl_long4; + +/* cl_long3 is identical in size, alignment and behavior to cl_long4. See section 6.1.5. */ +typedef cl_long4 cl_long3; + +typedef union +{ + cl_long CL_ALIGNED(64) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_long x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_long s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_long4 lo, hi; }; +#endif +#if defined( __CL_LONG2__) + __cl_long2 v2[4]; +#endif +#if defined( __CL_LONG4__) + __cl_long4 v4[2]; +#endif +#if defined( __CL_LONG8__ ) + __cl_long8 v8; +#endif +}cl_long8; + +typedef union +{ + cl_long CL_ALIGNED(128) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_long x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_long s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_long8 lo, hi; }; +#endif +#if defined( __CL_LONG2__) + __cl_long2 v2[8]; +#endif +#if defined( __CL_LONG4__) + __cl_long4 v4[4]; +#endif +#if defined( __CL_LONG8__ ) + __cl_long8 v8[2]; +#endif +#if defined( __CL_LONG16__ ) + __cl_long16 v16; +#endif +}cl_long16; + + +/* ---- cl_ulongn ---- */ +typedef union +{ + cl_ulong CL_ALIGNED(16) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_ulong x, y; }; + __CL_ANON_STRUCT__ struct{ cl_ulong s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_ulong lo, hi; }; +#endif +#if defined( __CL_ULONG2__) + __cl_ulong2 v2; +#endif +}cl_ulong2; + +typedef union +{ + cl_ulong CL_ALIGNED(32) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_ulong x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_ulong s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_ulong2 lo, hi; }; +#endif +#if defined( __CL_ULONG2__) + __cl_ulong2 v2[2]; +#endif +#if defined( __CL_ULONG4__) + __cl_ulong4 v4; +#endif +}cl_ulong4; + +/* cl_ulong3 is identical in size, alignment and behavior to cl_ulong4. See section 6.1.5. */ +typedef cl_ulong4 cl_ulong3; + +typedef union +{ + cl_ulong CL_ALIGNED(64) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_ulong x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_ulong s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_ulong4 lo, hi; }; +#endif +#if defined( __CL_ULONG2__) + __cl_ulong2 v2[4]; +#endif +#if defined( __CL_ULONG4__) + __cl_ulong4 v4[2]; +#endif +#if defined( __CL_ULONG8__ ) + __cl_ulong8 v8; +#endif +}cl_ulong8; + +typedef union +{ + cl_ulong CL_ALIGNED(128) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_ulong x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_ulong s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_ulong8 lo, hi; }; +#endif +#if defined( __CL_ULONG2__) + __cl_ulong2 v2[8]; +#endif +#if defined( __CL_ULONG4__) + __cl_ulong4 v4[4]; +#endif +#if defined( __CL_ULONG8__ ) + __cl_ulong8 v8[2]; +#endif +#if defined( __CL_ULONG16__ ) + __cl_ulong16 v16; +#endif +}cl_ulong16; + + +/* --- cl_floatn ---- */ + +typedef union +{ + cl_float CL_ALIGNED(8) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_float x, y; }; + __CL_ANON_STRUCT__ struct{ cl_float s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_float lo, hi; }; +#endif +#if defined( __CL_FLOAT2__) + __cl_float2 v2; +#endif +}cl_float2; + +typedef union +{ + cl_float CL_ALIGNED(16) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_float x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_float s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_float2 lo, hi; }; +#endif +#if defined( __CL_FLOAT2__) + __cl_float2 v2[2]; +#endif +#if defined( __CL_FLOAT4__) + __cl_float4 v4; +#endif +}cl_float4; + +/* cl_float3 is identical in size, alignment and behavior to cl_float4. See section 6.1.5. */ +typedef cl_float4 cl_float3; + +typedef union +{ + cl_float CL_ALIGNED(32) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_float x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_float s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_float4 lo, hi; }; +#endif +#if defined( __CL_FLOAT2__) + __cl_float2 v2[4]; +#endif +#if defined( __CL_FLOAT4__) + __cl_float4 v4[2]; +#endif +#if defined( __CL_FLOAT8__ ) + __cl_float8 v8; +#endif +}cl_float8; + +typedef union +{ + cl_float CL_ALIGNED(64) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_float x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_float s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_float8 lo, hi; }; +#endif +#if defined( __CL_FLOAT2__) + __cl_float2 v2[8]; +#endif +#if defined( __CL_FLOAT4__) + __cl_float4 v4[4]; +#endif +#if defined( __CL_FLOAT8__ ) + __cl_float8 v8[2]; +#endif +#if defined( __CL_FLOAT16__ ) + __cl_float16 v16; +#endif +}cl_float16; + +/* --- cl_doublen ---- */ + +typedef union +{ + cl_double CL_ALIGNED(16) s[2]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_double x, y; }; + __CL_ANON_STRUCT__ struct{ cl_double s0, s1; }; + __CL_ANON_STRUCT__ struct{ cl_double lo, hi; }; +#endif +#if defined( __CL_DOUBLE2__) + __cl_double2 v2; +#endif +}cl_double2; + +typedef union +{ + cl_double CL_ALIGNED(32) s[4]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_double x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_double s0, s1, s2, s3; }; + __CL_ANON_STRUCT__ struct{ cl_double2 lo, hi; }; +#endif +#if defined( __CL_DOUBLE2__) + __cl_double2 v2[2]; +#endif +#if defined( __CL_DOUBLE4__) + __cl_double4 v4; +#endif +}cl_double4; + +/* cl_double3 is identical in size, alignment and behavior to cl_double4. See section 6.1.5. */ +typedef cl_double4 cl_double3; + +typedef union +{ + cl_double CL_ALIGNED(64) s[8]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_double x, y, z, w; }; + __CL_ANON_STRUCT__ struct{ cl_double s0, s1, s2, s3, s4, s5, s6, s7; }; + __CL_ANON_STRUCT__ struct{ cl_double4 lo, hi; }; +#endif +#if defined( __CL_DOUBLE2__) + __cl_double2 v2[4]; +#endif +#if defined( __CL_DOUBLE4__) + __cl_double4 v4[2]; +#endif +#if defined( __CL_DOUBLE8__ ) + __cl_double8 v8; +#endif +}cl_double8; + +typedef union +{ + cl_double CL_ALIGNED(128) s[16]; +#if __CL_HAS_ANON_STRUCT__ + __CL_ANON_STRUCT__ struct{ cl_double x, y, z, w, __spacer4, __spacer5, __spacer6, __spacer7, __spacer8, __spacer9, sa, sb, sc, sd, se, sf; }; + __CL_ANON_STRUCT__ struct{ cl_double s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, sA, sB, sC, sD, sE, sF; }; + __CL_ANON_STRUCT__ struct{ cl_double8 lo, hi; }; +#endif +#if defined( __CL_DOUBLE2__) + __cl_double2 v2[8]; +#endif +#if defined( __CL_DOUBLE4__) + __cl_double4 v4[4]; +#endif +#if defined( __CL_DOUBLE8__ ) + __cl_double8 v8[2]; +#endif +#if defined( __CL_DOUBLE16__ ) + __cl_double16 v16; +#endif +}cl_double16; + +/* Macro to facilitate debugging + * Usage: + * Place CL_PROGRAM_STRING_DEBUG_INFO on the line before the first line of your source. + * The first line ends with: CL_PROGRAM_STRING_DEBUG_INFO \" + * Each line thereafter of OpenCL C source must end with: \n\ + * The last line ends in "; + * + * Example: + * + * const char *my_program = CL_PROGRAM_STRING_DEBUG_INFO "\ + * kernel void foo( int a, float * b ) \n\ + * { \n\ + * // my comment \n\ + * *b[ get_global_id(0)] = a; \n\ + * } \n\ + * "; + * + * This should correctly set up the line, (column) and file information for your source + * string so you can do source level debugging. + */ +#define __CL_STRINGIFY( _x ) # _x +#define _CL_STRINGIFY( _x ) __CL_STRINGIFY( _x ) +#define CL_PROGRAM_STRING_DEBUG_INFO "#line " _CL_STRINGIFY(__LINE__) " \"" __FILE__ "\" \n\n" + +#ifdef __cplusplus +} +#endif + +#undef __CL_HAS_ANON_STRUCT__ +#undef __CL_ANON_STRUCT__ +#if defined( _WIN32) && defined(_MSC_VER) + #if _MSC_VER >=1500 + #pragma warning( pop ) + #endif +#endif + +#endif /* __CL_PLATFORM_H */ diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_va_api_media_sharing_intel.h b/benchmarks/new_opencl/runtime/include/CL/cl_va_api_media_sharing_intel.h new file mode 100644 index 00000000..934f3f52 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_va_api_media_sharing_intel.h @@ -0,0 +1,172 @@ +/********************************************************************************** + * Copyright (c) 2008-2019 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + **********************************************************************************/ +/*****************************************************************************\ + +Copyright (c) 2013-2019 Intel Corporation All Rights Reserved. + +THESE MATERIALS ARE PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS +CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY +OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING +NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THESE +MATERIALS, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +File Name: cl_va_api_media_sharing_intel.h + +Abstract: + +Notes: + +\*****************************************************************************/ + + +#ifndef __OPENCL_CL_VA_API_MEDIA_SHARING_INTEL_H +#define __OPENCL_CL_VA_API_MEDIA_SHARING_INTEL_H + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/****************************************** +* cl_intel_va_api_media_sharing extension * +*******************************************/ + +#define cl_intel_va_api_media_sharing 1 + +/* error codes */ +#define CL_INVALID_VA_API_MEDIA_ADAPTER_INTEL -1098 +#define CL_INVALID_VA_API_MEDIA_SURFACE_INTEL -1099 +#define CL_VA_API_MEDIA_SURFACE_ALREADY_ACQUIRED_INTEL -1100 +#define CL_VA_API_MEDIA_SURFACE_NOT_ACQUIRED_INTEL -1101 + +/* cl_va_api_device_source_intel */ +#define CL_VA_API_DISPLAY_INTEL 0x4094 + +/* cl_va_api_device_set_intel */ +#define CL_PREFERRED_DEVICES_FOR_VA_API_INTEL 0x4095 +#define CL_ALL_DEVICES_FOR_VA_API_INTEL 0x4096 + +/* cl_context_info */ +#define CL_CONTEXT_VA_API_DISPLAY_INTEL 0x4097 + +/* cl_mem_info */ +#define CL_MEM_VA_API_MEDIA_SURFACE_INTEL 0x4098 + +/* cl_image_info */ +#define CL_IMAGE_VA_API_PLANE_INTEL 0x4099 + +/* cl_command_type */ +#define CL_COMMAND_ACQUIRE_VA_API_MEDIA_SURFACES_INTEL 0x409A +#define CL_COMMAND_RELEASE_VA_API_MEDIA_SURFACES_INTEL 0x409B + +typedef cl_uint cl_va_api_device_source_intel; +typedef cl_uint cl_va_api_device_set_intel; + +extern CL_API_ENTRY cl_int CL_API_CALL +clGetDeviceIDsFromVA_APIMediaAdapterINTEL( + cl_platform_id platform, + cl_va_api_device_source_intel media_adapter_type, + void* media_adapter, + cl_va_api_device_set_intel media_adapter_set, + cl_uint num_entries, + cl_device_id* devices, + cl_uint* num_devices) CL_EXT_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int (CL_API_CALL * clGetDeviceIDsFromVA_APIMediaAdapterINTEL_fn)( + cl_platform_id platform, + cl_va_api_device_source_intel media_adapter_type, + void* media_adapter, + cl_va_api_device_set_intel media_adapter_set, + cl_uint num_entries, + cl_device_id* devices, + cl_uint* num_devices) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_mem CL_API_CALL +clCreateFromVA_APIMediaSurfaceINTEL( + cl_context context, + cl_mem_flags flags, + VASurfaceID* surface, + cl_uint plane, + cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_mem (CL_API_CALL * clCreateFromVA_APIMediaSurfaceINTEL_fn)( + cl_context context, + cl_mem_flags flags, + VASurfaceID* surface, + cl_uint plane, + cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueAcquireVA_APIMediaSurfacesINTEL( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem* mem_objects, + cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, + cl_event* event) CL_EXT_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireVA_APIMediaSurfacesINTEL_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem* mem_objects, + cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, + cl_event* event) CL_EXT_SUFFIX__VERSION_1_2; + +extern CL_API_ENTRY cl_int CL_API_CALL +clEnqueueReleaseVA_APIMediaSurfacesINTEL( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem* mem_objects, + cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, + cl_event* event) CL_EXT_SUFFIX__VERSION_1_2; + +typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseVA_APIMediaSurfacesINTEL_fn)( + cl_command_queue command_queue, + cl_uint num_objects, + const cl_mem* mem_objects, + cl_uint num_events_in_wait_list, + const cl_event* event_wait_list, + cl_event* event) CL_EXT_SUFFIX__VERSION_1_2; + +#ifdef __cplusplus +} +#endif + +#endif /* __OPENCL_CL_VA_API_MEDIA_SHARING_INTEL_H */ + diff --git a/benchmarks/new_opencl/runtime/include/CL/cl_version.h b/benchmarks/new_opencl/runtime/include/CL/cl_version.h new file mode 100644 index 00000000..bb766cb9 --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/cl_version.h @@ -0,0 +1,86 @@ +/******************************************************************************* + * Copyright (c) 2018 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + ******************************************************************************/ + +#ifndef __CL_VERSION_H +#define __CL_VERSION_H + +/* Detect which version to target */ +#if !defined(CL_TARGET_OPENCL_VERSION) +#pragma message("cl_version.h: CL_TARGET_OPENCL_VERSION is not defined. Defaulting to 220 (OpenCL 2.2)") +#define CL_TARGET_OPENCL_VERSION 220 +#endif +#if CL_TARGET_OPENCL_VERSION != 100 && \ + CL_TARGET_OPENCL_VERSION != 110 && \ + CL_TARGET_OPENCL_VERSION != 120 && \ + CL_TARGET_OPENCL_VERSION != 200 && \ + CL_TARGET_OPENCL_VERSION != 210 && \ + CL_TARGET_OPENCL_VERSION != 220 +#pragma message("cl_version: CL_TARGET_OPENCL_VERSION is not a valid value (100, 110, 120, 200, 210, 220). Defaulting to 220 (OpenCL 2.2)") +#undef CL_TARGET_OPENCL_VERSION +#define CL_TARGET_OPENCL_VERSION 220 +#endif + + +/* OpenCL Version */ +#if CL_TARGET_OPENCL_VERSION >= 220 && !defined(CL_VERSION_2_2) +#define CL_VERSION_2_2 1 +#endif +#if CL_TARGET_OPENCL_VERSION >= 210 && !defined(CL_VERSION_2_1) +#define CL_VERSION_2_1 1 +#endif +#if CL_TARGET_OPENCL_VERSION >= 200 && !defined(CL_VERSION_2_0) +#define CL_VERSION_2_0 1 +#endif +#if CL_TARGET_OPENCL_VERSION >= 120 && !defined(CL_VERSION_1_2) +#define CL_VERSION_1_2 1 +#endif +#if CL_TARGET_OPENCL_VERSION >= 110 && !defined(CL_VERSION_1_1) +#define CL_VERSION_1_1 1 +#endif +#if CL_TARGET_OPENCL_VERSION >= 100 && !defined(CL_VERSION_1_0) +#define CL_VERSION_1_0 1 +#endif + +/* Allow deprecated APIs for older OpenCL versions. */ +#if CL_TARGET_OPENCL_VERSION <= 210 && !defined(CL_USE_DEPRECATED_OPENCL_2_1_APIS) +#define CL_USE_DEPRECATED_OPENCL_2_1_APIS +#endif +#if CL_TARGET_OPENCL_VERSION <= 200 && !defined(CL_USE_DEPRECATED_OPENCL_2_0_APIS) +#define CL_USE_DEPRECATED_OPENCL_2_0_APIS +#endif +#if CL_TARGET_OPENCL_VERSION <= 120 && !defined(CL_USE_DEPRECATED_OPENCL_1_2_APIS) +#define CL_USE_DEPRECATED_OPENCL_1_2_APIS +#endif +#if CL_TARGET_OPENCL_VERSION <= 110 && !defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS) +#define CL_USE_DEPRECATED_OPENCL_1_1_APIS +#endif +#if CL_TARGET_OPENCL_VERSION <= 100 && !defined(CL_USE_DEPRECATED_OPENCL_1_0_APIS) +#define CL_USE_DEPRECATED_OPENCL_1_0_APIS +#endif + +#endif /* __CL_VERSION_H */ diff --git a/benchmarks/new_opencl/runtime/include/CL/opencl.h b/benchmarks/new_opencl/runtime/include/CL/opencl.h new file mode 100644 index 00000000..143d1d2d --- /dev/null +++ b/benchmarks/new_opencl/runtime/include/CL/opencl.h @@ -0,0 +1,47 @@ +/******************************************************************************* + * Copyright (c) 2008-2015 The Khronos Group Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and/or associated documentation files (the + * "Materials"), to deal in the Materials without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Materials, and to + * permit persons to whom the Materials are furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Materials. + * + * MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS + * KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS + * SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT + * https://www.khronos.org/registry/ + * + * THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS. + ******************************************************************************/ + +/* $Revision: 11708 $ on $Date: 2010-06-13 23:36:24 -0700 (Sun, 13 Jun 2010) $ */ + +#ifndef __OPENCL_H +#define __OPENCL_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +#include + +#ifdef __cplusplus +} +#endif + +#endif /* __OPENCL_H */ diff --git a/benchmarks/new_opencl/runtime/lib/libOpenCL.so b/benchmarks/new_opencl/runtime/lib/libOpenCL.so new file mode 100644 index 00000000..e6ea2f3b Binary files /dev/null and b/benchmarks/new_opencl/runtime/lib/libOpenCL.so differ diff --git a/benchmarks/new_opencl/runtime/lib/libOpenCL.so.2 b/benchmarks/new_opencl/runtime/lib/libOpenCL.so.2 new file mode 100644 index 00000000..e6ea2f3b Binary files /dev/null and b/benchmarks/new_opencl/runtime/lib/libOpenCL.so.2 differ diff --git a/benchmarks/new_opencl/runtime/lib/libOpenCL.so.2.5.0 b/benchmarks/new_opencl/runtime/lib/libOpenCL.so.2.5.0 new file mode 100644 index 00000000..e6ea2f3b Binary files /dev/null and b/benchmarks/new_opencl/runtime/lib/libOpenCL.so.2.5.0 differ diff --git a/benchmarks/new_opencl/saxpy/Makefile b/benchmarks/new_opencl/saxpy/Makefile index 6a90cbf8..329c64d6 100644 --- a/benchmarks/new_opencl/saxpy/Makefile +++ b/benchmarks/new_opencl/saxpy/Makefile @@ -1,6 +1,6 @@ -RISCV_TOOL_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops) -POCLCC_PATH ?= $(wildcard ~/dev/pocl/drops_vortex_cc) -POCLRT_PATH ?= $(wildcard ..) +LLVM_LIB_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops/lib) +POCLCC_PATH ?= $(wildcard ../compiler) +POCLRT_PATH ?= $(wildcard ../runtime) DRIVER_PATH ?= $(wildcard ../../../driver/sw) CXXFLAGS += -std=c++11 -O0 -g -fpermissive -Wall -Wextra -pedantic -Wfatal-errors @@ -16,7 +16,7 @@ SRCS = main.cc all: $(PROJECT) kernel.pocl: kernel.cl - POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl + POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(LLVM_LIB_PATH):$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl $(PROJECT): $(SRCS) $(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@ diff --git a/benchmarks/new_opencl/saxpy/kernel.pocl b/benchmarks/new_opencl/saxpy/kernel.pocl index 4883291e..8e4cbf38 100644 Binary files a/benchmarks/new_opencl/saxpy/kernel.pocl and b/benchmarks/new_opencl/saxpy/kernel.pocl differ diff --git a/benchmarks/new_opencl/sfilter/Makefile b/benchmarks/new_opencl/sfilter/Makefile index 89f710e8..d35fad20 100644 --- a/benchmarks/new_opencl/sfilter/Makefile +++ b/benchmarks/new_opencl/sfilter/Makefile @@ -1,6 +1,6 @@ -RISCV_TOOL_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops) -POCLCC_PATH ?= $(wildcard ~/dev/pocl/drops_vortex_cc) -POCLRT_PATH ?= $(wildcard ..) +LLVM_LIB_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops/lib) +POCLCC_PATH ?= $(wildcard ../compiler) +POCLRT_PATH ?= $(wildcard ../runtime) DRIVER_PATH ?= $(wildcard ../../../driver/sw) CXXFLAGS += -std=c++11 -O0 -g -fpermissive -Wall -Wextra -pedantic -Wfatal-errors @@ -16,7 +16,7 @@ SRCS = main.cc all: $(PROJECT) kernel.pocl: kernel.cl - POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl + POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(LLVM_LIB_PATH):$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl $(PROJECT): $(SRCS) $(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@ diff --git a/benchmarks/new_opencl/sgemm/Makefile b/benchmarks/new_opencl/sgemm/Makefile index 95f0f290..5b607a80 100644 --- a/benchmarks/new_opencl/sgemm/Makefile +++ b/benchmarks/new_opencl/sgemm/Makefile @@ -1,6 +1,6 @@ -RISCV_TOOL_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops) -POCLCC_PATH ?= $(wildcard ~/dev/pocl/drops_vortex_cc) -POCLRT_PATH ?= $(wildcard ..) +LLVM_LIB_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops/lib) +POCLCC_PATH ?= $(wildcard ../compiler) +POCLRT_PATH ?= $(wildcard ../runtime) DRIVER_PATH ?= $(wildcard ../../../driver/sw) CXXFLAGS += -std=c++11 -O0 -g -fpermissive -Wall -Wextra -pedantic -Wfatal-errors @@ -16,7 +16,7 @@ SRCS = main.cc all: $(PROJECT) kernel.pocl: kernel.cl - POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl + POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(LLVM_LIB_PATH):$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl $(PROJECT): $(SRCS) $(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@ diff --git a/benchmarks/new_opencl/sgemm/kernel.pocl b/benchmarks/new_opencl/sgemm/kernel.pocl index 78c58af3..4a8ed72a 100644 Binary files a/benchmarks/new_opencl/sgemm/kernel.pocl and b/benchmarks/new_opencl/sgemm/kernel.pocl differ diff --git a/benchmarks/new_opencl/sgemm/sgemm b/benchmarks/new_opencl/sgemm/sgemm index cbede8ed..d2163c8c 100755 Binary files a/benchmarks/new_opencl/sgemm/sgemm and b/benchmarks/new_opencl/sgemm/sgemm differ diff --git a/benchmarks/new_opencl/vecadd/Makefile b/benchmarks/new_opencl/vecadd/Makefile index f3469442..0cd03fae 100644 --- a/benchmarks/new_opencl/vecadd/Makefile +++ b/benchmarks/new_opencl/vecadd/Makefile @@ -1,6 +1,6 @@ -RISCV_TOOL_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops) -POCLCC_PATH ?= $(wildcard ~/dev/pocl/drops_vortex_cc) -POCLRT_PATH ?= $(wildcard ..) +LLVM_LIB_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops/lib) +POCLCC_PATH ?= $(wildcard ../compiler) +POCLRT_PATH ?= $(wildcard ../runtime) DRIVER_PATH ?= $(wildcard ../../../driver/sw) CXXFLAGS += -std=c++11 -O0 -g -fpermissive -Wall -Wextra -pedantic -Wfatal-errors @@ -16,7 +16,7 @@ SRCS = main.cc all: $(PROJECT) kernel.pocl: kernel.cl - POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(RISCV_TOOL_PATH)/lib:$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl + POCL_DEBUG=all POCL_DEBUG_LLVM_PASSES=1 LD_LIBRARY_PATH=$(LLVM_LIB_PATH):$(POCLCC_PATH)/lib:$(DRIVER_PATH)/simx $(POCLCC_PATH)/bin/poclcc -o kernel.pocl kernel.cl $(PROJECT): $(SRCS) $(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@ diff --git a/benchmarks/new_opencl/vecadd/kernel.pocl b/benchmarks/new_opencl/vecadd/kernel.pocl index 80f1797b..a010a9fc 100644 Binary files a/benchmarks/new_opencl/vecadd/kernel.pocl and b/benchmarks/new_opencl/vecadd/kernel.pocl differ diff --git a/benchmarks/opencl/BlackScholes/Makefile b/benchmarks/opencl/BlackScholes/Makefile index 984ba909..1e8f691f 100644 --- a/benchmarks/opencl/BlackScholes/Makefile +++ b/benchmarks/opencl/BlackScholes/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/DotProduct/Makefile b/benchmarks/opencl/DotProduct/Makefile index 6c33f368..ce8282b5 100644 --- a/benchmarks/opencl/DotProduct/Makefile +++ b/benchmarks/opencl/DotProduct/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/VectorHypot/Makefile b/benchmarks/opencl/VectorHypot/Makefile index 6e1ddb89..83af834b 100644 --- a/benchmarks/opencl/VectorHypot/Makefile +++ b/benchmarks/opencl/VectorHypot/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/bfs/Makefile b/benchmarks/opencl/bfs/Makefile index ccede904..0619b907 100644 --- a/benchmarks/opencl/bfs/Makefile +++ b/benchmarks/opencl/bfs/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/convolution/Makefile b/benchmarks/opencl/convolution/Makefile index e3f93f3d..42c8605a 100644 --- a/benchmarks/opencl/convolution/Makefile +++ b/benchmarks/opencl/convolution/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/cutcp/Makefile b/benchmarks/opencl/cutcp/Makefile index 938c4797..22b0e10c 100644 --- a/benchmarks/opencl/cutcp/Makefile +++ b/benchmarks/opencl/cutcp/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/guassian/Makefile b/benchmarks/opencl/guassian/Makefile index 5e90ec3f..55f7620c 100644 --- a/benchmarks/opencl/guassian/Makefile +++ b/benchmarks/opencl/guassian/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/kmeans/Makefile b/benchmarks/opencl/kmeans/Makefile index 50413ab0..d00909ed 100644 --- a/benchmarks/opencl/kmeans/Makefile +++ b/benchmarks/opencl/kmeans/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/lbm/Makefile b/benchmarks/opencl/lbm/Makefile index 092a6b9a..2b3b76c1 100644 --- a/benchmarks/opencl/lbm/Makefile +++ b/benchmarks/opencl/lbm/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/mri-q/Makefile b/benchmarks/opencl/mri-q/Makefile index c8d3a784..f247235a 100644 --- a/benchmarks/opencl/mri-q/Makefile +++ b/benchmarks/opencl/mri-q/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/nearn/Makefile b/benchmarks/opencl/nearn/Makefile index adde7a1d..1af0e492 100644 --- a/benchmarks/opencl/nearn/Makefile +++ b/benchmarks/opencl/nearn/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/reduce0/Makefile b/benchmarks/opencl/reduce0/Makefile index 580ae60c..72d860e4 100644 --- a/benchmarks/opencl/reduce0/Makefile +++ b/benchmarks/opencl/reduce0/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/sad/Makefile b/benchmarks/opencl/sad/Makefile index d3757322..bd8d2d8a 100644 --- a/benchmarks/opencl/sad/Makefile +++ b/benchmarks/opencl/sad/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/saxpy/Makefile b/benchmarks/opencl/saxpy/Makefile index 2847eb0f..6f6ae366 100644 --- a/benchmarks/opencl/saxpy/Makefile +++ b/benchmarks/opencl/saxpy/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/sfilter/Makefile b/benchmarks/opencl/sfilter/Makefile index d0c6fcdc..edb4aab3 100644 --- a/benchmarks/opencl/sfilter/Makefile +++ b/benchmarks/opencl/sfilter/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/sgemm/Makefile b/benchmarks/opencl/sgemm/Makefile index 36054ba6..ce7a3d1f 100644 --- a/benchmarks/opencl/sgemm/Makefile +++ b/benchmarks/opencl/sgemm/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/spmv/Makefile b/benchmarks/opencl/spmv/Makefile index b554251e..0fdd554a 100644 --- a/benchmarks/opencl/spmv/Makefile +++ b/benchmarks/opencl/spmv/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/stencil/Makefile b/benchmarks/opencl/stencil/Makefile index 85166079..fd6a8687 100644 --- a/benchmarks/opencl/stencil/Makefile +++ b/benchmarks/opencl/stencil/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/transpose/Makefile b/benchmarks/opencl/transpose/Makefile index c2195ac4..3e0e68b0 100644 --- a/benchmarks/opencl/transpose/Makefile +++ b/benchmarks/opencl/transpose/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/opencl/vecadd/Makefile b/benchmarks/opencl/vecadd/Makefile index 63b9ae44..728ffb7b 100644 --- a/benchmarks/opencl/vecadd/Makefile +++ b/benchmarks/opencl/vecadd/Makefile @@ -12,7 +12,7 @@ HEX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy GDB = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gdb VX_SRCS = $(VX_RT_PATH)/newlib/newlib.c -VX_SRCS += $(VX_RT_PATH)/startup/vx_start.s +VX_SRCS += $(VX_RT_PATH)/startup/vx_start.S VX_SRCS += $(VX_RT_PATH)/intrinsics/vx_intrinsics.s VX_SRCS += $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c VX_SRCS += $(VX_RT_PATH)/fileio/fileio.s diff --git a/benchmarks/vector/saxpy/Makefile b/benchmarks/vector/saxpy/Makefile index d0d156ea..51cc0f97 100644 --- a/benchmarks/vector/saxpy/Makefile +++ b/benchmarks/vector/saxpy/Makefile @@ -7,10 +7,10 @@ CC_FLAGS = -ffreestanding -O0 -Wl,--gc-sections -nostartfiles -nostdlib -nostart DMP = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objdump CPY = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objcopy -# VX_STR = ../../startup/vx_start.s +# VX_STR = ../../startup/vx_start.S NEWLIB = $(LIB_PATH)/newlib/newlib.c -VX_STR = $(LIB_PATH)/startup/vx_start.s +VX_STR = $(LIB_PATH)/startup/vx_start.S VX_INT = $(LIB_PATH)/intrinsics/vx_intrinsics.s VX_IO = $(LIB_PATH)/io/vx_io.s $(LIB_PATH)/io/vx_io.c VX_API = $(LIB_PATH)/vx_api/vx_api.c diff --git a/benchmarks/vector/sfilter/Makefile b/benchmarks/vector/sfilter/Makefile index 92e428f5..72ecf281 100644 --- a/benchmarks/vector/sfilter/Makefile +++ b/benchmarks/vector/sfilter/Makefile @@ -7,10 +7,10 @@ CC_FLAGS = -ffreestanding -O0 -Wl,--gc-sections -nostartfiles -nostdlib -nostart DMP = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objdump CPY = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objcopy -# VX_STR = ../../startup/vx_start.s +# VX_STR = ../../startup/vx_start.S NEWLIB = $(LIB_PATH)/newlib/newlib.c -VX_STR = $(LIB_PATH)/startup/vx_start.s +VX_STR = $(LIB_PATH)/startup/vx_start.S VX_INT = $(LIB_PATH)/intrinsics/vx_intrinsics.s VX_IO = $(LIB_PATH)/io/vx_io.s $(LIB_PATH)/io/vx_io.c VX_API = $(LIB_PATH)/vx_api/vx_api.c diff --git a/benchmarks/vector/sgemm_nn/Makefile b/benchmarks/vector/sgemm_nn/Makefile index dcf1cb5d..047f9ef0 100644 --- a/benchmarks/vector/sgemm_nn/Makefile +++ b/benchmarks/vector/sgemm_nn/Makefile @@ -7,10 +7,10 @@ CC_FLAGS = -ffreestanding -O0 -Wl,--gc-sections -nostartfiles -nostdlib -nostart DMP = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objdump CPY = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objcopy -# VX_STR = ../../startup/vx_start.s +# VX_STR = ../../startup/vx_start.S NEWLIB = $(LIB_PATH)/newlib/newlib.c -VX_STR = $(LIB_PATH)/startup/vx_start.s +VX_STR = $(LIB_PATH)/startup/vx_start.S VX_INT = $(LIB_PATH)/intrinsics/vx_intrinsics.s VX_IO = $(LIB_PATH)/io/vx_io.s $(LIB_PATH)/io/vx_io.c VX_API = $(LIB_PATH)/vx_api/vx_api.c diff --git a/benchmarks/vector/vecadd/Makefile b/benchmarks/vector/vecadd/Makefile index 044de576..8a019941 100644 --- a/benchmarks/vector/vecadd/Makefile +++ b/benchmarks/vector/vecadd/Makefile @@ -7,10 +7,10 @@ CC_FLAGS = -ffreestanding -O0 -Wl,--gc-sections -nostartfiles -nostdlib -nostart DMP = /nethome/ekim79/riscv-gnu-toolchain/drops/bin/riscv32-unknown-elf-objdump CPY = /nethome/ekim79/riscv-gnu-toolchain/drops/bin/riscv32-unknown-elf-objcopy -# VX_STR = ../../startup/vx_start.s +# VX_STR = ../../startup/vx_start.S NEWLIB = $(LIB_PATH)/newlib/newlib.c -VX_STR = $(LIB_PATH)/startup/vx_start.s +VX_STR = $(LIB_PATH)/startup/vx_start.S VX_INT = $(LIB_PATH)/intrinsics/vx_intrinsics.s VX_IO = $(LIB_PATH)/io/vx_io.s $(LIB_PATH)/io/vx_io.c VX_API = $(LIB_PATH)/vx_api/vx_api.c diff --git a/driver/sw/include/vortex.h b/driver/sw/include/vortex.h index 6d852382..ea37461b 100644 --- a/driver/sw/include/vortex.h +++ b/driver/sw/include/vortex.h @@ -11,13 +11,18 @@ typedef void* vx_device_h; typedef void* vx_buffer_h; -#define VX_LOCAL_MEM_SIZE 0xffffffff +// device caps ids +#define VX_CAPS_VERSION 0x0 +#define VX_CAPS_MAX_CORES 0x1 +#define VX_CAPS_MAX_WARPS 0x2 +#define VX_CAPS_MAX_THREADS 0x3 +#define VX_CAPS_CACHE_LINESIZE 0x4 +#define VX_CAPS_LOCAL_MEM_SIZE 0x5 +#define VX_CAPS_ALLOC_BASE_ADDR 0x6 +#define VX_CAPS_KERNEL_BASE_ADDR 0x7 -#define VX_ALLOC_BASE_ADDR 0x10000000 - -#define VX_KERNEL_BASE_ADDR 0x80000000 - -#define VX_CACHE_LINESIZE 64 +// return device configurations +int vx_dev_caps(int caps_id); // open the device and connect to it int vx_dev_open(vx_device_h* hdevice); diff --git a/driver/sw/opae/vortex.cpp b/driver/sw/opae/vortex.cpp index f2bf80d8..1f62dcfc 100755 --- a/driver/sw/opae/vortex.cpp +++ b/driver/sw/opae/vortex.cpp @@ -47,7 +47,8 @@ typedef struct vx_buffer_ { } vx_buffer_t; static size_t align_size(size_t size) { - return VX_CACHE_LINESIZE * ((size + VX_CACHE_LINESIZE - 1) / VX_CACHE_LINESIZE); + uint32_t cache_block_size = vx_dev_caps(VX_CAPS_CACHE_LINESIZE); + return cache_block_size * ((size + cache_block_size - 1) / cache_block_size); } /////////////////////////////////////////////////////////////////////////////// @@ -103,7 +104,7 @@ extern int vx_dev_open(vx_device_h* hdevice) { } device->fpga = accel_handle; - device->mem_allocation = VX_ALLOC_BASE_ADDR; + device->mem_allocation = vx_dev_caps(VX_CAPS_ALLOC_BASE_ADDR); *hdevice = device; @@ -133,7 +134,8 @@ extern int vx_alloc_dev_mem(vx_device_h hdevice, size_t size, size_t* dev_maddr) vx_device_t *device = ((vx_device_t*)hdevice); size_t asize = align_size(size); - if (device->mem_allocation + asize > VX_ALLOC_BASE_ADDR) + auto dev_mem_size = vx_dev_caps(VX_CAPS_LOCAL_MEM_SIZE); + if (device->mem_allocation + asize > dev_mem_size) return -1; *dev_maddr = device->mem_allocation; @@ -245,7 +247,7 @@ extern int vx_copy_to_dev(vx_buffer_h hbuffer, size_t dev_maddr, size_t size, si return -1; CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_AVM_ADDRESS, dev_maddr)); - CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_IO_ADDRESS, (buffer->io_addr + src_offset)/VX_CACHE_LINESIZE)); + CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_IO_ADDRESS, buffer->io_addr + src_offset); CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_DATA_SIZE, size)); CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_CMD_TYPE, MMIO_CMD_TYPE_WRITE)); @@ -269,7 +271,7 @@ extern int vx_copy_from_dev(vx_buffer_h hbuffer, size_t dev_maddr, size_t size, return -1; CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_AVM_ADDRESS, dev_maddr)); - CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_IO_ADDRESS, (buffer->io_addr + dest_offset)/VX_CACHE_LINESIZE)); + CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_IO_ADDRESS, buffer->io_addr + dest_offset); CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_COPY_DATA_SIZE, size)); CHECK_RES(fpgaWriteMMIO64(buffer->fpga, 0, MMIO_CMD_TYPE, MMIO_CMD_TYPE_READ)); diff --git a/driver/sw/rtlsim/Makefile b/driver/sw/rtlsim/Makefile index 5fedbe94..5b95c7cb 100644 --- a/driver/sw/rtlsim/Makefile +++ b/driver/sw/rtlsim/Makefile @@ -3,7 +3,7 @@ CFLAGS += -std=c++11 -g -O0 -Wall -Wextra -pedantic -Wfatal-errors #USE_MULTICORE=1 -CFLAGS += -I../../include -I../../../../rtl/simulate +CFLAGS += -I../../include -I../../../../rtl/simulate -I../../../../runtime CFLAGS += -fPIC diff --git a/driver/sw/rtlsim/vortex.cpp b/driver/sw/rtlsim/vortex.cpp index a2b7e107..853fcebe 100644 --- a/driver/sw/rtlsim/vortex.cpp +++ b/driver/sw/rtlsim/vortex.cpp @@ -30,7 +30,8 @@ /////////////////////////////////////////////////////////////////////////////// static size_t align_size(size_t size) { - return VX_CACHE_LINESIZE * ((size + VX_CACHE_LINESIZE - 1) / VX_CACHE_LINESIZE); + uint32_t cache_block_size = vx_dev_caps(VX_CAPS_CACHE_LINESIZE); + return cache_block_size * ((size + cache_block_size - 1) / cache_block_size); } /////////////////////////////////////////////////////////////////////////////// @@ -76,10 +77,10 @@ class vx_device { public: vx_device() : is_done_(false) - , mem_allocation_(VX_ALLOC_BASE_ADDR) , vortex_(&ram_) { vortex_.reset(); thread_ = new std::thread(__thread_proc__, this); + mem_allocation_ = vx_dev_caps(VX_CAPS_ALLOC_BASE_ADDR); } ~vx_device() { @@ -95,7 +96,8 @@ public: int alloc_local_mem(size_t size, size_t* dev_maddr) { size_t asize = align_size(size); - if (mem_allocation_ + asize > VX_LOCAL_MEM_SIZE) + auto dev_mem_size = vx_dev_caps(VX_CAPS_LOCAL_MEM_SIZE); + if (mem_allocation_ + asize > dev_mem_size) return -1; *dev_maddr = mem_allocation_; mem_allocation_ += asize; diff --git a/driver/sw/simx/Makefile b/driver/sw/simx/Makefile index 7b07b3e0..8299fbc2 100644 --- a/driver/sw/simx/Makefile +++ b/driver/sw/simx/Makefile @@ -1,17 +1,12 @@ CFLAGS += -std=c++11 -O3 -Wall -Wextra -pedantic -Wfatal-errors #CFLAGS += -std=c++11 -g -O0 -Wall -Wextra -pedantic -Wfatal-errors -MAX_WARPS ?= 8 -MAX_THREADS ?= 4 - -CFLAGS += -I../../include -I../../../../simX/include +CFLAGS += -I../../include -I../../../../simX/include -I../../../../runtime CFLAGS += -fPIC CFLAGS += -DUSE_SIMX -CFLAGS += -DMAX_WARPS=$(MAX_WARPS) -DMAX_THREADS=$(MAX_THREADS) - LDFLAGS += -shared -pthread SRCS = vortex.cpp ../vx_utils.cpp ../../../simX/args.cpp ../../../simX/mem.cpp ../../../simX/core.cpp ../../../simX/instruction.cpp ../../../simX/enc.cpp ../../../simX/util.cpp diff --git a/driver/sw/simx/libvortex.so b/driver/sw/simx/libvortex.so deleted file mode 100755 index 2302cb62..00000000 Binary files a/driver/sw/simx/libvortex.so and /dev/null differ diff --git a/driver/sw/simx/vortex.cpp b/driver/sw/simx/vortex.cpp index e677accf..a6d03433 100644 --- a/driver/sw/simx/vortex.cpp +++ b/driver/sw/simx/vortex.cpp @@ -8,7 +8,8 @@ #include #include -#include "core.h" +#include +#include #define PAGE_SIZE 4096 @@ -24,7 +25,8 @@ /////////////////////////////////////////////////////////////////////////////// static size_t align_size(size_t size) { - return VX_CACHE_LINESIZE * ((size + VX_CACHE_LINESIZE - 1) / VX_CACHE_LINESIZE); + uint32_t cache_block_size = vx_dev_caps(VX_CAPS_CACHE_LINESIZE); + return cache_block_size * ((size + cache_block_size - 1) / cache_block_size); } /////////////////////////////////////////////////////////////////////////////// @@ -71,9 +73,9 @@ public: vx_device() : is_done_(false) , is_running_(false) - , mem_allocation_(VX_ALLOC_BASE_ADDR) - , thread_(__thread_proc__, this) - {} + , thread_(__thread_proc__, this) { + mem_allocation_ = vx_dev_caps(VX_CAPS_ALLOC_BASE_ADDR); + } ~vx_device() { mutex_.lock(); @@ -84,8 +86,9 @@ public: } int alloc_local_mem(size_t size, size_t* dev_maddr) { - size_t asize = align_size(size); - if (mem_allocation_ + asize > VX_LOCAL_MEM_SIZE) + auto asize = align_size(size); + auto dev_mem_size = vx_dev_caps(VX_CAPS_LOCAL_MEM_SIZE); + if (mem_allocation_ + asize > dev_mem_size) return -1; *dev_maddr = mem_allocation_; mem_allocation_ += asize; @@ -93,7 +96,7 @@ public: } int upload(void* src, size_t dest_addr, size_t size, size_t src_offset) { - size_t asize = align_size(size); + auto asize = align_size(size); if (dest_addr + asize > ram_.size()) return -1; @@ -148,7 +151,7 @@ public: private: void run() { - Harp::ArchDef arch("rv32i", false, MAX_WARPS, MAX_THREADS); + Harp::ArchDef arch("rv32i", NW, NT); Harp::WordDecoder dec(arch); Harp::MemoryUnit mu(PAGE_SIZE, arch.getWordSize(), true); Harp::Core core(arch, dec, mu); diff --git a/driver/sw/vx_utils.cpp b/driver/sw/vx_utils.cpp index 12ebafd3..023f013c 100644 --- a/driver/sw/vx_utils.cpp +++ b/driver/sw/vx_utils.cpp @@ -2,18 +2,45 @@ #include #include #include +#include -int vx_upload_kernel_bytes(vx_device_h device, const void* content, size_t size) { +extern int vx_dev_caps(int caps_id) { + switch (caps_id) { + case VX_CAPS_VERSION: + return 0; + case VX_CAPS_MAX_CORES: + return NUMBER_CORES; + case VX_CAPS_MAX_WARPS: + return NW; + case VX_CAPS_MAX_THREADS: + return NT; + case VX_CAPS_CACHE_LINESIZE: + return GLOBAL_BLOCK_SIZE_BYTES; + case VX_CAPS_LOCAL_MEM_SIZE: + return 0xffffffff; + case VX_CAPS_ALLOC_BASE_ADDR: + return 0x10000000; + case VX_CAPS_KERNEL_BASE_ADDR: + return 0x80000000; + default: + std::cout << "invalid caps id: " << caps_id << std::endl; + std::abort(); + return 0; + } +} + +extern int vx_upload_kernel_bytes(vx_device_h device, const void* content, size_t size) { int err = 0; if (NULL == content || 0 == size) return -1; - static constexpr uint32_t TRANSFER_SIZE = 4096; + uint32_t buffer_transfer_size = 4096; + uint32_t kernel_base_addr = vx_dev_caps(VX_CAPS_KERNEL_BASE_ADDR); // allocate device buffer vx_buffer_h buffer; - err = vx_alloc_shared_mem(device, TRANSFER_SIZE, &buffer); + err = vx_alloc_shared_mem(device, buffer_transfer_size, &buffer); if (err != 0) return -1; @@ -48,9 +75,9 @@ int vx_upload_kernel_bytes(vx_device_h device, const void* content, size_t size) size_t offset = 0; while (offset < size) { - auto chunk_size = std::min(TRANSFER_SIZE, size - offset); + auto chunk_size = std::min(buffer_transfer_size, size - offset); std::memcpy(buf_ptr, (uint8_t*)content + offset, chunk_size); - err = vx_copy_to_dev(buffer, VX_KERNEL_BASE_ADDR + offset, chunk_size, 0); + err = vx_copy_to_dev(buffer, kernel_base_addr + offset, chunk_size, 0); if (err != 0) { vx_buf_release(buffer); return err; @@ -63,7 +90,7 @@ int vx_upload_kernel_bytes(vx_device_h device, const void* content, size_t size) return 0; } -int vx_upload_kernel_file(vx_device_h device, const char* filename) { +extern int vx_upload_kernel_file(vx_device_h device, const char* filename) { std::ifstream ifs(filename); if (!ifs) { std::cout << "error: " << filename << " not found" << std::endl; diff --git a/driver/tests/demo/Makefile b/driver/tests/demo/Makefile index eb603a56..cc505cfc 100644 --- a/driver/tests/demo/Makefile +++ b/driver/tests/demo/Makefile @@ -1,28 +1,23 @@ RISCV_TOOL_PATH ?= $(wildcard ~/dev/riscv-gnu-toolchain/drops) VX_RT_PATH ?= $(wildcard ../../../runtime) -MAX_WARPS ?= 8 -MAX_THREADS ?= 4 - -VX_CC = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gcc -VX_CXX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-g++ -VX_DMP = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objdump -VX_CPY = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy +VX_CC = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-gcc +VX_CXX = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-g++ +VX_DMP = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objdump +VX_CPY = $(RISCV_TOOL_PATH)/bin/riscv32-unknown-elf-objcopy VX_NEWLIB = $(VX_RT_PATH)/newlib/newlib.c -VX_STR = $(VX_RT_PATH)/startup/vx_start.s -VX_INT = $(VX_RT_PATH)/intrinsics/vx_intrinsics.s -VX_IO = $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c -VX_API = $(VX_RT_PATH)/vx_api/vx_api.c -VX_FIO = $(VX_RT_PATH)/fileio/fileio.s +VX_STR = $(VX_RT_PATH)/startup/vx_start.S +VX_INT = $(VX_RT_PATH)/intrinsics/vx_intrinsics.s +VX_IO = $(VX_RT_PATH)/io/vx_io.s $(VX_RT_PATH)/io/vx_io.c +VX_API = $(VX_RT_PATH)/vx_api/vx_api.c +VX_FIO = $(VX_RT_PATH)/fileio/fileio.s -VX_CFLAGS = -v -march=rv32im -mabi=ilp32 -O3 -Wl,-Bstatic,-T,$(VX_RT_PATH)/mains/vortex_link.ld -ffreestanding -nostartfiles -Wl,--gc-sections - -VX_CFLAGS += -DMAX_WARPS=$(MAX_WARPS) -DMAX_THREADS=$(MAX_THREADS) +VX_CFLAGS = -march=rv32im -mabi=ilp32 -O3 -Wl,-Bstatic,-T,$(VX_RT_PATH)/mains/vortex_link.ld -ffreestanding -nostartfiles -Wl,--gc-sections VX_SRCS = kernel.c -CXXFLAGS += -std=c++17 -O0 -g -Wall -Wextra -pedantic -Wfatal-errors +CXXFLAGS += -std=c++11 -O0 -g -Wall -Wextra -pedantic -Wfatal-errors CXXFLAGS += -I../../sw/include @@ -32,32 +27,32 @@ SRCS = demo.cpp all: $(PROJECT) -$(PROJECT).dump: $(PROJECT).elf - $(VX_DMP) -D $(PROJECT).elf > $(PROJECT).dump +kernel.dump: kernel.elf + $(VX_DMP) -D kernel.elf > kernel.dump -$(PROJECT).hex: $(PROJECT).elf - $(VX_CPY) -O ihex $(PROJECT).elf $(PROJECT).hex +kernel.hex: kernel.elf + $(VX_CPY) -O ihex kernel.elf kernel.hex -$(PROJECT).bin: $(PROJECT).elf - $(VX_CPY) -O binary $(PROJECT).elf $(PROJECT).bin +kernel.bin: kernel.elf + $(VX_CPY) -O binary kernel.elf kernel.bin -$(PROJECT).elf: $(SRCS) - $(VX_CC) $(VX_CFLAGS) $(VX_STR) $(VX_FIO) $(VX_NEWLIB) $(VX_INT) $(VX_IO) $(VX_API) $(VX_SRCS) -I$(VX_RT_PATH) -o $(PROJECT).elf +kernel.elf: $(SRCS) + $(VX_CC) $(VX_CFLAGS) $(VX_STR) $(VX_FIO) $(VX_NEWLIB) $(VX_INT) $(VX_IO) $(VX_API) $(VX_SRCS) -I$(VX_RT_PATH) -o kernel.elf $(PROJECT): $(SRCS) $(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -L../../sw/simx -lvortex -o $@ run-fpga: $(PROJECT) - LD_LIBRARY_PATH=../../sw/opae:$(LD_LIBRARY_PATH) ./$(PROJECT) -f $(PROJECT).bin + LD_LIBRARY_PATH=../../sw/opae:$(LD_LIBRARY_PATH) ./$(PROJECT) -f kernel.bin run-ase: $(PROJECT) - LD_LIBRARY_PATH=../../sw/opae/ase:$(LD_LIBRARY_PATH) ./$(PROJECT) -f $(PROJECT).bin + LD_LIBRARY_PATH=../../sw/opae/ase:$(LD_LIBRARY_PATH) ./$(PROJECT) -f kernel.bin run-rtlsim: $(PROJECT) - LD_LIBRARY_PATH=../../sw/rtlsim:$(LD_LIBRARY_PATH) ./$(PROJECT) -f $(PROJECT).bin + LD_LIBRARY_PATH=../../sw/rtlsim:$(LD_LIBRARY_PATH) ./$(PROJECT) -f kernel.bin run-simx: $(PROJECT) - LD_LIBRARY_PATH=../../sw/simx:$(LD_LIBRARY_PATH) ./$(PROJECT) -f $(PROJECT).bin + LD_LIBRARY_PATH=../../sw/simx:$(LD_LIBRARY_PATH) ./$(PROJECT) -f kernel.bin .depend: $(SRCS) $(CXX) $(CXXFLAGS) -MM $^ > .depend; diff --git a/driver/tests/demo/common.h b/driver/tests/demo/common.h new file mode 100644 index 00000000..8241b476 --- /dev/null +++ b/driver/tests/demo/common.h @@ -0,0 +1,23 @@ +#ifndef _COMMON_H_ +#define _COMMON_H_ + +#include "../../../runtime/config.h" + +#define MAX_CORES NUMBER_CORES + +#define MAX_WARPS NW + +#define MAX_THREADS NT + +#define BLOCK_SIZE GLOBAL_BLOCK_SIZE_BYTES + +#define KERNEL_ARG_DEV_MEM_ADDR 0x7fffff00 + +struct kernel_arg_t { + uint32_t src0_ptr; + uint32_t src1_ptr; + uint32_t dst_ptr; + uint32_t stride; +}; + +#endif \ No newline at end of file diff --git a/driver/tests/demo/demo b/driver/tests/demo/demo index be671153..b9a78efd 100755 Binary files a/driver/tests/demo/demo and b/driver/tests/demo/demo differ diff --git a/driver/tests/demo/demo.bin b/driver/tests/demo/demo.bin deleted file mode 100755 index b55b7f61..00000000 Binary files a/driver/tests/demo/demo.bin and /dev/null differ diff --git a/driver/tests/demo/demo.cpp b/driver/tests/demo/demo.cpp index 8902e352..e1b57379 100644 --- a/driver/tests/demo/demo.cpp +++ b/driver/tests/demo/demo.cpp @@ -1,6 +1,9 @@ #include #include +#include +#include #include +#include "common.h" const char* program_file = nullptr; @@ -33,43 +36,161 @@ static void parse_args(int argc, char **argv) { } } +vx_device_h device; +vx_buffer_h buffer; + +void cleanup() { + if (device) { + vx_dev_close(device); + } + if (buffer) { + vx_buf_release(buffer); + } +} + int main(int argc, char *argv[]) { - int err; + int ret; + int errors = 0; + size_t value; + kernel_arg_t kernel_arg; + + uint32_t stride = BLOCK_SIZE / sizeof(uint32_t); + uint32_t num_points = MAX_CORES * MAX_WARPS * MAX_THREADS * stride; + uint32_t buf_size = num_points * sizeof(uint32_t); // parse command arguments parse_args(argc, argv); // open device connection - vx_device_h device; - err = vx_dev_open(&device); - if (err != 0) + std::cout << "open device connection" << std::endl; + ret = vx_dev_open(&device); + if (ret != 0) return -1; // upload program - err = vx_upload_kernel_file(device, program_file); - if (err != 0) { - vx_dev_close(device); + std::cout << "upload program" << std::endl; + ret = vx_upload_kernel_file(device, program_file); + if (ret != 0) { + cleanup(); return -1; } + // allocate device memory + std::cout << "allocate device memory" << std::endl; + + ret = vx_alloc_dev_mem(device, buf_size, &value); + if (ret != 0) { + cleanup(); + return -1; + } + kernel_arg.src0_ptr = value; + + ret = vx_alloc_dev_mem(device, buf_size, &value); + if (ret != 0) { + cleanup(); + return -1; + } + kernel_arg.src1_ptr = value; + + ret = vx_alloc_dev_mem(device, buf_size, &value); + if (ret != 0) { + cleanup(); + return -1; + } + kernel_arg.dst_ptr = value; + + // allocate shared memory + std::cout << "allocate shared memory" << std::endl; + ret = vx_alloc_shared_mem(device, buf_size, &buffer); + if (ret != 0) { + cleanup(); + return -1; + } + + // populate source buffer values + std::cout << "populate source buffer values" << std::endl; + { + auto buf_ptr = (int*)vx_host_ptr(buffer); + for (uint32_t i = 0; i < num_points; ++i) { + buf_ptr[i] = i; + } + } + + // upload source buffers + std::cout << "upload source buffers" << std::endl; + + ret = vx_copy_to_dev(buffer, kernel_arg.src0_ptr, buf_size, 0); + if (ret != 0) { + cleanup(); + return -1; + } + + ret = vx_copy_to_dev(buffer, kernel_arg.src1_ptr, buf_size, 0); + if (ret != 0) { + cleanup(); + return -1; + } + + // upload kernel argument + std::cout << "upload kernel argument" << std::endl; + { + kernel_arg.stride = stride; + + auto buf_ptr = (int*)vx_host_ptr(buffer); + memcpy(buf_ptr, &kernel_arg, sizeof(kernel_arg_t)); + ret = vx_copy_to_dev(buffer, KERNEL_ARG_DEV_MEM_ADDR, sizeof(kernel_arg_t), 0); + if (ret != 0) { + cleanup(); + return -1; + } + } + // start device - err = vx_start(device); - if (err != 0) { - vx_dev_close(device); + std::cout << "start device" << std::endl; + ret = vx_start(device); + if (ret != 0) { + cleanup(); return -1; } // wait for completion - err = vx_ready_wait(device, -1); - if (err != 0) { - vx_dev_close(device); + std::cout << "wait for completion" << std::endl; + ret = vx_ready_wait(device, -1); + if (ret != 0) { + cleanup(); return -1; } - // close device - vx_dev_close(device); + // download destination buffer + std::cout << "download destination buffer" << std::endl; + ret = vx_copy_from_dev(buffer, kernel_arg.dst_ptr, buf_size, 0); + if (ret != 0) { + cleanup(); + return -1; + } - printf("done!\n"); + // verify result + std::cout << "verify result" << std::endl; + { + auto buf_ptr = (int*)vx_host_ptr(buffer); + for (uint32_t i = 0; i < num_points; ++i) { + int ref = i * i; + int cur = buf_ptr[i]; + if (cur != ref) { + ++errors; + } + } + } - return 0; + // cleanup + std::cout << "cleanup" << std::endl; + cleanup(); + + if (0 == errors) { + printf("PASSED!\n"); + } else { + printf("FAILED!\n"); + } + + return errors; } \ No newline at end of file diff --git a/driver/tests/demo/demo.elf b/driver/tests/demo/demo.elf deleted file mode 100755 index 4e27beab..00000000 Binary files a/driver/tests/demo/demo.elf and /dev/null differ diff --git a/driver/tests/demo/demo.hex b/driver/tests/demo/demo.hex deleted file mode 100644 index 597b6528..00000000 --- a/driver/tests/demo/demo.hex +++ /dev/null @@ -1,269 +0,0 @@ -:0200000480007A -:10000000970500009385C50B130540006B10B500E4 -:10001000EF00C00A130510006B0005001385C1C373 -:10002000138601C43306A64093050000EF00901329 -:10003000171500001305C583EF00007FEF00D008FF -:08004000EF0080006F00807FDB -:10004800130101FF2326110023248100EF004073D0 -:100058001304050013142400EF0000733304A400F4 -:100068001315240037070010B7070020B387A7002F -:100078003307A70083A60700032707008320C100D2 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-:1012080000000000000000000000000000000000D6 -:1012180000000000000000000000000000000000C6 -:1012280000000000000000000000000000000000B6 -:1012380000000000000000000000000000000000A6 -:101248000000000000000000000000000000000096 -:101258000000000000000000000000000000000086 -:101268000000000000000000000000000000000076 -:101278000000000000000000000000000000000066 -:101288000000000000000000000000000000000056 -:101298000000000000000000000000000000000046 -:1012A8000000000000000000000000000000000036 -:1012B8000000000000000000000000000000000026 -:1012C8000000000000000000000000000000000016 -:1012D8000000000000000000000000000000000006 -:1012E80000000000000000000000000000000000F6 -:1012F80000000000000000000000000000000000E6 -:1013080000000000000000000000000000000000D5 -:1013180000000000000000000000000000000000C5 -:1013280000000000000000000000000000000000B5 -:1013380000000000000000000000000000000000A5 -:101348000000000000000000000000000000000095 -:101358000000000000000000000000000000000085 -:101368000000000000000000000000000000000075 -:101378000000000000000000000000000000000065 -:101388000000000000000000000000000000000055 -:101398000000000000000000000000000000000045 -:1013A8000000000000000000000000000000000035 -:1013B8000000000000000000000000000000000025 -:1013C8000000000000000000000000000000000015 -:1013D8000000000000000000000000000000000005 -:1013E80000000000000000000000000000000000F5 -:1013F80000000000000000000000000000000000E5 -:1014080000000000000000000000000000000000D4 -:1014180000000000000000000000000000000000C4 -:1014280000000000000000000000000000000000B4 -:0C14380010100080000000100000007088 -:040000058000000077 -:00000001FF diff --git a/driver/tests/demo/kernel.c b/driver/tests/demo/kernel.c index a3b6860e..2c3b555b 100644 --- a/driver/tests/demo/kernel.c +++ b/driver/tests/demo/kernel.c @@ -1,25 +1,26 @@ #include #include #include "intrinsics/vx_intrinsics.h" +#include "vx_api/vx_api.h" +#include "common.h" -void main() { - unsigned *x = (unsigned*)0x10000000; - unsigned *y = (unsigned*)0x20000000; - unsigned *z = (unsigned*)0x30000000; - - unsigned wid = vx_warpID(); +void kernel_body(void* arg) { + struct kernel_arg_t* _arg = (struct kernel_arg_t*)(arg); + int* x = (int*)_arg->src0_ptr; + int* y = (int*)_arg->src1_ptr; + int* z = (int*)_arg->dst_ptr; + unsigned wNo = vx_warpNum(); unsigned tid = vx_threadID(); - unsigned i = (wid * MAX_THREADS) + tid; + unsigned i = ((wNo * MAX_THREADS) + tid) * _arg->stride; - //if (i == 0) { - // printf("begin\n"); - //} + for (unsigned j = 0; j < _arg->stride; ++j) { + z[i+j] = x[i+j] * y[i+j]; + } +} - z[i] = x[i] + y[i]; - - //if (i == 0) { - // printf("end\n"); - //} +void main() { + struct kernel_arg_t* arg = (struct kernel_arg_t*)KERNEL_ARG_DEV_MEM_ADDR; + vx_spawnWarps(MAX_WARPS, MAX_THREADS, kernel_body, arg); } \ No newline at end of file diff --git a/driver/tests/demo/run.log b/driver/tests/demo/run.log index 2e3de7ad..f78a5231 100644 --- a/driver/tests/demo/run.log +++ b/driver/tests/demo/run.log @@ -1,23301 +1,30 @@ -LD_LIBRARY_PATH=../../sim/obj_dir:/home/blaise/dev/cash/build/lib:/opt/systemc/lib:/home/blaise/dev/cash/build/lib:/opt/systemc/lib: ./demo_sim -f demo.bin +LD_LIBRARY_PATH=../../sw/simx:/home/blaise/dev/cash/build/lib:/opt/systemc/lib: ./demo -f kernel.bin +open device connection +upload program Device ready... -VXDRV: upload 20 bytes to 0x0 -mem-write: 0x0 <- 0xf1401073 -mem-write: 0x4 <- 0xf1401073 -mem-write: 0x8 <- 0x30101073 -mem-write: 0xc <- 0x800000b7 -mem-write: 0x10 <- 0x80e7 -VXDRV: upload 4 bytes to 0x70000000 -mem-write: 0x70000000 <- 0x8067 -VXDRV: upload 1024 bytes to 0x80000000 -mem-write: 0x80000000 <- 0x597 -mem-write: 0x80000004 <- 0xd458593 -mem-write: 0x80000008 <- 0x2000513 -mem-write: 0x8000000c <- 0xb5106b -mem-write: 0x80000010 <- 0xc4000ef -mem-write: 0x80000014 <- 0x100513 -mem-write: 0x80000018 <- 0x5006b -mem-write: 0x8000001c <- 0x1e418513 -mem-write: 0x80000020 <- 0x24c18613 -mem-write: 0x80000024 <- 0x40a60633 -mem-write: 0x80000028 <- 0x593 -mem-write: 0x8000002c <- 0x5ed000ef -mem-write: 0x80000030 <- 0x1517 -mem-write: 0x80000034 <- 0xcf050513 -mem-write: 0x80000038 <- 0x4a5000ef -mem-write: 0x8000003c <- 0x541000ef -mem-write: 0x80000040 <- 0x8000ef -mem-write: 0x80000044 <- 0x4ad0006f -mem-write: 0x80000048 <- 0xfd010113 -mem-write: 0x8000004c <- 0x100513 -mem-write: 0x80000050 <- 0x2112623 -mem-write: 0x80000054 <- 0x72c000ef -mem-write: 0x80000058 <- 0x80015537 -mem-write: 0x8000005c <- 0xa0450513 -mem-write: 0x80000060 <- 0x6d5000ef -mem-write: 0x80000064 <- 0x1d41a883 -mem-write: 0x80000068 <- 0x1d01a803 -mem-write: 0x8000006c <- 0x1cc1a703 -mem-write: 0x80000070 <- 0x80001637 -mem-write: 0x80000074 <- 0x40000793 -mem-write: 0x80000078 <- 0xc10693 -mem-write: 0x8000007c <- 0xc2c60613 -mem-write: 0x80000080 <- 0x400593 -mem-write: 0x80000084 <- 0x400513 -mem-write: 0x80000088 <- 0x1112623 -mem-write: 0x8000008c <- 0x1012823 -mem-write: 0x80000090 <- 0xe12a23 -mem-write: 0x80000094 <- 0xf12c23 -mem-write: 0x80000098 <- 0xf12e23 -mem-write: 0x8000009c <- 0x245000ef -mem-write: 0x800000a0 <- 0x80015537 -mem-write: 0x800000a4 <- 0xa1c50513 -mem-write: 0x800000a8 <- 0x68d000ef -mem-write: 0x800000ac <- 0x2c12083 -mem-write: 0x800000b0 <- 0x513 -mem-write: 0x800000b4 <- 0x3010113 -mem-write: 0x800000b8 <- 0x8067 -mem-write: 0x800000bc <- 0x793 -mem-write: 0x800000c0 <- 0x78863 -mem-write: 0x800000c4 <- 0x80001537 -mem-write: 0x800000c8 <- 0xd2050513 -mem-write: 0x800000cc <- 0x4110006f -mem-write: 0x800000d0 <- 0x8067 -mem-write: 0x800000d4 <- 0x2000513 -mem-write: 0x800000d8 <- 0x5006b -mem-write: 0x800000dc <- 0x16197 -mem-write: 0x800000e0 <- 0x72c18193 -mem-write: 0x800000e4 <- 0x21026f3 -mem-write: 0x800000e8 <- 0x1a69693 -mem-write: 0x800000ec <- 0x2002673 -mem-write: 0x800000f0 <- 0xa61593 -mem-write: 0x800000f4 <- 0x261613 -mem-write: 0x800000f8 <- 0x6ffff137 -mem-write: 0x800000fc <- 0x40b10133 -mem-write: 0x80000100 <- 0x40d10133 -mem-write: 0x80000104 <- 0xc10133 -mem-write: 0x80000108 <- 0x21026f3 -mem-write: 0x8000010c <- 0x68663 -mem-write: 0x80000110 <- 0x513 -mem-write: 0x80000114 <- 0x5006b -mem-write: 0x80000118 <- 0x8067 -mem-write: 0x8000011c <- 0x52783 -mem-write: 0x80000120 <- 0x865813 -mem-write: 0x80000124 <- 0x1065693 -mem-write: 0x80000128 <- 0x1865713 -mem-write: 0x8000012c <- 0xc78023 -mem-write: 0x80000130 <- 0x10780a3 -mem-write: 0x80000134 <- 0xd78123 -mem-write: 0x80000138 <- 0xe781a3 -mem-write: 0x8000013c <- 0x478893 -mem-write: 0x80000140 <- 0xac05263 -mem-write: 0x80000144 <- 0x878813 -mem-write: 0x80000148 <- 0x105b833 -mem-write: 0x8000014c <- 0xb7b6b3 -mem-write: 0x80000150 <- 0xfff60713 -mem-write: 0x80000154 <- 0x184813 -mem-write: 0x80000158 <- 0x16c693 -mem-write: 0x8000015c <- 0x973713 -mem-write: 0x80000160 <- 0xd866b3 -mem-write: 0x80000164 <- 0x174713 -mem-write: 0x80000168 <- 0xd77733 -mem-write: 0x8000016c <- 0x8070463 -mem-write: 0x80000170 <- 0xb8e733 -mem-write: 0x80000174 <- 0x377713 -mem-write: 0x80000178 <- 0x6071e63 -mem-write: 0x8000017c <- 0xffc67813 -mem-write: 0x80000180 <- 0x58793 -mem-write: 0x80000184 <- 0x88713 -mem-write: 0x80000188 <- 0xb80833 -mem-write: 0x8000018c <- 0x7a683 -mem-write: 0x80000190 <- 0x478793 -mem-write: 0x80000194 <- 0x470713 -mem-write: 0x80000198 <- 0xfed72e23 -mem-write: 0x8000019c <- 0xff0798e3 -mem-write: 0x800001a0 <- 0xffc67793 -mem-write: 0x800001a4 <- 0xf886b3 -mem-write: 0x800001a8 <- 0x2f60c63 -mem-write: 0x800001ac <- 0xf58733 -mem-write: 0x800001b0 <- 0x74803 -mem-write: 0x800001b4 <- 0x178713 -mem-write: 0x800001b8 <- 0x1068023 -mem-write: 0x800001bc <- 0x2c75263 -mem-write: 0x800001c0 <- 0xe58733 -mem-write: 0x800001c4 <- 0x74703 -mem-write: 0x800001c8 <- 0x278793 -mem-write: 0x800001cc <- 0xe680a3 -mem-write: 0x800001d0 <- 0xc7d863 -mem-write: 0x800001d4 <- 0xf587b3 -mem-write: 0x800001d8 <- 0x7c783 -mem-write: 0x800001dc <- 0xf68123 -mem-write: 0x800001e0 <- 0xc888b3 -mem-write: 0x800001e4 <- 0x38f793 -mem-write: 0x800001e8 <- 0x11788b3 -mem-write: 0x800001ec <- 0x1152023 -mem-write: 0x800001f0 <- 0x8067 -mem-write: 0x800001f4 <- 0x460713 -mem-write: 0x800001f8 <- 0xe787b3 -mem-write: 0x800001fc <- 0x88713 -mem-write: 0x80000200 <- 0x5c683 -mem-write: 0x80000204 <- 0x170713 -mem-write: 0x80000208 <- 0x158593 -mem-write: 0x8000020c <- 0xfed70fa3 -mem-write: 0x80000210 <- 0xfef718e3 -mem-write: 0x80000214 <- 0xfcdff06f -mem-write: 0x80000218 <- 0x52783 -mem-write: 0x8000021c <- 0xff010113 -mem-write: 0x80000220 <- 0x7c803 -mem-write: 0x80000224 <- 0x17c603 -mem-write: 0x80000228 <- 0x27c683 -mem-write: 0x8000022c <- 0x37c703 -mem-write: 0x80000230 <- 0x1010623 -mem-write: 0x80000234 <- 0xc106a3 -mem-write: 0x80000238 <- 0xd10723 -mem-write: 0x8000023c <- 0xe107a3 -mem-write: 0x80000240 <- 0xc12883 -mem-write: 0x80000244 <- 0x478813 -mem-write: 0x80000248 <- 0xb105263 -mem-write: 0x8000024c <- 0x878613 -mem-write: 0x80000250 <- 0xc5b633 -mem-write: 0x80000254 <- 0xb7b6b3 -mem-write: 0x80000258 <- 0xfff88713 -mem-write: 0x8000025c <- 0x164613 -mem-write: 0x80000260 <- 0x16c693 -mem-write: 0x80000264 <- 0x973713 -mem-write: 0x80000268 <- 0xd666b3 -mem-write: 0x8000026c <- 0x174713 -mem-write: 0x80000270 <- 0xd77733 -mem-write: 0x80000274 <- 0x8070663 -mem-write: 0x80000278 <- 0x105e733 -mem-write: 0x8000027c <- 0x377713 -mem-write: 0x80000280 <- 0x8071063 -mem-write: 0x80000284 <- 0xffc8f613 -mem-write: 0x80000288 <- 0x80713 -mem-write: 0x8000028c <- 0x58793 -mem-write: 0x80000290 <- 0xb60633 -mem-write: 0x80000294 <- 0x72683 -mem-write: 0x80000298 <- 0x478793 -mem-write: 0x8000029c <- 0x470713 -mem-write: 0x800002a0 <- 0xfed7ae23 -mem-write: 0x800002a4 <- 0xfec798e3 -mem-write: 0x800002a8 <- 0xffc8f793 -mem-write: 0x800002ac <- 0xf806b3 -mem-write: 0x800002b0 <- 0x2f88c63 -mem-write: 0x800002b4 <- 0x6c303 -mem-write: 0x800002b8 <- 0xf58633 -mem-write: 0x800002bc <- 0x178713 -mem-write: 0x800002c0 <- 0x660023 -mem-write: 0x800002c4 <- 0x3175263 -mem-write: 0x800002c8 <- 0x16c603 -mem-write: 0x800002cc <- 0xe58733 -mem-write: 0x800002d0 <- 0x278793 -mem-write: 0x800002d4 <- 0xc70023 -mem-write: 0x800002d8 <- 0x117d863 -mem-write: 0x800002dc <- 0x26c703 -mem-write: 0x800002e0 <- 0xf587b3 -mem-write: 0x800002e4 <- 0xe78023 -mem-write: 0x800002e8 <- 0x1180833 -mem-write: 0x800002ec <- 0x387793 -mem-write: 0x800002f0 <- 0x1078833 -mem-write: 0x800002f4 <- 0x1052023 -mem-write: 0x800002f8 <- 0x1010113 -mem-write: 0x800002fc <- 0x8067 -mem-write: 0x80000300 <- 0x488713 -mem-write: 0x80000304 <- 0xe787b3 -mem-write: 0x80000308 <- 0x80713 -mem-write: 0x8000030c <- 0x74683 -mem-write: 0x80000310 <- 0x170713 -mem-write: 0x80000314 <- 0x158593 -mem-write: 0x80000318 <- 0xfed58fa3 -mem-write: 0x8000031c <- 0xfef718e3 -mem-write: 0x80000320 <- 0xfc9ff06f -mem-write: 0x80000324 <- 0x8067 -mem-write: 0x80000328 <- 0x27b7 -mem-write: 0x8000032c <- 0xf5a223 -mem-write: 0x80000330 <- 0x513 -mem-write: 0x80000334 <- 0x8067 -mem-write: 0x80000338 <- 0x100513 -mem-write: 0x8000033c <- 0x8067 -mem-write: 0x80000340 <- 0xfe010113 -mem-write: 0x80000344 <- 0x112e23 -mem-write: 0x80000348 <- 0x710007b7 -mem-write: 0x8000034c <- 0x400713 -mem-write: 0x80000350 <- 0x865893 -mem-write: 0x80000354 <- 0x1065813 -mem-write: 0x80000358 <- 0x1865693 -mem-write: 0x8000035c <- 0x85de93 -mem-write: 0x80000360 <- 0x105de13 -mem-write: 0x80000364 <- 0x185d313 -mem-write: 0x80000368 <- 0x300f13 -mem-write: 0x8000036c <- 0xe7a023 -mem-write: 0x80000370 <- 0xe78823 -mem-write: 0x80000374 <- 0xe7a423 -mem-write: 0x80000378 <- 0xe78c23 -mem-write: 0x8000037c <- 0x1e78223 -mem-write: 0x80000380 <- 0x782a3 -mem-write: 0x80000384 <- 0x79323 -mem-write: 0x80000388 <- 0xa7a623 -mem-write: 0x8000038c <- 0x788a3 -mem-write: 0x80000390 <- 0x78923 -mem-write: 0x80000394 <- 0x789a3 -mem-write: 0x80000398 <- 0x78ca3 -mem-write: 0x8000039c <- 0x78d23 -mem-write: 0x800003a0 <- 0x78da3 -mem-write: 0x800003a4 <- 0xc78e23 -mem-write: 0x800003a8 <- 0xb78a23 -mem-write: 0x800003ac <- 0x1d78aa3 -mem-write: 0x800003b0 <- 0x1c78b23 -mem-write: 0x800003b4 <- 0x678ba3 -mem-write: 0x800003b8 <- 0x1178ea3 -mem-write: 0x800003bc <- 0x1078f23 -mem-write: 0x800003c0 <- 0xd78fa3 -mem-write: 0x800003c4 <- 0x1c81a783 -mem-write: 0x800003c8 <- 0x780e7 -mem-write: 0x800003cc <- 0x720007b7 -mem-write: 0x800003d0 <- 0x7c703 -mem-write: 0x800003d4 <- 0xe10623 -mem-write: 0x800003d8 <- 0x17c703 -mem-write: 0x800003dc <- 0xe106a3 -mem-write: 0x800003e0 <- 0x27c703 -mem-write: 0x800003e4 <- 0xe10723 -mem-write: 0x800003e8 <- 0x37c703 -mem-write: 0x800003ec <- 0xe107a3 -mem-write: 0x800003f0 <- 0xc12603 -mem-write: 0x800003f4 <- 0x2c05863 -mem-write: 0x800003f8 <- 0x478793 -mem-write: 0x800003fc <- 0x8e0005b7 -VXDRV: upload 1024 bytes to 0x80000400 -mem-write: 0x80000400 <- 0xf60633 -mem-write: 0x80000404 <- 0xffc58593 -mem-write: 0x80000408 <- 0x7c683 -mem-write: 0x8000040c <- 0xb78733 -mem-write: 0x80000410 <- 0x810513 -mem-write: 0x80000414 <- 0xe50733 -mem-write: 0x80000418 <- 0xd70023 -mem-write: 0x8000041c <- 0x178793 -mem-write: 0x80000420 <- 0xfec794e3 -mem-write: 0x80000424 <- 0x1c12083 -mem-write: 0x80000428 <- 0x812503 -mem-write: 0x8000042c <- 0x2010113 -mem-write: 0x80000430 <- 0x8067 -mem-write: 0x80000434 <- 0xff010113 -mem-write: 0x80000438 <- 0x812423 -mem-write: 0x8000043c <- 0x60413 -mem-write: 0x80000440 <- 0x112623 -mem-write: 0x80000444 <- 0x710007b7 -mem-write: 0x80000448 <- 0x400713 -mem-write: 0x8000044c <- 0x865813 -mem-write: 0x80000450 <- 0x1845693 -mem-write: 0x80000454 <- 0x85de13 -mem-write: 0x80000458 <- 0x105d313 -mem-write: 0x8000045c <- 0x185d893 -mem-write: 0x80000460 <- 0x1065613 -mem-write: 0x80000464 <- 0xa7a623 -mem-write: 0x80000468 <- 0xe7a023 -mem-write: 0x8000046c <- 0xe78223 -mem-write: 0x80000470 <- 0x782a3 -mem-write: 0x80000474 <- 0xe78823 -mem-write: 0x80000478 <- 0x79323 -mem-write: 0x8000047c <- 0xe7a423 -mem-write: 0x80000480 <- 0x788a3 -mem-write: 0x80000484 <- 0x78923 -mem-write: 0x80000488 <- 0x789a3 -mem-write: 0x8000048c <- 0xe78c23 -mem-write: 0x80000490 <- 0x78ca3 -mem-write: 0x80000494 <- 0x78d23 -mem-write: 0x80000498 <- 0x78da3 -mem-write: 0x8000049c <- 0x878e23 -mem-write: 0x800004a0 <- 0xb78a23 -mem-write: 0x800004a4 <- 0x1c78aa3 -mem-write: 0x800004a8 <- 0x678b23 -mem-write: 0x800004ac <- 0x1178ba3 -mem-write: 0x800004b0 <- 0x1078ea3 -mem-write: 0x800004b4 <- 0xc78f23 -mem-write: 0x800004b8 <- 0xd78fa3 -mem-write: 0x800004bc <- 0x1c81a783 -mem-write: 0x800004c0 <- 0x780e7 -mem-write: 0x800004c4 <- 0xc12083 -mem-write: 0x800004c8 <- 0x40513 -mem-write: 0x800004cc <- 0x812403 -mem-write: 0x800004d0 <- 0x1010113 -mem-write: 0x800004d4 <- 0x8067 -mem-write: 0x800004d8 <- 0xff010113 -mem-write: 0x800004dc <- 0x812423 -mem-write: 0x800004e0 <- 0x710007b7 -mem-write: 0x800004e4 <- 0x112623 -mem-write: 0x800004e8 <- 0x60413 -mem-write: 0x800004ec <- 0x400713 -mem-write: 0x800004f0 <- 0x500313 -mem-write: 0x800004f4 <- 0x1078813 -mem-write: 0x800004f8 <- 0xe7a023 -mem-write: 0x800004fc <- 0x678223 -mem-write: 0x80000500 <- 0x782a3 -mem-write: 0x80000504 <- 0x878823 -mem-write: 0x80000508 <- 0x865893 -mem-write: 0x8000050c <- 0x1845693 -mem-write: 0x80000510 <- 0x1065613 -mem-write: 0x80000514 <- 0x11800a3 -mem-write: 0x80000518 <- 0xc80123 -mem-write: 0x8000051c <- 0xd801a3 -mem-write: 0x80000520 <- 0x79323 -mem-write: 0x80000524 <- 0xe7a423 -mem-write: 0x80000528 <- 0xa7a623 -mem-write: 0x8000052c <- 0xa805263 -mem-write: 0x80000530 <- 0x1478693 -mem-write: 0x80000534 <- 0x1878793 -mem-write: 0x80000538 <- 0xf5b7b3 -mem-write: 0x8000053c <- 0xb83533 -mem-write: 0x80000540 <- 0xfff40613 -mem-write: 0x80000544 <- 0x17c713 -mem-write: 0x80000548 <- 0x963613 -mem-write: 0x8000054c <- 0x154793 -mem-write: 0x80000550 <- 0xf767b3 -mem-write: 0x80000554 <- 0x164713 -mem-write: 0x80000558 <- 0xf777b3 -mem-write: 0x8000055c <- 0x8078863 -mem-write: 0x80000560 <- 0xb6e7b3 -mem-write: 0x80000564 <- 0x37f793 -mem-write: 0x80000568 <- 0x8079263 -mem-write: 0x8000056c <- 0xffc47513 -mem-write: 0x80000570 <- 0xb50533 -mem-write: 0x80000574 <- 0x58793 -mem-write: 0x80000578 <- 0x40b68833 -mem-write: 0x8000057c <- 0x7a603 -mem-write: 0x80000580 <- 0xf80733 -mem-write: 0x80000584 <- 0x478793 -mem-write: 0x80000588 <- 0xc72023 -mem-write: 0x8000058c <- 0xfef518e3 -mem-write: 0x80000590 <- 0xffc47793 -mem-write: 0x80000594 <- 0xf686b3 -mem-write: 0x80000598 <- 0x2f40c63 -mem-write: 0x8000059c <- 0xf58733 -mem-write: 0x800005a0 <- 0x74603 -mem-write: 0x800005a4 <- 0x178713 -mem-write: 0x800005a8 <- 0xc68023 -mem-write: 0x800005ac <- 0x2875263 -mem-write: 0x800005b0 <- 0xe58733 -mem-write: 0x800005b4 <- 0x74703 -mem-write: 0x800005b8 <- 0x278793 -mem-write: 0x800005bc <- 0xe680a3 -mem-write: 0x800005c0 <- 0x87d863 -mem-write: 0x800005c4 <- 0xf587b3 -mem-write: 0x800005c8 <- 0x7c783 -mem-write: 0x800005cc <- 0xf68123 -mem-write: 0x800005d0 <- 0x1c81a783 -mem-write: 0x800005d4 <- 0x780e7 -mem-write: 0x800005d8 <- 0xc12083 -mem-write: 0x800005dc <- 0x40513 -mem-write: 0x800005e0 <- 0x812403 -mem-write: 0x800005e4 <- 0x1010113 -mem-write: 0x800005e8 <- 0x8067 -mem-write: 0x800005ec <- 0x480713 -mem-write: 0x800005f0 <- 0x870733 -mem-write: 0x800005f4 <- 0x410687b3 -mem-write: 0x800005f8 <- 0xf587b3 -mem-write: 0x800005fc <- 0xffc7c783 -mem-write: 0x80000600 <- 0x168693 -mem-write: 0x80000604 <- 0xfef68fa3 -mem-write: 0x80000608 <- 0xfed716e3 -mem-write: 0x8000060c <- 0xfc5ff06f -mem-write: 0x80000610 <- 0x50793 -mem-write: 0x80000614 <- 0x1c41a503 -mem-write: 0x80000618 <- 0x41f7d693 -mem-write: 0x8000061c <- 0xf6c7b3 -mem-write: 0x80000620 <- 0x40d787b3 -mem-write: 0x80000624 <- 0xa787b3 -mem-write: 0x80000628 <- 0x1cf1a223 -mem-write: 0x8000062c <- 0x8067 -mem-write: 0x80000630 <- 0x513 -mem-write: 0x80000634 <- 0x14c0006f -mem-write: 0x80000638 <- 0xfe010113 -mem-write: 0x8000063c <- 0x112e23 -mem-write: 0x80000640 <- 0x710007b7 -mem-write: 0x80000644 <- 0x400713 -mem-write: 0x80000648 <- 0x865893 -mem-write: 0x8000064c <- 0x1065813 -mem-write: 0x80000650 <- 0x1865693 -mem-write: 0x80000654 <- 0x855293 -mem-write: 0x80000658 <- 0x1055f93 -mem-write: 0x8000065c <- 0x1855f13 -mem-write: 0x80000660 <- 0x85de93 -mem-write: 0x80000664 <- 0x105de13 -mem-write: 0x80000668 <- 0x185d313 -mem-write: 0x8000066c <- 0x700393 -mem-write: 0x80000670 <- 0xe7a023 -mem-write: 0x80000674 <- 0xe78823 -mem-write: 0x80000678 <- 0xe7a423 -mem-write: 0x8000067c <- 0xe78c23 -mem-write: 0x80000680 <- 0x778223 -mem-write: 0x80000684 <- 0x782a3 -mem-write: 0x80000688 <- 0x79323 -mem-write: 0x8000068c <- 0xa78623 -mem-write: 0x80000690 <- 0x5786a3 -mem-write: 0x80000694 <- 0x1f78723 -mem-write: 0x80000698 <- 0x1e787a3 -mem-write: 0x8000069c <- 0x788a3 -mem-write: 0x800006a0 <- 0x78923 -mem-write: 0x800006a4 <- 0x789a3 -mem-write: 0x800006a8 <- 0x78ca3 -mem-write: 0x800006ac <- 0x78d23 -mem-write: 0x800006b0 <- 0x78da3 -mem-write: 0x800006b4 <- 0xc78e23 -mem-write: 0x800006b8 <- 0xb78a23 -mem-write: 0x800006bc <- 0x1d78aa3 -mem-write: 0x800006c0 <- 0x1c78b23 -mem-write: 0x800006c4 <- 0x678ba3 -mem-write: 0x800006c8 <- 0x1178ea3 -mem-write: 0x800006cc <- 0x1078f23 -mem-write: 0x800006d0 <- 0xd78fa3 -mem-write: 0x800006d4 <- 0x1c81a783 -mem-write: 0x800006d8 <- 0x780e7 -mem-write: 0x800006dc <- 0x720007b7 -mem-write: 0x800006e0 <- 0x7c703 -mem-write: 0x800006e4 <- 0xe10623 -mem-write: 0x800006e8 <- 0x17c703 -mem-write: 0x800006ec <- 0xe106a3 -mem-write: 0x800006f0 <- 0x27c703 -mem-write: 0x800006f4 <- 0xe10723 -mem-write: 0x800006f8 <- 0x37c703 -mem-write: 0x800006fc <- 0xe107a3 -mem-write: 0x80000700 <- 0xc12603 -mem-write: 0x80000704 <- 0x2c05863 -mem-write: 0x80000708 <- 0x478793 -mem-write: 0x8000070c <- 0x8e0005b7 -mem-write: 0x80000710 <- 0xf60633 -mem-write: 0x80000714 <- 0xffc58593 -mem-write: 0x80000718 <- 0x7c683 -mem-write: 0x8000071c <- 0xb78733 -mem-write: 0x80000720 <- 0x810513 -mem-write: 0x80000724 <- 0xe50733 -mem-write: 0x80000728 <- 0xd70023 -mem-write: 0x8000072c <- 0x178793 -mem-write: 0x80000730 <- 0xfec794e3 -mem-write: 0x80000734 <- 0x1c12083 -mem-write: 0x80000738 <- 0x812503 -mem-write: 0x8000073c <- 0x2010113 -mem-write: 0x80000740 <- 0x8067 -mem-write: 0x80000744 <- 0x513 -mem-write: 0x80000748 <- 0x380006f -mem-write: 0x8000074c <- 0x5c0006f -mem-write: 0x80000750 <- 0x80015537 -mem-write: 0x80000754 <- 0x93850513 -mem-write: 0x80000758 <- 0xa80006f -mem-write: 0x8000075c <- 0x1e41a503 -mem-write: 0x80000760 <- 0x150713 -mem-write: 0x80000764 <- 0x1ee1a223 -mem-write: 0x80000768 <- 0x8067 -mem-write: 0x8000076c <- 0x80015537 -mem-write: 0x80000770 <- 0x95c50513 -mem-write: 0x80000774 <- 0x8c0006f -mem-write: 0x80000778 <- 0xb5106b -mem-write: 0x8000077c <- 0x8067 -mem-write: 0x80000780 <- 0x5006b -mem-write: 0x80000784 <- 0x8067 -mem-write: 0x80000788 <- 0xb5406b -mem-write: 0x8000078c <- 0x8067 -mem-write: 0x80000790 <- 0x5206b -mem-write: 0x80000794 <- 0x8067 -mem-write: 0x80000798 <- 0x306b -mem-write: 0x8000079c <- 0x8067 -mem-write: 0x800007a0 <- 0x2102573 -mem-write: 0x800007a4 <- 0x8067 -mem-write: 0x800007a8 <- 0x2002573 -mem-write: 0x800007ac <- 0x8067 -mem-write: 0x800007b0 <- 0x2602573 -mem-write: 0x800007b4 <- 0x8067 -mem-write: 0x800007b8 <- 0x2502573 -mem-write: 0x800007bc <- 0x8067 -mem-write: 0x800007c0 <- 0x400513 -mem-write: 0x800007c4 <- 0x5006b -mem-write: 0x800007c8 <- 0x21026f3 -mem-write: 0x800007cc <- 0xf69693 -mem-write: 0x800007d0 <- 0x2002673 -mem-write: 0x800007d4 <- 0xa61593 -mem-write: 0x800007d8 <- 0x261613 -mem-write: 0x800007dc <- 0x6ffff137 -mem-write: 0x800007e0 <- 0x40b10133 -mem-write: 0x800007e4 <- 0x40d10133 -mem-write: 0x800007e8 <- 0xc10133 -mem-write: 0x800007ec <- 0x21026f3 -mem-write: 0x800007f0 <- 0x68663 -mem-write: 0x800007f4 <- 0x513 -mem-write: 0x800007f8 <- 0x5006b -mem-write: 0x800007fc <- 0x8067 -VXDRV: upload 1024 bytes to 0x80000800 -mem-write: 0x80000800 <- 0xff410113 -mem-write: 0x80000804 <- 0x112023 -mem-write: 0x80000808 <- 0xb12223 -mem-write: 0x8000080c <- 0x54583 -mem-write: 0x80000810 <- 0x58863 -mem-write: 0x80000814 <- 0x1c000ef -mem-write: 0x80000818 <- 0x150513 -mem-write: 0x8000081c <- 0xff1ff06f -mem-write: 0x80000820 <- 0x12083 -mem-write: 0x80000824 <- 0x412583 -mem-write: 0x80000828 <- 0xc10113 -mem-write: 0x8000082c <- 0x8067 -mem-write: 0x80000830 <- 0x15297 -mem-write: 0x80000834 <- 0x7dc28293 -mem-write: 0x80000838 <- 0xb2a023 -mem-write: 0x8000083c <- 0x8067 -mem-write: 0x80000840 <- 0xff010113 -mem-write: 0x80000844 <- 0x912223 -mem-write: 0x80000848 <- 0x112623 -mem-write: 0x8000084c <- 0x812423 -mem-write: 0x80000850 <- 0x1212023 -mem-write: 0x80000854 <- 0xf00793 -mem-write: 0x80000858 <- 0x50493 -mem-write: 0x8000085c <- 0x4a7fc63 -mem-write: 0x80000860 <- 0x80015937 -mem-write: 0x80000864 <- 0x693 -mem-write: 0x80000868 <- 0x2000413 -mem-write: 0x8000086c <- 0x9c090913 -mem-write: 0x80000870 <- 0xffc40413 -mem-write: 0x80000874 <- 0x84d7b3 -mem-write: 0x80000878 <- 0xf7f793 -mem-write: 0x8000087c <- 0x279713 -mem-write: 0x80000880 <- 0xe90733 -mem-write: 0x80000884 <- 0x79463 -mem-write: 0x80000888 <- 0x68863 -mem-write: 0x8000088c <- 0x72503 -mem-write: 0x80000890 <- 0xf71ff0ef -mem-write: 0x80000894 <- 0x100693 -mem-write: 0x80000898 <- 0xfc041ce3 -mem-write: 0x8000089c <- 0xc12083 -mem-write: 0x800008a0 <- 0x812403 -mem-write: 0x800008a4 <- 0x412483 -mem-write: 0x800008a8 <- 0x12903 -mem-write: 0x800008ac <- 0x1010113 -mem-write: 0x800008b0 <- 0x8067 -mem-write: 0x800008b4 <- 0x800157b7 -mem-write: 0x800008b8 <- 0x251493 -mem-write: 0x800008bc <- 0x9c078793 -mem-write: 0x800008c0 <- 0x812403 -mem-write: 0x800008c4 <- 0x9784b3 -mem-write: 0x800008c8 <- 0x4a503 -mem-write: 0x800008cc <- 0xc12083 -mem-write: 0x800008d0 <- 0x412483 -mem-write: 0x800008d4 <- 0x12903 -mem-write: 0x800008d8 <- 0x1010113 -mem-write: 0x800008dc <- 0xf25ff06f -mem-write: 0x800008e0 <- 0xff010113 -mem-write: 0x800008e4 <- 0x812423 -mem-write: 0x800008e8 <- 0x112623 -mem-write: 0x800008ec <- 0x912223 -mem-write: 0x800008f0 <- 0x1212023 -mem-write: 0x800008f4 <- 0x58413 -mem-write: 0x800008f8 <- 0xf09ff0ef -mem-write: 0x800008fc <- 0xf00793 -mem-write: 0x80000900 <- 0x687f063 -mem-write: 0x80000904 <- 0x80015937 -mem-write: 0x80000908 <- 0x693 -mem-write: 0x8000090c <- 0x2000493 -mem-write: 0x80000910 <- 0x9c090913 -mem-write: 0x80000914 <- 0xffc48493 -mem-write: 0x80000918 <- 0x9457b3 -mem-write: 0x8000091c <- 0xf7f793 -mem-write: 0x80000920 <- 0x279713 -mem-write: 0x80000924 <- 0xe90733 -mem-write: 0x80000928 <- 0x79463 -mem-write: 0x8000092c <- 0x68863 -mem-write: 0x80000930 <- 0x72503 -mem-write: 0x80000934 <- 0xecdff0ef -mem-write: 0x80000938 <- 0x100693 -mem-write: 0x8000093c <- 0xfc049ce3 -mem-write: 0x80000940 <- 0x812403 -mem-write: 0x80000944 <- 0xc12083 -mem-write: 0x80000948 <- 0x412483 -mem-write: 0x8000094c <- 0x12903 -mem-write: 0x80000950 <- 0x80015537 -mem-write: 0x80000954 <- 0xa2850513 -mem-write: 0x80000958 <- 0x1010113 -mem-write: 0x8000095c <- 0xea5ff06f -mem-write: 0x80000960 <- 0x800157b7 -mem-write: 0x80000964 <- 0x9c078793 -mem-write: 0x80000968 <- 0x241413 -mem-write: 0x8000096c <- 0x878433 -mem-write: 0x80000970 <- 0x42503 -mem-write: 0x80000974 <- 0xe8dff0ef -mem-write: 0x80000978 <- 0xfc9ff06f -mem-write: 0x8000097c <- 0x2441a503 -mem-write: 0x80000980 <- 0xff010113 -mem-write: 0x80000984 <- 0x112623 -mem-write: 0x80000988 <- 0xdf9ff0ef -mem-write: 0x8000098c <- 0x2241a503 -mem-write: 0x80000990 <- 0x22c1a783 -mem-write: 0x80000994 <- 0x780e7 -mem-write: 0x80000998 <- 0xe09ff0ef -mem-write: 0x8000099c <- 0x50a63 -mem-write: 0x800009a0 <- 0xc12083 -mem-write: 0x800009a4 <- 0x513 -mem-write: 0x800009a8 <- 0x1010113 -mem-write: 0x800009ac <- 0xdd5ff06f -mem-write: 0x800009b0 <- 0xc12083 -mem-write: 0x800009b4 <- 0x100513 -mem-write: 0x800009b8 <- 0x1010113 -mem-write: 0x800009bc <- 0xdc5ff06f -mem-write: 0x800009c0 <- 0x2341a503 -mem-write: 0x800009c4 <- 0xfb010113 -mem-write: 0x800009c8 <- 0x4112623 -mem-write: 0x800009cc <- 0x3712623 -mem-write: 0x800009d0 <- 0x3a12023 -mem-write: 0x800009d4 <- 0x4812423 -mem-write: 0x800009d8 <- 0x4912223 -mem-write: 0x800009dc <- 0x5212023 -mem-write: 0x800009e0 <- 0x3312e23 -mem-write: 0x800009e4 <- 0x3412c23 -mem-write: 0x800009e8 <- 0x3512a23 -mem-write: 0x800009ec <- 0x3612823 -mem-write: 0x800009f0 <- 0x3812423 -mem-write: 0x800009f4 <- 0x3912223 -mem-write: 0x800009f8 <- 0x1b12e23 -mem-write: 0x800009fc <- 0xd85ff0ef -mem-write: 0x80000a00 <- 0xda9ff0ef -mem-write: 0x80000a04 <- 0xa12623 -mem-write: 0x80000a08 <- 0xd99ff0ef -mem-write: 0x80000a0c <- 0x2301a783 -mem-write: 0x80000a10 <- 0x50b93 -mem-write: 0x80000a14 <- 0x6078863 -mem-write: 0x80000a18 <- 0x2381a703 -mem-write: 0x80000a1c <- 0xd93 -mem-write: 0x80000a20 <- 0xa070463 -mem-write: 0x80000a24 <- 0x2281a783 -mem-write: 0x80000a28 <- 0xc12903 -mem-write: 0x80000a2c <- 0xb13 -mem-write: 0x80000a30 <- 0xb8493 -mem-write: 0x80000a34 <- 0x413 -mem-write: 0x80000a38 <- 0x2078a63 -mem-write: 0x80000a3c <- 0x2201a783 -mem-write: 0x80000a40 <- 0x2401a583 -mem-write: 0x80000a44 <- 0x23c1a503 -mem-write: 0x80000a48 <- 0x48693 -mem-write: 0x80000a4c <- 0xd8713 -mem-write: 0x80000a50 <- 0x90613 -mem-write: 0x80000a54 <- 0x780e7 -mem-write: 0x80000a58 <- 0x2281a783 -mem-write: 0x80000a5c <- 0x140413 -mem-write: 0x80000a60 <- 0x448493 -mem-write: 0x80000a64 <- 0xfcf46ce3 -mem-write: 0x80000a68 <- 0x2381a703 -mem-write: 0x80000a6c <- 0x1b0b13 -mem-write: 0x80000a70 <- 0x490913 -mem-write: 0x80000a74 <- 0xfaeb6ee3 -mem-write: 0x80000a78 <- 0x2301a783 -mem-write: 0x80000a7c <- 0x1d8d93 -mem-write: 0x80000a80 <- 0xfafde0e3 -mem-write: 0x80000a84 <- 0x40b9863 -mem-write: 0x80000a88 <- 0x4812403 -mem-write: 0x80000a8c <- 0x4c12083 -mem-write: 0x80000a90 <- 0x4412483 -mem-write: 0x80000a94 <- 0x4012903 -mem-write: 0x80000a98 <- 0x3c12983 -mem-write: 0x80000a9c <- 0x3812a03 -mem-write: 0x80000aa0 <- 0x3412a83 -mem-write: 0x80000aa4 <- 0x3012b03 -mem-write: 0x80000aa8 <- 0x2c12b83 -mem-write: 0x80000aac <- 0x2812c03 -mem-write: 0x80000ab0 <- 0x2412c83 -mem-write: 0x80000ab4 <- 0x2012d03 -mem-write: 0x80000ab8 <- 0x1c12d83 -mem-write: 0x80000abc <- 0x100513 -mem-write: 0x80000ac0 <- 0x5010113 -mem-write: 0x80000ac4 <- 0xcbdff06f -mem-write: 0x80000ac8 <- 0x1d8d93 -mem-write: 0x80000acc <- 0xfafde8e3 -mem-write: 0x80000ad0 <- 0xfa0b8ce3 -mem-write: 0x80000ad4 <- 0x513 -mem-write: 0x80000ad8 <- 0xca9ff0ef -mem-write: 0x80000adc <- 0xfadff06f -mem-write: 0x80000ae0 <- 0xff010113 -mem-write: 0x80000ae4 <- 0x58793 -mem-write: 0x80000ae8 <- 0x800015b7 -mem-write: 0x80000aec <- 0x812423 -mem-write: 0x80000af0 <- 0x912223 -mem-write: 0x80000af4 <- 0x1212023 -mem-write: 0x80000af8 <- 0x97c58593 -mem-write: 0x80000afc <- 0x112623 -mem-write: 0x80000b00 <- 0x22c1a623 -mem-write: 0x80000b04 <- 0x22d1a223 -mem-write: 0x80000b08 <- 0x24f1a223 -mem-write: 0x80000b0c <- 0xc6dff0ef -mem-write: 0x80000b10 <- 0x2441a503 -mem-write: 0x80000b14 <- 0xc6dff0ef -mem-write: 0x80000b18 <- 0x2241a503 -mem-write: 0x80000b1c <- 0x22c1a783 -mem-write: 0x80000b20 <- 0x780e7 -mem-write: 0x80000b24 <- 0xc7dff0ef -mem-write: 0x80000b28 <- 0x2050063 -mem-write: 0x80000b2c <- 0x812403 -mem-write: 0x80000b30 <- 0xc12083 -mem-write: 0x80000b34 <- 0x412483 -mem-write: 0x80000b38 <- 0x12903 -mem-write: 0x80000b3c <- 0x513 -mem-write: 0x80000b40 <- 0x1010113 -mem-write: 0x80000b44 <- 0xc3dff06f -mem-write: 0x80000b48 <- 0x812403 -mem-write: 0x80000b4c <- 0xc12083 -mem-write: 0x80000b50 <- 0x412483 -mem-write: 0x80000b54 <- 0x12903 -mem-write: 0x80000b58 <- 0x100513 -mem-write: 0x80000b5c <- 0x1010113 -mem-write: 0x80000b60 <- 0xc21ff06f -mem-write: 0x80000b64 <- 0x52703 -mem-write: 0x80000b68 <- 0xff010113 -mem-write: 0x80000b6c <- 0x50793 -mem-write: 0x80000b70 <- 0x112623 -mem-write: 0x80000b74 <- 0x812423 -mem-write: 0x80000b78 <- 0x912223 -mem-write: 0x80000b7c <- 0x400513 -mem-write: 0x80000b80 <- 0x100693 -mem-write: 0x80000b84 <- 0xe57663 -mem-write: 0x80000b88 <- 0x275693 -mem-write: 0x80000b8c <- 0x400713 -mem-write: 0x80000b90 <- 0x87a803 -mem-write: 0x80000b94 <- 0x22d1ac23 -mem-write: 0x80000b98 <- 0x22e1aa23 -mem-write: 0x80000b9c <- 0x2301a823 -mem-write: 0x80000ba0 <- 0x47a503 -mem-write: 0x80000ba4 <- 0x22b1a023 -mem-write: 0x80000ba8 <- 0x24f1a023 -mem-write: 0x80000bac <- 0x22c1ae23 -mem-write: 0x80000bb0 <- 0x100793 -mem-write: 0x80000bb4 <- 0x2a7f263 -mem-write: 0x80000bb8 <- 0x400713 -mem-write: 0x80000bbc <- 0x800015b7 -mem-write: 0x80000bc0 <- 0x4a77e63 -mem-write: 0x80000bc4 <- 0x255793 -mem-write: 0x80000bc8 <- 0x9c058593 -mem-write: 0x80000bcc <- 0x400513 -mem-write: 0x80000bd0 <- 0x22f1a423 -mem-write: 0x80000bd4 <- 0xba5ff0ef -mem-write: 0x80000bd8 <- 0xbd9ff0ef -mem-write: 0x80000bdc <- 0x50413 -mem-write: 0x80000be0 <- 0xbd9ff0ef -mem-write: 0x80000be4 <- 0xdddff0ef -mem-write: 0x80000be8 <- 0xbc9ff0ef -mem-write: 0x80000bec <- 0x50493 -mem-write: 0x80000bf0 <- 0xbc9ff0ef -mem-write: 0x80000bf4 <- 0x80015537 -mem-write: 0x80000bf8 <- 0x408485b3 -mem-write: 0x80000bfc <- 0xa0050513 -VXDRV: upload 1024 bytes to 0x80000c00 -mem-write: 0x80000c00 <- 0x334000ef -mem-write: 0x80000c04 <- 0x812403 -mem-write: 0x80000c08 <- 0xc12083 -mem-write: 0x80000c0c <- 0x412483 -mem-write: 0x80000c10 <- 0x513 -mem-write: 0x80000c14 <- 0x1010113 -mem-write: 0x80000c18 <- 0xb69ff06f -mem-write: 0x80000c1c <- 0x9c058593 -mem-write: 0x80000c20 <- 0x22f1a423 -mem-write: 0x80000c24 <- 0xb55ff0ef -mem-write: 0x80000c28 <- 0xfb1ff06f -mem-write: 0x80000c2c <- 0xff010113 -mem-write: 0x80000c30 <- 0x112623 -mem-write: 0x80000c34 <- 0x812423 -mem-write: 0x80000c38 <- 0x912223 -mem-write: 0x80000c3c <- 0x1212023 -mem-write: 0x80000c40 <- 0x50493 -mem-write: 0x80000c44 <- 0xb5dff0ef -mem-write: 0x80000c48 <- 0x50413 -mem-write: 0x80000c4c <- 0xb5dff0ef -mem-write: 0x80000c50 <- 0x104a783 -mem-write: 0x80000c54 <- 0xf47863 -mem-write: 0x80000c58 <- 0xc4a783 -mem-write: 0x80000c5c <- 0x50913 -mem-write: 0x80000c60 <- 0x2f56263 -mem-write: 0x80000c64 <- 0x513 -mem-write: 0x80000c68 <- 0xb29ff0ef -mem-write: 0x80000c6c <- 0x812403 -mem-write: 0x80000c70 <- 0xc12083 -mem-write: 0x80000c74 <- 0x412483 -mem-write: 0x80000c78 <- 0x12903 -mem-write: 0x80000c7c <- 0x1010113 -mem-write: 0x80000c80 <- 0xb19ff06f -mem-write: 0x80000c84 <- 0x100513 -mem-write: 0x80000c88 <- 0xb09ff0ef -mem-write: 0x80000c8c <- 0xc4a503 -mem-write: 0x80000c90 <- 0x4a703 -mem-write: 0x80000c94 <- 0x44a683 -mem-write: 0x80000c98 <- 0x2a40433 -mem-write: 0x80000c9c <- 0x84a783 -mem-write: 0x80000ca0 <- 0xc12083 -mem-write: 0x80000ca4 <- 0x412483 -mem-write: 0x80000ca8 <- 0x1240433 -mem-write: 0x80000cac <- 0x241413 -mem-write: 0x80000cb0 <- 0x870733 -mem-write: 0x80000cb4 <- 0x8686b3 -mem-write: 0x80000cb8 <- 0x72703 -mem-write: 0x80000cbc <- 0x6a683 -mem-write: 0x80000cc0 <- 0x878433 -mem-write: 0x80000cc4 <- 0x12903 -mem-write: 0x80000cc8 <- 0xd707b3 -mem-write: 0x80000ccc <- 0xf42023 -mem-write: 0x80000cd0 <- 0x812403 -mem-write: 0x80000cd4 <- 0x1010113 -mem-write: 0x80000cd8 <- 0xac1ff06f -mem-write: 0x80000cdc <- 0x50593 -mem-write: 0x80000ce0 <- 0x693 -mem-write: 0x80000ce4 <- 0x613 -mem-write: 0x80000ce8 <- 0x513 -mem-write: 0x80000cec <- 0x7590206f -mem-write: 0x80000cf0 <- 0xff010113 -mem-write: 0x80000cf4 <- 0x593 -mem-write: 0x80000cf8 <- 0x812423 -mem-write: 0x80000cfc <- 0x112623 -mem-write: 0x80000d00 <- 0x50413 -mem-write: 0x80000d04 <- 0x7d9020ef -mem-write: 0x80000d08 <- 0x1c01a503 -mem-write: 0x80000d0c <- 0x3c52783 -mem-write: 0x80000d10 <- 0x78463 -mem-write: 0x80000d14 <- 0x780e7 -mem-write: 0x80000d18 <- 0x40513 -mem-write: 0x80000d1c <- 0x915ff0ef -mem-write: 0x80000d20 <- 0xff010113 -mem-write: 0x80000d24 <- 0x812423 -mem-write: 0x80000d28 <- 0x800167b7 -mem-write: 0x80000d2c <- 0x80016437 -mem-write: 0x80000d30 <- 0x440413 -mem-write: 0x80000d34 <- 0x478793 -mem-write: 0x80000d38 <- 0x408787b3 -mem-write: 0x80000d3c <- 0x912223 -mem-write: 0x80000d40 <- 0x112623 -mem-write: 0x80000d44 <- 0x4027d493 -mem-write: 0x80000d48 <- 0x2048063 -mem-write: 0x80000d4c <- 0xffc78793 -mem-write: 0x80000d50 <- 0x878433 -mem-write: 0x80000d54 <- 0x42783 -mem-write: 0x80000d58 <- 0xfff48493 -mem-write: 0x80000d5c <- 0xffc40413 -mem-write: 0x80000d60 <- 0x780e7 -mem-write: 0x80000d64 <- 0xfe0498e3 -mem-write: 0x80000d68 <- 0xc12083 -mem-write: 0x80000d6c <- 0x812403 -mem-write: 0x80000d70 <- 0x412483 -mem-write: 0x80000d74 <- 0x1010113 -mem-write: 0x80000d78 <- 0x8067 -mem-write: 0x80000d7c <- 0xff010113 -mem-write: 0x80000d80 <- 0x812423 -mem-write: 0x80000d84 <- 0x1212023 -mem-write: 0x80000d88 <- 0x80016437 -mem-write: 0x80000d8c <- 0x80016937 -mem-write: 0x80000d90 <- 0x40793 -mem-write: 0x80000d94 <- 0x90913 -mem-write: 0x80000d98 <- 0x40f90933 -mem-write: 0x80000d9c <- 0x112623 -mem-write: 0x80000da0 <- 0x912223 -mem-write: 0x80000da4 <- 0x40295913 -mem-write: 0x80000da8 <- 0x2090063 -mem-write: 0x80000dac <- 0x40413 -mem-write: 0x80000db0 <- 0x493 -mem-write: 0x80000db4 <- 0x42783 -mem-write: 0x80000db8 <- 0x148493 -mem-write: 0x80000dbc <- 0x440413 -mem-write: 0x80000dc0 <- 0x780e7 -mem-write: 0x80000dc4 <- 0xfe9918e3 -mem-write: 0x80000dc8 <- 0x80016437 -mem-write: 0x80000dcc <- 0x80016937 -mem-write: 0x80000dd0 <- 0x40793 -mem-write: 0x80000dd4 <- 0x490913 -mem-write: 0x80000dd8 <- 0x40f90933 -mem-write: 0x80000ddc <- 0x40295913 -mem-write: 0x80000de0 <- 0x2090063 -mem-write: 0x80000de4 <- 0x40413 -mem-write: 0x80000de8 <- 0x493 -mem-write: 0x80000dec <- 0x42783 -mem-write: 0x80000df0 <- 0x148493 -mem-write: 0x80000df4 <- 0x440413 -mem-write: 0x80000df8 <- 0x780e7 -mem-write: 0x80000dfc <- 0xfe9918e3 -mem-write: 0x80000e00 <- 0xc12083 -mem-write: 0x80000e04 <- 0x812403 -mem-write: 0x80000e08 <- 0x412483 -mem-write: 0x80000e0c <- 0x12903 -mem-write: 0x80000e10 <- 0x1010113 -mem-write: 0x80000e14 <- 0x8067 -mem-write: 0x80000e18 <- 0xf00313 -mem-write: 0x80000e1c <- 0x50713 -mem-write: 0x80000e20 <- 0x2c37e63 -mem-write: 0x80000e24 <- 0xf77793 -mem-write: 0x80000e28 <- 0xa079063 -mem-write: 0x80000e2c <- 0x8059263 -mem-write: 0x80000e30 <- 0xff067693 -mem-write: 0x80000e34 <- 0xf67613 -mem-write: 0x80000e38 <- 0xe686b3 -mem-write: 0x80000e3c <- 0xb72023 -mem-write: 0x80000e40 <- 0xb72223 -mem-write: 0x80000e44 <- 0xb72423 -mem-write: 0x80000e48 <- 0xb72623 -mem-write: 0x80000e4c <- 0x1070713 -mem-write: 0x80000e50 <- 0xfed766e3 -mem-write: 0x80000e54 <- 0x61463 -mem-write: 0x80000e58 <- 0x8067 -mem-write: 0x80000e5c <- 0x40c306b3 -mem-write: 0x80000e60 <- 0x269693 -mem-write: 0x80000e64 <- 0x297 -mem-write: 0x80000e68 <- 0x5686b3 -mem-write: 0x80000e6c <- 0xc68067 -mem-write: 0x80000e70 <- 0xb70723 -mem-write: 0x80000e74 <- 0xb706a3 -mem-write: 0x80000e78 <- 0xb70623 -mem-write: 0x80000e7c <- 0xb705a3 -mem-write: 0x80000e80 <- 0xb70523 -mem-write: 0x80000e84 <- 0xb704a3 -mem-write: 0x80000e88 <- 0xb70423 -mem-write: 0x80000e8c <- 0xb703a3 -mem-write: 0x80000e90 <- 0xb70323 -mem-write: 0x80000e94 <- 0xb702a3 -mem-write: 0x80000e98 <- 0xb70223 -mem-write: 0x80000e9c <- 0xb701a3 -mem-write: 0x80000ea0 <- 0xb70123 -mem-write: 0x80000ea4 <- 0xb700a3 -mem-write: 0x80000ea8 <- 0xb70023 -mem-write: 0x80000eac <- 0x8067 -mem-write: 0x80000eb0 <- 0xff5f593 -mem-write: 0x80000eb4 <- 0x859693 -mem-write: 0x80000eb8 <- 0xd5e5b3 -mem-write: 0x80000ebc <- 0x1059693 -mem-write: 0x80000ec0 <- 0xd5e5b3 -mem-write: 0x80000ec4 <- 0xf6dff06f -mem-write: 0x80000ec8 <- 0x279693 -mem-write: 0x80000ecc <- 0x297 -mem-write: 0x80000ed0 <- 0x5686b3 -mem-write: 0x80000ed4 <- 0x8293 -mem-write: 0x80000ed8 <- 0xfa0680e7 -mem-write: 0x80000edc <- 0x28093 -mem-write: 0x80000ee0 <- 0xff078793 -mem-write: 0x80000ee4 <- 0x40f70733 -mem-write: 0x80000ee8 <- 0xf60633 -mem-write: 0x80000eec <- 0xf6c378e3 -mem-write: 0x80000ef0 <- 0xf3dff06f -mem-write: 0x80000ef4 <- 0xfc010113 -mem-write: 0x80000ef8 <- 0x2c12423 -mem-write: 0x80000efc <- 0x2d12623 -mem-write: 0x80000f00 <- 0x2e12823 -mem-write: 0x80000f04 <- 0x2f12a23 -mem-write: 0x80000f08 <- 0x3012c23 -mem-write: 0x80000f0c <- 0x3112e23 -mem-write: 0x80000f10 <- 0x58613 -mem-write: 0x80000f14 <- 0x852583 -mem-write: 0x80000f18 <- 0x2810693 -mem-write: 0x80000f1c <- 0x112e23 -mem-write: 0x80000f20 <- 0xd12623 -mem-write: 0x80000f24 <- 0x5c000ef -mem-write: 0x80000f28 <- 0x1c12083 -mem-write: 0x80000f2c <- 0x4010113 -mem-write: 0x80000f30 <- 0x8067 -mem-write: 0x80000f34 <- 0x1d81a303 -mem-write: 0x80000f38 <- 0xfc010113 -mem-write: 0x80000f3c <- 0x2c12423 -mem-write: 0x80000f40 <- 0x2d12623 -mem-write: 0x80000f44 <- 0x2b12223 -mem-write: 0x80000f48 <- 0x2e12823 -mem-write: 0x80000f4c <- 0x2f12a23 -mem-write: 0x80000f50 <- 0x3012c23 -mem-write: 0x80000f54 <- 0x3112e23 -mem-write: 0x80000f58 <- 0x832583 -mem-write: 0x80000f5c <- 0x2410693 -mem-write: 0x80000f60 <- 0x50613 -mem-write: 0x80000f64 <- 0x30513 -mem-write: 0x80000f68 <- 0x112e23 -mem-write: 0x80000f6c <- 0xd12623 -mem-write: 0x80000f70 <- 0x10000ef -mem-write: 0x80000f74 <- 0x1c12083 -mem-write: 0x80000f78 <- 0x4010113 -mem-write: 0x80000f7c <- 0x8067 -mem-write: 0x80000f80 <- 0xe1010113 -mem-write: 0x80000f84 <- 0x1e112623 -mem-write: 0x80000f88 <- 0x1f212023 -mem-write: 0x80000f8c <- 0x1d812423 -mem-write: 0x80000f90 <- 0x1da12023 -mem-write: 0x80000f94 <- 0x58c13 -mem-write: 0x80000f98 <- 0x60913 -mem-write: 0x80000f9c <- 0xd12a23 -mem-write: 0x80000fa0 <- 0x1e812423 -mem-write: 0x80000fa4 <- 0x1e912223 -mem-write: 0x80000fa8 <- 0x1d312e23 -mem-write: 0x80000fac <- 0x1d412c23 -mem-write: 0x80000fb0 <- 0x1d512a23 -mem-write: 0x80000fb4 <- 0x1d612823 -mem-write: 0x80000fb8 <- 0x1d712623 -mem-write: 0x80000fbc <- 0x1d912223 -mem-write: 0x80000fc0 <- 0x1bb12e23 -mem-write: 0x80000fc4 <- 0x50d13 -mem-write: 0x80000fc8 <- 0x570060ef -mem-write: 0x80000fcc <- 0x52783 -mem-write: 0x80000fd0 <- 0x78513 -mem-write: 0x80000fd4 <- 0x2f12823 -mem-write: 0x80000fd8 <- 0x514080ef -mem-write: 0x80000fdc <- 0x2a12623 -mem-write: 0x80000fe0 <- 0xe012823 -mem-write: 0x80000fe4 <- 0xe012a23 -mem-write: 0x80000fe8 <- 0xe012c23 -mem-write: 0x80000fec <- 0xe012e23 -mem-write: 0x80000ff0 <- 0xd0663 -mem-write: 0x80000ff4 <- 0x38d2703 -mem-write: 0x80000ff8 <- 0xa0708e3 -mem-write: 0x80000ffc <- 0xcc1683 -VXDRV: upload 1024 bytes to 0x80001000 -mem-write: 0x80001000 <- 0x1069713 -mem-write: 0x80001004 <- 0x1269793 -mem-write: 0x80001008 <- 0x1075713 -mem-write: 0x8000100c <- 0x207ca63 -mem-write: 0x80001010 <- 0x2737 -mem-write: 0x80001014 <- 0x64c2603 -mem-write: 0x80001018 <- 0xe6e733 -mem-write: 0x8000101c <- 0x1071713 -mem-write: 0x80001020 <- 0xffffe6b7 -mem-write: 0x80001024 <- 0x41075713 -mem-write: 0x80001028 <- 0xfff68693 -mem-write: 0x8000102c <- 0xd676b3 -mem-write: 0x80001030 <- 0xec1623 -mem-write: 0x80001034 <- 0x1071713 -mem-write: 0x80001038 <- 0x6dc2223 -mem-write: 0x8000103c <- 0x1075713 -mem-write: 0x80001040 <- 0x877693 -mem-write: 0x80001044 <- 0x2e068863 -mem-write: 0x80001048 <- 0x10c2683 -mem-write: 0x8000104c <- 0x2e068463 -mem-write: 0x80001050 <- 0x1a77713 -mem-write: 0x80001054 <- 0xa00693 -mem-write: 0x80001058 <- 0x30d70063 -mem-write: 0x8000105c <- 0x10c10793 -mem-write: 0x80001060 <- 0x80015737 -mem-write: 0x80001064 <- 0xef12223 -mem-write: 0x80001068 <- 0x78893 -mem-write: 0x8000106c <- 0xa6c70793 -mem-write: 0x80001070 <- 0x80015737 -mem-write: 0x80001074 <- 0xf12c23 -mem-write: 0x80001078 <- 0x90b13 -mem-write: 0x8000107c <- 0xbe870793 -mem-write: 0x80001080 <- 0xf12423 -mem-write: 0x80001084 <- 0xb4783 -mem-write: 0x80001088 <- 0xe012623 -mem-write: 0x8000108c <- 0xe012423 -mem-write: 0x80001090 <- 0x2012023 -mem-write: 0x80001094 <- 0x2012a23 -mem-write: 0x80001098 <- 0x2012c23 -mem-write: 0x8000109c <- 0x2012e23 -mem-write: 0x800010a0 <- 0x4012423 -mem-write: 0x800010a4 <- 0x4012623 -mem-write: 0x800010a8 <- 0x12623 -mem-write: 0x800010ac <- 0x22078663 -mem-write: 0x800010b0 <- 0xb0413 -mem-write: 0x800010b4 <- 0x2500693 -mem-write: 0x800010b8 <- 0x30d78a63 -mem-write: 0x800010bc <- 0x144783 -mem-write: 0x800010c0 <- 0x140413 -mem-write: 0x800010c4 <- 0xfe079ae3 -mem-write: 0x800010c8 <- 0x416404b3 -mem-write: 0x800010cc <- 0x21640663 -mem-write: 0x800010d0 <- 0xec12683 -mem-write: 0x800010d4 <- 0xe812783 -mem-write: 0x800010d8 <- 0x168a023 -mem-write: 0x800010dc <- 0x9686b3 -mem-write: 0x800010e0 <- 0x178793 -mem-write: 0x800010e4 <- 0x98a223 -mem-write: 0x800010e8 <- 0xed12623 -mem-write: 0x800010ec <- 0xef12423 -mem-write: 0x800010f0 <- 0x700693 -mem-write: 0x800010f4 <- 0x888893 -mem-write: 0x800010f8 <- 0x2ef6c263 -mem-write: 0x800010fc <- 0xc12703 -mem-write: 0x80001100 <- 0x44783 -mem-write: 0x80001104 <- 0x970733 -mem-write: 0x80001108 <- 0xe12623 -mem-write: 0x8000110c <- 0x1c078663 -mem-write: 0x80001110 <- 0x144483 -mem-write: 0x80001114 <- 0xc0103a3 -mem-write: 0x80001118 <- 0x140413 -mem-write: 0x8000111c <- 0xfff00d93 -mem-write: 0x80001120 <- 0x993 -mem-write: 0x80001124 <- 0xa13 -mem-write: 0x80001128 <- 0x5a00913 -mem-write: 0x8000112c <- 0x900a93 -mem-write: 0x80001130 <- 0x2a00b93 -mem-write: 0x80001134 <- 0x88c93 -mem-write: 0x80001138 <- 0x140413 -mem-write: 0x8000113c <- 0xfe048793 -mem-write: 0x80001140 <- 0x4f96463 -mem-write: 0x80001144 <- 0x1812703 -mem-write: 0x80001148 <- 0x279793 -mem-write: 0x8000114c <- 0xe787b3 -mem-write: 0x80001150 <- 0x7a783 -mem-write: 0x80001154 <- 0x78067 -mem-write: 0x80001158 <- 0x993 -mem-write: 0x8000115c <- 0xfd048693 -mem-write: 0x80001160 <- 0x44483 -mem-write: 0x80001164 <- 0x299793 -mem-write: 0x80001168 <- 0x13787b3 -mem-write: 0x8000116c <- 0x179793 -mem-write: 0x80001170 <- 0xf689b3 -mem-write: 0x80001174 <- 0xfd048693 -mem-write: 0x80001178 <- 0x140413 -mem-write: 0x8000117c <- 0xfedaf2e3 -mem-write: 0x80001180 <- 0xfe048793 -mem-write: 0x80001184 <- 0xfcf970e3 -mem-write: 0x80001188 <- 0xc8893 -mem-write: 0x8000118c <- 0x14048663 -mem-write: 0x80001190 <- 0x14910623 -mem-write: 0x80001194 <- 0xc0103a3 -mem-write: 0x80001198 <- 0x100a93 -mem-write: 0x8000119c <- 0x100c93 -mem-write: 0x800011a0 <- 0x14c10b13 -mem-write: 0x800011a4 <- 0x12823 -mem-write: 0x800011a8 <- 0xd93 -mem-write: 0x800011ac <- 0x2012423 -mem-write: 0x800011b0 <- 0x2012223 -mem-write: 0x800011b4 <- 0x12e23 -mem-write: 0x800011b8 <- 0x2a7b93 -mem-write: 0x800011bc <- 0xb8463 -mem-write: 0x800011c0 <- 0x2a8a93 -mem-write: 0x800011c4 <- 0x84a7913 -mem-write: 0x800011c8 <- 0xec12783 -mem-write: 0x800011cc <- 0x91663 -mem-write: 0x800011d0 <- 0x41598833 -mem-write: 0x800011d4 <- 0x710046e3 -mem-write: 0x800011d8 <- 0xc714683 -mem-write: 0x800011dc <- 0x2068a63 -mem-write: 0x800011e0 <- 0xe812683 -mem-write: 0x800011e4 <- 0xc710613 -mem-write: 0x800011e8 <- 0xc8a023 -mem-write: 0x800011ec <- 0x178793 -mem-write: 0x800011f0 <- 0x100613 -mem-write: 0x800011f4 <- 0x168693 -mem-write: 0x800011f8 <- 0xc8a223 -mem-write: 0x800011fc <- 0xef12623 -mem-write: 0x80001200 <- 0xed12423 -mem-write: 0x80001204 <- 0x700613 -mem-write: 0x80001208 <- 0x888893 -mem-write: 0x8000120c <- 0x52d64263 -mem-write: 0x80001210 <- 0x20b8c63 -mem-write: 0x80001214 <- 0xe812683 -mem-write: 0x80001218 <- 0xc810613 -mem-write: 0x8000121c <- 0xc8a023 -mem-write: 0x80001220 <- 0x278793 -mem-write: 0x80001224 <- 0x200613 -mem-write: 0x80001228 <- 0x168693 -mem-write: 0x8000122c <- 0xc8a223 -mem-write: 0x80001230 <- 0xef12623 -mem-write: 0x80001234 <- 0xed12423 -mem-write: 0x80001238 <- 0x700613 -mem-write: 0x8000123c <- 0x888893 -mem-write: 0x80001240 <- 0xd65463 -mem-write: 0x80001244 <- 0x78d0006f -mem-write: 0x80001248 <- 0x8000693 -mem-write: 0x8000124c <- 0x3cd90ee3 -mem-write: 0x80001250 <- 0x419d8db3 -mem-write: 0x80001254 <- 0x49b04ae3 -mem-write: 0x80001258 <- 0x100a7693 -mem-write: 0x8000125c <- 0x280698e3 -mem-write: 0x80001260 <- 0xe812703 -mem-write: 0x80001264 <- 0x19787b3 -mem-write: 0x80001268 <- 0x168a023 -mem-write: 0x8000126c <- 0x170713 -mem-write: 0x80001270 <- 0x198a223 -mem-write: 0x80001274 <- 0xef12623 -mem-write: 0x80001278 <- 0xee12423 -mem-write: 0x8000127c <- 0x700693 -mem-write: 0x80001280 <- 0x54e6c863 -mem-write: 0x80001284 <- 0x888893 -mem-write: 0x80001288 <- 0x4a7a13 -mem-write: 0x8000128c <- 0xa0663 -mem-write: 0x80001290 <- 0x415984b3 -mem-write: 0x80001294 <- 0x54904e63 -mem-write: 0x80001298 <- 0x159d463 -mem-write: 0x8000129c <- 0xa8993 -mem-write: 0x800012a0 <- 0xc12703 -mem-write: 0x800012a4 <- 0x1370733 -mem-write: 0x800012a8 <- 0xe12623 -mem-write: 0x800012ac <- 0x4e0798e3 -mem-write: 0x800012b0 <- 0x1012783 -mem-write: 0x800012b4 <- 0xe012423 -mem-write: 0x800012b8 <- 0x78863 -mem-write: 0x800012bc <- 0x1012583 -mem-write: 0x800012c0 <- 0xd0513 -mem-write: 0x800012c4 <- 0x2a0030ef -mem-write: 0x800012c8 <- 0x10c10893 -mem-write: 0x800012cc <- 0x40b13 -mem-write: 0x800012d0 <- 0xb4783 -mem-write: 0x800012d4 <- 0xdc079ee3 -mem-write: 0x800012d8 <- 0xec12783 -mem-write: 0x800012dc <- 0x78463 -mem-write: 0x800012e0 <- 0x3250106f -mem-write: 0x800012e4 <- 0xcc5783 -mem-write: 0x800012e8 <- 0x407f793 -mem-write: 0x800012ec <- 0x78463 -mem-write: 0x800012f0 <- 0x2300206f -mem-write: 0x800012f4 <- 0x1ec12083 -mem-write: 0x800012f8 <- 0x1e812403 -mem-write: 0x800012fc <- 0xc12503 -mem-write: 0x80001300 <- 0x1e412483 -mem-write: 0x80001304 <- 0x1e012903 -mem-write: 0x80001308 <- 0x1dc12983 -mem-write: 0x8000130c <- 0x1d812a03 -mem-write: 0x80001310 <- 0x1d412a83 -mem-write: 0x80001314 <- 0x1d012b03 -mem-write: 0x80001318 <- 0x1cc12b83 -mem-write: 0x8000131c <- 0x1c812c03 -mem-write: 0x80001320 <- 0x1c412c83 -mem-write: 0x80001324 <- 0x1c012d03 -mem-write: 0x80001328 <- 0x1bc12d83 -mem-write: 0x8000132c <- 0x1f010113 -mem-write: 0x80001330 <- 0x8067 -mem-write: 0x80001334 <- 0xc0593 -mem-write: 0x80001338 <- 0xd0513 -mem-write: 0x8000133c <- 0x7ac020ef -mem-write: 0x80001340 <- 0x50463 -mem-write: 0x80001344 <- 0x1dc0206f -mem-write: 0x80001348 <- 0xcc5703 -mem-write: 0x8000134c <- 0xa00693 -mem-write: 0x80001350 <- 0x1a77713 -mem-write: 0x80001354 <- 0xd0d714e3 -mem-write: 0x80001358 <- 0xec1703 -mem-write: 0x8000135c <- 0xd00740e3 -mem-write: 0x80001360 <- 0x1412683 -mem-write: 0x80001364 <- 0x90613 -mem-write: 0x80001368 <- 0xc0593 -mem-write: 0x8000136c <- 0xd0513 -mem-write: 0x80001370 <- 0x6b8020ef -mem-write: 0x80001374 <- 0xa12623 -mem-write: 0x80001378 <- 0xf7dff06f -mem-write: 0x8000137c <- 0xd0513 -mem-write: 0x80001380 <- 0x1b8060ef -mem-write: 0x80001384 <- 0x452783 -mem-write: 0x80001388 <- 0x78513 -mem-write: 0x8000138c <- 0x4f12623 -mem-write: 0x80001390 <- 0x15c080ef -mem-write: 0x80001394 <- 0x50793 -mem-write: 0x80001398 <- 0xd0513 -mem-write: 0x8000139c <- 0x78493 -mem-write: 0x800013a0 <- 0x4f12423 -mem-write: 0x800013a4 <- 0x194060ef -mem-write: 0x800013a8 <- 0x852783 -mem-write: 0x800013ac <- 0x2f12e23 -mem-write: 0x800013b0 <- 0x48463 -mem-write: 0x800013b4 <- 0x12c0106f -mem-write: 0x800013b8 <- 0x44483 -mem-write: 0x800013bc <- 0xd7dff06f -mem-write: 0x800013c0 <- 0x44483 -mem-write: 0x800013c4 <- 0x20a6a13 -mem-write: 0x800013c8 <- 0xd71ff06f -mem-write: 0x800013cc <- 0x416404b3 -mem-write: 0x800013d0 <- 0xd16410e3 -mem-write: 0x800013d4 <- 0x44783 -mem-write: 0x800013d8 <- 0xd35ff06f -mem-write: 0x800013dc <- 0xe410613 -mem-write: 0x800013e0 <- 0xc0593 -mem-write: 0x800013e4 <- 0xd0513 -mem-write: 0x800013e8 <- 0x53d0a0ef -mem-write: 0x800013ec <- 0xee051ce3 -mem-write: 0x800013f0 <- 0x10c10893 -mem-write: 0x800013f4 <- 0xd09ff06f -mem-write: 0x800013f8 <- 0x8a7793 -mem-write: 0x800013fc <- 0xc8893 -VXDRV: upload 1024 bytes to 0x80001400 -mem-write: 0x80001400 <- 0x78463 -mem-write: 0x80001404 <- 0x12c0106f -mem-write: 0x80001408 <- 0x1412783 -mem-write: 0x8000140c <- 0xb010513 -mem-write: 0x80001410 <- 0x1912823 -mem-write: 0x80001414 <- 0x778793 -mem-write: 0x80001418 <- 0xff87f793 -mem-write: 0x8000141c <- 0x7a583 -mem-write: 0x80001420 <- 0x47a603 -mem-write: 0x80001424 <- 0x878793 -mem-write: 0x80001428 <- 0xf12a23 -mem-write: 0x8000142c <- 0x781120ef -mem-write: 0x80001430 <- 0xb012783 -mem-write: 0x80001434 <- 0x1012883 -mem-write: 0x80001438 <- 0xef12823 -mem-write: 0x8000143c <- 0xb412783 -mem-write: 0x80001440 <- 0xef12a23 -mem-write: 0x80001444 <- 0xb812783 -mem-write: 0x80001448 <- 0xef12c23 -mem-write: 0x8000144c <- 0xbc12783 -mem-write: 0x80001450 <- 0xef12e23 -mem-write: 0x80001454 <- 0xf010513 -mem-write: 0x80001458 <- 0x1112823 -mem-write: 0x8000145c <- 0x70060ef -mem-write: 0x80001460 <- 0xca12623 -mem-write: 0x80001464 <- 0x200793 -mem-write: 0x80001468 <- 0x1012883 -mem-write: 0x8000146c <- 0xf51463 -mem-write: 0x80001470 <- 0x4fc0106f -mem-write: 0x80001474 <- 0x100793 -mem-write: 0x80001478 <- 0xf51463 -mem-write: 0x8000147c <- 0x6440106f -mem-write: 0x80001480 <- 0x6100793 -mem-write: 0x80001484 <- 0xf49463 -mem-write: 0x80001488 <- 0x1c40206f -mem-write: 0x8000148c <- 0x4100793 -mem-write: 0x80001490 <- 0xf49463 -mem-write: 0x80001494 <- 0x1910106f -mem-write: 0x80001498 <- 0xfdf4fb93 -mem-write: 0x8000149c <- 0xfff00793 -mem-write: 0x800014a0 <- 0x5712223 -mem-write: 0x800014a4 <- 0xfd9463 -mem-write: 0x800014a8 <- 0x2800206f -mem-write: 0x800014ac <- 0x4700793 -mem-write: 0x800014b0 <- 0xfb9463 -mem-write: 0x800014b4 <- 0x1e00206f -mem-write: 0x800014b8 <- 0xfc12303 -mem-write: 0x800014bc <- 0x3412423 -mem-write: 0x800014c0 <- 0xf012e03 -mem-write: 0x800014c4 <- 0xf412e83 -mem-write: 0x800014c8 <- 0xf812f03 -mem-write: 0x800014cc <- 0x100a6793 -mem-write: 0x800014d0 <- 0x35463 -mem-write: 0x800014d4 <- 0x3e00206f -mem-write: 0x800014d8 <- 0x4012c23 -mem-write: 0x800014dc <- 0x78a13 -mem-write: 0x800014e0 <- 0x12823 -mem-write: 0x800014e4 <- 0x4600793 -mem-write: 0x800014e8 <- 0xfb9463 -mem-write: 0x800014ec <- 0x6990106f -mem-write: 0x800014f0 <- 0x4500793 -mem-write: 0x800014f4 <- 0x5112823 -mem-write: 0x800014f8 <- 0xfb8463 -mem-write: 0x800014fc <- 0x6090106f -mem-write: 0x80001500 <- 0x1d8913 -mem-write: 0x80001504 <- 0xb010a93 -mem-write: 0x80001508 <- 0x90693 -mem-write: 0x8000150c <- 0xdc10813 -mem-write: 0x80001510 <- 0xd010793 -mem-write: 0x80001514 <- 0xcc10713 -mem-write: 0x80001518 <- 0x200613 -mem-write: 0x8000151c <- 0xa8593 -mem-write: 0x80001520 <- 0xd0513 -mem-write: 0x80001524 <- 0xbc12823 -mem-write: 0x80001528 <- 0x5c12023 -mem-write: 0x8000152c <- 0xbd12a23 -mem-write: 0x80001530 <- 0x3d12223 -mem-write: 0x80001534 <- 0xbe12c23 -mem-write: 0x80001538 <- 0x3e12023 -mem-write: 0x8000153c <- 0xa612e23 -mem-write: 0x80001540 <- 0x612e23 -mem-write: 0x80001544 <- 0x4f1040ef -mem-write: 0x80001548 <- 0x1c12303 -mem-write: 0x8000154c <- 0x2012f03 -mem-write: 0x80001550 <- 0x2412e83 -mem-write: 0x80001554 <- 0x4012e03 -mem-write: 0x80001558 <- 0x5012883 -mem-write: 0x8000155c <- 0x50b13 -mem-write: 0x80001560 <- 0x1250933 -mem-write: 0x80001564 <- 0xa010c93 -mem-write: 0x80001568 <- 0xc8593 -mem-write: 0x8000156c <- 0xa8513 -mem-write: 0x80001570 <- 0x1112e23 -mem-write: 0x80001574 <- 0xbc12823 -mem-write: 0x80001578 <- 0xbd12a23 -mem-write: 0x8000157c <- 0xbe12c23 -mem-write: 0x80001580 <- 0xa612e23 -mem-write: 0x80001584 <- 0xa012023 -mem-write: 0x80001588 <- 0xa012223 -mem-write: 0x8000158c <- 0xa012423 -mem-write: 0x80001590 <- 0xa012623 -mem-write: 0x80001594 <- 0x33c100ef -mem-write: 0x80001598 <- 0x1c12883 -mem-write: 0x8000159c <- 0x90713 -mem-write: 0x800015a0 <- 0x2050263 -mem-write: 0x800015a4 <- 0xdc12703 -mem-write: 0x800015a8 <- 0x1277e63 -mem-write: 0x800015ac <- 0x3000693 -mem-write: 0x800015b0 <- 0x170793 -mem-write: 0x800015b4 <- 0xcf12e23 -mem-write: 0x800015b8 <- 0xd70023 -mem-write: 0x800015bc <- 0xdc12703 -mem-write: 0x800015c0 <- 0xff2768e3 -mem-write: 0x800015c4 <- 0x416707b3 -mem-write: 0x800015c8 <- 0x2f12023 -mem-write: 0x800015cc <- 0xcc12703 -mem-write: 0x800015d0 <- 0x4700793 -mem-write: 0x800015d4 <- 0xe12e23 -mem-write: 0x800015d8 <- 0x4412703 -mem-write: 0x800015dc <- 0xf71463 -mem-write: 0x800015e0 <- 0x43d0106f -mem-write: 0x800015e4 <- 0x4412703 -mem-write: 0x800015e8 <- 0x4600793 -mem-write: 0x800015ec <- 0xf71463 -mem-write: 0x800015f0 <- 0x67d0106f -mem-write: 0x800015f4 <- 0x1c12783 -mem-write: 0x800015f8 <- 0x4412703 -mem-write: 0x800015fc <- 0x4100593 -mem-write: 0x80001600 <- 0xfff78793 -mem-write: 0x80001604 <- 0xcf12623 -mem-write: 0x80001608 <- 0xff4f693 -mem-write: 0x8000160c <- 0x613 -mem-write: 0x80001610 <- 0xb71863 -mem-write: 0x80001614 <- 0xf68693 -mem-write: 0x80001618 <- 0xff6f693 -mem-write: 0x8000161c <- 0x100613 -mem-write: 0x80001620 <- 0xcd10a23 -mem-write: 0x80001624 <- 0x2b00693 -mem-write: 0x80001628 <- 0x7da63 -mem-write: 0x8000162c <- 0x1c12703 -mem-write: 0x80001630 <- 0x100793 -mem-write: 0x80001634 <- 0x2d00693 -mem-write: 0x80001638 <- 0x40e787b3 -mem-write: 0x8000163c <- 0xcd10aa3 -mem-write: 0x80001640 <- 0x900693 -mem-write: 0x80001644 <- 0xf6c463 -mem-write: 0x80001648 <- 0x28c0206f -mem-write: 0x8000164c <- 0xe310813 -mem-write: 0x80001650 <- 0x80513 -mem-write: 0x80001654 <- 0xa00613 -mem-write: 0x80001658 <- 0x6300e13 -mem-write: 0x8000165c <- 0x2c7e733 -mem-write: 0x80001660 <- 0x50593 -mem-write: 0x80001664 <- 0x78693 -mem-write: 0x80001668 <- 0xfff50513 -mem-write: 0x8000166c <- 0x3070713 -mem-write: 0x80001670 <- 0xfee58fa3 -mem-write: 0x80001674 <- 0x2c7c7b3 -mem-write: 0x80001678 <- 0xfede42e3 -mem-write: 0x8000167c <- 0x3078793 -mem-write: 0x80001680 <- 0xff7f613 -mem-write: 0x80001684 <- 0xfec50fa3 -mem-write: 0x80001688 <- 0xffe58793 -mem-write: 0x8000168c <- 0x107e463 -mem-write: 0x80001690 <- 0x3740206f -mem-write: 0x80001694 <- 0xd610693 -mem-write: 0x80001698 <- 0x80006f -mem-write: 0x8000169c <- 0x7c603 -mem-write: 0x800016a0 <- 0xc68023 -mem-write: 0x800016a4 <- 0x178793 -mem-write: 0x800016a8 <- 0x168693 -mem-write: 0x800016ac <- 0xff0798e3 -mem-write: 0x800016b0 <- 0xe510793 -mem-write: 0x800016b4 <- 0x40b787b3 -mem-write: 0x800016b8 <- 0xd610713 -mem-write: 0x800016bc <- 0xf707b3 -mem-write: 0x800016c0 <- 0xd410693 -mem-write: 0x800016c4 <- 0x40d787b3 -mem-write: 0x800016c8 <- 0x2f12c23 -mem-write: 0x800016cc <- 0x2012703 -mem-write: 0x800016d0 <- 0x3812683 -mem-write: 0x800016d4 <- 0x100793 -mem-write: 0x800016d8 <- 0xd70cb3 -mem-write: 0x800016dc <- 0xe7c463 -mem-write: 0x800016e0 <- 0x2940206f -mem-write: 0x800016e4 <- 0x2c12783 -mem-write: 0x800016e8 <- 0xfc8cb3 -mem-write: 0x800016ec <- 0x2812783 -mem-write: 0x800016f0 <- 0xfffcca93 -mem-write: 0x800016f4 <- 0x41fada93 -mem-write: 0x800016f8 <- 0xbff7fa13 -mem-write: 0x800016fc <- 0x100a6a13 -mem-write: 0x80001700 <- 0x15cfab3 -mem-write: 0x80001704 <- 0x2012423 -mem-write: 0x80001708 <- 0x2012223 -mem-write: 0x8000170c <- 0x12e23 -mem-write: 0x80001710 <- 0x5812783 -mem-write: 0x80001714 <- 0x79463 -mem-write: 0x80001718 <- 0x3790106f -mem-write: 0x8000171c <- 0x2d00793 -mem-write: 0x80001720 <- 0xcf103a3 -mem-write: 0x80001724 <- 0xd93 -mem-write: 0x80001728 <- 0x1a8a93 -mem-write: 0x8000172c <- 0xa8dff06f -mem-write: 0x80001730 <- 0xe410613 -mem-write: 0x80001734 <- 0xc0593 -mem-write: 0x80001738 <- 0xd0513 -mem-write: 0x8000173c <- 0x1e90a0ef -mem-write: 0x80001740 <- 0x60518e3 -mem-write: 0x80001744 <- 0xec12783 -mem-write: 0x80001748 <- 0x10c10893 -mem-write: 0x8000174c <- 0xac5ff06f -mem-write: 0x80001750 <- 0x3012683 -mem-write: 0x80001754 <- 0x2c12703 -mem-write: 0x80001758 <- 0x700613 -mem-write: 0x8000175c <- 0xd8a023 -mem-write: 0x80001760 <- 0xe812683 -mem-write: 0x80001764 <- 0xf707b3 -mem-write: 0x80001768 <- 0xe8a223 -mem-write: 0x8000176c <- 0x168693 -mem-write: 0x80001770 <- 0xef12623 -mem-write: 0x80001774 <- 0xed12423 -mem-write: 0x80001778 <- 0x888893 -mem-write: 0x8000177c <- 0x2d65463 -mem-write: 0x80001780 <- 0xe410613 -mem-write: 0x80001784 <- 0xc0593 -mem-write: 0x80001788 <- 0xd0513 -mem-write: 0x8000178c <- 0x1990a0ef -mem-write: 0x80001790 <- 0x20510e3 -mem-write: 0x80001794 <- 0xcc12583 -mem-write: 0x80001798 <- 0xec12783 -mem-write: 0x8000179c <- 0xe812683 -mem-write: 0x800017a0 <- 0x10c10893 -mem-write: 0x800017a4 <- 0x5d463 -mem-write: 0x800017a8 <- 0x5850106f -mem-write: 0x800017ac <- 0x2012703 -mem-write: 0x800017b0 <- 0x168693 -mem-write: 0x800017b4 <- 0x168a023 -mem-write: 0x800017b8 <- 0xf707b3 -mem-write: 0x800017bc <- 0xe8a223 -mem-write: 0x800017c0 <- 0xef12623 -mem-write: 0x800017c4 <- 0xed12423 -mem-write: 0x800017c8 <- 0x700713 -mem-write: 0x800017cc <- 0xaad75ce3 -mem-write: 0x800017d0 <- 0xe410613 -mem-write: 0x800017d4 <- 0xc0593 -mem-write: 0x800017d8 <- 0xd0513 -mem-write: 0x800017dc <- 0x1490a0ef -mem-write: 0x800017e0 <- 0x7c051863 -mem-write: 0x800017e4 <- 0xec12783 -mem-write: 0x800017e8 <- 0x10c10893 -mem-write: 0x800017ec <- 0xa9dff06f -mem-write: 0x800017f0 <- 0x1000693 -mem-write: 0x800017f4 <- 0xe812703 -mem-write: 0x800017f8 <- 0x96c463 -mem-write: 0x800017fc <- 0x5190106f -VXDRV: upload 1024 bytes to 0x80001800 -mem-write: 0x80001800 <- 0x800156b7 -mem-write: 0x80001804 <- 0xbd868e93 -mem-write: 0x80001808 <- 0x1000913 -mem-write: 0x8000180c <- 0x700a13 -mem-write: 0x80001810 <- 0xe8b13 -mem-write: 0x80001814 <- 0xc0006f -mem-write: 0x80001818 <- 0xff048493 -mem-write: 0x8000181c <- 0x4995663 -mem-write: 0x80001820 <- 0x1078793 -mem-write: 0x80001824 <- 0x170713 -mem-write: 0x80001828 <- 0x168a023 -mem-write: 0x8000182c <- 0x128a223 -mem-write: 0x80001830 <- 0xef12623 -mem-write: 0x80001834 <- 0xee12423 -mem-write: 0x80001838 <- 0x888893 -mem-write: 0x8000183c <- 0xfcea5ee3 -mem-write: 0x80001840 <- 0xe410613 -mem-write: 0x80001844 <- 0xc0593 -mem-write: 0x80001848 <- 0xd0513 -mem-write: 0x8000184c <- 0xd90a0ef -mem-write: 0x80001850 <- 0x76051063 -mem-write: 0x80001854 <- 0xff048493 -mem-write: 0x80001858 <- 0xec12783 -mem-write: 0x8000185c <- 0xe812703 -mem-write: 0x80001860 <- 0x10c10893 -mem-write: 0x80001864 <- 0xfa994ee3 -mem-write: 0x80001868 <- 0xb0e93 -mem-write: 0x8000186c <- 0x9787b3 -mem-write: 0x80001870 <- 0x170713 -mem-write: 0x80001874 <- 0x1d8a023 -mem-write: 0x80001878 <- 0x98a223 -mem-write: 0x8000187c <- 0xef12623 -mem-write: 0x80001880 <- 0xee12423 -mem-write: 0x80001884 <- 0x700693 -mem-write: 0x80001888 <- 0xa0e6d8e3 -mem-write: 0x8000188c <- 0xe410613 -mem-write: 0x80001890 <- 0xc0593 -mem-write: 0x80001894 <- 0xd0513 -mem-write: 0x80001898 <- 0x8d0a0ef -mem-write: 0x8000189c <- 0x70051a63 -mem-write: 0x800018a0 <- 0xec12783 -mem-write: 0x800018a4 <- 0x9f5ff06f -mem-write: 0x800018a8 <- 0xd0513 -mem-write: 0x800018ac <- 0x349020ef -mem-write: 0x800018b0 <- 0xf4cff06f -mem-write: 0x800018b4 <- 0x1412703 -mem-write: 0x800018b8 <- 0xc8893 -mem-write: 0x800018bc <- 0xc0103a3 -mem-write: 0x800018c0 <- 0x72783 -mem-write: 0x800018c4 <- 0x470713 -mem-write: 0x800018c8 <- 0xe12a23 -mem-write: 0x800018cc <- 0x14f10623 -mem-write: 0x800018d0 <- 0x100a93 -mem-write: 0x800018d4 <- 0x100c93 -mem-write: 0x800018d8 <- 0x14c10b13 -mem-write: 0x800018dc <- 0x8c9ff06f -mem-write: 0x800018e0 <- 0x1412783 -mem-write: 0x800018e4 <- 0xc0103a3 -mem-write: 0x800018e8 <- 0xc8893 -mem-write: 0x800018ec <- 0x7ab03 -mem-write: 0x800018f0 <- 0x478913 -mem-write: 0x800018f4 <- 0x5a0b0ee3 -mem-write: 0x800018f8 <- 0xfff00793 -mem-write: 0x800018fc <- 0xfd9463 -mem-write: 0x80001900 <- 0x1000106f -mem-write: 0x80001904 <- 0xd8613 -mem-write: 0x80001908 <- 0x593 -mem-write: 0x8000190c <- 0xb0513 -mem-write: 0x80001910 <- 0x1912a23 -mem-write: 0x80001914 <- 0x5bc060ef -mem-write: 0x80001918 <- 0xa12823 -mem-write: 0x8000191c <- 0x1412883 -mem-write: 0x80001920 <- 0x51463 -mem-write: 0x80001924 <- 0x31d0106f -mem-write: 0x80001928 <- 0x1012783 -mem-write: 0x8000192c <- 0x1212a23 -mem-write: 0x80001930 <- 0x12823 -mem-write: 0x80001934 <- 0x41678cb3 -mem-write: 0x80001938 <- 0xc714783 -mem-write: 0x8000193c <- 0xfffcca93 -mem-write: 0x80001940 <- 0x41fada93 -mem-write: 0x80001944 <- 0x2012423 -mem-write: 0x80001948 <- 0x2012223 -mem-write: 0x8000194c <- 0x12e23 -mem-write: 0x80001950 <- 0x15cfab3 -mem-write: 0x80001954 <- 0xd93 -mem-write: 0x80001958 <- 0x860780e3 -mem-write: 0x8000195c <- 0x1a8a93 -mem-write: 0x80001960 <- 0x859ff06f -mem-write: 0x80001964 <- 0x44483 -mem-write: 0x80001968 <- 0x4a6a13 -mem-write: 0x8000196c <- 0xfccff06f -mem-write: 0x80001970 <- 0x1412683 -mem-write: 0x80001974 <- 0x20a7793 -mem-write: 0x80001978 <- 0xc8893 -mem-write: 0x8000197c <- 0x6a703 -mem-write: 0x80001980 <- 0x468693 -mem-write: 0x80001984 <- 0xd12a23 -mem-write: 0x80001988 <- 0x36079ee3 -mem-write: 0x8000198c <- 0x10a7793 -mem-write: 0x80001990 <- 0x78463 -mem-write: 0x80001994 <- 0x5c0106f -mem-write: 0x80001998 <- 0x40a7793 -mem-write: 0x8000199c <- 0x78463 -mem-write: 0x800019a0 <- 0x3fc0106f -mem-write: 0x800019a4 <- 0x200a7a13 -mem-write: 0x800019a8 <- 0xa1463 -mem-write: 0x800019ac <- 0x440106f -mem-write: 0x800019b0 <- 0xc12783 -mem-write: 0x800019b4 <- 0x40b13 -mem-write: 0x800019b8 <- 0xf70023 -mem-write: 0x800019bc <- 0x915ff06f -mem-write: 0x800019c0 <- 0x44483 -mem-write: 0x800019c4 <- 0x6c00793 -mem-write: 0x800019c8 <- 0x4cf484e3 -mem-write: 0x800019cc <- 0x10a6a13 -mem-write: 0x800019d0 <- 0xf68ff06f -mem-write: 0x800019d4 <- 0x1412703 -mem-write: 0x800019d8 <- 0xffff87b7 -mem-write: 0x800019dc <- 0x8307c793 -mem-write: 0x800019e0 <- 0xcf11423 -mem-write: 0x800019e4 <- 0x470793 -mem-write: 0x800019e8 <- 0xf12a23 -mem-write: 0x800019ec <- 0x72903 -mem-write: 0x800019f0 <- 0x800157b7 -mem-write: 0x800019f4 <- 0xa3c78793 -mem-write: 0x800019f8 <- 0xc8893 -mem-write: 0x800019fc <- 0x2f12a23 -mem-write: 0x80001a00 <- 0xc93 -mem-write: 0x80001a04 <- 0x2a6b93 -mem-write: 0x80001a08 <- 0x200793 -mem-write: 0x80001a0c <- 0x7800493 -mem-write: 0x80001a10 <- 0xc0103a3 -mem-write: 0x80001a14 <- 0xfff00713 -mem-write: 0x80001a18 <- 0x20ed8663 -mem-write: 0x80001a1c <- 0x1996733 -mem-write: 0x80001a20 <- 0xf7fbfa13 -mem-write: 0x80001a24 <- 0x1e071e63 -mem-write: 0x80001a28 <- 0x260d9463 -mem-write: 0x80001a2c <- 0x1c079063 -mem-write: 0x80001a30 <- 0x1bfc93 -mem-write: 0x80001a34 <- 0x1b010b13 -mem-write: 0x80001a38 <- 0x280c9ce3 -mem-write: 0x80001a3c <- 0xc8a93 -mem-write: 0x80001a40 <- 0x1bcd463 -mem-write: 0x80001a44 <- 0xd8a93 -mem-write: 0x80001a48 <- 0xc714783 -mem-write: 0x80001a4c <- 0x12823 -mem-write: 0x80001a50 <- 0x2012423 -mem-write: 0x80001a54 <- 0x2012223 -mem-write: 0x80001a58 <- 0x12e23 -mem-write: 0x80001a5c <- 0xf00790e3 -mem-write: 0x80001a60 <- 0xf58ff06f -mem-write: 0x80001a64 <- 0x44483 -mem-write: 0x80001a68 <- 0x6800793 -mem-write: 0x80001a6c <- 0x42f48ae3 -mem-write: 0x80001a70 <- 0x40a6a13 -mem-write: 0x80001a74 <- 0xec4ff06f -mem-write: 0x80001a78 <- 0x2b00793 -mem-write: 0x80001a7c <- 0x44483 -mem-write: 0x80001a80 <- 0xcf103a3 -mem-write: 0x80001a84 <- 0xeb4ff06f -mem-write: 0x80001a88 <- 0x44483 -mem-write: 0x80001a8c <- 0x80a6a13 -mem-write: 0x80001a90 <- 0xea8ff06f -mem-write: 0x80001a94 <- 0x44483 -mem-write: 0x80001a98 <- 0x140713 -mem-write: 0x80001a9c <- 0x1749463 -mem-write: 0x80001aa0 <- 0x7250106f -mem-write: 0x80001aa4 <- 0xfd048693 -mem-write: 0x80001aa8 <- 0x70413 -mem-write: 0x80001aac <- 0xd93 -mem-write: 0x80001ab0 <- 0xe8dae663 -mem-write: 0x80001ab4 <- 0x44483 -mem-write: 0x80001ab8 <- 0x2d9793 -mem-write: 0x80001abc <- 0x1b787b3 -mem-write: 0x80001ac0 <- 0x179793 -mem-write: 0x80001ac4 <- 0xd78db3 -mem-write: 0x80001ac8 <- 0xfd048693 -mem-write: 0x80001acc <- 0x140413 -mem-write: 0x80001ad0 <- 0xfedaf2e3 -mem-write: 0x80001ad4 <- 0xe68ff06f -mem-write: 0x80001ad8 <- 0x1412783 -mem-write: 0x80001adc <- 0x44483 -mem-write: 0x80001ae0 <- 0x7a983 -mem-write: 0x80001ae4 <- 0x478793 -mem-write: 0x80001ae8 <- 0xf12a23 -mem-write: 0x80001aec <- 0xe409d663 -mem-write: 0x80001af0 <- 0x413009b3 -mem-write: 0x80001af4 <- 0x4a6a13 -mem-write: 0x80001af8 <- 0xe40ff06f -mem-write: 0x80001afc <- 0x44483 -mem-write: 0x80001b00 <- 0x1a6a13 -mem-write: 0x80001b04 <- 0xe34ff06f -mem-write: 0x80001b08 <- 0xc714783 -mem-write: 0x80001b0c <- 0x44483 -mem-write: 0x80001b10 <- 0xe2079463 -mem-write: 0x80001b14 <- 0x2000793 -mem-write: 0x80001b18 <- 0xcf103a3 -mem-write: 0x80001b1c <- 0xe1cff06f -mem-write: 0x80001b20 <- 0xc8893 -mem-write: 0x80001b24 <- 0x10a6a13 -mem-write: 0x80001b28 <- 0x20a7793 -mem-write: 0x80001b2c <- 0xc078ee3 -mem-write: 0x80001b30 <- 0x1412783 -mem-write: 0x80001b34 <- 0x778b13 -mem-write: 0x80001b38 <- 0xff8b7b13 -mem-write: 0x80001b3c <- 0xb2903 -mem-write: 0x80001b40 <- 0x4b2c83 -mem-write: 0x80001b44 <- 0x8b0793 -mem-write: 0x80001b48 <- 0xf12a23 -mem-write: 0x80001b4c <- 0xbffa7b93 -mem-write: 0x80001b50 <- 0x793 -mem-write: 0x80001b54 <- 0xebdff06f -mem-write: 0x80001b58 <- 0xc8893 -mem-write: 0x80001b5c <- 0x10a6b93 -mem-write: 0x80001b60 <- 0x20bf793 -mem-write: 0x80001b64 <- 0xc0788e3 -mem-write: 0x80001b68 <- 0x1412783 -mem-write: 0x80001b6c <- 0x778b13 -mem-write: 0x80001b70 <- 0xff8b7b13 -mem-write: 0x80001b74 <- 0x8b0793 -mem-write: 0x80001b78 <- 0xf12a23 -mem-write: 0x80001b7c <- 0xb2903 -mem-write: 0x80001b80 <- 0x4b2c83 -mem-write: 0x80001b84 <- 0x100793 -mem-write: 0x80001b88 <- 0xe89ff06f -mem-write: 0x80001b8c <- 0x44483 -mem-write: 0x80001b90 <- 0x8a6a13 -mem-write: 0x80001b94 <- 0xda4ff06f -mem-write: 0x80001b98 <- 0xc8893 -mem-write: 0x80001b9c <- 0x10a6a13 -mem-write: 0x80001ba0 <- 0x20a7793 -mem-write: 0x80001ba4 <- 0xc0780e3 -mem-write: 0x80001ba8 <- 0x1412783 -mem-write: 0x80001bac <- 0x778b13 -mem-write: 0x80001bb0 <- 0xff8b7b13 -mem-write: 0x80001bb4 <- 0x4b2783 -mem-write: 0x80001bb8 <- 0xb2903 -mem-write: 0x80001bbc <- 0x8b0713 -mem-write: 0x80001bc0 <- 0xe12a23 -mem-write: 0x80001bc4 <- 0x78c93 -mem-write: 0x80001bc8 <- 0xc07c6e3 -mem-write: 0x80001bcc <- 0xfff00793 -mem-write: 0x80001bd0 <- 0xa0b93 -mem-write: 0x80001bd4 <- 0x2fd8463 -mem-write: 0x80001bd8 <- 0x19967b3 -mem-write: 0x80001bdc <- 0xf7fa7b93 -mem-write: 0x80001be0 <- 0x79e63 -mem-write: 0x80001be4 <- 0x20d9263 -mem-write: 0x80001be8 <- 0xb8a13 -mem-write: 0x80001bec <- 0xd93 -mem-write: 0x80001bf0 <- 0xc93 -mem-write: 0x80001bf4 <- 0x1b010b13 -mem-write: 0x80001bf8 <- 0xe45ff06f -mem-write: 0x80001bfc <- 0x3a0c92e3 -VXDRV: upload 1023 bytes to 0x80001c00 -mem-write: 0x80001c00 <- 0x900793 -mem-write: 0x80001c04 <- 0x3927eee3 -mem-write: 0x80001c08 <- 0x3090913 -mem-write: 0x80001c0c <- 0x1b2107a3 -mem-write: 0x80001c10 <- 0xb8a13 -mem-write: 0x80001c14 <- 0x100c93 -mem-write: 0x80001c18 <- 0x1af10b13 -mem-write: 0x80001c1c <- 0xe21ff06f -mem-write: 0x80001c20 <- 0xa0b93 -mem-write: 0x80001c24 <- 0x100713 -mem-write: 0x80001c28 <- 0xfce78ae3 -mem-write: 0x80001c2c <- 0x200713 -mem-write: 0x80001c30 <- 0x6e78c63 -mem-write: 0x80001c34 <- 0x1b010b13 -mem-write: 0x80001c38 <- 0x1dc9713 -mem-write: 0x80001c3c <- 0x797793 -mem-write: 0x80001c40 <- 0x395913 -mem-write: 0x80001c44 <- 0x3078793 -mem-write: 0x80001c48 <- 0x1276933 -mem-write: 0x80001c4c <- 0x3cdc93 -mem-write: 0x80001c50 <- 0xfefb0fa3 -mem-write: 0x80001c54 <- 0x1996733 -mem-write: 0x80001c58 <- 0xb0613 -mem-write: 0x80001c5c <- 0xfffb0b13 -mem-write: 0x80001c60 <- 0xfc071ce3 -mem-write: 0x80001c64 <- 0x1bf693 -mem-write: 0x80001c68 <- 0x6068a63 -mem-write: 0x80001c6c <- 0x3000693 -mem-write: 0x80001c70 <- 0x6d78663 -mem-write: 0x80001c74 <- 0xffe60613 -mem-write: 0x80001c78 <- 0x1b010793 -mem-write: 0x80001c7c <- 0xfedb0fa3 -mem-write: 0x80001c80 <- 0x40c78cb3 -mem-write: 0x80001c84 <- 0xb8a13 -mem-write: 0x80001c88 <- 0x60b13 -mem-write: 0x80001c8c <- 0xdb1ff06f -mem-write: 0x80001c90 <- 0x100713 -mem-write: 0x80001c94 <- 0xe79463 -mem-write: 0x80001c98 <- 0x14d0106f -mem-write: 0x80001c9c <- 0x200713 -mem-write: 0x80001ca0 <- 0xa0b93 -mem-write: 0x80001ca4 <- 0xf8e798e3 -mem-write: 0x80001ca8 <- 0x3412683 -mem-write: 0x80001cac <- 0x1b010b13 -mem-write: 0x80001cb0 <- 0xf97793 -mem-write: 0x80001cb4 <- 0xf687b3 -mem-write: 0x80001cb8 <- 0x7c703 -mem-write: 0x80001cbc <- 0x495913 -mem-write: 0x80001cc0 <- 0x1cc9793 -mem-write: 0x80001cc4 <- 0x127e933 -mem-write: 0x80001cc8 <- 0x4cdc93 -mem-write: 0x80001ccc <- 0xfeeb0fa3 -mem-write: 0x80001cd0 <- 0x19967b3 -mem-write: 0x80001cd4 <- 0xfffb0b13 -mem-write: 0x80001cd8 <- 0xfc079ce3 -mem-write: 0x80001cdc <- 0x1b010793 -mem-write: 0x80001ce0 <- 0x41678cb3 -mem-write: 0x80001ce4 <- 0xb8a13 -mem-write: 0x80001ce8 <- 0xd55ff06f -mem-write: 0x80001cec <- 0x6500693 -mem-write: 0x80001cf0 <- 0x2c96dc63 -mem-write: 0x80001cf4 <- 0xf012683 -mem-write: 0x80001cf8 <- 0xa010593 -mem-write: 0x80001cfc <- 0xb010513 -mem-write: 0x80001d00 <- 0xad12823 -mem-write: 0x80001d04 <- 0xf412683 -mem-write: 0x80001d08 <- 0x5112223 -mem-write: 0x80001d0c <- 0x4f12023 -mem-write: 0x80001d10 <- 0xad12a23 -mem-write: 0x80001d14 <- 0xf812683 -mem-write: 0x80001d18 <- 0xa012023 -mem-write: 0x80001d1c <- 0xa012223 -mem-write: 0x80001d20 <- 0xad12c23 -mem-write: 0x80001d24 <- 0xfc12683 -mem-write: 0x80001d28 <- 0xa012423 -mem-write: 0x80001d2c <- 0xa012623 -mem-write: 0x80001d30 <- 0xad12e23 -mem-write: 0x80001d34 <- 0x39d0f0ef -mem-write: 0x80001d38 <- 0x4012783 -mem-write: 0x80001d3c <- 0x4412883 -mem-write: 0x80001d40 <- 0x4a051863 -mem-write: 0x80001d44 <- 0xe812703 -mem-write: 0x80001d48 <- 0x800156b7 -mem-write: 0x80001d4c <- 0x98068693 -mem-write: 0x80001d50 <- 0xd8a023 -mem-write: 0x80001d54 <- 0x178793 -mem-write: 0x80001d58 <- 0x100693 -mem-write: 0x80001d5c <- 0x170713 -mem-write: 0x80001d60 <- 0xd8a223 -mem-write: 0x80001d64 <- 0xef12623 -mem-write: 0x80001d68 <- 0xee12423 -mem-write: 0x80001d6c <- 0x700693 -mem-write: 0x80001d70 <- 0x888893 -mem-write: 0x80001d74 <- 0x3ae6c6e3 -mem-write: 0x80001d78 <- 0xcc12703 -mem-write: 0x80001d7c <- 0x2012683 -mem-write: 0x80001d80 <- 0x72d75c63 -mem-write: 0x80001d84 <- 0x3012703 -mem-write: 0x80001d88 <- 0x2c12683 -mem-write: 0x80001d8c <- 0x888893 -mem-write: 0x80001d90 <- 0xfee8ac23 -mem-write: 0x80001d94 <- 0xe812703 -mem-write: 0x80001d98 <- 0xd787b3 -mem-write: 0x80001d9c <- 0xfed8ae23 -mem-write: 0x80001da0 <- 0x170713 -mem-write: 0x80001da4 <- 0xef12623 -mem-write: 0x80001da8 <- 0xee12423 -mem-write: 0x80001dac <- 0x700693 -mem-write: 0x80001db0 <- 0xce6c0e3 -mem-write: 0x80001db4 <- 0x2012703 -mem-write: 0x80001db8 <- 0xfff70493 -mem-write: 0x80001dbc <- 0xcc905663 -mem-write: 0x80001dc0 <- 0x1000693 -mem-write: 0x80001dc4 <- 0xe812703 -mem-write: 0x80001dc8 <- 0x3696dce3 -mem-write: 0x80001dcc <- 0x1000913 -mem-write: 0x80001dd0 <- 0x700c93 -mem-write: 0x80001dd4 <- 0xc0006f -mem-write: 0x80001dd8 <- 0xff048493 -mem-write: 0x80001ddc <- 0x369952e3 -mem-write: 0x80001de0 <- 0x812683 -mem-write: 0x80001de4 <- 0x1078793 -mem-write: 0x80001de8 <- 0x170713 -mem-write: 0x80001dec <- 0xd8a023 -mem-write: 0x80001df0 <- 0x128a223 -mem-write: 0x80001df4 <- 0xef12623 -mem-write: 0x80001df8 <- 0xee12423 -mem-write: 0x80001dfc <- 0x888893 -mem-write: 0x80001e00 <- 0xfcecdce3 -mem-write: 0x80001e04 <- 0xe410613 -mem-write: 0x80001e08 <- 0xc0593 -mem-write: 0x80001e0c <- 0xd0513 -mem-write: 0x80001e10 <- 0x3140a0ef -mem-write: 0x80001e14 <- 0x18051e63 -mem-write: 0x80001e18 <- 0xec12783 -mem-write: 0x80001e1c <- 0xe812703 -mem-write: 0x80001e20 <- 0x10c10893 -mem-write: 0x80001e24 <- 0xfb5ff06f -mem-write: 0x80001e28 <- 0x41598933 -mem-write: 0x80001e2c <- 0xc3205263 -mem-write: 0x80001e30 <- 0x1000613 -mem-write: 0x80001e34 <- 0xe812683 -mem-write: 0x80001e38 <- 0x7265463 -mem-write: 0x80001e3c <- 0x1000e13 -mem-write: 0x80001e40 <- 0x700b93 -mem-write: 0x80001e44 <- 0xc0006f -mem-write: 0x80001e48 <- 0xff090913 -mem-write: 0x80001e4c <- 0x52e5a63 -mem-write: 0x80001e50 <- 0x812703 -mem-write: 0x80001e54 <- 0x1078793 -mem-write: 0x80001e58 <- 0x168693 -mem-write: 0x80001e5c <- 0xe8a023 -mem-write: 0x80001e60 <- 0x1c8a223 -mem-write: 0x80001e64 <- 0xef12623 -mem-write: 0x80001e68 <- 0xed12423 -mem-write: 0x80001e6c <- 0x888893 -mem-write: 0x80001e70 <- 0xfcdbdce3 -mem-write: 0x80001e74 <- 0xe410613 -mem-write: 0x80001e78 <- 0xc0593 -mem-write: 0x80001e7c <- 0xd0513 -mem-write: 0x80001e80 <- 0x2a40a0ef -mem-write: 0x80001e84 <- 0x12051663 -mem-write: 0x80001e88 <- 0x1000e13 -mem-write: 0x80001e8c <- 0xff090913 -mem-write: 0x80001e90 <- 0xec12783 -mem-write: 0x80001e94 <- 0xe812683 -mem-write: 0x80001e98 <- 0x10c10893 -mem-write: 0x80001e9c <- 0xfb2e4ae3 -mem-write: 0x80001ea0 <- 0x812703 -mem-write: 0x80001ea4 <- 0x12787b3 -mem-write: 0x80001ea8 <- 0x168693 -mem-write: 0x80001eac <- 0xe8a023 -mem-write: 0x80001eb0 <- 0x128a223 -mem-write: 0x80001eb4 <- 0xef12623 -mem-write: 0x80001eb8 <- 0xed12423 -mem-write: 0x80001ebc <- 0x700613 -mem-write: 0x80001ec0 <- 0x888893 -mem-write: 0x80001ec4 <- 0xb8d65663 -mem-write: 0x80001ec8 <- 0xe410613 -mem-write: 0x80001ecc <- 0xc0593 -mem-write: 0x80001ed0 <- 0xd0513 -mem-write: 0x80001ed4 <- 0x2500a0ef -mem-write: 0x80001ed8 <- 0xc051c63 -mem-write: 0x80001edc <- 0xec12783 -mem-write: 0x80001ee0 <- 0x10c10893 -mem-write: 0x80001ee4 <- 0xb6cff06f -mem-write: 0x80001ee8 <- 0x1000613 -mem-write: 0x80001eec <- 0xe812683 -mem-write: 0x80001ef0 <- 0x7b65263 -mem-write: 0x80001ef4 <- 0x1000b93 -mem-write: 0x80001ef8 <- 0x700913 -mem-write: 0x80001efc <- 0xc0006f -mem-write: 0x80001f00 <- 0xff0d8d93 -mem-write: 0x80001f04 <- 0x5bbd863 -mem-write: 0x80001f08 <- 0x812703 -mem-write: 0x80001f0c <- 0x1078793 -mem-write: 0x80001f10 <- 0x168693 -mem-write: 0x80001f14 <- 0xe8a023 -mem-write: 0x80001f18 <- 0x178a223 -mem-write: 0x80001f1c <- 0xef12623 -mem-write: 0x80001f20 <- 0xed12423 -mem-write: 0x80001f24 <- 0x888893 -mem-write: 0x80001f28 <- 0xfcd95ce3 -mem-write: 0x80001f2c <- 0xe410613 -mem-write: 0x80001f30 <- 0xc0593 -mem-write: 0x80001f34 <- 0xd0513 -mem-write: 0x80001f38 <- 0x1ec0a0ef -mem-write: 0x80001f3c <- 0x6051a63 -mem-write: 0x80001f40 <- 0xff0d8d93 -mem-write: 0x80001f44 <- 0xec12783 -mem-write: 0x80001f48 <- 0xe812683 -mem-write: 0x80001f4c <- 0x10c10893 -mem-write: 0x80001f50 <- 0xfbbbcce3 -mem-write: 0x80001f54 <- 0x812703 -mem-write: 0x80001f58 <- 0x1b787b3 -mem-write: 0x80001f5c <- 0x168693 -mem-write: 0x80001f60 <- 0xe8a023 -mem-write: 0x80001f64 <- 0x1b8a223 -mem-write: 0x80001f68 <- 0xef12623 -mem-write: 0x80001f6c <- 0xed12423 -mem-write: 0x80001f70 <- 0x700613 -mem-write: 0x80001f74 <- 0x888893 -mem-write: 0x80001f78 <- 0xaed65063 -mem-write: 0x80001f7c <- 0xe410613 -mem-write: 0x80001f80 <- 0xc0593 -mem-write: 0x80001f84 <- 0xd0513 -mem-write: 0x80001f88 <- 0x19c0a0ef -mem-write: 0x80001f8c <- 0x2051263 -mem-write: 0x80001f90 <- 0xec12783 -mem-write: 0x80001f94 <- 0x10c10893 -mem-write: 0x80001f98 <- 0xac0ff06f -mem-write: 0x80001f9c <- 0xe410613 -mem-write: 0x80001fa0 <- 0xc0593 -mem-write: 0x80001fa4 <- 0xd0513 -mem-write: 0x80001fa8 <- 0x17c0a0ef -mem-write: 0x80001fac <- 0xb0050263 -mem-write: 0x80001fb0 <- 0x1012b83 -mem-write: 0x80001fb4 <- 0xb20b8863 -mem-write: 0x80001fb8 <- 0xb8593 -mem-write: 0x80001fbc <- 0xd0513 -mem-write: 0x80001fc0 <- 0x5a4020ef -mem-write: 0x80001fc4 <- 0xb20ff06f -mem-write: 0x80001fc8 <- 0xe812683 -mem-write: 0x80001fcc <- 0x178c93 -mem-write: 0x80001fd0 <- 0x2012783 -mem-write: 0x80001fd4 <- 0x100613 -mem-write: 0x80001fd8 <- 0x168a023 -mem-write: 0x80001fdc <- 0x168493 -mem-write: 0x80001fe0 <- 0x888913 -mem-write: 0x80001fe4 <- 0x38f65663 -mem-write: 0x80001fe8 <- 0x100793 -mem-write: 0x80001fec <- 0xf8a223 -mem-write: 0x80001ff0 <- 0xf912623 -mem-write: 0x80001ff4 <- 0xe912423 -mem-write: 0x80001ff8 <- 0x700793 -mem-write: 0x80001ffc <- 0x3a97ce63 -VXDRV: upload 1024 bytes to 0x80001fff -mem-write: 0x80001fff <- 0xc1278374 -mem-write: 0x80002003 <- 0x1270302 -mem-write: 0x80002007 <- 0x14849303 -mem-write: 0x8000200b <- 0xfc8cb300 -mem-write: 0x8000200f <- 0xf9222300 -mem-write: 0x80002013 <- 0xe9202300 -mem-write: 0x80002017 <- 0x91262300 -mem-write: 0x8000201b <- 0x9124230f -mem-write: 0x8000201f <- 0x7007930e -mem-write: 0x80002023 <- 0x89091300 -mem-write: 0x80002027 <- 0x97ca6300 -mem-write: 0x8000202b <- 0x1278374 -mem-write: 0x8000202f <- 0x1486130f -mem-write: 0x80002033 <- 0x1059300 -mem-write: 0x80002037 <- 0xf128230a -mem-write: 0x8000203b <- 0x4127830a -mem-write: 0x8000203f <- 0x105130f -mem-write: 0x80002043 <- 0xc12e230b -mem-write: 0x80002047 <- 0xf12a2300 -mem-write: 0x8000204b <- 0x8127830a -mem-write: 0x8000204f <- 0x120230f -mem-write: 0x80002053 <- 0x122230a -mem-write: 0x80002057 <- 0xf12c230a -mem-write: 0x8000205b <- 0xc127830a -mem-write: 0x8000205f <- 0x124230f -mem-write: 0x80002063 <- 0x126230a -mem-write: 0x80002067 <- 0xf12e230a -mem-write: 0x8000206b <- 0x50f0ef0a -mem-write: 0x8000206f <- 0xc1260306 -mem-write: 0x80002073 <- 0x1278301 -mem-write: 0x80002077 <- 0x89089302 -mem-write: 0x8000207b <- 0x6069300 -mem-write: 0x8000207f <- 0xf78d9300 -mem-write: 0x80002083 <- 0x50a63ff -mem-write: 0x80002087 <- 0x1b071330 -mem-write: 0x8000208b <- 0xbc8cb300 -mem-write: 0x8000208f <- 0xe9202301 -mem-write: 0x80002093 <- 0xb9222300 -mem-write: 0x80002097 <- 0x91262301 -mem-write: 0x8000209b <- 0xc124230f -mem-write: 0x8000209f <- 0x7007930e -mem-write: 0x800020a3 <- 0xc7cc6300 -mem-write: 0x800020a7 <- 0x9079350 -mem-write: 0x800020ab <- 0x24869301 -mem-write: 0x800020af <- 0x8891300 -mem-write: 0x800020b3 <- 0x7889300 -mem-write: 0x800020b7 <- 0x81260300 -mem-write: 0x800020bb <- 0x41071303 -mem-write: 0x800020bf <- 0xe920230d -mem-write: 0x800020c3 <- 0x9607b300 -mem-write: 0x800020c7 <- 0xc9222301 -mem-write: 0x800020cb <- 0xf1262300 -mem-write: 0x800020cf <- 0xd124230e -mem-write: 0x800020d3 <- 0x7007130e -mem-write: 0x800020d7 <- 0xd7586300 -mem-write: 0x800020db <- 0x4ff06f9a -mem-write: 0x800020df <- 0x15737ef -mem-write: 0x800020e3 <- 0x61380 -mem-write: 0x800020e7 <- 0x81268301 -mem-write: 0x800020eb <- 0x870e930e -mem-write: 0x800020ef <- 0x65c63bd -mem-write: 0x800020f3 <- 0x81202309 -mem-write: 0x800020f7 <- 0x91222304 -mem-write: 0x800020fb <- 0xd041304 -mem-write: 0x800020ff <- 0xc049300 -mem-write: 0x80002103 <- 0xe1300 -mem-write: 0x80002107 <- 0x70029301 -mem-write: 0x8000210b <- 0x80c1300 -mem-write: 0x8000210f <- 0xe8d1300 -mem-write: 0x80002113 <- 0xc0006f00 -mem-write: 0x80002117 <- 0xc0c1300 -mem-write: 0x8000211b <- 0x8e5a63ff -mem-write: 0x8000211f <- 0x7879305 -mem-write: 0x80002123 <- 0x16869301 -mem-write: 0x80002127 <- 0xa8a02300 -mem-write: 0x8000212b <- 0xc8a22301 -mem-write: 0x8000212f <- 0xf1262301 -mem-write: 0x80002133 <- 0xd124230e -mem-write: 0x80002137 <- 0x8888930e -mem-write: 0x8000213b <- 0xd2dee300 -mem-write: 0x8000213f <- 0x410613fc -mem-write: 0x80002143 <- 0x485930e -mem-write: 0x80002147 <- 0x4051300 -mem-write: 0x8000214b <- 0x9090ef00 -mem-write: 0x8000214f <- 0x512637d -mem-write: 0x80002153 <- 0xe137a -mem-write: 0x80002157 <- 0xc0c1301 -mem-write: 0x8000215b <- 0xc12783ff -mem-write: 0x8000215f <- 0x8126830e -mem-write: 0x80002163 <- 0xc108930e -mem-write: 0x80002167 <- 0x70029310 -mem-write: 0x8000216b <- 0x8e4ae300 -mem-write: 0x8000216f <- 0xc0813fb -mem-write: 0x80002173 <- 0xd0e9300 -mem-write: 0x80002177 <- 0x48c1300 -mem-write: 0x8000217b <- 0x40d1300 -mem-write: 0x8000217f <- 0x41248300 -mem-write: 0x80002183 <- 0x1240304 -mem-write: 0x80002187 <- 0x787b304 -mem-write: 0x8000218b <- 0x16869301 -mem-write: 0x8000218f <- 0xd8a02300 -mem-write: 0x80002193 <- 0x8a22301 -mem-write: 0x80002197 <- 0xf1262301 -mem-write: 0x8000219b <- 0xd124230e -mem-write: 0x8000219f <- 0x7006130e -mem-write: 0x800021a3 <- 0x88889300 -mem-write: 0x800021a7 <- 0xd6446300 -mem-write: 0x800021ab <- 0xcff06f00 -mem-write: 0x800021af <- 0x41061382 -mem-write: 0x800021b3 <- 0xc05930e -mem-write: 0x800021b7 <- 0xd051300 -mem-write: 0x800021bb <- 0x9090ef00 -mem-write: 0x800021bf <- 0x518e376 -mem-write: 0x800021c3 <- 0xc12783de -mem-write: 0x800021c7 <- 0xc108930e -mem-write: 0x800021cb <- 0xcff06f10 -mem-write: 0x800021cf <- 0x41061380 -mem-write: 0x800021d3 <- 0xc05930e -mem-write: 0x800021d7 <- 0xd051300 -mem-write: 0x800021db <- 0x9090ef00 -mem-write: 0x800021df <- 0x518e374 -mem-write: 0x800021e3 <- 0xc12783dc -mem-write: 0x800021e7 <- 0xc108930e -mem-write: 0x800021eb <- 0xcff06f10 -mem-write: 0x800021ef <- 0xc1258385 -mem-write: 0x800021f3 <- 0xb05c630c -mem-write: 0x800021f7 <- 0xc1270366 -mem-write: 0x800021fb <- 0x1268301 -mem-write: 0x800021ff <- 0x7049302 -mem-write: 0x80002203 <- 0xe6c26300 -mem-write: 0x80002207 <- 0x90566338 -mem-write: 0x8000220b <- 0x81268302 -mem-write: 0x8000220f <- 0x9787b30e -mem-write: 0x80002213 <- 0x68a02300 -mem-write: 0x80002217 <- 0x16869301 -mem-write: 0x8000221b <- 0x98a22300 -mem-write: 0x8000221f <- 0xf1262300 -mem-write: 0x80002223 <- 0xd124230e -mem-write: 0x80002227 <- 0x7006130e -mem-write: 0x8000222b <- 0x88889300 -mem-write: 0x8000222f <- 0xd642e300 -mem-write: 0x80002233 <- 0xf4c69332 -mem-write: 0x80002237 <- 0xc12703ff -mem-write: 0x8000223b <- 0xf6d69301 -mem-write: 0x8000223f <- 0xd4f4b341 -mem-write: 0x80002243 <- 0x9704b300 -mem-write: 0x80002247 <- 0x90446340 -mem-write: 0x8000224b <- 0xc1270348 -mem-write: 0x8000224f <- 0xa769301 -mem-write: 0x80002253 <- 0xeb0db340 -mem-write: 0x80002257 <- 0x698e300 -mem-write: 0x8000225b <- 0xc124830c -mem-write: 0x8000225f <- 0x127030c -mem-write: 0x80002263 <- 0xe4c66302 -mem-write: 0x80002267 <- 0x1a769300 -mem-write: 0x8000226b <- 0x688e300 -mem-write: 0x8000226f <- 0x1268330 -mem-write: 0x80002273 <- 0xc1270303 -mem-write: 0x80002277 <- 0x70061302 -mem-write: 0x8000227b <- 0xd8a02300 -mem-write: 0x8000227f <- 0x81268300 -mem-write: 0x80002283 <- 0xe787b30e -mem-write: 0x80002287 <- 0xe8a22300 -mem-write: 0x8000228b <- 0x16869300 -mem-write: 0x8000228f <- 0xf1262300 -mem-write: 0x80002293 <- 0xd124230e -mem-write: 0x80002297 <- 0x8888930e -mem-write: 0x8000229b <- 0xd6546300 -mem-write: 0x8000229f <- 0x80106f00 -mem-write: 0x800022a3 <- 0x1268317 -mem-write: 0x800022a7 <- 0xdb073302 -mem-write: 0x800022ab <- 0x9684b300 -mem-write: 0x800022af <- 0xb7073340 -mem-write: 0x800022b3 <- 0x4891341 -mem-write: 0x800022b7 <- 0x97546300 -mem-write: 0x800022bb <- 0x7091300 -mem-write: 0x800022bf <- 0x20586300 -mem-write: 0x800022c3 <- 0x81270303 -mem-write: 0x800022c7 <- 0x2787b30e -mem-write: 0x800022cb <- 0xb8a02301 -mem-write: 0x800022cf <- 0x17071301 -mem-write: 0x800022d3 <- 0x28a22300 -mem-write: 0x800022d7 <- 0xf1262301 -mem-write: 0x800022db <- 0xe124230e -mem-write: 0x800022df <- 0x7006930e -mem-write: 0x800022e3 <- 0x88889300 -mem-write: 0x800022e7 <- 0xe6d46300 -mem-write: 0x800022eb <- 0x80106f00 -mem-write: 0x800022ef <- 0xf947131c -mem-write: 0x800022f3 <- 0xf75713ff -mem-write: 0x800022f7 <- 0xe9773341 -mem-write: 0x800022fb <- 0xe484b300 -mem-write: 0x800022ff <- 0x90446340 -mem-write: 0x80002303 <- 0x5fe06f00 -mem-write: 0x80002307 <- 0x693f8 -mem-write: 0x8000230b <- 0x81270301 -mem-write: 0x8000230f <- 0x96d8630e -mem-write: 0x80002313 <- 0x91362 -mem-write: 0x80002317 <- 0x700c9301 -mem-write: 0x8000231b <- 0xc0006f00 -mem-write: 0x8000231f <- 0x4849300 -mem-write: 0x80002323 <- 0x995e63ff -mem-write: 0x80002327 <- 0x81268360 -mem-write: 0x8000232b <- 0x7879300 -mem-write: 0x8000232f <- 0x17071301 -mem-write: 0x80002333 <- 0xd8a02300 -mem-write: 0x80002337 <- 0x28a22300 -mem-write: 0x8000233b <- 0xf1262301 -mem-write: 0x8000233f <- 0xe124230e -mem-write: 0x80002343 <- 0x8888930e -mem-write: 0x80002347 <- 0xecdce300 -mem-write: 0x8000234b <- 0x410613fc -mem-write: 0x8000234f <- 0xc05930e -mem-write: 0x80002353 <- 0xd051300 -mem-write: 0x80002357 <- 0xd090ef00 -mem-write: 0x8000235b <- 0x51ae35c -mem-write: 0x8000235f <- 0xc12783c4 -mem-write: 0x80002363 <- 0x8127030e -mem-write: 0x80002367 <- 0xc108930e -mem-write: 0x8000236b <- 0x5ff06f10 -mem-write: 0x8000236f <- 0x1a7793fb -mem-write: 0x80002373 <- 0x79ae300 -mem-write: 0x80002377 <- 0xc8a223c6 -mem-write: 0x8000237b <- 0x91262300 -mem-write: 0x8000237f <- 0x9124230f -mem-write: 0x80002383 <- 0x7007930e -mem-write: 0x80002387 <- 0x97ca6300 -mem-write: 0x8000238b <- 0x26869322 -mem-write: 0x8000238f <- 0x8889300 -mem-write: 0x80002393 <- 0x5ff06f01 -mem-write: 0x80002397 <- 0xb050e3d2 -mem-write: 0x8000239b <- 0x713d3 -mem-write: 0x8000239f <- 0xb7446301 -mem-write: 0x800023a3 <- 0x80106f01 -mem-write: 0x800023a7 <- 0x700b1361 -mem-write: 0x800023ab <- 0x6049300 -mem-write: 0x800023af <- 0x6f00 -mem-write: 0x800023b3 <- 0xd8d9301 -mem-write: 0x800023b7 <- 0xb75e63ff -mem-write: 0x800023bb <- 0x1484931d -mem-write: 0x800023bf <- 0x81278300 -mem-write: 0x800023c3 <- 0xc8c9300 -mem-write: 0x800023c7 <- 0xe9222301 -mem-write: 0x800023cb <- 0xf9202300 -mem-write: 0x800023cf <- 0x91262300 -mem-write: 0x800023d3 <- 0x9124230f -mem-write: 0x800023d7 <- 0x8909130e -mem-write: 0x800023db <- 0x9b5ce300 -mem-write: 0x800023df <- 0x410613fc -mem-write: 0x800023e3 <- 0xc05930e -mem-write: 0x800023e7 <- 0xd051300 -mem-write: 0x800023eb <- 0x9090ef00 -mem-write: 0x800023ef <- 0x510e353 -mem-write: 0x800023f3 <- 0xc12c83bc -mem-write: 0x800023f7 <- 0x8124830e -mem-write: 0x800023fb <- 0xc109130e -VXDRV: upload 1024 bytes to 0x800023ff -mem-write: 0x800023ff <- 0x71310 -mem-write: 0x80002403 <- 0x1ff06f01 -mem-write: 0x80002407 <- 0x412683fb -mem-write: 0x8000240b <- 0xa779301 -mem-write: 0x8000240f <- 0x46871301 -mem-write: 0x80002413 <- 0x7926300 -mem-write: 0x80002417 <- 0xa779316 -mem-write: 0x8000241b <- 0x7846304 -mem-write: 0x8000241f <- 0x41278368 -mem-write: 0x80002423 <- 0xc9301 -mem-write: 0x80002427 <- 0xe12a2300 -mem-write: 0x8000242b <- 0x7d90300 -mem-write: 0x8000242f <- 0xcff06f00 -mem-write: 0x80002433 <- 0x412683f1 -mem-write: 0x80002437 <- 0xbf79301 -mem-write: 0x8000243b <- 0x46871301 -mem-write: 0x8000243f <- 0x79e6300 -mem-write: 0x80002443 <- 0xbf7930c -mem-write: 0x80002447 <- 0x78e6304 -mem-write: 0x8000244b <- 0x41278360 -mem-write: 0x8000244f <- 0xc9301 -mem-write: 0x80002453 <- 0xe12a2300 -mem-write: 0x80002457 <- 0x7d90300 -mem-write: 0x8000245b <- 0x10079300 -mem-write: 0x8000245f <- 0xff06f00 -mem-write: 0x80002463 <- 0x412683db -mem-write: 0x80002467 <- 0xa779301 -mem-write: 0x8000246b <- 0x46871301 -mem-write: 0x8000246f <- 0x79a6300 -mem-write: 0x80002473 <- 0xa77930e -mem-write: 0x80002477 <- 0x7866304 -mem-write: 0x8000247b <- 0x41278360 -mem-write: 0x8000247f <- 0xe12a2301 -mem-write: 0x80002483 <- 0x7990300 -mem-write: 0x80002487 <- 0xf95c9300 -mem-write: 0x8000248b <- 0xc879341 -mem-write: 0x8000248f <- 0x7de6300 -mem-write: 0x80002493 <- 0x2037b3f2 -mem-write: 0x80002497 <- 0x900cb301 -mem-write: 0x8000249b <- 0xfc8cb341 -mem-write: 0x8000249f <- 0xd0079340 -mem-write: 0x800024a3 <- 0xf103a302 -mem-write: 0x800024a7 <- 0x2009330c -mem-write: 0x800024ab <- 0xa0b9341 -mem-write: 0x800024af <- 0x10079300 -mem-write: 0x800024b3 <- 0xff06f00 -mem-write: 0x800024b7 <- 0x1a7713d6 -mem-write: 0x800024bb <- 0x7146300 -mem-write: 0x800024bf <- 0x9fe06f00 -mem-write: 0x800024c3 <- 0x1ff06fdc -mem-write: 0x800024c7 <- 0xc88938c -mem-write: 0x800024cb <- 0x4ff06f00 -mem-write: 0x800024cf <- 0x793ed -mem-write: 0x800024d3 <- 0xf107a303 -mem-write: 0x800024d7 <- 0xf10b131a -mem-write: 0x800024db <- 0xff06f1a -mem-write: 0x800024df <- 0xc12783d6 -mem-write: 0x800024e3 <- 0x4448303 -mem-write: 0x800024e7 <- 0x7946300 -mem-write: 0x800024eb <- 0xdfe06f00 -mem-write: 0x800024ef <- 0x7c783c4 -mem-write: 0x800024f3 <- 0x7946300 -mem-write: 0x800024f7 <- 0x1fe06f00 -mem-write: 0x800024fb <- 0xa6a13c4 -mem-write: 0x800024ff <- 0x9fe06f40 -mem-write: 0x80002503 <- 0xc12683c3 -mem-write: 0x80002507 <- 0x40b1300 -mem-write: 0x8000250b <- 0xf6d79300 -mem-write: 0x8000250f <- 0xd7202341 -mem-write: 0x80002513 <- 0xf7222300 -mem-write: 0x80002517 <- 0x9fe06f00 -mem-write: 0x8000251b <- 0x6a903db -mem-write: 0x8000251f <- 0xc9300 -mem-write: 0x80002523 <- 0xe12a2300 -mem-write: 0x80002527 <- 0x10079300 -mem-write: 0x8000252b <- 0x4ff06f00 -mem-write: 0x8000252f <- 0x412703ce -mem-write: 0x80002533 <- 0x7278301 -mem-write: 0x80002537 <- 0x47071300 -mem-write: 0x8000253b <- 0xe12a2300 -mem-write: 0x8000253f <- 0x7a58300 -mem-write: 0x80002543 <- 0x47a60300 -mem-write: 0x80002547 <- 0x87a68300 -mem-write: 0x8000254b <- 0xc7a78300 -mem-write: 0x8000254f <- 0xb1282300 -mem-write: 0x80002553 <- 0xc12a230e -mem-write: 0x80002557 <- 0xd12c230e -mem-write: 0x8000255b <- 0xf12e230e -mem-write: 0x8000255f <- 0x5fe06f0e -mem-write: 0x80002563 <- 0x6a903ef -mem-write: 0x80002567 <- 0xe12a2300 -mem-write: 0x8000256b <- 0xf95c9300 -mem-write: 0x8000256f <- 0xc879341 -mem-write: 0x80002573 <- 0x4ff06f00 -mem-write: 0x80002577 <- 0x6a903e5 -mem-write: 0x8000257b <- 0xc9300 -mem-write: 0x8000257f <- 0xe12a2300 -mem-write: 0x80002583 <- 0x8ff06f00 -mem-write: 0x80002587 <- 0x68493dc -mem-write: 0x8000258b <- 0x9040e300 -mem-write: 0x8000258f <- 0x5ff06fc8 -mem-write: 0x80002593 <- 0x148693ca -mem-write: 0x80002597 <- 0x89071300 -mem-write: 0x8000259b <- 0x81278300 -mem-write: 0x8000259f <- 0xbc8cb300 -mem-write: 0x800025a3 <- 0xb9222301 -mem-write: 0x800025a7 <- 0xf9202301 -mem-write: 0x800025ab <- 0x91262300 -mem-write: 0x800025af <- 0xd124230f -mem-write: 0x800025b3 <- 0x7007930e -mem-write: 0x800025b7 <- 0xd7de6300 -mem-write: 0x800025bb <- 0x41061374 -mem-write: 0x800025bf <- 0xc05930e -mem-write: 0x800025c3 <- 0xd051300 -mem-write: 0x800025c7 <- 0xd090ef00 -mem-write: 0x800025cb <- 0x512e335 -mem-write: 0x800025cf <- 0x8126839e -mem-write: 0x800025d3 <- 0xc12c830e -mem-write: 0x800025d7 <- 0x4108930e -mem-write: 0x800025db <- 0x16869311 -mem-write: 0x800025df <- 0xc1091300 -mem-write: 0x800025e3 <- 0x5ff06f10 -mem-write: 0x800025e7 <- 0xc8893ad -mem-write: 0x800025eb <- 0xa0b9300 -mem-write: 0x800025ef <- 0xff06f00 -mem-write: 0x800025f3 <- 0x157b7d7 -mem-write: 0x800025f7 <- 0xc7879380 -mem-write: 0x800025fb <- 0xc8893a3 -mem-write: 0x800025ff <- 0xf12a2300 -mem-write: 0x80002603 <- 0xa779302 -mem-write: 0x80002607 <- 0x7886302 -mem-write: 0x8000260b <- 0x41278312 -mem-write: 0x8000260f <- 0x778b1301 -mem-write: 0x80002613 <- 0x8b7b1300 -mem-write: 0x80002617 <- 0xb2903ff -mem-write: 0x8000261b <- 0x4b2c8300 -mem-write: 0x8000261f <- 0x8b079300 -mem-write: 0x80002623 <- 0xf12a2300 -mem-write: 0x80002627 <- 0x1a779300 -mem-write: 0x8000262b <- 0x78e6300 -mem-write: 0x8000262f <- 0x9967b300 -mem-write: 0x80002633 <- 0x78a6301 -mem-write: 0x80002637 <- 0x79300 -mem-write: 0x8000263b <- 0xf1042303 -mem-write: 0x8000263f <- 0x9104a30c -mem-write: 0x80002643 <- 0x2a6a130c -mem-write: 0x80002647 <- 0xfa7b9300 -mem-write: 0x8000264b <- 0x200793bf -mem-write: 0x8000264f <- 0xff06f00 -mem-write: 0x80002653 <- 0x157b7bc -mem-write: 0x80002657 <- 0x7879380 -mem-write: 0x8000265b <- 0xc8893a5 -mem-write: 0x8000265f <- 0xf12a2300 -mem-write: 0x80002663 <- 0x1ff06f02 -mem-write: 0x80002667 <- 0xc8893fa -mem-write: 0x8000266b <- 0xcff06f00 -mem-write: 0x8000266f <- 0x410613cb -mem-write: 0x80002673 <- 0xc05930e -mem-write: 0x80002677 <- 0xd051300 -mem-write: 0x8000267b <- 0x9090ef00 -mem-write: 0x8000267f <- 0x518e32a -mem-write: 0x80002683 <- 0xc1278392 -mem-write: 0x80002687 <- 0xc108930e -mem-write: 0x8000268b <- 0x8ff06f10 -mem-write: 0x8000268f <- 0x144483f2 -mem-write: 0x80002693 <- 0xa6a1300 -mem-write: 0x80002697 <- 0x14041302 -mem-write: 0x8000269b <- 0xdfe06f00 -mem-write: 0x8000269f <- 0x144483a9 -mem-write: 0x800026a3 <- 0xa6a1300 -mem-write: 0x800026a7 <- 0x14041320 -mem-write: 0x800026ab <- 0xdfe06f00 -mem-write: 0x800026af <- 0x600793a8 -mem-write: 0x800026b3 <- 0xd8c9300 -mem-write: 0x800026b7 <- 0xb7ee6300 -mem-write: 0x800026bb <- 0x157376b -mem-write: 0x800026bf <- 0xc8a9380 -mem-write: 0x800026c3 <- 0x212a2300 -mem-write: 0x800026c7 <- 0x470b1301 -mem-write: 0x800026cb <- 0x9fe06fa6 -mem-write: 0x800026cf <- 0x613ad -mem-write: 0x800026d3 <- 0x81268301 -mem-write: 0x800026d7 <- 0x9654630e -mem-write: 0x800026db <- 0xc9340 -mem-write: 0x800026df <- 0x700d9301 -mem-write: 0x800026e3 <- 0xc0006f00 -mem-write: 0x800026e7 <- 0x4849300 -mem-write: 0x800026eb <- 0x9cda63ff -mem-write: 0x800026ef <- 0x8127033e -mem-write: 0x800026f3 <- 0x7879300 -mem-write: 0x800026f7 <- 0x16869301 -mem-write: 0x800026fb <- 0xe8a02300 -mem-write: 0x800026ff <- 0x98a22300 -mem-write: 0x80002703 <- 0xf1262301 -mem-write: 0x80002707 <- 0xd124230e -mem-write: 0x8000270b <- 0x8888930e -mem-write: 0x8000270f <- 0xdddce300 -mem-write: 0x80002713 <- 0x410613fc -mem-write: 0x80002717 <- 0xc05930e -mem-write: 0x8000271b <- 0xd051300 -mem-write: 0x8000271f <- 0x5090ef00 -mem-write: 0x80002723 <- 0x516e320 -mem-write: 0x80002727 <- 0xc1278388 -mem-write: 0x8000272b <- 0x8126830e -mem-write: 0x8000272f <- 0xc108930e -mem-write: 0x80002733 <- 0x5ff06f10 -mem-write: 0x80002737 <- 0x412683fb -mem-write: 0x8000273b <- 0xa779301 -mem-write: 0x8000273f <- 0x46871301 -mem-write: 0x80002743 <- 0x7806300 -mem-write: 0x80002747 <- 0x6a9031c -mem-write: 0x8000274b <- 0xc9300 -mem-write: 0x8000274f <- 0xe12a2300 -mem-write: 0x80002753 <- 0x5ff06f00 -mem-write: 0x80002757 <- 0x410613ed -mem-write: 0x8000275b <- 0xc05930e -mem-write: 0x8000275f <- 0xd051300 -mem-write: 0x80002763 <- 0x1090ef00 -mem-write: 0x80002767 <- 0x514e31c -mem-write: 0x8000276b <- 0xc12c8384 -mem-write: 0x8000276f <- 0x8124830e -mem-write: 0x80002773 <- 0xc109130e -mem-write: 0x80002777 <- 0x9ff06f10 -mem-write: 0x8000277b <- 0x41061388 -mem-write: 0x8000277f <- 0xc05930e -mem-write: 0x80002783 <- 0xd051300 -mem-write: 0x80002787 <- 0xd090ef00 -mem-write: 0x8000278b <- 0x512e319 -mem-write: 0x8000278f <- 0xc12c8382 -mem-write: 0x80002793 <- 0x8124830e -mem-write: 0x80002797 <- 0xc109130e -mem-write: 0x8000279b <- 0x1ff06f10 -mem-write: 0x8000279f <- 0x10b1389 -mem-write: 0x800027a3 <- 0x7931b -mem-write: 0x800027a7 <- 0x81282300 -mem-write: 0x800027ab <- 0x912e2300 -mem-write: 0x800027af <- 0xb041300 -mem-write: 0x800027b3 <- 0x31222300 -mem-write: 0x800027b7 <- 0xc0b1303 -mem-write: 0x800027bb <- 0x9049300 -mem-write: 0x800027bf <- 0xc899300 -mem-write: 0x800027c3 <- 0xbfa1300 -mem-write: 0x800027c7 <- 0xc12c8340 -mem-write: 0x800027cb <- 0xf00a9303 -mem-write: 0x800027cf <- 0x88c130f -mem-write: 0x800027d3 <- 0x7891300 -mem-write: 0x800027d7 <- 0x40006f00 -mem-write: 0x800027db <- 0xa0061302 -mem-write: 0x800027df <- 0x69300 -mem-write: 0x800027e3 <- 0x4851300 -mem-write: 0x800027e7 <- 0x9859300 -mem-write: 0x800027eb <- 0xd0d0ef00 -mem-write: 0x800027ef <- 0x98ae33f -mem-write: 0x800027f3 <- 0x504932a -mem-write: 0x800027f7 <- 0x5899300 -mem-write: 0x800027fb <- 0xa0061300 -VXDRV: upload 1024 bytes to 0x800027ff -mem-write: 0x800027ff <- 0x69300 -mem-write: 0x80002803 <- 0x4851300 -mem-write: 0x80002807 <- 0x9859300 -mem-write: 0x8000280b <- 0xe0ef00 -mem-write: 0x8000280f <- 0x5051301 -mem-write: 0x80002813 <- 0xa40fa303 -mem-write: 0x80002817 <- 0x190913fe -mem-write: 0x8000281b <- 0xf4041300 -mem-write: 0x8000281f <- 0xa0ee3ff -mem-write: 0x80002823 <- 0xcc683fa -mem-write: 0x80002827 <- 0xd91ae300 -mem-write: 0x8000282b <- 0x5908e3fa -mem-write: 0x8000282f <- 0x99263fb -mem-write: 0x80002833 <- 0x9007934a -mem-write: 0x80002837 <- 0x97ee6300 -mem-write: 0x8000283b <- 0xc089348 -mem-write: 0x8000283f <- 0x1079300 -mem-write: 0x80002843 <- 0xb0c131b -mem-write: 0x80002847 <- 0x40b1300 -mem-write: 0x8000284b <- 0x912e2300 -mem-write: 0x8000284f <- 0xc1248303 -mem-write: 0x80002853 <- 0x41298301 -mem-write: 0x80002857 <- 0x1240302 -mem-write: 0x8000285b <- 0x21202301 -mem-write: 0x8000285f <- 0x678cb303 -mem-write: 0x80002863 <- 0xb8a1341 -mem-write: 0x80002867 <- 0x4ff06f00 -mem-write: 0x8000286b <- 0x8126839d -mem-write: 0x8000286f <- 0x156370e -mem-write: 0x80002873 <- 0x6061380 -mem-write: 0x80002877 <- 0xc8a02398 -mem-write: 0x8000287b <- 0x17879300 -mem-write: 0x8000287f <- 0x10061300 -mem-write: 0x80002883 <- 0x16869300 -mem-write: 0x80002887 <- 0xc8a22300 -mem-write: 0x8000288b <- 0xf1262300 -mem-write: 0x8000288f <- 0xd124230e -mem-write: 0x80002893 <- 0x7006130e -mem-write: 0x80002897 <- 0x88889300 -mem-write: 0x8000289b <- 0xd6446300 -mem-write: 0x8000289f <- 0x5846348 -mem-write: 0x800028a3 <- 0xdfe06f00 -mem-write: 0x800028a7 <- 0x12703ea -mem-write: 0x800028ab <- 0x1a769302 -mem-write: 0x800028af <- 0xe6e6b300 -mem-write: 0x800028b3 <- 0x6946300 -mem-write: 0x800028b7 <- 0x1fe06f00 -mem-write: 0x800028bb <- 0x126839d -mem-write: 0x800028bf <- 0xc1270303 -mem-write: 0x800028c3 <- 0x70061302 -mem-write: 0x800028c7 <- 0xd8a02300 -mem-write: 0x800028cb <- 0x81268300 -mem-write: 0x800028cf <- 0xf707b30e -mem-write: 0x800028d3 <- 0xe8a22300 -mem-write: 0x800028d7 <- 0x16869300 -mem-write: 0x800028db <- 0xf1262300 -mem-write: 0x800028df <- 0xd124230e -mem-write: 0x800028e3 <- 0xd654630e -mem-write: 0x800028e7 <- 0x9fe06f00 -mem-write: 0x800028eb <- 0x888893e9 -mem-write: 0x800028ef <- 0xdfe06f00 -mem-write: 0x800028f3 <- 0x12b83eb -mem-write: 0x800028f7 <- 0x40d1301 -mem-write: 0x800028fb <- 0x48c1300 -mem-write: 0x800028ff <- 0x4ff06f00 -mem-write: 0x80002903 <- 0xa7793eb -mem-write: 0x80002907 <- 0x7806304 -mem-write: 0x8000290b <- 0x41278314 -mem-write: 0x8000290f <- 0xc9301 -mem-write: 0x80002913 <- 0xe12a2300 -mem-write: 0x80002917 <- 0x7d90300 -mem-write: 0x8000291b <- 0xdff06f00 -mem-write: 0x8000291f <- 0x410613d0 -mem-write: 0x80002923 <- 0xc05930e -mem-write: 0x80002927 <- 0xd051300 -mem-write: 0x8000292b <- 0x8090ef00 -mem-write: 0x8000292f <- 0x510637f -mem-write: 0x80002933 <- 0xc12783e8 -mem-write: 0x80002937 <- 0xc108930e -mem-write: 0x8000293b <- 0xcff06f10 -mem-write: 0x8000293f <- 0x812683c3 -mem-write: 0x80002943 <- 0x9787b300 -mem-write: 0x80002947 <- 0x98a22300 -mem-write: 0x8000294b <- 0xd8a02300 -mem-write: 0x8000294f <- 0x17071300 -mem-write: 0x80002953 <- 0xf1262300 -mem-write: 0x80002957 <- 0xe124230e -mem-write: 0x8000295b <- 0x7006930e -mem-write: 0x8000295f <- 0xe6c46300 -mem-write: 0x80002963 <- 0x1fe06f00 -mem-write: 0x80002967 <- 0x9fe06f92 -mem-write: 0x8000296b <- 0x12783e6 -mem-write: 0x8000296f <- 0x105930f -mem-write: 0x80002973 <- 0x105130a -mem-write: 0x80002977 <- 0xf128230b -mem-write: 0x8000297b <- 0x4127830a -mem-write: 0x8000297f <- 0x120230f -mem-write: 0x80002983 <- 0x122230a -mem-write: 0x80002987 <- 0xf12a230a -mem-write: 0x8000298b <- 0x8127830a -mem-write: 0x8000298f <- 0x124230f -mem-write: 0x80002993 <- 0x126230a -mem-write: 0x80002997 <- 0xf12c230a -mem-write: 0x8000299b <- 0xc127830a -mem-write: 0x8000299f <- 0xf12e230f -mem-write: 0x800029a3 <- 0xc0f0ef0a -mem-write: 0x800029a7 <- 0x1288313 -mem-write: 0x800029ab <- 0x540e301 -mem-write: 0x800029af <- 0x71478326 -mem-write: 0x800029b3 <- 0x7007130c -mem-write: 0x800029b7 <- 0x97586304 -mem-write: 0x800029bb <- 0x1573738 -mem-write: 0x800029bf <- 0x70b1380 -mem-write: 0x800029c3 <- 0x12823a3 -mem-write: 0x800029c7 <- 0x1242300 -mem-write: 0x800029cb <- 0x1222302 -mem-write: 0x800029cf <- 0x12e2302 -mem-write: 0x800029d3 <- 0xfa7a1300 -mem-write: 0x800029d7 <- 0x300a93f7 -mem-write: 0x800029db <- 0x300c9300 -mem-write: 0x800029df <- 0xd9300 -mem-write: 0x800029e3 <- 0x7846300 -mem-write: 0x800029e7 <- 0x5fe06f00 -mem-write: 0x800029eb <- 0xcfe06ff7 -mem-write: 0x800029ef <- 0xc12783fc -mem-write: 0x800029f3 <- 0x40b1300 -mem-write: 0x800029f7 <- 0xf7202300 -mem-write: 0x800029fb <- 0x5fe06f00 -mem-write: 0x800029ff <- 0xb05138d -mem-write: 0x80002a03 <- 0x91202300 -mem-write: 0x80002a07 <- 0x5060ef05 -mem-write: 0x80002a0b <- 0x7147832e -mem-write: 0x80002a0f <- 0xf54a930c -mem-write: 0x80002a13 <- 0xfada93ff -mem-write: 0x80002a17 <- 0x212a2341 -mem-write: 0x80002a1b <- 0x1282301 -mem-write: 0x80002a1f <- 0x1242300 -mem-write: 0x80002a23 <- 0x1222302 -mem-write: 0x80002a27 <- 0x12e2302 -mem-write: 0x80002a2b <- 0x1288300 -mem-write: 0x80002a2f <- 0x50c9304 -mem-write: 0x80002a33 <- 0x557ab300 -mem-write: 0x80002a37 <- 0xd9301 -mem-write: 0x80002a3b <- 0x7846300 -mem-write: 0x80002a3f <- 0xdfe06f00 -mem-write: 0x80002a43 <- 0x4fe06ff1 -mem-write: 0x80002a47 <- 0xa7793f7 -mem-write: 0x80002a4b <- 0x7826320 -mem-write: 0x80002a4f <- 0x4127833a -mem-write: 0x80002a53 <- 0xc9301 -mem-write: 0x80002a57 <- 0xe12a2300 -mem-write: 0x80002a5b <- 0x7c90300 -mem-write: 0x80002a5f <- 0x9ff06f00 -mem-write: 0x80002a63 <- 0xbf793bc -mem-write: 0x80002a67 <- 0x7886320 -mem-write: 0x80002a6b <- 0x41278336 -mem-write: 0x80002a6f <- 0xc9301 -mem-write: 0x80002a73 <- 0xe12a2300 -mem-write: 0x80002a77 <- 0x7c90300 -mem-write: 0x80002a7b <- 0x10079300 -mem-write: 0x80002a7f <- 0x1fe06f00 -mem-write: 0x80002a83 <- 0xa7793f9 -mem-write: 0x80002a87 <- 0x78c6320 -mem-write: 0x80002a8b <- 0x41278332 -mem-write: 0x80002a8f <- 0xe12a2301 -mem-write: 0x80002a93 <- 0x7890300 -mem-write: 0x80002a97 <- 0xf95c9300 -mem-write: 0x80002a9b <- 0xc879341 -mem-write: 0x80002a9f <- 0x8ff06f00 -mem-write: 0x80002aa3 <- 0xa779392 -mem-write: 0x80002aa7 <- 0x7826320 -mem-write: 0x80002aab <- 0x41278330 -mem-write: 0x80002aaf <- 0xc9301 -mem-write: 0x80002ab3 <- 0xe12a2300 -mem-write: 0x80002ab7 <- 0x7c90300 -mem-write: 0x80002abb <- 0xff06f00 -mem-write: 0x80002abf <- 0xc1278389 -mem-write: 0x80002ac3 <- 0x7ca630f -mem-write: 0x80002ac7 <- 0x71478334 -mem-write: 0x80002acb <- 0x7007130c -mem-write: 0x80002acf <- 0x975ce304 -mem-write: 0x80002ad3 <- 0x157371c -mem-write: 0x80002ad7 <- 0x870b1380 -mem-write: 0x80002adb <- 0x9ff06fa3 -mem-write: 0x80002adf <- 0x812703ee -mem-write: 0x80002ae3 <- 0x9787b300 -mem-write: 0x80002ae7 <- 0x16869300 -mem-write: 0x80002aeb <- 0xe8a02300 -mem-write: 0x80002aef <- 0x98a22300 -mem-write: 0x80002af3 <- 0xf1262300 -mem-write: 0x80002af7 <- 0xd124230e -mem-write: 0x80002afb <- 0x7006130e -mem-write: 0x80002aff <- 0x88889300 -mem-write: 0x80002b03 <- 0xd6546300 -mem-write: 0x80002b07 <- 0x410613f4 -mem-write: 0x80002b0b <- 0xc05930e -mem-write: 0x80002b0f <- 0xd051300 -mem-write: 0x80002b13 <- 0x90ef00 -mem-write: 0x80002b17 <- 0x51c6361 -mem-write: 0x80002b1b <- 0xc12783c8 -mem-write: 0x80002b1f <- 0xc108930e -mem-write: 0x80002b23 <- 0x8ff06f10 -mem-write: 0x80002b27 <- 0x12703f2 -mem-write: 0x80002b2b <- 0x412c8302 -mem-write: 0x80002b2f <- 0x412e2302 -mem-write: 0x80002b33 <- 0x81202301 -mem-write: 0x80002b37 <- 0x31222304 -mem-write: 0x80002b3b <- 0x51222305 -mem-write: 0x80002b3f <- 0x81298303 -mem-write: 0x80002b43 <- 0x61242302 -mem-write: 0x80002b47 <- 0xeb0bb303 -mem-write: 0x80002b4b <- 0xc1240300 -mem-write: 0x80002b4f <- 0x812a0303 -mem-write: 0x80002b53 <- 0xc12a8304 -mem-write: 0x80002b57 <- 0x70049304 -mem-write: 0x80002b5b <- 0x91300 -mem-write: 0x80002b5f <- 0xc0b1301 -mem-write: 0x80002b63 <- 0xc886300 -mem-write: 0x80002b67 <- 0x9986308 -mem-write: 0x80002b6b <- 0xf4041308 -mem-write: 0x80002b6f <- 0xfc8c93ff -mem-write: 0x80002b73 <- 0x812703ff -mem-write: 0x80002b77 <- 0x4787b30e -mem-write: 0x80002b7b <- 0x58a02301 -mem-write: 0x80002b7f <- 0x17071301 -mem-write: 0x80002b83 <- 0x48a22300 -mem-write: 0x80002b87 <- 0xf1262301 -mem-write: 0x80002b8b <- 0xe124230e -mem-write: 0x80002b8f <- 0x8888930e -mem-write: 0x80002b93 <- 0xe4ce6300 -mem-write: 0x80002b97 <- 0x446830e -mem-write: 0x80002b9b <- 0xbb863300 -mem-write: 0x80002b9f <- 0x68c1341 -mem-write: 0x80002ba3 <- 0xd6546300 -mem-write: 0x80002ba7 <- 0x60c1300 -mem-write: 0x80002bab <- 0x80566300 -mem-write: 0x80002baf <- 0x81268303 -mem-write: 0x80002bb3 <- 0x8787b30e -mem-write: 0x80002bb7 <- 0xb8a02301 -mem-write: 0x80002bbb <- 0x16869301 -mem-write: 0x80002bbf <- 0x88a22300 -mem-write: 0x80002bc3 <- 0xf1262301 -mem-write: 0x80002bc7 <- 0xd124230e -mem-write: 0x80002bcb <- 0xd4c2630e -mem-write: 0x80002bcf <- 0x446830e -mem-write: 0x80002bd3 <- 0x88889300 -mem-write: 0x80002bd7 <- 0xfc461300 -mem-write: 0x80002bdb <- 0xf65613ff -mem-write: 0x80002bdf <- 0xcc773341 -mem-write: 0x80002be3 <- 0xe68c3300 -mem-write: 0x80002be7 <- 0x804c6340 -mem-write: 0x80002beb <- 0xdd8db301 -mem-write: 0x80002bef <- 0xc9ce300 -mem-write: 0x80002bf3 <- 0x98a63f6 -mem-write: 0x80002bf7 <- 0xf989935e -mem-write: 0x80002bfb <- 0x9ff06fff -VXDRV: upload 1024 bytes to 0x80002bff -mem-write: 0x80002bff <- 0x812683f7 -mem-write: 0x80002c03 <- 0x8948630e -mem-write: 0x80002c07 <- 0x80006f01 -mem-write: 0x80002c0b <- 0xc0c1305 -mem-write: 0x80002c0f <- 0x895863ff -mem-write: 0x80002c13 <- 0x81270305 -mem-write: 0x80002c17 <- 0x7879300 -mem-write: 0x80002c1b <- 0x16869301 -mem-write: 0x80002c1f <- 0xe8a02300 -mem-write: 0x80002c23 <- 0x28a22300 -mem-write: 0x80002c27 <- 0xf1262301 -mem-write: 0x80002c2b <- 0xd124230e -mem-write: 0x80002c2f <- 0x8888930e -mem-write: 0x80002c33 <- 0xd4dce300 -mem-write: 0x80002c37 <- 0x410613fc -mem-write: 0x80002c3b <- 0xb05930e -mem-write: 0x80002c3f <- 0xd051300 -mem-write: 0x80002c43 <- 0x90ef00 -mem-write: 0x80002c47 <- 0x514634e -mem-write: 0x80002c4b <- 0xc0c1366 -mem-write: 0x80002c4f <- 0xc12783ff -mem-write: 0x80002c53 <- 0x8126830e -mem-write: 0x80002c57 <- 0xc108930e -mem-write: 0x80002c5b <- 0x894ce310 -mem-write: 0x80002c5f <- 0x812703fb -mem-write: 0x80002c63 <- 0x8787b300 -mem-write: 0x80002c67 <- 0x16869301 -mem-write: 0x80002c6b <- 0xe8a02300 -mem-write: 0x80002c6f <- 0x88a22300 -mem-write: 0x80002c73 <- 0xf1262301 -mem-write: 0x80002c77 <- 0xd124230e -mem-write: 0x80002c7b <- 0xd4c0630e -mem-write: 0x80002c7f <- 0x4468366 -mem-write: 0x80002c83 <- 0x88889300 -mem-write: 0x80002c87 <- 0xdd8db300 -mem-write: 0x80002c8b <- 0x5ff06f00 -mem-write: 0x80002c8f <- 0x410613f6 -mem-write: 0x80002c93 <- 0xb05930e -mem-write: 0x80002c97 <- 0xd051300 -mem-write: 0x80002c9b <- 0x8090ef00 -mem-write: 0x80002c9f <- 0x5186348 -mem-write: 0x80002ca3 <- 0xc1278360 -mem-write: 0x80002ca7 <- 0xc108930e -mem-write: 0x80002cab <- 0xdff06f10 -mem-write: 0x80002caf <- 0x410613ee -mem-write: 0x80002cb3 <- 0xb05930e -mem-write: 0x80002cb7 <- 0xd051300 -mem-write: 0x80002cbb <- 0x8090ef00 -mem-write: 0x80002cbf <- 0x5186346 -mem-write: 0x80002cc3 <- 0x446835e -mem-write: 0x80002cc7 <- 0xc1278300 -mem-write: 0x80002ccb <- 0xc108930e -mem-write: 0x80002ccf <- 0x9ff06f10 -mem-write: 0x80002cd3 <- 0x812783f0 -mem-write: 0x80002cd7 <- 0xc1258304 -mem-write: 0x80002cdb <- 0x91304 -mem-write: 0x80002cdf <- 0xf4043300 -mem-write: 0x80002ce3 <- 0x7861340 -mem-write: 0x80002ce7 <- 0x4051300 -mem-write: 0x80002ceb <- 0xd060ef00 -mem-write: 0x80002cef <- 0x1cc58308 -mem-write: 0x80002cf3 <- 0xa0061300 -mem-write: 0x80002cf7 <- 0x69300 -mem-write: 0x80002cfb <- 0xb0383300 -mem-write: 0x80002cff <- 0x4851300 -mem-write: 0x80002d03 <- 0x9859300 -mem-write: 0x80002d07 <- 0xc8cb300 -mem-write: 0x80002d0b <- 0xc0d0ef01 -mem-write: 0x80002d0f <- 0x5ff06f6d -mem-write: 0x80002d13 <- 0x168693ae -mem-write: 0x80002d17 <- 0x87089300 -mem-write: 0x80002d1b <- 0x7091300 -mem-write: 0x80002d1f <- 0x8ff06f00 -mem-write: 0x80002d23 <- 0x410613b9 -mem-write: 0x80002d27 <- 0xc05930e -mem-write: 0x80002d2b <- 0xd051300 -mem-write: 0x80002d2f <- 0x4090ef00 -mem-write: 0x80002d33 <- 0x51e633f -mem-write: 0x80002d37 <- 0xc12583a6 -mem-write: 0x80002d3b <- 0xc127830c -mem-write: 0x80002d3f <- 0xc108930e -mem-write: 0x80002d43 <- 0xdff06f10 -mem-write: 0x80002d47 <- 0x15737b5 -mem-write: 0x80002d4b <- 0xc70b1380 -mem-write: 0x80002d4f <- 0x5ff06fa2 -mem-write: 0x80002d53 <- 0x410613c7 -mem-write: 0x80002d57 <- 0xc05930e -mem-write: 0x80002d5b <- 0xd051300 -mem-write: 0x80002d5f <- 0x4090ef00 -mem-write: 0x80002d63 <- 0x516633c -mem-write: 0x80002d67 <- 0xc12783a4 -mem-write: 0x80002d6b <- 0xc108930e -mem-write: 0x80002d6f <- 0x4ff06f10 -mem-write: 0x80002d73 <- 0x600c93cc -mem-write: 0x80002d77 <- 0x5ff06f00 -mem-write: 0x80002d7b <- 0x1268394 -mem-write: 0x80002d7f <- 0xdb073302 -mem-write: 0x80002d83 <- 0x9684b300 -mem-write: 0x80002d87 <- 0xb7083340 -mem-write: 0x80002d8b <- 0x4891341 -mem-write: 0x80002d8f <- 0x98506300 -mem-write: 0x80002d93 <- 0x80913d6 -mem-write: 0x80002d97 <- 0x8ff06f00 -mem-write: 0x80002d9b <- 0xc12783d5 -mem-write: 0x80002d9f <- 0x40b1300 -mem-write: 0x80002da3 <- 0xf7102300 -mem-write: 0x80002da7 <- 0x8fe06f00 -mem-write: 0x80002dab <- 0x412783d2 -mem-write: 0x80002daf <- 0xc9301 -mem-write: 0x80002db3 <- 0xe12a2300 -mem-write: 0x80002db7 <- 0x7a90300 -mem-write: 0x80002dbb <- 0x1fe06f00 -mem-write: 0x80002dbf <- 0x412783d9 -mem-write: 0x80002dc3 <- 0xe12a2301 -mem-write: 0x80002dc7 <- 0x7a90300 -mem-write: 0x80002dcb <- 0xf95c9300 -mem-write: 0x80002dcf <- 0xc879341 -mem-write: 0x80002dd3 <- 0x5fe06f00 -mem-write: 0x80002dd7 <- 0x412783df -mem-write: 0x80002ddb <- 0xc9301 -mem-write: 0x80002ddf <- 0xe12a2300 -mem-write: 0x80002de3 <- 0x7a90300 -mem-write: 0x80002de7 <- 0x10079300 -mem-write: 0x80002deb <- 0x5fe06f00 -mem-write: 0x80002def <- 0x412783c2 -mem-write: 0x80002df3 <- 0xc9301 -mem-write: 0x80002df7 <- 0xe12a2300 -mem-write: 0x80002dfb <- 0x7a90300 -mem-write: 0x80002dff <- 0x9ff06f00 -mem-write: 0x80002e03 <- 0x41061382 -mem-write: 0x80002e07 <- 0xc05930e -mem-write: 0x80002e0b <- 0xd051300 -mem-write: 0x80002e0f <- 0x4090ef00 -mem-write: 0x80002e13 <- 0xfe06f31 -mem-write: 0x80002e17 <- 0xd00793cd -mem-write: 0x80002e1b <- 0xf103a302 -mem-write: 0x80002e1f <- 0xdff06f0c -mem-write: 0x80002e23 <- 0x793ca -mem-write: 0x80002e27 <- 0xf1042303 -mem-write: 0x80002e2b <- 0x8007930c -mem-write: 0x80002e2f <- 0x2a671305 -mem-write: 0x80002e33 <- 0xf104a300 -mem-write: 0x80002e37 <- 0xe124230c -mem-write: 0x80002e3b <- 0x30079302 -mem-write: 0x80002e3f <- 0x1282306 -mem-write: 0x80002e43 <- 0xc10b1300 -mem-write: 0x80002e47 <- 0xb7c4e314 -mem-write: 0x80002e4b <- 0xc1230303 -mem-write: 0x80002e4f <- 0xf4fb930f -mem-write: 0x80002e53 <- 0x712223fd -mem-write: 0x80002e57 <- 0x12c2305 -mem-write: 0x80002e5b <- 0x12e0304 -mem-write: 0x80002e5f <- 0x412e830f -mem-write: 0x80002e63 <- 0x812f030f -mem-write: 0x80002e67 <- 0x2a6a130f -mem-write: 0x80002e6b <- 0x34e6310 -mem-write: 0x80002e6f <- 0x10079344 -mem-write: 0x80002e73 <- 0xf48ee306 -mem-write: 0x80002e77 <- 0x1007930a -mem-write: 0x80002e7b <- 0xf4846304 -mem-write: 0x80002e7f <- 0x4fe06f00 -mem-write: 0x80002e83 <- 0x10a93e6 -mem-write: 0x80002e87 <- 0xa85130b -mem-write: 0x80002e8b <- 0x112a2300 -mem-write: 0x80002e8f <- 0xc1282305 -mem-write: 0x80002e93 <- 0xd12a230b -mem-write: 0x80002e97 <- 0xe12c230b -mem-write: 0x80002e9b <- 0x612e230b -mem-write: 0x80002e9f <- 0x110ef0a -mem-write: 0x80002ea3 <- 0xc1061370 -mem-write: 0x80002ea7 <- 0x60ef0c -mem-write: 0x80002eab <- 0x5861325 -mem-write: 0x80002eaf <- 0x5059300 -mem-write: 0x80002eb3 <- 0xa851300 -mem-write: 0x80002eb7 <- 0x4110ef00 -mem-write: 0x80002ebb <- 0x127834f -mem-write: 0x80002ebf <- 0x10c930b -mem-write: 0x80002ec3 <- 0x109130a -mem-write: 0x80002ec7 <- 0xf1282309 -mem-write: 0x80002ecb <- 0x41278308 -mem-write: 0x80002ecf <- 0x106130b -mem-write: 0x80002ed3 <- 0x9059308 -mem-write: 0x80002ed7 <- 0xf12a2300 -mem-write: 0x80002edb <- 0x81278308 -mem-write: 0x80002edf <- 0xc85130b -mem-write: 0x80002ee3 <- 0xc1202300 -mem-write: 0x80002ee7 <- 0xf12c2304 -mem-write: 0x80002eeb <- 0xc1278308 -mem-write: 0x80002eef <- 0x120230b -mem-write: 0x80002ef3 <- 0x1222308 -mem-write: 0x80002ef7 <- 0xf12e2308 -mem-write: 0x80002efb <- 0xfc07b708 -mem-write: 0x80002eff <- 0xf126233f -mem-write: 0x80002f03 <- 0x1242308 -mem-write: 0x80002f07 <- 0xd0e0ef08 -mem-write: 0x80002f0b <- 0x1280351 -mem-write: 0x80002f0f <- 0x412e030a -mem-write: 0x80002f13 <- 0x812e830a -mem-write: 0x80002f17 <- 0xc12f030a -mem-write: 0x80002f1b <- 0xc85930a -mem-write: 0x80002f1f <- 0xa851300 -mem-write: 0x80002f23 <- 0x1282300 -mem-write: 0x80002f27 <- 0x128230b -mem-write: 0x80002f2b <- 0xc12a2305 -mem-write: 0x80002f2f <- 0xc122230b -mem-write: 0x80002f33 <- 0xd12c2303 -mem-write: 0x80002f37 <- 0xd120230b -mem-write: 0x80002f3b <- 0xe12e2303 -mem-write: 0x80002f3f <- 0xe12e230b -mem-write: 0x80002f43 <- 0x1202301 -mem-write: 0x80002f47 <- 0x122230a -mem-write: 0x80002f4b <- 0x124230a -mem-write: 0x80002f4f <- 0x126230a -mem-write: 0x80002f53 <- 0xd0e0ef0a -mem-write: 0x80002f57 <- 0xc12f0317 -mem-write: 0x80002f5b <- 0x12e8301 -mem-write: 0x80002f5f <- 0x412e0302 -mem-write: 0x80002f63 <- 0x1280302 -mem-write: 0x80002f67 <- 0x41288305 -mem-write: 0x80002f6b <- 0x5166305 -mem-write: 0x80002f6f <- 0x10079300 -mem-write: 0x80002f73 <- 0xf1262300 -mem-write: 0x80002f77 <- 0x157b70c -mem-write: 0x80002f7b <- 0x7879380 -mem-write: 0x80002f7f <- 0xf12223a5 -mem-write: 0x80002f83 <- 0xfd869302 -mem-write: 0x80002f87 <- 0x412e23ff -mem-write: 0x80002f8b <- 0x91222305 -mem-write: 0x80002f8f <- 0xb1262306 -mem-write: 0x80002f93 <- 0xa12a2307 -mem-write: 0x80002f97 <- 0x812c2307 -mem-write: 0x80002f9b <- 0x81202307 -mem-write: 0x80002f9f <- 0x31242306 -mem-write: 0x80002fa3 <- 0x11282307 -mem-write: 0x80002fa7 <- 0xb0c1307 -mem-write: 0x80002fab <- 0x68b9300 -mem-write: 0x80002faf <- 0x612e2300 -mem-write: 0x80002fb3 <- 0x80d1307 -mem-write: 0x80002fb7 <- 0xe0d9300 -mem-write: 0x80002fbb <- 0xe849300 -mem-write: 0x80002fbf <- 0xf0a1300 -mem-write: 0x80002fc3 <- 0x80006f00 -mem-write: 0x80002fc7 <- 0xc859304 -mem-write: 0x80002fcb <- 0xa851300 -mem-write: 0x80002fcf <- 0xc1202300 -mem-write: 0x80002fd3 <- 0xf12e2302 -mem-write: 0x80002fd7 <- 0xf12c2301 -mem-write: 0x80002fdb <- 0xc12e230b -mem-write: 0x80002fdf <- 0x6128230a -mem-write: 0x80002fe3 <- 0x312a230b -mem-write: 0x80002fe7 <- 0x120230b -mem-write: 0x80002feb <- 0x122230a -mem-write: 0x80002fef <- 0x124230a -mem-write: 0x80002ff3 <- 0x126230a -mem-write: 0x80002ff7 <- 0x90e0ef0a -mem-write: 0x80002ffb <- 0xc12f830d -VXDRV: upload 1024 bytes to 0x80002fff -mem-write: 0x80002fff <- 0x1260301 -mem-write: 0x80003003 <- 0xfb8b9302 -mem-write: 0x80003007 <- 0x50263ff -mem-write: 0x8000300b <- 0x307b70e -mem-write: 0x8000300f <- 0x9061340 -mem-write: 0x80003013 <- 0xc859300 -mem-write: 0x80003017 <- 0xa851300 -mem-write: 0x8000301b <- 0xf12e2300 -mem-write: 0x8000301f <- 0xa1202308 -mem-write: 0x80003023 <- 0xb122230b -mem-write: 0x80003027 <- 0x9124230b -mem-write: 0x8000302b <- 0x4126230a -mem-write: 0x8000302f <- 0x128230b -mem-write: 0x80003033 <- 0x12a2308 -mem-write: 0x80003037 <- 0x12c2308 -mem-write: 0x8000303b <- 0x90e0ef08 -mem-write: 0x8000303f <- 0xa85133e -mem-write: 0x80003043 <- 0x4110ef00 -mem-write: 0x80003047 <- 0x5059310 -mem-write: 0x8000304b <- 0x5041300 -mem-write: 0x8000304f <- 0xa851300 -mem-write: 0x80003053 <- 0x1298300 -mem-write: 0x80003057 <- 0x4124830b -mem-write: 0x8000305b <- 0x812b030b -mem-write: 0x8000305f <- 0xc12a030b -mem-write: 0x80003063 <- 0x8110ef0b -mem-write: 0x80003067 <- 0x127031f -mem-write: 0x8000306b <- 0x126030b -mem-write: 0x8000306f <- 0x9059304 -mem-write: 0x80003073 <- 0xe1202300 -mem-write: 0x80003077 <- 0x41270308 -mem-write: 0x8000307b <- 0xc85130b -mem-write: 0x8000307f <- 0x31282300 -mem-write: 0x80003083 <- 0xe1222309 -mem-write: 0x80003087 <- 0x81270308 -mem-write: 0x8000308b <- 0x912a230b -mem-write: 0x8000308f <- 0x612c2308 -mem-write: 0x80003093 <- 0xe1242309 -mem-write: 0x80003097 <- 0xc1270308 -mem-write: 0x8000309b <- 0x412e230b -mem-write: 0x8000309f <- 0xe1262309 -mem-write: 0x800030a3 <- 0x50f0ef08 -mem-write: 0x800030a7 <- 0x41278338 -mem-write: 0x800030ab <- 0x12b0302 -mem-write: 0x800030af <- 0x4129830a -mem-write: 0x800030b3 <- 0x8787330a -mem-write: 0x800030b7 <- 0x7470300 -mem-write: 0x800030bb <- 0x812f8300 -mem-write: 0x800030bf <- 0xc126030a -mem-write: 0x800030c3 <- 0x812a230a -mem-write: 0x800030c7 <- 0xec002305 -mem-write: 0x800030cb <- 0x71282300 -mem-write: 0x800030cf <- 0xf0079305 -mem-write: 0x800030d3 <- 0x1c0c13ff -mem-write: 0x800030d7 <- 0xb0d1300 -mem-write: 0x800030db <- 0x98d9300 -mem-write: 0x800030df <- 0xf849300 -mem-write: 0x800030e3 <- 0x60a1300 -mem-write: 0x800030e7 <- 0xfb90e300 -mem-write: 0x800030eb <- 0x12883ee -mem-write: 0x800030ef <- 0xb039307 -mem-write: 0x800030f3 <- 0x9829300 -mem-write: 0x800030f7 <- 0xfe093700 -mem-write: 0x800030fb <- 0xc85933f -mem-write: 0x800030ff <- 0xa851300 -mem-write: 0x80003103 <- 0x11202300 -mem-write: 0x80003107 <- 0x812e2303 -mem-write: 0x8000310b <- 0xc12a0300 -mem-write: 0x8000310f <- 0x41248305 -mem-write: 0x80003113 <- 0x1240306 -mem-write: 0x80003117 <- 0x71282306 -mem-write: 0x8000311b <- 0x7122230a -mem-write: 0x8000311f <- 0x512a2306 -mem-write: 0x80003123 <- 0x5120230a -mem-write: 0x80003127 <- 0xf12c2306 -mem-write: 0x8000312b <- 0xf12e230b -mem-write: 0x8000312f <- 0xc12e2305 -mem-write: 0x80003133 <- 0xc120230a -mem-write: 0x80003137 <- 0x1202304 -mem-write: 0x8000313b <- 0x122230a -mem-write: 0x8000313f <- 0x124230a -mem-write: 0x80003143 <- 0x2126230a -mem-write: 0x80003147 <- 0x50e0ef0b -mem-write: 0x8000314b <- 0xc0b9305 -mem-write: 0x8000314f <- 0xc12d8300 -mem-write: 0x80003153 <- 0x412d0306 -mem-write: 0x80003157 <- 0x812c0307 -mem-write: 0x8000315b <- 0xc12b0307 -mem-write: 0x8000315f <- 0x81298307 -mem-write: 0x80003163 <- 0x1288306 -mem-write: 0x80003167 <- 0xa0426302 -mem-write: 0x8000316b <- 0x41238348 -mem-write: 0x8000316f <- 0x1228306 -mem-write: 0x80003173 <- 0xc12f8306 -mem-write: 0x80003177 <- 0x1260305 -mem-write: 0x8000317b <- 0xc859304 -mem-write: 0x8000317f <- 0xa851300 -mem-write: 0x80003183 <- 0x71282300 -mem-write: 0x80003187 <- 0x512a230a -mem-write: 0x8000318b <- 0xf12c230a -mem-write: 0x8000318f <- 0xc12e230b -mem-write: 0x80003193 <- 0x120230a -mem-write: 0x80003197 <- 0x122230a -mem-write: 0x8000319b <- 0x124230a -mem-write: 0x8000319f <- 0x2126230a -mem-write: 0x800031a3 <- 0xc0e0ef0b -mem-write: 0x800031a7 <- 0x1288372 -mem-write: 0x800031ab <- 0x5186302 -mem-write: 0x800031af <- 0xc1278300 -mem-write: 0x800031b3 <- 0x17fc9301 -mem-write: 0x800031b7 <- 0xc9a6300 -mem-write: 0x800031bb <- 0x1278342 -mem-write: 0x800031bf <- 0x61305 -mem-write: 0x800031c3 <- 0x17869303 -mem-write: 0x800031c7 <- 0xdb86b300 -mem-write: 0x800031cb <- 0x7c86300 -mem-write: 0x800031cf <- 0x1b8b9300 -mem-write: 0x800031d3 <- 0xcb8fa300 -mem-write: 0x800031d7 <- 0x769ce3fe -mem-write: 0x800031db <- 0x6b87b3ff -mem-write: 0x800031df <- 0xf1202341 -mem-write: 0x800031e3 <- 0x8fe06f02 -mem-write: 0x800031e7 <- 0x12703be -mem-write: 0x800031eb <- 0xb0c1302 -mem-write: 0x800031ef <- 0x812b0300 -mem-write: 0x800031f3 <- 0x812e2302 -mem-write: 0x800031f7 <- 0xc12a0302 -mem-write: 0x800031fb <- 0xeb06b301 -mem-write: 0x800031ff <- 0x1240300 -mem-write: 0x80003203 <- 0x41298304 -mem-write: 0x80003207 <- 0x412a8304 -mem-write: 0x8000320b <- 0xb6e46302 -mem-write: 0x8000320f <- 0xcff06f01 -mem-write: 0x80003213 <- 0x68d9384 -mem-write: 0x80003217 <- 0x4ff06f00 -mem-write: 0x8000321b <- 0xc1270384 -mem-write: 0x8000321f <- 0xd0079301 -mem-write: 0x80003223 <- 0xf74463ff -mem-write: 0x80003227 <- 0xedda6300 -mem-write: 0x8000322b <- 0xe4849300 -mem-write: 0x8000322f <- 0xf4f793ff -mem-write: 0x80003233 <- 0xf12223fd -mem-write: 0x80003237 <- 0xcfe06f04 -mem-write: 0x8000323b <- 0x12783bb -mem-write: 0x8000323f <- 0xc1270302 -mem-write: 0x80003243 <- 0xf7406301 -mem-write: 0x80003247 <- 0x8127832a -mem-write: 0x8000324b <- 0x70c9302 -mem-write: 0x8000324f <- 0x17f79300 -mem-write: 0x80003253 <- 0x7866300 -mem-write: 0x80003257 <- 0xc1278300 -mem-write: 0x8000325b <- 0xf70cb302 -mem-write: 0x8000325f <- 0x81278300 -mem-write: 0x80003263 <- 0x7f79302 -mem-write: 0x80003267 <- 0x7866340 -mem-write: 0x8000326b <- 0xc1278300 -mem-write: 0x8000326f <- 0xf0426301 -mem-write: 0x80003273 <- 0xfcca935c -mem-write: 0x80003277 <- 0xfada93ff -mem-write: 0x8000327b <- 0x5cfab341 -mem-write: 0x8000327f <- 0x70049301 -mem-write: 0x80003283 <- 0x1242306 -mem-write: 0x80003287 <- 0x1222302 -mem-write: 0x8000328b <- 0x4fe06f02 -mem-write: 0x8000328f <- 0x714783c8 -mem-write: 0x80003293 <- 0xd930c -mem-write: 0x80003297 <- 0x7846300 -mem-write: 0x8000329b <- 0xfe06f00 -mem-write: 0x8000329f <- 0x9fd06fec -mem-write: 0x800032a3 <- 0x900793f1 -mem-write: 0x800032a7 <- 0x97e66300 -mem-write: 0x800032ab <- 0xff06fd4 -mem-write: 0x800032af <- 0x12b83d9 -mem-write: 0x800032b3 <- 0xb0c1301 -mem-write: 0x800032b7 <- 0xdfe06f00 -mem-write: 0x800032bb <- 0x412423cf -mem-write: 0x800032bf <- 0x1282303 -mem-write: 0x800032c3 <- 0x90a1300 -mem-write: 0x800032c7 <- 0x7b700 -mem-write: 0x800032cb <- 0x67c33380 -mem-write: 0x800032cf <- 0xd0079300 -mem-write: 0x800032d3 <- 0xf12c2302 -mem-write: 0x800032d7 <- 0x9ff06f04 -mem-write: 0x800032db <- 0x410613b9 -mem-write: 0x800032df <- 0xb05930e -mem-write: 0x800032e3 <- 0xd051300 -mem-write: 0x800032e7 <- 0xd080ef00 -mem-write: 0x800032eb <- 0x512e363 -mem-write: 0x800032ef <- 0x44683fc -mem-write: 0x800032f3 <- 0xc1278300 -mem-write: 0x800032f7 <- 0xc108930e -mem-write: 0x800032fb <- 0xdd8db310 -mem-write: 0x800032ff <- 0x1ff06f00 -mem-write: 0x80003303 <- 0x10a938f -mem-write: 0x80003307 <- 0x107930b -mem-write: 0x8000330b <- 0xc108130d -mem-write: 0x8000330f <- 0xc107130d -mem-write: 0x80003313 <- 0xd86930c -mem-write: 0x80003317 <- 0x20061300 -mem-write: 0x8000331b <- 0xa859300 -mem-write: 0x8000331f <- 0xd051300 -mem-write: 0x80003323 <- 0xc1282300 -mem-write: 0x80003327 <- 0xc120230b -mem-write: 0x8000332b <- 0xd12a2305 -mem-write: 0x8000332f <- 0xd122230b -mem-write: 0x80003333 <- 0xe12c2303 -mem-write: 0x80003337 <- 0xe120230b -mem-write: 0x8000333b <- 0x612e2303 -mem-write: 0x8000333f <- 0x612e230a -mem-write: 0x80003343 <- 0x1020ef00 -mem-write: 0x80003347 <- 0x7007936f -mem-write: 0x8000334b <- 0xc1230304 -mem-write: 0x8000334f <- 0x12f0301 -mem-write: 0x80003353 <- 0x412e8302 -mem-write: 0x80003357 <- 0x12e0302 -mem-write: 0x8000335b <- 0x1288304 -mem-write: 0x8000335f <- 0x50b1305 -mem-write: 0x80003363 <- 0xfb906300 -mem-write: 0x80003367 <- 0x81278308 -mem-write: 0x8000336b <- 0x17f79302 -mem-write: 0x8000336f <- 0x7966300 -mem-write: 0x80003373 <- 0x7007932e -mem-write: 0x80003377 <- 0xc1270304 -mem-write: 0x8000337b <- 0xf122230d -mem-write: 0x8000337f <- 0x4fe06f04 -mem-write: 0x80003383 <- 0x10a93a4 -mem-write: 0x80003387 <- 0xc108130b -mem-write: 0x8000338b <- 0x107930d -mem-write: 0x8000338f <- 0xc107130d -mem-write: 0x80003393 <- 0xd86930c -mem-write: 0x80003397 <- 0x30061300 -mem-write: 0x8000339b <- 0xa859300 -mem-write: 0x8000339f <- 0xd051300 -mem-write: 0x800033a3 <- 0x11282300 -mem-write: 0x800033a7 <- 0xc1282305 -mem-write: 0x800033ab <- 0xc120230b -mem-write: 0x800033af <- 0xd12a2305 -mem-write: 0x800033b3 <- 0xd122230b -mem-write: 0x800033b7 <- 0xe12c2303 -mem-write: 0x800033bb <- 0xe120230b -mem-write: 0x800033bf <- 0x612e2303 -mem-write: 0x800033c3 <- 0x612e230a -mem-write: 0x800033c7 <- 0xd020ef00 -mem-write: 0x800033cb <- 0xc1230366 -mem-write: 0x800033cf <- 0x12f0301 -mem-write: 0x800033d3 <- 0x412e8302 -mem-write: 0x800033d7 <- 0x12e0302 -mem-write: 0x800033db <- 0x1288304 -mem-write: 0x800033df <- 0x50b1305 -mem-write: 0x800033e3 <- 0x60079300 -mem-write: 0x800033e7 <- 0xbb093304 -mem-write: 0x800033eb <- 0xfb9e6301 -mem-write: 0x800033ef <- 0xb468326 -mem-write: 0x800033f3 <- 0x79300 -mem-write: 0x800033f7 <- 0xf6866303 -mem-write: 0x800033fb <- 0x10c9350 -VXDRV: upload 1024 bytes to 0x800033ff -mem-write: 0x800033ff <- 0xc127830a -mem-write: 0x80003403 <- 0xf909330c -mem-write: 0x80003407 <- 0xfe06f00 -mem-write: 0x8000340b <- 0xd0079396 -mem-write: 0x8000340f <- 0xf103a302 -mem-write: 0x80003413 <- 0xff06f0c -mem-write: 0x80003417 <- 0x410613da -mem-write: 0x8000341b <- 0xc05930e -mem-write: 0x8000341f <- 0xd051300 -mem-write: 0x80003423 <- 0x1080ef00 -mem-write: 0x80003427 <- 0x5046350 -mem-write: 0x8000342b <- 0x5fe06f00 -mem-write: 0x8000342f <- 0xc12483b8 -mem-write: 0x80003433 <- 0xc127830c -mem-write: 0x80003437 <- 0xc108930e -mem-write: 0x8000343b <- 0x9fe06f10 -mem-write: 0x8000343f <- 0x714783e6 -mem-write: 0x80003443 <- 0x212a230c -mem-write: 0x80003447 <- 0x1242301 -mem-write: 0x8000344b <- 0x1222302 -mem-write: 0x8000344f <- 0x12e2302 -mem-write: 0x80003453 <- 0xd8a9300 -mem-write: 0x80003457 <- 0xd8c9300 -mem-write: 0x8000345b <- 0xd9300 -mem-write: 0x8000345f <- 0x7846300 -mem-write: 0x80003463 <- 0x8fe06f00 -mem-write: 0x80003467 <- 0x1fd06fcf -mem-write: 0x8000346b <- 0x812783d5 -mem-write: 0x8000346f <- 0xc1270302 -mem-write: 0x80003473 <- 0x17f79301 -mem-write: 0x80003477 <- 0xb7e7b300 -mem-write: 0x8000347b <- 0xe0566301 -mem-write: 0x8000347f <- 0x7906350 -mem-write: 0x80003483 <- 0xc12c8344 -mem-write: 0x80003487 <- 0x60049301 -mem-write: 0x8000348b <- 0x81278306 -mem-write: 0x8000348f <- 0x7f79302 -mem-write: 0x80003493 <- 0x7926340 -mem-write: 0x80003497 <- 0xfcca933a -mem-write: 0x8000349b <- 0xfada93ff -mem-write: 0x8000349f <- 0x5cfab341 -mem-write: 0x800034a3 <- 0x1ff06f01 -mem-write: 0x800034a7 <- 0x15737de -mem-write: 0x800034ab <- 0x470b1380 -mem-write: 0x800034af <- 0x4ff06fa3 -mem-write: 0x800034b3 <- 0x410613d1 -mem-write: 0x800034b7 <- 0xc05930e -mem-write: 0x800034bb <- 0xd051300 -mem-write: 0x800034bf <- 0x5080ef00 -mem-write: 0x800034c3 <- 0x5046346 -mem-write: 0x800034c7 <- 0x9fe06f00 -mem-write: 0x800034cb <- 0xc12483ae -mem-write: 0x800034cf <- 0x127030c -mem-write: 0x800034d3 <- 0xc1278302 -mem-write: 0x800034d7 <- 0xc108930e -mem-write: 0x800034db <- 0x9704b310 -mem-write: 0x800034df <- 0x1fe06f40 -mem-write: 0x800034e3 <- 0x12783e1 -mem-write: 0x800034e7 <- 0xc1270302 -mem-write: 0x800034eb <- 0x70049302 -mem-write: 0x800034ef <- 0xe78cb306 -mem-write: 0x800034f3 <- 0xc1278300 -mem-write: 0x800034f7 <- 0xf04ae301 -mem-write: 0x800034fb <- 0xfc8cb3f8 -mem-write: 0x800034ff <- 0x1c8c9340 -mem-write: 0x80003503 <- 0xfcca9300 -mem-write: 0x80003507 <- 0xfada93ff -mem-write: 0x8000350b <- 0x5cfab341 -mem-write: 0x8000350f <- 0x5ff06f01 -mem-write: 0x80003513 <- 0x156b7d7 -mem-write: 0x80003517 <- 0x868e9380 -mem-write: 0x8000351b <- 0xfe06fbd -mem-write: 0x8000351f <- 0xf00793b5 -mem-write: 0x80003523 <- 0xf12623ff -mem-write: 0x80003527 <- 0xdfd06f00 -mem-write: 0x8000352b <- 0x613dc -mem-write: 0x8000352f <- 0xb004b3ff -mem-write: 0x80003533 <- 0xc5d26340 -mem-write: 0x80003537 <- 0x91306 -mem-write: 0x8000353b <- 0x700c9301 -mem-write: 0x8000353f <- 0xc0006f00 -mem-write: 0x80003543 <- 0x4849300 -mem-write: 0x80003547 <- 0x995863ff -mem-write: 0x8000354b <- 0x81270304 -mem-write: 0x8000354f <- 0x7879300 -mem-write: 0x80003553 <- 0x16869301 -mem-write: 0x80003557 <- 0xe8a02300 -mem-write: 0x8000355b <- 0x28a22300 -mem-write: 0x8000355f <- 0xf1262301 -mem-write: 0x80003563 <- 0xd124230e -mem-write: 0x80003567 <- 0x8888930e -mem-write: 0x8000356b <- 0xdcdce300 -mem-write: 0x8000356f <- 0x410613fc -mem-write: 0x80003573 <- 0xc05930e -mem-write: 0x80003577 <- 0xd051300 -mem-write: 0x8000357b <- 0x9080ef00 -mem-write: 0x8000357f <- 0x504633a -mem-write: 0x80003583 <- 0xdfe06f00 -mem-write: 0x80003587 <- 0xc12783a2 -mem-write: 0x8000358b <- 0x8126830e -mem-write: 0x8000358f <- 0xc108930e -mem-write: 0x80003593 <- 0x1ff06f10 -mem-write: 0x80003597 <- 0x812703fb -mem-write: 0x8000359b <- 0x9787b300 -mem-write: 0x8000359f <- 0x16869300 -mem-write: 0x800035a3 <- 0xe8a02300 -mem-write: 0x800035a7 <- 0x98a22300 -mem-write: 0x800035ab <- 0xf1262300 -mem-write: 0x800035af <- 0xd124230e -mem-write: 0x800035b3 <- 0x7006130e -mem-write: 0x800035b7 <- 0xd65a6300 -mem-write: 0x800035bb <- 0x410613b2 -mem-write: 0x800035bf <- 0xc05930e -mem-write: 0x800035c3 <- 0xd051300 -mem-write: 0x800035c7 <- 0xd080ef00 -mem-write: 0x800035cb <- 0x5046335 -mem-write: 0x800035cf <- 0x1fe06f00 -mem-write: 0x800035d3 <- 0xc127839e -mem-write: 0x800035d7 <- 0x8126830e -mem-write: 0x800035db <- 0xc108930e -mem-write: 0x800035df <- 0xcfe06f10 -mem-write: 0x800035e3 <- 0xa0b939c -mem-write: 0x800035e7 <- 0xfe06f00 -mem-write: 0x800035eb <- 0x412783e2 -mem-write: 0x800035ef <- 0xb869305 -mem-write: 0x800035f3 <- 0xf12e2300 -mem-write: 0x800035f7 <- 0x4127830c -mem-write: 0x800035fb <- 0xfbc60302 -mem-write: 0x800035ff <- 0xf7c583ff -mem-write: 0x80003603 <- 0xb6106300 -mem-write: 0x80003607 <- 0x51302 -mem-write: 0x8000360b <- 0xa68fa303 -mem-write: 0x8000360f <- 0xc12683fe -mem-write: 0x80003613 <- 0xf687930d -mem-write: 0x80003617 <- 0xf12e23ff -mem-write: 0x8000361b <- 0xf6c6030c -mem-write: 0x8000361f <- 0xc586e3ff -mem-write: 0x80003623 <- 0x160593fe -mem-write: 0x80003627 <- 0x90051300 -mem-write: 0x8000362b <- 0xf5f59303 -mem-write: 0x8000362f <- 0xa606630f -mem-write: 0x80003633 <- 0xb68fa300 -mem-write: 0x80003637 <- 0x5ff06ffe -mem-write: 0x8000363b <- 0x412783ba -mem-write: 0x8000363f <- 0xa7c58302 -mem-write: 0x80003643 <- 0xb68fa300 -mem-write: 0x80003647 <- 0x5ff06ffe -mem-write: 0x8000364b <- 0x793b9 -mem-write: 0x8000364f <- 0xf1042303 -mem-write: 0x80003653 <- 0x8007930c -mem-write: 0x80003657 <- 0x8ff06f07 -mem-write: 0x8000365b <- 0x700793fd -mem-write: 0x8000365f <- 0xbb093304 -mem-write: 0x80003663 <- 0xf1222301 -mem-write: 0x80003667 <- 0x10c9304 -mem-write: 0x8000366b <- 0xdfd06f0a -mem-write: 0x8000366f <- 0x1d8593ef -mem-write: 0x80003673 <- 0xd051300 -mem-write: 0x80003677 <- 0x11282300 -mem-write: 0x8000367b <- 0xc040ef01 -mem-write: 0x8000367f <- 0x128830b -mem-write: 0x80003683 <- 0x50b1301 -mem-write: 0x80003687 <- 0x5006300 -mem-write: 0x8000368b <- 0xa1282336 -mem-write: 0x8000368f <- 0xcff06f00 -mem-write: 0x80003693 <- 0xd9463fb -mem-write: 0x80003697 <- 0x100d9300 -mem-write: 0x8000369b <- 0xc1230300 -mem-write: 0x8000369f <- 0x12e030f -mem-write: 0x800036a3 <- 0x412e830f -mem-write: 0x800036a7 <- 0x812f030f -mem-write: 0x800036ab <- 0xa69130f -mem-write: 0x800036af <- 0x346e310 -mem-write: 0x800036b3 <- 0x10a93c0 -mem-write: 0x800036b7 <- 0xc108130b -mem-write: 0x800036bb <- 0x107930d -mem-write: 0x800036bf <- 0xc107130d -mem-write: 0x800036c3 <- 0xd86930c -mem-write: 0x800036c7 <- 0x20061300 -mem-write: 0x800036cb <- 0xa859300 -mem-write: 0x800036cf <- 0xd051300 -mem-write: 0x800036d3 <- 0x11222300 -mem-write: 0x800036d7 <- 0xc1282305 -mem-write: 0x800036db <- 0xc120230b -mem-write: 0x800036df <- 0xd12a2305 -mem-write: 0x800036e3 <- 0xd122230b -mem-write: 0x800036e7 <- 0xe12c2303 -mem-write: 0x800036eb <- 0xe120230b -mem-write: 0x800036ef <- 0x612e2303 -mem-write: 0x800036f3 <- 0x612e230a -mem-write: 0x800036f7 <- 0xd020ef00 -mem-write: 0x800036fb <- 0xc1230333 -mem-write: 0x800036ff <- 0x41242301 -mem-write: 0x80003703 <- 0x12f0303 -mem-write: 0x80003707 <- 0x412e8302 -mem-write: 0x8000370b <- 0x12e0302 -mem-write: 0x8000370f <- 0x41288304 -mem-write: 0x80003713 <- 0x50b1304 -mem-write: 0x80003717 <- 0x90a1300 -mem-write: 0x8000371b <- 0x12c2300 -mem-write: 0x8000371f <- 0x1282304 -mem-write: 0x80003723 <- 0x5ff06f00 -mem-write: 0x80003727 <- 0x600d93c4 -mem-write: 0x8000372b <- 0xdfd06f00 -mem-write: 0x8000372f <- 0x10a93d8 -mem-write: 0x80003733 <- 0xa85130b -mem-write: 0x80003737 <- 0x112a2300 -mem-write: 0x8000373b <- 0xc1282305 -mem-write: 0x8000373f <- 0xd12a230b -mem-write: 0x80003743 <- 0xe12c230b -mem-write: 0x80003747 <- 0x612e230b -mem-write: 0x8000374b <- 0x5100ef0a -mem-write: 0x8000374f <- 0xc1061365 -mem-write: 0x80003753 <- 0x5050ef0c -mem-write: 0x80003757 <- 0x586131a -mem-write: 0x8000375b <- 0x5059300 -mem-write: 0x8000375f <- 0xa851300 -mem-write: 0x80003763 <- 0x9100ef00 -mem-write: 0x80003767 <- 0x1278344 -mem-write: 0x8000376b <- 0x10c930b -mem-write: 0x8000376f <- 0x109130a -mem-write: 0x80003773 <- 0xf1282309 -mem-write: 0x80003777 <- 0x41278308 -mem-write: 0x8000377b <- 0x106130b -mem-write: 0x8000377f <- 0x9059308 -mem-write: 0x80003783 <- 0xf12a2300 -mem-write: 0x80003787 <- 0x81278308 -mem-write: 0x8000378b <- 0xc85130b -mem-write: 0x8000378f <- 0xc1202300 -mem-write: 0x80003793 <- 0xf12c2304 -mem-write: 0x80003797 <- 0xc1278308 -mem-write: 0x8000379b <- 0x120230b -mem-write: 0x8000379f <- 0x1222308 -mem-write: 0x800037a3 <- 0xf12e2308 -mem-write: 0x800037a7 <- 0xfc07b708 -mem-write: 0x800037ab <- 0xf126233f -mem-write: 0x800037af <- 0x1242308 -mem-write: 0x800037b3 <- 0xe0ef08 -mem-write: 0x800037b7 <- 0x1280347 -mem-write: 0x800037bb <- 0x412e030a -mem-write: 0x800037bf <- 0x812e830a -mem-write: 0x800037c3 <- 0xc12f030a -mem-write: 0x800037c7 <- 0xc85930a -mem-write: 0x800037cb <- 0xa851300 -mem-write: 0x800037cf <- 0x1282300 -mem-write: 0x800037d3 <- 0x128230b -mem-write: 0x800037d7 <- 0xc12a2305 -mem-write: 0x800037db <- 0xc122230b -mem-write: 0x800037df <- 0xd12c2303 -mem-write: 0x800037e3 <- 0xd120230b -mem-write: 0x800037e7 <- 0xe12e2303 -mem-write: 0x800037eb <- 0xe12e230b -mem-write: 0x800037ef <- 0x1202301 -mem-write: 0x800037f3 <- 0x122230a -mem-write: 0x800037f7 <- 0x124230a -mem-write: 0x800037fb <- 0x126230a -VXDRV: upload 1024 bytes to 0x800037ff -mem-write: 0x800037ff <- 0xe0ef0a -mem-write: 0x80003803 <- 0xc12f030d -mem-write: 0x80003807 <- 0x12e8301 -mem-write: 0x8000380b <- 0x412e0302 -mem-write: 0x8000380f <- 0x1280302 -mem-write: 0x80003813 <- 0x41288305 -mem-write: 0x80003817 <- 0x5166305 -mem-write: 0x8000381b <- 0x10079300 -mem-write: 0x8000381f <- 0xf1262300 -mem-write: 0x80003823 <- 0x157b70c -mem-write: 0x80003827 <- 0xc7879380 -mem-write: 0x8000382b <- 0xf12223a3 -mem-write: 0x8000382f <- 0x4ff06f02 -mem-write: 0x80003833 <- 0x700493f5 -mem-write: 0x80003837 <- 0xc1260306 -mem-write: 0x8000383b <- 0xf0069303 -mem-write: 0x8000383f <- 0x647830f -mem-write: 0x80003843 <- 0xd78a6300 -mem-write: 0x80003847 <- 0xc127031a -mem-write: 0x8000384b <- 0x51301 -mem-write: 0x8000384f <- 0x59300 -mem-write: 0x80003853 <- 0xe7de6300 -mem-write: 0x80003857 <- 0xf7073300 -mem-write: 0x8000385b <- 0x16478340 -mem-write: 0x8000385f <- 0x7846300 -mem-write: 0x80003863 <- 0x15859304 -mem-write: 0x80003867 <- 0x16061300 -mem-write: 0x8000386b <- 0xd794e300 -mem-write: 0x8000386f <- 0xc12e23fe -mem-write: 0x80003873 <- 0xe12e2302 -mem-write: 0x80003877 <- 0xb1222300 -mem-write: 0x8000387b <- 0xa1242302 -mem-write: 0x8000387f <- 0x81270302 -mem-write: 0x80003883 <- 0x41278302 -mem-write: 0x80003887 <- 0xe787b302 -mem-write: 0x8000388b <- 0x81270300 -mem-write: 0x8000388f <- 0xe787b304 -mem-write: 0x80003893 <- 0x978cb302 -mem-write: 0x80003897 <- 0xfcca9301 -mem-write: 0x8000389b <- 0xfada93ff -mem-write: 0x8000389f <- 0x5cfab341 -mem-write: 0x800038a3 <- 0xdfd06f01 -mem-write: 0x800038a7 <- 0x64783e6 -mem-write: 0x800038ab <- 0x15051300 -mem-write: 0x800038af <- 0xdff06f00 -mem-write: 0x800038b3 <- 0x12823fb -mem-write: 0x800038b7 <- 0x78a1300 -mem-write: 0x800038bb <- 0xdff06f00 -mem-write: 0x800038bf <- 0xc12783a0 -mem-write: 0x800038c3 <- 0x60049302 -mem-write: 0x800038c7 <- 0xf70cb306 -mem-write: 0x800038cb <- 0xbc8cb300 -mem-write: 0x800038cf <- 0xdff06f01 -mem-write: 0x800038d3 <- 0x610693bb -mem-write: 0x800038d7 <- 0x618630d -mem-write: 0x800038db <- 0x69300 -mem-write: 0x800038df <- 0xd10b2303 -mem-write: 0x800038e3 <- 0x7106930c -mem-write: 0x800038e7 <- 0x107130d -mem-write: 0x800038eb <- 0x787931b -mem-write: 0x800038ef <- 0xe6863303 -mem-write: 0x800038f3 <- 0xf6802340 -mem-write: 0x800038f7 <- 0xd6079300 -mem-write: 0x800038fb <- 0xf12c230d -mem-write: 0x800038ff <- 0xdfd06f02 -mem-write: 0x80003903 <- 0x10c93dc -mem-write: 0x80003907 <- 0xc85930a -mem-write: 0x8000390b <- 0xa851300 -mem-write: 0x8000390f <- 0x11282300 -mem-write: 0x80003913 <- 0xc1282305 -mem-write: 0x80003917 <- 0xc120230b -mem-write: 0x8000391b <- 0xd12a2305 -mem-write: 0x8000391f <- 0xd122230b -mem-write: 0x80003923 <- 0xe12c2303 -mem-write: 0x80003927 <- 0xe120230b -mem-write: 0x8000392b <- 0x612e2303 -mem-write: 0x8000392f <- 0x612e230a -mem-write: 0x80003933 <- 0x1202300 -mem-write: 0x80003937 <- 0x122230a -mem-write: 0x8000393b <- 0x124230a -mem-write: 0x8000393f <- 0x126230a -mem-write: 0x80003943 <- 0xd0d0ef0a -mem-write: 0x80003947 <- 0xc1230378 -mem-write: 0x8000394b <- 0x12f0301 -mem-write: 0x8000394f <- 0x412e8302 -mem-write: 0x80003953 <- 0x12e0302 -mem-write: 0x80003957 <- 0x1288304 -mem-write: 0x8000395b <- 0x502e305 -mem-write: 0x8000395f <- 0x100793aa -mem-write: 0x80003963 <- 0xb787b300 -mem-write: 0x80003967 <- 0xf1262341 -mem-write: 0x8000396b <- 0xf909330c -mem-write: 0x8000396f <- 0x9fd06f00 -mem-write: 0x80003973 <- 0x812783bf -mem-write: 0x80003977 <- 0x17f79302 -mem-write: 0x8000397b <- 0x7946300 -mem-write: 0x8000397f <- 0xdfd06f00 -mem-write: 0x80003983 <- 0x1fd06fd6 -mem-write: 0x80003987 <- 0x79a63d6 -mem-write: 0x8000398b <- 0x100a9300 -mem-write: 0x8000398f <- 0x60049300 -mem-write: 0x80003993 <- 0x100c9306 -mem-write: 0x80003997 <- 0xdff06f00 -mem-write: 0x8000399b <- 0xc127838e -mem-write: 0x8000399f <- 0x60049302 -mem-write: 0x800039a3 <- 0x178c9306 -mem-write: 0x800039a7 <- 0xbc8cb300 -mem-write: 0x800039ab <- 0xfcca9301 -mem-write: 0x800039af <- 0xfada93ff -mem-write: 0x800039b3 <- 0x5cfab341 -mem-write: 0x800039b7 <- 0xdff06f01 -mem-write: 0x800039bb <- 0x887138c -mem-write: 0x800039bf <- 0xdfe06f00 -mem-write: 0x800039c3 <- 0x412783bd -mem-write: 0x800039c7 <- 0x7ad8301 -mem-write: 0x800039cb <- 0x47879300 -mem-write: 0x800039cf <- 0xdd46300 -mem-write: 0x800039d3 <- 0xf00d9300 -mem-write: 0x800039d7 <- 0x144483ff -mem-write: 0x800039db <- 0xf12a2300 -mem-write: 0x800039df <- 0x7041300 -mem-write: 0x800039e3 <- 0x4fd06f00 -mem-write: 0x800039e7 <- 0xcc5783f5 -mem-write: 0x800039eb <- 0x7e79300 -mem-write: 0x800039ef <- 0xfc162304 -mem-write: 0x800039f3 <- 0x1fd06f00 -mem-write: 0x800039f7 <- 0x124238f -mem-write: 0x800039fb <- 0x1222302 -mem-write: 0x800039ff <- 0x1ff06f02 -mem-write: 0x80003a03 <- 0x200793e8 -mem-write: 0x80003a07 <- 0xf12c2300 -mem-write: 0x80003a0b <- 0x1fd06f02 -mem-write: 0x80003a0f <- 0x50793cc -mem-write: 0x80003a13 <- 0x81a50300 -mem-write: 0x80003a17 <- 0x606931d -mem-write: 0x80003a1b <- 0x5861300 -mem-write: 0x80003a1f <- 0x7859300 -mem-write: 0x80003a23 <- 0xcfd06f00 -mem-write: 0x80003a27 <- 0xc5d783d5 -mem-write: 0x80003a2b <- 0x45ae0300 -mem-write: 0x80003a2f <- 0xe5d30306 -mem-write: 0x80003a33 <- 0xc5a88300 -mem-write: 0x80003a37 <- 0x45a80301 -mem-write: 0x80003a3b <- 0x1011302 -mem-write: 0x80003a3f <- 0xd7f793b8 -mem-write: 0x80003a43 <- 0x713ff -mem-write: 0x80003a47 <- 0x812c2340 -mem-write: 0x80003a4b <- 0xf11a2346 -mem-write: 0x80003a4f <- 0x5841300 -mem-write: 0x80003a53 <- 0x1079300 -mem-write: 0x80003a57 <- 0x81059307 -mem-write: 0x80003a5b <- 0x912a2300 -mem-write: 0x80003a5f <- 0x21282346 -mem-write: 0x80003a63 <- 0x112e2347 -mem-write: 0x80003a67 <- 0x5091346 -mem-write: 0x80003a6b <- 0xc1262300 -mem-write: 0x80003a6f <- 0x611b2307 -mem-write: 0x80003a73 <- 0x11222300 -mem-write: 0x80003a77 <- 0x1262303 -mem-write: 0x80003a7b <- 0xf1242303 -mem-write: 0x80003a7f <- 0xf12c2300 -mem-write: 0x80003a83 <- 0xe1282300 -mem-write: 0x80003a87 <- 0xe12e2300 -mem-write: 0x80003a8b <- 0x1202300 -mem-write: 0x80003a8f <- 0xfd0ef02 -mem-write: 0x80003a93 <- 0x50493cf -mem-write: 0x80003a97 <- 0x55c6300 -mem-write: 0x80003a9b <- 0x41578302 -mem-write: 0x80003a9f <- 0x7f79301 -mem-write: 0x80003aa3 <- 0x7886304 -mem-write: 0x80003aa7 <- 0xc4578300 -mem-write: 0x80003aab <- 0x7e79300 -mem-write: 0x80003aaf <- 0xf4162304 -mem-write: 0x80003ab3 <- 0xc1208300 -mem-write: 0x80003ab7 <- 0x81240347 -mem-write: 0x80003abb <- 0x1290347 -mem-write: 0x80003abf <- 0x4851347 -mem-write: 0x80003ac3 <- 0x41248300 -mem-write: 0x80003ac7 <- 0x1011347 -mem-write: 0x80003acb <- 0x806748 -mem-write: 0x80003acf <- 0x81059300 -mem-write: 0x80003ad3 <- 0x9051300 -mem-write: 0x80003ad7 <- 0xef00 -mem-write: 0x80003adb <- 0x500e358 -mem-write: 0x80003adf <- 0xf00493fc -mem-write: 0x80003ae3 <- 0x9ff06fff -mem-write: 0x80003ae7 <- 0x81a783fb -mem-write: 0x80003aeb <- 0x101131d -mem-write: 0x80003aef <- 0x812423ff -mem-write: 0x80003af3 <- 0x91222300 -mem-write: 0x80003af7 <- 0x11262300 -mem-write: 0x80003afb <- 0x5049300 -mem-write: 0x80003aff <- 0x5841300 -mem-write: 0x80003b03 <- 0x7866300 -mem-write: 0x80003b07 <- 0x87a70300 -mem-write: 0x80003b0b <- 0x7006303 -mem-write: 0x80003b0f <- 0xc417030e -mem-write: 0x80003b13 <- 0x7179300 -mem-write: 0x80003b17 <- 0x87769301 -mem-write: 0x80003b1b <- 0x7d79300 -mem-write: 0x80003b1f <- 0x6806301 -mem-write: 0x80003b23 <- 0x4268304 -mem-write: 0x80003b27 <- 0x6806301 -mem-write: 0x80003b2b <- 0x17f61306 -mem-write: 0x80003b2f <- 0x6046300 -mem-write: 0x80003b33 <- 0x44260308 -mem-write: 0x80003b37 <- 0x4242301 -mem-write: 0x80003b3b <- 0x51300 -mem-write: 0x80003b3f <- 0xc0063300 -mem-write: 0x80003b43 <- 0xc42c2340 -mem-write: 0x80003b47 <- 0x6866300 -mem-write: 0x80003b4b <- 0xc1208308 -mem-write: 0x80003b4f <- 0x81240300 -mem-write: 0x80003b53 <- 0x41248300 -mem-write: 0x80003b57 <- 0x1011300 -mem-write: 0x80003b5b <- 0x806701 -mem-write: 0x80003b5f <- 0x7f69300 -mem-write: 0x80003b63 <- 0x6846301 -mem-write: 0x80003b67 <- 0x47f7930c -mem-write: 0x80003b6b <- 0x7966300 -mem-write: 0x80003b6f <- 0x4268308 -mem-write: 0x80003b73 <- 0x87671301 -mem-write: 0x80003b77 <- 0x7179300 -mem-write: 0x80003b7b <- 0xe4162301 -mem-write: 0x80003b7f <- 0x7d79300 -mem-write: 0x80003b83 <- 0x694e301 -mem-write: 0x80003b87 <- 0x7f613fa -mem-write: 0x80003b8b <- 0x59328 -mem-write: 0x80003b8f <- 0xb60ee320 -mem-write: 0x80003b93 <- 0x40593f8 -mem-write: 0x80003b97 <- 0x4851300 -mem-write: 0x80003b9b <- 0xd030ef00 -mem-write: 0x80003b9f <- 0xc4170327 -mem-write: 0x80003ba3 <- 0x4268300 -mem-write: 0x80003ba7 <- 0x7179301 -mem-write: 0x80003bab <- 0x7d79301 -mem-write: 0x80003baf <- 0x17f61301 -mem-write: 0x80003bb3 <- 0x610e300 -mem-write: 0x80003bb7 <- 0x27f613f8 -mem-write: 0x80003bbb <- 0x59300 -mem-write: 0x80003bbf <- 0x6146300 -mem-write: 0x80003bc3 <- 0x44258300 -mem-write: 0x80003bc7 <- 0xb4242301 -mem-write: 0x80003bcb <- 0x51300 -mem-write: 0x80003bcf <- 0x69ee300 -mem-write: 0x80003bd3 <- 0x7f793f6 -mem-write: 0x80003bd7 <- 0x78ae308 -mem-write: 0x80003bdb <- 0x76713f6 -mem-write: 0x80003bdf <- 0xe4162304 -mem-write: 0x80003be3 <- 0xf0051300 -mem-write: 0x80003be7 <- 0x5ff06fff -mem-write: 0x80003beb <- 0x78513f6 -mem-write: 0x80003bef <- 0x5000ef00 -mem-write: 0x80003bf3 <- 0xdff06f00 -mem-write: 0x80003bf7 <- 0x42583f1 -mem-write: 0x80003bfb <- 0x58e6303 -VXDRV: upload 1023 bytes to 0x80003bff -mem-write: 0x80003bff <- 0x4079300 -mem-write: 0x80003c03 <- 0xf5886304 -mem-write: 0x80003c07 <- 0x4851300 -mem-write: 0x80003c0b <- 0x9000ef00 -mem-write: 0x80003c0f <- 0xc4170315 -mem-write: 0x80003c13 <- 0x4282300 -mem-write: 0x80003c17 <- 0x4268302 -mem-write: 0x80003c1b <- 0xb7771301 -mem-write: 0x80003c1f <- 0x42223fd -mem-write: 0x80003c23 <- 0xd4202300 -mem-write: 0x80003c27 <- 0xdff06f00 -mem-write: 0x80003c2b <- 0x900793f4 -mem-write: 0x80003c2f <- 0xf4a02300 -mem-write: 0x80003c33 <- 0x7671300 -mem-write: 0x80003c37 <- 0xe4162304 -mem-write: 0x80003c3b <- 0xf0051300 -mem-write: 0x80003c3f <- 0xdff06fff -mem-write: 0x80003c43 <- 0x1a703f0 -mem-write: 0x80003c47 <- 0x8727831c -mem-write: 0x80003c4b <- 0x78c6314 -mem-write: 0x80003c4f <- 0x47a70304 -mem-write: 0x80003c53 <- 0xf0081300 -mem-write: 0x80003c57 <- 0xe84e6301 -mem-write: 0x80003c5b <- 0x27181306 -mem-write: 0x80003c5f <- 0x5066300 -mem-write: 0x80003c63 <- 0x7833302 -mem-write: 0x80003c67 <- 0xc3242301 -mem-write: 0x80003c6b <- 0x87a88308 -mem-write: 0x80003c6f <- 0x10061318 -mem-write: 0x80003c73 <- 0xe6163300 -mem-write: 0x80003c77 <- 0xc8e8b300 -mem-write: 0x80003c7b <- 0x17a42300 -mem-write: 0x80003c7f <- 0xd3242319 -mem-write: 0x80003c83 <- 0x20069310 -mem-write: 0x80003c87 <- 0xd5046300 -mem-write: 0x80003c8b <- 0x17071302 -mem-write: 0x80003c8f <- 0xe7a22300 -mem-write: 0x80003c93 <- 0x787b300 -mem-write: 0x80003c97 <- 0xb7a42301 -mem-write: 0x80003c9b <- 0x51300 -mem-write: 0x80003c9f <- 0x806700 -mem-write: 0x80003ca3 <- 0xc7079300 -mem-write: 0x80003ca7 <- 0xf7242314 -mem-write: 0x80003cab <- 0x5ff06f14 -mem-write: 0x80003caf <- 0xc7a683fa -mem-write: 0x80003cb3 <- 0x17071318 -mem-write: 0x80003cb7 <- 0xe7a22300 -mem-write: 0x80003cbb <- 0xc6e63300 -mem-write: 0x80003cbf <- 0xc7a62300 -mem-write: 0x80003cc3 <- 0x787b318 -mem-write: 0x80003cc7 <- 0xb7a42301 -mem-write: 0x80003ccb <- 0x51300 -mem-write: 0x80003ccf <- 0x806700 -mem-write: 0x80003cd3 <- 0xf0051300 -mem-write: 0x80003cd7 <- 0x8067ff -mem-write: 0x80003cdb <- 0x1011300 -mem-write: 0x80003cdf <- 0x412c23fd -mem-write: 0x80003ce3 <- 0x1aa0301 -mem-write: 0x80003ce7 <- 0x2120231c -mem-write: 0x80003ceb <- 0x11262303 -mem-write: 0x80003cef <- 0x8a290302 -mem-write: 0x80003cf3 <- 0x81242314 -mem-write: 0x80003cf7 <- 0x91222302 -mem-write: 0x80003cfb <- 0x312e2302 -mem-write: 0x80003cff <- 0x512a2301 -mem-write: 0x80003d03 <- 0x61282301 -mem-write: 0x80003d07 <- 0x71262301 -mem-write: 0x80003d0b <- 0x81242301 -mem-write: 0x80003d0f <- 0x9006301 -mem-write: 0x80003d13 <- 0x50b1304 -mem-write: 0x80003d17 <- 0x58b9300 -mem-write: 0x80003d1b <- 0x100a9300 -mem-write: 0x80003d1f <- 0xf0099300 -mem-write: 0x80003d23 <- 0x492483ff -mem-write: 0x80003d27 <- 0xf4841300 -mem-write: 0x80003d2b <- 0x44263ff -mem-write: 0x80003d2f <- 0x24949302 -mem-write: 0x80003d33 <- 0x9904b300 -mem-write: 0x80003d37 <- 0xb846300 -mem-write: 0x80003d3b <- 0x44a78304 -mem-write: 0x80003d3f <- 0x77806310 -mem-write: 0x80003d43 <- 0xf4041305 -mem-write: 0x80003d47 <- 0xc48493ff -mem-write: 0x80003d4b <- 0x3416e3ff -mem-write: 0x80003d4f <- 0xc12083ff -mem-write: 0x80003d53 <- 0x81240302 -mem-write: 0x80003d57 <- 0x41248302 -mem-write: 0x80003d5b <- 0x1290302 -mem-write: 0x80003d5f <- 0xc1298302 -mem-write: 0x80003d63 <- 0x812a0301 -mem-write: 0x80003d67 <- 0x412a8301 -mem-write: 0x80003d6b <- 0x12b0301 -mem-write: 0x80003d6f <- 0xc12b8301 -mem-write: 0x80003d73 <- 0x812c0300 -mem-write: 0x80003d77 <- 0x1011300 -mem-write: 0x80003d7b <- 0x806703 -mem-write: 0x80003d7f <- 0x49278300 -mem-write: 0x80003d83 <- 0x44a68300 -mem-write: 0x80003d87 <- 0xf7879300 -mem-write: 0x80003d8b <- 0x878e63ff -mem-write: 0x80003d8f <- 0x4a22304 -mem-write: 0x80003d93 <- 0x688e300 -mem-write: 0x80003d97 <- 0x892783fa -mem-write: 0x80003d9b <- 0x8a973318 -mem-write: 0x80003d9f <- 0x492c0300 -mem-write: 0x80003da3 <- 0xf777b300 -mem-write: 0x80003da7 <- 0x7926300 -mem-write: 0x80003dab <- 0x680e702 -mem-write: 0x80003daf <- 0x49270300 -mem-write: 0x80003db3 <- 0x8a278300 -mem-write: 0x80003db7 <- 0x87146314 -mem-write: 0x80003dbb <- 0xf904e301 -mem-write: 0x80003dbf <- 0x788e3f8 -mem-write: 0x80003dc3 <- 0x78913f8 -mem-write: 0x80003dc7 <- 0xdff06f00 -mem-write: 0x80003dcb <- 0xc92783f5 -mem-write: 0x80003dcf <- 0x44a58318 -mem-write: 0x80003dd3 <- 0xf7773308 -mem-write: 0x80003dd7 <- 0x71c6300 -mem-write: 0x80003ddb <- 0xb051300 -mem-write: 0x80003ddf <- 0x680e700 -mem-write: 0x80003de3 <- 0xdff06f00 -mem-write: 0x80003de7 <- 0x892223fc -mem-write: 0x80003deb <- 0x9ff06f00 -mem-write: 0x80003def <- 0x58513fa -mem-write: 0x80003df3 <- 0x680e700 -mem-write: 0x80003df7 <- 0x9ff06f00 -mem-write: 0x80003dfb <- 0xc59783fb -mem-write: 0x80003dff <- 0x1011300 -mem-write: 0x80003e03 <- 0x812c23fe -mem-write: 0x80003e07 <- 0x31262300 -mem-write: 0x80003e0b <- 0x112e2301 -mem-write: 0x80003e0f <- 0x912a2300 -mem-write: 0x80003e13 <- 0x21282300 -mem-write: 0x80003e17 <- 0x87f69301 -mem-write: 0x80003e1b <- 0x5841300 -mem-write: 0x80003e1f <- 0x5099300 -mem-write: 0x80003e23 <- 0x69a6300 -mem-write: 0x80003e27 <- 0x173710 -mem-write: 0x80003e2b <- 0x7071300 -mem-write: 0x80003e2f <- 0x45a68380 -mem-write: 0x80003e33 <- 0xe7e7b300 -mem-write: 0x80003e37 <- 0xf5962300 -mem-write: 0x80003e3b <- 0xd0546300 -mem-write: 0x80003e3f <- 0x84270318 -mem-write: 0x80003e43 <- 0x70a6302 -mem-write: 0x80003e47 <- 0x9a4830c -mem-write: 0x80003e4b <- 0x7969300 -mem-write: 0x80003e4f <- 0x9a02301 -mem-write: 0x80003e53 <- 0x37961300 -mem-write: 0x80003e57 <- 0xc4258301 -mem-write: 0x80003e5b <- 0x6d69301 -mem-write: 0x80003e5f <- 0x6486301 -mem-write: 0x80003e63 <- 0x10069316 -mem-write: 0x80003e67 <- 0x61300 -mem-write: 0x80003e6b <- 0x9851300 -mem-write: 0x80003e6f <- 0x700e700 -mem-write: 0x80003e73 <- 0xf0079300 -mem-write: 0x80003e77 <- 0xf50c63ff -mem-write: 0x80003e7b <- 0xc4568318 -mem-write: 0x80003e7f <- 0x84270300 -mem-write: 0x80003e83 <- 0xc4258302 -mem-write: 0x80003e87 <- 0x46f69301 -mem-write: 0x80003e8b <- 0x68e6300 -mem-write: 0x80003e8f <- 0x44268300 -mem-write: 0x80003e93 <- 0x4278300 -mem-write: 0x80003e97 <- 0xd5053303 -mem-write: 0x80003e9b <- 0x7866340 -mem-write: 0x80003e9f <- 0xc4278300 -mem-write: 0x80003ea3 <- 0xf5053303 -mem-write: 0x80003ea7 <- 0x5061340 -mem-write: 0x80003eab <- 0x69300 -mem-write: 0x80003eaf <- 0x9851300 -mem-write: 0x80003eb3 <- 0x700e700 -mem-write: 0x80003eb7 <- 0xf0079300 -mem-write: 0x80003ebb <- 0xf51e63ff -mem-write: 0x80003ebf <- 0x9a70310 -mem-write: 0x80003ec3 <- 0xc4178300 -mem-write: 0x80003ec7 <- 0x7086300 -mem-write: 0x80003ecb <- 0xd0069316 -mem-write: 0x80003ecf <- 0xd7066301 -mem-write: 0x80003ed3 <- 0x60069300 -mem-write: 0x80003ed7 <- 0xd7146301 -mem-write: 0x80003edb <- 0x426830c -mem-write: 0x80003edf <- 0xfff73701 -mem-write: 0x80003ee3 <- 0xf70713ff -mem-write: 0x80003ee7 <- 0xe7f7b37f -mem-write: 0x80003eeb <- 0xf4162300 -mem-write: 0x80003eef <- 0x4222300 -mem-write: 0x80003ef3 <- 0xd4202300 -mem-write: 0x80003ef7 <- 0x4258300 -mem-write: 0x80003efb <- 0x99a02303 -mem-write: 0x80003eff <- 0x58c6300 -mem-write: 0x80003f03 <- 0x4079300 -mem-write: 0x80003f07 <- 0xf5866304 -mem-write: 0x80003f0b <- 0x9851300 -mem-write: 0x80003f0f <- 0x4000ef00 -mem-write: 0x80003f13 <- 0x4282365 -mem-write: 0x80003f17 <- 0x51302 -mem-write: 0x80003f1b <- 0xc1208300 -mem-write: 0x80003f1f <- 0x81240301 -mem-write: 0x80003f23 <- 0x41248301 -mem-write: 0x80003f27 <- 0x1290301 -mem-write: 0x80003f2b <- 0xc1298301 -mem-write: 0x80003f2f <- 0x1011300 -mem-write: 0x80003f33 <- 0x806702 -mem-write: 0x80003f37 <- 0x5a90300 -mem-write: 0x80003f3b <- 0x90ee301 -mem-write: 0x80003f3f <- 0x5a483fc -mem-write: 0x80003f43 <- 0x7971300 -mem-write: 0x80003f47 <- 0x7571301 -mem-write: 0x80003f4b <- 0x37771301 -mem-write: 0x80003f4f <- 0x25a02300 -mem-write: 0x80003f53 <- 0x2484b301 -mem-write: 0x80003f57 <- 0x79341 -mem-write: 0x80003f5b <- 0x7146300 -mem-write: 0x80003f5f <- 0x45a78300 -mem-write: 0x80003f63 <- 0xf4242301 -mem-write: 0x80003f67 <- 0x90486300 -mem-write: 0x80003f6b <- 0xdff06f00 -mem-write: 0x80003f6f <- 0xa90933fa -mem-write: 0x80003f73 <- 0x9052e300 -mem-write: 0x80003f77 <- 0x442783fa -mem-write: 0x80003f7b <- 0xc4258302 -mem-write: 0x80003f7f <- 0x4869301 -mem-write: 0x80003f83 <- 0x9061300 -mem-write: 0x80003f87 <- 0x9851300 -mem-write: 0x80003f8b <- 0x780e700 -mem-write: 0x80003f8f <- 0xa484b300 -mem-write: 0x80003f93 <- 0xa04ee340 -mem-write: 0x80003f97 <- 0xc45783fc -mem-write: 0x80003f9b <- 0xf0051300 -mem-write: 0x80003f9f <- 0x7e793ff -mem-write: 0x80003fa3 <- 0xc1208304 -mem-write: 0x80003fa7 <- 0xf4162301 -mem-write: 0x80003fab <- 0x81240300 -mem-write: 0x80003faf <- 0x41248301 -mem-write: 0x80003fb3 <- 0x1290301 -mem-write: 0x80003fb7 <- 0xc1298301 -mem-write: 0x80003fbb <- 0x1011300 -mem-write: 0x80003fbf <- 0x806702 -mem-write: 0x80003fc3 <- 0xc5a70300 -mem-write: 0x80003fc7 <- 0xe04ce303 -mem-write: 0x80003fcb <- 0xdff06fe6 -mem-write: 0x80003fcf <- 0x42503f4 -mem-write: 0x80003fd3 <- 0x5ff06f05 -mem-write: 0x80003fd7 <- 0xc45783eb -mem-write: 0x80003fdb <- 0xfff73700 -mem-write: 0x80003fdf <- 0xf70713ff -mem-write: 0x80003fe3 <- 0xe7f7b37f -mem-write: 0x80003fe7 <- 0x4268300 -mem-write: 0x80003feb <- 0x7979301 -mem-write: 0x80003fef <- 0x7d79301 -mem-write: 0x80003ff3 <- 0xf4162341 -mem-write: 0x80003ff7 <- 0x4222300 -mem-write: 0x80003ffb <- 0x5202300 -VXDRV: upload 1024 bytes to 0x80003ffe -mem-write: 0x80003ffe <- 0x971300d4 -mem-write: 0x80004002 <- 0x5ae30137 -mem-write: 0x80004006 <- 0x2823ee07 -mem-write: 0x8000400a <- 0xf06f04a4 -mem-write: 0x8000400e <- 0xa783eedf -mem-write: 0x80004012 <- 0x84e30009 -mem-write: 0x80004016 <- 0x713e607 -mem-write: 0x8000401a <- 0x886301d0 -mem-write: 0x8000401e <- 0x71302e7 -mem-write: 0x80004022 <- 0x84630160 -mem-write: 0x80004026 <- 0x578302e7 -mem-write: 0x8000402a <- 0xe79300c4 -mem-write: 0x8000402e <- 0x16230407 -mem-write: 0x80004032 <- 0xf06f00f4 -mem-write: 0x80004036 <- 0xf737ee9f -mem-write: 0x8000403a <- 0x713ffff -mem-write: 0x8000403e <- 0x26837ff7 -mem-write: 0x80004042 <- 0xf7b30104 -mem-write: 0x80004046 <- 0xf06f00e7 -mem-write: 0x8000404a <- 0xa023fadf -mem-write: 0x8000404e <- 0x5130099 -mem-write: 0x80004052 <- 0xf06f0000 -mem-write: 0x80004056 <- 0x113ec9f -mem-write: 0x8000405a <- 0x2c23fe01 -mem-write: 0x8000405e <- 0x2e230081 -mem-write: 0x80004062 <- 0x4130011 -mem-write: 0x80004066 <- 0x6630005 -mem-write: 0x8000406a <- 0x27830005 -mem-write: 0x8000406e <- 0x80630385 -mem-write: 0x80004072 <- 0x97830207 -mem-write: 0x80004076 <- 0x966300c5 -mem-write: 0x8000407a <- 0x20830207 -mem-write: 0x8000407e <- 0x240301c1 -mem-write: 0x80004082 <- 0x5130181 -mem-write: 0x80004086 <- 0x1130000 -mem-write: 0x8000408a <- 0x80670201 -mem-write: 0x8000408e <- 0x26230000 -mem-write: 0x80004092 <- 0xef00b1 -mem-write: 0x80004096 <- 0x25833600 -mem-write: 0x8000409a <- 0x978300c1 -mem-write: 0x8000409e <- 0x8ee300c5 -mem-write: 0x800040a2 <- 0x513fc07 -mem-write: 0x800040a6 <- 0x24030004 -mem-write: 0x800040aa <- 0x20830181 -mem-write: 0x800040ae <- 0x11301c1 -mem-write: 0x800040b2 <- 0xf06f0201 -mem-write: 0x800040b6 <- 0x593d49f -mem-write: 0x800040ba <- 0x6630005 -mem-write: 0x800040be <- 0xa5030005 -mem-write: 0x800040c2 <- 0xf06f1d81 -mem-write: 0x800040c6 <- 0xa503f95f -mem-write: 0x800040ca <- 0x45b71c01 -mem-write: 0x800040ce <- 0x85938000 -mem-write: 0x800040d2 <- 0x6f0585 -mem-write: 0x800040d6 <- 0x5130350 -mem-write: 0x800040da <- 0x80670000 -mem-write: 0x800040de <- 0xd5b70000 -mem-write: 0x800040e2 <- 0x85938000 -mem-write: 0x800040e6 <- 0x6f6345 -mem-write: 0x800040ea <- 0x1130210 -mem-write: 0x800040ee <- 0x47b7fe01 -mem-write: 0x800040f2 <- 0x2e238000 -mem-write: 0x800040f6 <- 0x2c230011 -mem-write: 0x800040fa <- 0x2a230081 -mem-write: 0x800040fe <- 0x28230091 -mem-write: 0x80004102 <- 0x26230121 -mem-write: 0x80004106 <- 0x24230131 -mem-write: 0x8000410a <- 0x22230141 -mem-write: 0x8000410e <- 0x20230151 -mem-write: 0x80004112 <- 0x24030161 -mem-write: 0x80004116 <- 0x87930045 -mem-write: 0x8000411a <- 0x2e230e07 -mem-write: 0x8000411e <- 0x71302f5 -mem-write: 0x80004122 <- 0x7932ec5 -mem-write: 0x80004126 <- 0x24230030 -mem-write: 0x8000412a <- 0x22232ee5 -mem-write: 0x8000412e <- 0x20232ef5 -mem-write: 0x80004132 <- 0x7932e05 -mem-write: 0x80004136 <- 0x9130040 -mem-write: 0x8000413a <- 0x26230005 -mem-write: 0x8000413e <- 0x61300f4 -mem-write: 0x80004142 <- 0x5930080 -mem-write: 0x80004146 <- 0x22230000 -mem-write: 0x8000414a <- 0x20230604 -mem-write: 0x8000414e <- 0x22230004 -mem-write: 0x80004152 <- 0x24230004 -mem-write: 0x80004156 <- 0x28230004 -mem-write: 0x8000415a <- 0x2a230004 -mem-write: 0x8000415e <- 0x2c230004 -mem-write: 0x80004162 <- 0x5130004 -mem-write: 0x80004166 <- 0xc0ef05c4 -mem-write: 0x8000416a <- 0x9b37cb1f -mem-write: 0x8000416e <- 0x24838000 -mem-write: 0x80004172 <- 0x9ab70089 -mem-write: 0x80004176 <- 0x9a378000 -mem-write: 0x8000417a <- 0x99b78000 -mem-write: 0x8000417e <- 0xb138000 -mem-write: 0x80004182 <- 0x8a932e0b -mem-write: 0x80004186 <- 0xa13344a -mem-write: 0x8000418a <- 0x89933cca -mem-write: 0x8000418e <- 0x7b74349 -mem-write: 0x80004192 <- 0x20230001 -mem-write: 0x80004196 <- 0x22230364 -mem-write: 0x8000419a <- 0x24230354 -mem-write: 0x8000419e <- 0x26230344 -mem-write: 0x800041a2 <- 0x2e230334 -mem-write: 0x800041a6 <- 0x87930084 -mem-write: 0x800041aa <- 0xa6230097 -mem-write: 0x800041ae <- 0x61300f4 -mem-write: 0x800041b2 <- 0x5930080 -mem-write: 0x800041b6 <- 0xa2230000 -mem-write: 0x800041ba <- 0xa0230604 -mem-write: 0x800041be <- 0xa2230004 -mem-write: 0x800041c2 <- 0xa4230004 -mem-write: 0x800041c6 <- 0xa8230004 -mem-write: 0x800041ca <- 0xaa230004 -mem-write: 0x800041ce <- 0xac230004 -mem-write: 0x800041d2 <- 0x85130004 -mem-write: 0x800041d6 <- 0xc0ef05c4 -mem-write: 0x800041da <- 0x2403c41f -mem-write: 0x800041de <- 0x7b700c9 -mem-write: 0x800041e2 <- 0xa0230002 -mem-write: 0x800041e6 <- 0xa2230364 -mem-write: 0x800041ea <- 0xa4230354 -mem-write: 0x800041ee <- 0xa6230344 -mem-write: 0x800041f2 <- 0xae230334 -mem-write: 0x800041f6 <- 0x87930094 -mem-write: 0x800041fa <- 0x26230127 -mem-write: 0x800041fe <- 0x222300f4 -mem-write: 0x80004202 <- 0x20230604 -mem-write: 0x80004206 <- 0x22230004 -mem-write: 0x8000420a <- 0x24230004 -mem-write: 0x8000420e <- 0x28230004 -mem-write: 0x80004212 <- 0x2a230004 -mem-write: 0x80004216 <- 0x2c230004 -mem-write: 0x8000421a <- 0x5130004 -mem-write: 0x8000421e <- 0x61305c4 -mem-write: 0x80004222 <- 0x5930080 -mem-write: 0x80004226 <- 0xc0ef0000 -mem-write: 0x8000422a <- 0x2083bf1f -mem-write: 0x8000422e <- 0x202301c1 -mem-write: 0x80004232 <- 0x22230364 -mem-write: 0x80004236 <- 0x24230354 -mem-write: 0x8000423a <- 0x26230344 -mem-write: 0x8000423e <- 0x2e230334 -mem-write: 0x80004242 <- 0x24030084 -mem-write: 0x80004246 <- 0x7930181 -mem-write: 0x8000424a <- 0x2c230010 -mem-write: 0x8000424e <- 0x248302f9 -mem-write: 0x80004252 <- 0x29030141 -mem-write: 0x80004256 <- 0x29830101 -mem-write: 0x8000425a <- 0x2a0300c1 -mem-write: 0x8000425e <- 0x2a830081 -mem-write: 0x80004262 <- 0x2b030041 -mem-write: 0x80004266 <- 0x1130001 -mem-write: 0x8000426a <- 0x80670201 -mem-write: 0x8000426e <- 0x5130000 -mem-write: 0x80004272 <- 0x80670000 -mem-write: 0x80004276 <- 0x1130000 -mem-write: 0x8000427a <- 0x2223ff01 -mem-write: 0x8000427e <- 0x6130091 -mem-write: 0x80004282 <- 0x84930680 -mem-write: 0x80004286 <- 0x84b3fff5 -mem-write: 0x8000428a <- 0x202302c4 -mem-write: 0x8000428e <- 0x89130121 -mem-write: 0x80004292 <- 0x24230005 -mem-write: 0x80004296 <- 0x26230081 -mem-write: 0x8000429a <- 0x85930011 -mem-write: 0x8000429e <- 0x30ef0744 -mem-write: 0x800042a2 <- 0x4134980 -mem-write: 0x800042a6 <- 0x630005 -mem-write: 0x800042aa <- 0x5130205 -mem-write: 0x800042ae <- 0x202300c5 -mem-write: 0x800042b2 <- 0x22230004 -mem-write: 0x800042b6 <- 0x24230124 -mem-write: 0x800042ba <- 0x861300a4 -mem-write: 0x800042be <- 0x5930684 -mem-write: 0x800042c2 <- 0xc0ef0000 -mem-write: 0x800042c6 <- 0x2083b55f -mem-write: 0x800042ca <- 0x51300c1 -mem-write: 0x800042ce <- 0x24030004 -mem-write: 0x800042d2 <- 0x24830081 -mem-write: 0x800042d6 <- 0x29030041 -mem-write: 0x800042da <- 0x1130001 -mem-write: 0x800042de <- 0x80670101 -mem-write: 0x800042e2 <- 0x1130000 -mem-write: 0x800042e6 <- 0x2823fe01 -mem-write: 0x800042ea <- 0xa9030121 -mem-write: 0x800042ee <- 0x26231c01 -mem-write: 0x800042f2 <- 0x2e230131 -mem-write: 0x800042f6 <- 0x27830011 -mem-write: 0x800042fa <- 0x2c230389 -mem-write: 0x800042fe <- 0x2a230081 -mem-write: 0x80004302 <- 0x9930091 -mem-write: 0x80004306 <- 0x86630005 -mem-write: 0x8000430a <- 0x9130a07 -mem-write: 0x8000430e <- 0x4932e09 -mem-write: 0x80004312 <- 0x2783fff0 -mem-write: 0x80004316 <- 0x24030049 -mem-write: 0x8000431a <- 0x87930089 -mem-write: 0x8000431e <- 0xd863fff7 -mem-write: 0x80004322 <- 0x6f0007 -mem-write: 0x80004326 <- 0x4130800 -mem-write: 0x8000432a <- 0x8c630684 -mem-write: 0x8000432e <- 0x17030697 -mem-write: 0x80004332 <- 0x879300c4 -mem-write: 0x80004336 <- 0x18e3fff7 -mem-write: 0x8000433a <- 0x7b7fe07 -mem-write: 0x8000433e <- 0x8793ffff -mem-write: 0x80004342 <- 0x22230017 -mem-write: 0x80004346 <- 0x20230604 -mem-write: 0x8000434a <- 0x22230004 -mem-write: 0x8000434e <- 0x24230004 -mem-write: 0x80004352 <- 0x26230004 -mem-write: 0x80004356 <- 0x282300f4 -mem-write: 0x8000435a <- 0x2a230004 -mem-write: 0x8000435e <- 0x2c230004 -mem-write: 0x80004362 <- 0x6130004 -mem-write: 0x80004366 <- 0x5930080 -mem-write: 0x8000436a <- 0x5130000 -mem-write: 0x8000436e <- 0xc0ef05c4 -mem-write: 0x80004372 <- 0x2823aa9f -mem-write: 0x80004376 <- 0x2a230204 -mem-write: 0x8000437a <- 0x22230204 -mem-write: 0x8000437e <- 0x24230404 -mem-write: 0x80004382 <- 0x20830404 -mem-write: 0x80004386 <- 0x51301c1 -mem-write: 0x8000438a <- 0x24030004 -mem-write: 0x8000438e <- 0x24830181 -mem-write: 0x80004392 <- 0x29030141 -mem-write: 0x80004396 <- 0x29830101 -mem-write: 0x8000439a <- 0x11300c1 -mem-write: 0x8000439e <- 0x80670201 -mem-write: 0x800043a2 <- 0x24030000 -mem-write: 0x800043a6 <- 0xc630009 -mem-write: 0x800043aa <- 0x9130004 -mem-write: 0x800043ae <- 0xf06f0004 -mem-write: 0x800043b2 <- 0x513f65f -mem-write: 0x800043b6 <- 0xf0ef0009 -mem-write: 0x800043ba <- 0xf06fd35f -mem-write: 0x800043be <- 0x593f51f -mem-write: 0x800043c2 <- 0x85130040 -mem-write: 0x800043c6 <- 0xf0ef0009 -mem-write: 0x800043ca <- 0x2023eb1f -mem-write: 0x800043ce <- 0x41300a9 -mem-write: 0x800043d2 <- 0x1ce30005 -mem-write: 0x800043d6 <- 0x793fc05 -mem-write: 0x800043da <- 0xa02300c0 -mem-write: 0x800043de <- 0xf06f00f9 -mem-write: 0x800043e2 <- 0xa503fa5f -mem-write: 0x800043e6 <- 0xd5b71c01 -mem-write: 0x800043ea <- 0x85938000 -mem-write: 0x800043ee <- 0x6f6345 -mem-write: 0x800043f2 <- 0x27835180 -mem-write: 0x800043f6 <- 0x84630385 -mem-write: 0x800043fa <- 0x80670007 -VXDRV: upload 1024 bytes to 0x800043fe -mem-write: 0x800043fe <- 0xf06f0000 -mem-write: 0x80004402 <- 0x8067cedf -mem-write: 0x80004406 <- 0x80670000 -mem-write: 0x8000440a <- 0x80670000 -mem-write: 0x8000440e <- 0x80670000 -mem-write: 0x80004412 <- 0xa5030000 -mem-write: 0x80004416 <- 0x45b71d81 -mem-write: 0x8000441a <- 0x85938000 -mem-write: 0x8000441e <- 0x6f0d85 -mem-write: 0x80004422 <- 0xa5034440 -mem-write: 0x80004426 <- 0x45b71d81 -mem-write: 0x8000442a <- 0x85938000 -mem-write: 0x8000442e <- 0x6f2705 -mem-write: 0x80004432 <- 0x1134340 -mem-write: 0x80004436 <- 0x2623fe01 -mem-write: 0x8000443a <- 0x2c230131 -mem-write: 0x8000443e <- 0x2a230081 -mem-write: 0x80004442 <- 0x28230091 -mem-write: 0x80004446 <- 0x24230121 -mem-write: 0x8000444a <- 0x2e230141 -mem-write: 0x8000444e <- 0x8a130011 -mem-write: 0x80004452 <- 0x9130005 -mem-write: 0x80004456 <- 0x89930005 -mem-write: 0x8000445a <- 0x30efc301 -mem-write: 0x8000445e <- 0xa7033490 -mem-write: 0x80004462 <- 0x17b70089 -mem-write: 0x80004466 <- 0x84130000 -mem-write: 0x8000446a <- 0x2483fef7 -mem-write: 0x8000446e <- 0x4330047 -mem-write: 0x80004472 <- 0xf4934144 -mem-write: 0x80004476 <- 0x433ffc4 -mem-write: 0x8000447a <- 0x54130094 -mem-write: 0x8000447e <- 0x41300c4 -mem-write: 0x80004482 <- 0x1413fff4 -mem-write: 0x80004486 <- 0x4e6300c4 -mem-write: 0x8000448a <- 0x59300f4 -mem-write: 0x8000448e <- 0x5130000 -mem-write: 0x80004492 <- 0x40ef0009 -mem-write: 0x80004496 <- 0xa78350d0 -mem-write: 0x8000449a <- 0x87b30089 -mem-write: 0x8000449e <- 0x8630097 -mem-write: 0x800044a2 <- 0x51302f5 -mem-write: 0x800044a6 <- 0x30ef0009 -mem-write: 0x800044aa <- 0x20833010 -mem-write: 0x800044ae <- 0x240301c1 -mem-write: 0x800044b2 <- 0x24830181 -mem-write: 0x800044b6 <- 0x29030141 -mem-write: 0x800044ba <- 0x29830101 -mem-write: 0x800044be <- 0x2a0300c1 -mem-write: 0x800044c2 <- 0x5130081 -mem-write: 0x800044c6 <- 0x1130000 -mem-write: 0x800044ca <- 0x80670201 -mem-write: 0x800044ce <- 0x5b30000 -mem-write: 0x800044d2 <- 0x5134080 -mem-write: 0x800044d6 <- 0x40ef0009 -mem-write: 0x800044da <- 0x7934c90 -mem-write: 0x800044de <- 0x863fff0 -mem-write: 0x800044e2 <- 0x879304f5 -mem-write: 0x800044e6 <- 0xa7031f81 -mem-write: 0x800044ea <- 0xa6830007 -mem-write: 0x800044ee <- 0x84b30089 -mem-write: 0x800044f2 <- 0xe4934084 -mem-write: 0x800044f6 <- 0x4330014 -mem-write: 0x800044fa <- 0x5134087 -mem-write: 0x800044fe <- 0xa2230009 -mem-write: 0x80004502 <- 0xa0230096 -mem-write: 0x80004506 <- 0x30ef0087 -mem-write: 0x8000450a <- 0x20832a10 -mem-write: 0x8000450e <- 0x240301c1 -mem-write: 0x80004512 <- 0x24830181 -mem-write: 0x80004516 <- 0x29030141 -mem-write: 0x8000451a <- 0x29830101 -mem-write: 0x8000451e <- 0x2a0300c1 -mem-write: 0x80004522 <- 0x5130081 -mem-write: 0x80004526 <- 0x1130010 -mem-write: 0x8000452a <- 0x80670201 -mem-write: 0x8000452e <- 0x5930000 -mem-write: 0x80004532 <- 0x5130000 -mem-write: 0x80004536 <- 0x40ef0009 -mem-write: 0x8000453a <- 0xa7034690 -mem-write: 0x8000453e <- 0x6930089 -mem-write: 0x80004542 <- 0x7b300f0 -mem-write: 0x80004546 <- 0xdee340e5 -mem-write: 0x8000454a <- 0xa683f4f6 -mem-write: 0x8000454e <- 0xe7931dc1 -mem-write: 0x80004552 <- 0x22230017 -mem-write: 0x80004556 <- 0x53300f7 -mem-write: 0x8000455a <- 0xac2340d5 -mem-write: 0x8000455e <- 0xf06f1ea1 -mem-write: 0x80004562 <- 0x8463f45f -mem-write: 0x80004566 <- 0x1131205 -mem-write: 0x8000456a <- 0x2423ff01 -mem-write: 0x8000456e <- 0x22230081 -mem-write: 0x80004572 <- 0x84130091 -mem-write: 0x80004576 <- 0x4930005 -mem-write: 0x8000457a <- 0x26230005 -mem-write: 0x8000457e <- 0x30ef0011 -mem-write: 0x80004582 <- 0x28032250 -mem-write: 0x80004586 <- 0x713ffc4 -mem-write: 0x8000458a <- 0x7793ff84 -mem-write: 0x8000458e <- 0x633ffe8 -mem-write: 0x80004592 <- 0x859300f7 -mem-write: 0x80004596 <- 0x2683c301 -mem-write: 0x8000459a <- 0xa5030046 -mem-write: 0x8000459e <- 0xf6930085 -mem-write: 0x800045a2 <- 0x663ffc6 -mem-write: 0x800045a6 <- 0x22231ac5 -mem-write: 0x800045aa <- 0x781300d6 -mem-write: 0x800045ae <- 0x5330018 -mem-write: 0x800045b2 <- 0x1e6300d6 -mem-write: 0x800045b6 <- 0x23030808 -mem-write: 0x800045ba <- 0x2803ff84 -mem-write: 0x800045be <- 0x7330045 -mem-write: 0x800045c2 <- 0x28834067 -mem-write: 0x800045c6 <- 0x85130087 -mem-write: 0x800045ca <- 0x87b3c381 -mem-write: 0x800045ce <- 0x78130067 -mem-write: 0x800045d2 <- 0x8e630018 -mem-write: 0x800045d6 <- 0x230312a8 -mem-write: 0x800045da <- 0xa62300c7 -mem-write: 0x800045de <- 0x24230068 -mem-write: 0x800045e2 <- 0xe630113 -mem-write: 0x800045e6 <- 0xe6931c08 -mem-write: 0x800045ea <- 0x22230017 -mem-write: 0x800045ee <- 0x202300d7 -mem-write: 0x800045f2 <- 0x69300f6 -mem-write: 0x800045f6 <- 0xe6631ff0 -mem-write: 0x800045fa <- 0xf6930af6 -mem-write: 0x800045fe <- 0x8693ff87 -mem-write: 0x80004602 <- 0xa5030086 -mem-write: 0x80004606 <- 0x86b30045 -mem-write: 0x8000460a <- 0xa60300d5 -mem-write: 0x8000460e <- 0xd8130006 -mem-write: 0x80004612 <- 0x7930057 -mem-write: 0x80004616 <- 0x97b30010 -mem-write: 0x8000461a <- 0xe7b30107 -mem-write: 0x8000461e <- 0x851300a7 -mem-write: 0x80004622 <- 0x2623ff86 -mem-write: 0x80004626 <- 0x242300a7 -mem-write: 0x8000462a <- 0xa22300c7 -mem-write: 0x8000462e <- 0xa02300f5 -mem-write: 0x80004632 <- 0x262300e6 -mem-write: 0x80004636 <- 0x240300e6 -mem-write: 0x8000463a <- 0x20830081 -mem-write: 0x8000463e <- 0x851300c1 -mem-write: 0x80004642 <- 0x24830004 -mem-write: 0x80004646 <- 0x1130041 -mem-write: 0x8000464a <- 0x306f0101 -mem-write: 0x8000464e <- 0x250315d0 -mem-write: 0x80004652 <- 0x75130045 -mem-write: 0x80004656 <- 0x1c630015 -mem-write: 0x8000465a <- 0x87b30205 -mem-write: 0x8000465e <- 0x851300d7 -mem-write: 0x80004662 <- 0x2683c381 -mem-write: 0x80004666 <- 0xe8930086 -mem-write: 0x8000466a <- 0x8330017 -mem-write: 0x8000466e <- 0x846300f7 -mem-write: 0x80004672 <- 0x260316a6 -mem-write: 0x80004676 <- 0xa62300c6 -mem-write: 0x8000467a <- 0x242300c6 -mem-write: 0x8000467e <- 0x222300d6 -mem-write: 0x80004682 <- 0x20230117 -mem-write: 0x80004686 <- 0xf06f00f8 -mem-write: 0x8000468a <- 0x8067f6df -mem-write: 0x8000468e <- 0xe6930000 -mem-write: 0x80004692 <- 0x2e230017 -mem-write: 0x80004696 <- 0x2023fed4 -mem-write: 0x8000469a <- 0x69300f6 -mem-write: 0x8000469e <- 0xfee31ff0 -mem-write: 0x800046a2 <- 0xd693f4f6 -mem-write: 0x800046a6 <- 0x6130097 -mem-write: 0x800046aa <- 0x68630040 -mem-write: 0x800046ae <- 0xd6930ed6 -mem-write: 0x800046b2 <- 0x88130067 -mem-write: 0x800046b6 <- 0x86130396 -mem-write: 0x800046ba <- 0x18130386 -mem-write: 0x800046be <- 0x88330038 -mem-write: 0x800046c2 <- 0x26830105 -mem-write: 0x800046c6 <- 0x8130008 -mem-write: 0x800046ca <- 0x463ff88 -mem-write: 0x800046ce <- 0xa60312d8 -mem-write: 0x800046d2 <- 0x76130046 -mem-write: 0x800046d6 <- 0xf663ffc6 -mem-write: 0x800046da <- 0xa68300c7 -mem-write: 0x800046de <- 0x18e30086 -mem-write: 0x800046e2 <- 0xa803fed8 -mem-write: 0x800046e6 <- 0x262300c6 -mem-write: 0x800046ea <- 0x24230107 -mem-write: 0x800046ee <- 0x240300d7 -mem-write: 0x800046f2 <- 0x20830081 -mem-write: 0x800046f6 <- 0x242300c1 -mem-write: 0x800046fa <- 0x851300e8 -mem-write: 0x800046fe <- 0x24830004 -mem-write: 0x80004702 <- 0xa6230041 -mem-write: 0x80004706 <- 0x11300e6 -mem-write: 0x8000470a <- 0x306f0101 -mem-write: 0x8000470e <- 0x126309d0 -mem-write: 0x80004712 <- 0x25831408 -mem-write: 0x80004716 <- 0x260300c6 -mem-write: 0x8000471a <- 0x87b30086 -mem-write: 0x8000471e <- 0x240300f6 -mem-write: 0x80004722 <- 0x26230081 -mem-write: 0x80004726 <- 0xa42300b6 -mem-write: 0x8000472a <- 0xe69300c5 -mem-write: 0x8000472e <- 0x20830017 -mem-write: 0x80004732 <- 0x222300c1 -mem-write: 0x80004736 <- 0x851300d7 -mem-write: 0x8000473a <- 0x7330004 -mem-write: 0x8000473e <- 0x248300f7 -mem-write: 0x80004742 <- 0x20230041 -mem-write: 0x80004746 <- 0x11300f7 -mem-write: 0x8000474a <- 0x306f0101 -mem-write: 0x8000474e <- 0x781305d0 -mem-write: 0x80004752 <- 0x87b30018 -mem-write: 0x80004756 <- 0x106300d7 -mem-write: 0x8000475a <- 0x25030208 -mem-write: 0x8000475e <- 0x733ff84 -mem-write: 0x80004762 <- 0x268340a7 -mem-write: 0x80004766 <- 0x260300c7 -mem-write: 0x8000476a <- 0x87b30087 -mem-write: 0x8000476e <- 0x262300a7 -mem-write: 0x80004772 <- 0xa42300d6 -mem-write: 0x80004776 <- 0xe61300c6 -mem-write: 0x8000477a <- 0xa6830017 -mem-write: 0x8000477e <- 0x22231e01 -mem-write: 0x80004782 <- 0xa42300c7 -mem-write: 0x80004786 <- 0xe8e300e5 -mem-write: 0x8000478a <- 0xa583ead7 -mem-write: 0x8000478e <- 0x85131f01 -mem-write: 0x80004792 <- 0xf0ef0004 -mem-write: 0x80004796 <- 0xf06fca1f -mem-write: 0x8000479a <- 0x613ea1f -mem-write: 0x8000479e <- 0x74630140 -mem-write: 0x800047a2 <- 0x61302d6 -mem-write: 0x800047a6 <- 0x64630540 -mem-write: 0x800047aa <- 0xd69306d6 -mem-write: 0x800047ae <- 0x881300c7 -mem-write: 0x800047b2 <- 0x861306f6 -mem-write: 0x800047b6 <- 0x181306e6 -mem-write: 0x800047ba <- 0xf06f0038 -mem-write: 0x800047be <- 0x87b3f05f -mem-write: 0x800047c2 <- 0xf06f00d7 -mem-write: 0x800047c6 <- 0x8813ea1f -mem-write: 0x800047ca <- 0x861305c6 -mem-write: 0x800047ce <- 0x181305b6 -mem-write: 0x800047d2 <- 0xf06f0038 -mem-write: 0x800047d6 <- 0xaa23eedf -mem-write: 0x800047da <- 0xa82300e5 -mem-write: 0x800047de <- 0x262300e5 -mem-write: 0x800047e2 <- 0x242300a7 -mem-write: 0x800047e6 <- 0x222300a7 -mem-write: 0x800047ea <- 0x20230117 -mem-write: 0x800047ee <- 0xf06f00f8 -mem-write: 0x800047f2 <- 0xa503e49f -mem-write: 0x800047f6 <- 0x56130045 -mem-write: 0x800047fa <- 0x7934026 -VXDRV: upload 1024 bytes to 0x800047fe -mem-write: 0x800047fe <- 0x96330010 -mem-write: 0x80004802 <- 0x663300c7 -mem-write: 0x80004806 <- 0xa22300a6 -mem-write: 0x8000480a <- 0xf06f00c5 -mem-write: 0x8000480e <- 0x613eddf -mem-write: 0x80004812 <- 0x6c631540 -mem-write: 0x80004816 <- 0xd69300d6 -mem-write: 0x8000481a <- 0x881300f7 -mem-write: 0x8000481e <- 0x86130786 -mem-write: 0x80004822 <- 0x18130776 -mem-write: 0x80004826 <- 0xf06f0038 -mem-write: 0x8000482a <- 0x613e99f -mem-write: 0x8000482e <- 0x6c635540 -mem-write: 0x80004832 <- 0xd69300d6 -mem-write: 0x80004836 <- 0x88130127 -mem-write: 0x8000483a <- 0x861307d6 -mem-write: 0x8000483e <- 0x181307c6 -mem-write: 0x80004842 <- 0xf06f0038 -mem-write: 0x80004846 <- 0x813e7df -mem-write: 0x8000484a <- 0x6133f80 -mem-write: 0x8000484e <- 0xf06f07e0 -mem-write: 0x80004852 <- 0xe693e71f -mem-write: 0x80004856 <- 0x22230017 -mem-write: 0x8000485a <- 0x202300d7 -mem-write: 0x8000485e <- 0xf06f00f6 -mem-write: 0x80004862 <- 0x113dd9f -mem-write: 0x80004866 <- 0x2823fe01 -mem-write: 0x8000486a <- 0x26230121 -mem-write: 0x8000486e <- 0x24230131 -mem-write: 0x80004872 <- 0x22230141 -mem-write: 0x80004876 <- 0x20230151 -mem-write: 0x8000487a <- 0x2e230161 -mem-write: 0x8000487e <- 0x2c230011 -mem-write: 0x80004882 <- 0x2a230081 -mem-write: 0x80004886 <- 0x8b130091 -mem-write: 0x8000488a <- 0xa930005 -mem-write: 0x8000488e <- 0xa132e05 -mem-write: 0x80004892 <- 0x9930000 -mem-write: 0x80004896 <- 0x9130010 -mem-write: 0x8000489a <- 0xa483fff0 -mem-write: 0x8000489e <- 0xa403004a -mem-write: 0x800048a2 <- 0x8493008a -mem-write: 0x800048a6 <- 0xc663fff4 -mem-write: 0x800048aa <- 0x57830204 -mem-write: 0x800048ae <- 0x849300c4 -mem-write: 0x800048b2 <- 0xfc63fff4 -mem-write: 0x800048b6 <- 0x178300f9 -mem-write: 0x800048ba <- 0x51300e4 -mem-write: 0x800048be <- 0x86630004 -mem-write: 0x800048c2 <- 0xe70127 -mem-write: 0x800048c6 <- 0x6a33000b -mem-write: 0x800048ca <- 0x41300aa -mem-write: 0x800048ce <- 0x9ee30684 -mem-write: 0x800048d2 <- 0xaa83fd24 -mem-write: 0x800048d6 <- 0x92e3000a -mem-write: 0x800048da <- 0x2083fc0a -mem-write: 0x800048de <- 0x240301c1 -mem-write: 0x800048e2 <- 0x24830181 -mem-write: 0x800048e6 <- 0x29030141 -mem-write: 0x800048ea <- 0x29830101 -mem-write: 0x800048ee <- 0x2a8300c1 -mem-write: 0x800048f2 <- 0x2b030041 -mem-write: 0x800048f6 <- 0x5130001 -mem-write: 0x800048fa <- 0x2a03000a -mem-write: 0x800048fe <- 0x1130081 -mem-write: 0x80004902 <- 0x80670201 -mem-write: 0x80004906 <- 0x1130000 -mem-write: 0x8000490a <- 0x2023fd01 -mem-write: 0x8000490e <- 0x2e230321 -mem-write: 0x80004912 <- 0x2c230131 -mem-write: 0x80004916 <- 0x2a230141 -mem-write: 0x8000491a <- 0x28230151 -mem-write: 0x8000491e <- 0x26230161 -mem-write: 0x80004922 <- 0x26230171 -mem-write: 0x80004926 <- 0x24230211 -mem-write: 0x8000492a <- 0x22230281 -mem-write: 0x8000492e <- 0xa930291 -mem-write: 0x80004932 <- 0x8b930005 -mem-write: 0x80004936 <- 0xb130005 -mem-write: 0x8000493a <- 0xa132e05 -mem-write: 0x8000493e <- 0x9930000 -mem-write: 0x80004942 <- 0x9130010 -mem-write: 0x80004946 <- 0x2483fff0 -mem-write: 0x8000494a <- 0x2403004b -mem-write: 0x8000494e <- 0x8493008b -mem-write: 0x80004952 <- 0xc863fff4 -mem-write: 0x80004956 <- 0x57830204 -mem-write: 0x8000495a <- 0x849300c4 -mem-write: 0x8000495e <- 0xfe63fff4 -mem-write: 0x80004962 <- 0x178300f9 -mem-write: 0x80004966 <- 0x59300e4 -mem-write: 0x8000496a <- 0x85130004 -mem-write: 0x8000496e <- 0x8663000a -mem-write: 0x80004972 <- 0x80e70127 -mem-write: 0x80004976 <- 0x6a33000b -mem-write: 0x8000497a <- 0x41300aa -mem-write: 0x8000497e <- 0x9ce30684 -mem-write: 0x80004982 <- 0x2b03fd24 -mem-write: 0x80004986 <- 0x10e3000b -mem-write: 0x8000498a <- 0x2083fc0b -mem-write: 0x8000498e <- 0x240302c1 -mem-write: 0x80004992 <- 0x24830281 -mem-write: 0x80004996 <- 0x29030241 -mem-write: 0x8000499a <- 0x29830201 -mem-write: 0x8000499e <- 0x2a8301c1 -mem-write: 0x800049a2 <- 0x2b030141 -mem-write: 0x800049a6 <- 0x2b830101 -mem-write: 0x800049aa <- 0x51300c1 -mem-write: 0x800049ae <- 0x2a03000a -mem-write: 0x800049b2 <- 0x1130181 -mem-write: 0x800049b6 <- 0x80670301 -mem-write: 0x800049ba <- 0x6930000 -mem-write: 0x800049be <- 0x7930045 -mem-write: 0x800049c2 <- 0x5130000 -mem-write: 0x800049c6 <- 0x883701a5 -mem-write: 0x800049ca <- 0x6fffff -mem-write: 0x800049ce <- 0x979301c0 -mem-write: 0x800049d2 <- 0x90230017 -mem-write: 0x800049d6 <- 0x979300e6 -mem-write: 0x800049da <- 0x86930107 -mem-write: 0x800049de <- 0xd7930026 -mem-write: 0x800049e2 <- 0xe630107 -mem-write: 0x800049e6 <- 0xd70302d5 -mem-write: 0x800049ea <- 0x76130006 -mem-write: 0x800049ee <- 0x4630017 -mem-write: 0x800049f2 <- 0xe7930006 -mem-write: 0x800049f6 <- 0x57130017 -mem-write: 0x800049fa <- 0xf6130017 -mem-write: 0x800049fe <- 0x65b30027 -mem-write: 0x80004a02 <- 0x6e30107 -mem-write: 0x80004a06 <- 0x9793fc06 -mem-write: 0x80004a0a <- 0x90230017 -mem-write: 0x80004a0e <- 0x979300b6 -mem-write: 0x80004a12 <- 0x86930107 -mem-write: 0x80004a16 <- 0xd7930026 -mem-write: 0x80004a1a <- 0x16e30107 -mem-write: 0x80004a1e <- 0x8067fcd5 -mem-write: 0x80004a22 <- 0x6930000 -mem-write: 0x80004a26 <- 0x7130185 -mem-write: 0x80004a2a <- 0x5130000 -mem-write: 0x80004a2e <- 0x6f0025 -mem-write: 0x80004a32 <- 0x171301c0 -mem-write: 0x80004a36 <- 0x90230017 -mem-write: 0x80004a3a <- 0x171300f6 -mem-write: 0x80004a3e <- 0x86930107 -mem-write: 0x80004a42 <- 0x5713ffe6 -mem-write: 0x80004a46 <- 0x4630107 -mem-write: 0x80004a4a <- 0xd78304d5 -mem-write: 0x80004a4e <- 0x96130006 -mem-write: 0x80004a52 <- 0x56130107 -mem-write: 0x80004a56 <- 0x97934106 -mem-write: 0x80004a5a <- 0x54630017 -mem-write: 0x80004a5e <- 0x67130006 -mem-write: 0x80004a62 <- 0x97930017 -mem-write: 0x80004a66 <- 0xd7930107 -mem-write: 0x80004a6a <- 0x76130107 -mem-write: 0x80004a6e <- 0xe5930027 -mem-write: 0x80004a72 <- 0xe30017 -mem-write: 0x80004a76 <- 0x1713fc06 -mem-write: 0x80004a7a <- 0x90230017 -mem-write: 0x80004a7e <- 0x171300b6 -mem-write: 0x80004a82 <- 0x86930107 -mem-write: 0x80004a86 <- 0x5713ffe6 -mem-write: 0x80004a8a <- 0x10e30107 -mem-write: 0x80004a8e <- 0x8067fcd5 -mem-write: 0x80004a92 <- 0x1130000 -mem-write: 0x80004a96 <- 0xe37fe01 -mem-write: 0x80004a9a <- 0x1d230001 -mem-write: 0x80004a9e <- 0x1e230001 -mem-write: 0x80004aa2 <- 0x85930001 -mem-write: 0x80004aa6 <- 0x7930185 -mem-write: 0x80004aaa <- 0x81301c1 -mem-write: 0x80004aae <- 0xe130081 -mem-write: 0x80004ab2 <- 0xd703fffe -mem-write: 0x80004ab6 <- 0x87930005 -mem-write: 0x80004aba <- 0x8593ffe7 -mem-write: 0x80004abe <- 0x1863ffe5 -mem-write: 0x80004ac2 <- 0x9f230207 -mem-write: 0x80004ac6 <- 0x96e3fe07 -mem-write: 0x80004aca <- 0x613ff07 -mem-write: 0x80004ace <- 0x6930046 -mem-write: 0x80004ad2 <- 0xd70301e1 -mem-write: 0x80004ad6 <- 0x87930007 -mem-write: 0x80004ada <- 0x6130027 -mem-write: 0x80004ade <- 0x1f230026 -mem-write: 0x80004ae2 <- 0x98e3fee6 -mem-write: 0x80004ae6 <- 0x113fed7 -mem-write: 0x80004aea <- 0x80670201 -mem-write: 0x80004aee <- 0x7330000 -mem-write: 0x80004af2 <- 0xd88302a7 -mem-write: 0x80004af6 <- 0xd3030027 -mem-write: 0x80004afa <- 0x76b30007 -mem-write: 0x80004afe <- 0x86b301c7 -mem-write: 0x80004b02 <- 0x57130116 -mem-write: 0x80004b06 <- 0xd8930107 -mem-write: 0x80004b0a <- 0x7330106 -mem-write: 0x80004b0e <- 0x7330067 -mem-write: 0x80004b12 <- 0x58930117 -mem-write: 0x80004b16 <- 0x91230107 -mem-write: 0x80004b1a <- 0x902300d7 -mem-write: 0x80004b1e <- 0x9f2300e7 -mem-write: 0x80004b22 <- 0x98e3ff17 -mem-write: 0x80004b26 <- 0xf06ff907 -mem-write: 0x80004b2a <- 0x713fa5f -mem-write: 0x80004b2e <- 0x57830125 -mem-write: 0x80004b32 <- 0x5130005 -mem-write: 0x80004b36 <- 0x98630025 -mem-write: 0x80004b3a <- 0x1ae30007 -mem-write: 0x80004b3e <- 0x513fee5 -mem-write: 0x80004b42 <- 0x80670000 -mem-write: 0x80004b46 <- 0x5130000 -mem-write: 0x80004b4a <- 0x80670010 -mem-write: 0x80004b4e <- 0x1130000 -mem-write: 0x80004b52 <- 0x2223ff01 -mem-write: 0x80004b56 <- 0x54830091 -mem-write: 0x80004b5a <- 0x24230125 -mem-write: 0x80004b5e <- 0x26230081 -mem-write: 0x80004b62 <- 0xc7930011 -mem-write: 0x80004b66 <- 0x9713fff4 -mem-write: 0x80004b6a <- 0x4130117 -mem-write: 0x80004b6e <- 0x16630005 -mem-write: 0x80004b72 <- 0xf0ef0007 -mem-write: 0x80004b76 <- 0x1863fb9f -mem-write: 0x80004b7a <- 0x87b70005 -mem-write: 0x80004b7e <- 0xc4b3ffff -mem-write: 0x80004b82 <- 0x192300f4 -mem-write: 0x80004b86 <- 0x20830094 -mem-write: 0x80004b8a <- 0x240300c1 -mem-write: 0x80004b8e <- 0x24830081 -mem-write: 0x80004b92 <- 0x1130041 -mem-write: 0x80004b96 <- 0x80670101 -mem-write: 0x80004b9a <- 0x1130000 -mem-write: 0x80004b9e <- 0x2423ff01 -mem-write: 0x80004ba2 <- 0x54030081 -mem-write: 0x80004ba6 <- 0x26230125 -mem-write: 0x80004baa <- 0x47930011 -mem-write: 0x80004bae <- 0x9713fff4 -mem-write: 0x80004bb2 <- 0x1a630117 -mem-write: 0x80004bb6 <- 0xf0ef0007 -mem-write: 0x80004bba <- 0x793f75f -mem-write: 0x80004bbe <- 0x5130005 -mem-write: 0x80004bc2 <- 0x94630000 -mem-write: 0x80004bc6 <- 0x55130007 -mem-write: 0x80004bca <- 0x208300f4 -mem-write: 0x80004bce <- 0x240300c1 -mem-write: 0x80004bd2 <- 0x1130081 -mem-write: 0x80004bd6 <- 0x80670101 -mem-write: 0x80004bda <- 0x57830000 -mem-write: 0x80004bde <- 0x1130125 -mem-write: 0x80004be2 <- 0x2423fd01 -mem-write: 0x80004be6 <- 0xd7930281 -mem-write: 0x80004bea <- 0x222300f7 -mem-write: 0x80004bee <- 0x26230291 -mem-write: 0x80004bf2 <- 0x20230211 -mem-write: 0x80004bf6 <- 0x2e230321 -mem-write: 0x80004bfa <- 0x7b30131 -VXDRV: upload 1024 bytes to 0x80004bfe -mem-write: 0x80004bfe <- 0x902340f0 -mem-write: 0x80004c02 <- 0x578300f5 -mem-write: 0x80004c06 <- 0x87370125 -mem-write: 0x80004c0a <- 0x7130000 -mem-write: 0x80004c0e <- 0x77b3fff7 -mem-write: 0x80004c12 <- 0x912300f7 -mem-write: 0x80004c16 <- 0x49300f5 -mem-write: 0x80004c1a <- 0x4130005 -mem-write: 0x80004c1e <- 0x82630105 -mem-write: 0x80004c22 <- 0x879304e7 -mem-write: 0x80004c26 <- 0x92230065 -mem-write: 0x80004c2a <- 0x5130005 -mem-write: 0x80004c2e <- 0x5703ffe5 -mem-write: 0x80004c32 <- 0x4130004 -mem-write: 0x80004c36 <- 0x8793ffe4 -mem-write: 0x80004c3a <- 0x9f230027 -mem-write: 0x80004c3e <- 0x18e3fee7 -mem-write: 0x80004c42 <- 0x9c23fe85 -mem-write: 0x80004c46 <- 0x20830005 -mem-write: 0x80004c4a <- 0x240302c1 -mem-write: 0x80004c4e <- 0x24830281 -mem-write: 0x80004c52 <- 0x29030241 -mem-write: 0x80004c56 <- 0x29830201 -mem-write: 0x80004c5a <- 0x11301c1 -mem-write: 0x80004c5e <- 0x80670301 -mem-write: 0x80004c62 <- 0x57030000 -mem-write: 0x80004c66 <- 0x89130125 -mem-write: 0x80004c6a <- 0xf7330045 -mem-write: 0x80004c6e <- 0x1c6300e7 -mem-write: 0x80004c72 <- 0x262302f7 -mem-write: 0x80004c76 <- 0xf0ef00b1 -mem-write: 0x80004c7a <- 0x2583eb5f -mem-write: 0x80004c7e <- 0x46300c1 -mem-write: 0x80004c82 <- 0x87930205 -mem-write: 0x80004c86 <- 0x92230065 -mem-write: 0x80004c8a <- 0x85130005 -mem-write: 0x80004c8e <- 0x5703ffc4 -mem-write: 0x80004c92 <- 0x4130004 -mem-write: 0x80004c96 <- 0x8793ffe4 -mem-write: 0x80004c9a <- 0x9f230027 -mem-write: 0x80004c9e <- 0x18e3fee7 -mem-write: 0x80004ca2 <- 0xf06ffe85 -mem-write: 0x80004ca6 <- 0x8993fa5f -mem-write: 0x80004caa <- 0x91301a5 -mem-write: 0x80004cae <- 0x1f230029 -mem-write: 0x80004cb2 <- 0x9ce3fe09 -mem-write: 0x80004cb6 <- 0x2083ff29 -mem-write: 0x80004cba <- 0x240302c1 -mem-write: 0x80004cbe <- 0x24830281 -mem-write: 0x80004cc2 <- 0x29030241 -mem-write: 0x80004cc6 <- 0x29830201 -mem-write: 0x80004cca <- 0x11301c1 -mem-write: 0x80004cce <- 0x80670301 -mem-write: 0x80004cd2 <- 0x57830000 -mem-write: 0x80004cd6 <- 0x1130125 -mem-write: 0x80004cda <- 0x2423fb01 -mem-write: 0x80004cde <- 0xc7930481 -mem-write: 0x80004ce2 <- 0x2223fff7 -mem-write: 0x80004ce6 <- 0x26230491 -mem-write: 0x80004cea <- 0x97130411 -mem-write: 0x80004cee <- 0x4930117 -mem-write: 0x80004cf2 <- 0x84130005 -mem-write: 0x80004cf6 <- 0x16630005 -mem-write: 0x80004cfa <- 0xf0ef0007 -mem-write: 0x80004cfe <- 0x1263e31f -mem-write: 0x80004d02 <- 0x57830805 -mem-write: 0x80004d06 <- 0xc7930124 -mem-write: 0x80004d0a <- 0x9713fff7 -mem-write: 0x80004d0e <- 0x4630117 -mem-write: 0x80004d12 <- 0x5930607 -mem-write: 0x80004d16 <- 0x85130081 -mem-write: 0x80004d1a <- 0xf0ef0004 -mem-write: 0x80004d1e <- 0x593ec1f -mem-write: 0x80004d22 <- 0x5130241 -mem-write: 0x80004d26 <- 0xf0ef0004 -mem-write: 0x80004d2a <- 0x5583eb5f -mem-write: 0x80004d2e <- 0x55030081 -mem-write: 0x80004d32 <- 0xc630241 -mem-write: 0x80004d36 <- 0x79304b5 -mem-write: 0x80004d3a <- 0x71300a1 -mem-write: 0x80004d3e <- 0x6130261 -mem-write: 0x80004d42 <- 0xd6830201 -mem-write: 0x80004d46 <- 0x87930007 -mem-write: 0x80004d4a <- 0x9a630027 -mem-write: 0x80004d4e <- 0x56830806 -mem-write: 0x80004d52 <- 0x7130007 -mem-write: 0x80004d56 <- 0x94630027 -mem-write: 0x80004d5a <- 0x94e30806 -mem-write: 0x80004d5e <- 0x513fec7 -mem-write: 0x80004d62 <- 0x20830000 -mem-write: 0x80004d66 <- 0x240304c1 -mem-write: 0x80004d6a <- 0x24830481 -mem-write: 0x80004d6e <- 0x1130441 -mem-write: 0x80004d72 <- 0x80670501 -mem-write: 0x80004d76 <- 0x5130000 -mem-write: 0x80004d7a <- 0xf0ef0004 -mem-write: 0x80004d7e <- 0xae3db1f -mem-write: 0x80004d82 <- 0x513f805 -mem-write: 0x80004d86 <- 0xf06fffe0 -mem-write: 0x80004d8a <- 0x3513fddf -mem-write: 0x80004d8e <- 0x56030015 -mem-write: 0x80004d92 <- 0x568300a1 -mem-write: 0x80004d96 <- 0x5330261 -mem-write: 0x80004d9a <- 0x71340a0 -mem-write: 0x80004d9e <- 0x79300a1 -mem-write: 0x80004da2 <- 0x75130261 -mem-write: 0x80004da6 <- 0x5130025 -mem-write: 0x80004daa <- 0x593fff5 -mem-write: 0x80004dae <- 0x879303c1 -mem-write: 0x80004db2 <- 0x7130027 -mem-write: 0x80004db6 <- 0x1e630027 -mem-write: 0x80004dba <- 0x82e300d6 -mem-write: 0x80004dbe <- 0x5603fab7 -mem-write: 0x80004dc2 <- 0xd6830007 -mem-write: 0x80004dc6 <- 0x7130007 -mem-write: 0x80004dca <- 0x87930027 -mem-write: 0x80004dce <- 0x6e30027 -mem-write: 0x80004dd2 <- 0xe8e3fed6 -mem-write: 0x80004dd6 <- 0x533f8c6 -mem-write: 0x80004dda <- 0xf06f40a0 -mem-write: 0x80004dde <- 0x513f89f -mem-write: 0x80004de2 <- 0x80e30010 -mem-write: 0x80004de6 <- 0x513f805 -mem-write: 0x80004dea <- 0xf06ffff0 -mem-write: 0x80004dee <- 0x113f79f -mem-write: 0x80004df2 <- 0x2623ff01 -mem-write: 0x80004df6 <- 0xf0ef0011 -mem-write: 0x80004dfa <- 0x2083d35f -mem-write: 0x80004dfe <- 0x351300c1 -mem-write: 0x80004e02 <- 0x1130015 -mem-write: 0x80004e06 <- 0x80670101 -mem-write: 0x80004e0a <- 0x1130000 -mem-write: 0x80004e0e <- 0x2c23fe01 -mem-write: 0x80004e12 <- 0x2a230081 -mem-write: 0x80004e16 <- 0x2e230091 -mem-write: 0x80004e1a <- 0x28230011 -mem-write: 0x80004e1e <- 0x26230121 -mem-write: 0x80004e22 <- 0x84930131 -mem-write: 0x80004e26 <- 0x4130005 -mem-write: 0x80004e2a <- 0xc4630005 -mem-write: 0x80004e2e <- 0x7930a05 -mem-write: 0x80004e32 <- 0x861300f0 -mem-write: 0x80004e36 <- 0x5130005 -mem-write: 0x80004e3a <- 0x6930045 -mem-write: 0x80004e3e <- 0x5930184 -mem-write: 0x80004e42 <- 0xd46300f0 -mem-write: 0x80004e46 <- 0x7930297 -mem-write: 0x80004e4a <- 0xd7030005 -mem-write: 0x80004e4e <- 0x87930027 -mem-write: 0x80004e52 <- 0x9f230027 -mem-write: 0x80004e56 <- 0x9ae3fee7 -mem-write: 0x80004e5a <- 0x1c23fed7 -mem-write: 0x80004e5e <- 0x6130004 -mem-write: 0x80004e62 <- 0xc2e3ff06 -mem-write: 0x80004e66 <- 0xf493fec5 -mem-write: 0x80004e6a <- 0x79300f4 -mem-write: 0x80004e6e <- 0xd8630070 -mem-write: 0x80004e72 <- 0x7130297 -mem-write: 0x80004e76 <- 0x5930184 -mem-write: 0x80004e7a <- 0x7930024 -mem-write: 0x80004e7e <- 0x56830000 -mem-write: 0x80004e82 <- 0x7130007 -mem-write: 0x80004e86 <- 0x9613ffe7 -mem-write: 0x80004e8a <- 0xe7b30086 -mem-write: 0x80004e8e <- 0x112300c7 -mem-write: 0x80004e92 <- 0xd79300f7 -mem-write: 0x80004e96 <- 0x14e30086 -mem-write: 0x80004e9a <- 0x8493feb7 -mem-write: 0x80004e9e <- 0x8a63ff84 -mem-write: 0x80004ea2 <- 0x84930004 -mem-write: 0x80004ea6 <- 0x513fff4 -mem-write: 0x80004eaa <- 0xf0ef0004 -mem-write: 0x80004eae <- 0x9ae3b79f -mem-write: 0x80004eb2 <- 0x513fe04 -mem-write: 0x80004eb6 <- 0x20830000 -mem-write: 0x80004eba <- 0x240301c1 -mem-write: 0x80004ebe <- 0x24830181 -mem-write: 0x80004ec2 <- 0x29030141 -mem-write: 0x80004ec6 <- 0x29830101 -mem-write: 0x80004eca <- 0x11300c1 -mem-write: 0x80004ece <- 0x80670201 -mem-write: 0x80004ed2 <- 0x7930000 -mem-write: 0x80004ed6 <- 0x933ff10 -mem-write: 0x80004eda <- 0xdc6340b0 -mem-write: 0x80004ede <- 0x59312f5 -mem-write: 0x80004ee2 <- 0x9930185 -mem-write: 0x80004ee6 <- 0x6930000 -mem-write: 0x80004eea <- 0x6130045 -mem-write: 0x80004eee <- 0x570300f0 -mem-write: 0x80004ef2 <- 0x87930184 -mem-write: 0x80004ef6 <- 0xe9b30005 -mem-write: 0x80004efa <- 0xd70300e9 -mem-write: 0x80004efe <- 0x8793ffe7 -mem-write: 0x80004f02 <- 0x9123ffe7 -mem-write: 0x80004f06 <- 0x9ae300e7 -mem-write: 0x80004f0a <- 0x1223fed7 -mem-write: 0x80004f0e <- 0x9130004 -mem-write: 0x80004f12 <- 0x4ee3ff09 -mem-write: 0x80004f16 <- 0x793fd26 -mem-write: 0x80004f1a <- 0x713ff00 -mem-write: 0x80004f1e <- 0x87b3ff10 -mem-write: 0x80004f22 <- 0x9134097 -mem-write: 0x80004f26 <- 0xc4630000 -mem-write: 0x80004f2a <- 0x9330ae4 -mem-write: 0x80004f2e <- 0x79300f9 -mem-write: 0x80004f32 <- 0xd6630070 -mem-write: 0x80004f36 <- 0x99930527 -mem-write: 0x80004f3a <- 0xd9930109 -mem-write: 0x80004f3e <- 0x47834109 -mem-write: 0x80004f42 <- 0x5930184 -mem-write: 0x80004f46 <- 0xe9b301a4 -mem-write: 0x80004f4a <- 0x999300f9 -mem-write: 0x80004f4e <- 0xd9930109 -mem-write: 0x80004f52 <- 0x7930109 -mem-write: 0x80004f56 <- 0xd6030000 -mem-write: 0x80004f5a <- 0x86930006 -mem-write: 0x80004f5e <- 0x57130026 -mem-write: 0x80004f62 <- 0xe7330086 -mem-write: 0x80004f66 <- 0x179300e7 -mem-write: 0x80004f6a <- 0x97930086 -mem-write: 0x80004f6e <- 0x9f230107 -mem-write: 0x80004f72 <- 0xd793fee6 -mem-write: 0x80004f76 <- 0x90e30107 -mem-write: 0x80004f7a <- 0x913feb6 -mem-write: 0x80004f7e <- 0xc63ff89 -mem-write: 0x80004f82 <- 0x57830609 -mem-write: 0x80004f86 <- 0x9130184 -mem-write: 0x80004f8a <- 0x513fff9 -mem-write: 0x80004f8e <- 0xf7930004 -mem-write: 0x80004f92 <- 0xe9b30017 -mem-write: 0x80004f96 <- 0xf0ef0137 -mem-write: 0x80004f9a <- 0x14e3a25f -mem-write: 0x80004f9e <- 0x9793fe09 -mem-write: 0x80004fa2 <- 0xd7930109 -mem-write: 0x80004fa6 <- 0x90634107 -mem-write: 0x80004faa <- 0x95130407 -mem-write: 0x80004fae <- 0x55130109 -mem-write: 0x80004fb2 <- 0x20830105 -mem-write: 0x80004fb6 <- 0x240301c1 -mem-write: 0x80004fba <- 0x24830181 -mem-write: 0x80004fbe <- 0x29030141 -mem-write: 0x80004fc2 <- 0x29830101 -mem-write: 0x80004fc6 <- 0x11300c1 -mem-write: 0x80004fca <- 0x80670201 -mem-write: 0x80004fce <- 0xf9130000 -mem-write: 0x80004fd2 <- 0x933ff07 -mem-write: 0x80004fd6 <- 0x9334120 -mem-write: 0x80004fda <- 0x79300f9 -mem-write: 0x80004fde <- 0xd0e30070 -mem-write: 0x80004fe2 <- 0xf06ffb27 -mem-write: 0x80004fe6 <- 0x993f55f -mem-write: 0x80004fea <- 0x95130010 -mem-write: 0x80004fee <- 0x55130109 -mem-write: 0x80004ff2 <- 0xf06f0105 -mem-write: 0x80004ff6 <- 0x8513fc1f -mem-write: 0x80004ffa <- 0x98630009 -VXDRV: upload 1024 bytes to 0x80004ffe -mem-write: 0x80004ffe <- 0x15130009 -mem-write: 0x80005002 <- 0x55130105 -mem-write: 0x80005006 <- 0xf06f0105 -mem-write: 0x8000500a <- 0x513eb1f -mem-write: 0x8000500e <- 0xf06f0010 -mem-write: 0x80005012 <- 0x793ff1f -mem-write: 0x80005016 <- 0x993ff90 -mem-write: 0x8000501a <- 0xd4e30000 -mem-write: 0x8000501e <- 0x693f6f5 -mem-write: 0x80005022 <- 0xf06f0044 -mem-write: 0x80005026 <- 0x5783f1df -mem-write: 0x8000502a <- 0x1130045 -mem-write: 0x8000502e <- 0x2223ff01 -mem-write: 0x80005032 <- 0x26230091 -mem-write: 0x80005036 <- 0x24230011 -mem-write: 0x8000503a <- 0x20230081 -mem-write: 0x8000503e <- 0x4930121 -mem-write: 0x80005042 <- 0x9c630005 -mem-write: 0x80005046 <- 0x57030c07 -mem-write: 0x8000504a <- 0x4130065 -mem-write: 0x8000504e <- 0x17930000 -mem-write: 0x80005052 <- 0xd7930107 -mem-write: 0x80005056 <- 0xc4634107 -mem-write: 0x8000505a <- 0x6930a07 -mem-write: 0x8000505e <- 0x61301a5 -mem-write: 0x80005062 <- 0x18630a00 -mem-write: 0x80005066 <- 0x87930207 -mem-write: 0x8000506a <- 0x6f0064 -mem-write: 0x8000506e <- 0xd7030080 -mem-write: 0x80005072 <- 0x87930007 -mem-write: 0x80005076 <- 0x9e230027 -mem-write: 0x8000507a <- 0x9ae3fee7 -mem-write: 0x8000507e <- 0x9c23fef6 -mem-write: 0x80005082 <- 0x4130004 -mem-write: 0x80005086 <- 0xc630104 -mem-write: 0x8000508a <- 0xd70306c4 -mem-write: 0x8000508e <- 0xce30064 -mem-write: 0x80005092 <- 0x7793fc07 -mem-write: 0x80005096 <- 0x9063f007 -mem-write: 0x8000509a <- 0x85130407 -mem-write: 0x8000509e <- 0x85930184 -mem-write: 0x800050a2 <- 0x7930024 -mem-write: 0x800050a6 <- 0x7130000 -mem-write: 0x800050aa <- 0x56830005 -mem-write: 0x800050ae <- 0x7130007 -mem-write: 0x800050b2 <- 0x9613ffe7 -mem-write: 0x800050b6 <- 0xe7b30086 -mem-write: 0x800050ba <- 0x112300c7 -mem-write: 0x800050be <- 0xd79300f7 -mem-write: 0x800050c2 <- 0x94e30086 -mem-write: 0x800050c6 <- 0xd703fee5 -mem-write: 0x800050ca <- 0x4130064 -mem-write: 0x800050ce <- 0x77930084 -mem-write: 0x800050d2 <- 0x88e3f007 -mem-write: 0x800050d6 <- 0x913fc07 -mem-write: 0x800050da <- 0x6f0a00 -mem-write: 0x800050de <- 0x4130140 -mem-write: 0x800050e2 <- 0xf0ef0014 -mem-write: 0x800050e6 <- 0x4c63941f -mem-write: 0x800050ea <- 0xd7030089 -mem-write: 0x800050ee <- 0x17130064 -mem-write: 0x800050f2 <- 0x57130107 -mem-write: 0x800050f6 <- 0x85134107 -mem-write: 0x800050fa <- 0x52e30004 -mem-write: 0x800050fe <- 0x2083fe07 -mem-write: 0x80005102 <- 0x51300c1 -mem-write: 0x80005106 <- 0x24030004 -mem-write: 0x8000510a <- 0x24830081 -mem-write: 0x8000510e <- 0x29030041 -mem-write: 0x80005112 <- 0x1130001 -mem-write: 0x80005116 <- 0x80670101 -mem-write: 0x8000511a <- 0xf7130000 -mem-write: 0x8000511e <- 0x413f007 -mem-write: 0x80005122 <- 0x10630000 -mem-write: 0x80005126 <- 0x9130407 -mem-write: 0x8000512a <- 0x6ff6f0 -mem-write: 0x8000512e <- 0x4130140 -mem-write: 0x80005132 <- 0xf0effff4 -mem-write: 0x80005136 <- 0x4e3889f -mem-write: 0x8000513a <- 0xd783fd24 -mem-write: 0x8000513e <- 0x85130044 -mem-write: 0x80005142 <- 0x96e30004 -mem-write: 0x80005146 <- 0x2083fe07 -mem-write: 0x8000514a <- 0x51300c1 -mem-write: 0x8000514e <- 0x24030004 -mem-write: 0x80005152 <- 0x24830081 -mem-write: 0x80005156 <- 0x29030041 -mem-write: 0x8000515a <- 0x1130001 -mem-write: 0x8000515e <- 0x80670101 -mem-write: 0x80005162 <- 0x6930000 -mem-write: 0x80005166 <- 0x5930045 -mem-write: 0x8000516a <- 0x71301a5 -mem-write: 0x8000516e <- 0x6f0000 -mem-write: 0x80005172 <- 0xd7830080 -mem-write: 0x80005176 <- 0xd6130006 -mem-write: 0x8000517a <- 0x67330087 -mem-write: 0x8000517e <- 0x979300c7 -mem-write: 0x80005182 <- 0x90230087 -mem-write: 0x80005186 <- 0x971300e6 -mem-write: 0x8000518a <- 0x86930107 -mem-write: 0x8000518e <- 0x57130026 -mem-write: 0x80005192 <- 0x90e30107 -mem-write: 0x80005196 <- 0xd783feb6 -mem-write: 0x8000519a <- 0x4130044 -mem-write: 0x8000519e <- 0xf06fff80 -mem-write: 0x800051a2 <- 0x113f89f -mem-write: 0x800051a6 <- 0x2c23fe01 -mem-write: 0x800051aa <- 0x2a230081 -mem-write: 0x800051ae <- 0x28230091 -mem-write: 0x800051b2 <- 0x26230121 -mem-write: 0x800051b6 <- 0x24230131 -mem-write: 0x800051ba <- 0x22230141 -mem-write: 0x800051be <- 0x89130151 -mem-write: 0x800051c2 <- 0x84930006 -mem-write: 0x800051c6 <- 0x2e230007 -mem-write: 0x800051ca <- 0x4130011 -mem-write: 0x800051ce <- 0x89930005 -mem-write: 0x800051d2 <- 0xa130005 -mem-write: 0x800051d6 <- 0xa930006 -mem-write: 0x800051da <- 0xf0ef0007 -mem-write: 0x800051de <- 0x793e4df -mem-write: 0x800051e2 <- 0x9330900 -mem-write: 0x800051e6 <- 0xdc6340a9 -mem-write: 0x800051ea <- 0x87b716a7 -mem-write: 0x800051ee <- 0x87930000 -mem-write: 0x800051f2 <- 0xda63ffe7 -mem-write: 0x800051f6 <- 0x84631f27 -mem-write: 0x800051fa <- 0xa5031c0a -mem-write: 0x800051fe <- 0xa7830044 -mem-write: 0x80005202 <- 0xa630004 -mem-write: 0x80005206 <- 0x871306f5 -mem-write: 0x8000520a <- 0x879301a4 -mem-write: 0x8000520e <- 0x7130344 -mem-write: 0x80005212 <- 0x1f230027 -mem-write: 0x80005216 <- 0x1ce3fe07 -mem-write: 0x8000521a <- 0x793fef7 -mem-write: 0x8000521e <- 0xc630380 -mem-write: 0x80005222 <- 0xd06332f5 -mem-write: 0x80005226 <- 0x79316a7 -mem-write: 0x8000522a <- 0xc630400 -mem-write: 0x8000522e <- 0x7932ef5 -mem-write: 0x80005232 <- 0x18630710 -mem-write: 0x80005236 <- 0x87b734f5 -mem-write: 0x8000523a <- 0x87934000 -mem-write: 0x8000523e <- 0x713fff7 -mem-write: 0x80005242 <- 0xaa2300a0 -mem-write: 0x80005246 <- 0x87b700f4 -mem-write: 0x8000524a <- 0xa423ffff -mem-write: 0x8000524e <- 0x9c2300e4 -mem-write: 0x80005252 <- 0xa62300f4 -mem-write: 0x80005256 <- 0x79300e4 -mem-write: 0x8000525a <- 0x873700a0 -mem-write: 0x8000525e <- 0x87930000 -mem-write: 0x80005262 <- 0x97930087 -mem-write: 0x80005266 <- 0x87b30017 -mem-write: 0x8000526a <- 0x952300f4 -mem-write: 0x8000526e <- 0xa02300e7 -mem-write: 0x80005272 <- 0x586300a4 -mem-write: 0x80005276 <- 0xa5831b20 -mem-write: 0x8000527a <- 0xd7830084 -mem-write: 0x8000527e <- 0x8130144 -mem-write: 0x80005282 <- 0x961308f0 -mem-write: 0x80005286 <- 0x6330015 -mem-write: 0x8000528a <- 0x570300c4 -mem-write: 0x8000528e <- 0x76b30006 -mem-write: 0x80005292 <- 0x4a6300f7 -mem-write: 0x80005296 <- 0x81302a8 -mem-write: 0x8000529a <- 0x466300b0 -mem-write: 0x8000529e <- 0x79302b8 -mem-write: 0x800052a2 <- 0x5930006 -mem-write: 0x800052a6 <- 0xd7030184 -mem-write: 0x800052aa <- 0x4630027 -mem-write: 0x800052ae <- 0xe6930007 -mem-write: 0x800052b2 <- 0x91230016 -mem-write: 0x800052b6 <- 0x87930007 -mem-write: 0x800052ba <- 0x96e30027 -mem-write: 0x800052be <- 0x5703fef5 -mem-write: 0x800052c2 <- 0xd7830006 -mem-write: 0x800052c6 <- 0xc7930144 -mem-write: 0x800052ca <- 0xf7b3fff7 -mem-write: 0x800052ce <- 0x102300e7 -mem-write: 0x800052d2 <- 0xd78300f6 -mem-write: 0x800052d6 <- 0xf7330164 -mem-write: 0x800052da <- 0x6300d7 -mem-write: 0x800052de <- 0x84630407 -mem-write: 0x800052e2 <- 0x86131ad7 -mem-write: 0x800052e6 <- 0x6930324 -mem-write: 0x800052ea <- 0x84930184 -mem-write: 0x800052ee <- 0x71301c4 -mem-write: 0x800052f2 <- 0x57830000 -mem-write: 0x800052f6 <- 0xd5830006 -mem-write: 0x800052fa <- 0x86930006 -mem-write: 0x800052fe <- 0x613ffe6 -mem-write: 0x80005302 <- 0x87b3ffe6 -mem-write: 0x80005306 <- 0x87b300b7 -mem-write: 0x8000530a <- 0xd71300e7 -mem-write: 0x8000530e <- 0x91230107 -mem-write: 0x80005312 <- 0x771300f6 -mem-write: 0x80005316 <- 0x1ee30017 -mem-write: 0x8000531a <- 0x5863fc96 -mem-write: 0x8000531e <- 0x57831920 -mem-write: 0x80005322 <- 0x9e630044 -mem-write: 0x80005326 <- 0x87b71207 -mem-write: 0x8000532a <- 0x1c230000 -mem-write: 0x8000532e <- 0x87930004 -mem-write: 0x80005332 <- 0xc863ffe7 -mem-write: 0x80005336 <- 0x11230927 -mem-write: 0x8000533a <- 0x20830124 -mem-write: 0x8000533e <- 0x240301c1 -mem-write: 0x80005342 <- 0x24830181 -mem-write: 0x80005346 <- 0x29030141 -mem-write: 0x8000534a <- 0x29830101 -mem-write: 0x8000534e <- 0x2a0300c1 -mem-write: 0x80005352 <- 0x2a830081 -mem-write: 0x80005356 <- 0x1130041 -mem-write: 0x8000535a <- 0x80670201 -mem-write: 0x8000535e <- 0x54630000 -mem-write: 0x80005362 <- 0x7930e09 -mem-write: 0x80005366 <- 0x5c63f700 -mem-write: 0x8000536a <- 0x79308f9 -mem-write: 0x8000536e <- 0x4130024 -mem-write: 0x80005372 <- 0x879301a4 -mem-write: 0x80005376 <- 0x9f230027 -mem-write: 0x8000537a <- 0x9ce3fe07 -mem-write: 0x8000537e <- 0xf06ffe87 -mem-write: 0x80005382 <- 0x793fbdf -mem-write: 0x80005386 <- 0x8630180 -mem-write: 0x8000538a <- 0x79316f5 -mem-write: 0x8000538e <- 0x1a630350 -mem-write: 0x80005392 <- 0x17371ef5 -mem-write: 0x80005396 <- 0x7b70000 -mem-write: 0x8000539a <- 0x6930400 -mem-write: 0x8000539e <- 0x87930060 -mem-write: 0x800053a2 <- 0x7137ff7 -mem-write: 0x800053a6 <- 0xaa238007 -mem-write: 0x800053aa <- 0xa42300f4 -mem-write: 0x800053ae <- 0x9c2300d4 -mem-write: 0x800053b2 <- 0xa62300e4 -mem-write: 0x800053b6 <- 0x79300d4 -mem-write: 0x800053ba <- 0xf06f0060 -mem-write: 0x800053be <- 0x1c23ea5f -mem-write: 0x800053c2 <- 0x87b70004 -mem-write: 0x800053c6 <- 0xc793ffff -mem-write: 0x800053ca <- 0x1123fff7 -mem-write: 0x800053ce <- 0x79300f4 -mem-write: 0x800053d2 <- 0x4130044 -mem-write: 0x800053d6 <- 0x90230184 -mem-write: 0x800053da <- 0x87930007 -mem-write: 0x800053de <- 0x1ce30027 -mem-write: 0x800053e2 <- 0xf06ffef4 -mem-write: 0x800053e6 <- 0x793f59f -mem-write: 0x800053ea <- 0x4130024 -mem-write: 0x800053ee <- 0x879301a4 -mem-write: 0x800053f2 <- 0x9f230027 -mem-write: 0x800053f6 <- 0x9ce3fe07 -mem-write: 0x800053fa <- 0xf06ffe87 -VXDRV: upload 1024 bytes to 0x800053fe -mem-write: 0x800053fe <- 0x593f41f -mem-write: 0x80005402 <- 0x5130009 -mem-write: 0x80005406 <- 0xf0ef0004 -mem-write: 0x8000540a <- 0x463a05f -mem-write: 0x8000540e <- 0x9930005 -mem-write: 0x80005412 <- 0x8c630010 -mem-write: 0x80005416 <- 0xa5030c0a -mem-write: 0x8000541a <- 0xa7830044 -mem-write: 0x8000541e <- 0x14e30004 -mem-write: 0x80005422 <- 0x793def5 -mem-write: 0x80005426 <- 0x4630900 -mem-write: 0x8000542a <- 0x57830af5 -mem-write: 0x8000542e <- 0x5130184 -mem-write: 0x80005432 <- 0xf7930004 -mem-write: 0x80005436 <- 0xe9b30017 -mem-write: 0x8000543a <- 0xf0ef00f9 -mem-write: 0x8000543e <- 0xa503d80f -mem-write: 0x80005442 <- 0xf06f0044 -mem-write: 0x80005446 <- 0x80e3e35f -mem-write: 0x8000544a <- 0xa503ee0a -mem-write: 0x8000544e <- 0xa7830044 -mem-write: 0x80005452 <- 0x1ae30004 -mem-write: 0x80005456 <- 0x40e3daf5 -mem-write: 0x8000545a <- 0xf06fe320 -mem-write: 0x8000545e <- 0x513fc9f -mem-write: 0x80005462 <- 0xf0ef0004 -mem-write: 0x80005466 <- 0x87b7d58f -mem-write: 0x8000546a <- 0x9130000 -mem-write: 0x8000546e <- 0x1c230019 -mem-write: 0x80005472 <- 0x87930004 -mem-write: 0x80005476 <- 0xc6e3ffe7 -mem-write: 0x8000547a <- 0x5ee3f527 -mem-write: 0x8000547e <- 0x1123ea09 -mem-write: 0x80005482 <- 0xf06f0004 -mem-write: 0x80005486 <- 0x9463eb9f -mem-write: 0x8000548a <- 0xa7830c09 -mem-write: 0x8000548e <- 0xd70300c4 -mem-write: 0x80005492 <- 0x97930184 -mem-write: 0x80005496 <- 0x7b30017 -mem-write: 0x8000549a <- 0xd78300f4 -mem-write: 0x8000549e <- 0xf7b30007 -mem-write: 0x800054a2 <- 0x90e300e7 -mem-write: 0x800054a6 <- 0x4ce3e407 -mem-write: 0x800054aa <- 0x793e720 -mem-write: 0x800054ae <- 0x6630900 -mem-write: 0x800054b2 <- 0x51300f5 -mem-write: 0x800054b6 <- 0xf0ef0004 -mem-write: 0x800054ba <- 0x5783d6cf -mem-write: 0x800054be <- 0x90e30044 -mem-write: 0x800054c2 <- 0x1c23fa07 -mem-write: 0x800054c6 <- 0x4ce30004 -mem-write: 0x800054ca <- 0xf06ffa09 -mem-write: 0x800054ce <- 0xa603e6df -mem-write: 0x800054d2 <- 0xd7830084 -mem-write: 0x800054d6 <- 0x16130144 -mem-write: 0x800054da <- 0x6330016 -mem-write: 0x800054de <- 0x570300c4 -mem-write: 0x800054e2 <- 0xf6b30006 -mem-write: 0x800054e6 <- 0xf06f00e7 -mem-write: 0x800054ea <- 0x1c23de1f -mem-write: 0x800054ee <- 0x11230004 -mem-write: 0x800054f2 <- 0xf06f0004 -mem-write: 0x800054f6 <- 0x7b7e49f -mem-write: 0x800054fa <- 0x87930080 -mem-write: 0x800054fe <- 0x7130ff7 -mem-write: 0x80005502 <- 0xaa230040 -mem-write: 0x80005506 <- 0x79300f4 -mem-write: 0x8000550a <- 0xa4231000 -mem-write: 0x8000550e <- 0x9c2300e4 -mem-write: 0x80005512 <- 0xa62300f4 -mem-write: 0x80005516 <- 0x79300e4 -mem-write: 0x8000551a <- 0x7130040 -mem-write: 0x8000551e <- 0xf06f1000 -mem-write: 0x80005522 <- 0x793d41f -mem-write: 0x80005526 <- 0xa4230070 -mem-write: 0x8000552a <- 0x7b700f4 -mem-write: 0x8000552e <- 0x87938001 -mem-write: 0x80005532 <- 0xaa23fff7 -mem-write: 0x80005536 <- 0x79300f4 -mem-write: 0x8000553a <- 0x9c230010 -mem-write: 0x8000553e <- 0x79300f4 -mem-write: 0x80005542 <- 0xa6230060 -mem-write: 0x80005546 <- 0x71300f4 -mem-write: 0x8000554a <- 0xf06f0010 -mem-write: 0x8000554e <- 0xae3d15f -mem-write: 0x80005552 <- 0xf06fd80a -mem-write: 0x80005556 <- 0x7b7dc9f -mem-write: 0x8000555a <- 0x87930080 -mem-write: 0x8000555e <- 0x7130ff7 -mem-write: 0x80005562 <- 0xaa230060 -mem-write: 0x80005566 <- 0x79300f4 -mem-write: 0x8000556a <- 0xa4231000 -mem-write: 0x8000556e <- 0x9c2300e4 -mem-write: 0x80005572 <- 0xa62300f4 -mem-write: 0x80005576 <- 0x79300e4 -mem-write: 0x8000557a <- 0x7130060 -mem-write: 0x8000557e <- 0xf06f1000 -mem-write: 0x80005582 <- 0x793ce1f -mem-write: 0x80005586 <- 0xa42300c0 -mem-write: 0x8000558a <- 0x7b700f4 -mem-write: 0x8000558e <- 0x87938001 -mem-write: 0x80005592 <- 0xaa23fff7 -mem-write: 0x80005596 <- 0x79300f4 -mem-write: 0x8000559a <- 0x9c230010 -mem-write: 0x8000559e <- 0x79300f4 -mem-write: 0x800055a2 <- 0xa62300b0 -mem-write: 0x800055a6 <- 0x71300f4 -mem-write: 0x800055aa <- 0xf06f0010 -mem-write: 0x800055ae <- 0x113cb5f -mem-write: 0x800055b2 <- 0x2223fd01 -mem-write: 0x800055b6 <- 0x2e230291 -mem-write: 0x800055ba <- 0x84930131 -mem-write: 0x800055be <- 0x59830005 -mem-write: 0x800055c2 <- 0x26230025 -mem-write: 0x800055c6 <- 0x24230211 -mem-write: 0x800055ca <- 0x20230281 -mem-write: 0x800055ce <- 0x2c230321 -mem-write: 0x800055d2 <- 0x9130141 -mem-write: 0x800055d6 <- 0x2a230006 -mem-write: 0x800055da <- 0x28230151 -mem-write: 0x800055de <- 0x26230161 -mem-write: 0x800055e2 <- 0x24230171 -mem-write: 0x800055e6 <- 0x22230181 -mem-write: 0x800055ea <- 0x20230191 -mem-write: 0x800055ee <- 0xa1301a1 -mem-write: 0x800055f2 <- 0xf0ef0005 -mem-write: 0x800055f6 <- 0xd403a35f -mem-write: 0x800055fa <- 0x7930024 -mem-write: 0x800055fe <- 0x85130005 -mem-write: 0x80005602 <- 0x89b30004 -mem-write: 0x80005606 <- 0xa9340f9 -mem-write: 0x8000560a <- 0xf0ef0349 -mem-write: 0x8000560e <- 0x433a1df -mem-write: 0x80005612 <- 0x71340a4 -mem-write: 0x80005616 <- 0x879304e9 -mem-write: 0x8000561a <- 0x8793000a -mem-write: 0x8000561e <- 0x9f230027 -mem-write: 0x80005622 <- 0x9ce3fe07 -mem-write: 0x80005626 <- 0x4a63fee7 -mem-write: 0x8000562a <- 0xb930934 -mem-write: 0x8000562e <- 0x8b13004a -mem-write: 0x80005632 <- 0x89930044 -mem-write: 0x80005636 <- 0xc93fff9 -mem-write: 0x8000563a <- 0x8c1301aa -mem-write: 0x8000563e <- 0x7130024 -mem-write: 0x80005642 <- 0x8793000b -mem-write: 0x80005646 <- 0xd603000b -mem-write: 0x8000564a <- 0x56830007 -mem-write: 0x8000564e <- 0x87930007 -mem-write: 0x80005652 <- 0x7130027 -mem-write: 0x80005656 <- 0x1a630027 -mem-write: 0x8000565a <- 0x96e30ad6 -mem-write: 0x8000565e <- 0x613ff97 -mem-write: 0x80005662 <- 0x8713018a -mem-write: 0x80005666 <- 0x6930184 -mem-write: 0x8000566a <- 0x57830000 -mem-write: 0x8000566e <- 0x55830007 -mem-write: 0x80005672 <- 0x7130006 -mem-write: 0x80005676 <- 0x87b3ffe7 -mem-write: 0x8000567a <- 0x87b340d7 -mem-write: 0x8000567e <- 0xd69340b7 -mem-write: 0x80005682 <- 0x11230107 -mem-write: 0x80005686 <- 0xf69300f7 -mem-write: 0x8000568a <- 0x6130016 -mem-write: 0x8000568e <- 0x1ee3ffe6 -mem-write: 0x80005692 <- 0xd13fcec -mem-write: 0x80005696 <- 0x85130010 -mem-write: 0x8000569a <- 0xf0ef000a -mem-write: 0x8000569e <- 0x5783b88f -mem-write: 0x800056a2 <- 0x41304c9 -mem-write: 0x800056a6 <- 0x8513fff4 -mem-write: 0x800056aa <- 0x6d330004 -mem-write: 0x800056ae <- 0x162300fd -mem-write: 0x800056b2 <- 0xf0ef05a9 -mem-write: 0x800056b6 <- 0x14e3b70f -mem-write: 0x800056ba <- 0x693f934 -mem-write: 0x800056be <- 0x24030004 -mem-write: 0x800056c2 <- 0x20830281 -mem-write: 0x800056c6 <- 0x298302c1 -mem-write: 0x800056ca <- 0x2a0301c1 -mem-write: 0x800056ce <- 0x2a830181 -mem-write: 0x800056d2 <- 0x2b030141 -mem-write: 0x800056d6 <- 0x2b830101 -mem-write: 0x800056da <- 0x2c0300c1 -mem-write: 0x800056de <- 0x2c830081 -mem-write: 0x800056e2 <- 0x2d030041 -mem-write: 0x800056e6 <- 0x7930001 -mem-write: 0x800056ea <- 0x85130009 -mem-write: 0x800056ee <- 0x29030004 -mem-write: 0x800056f2 <- 0x24830201 -mem-write: 0x800056f6 <- 0x7130241 -mem-write: 0x800056fa <- 0x6130000 -mem-write: 0x800056fe <- 0x5930000 -mem-write: 0x80005702 <- 0x1130000 -mem-write: 0x80005706 <- 0xf06f0301 -mem-write: 0x8000570a <- 0xd13a9df -mem-write: 0x8000570e <- 0xe4e30000 -mem-write: 0x80005712 <- 0xf06ff8c6 -mem-write: 0x80005716 <- 0x5703f4df -mem-write: 0x8000571a <- 0x57830005 -mem-write: 0x8000571e <- 0x6630025 -mem-write: 0x80005722 <- 0x87370007 -mem-write: 0x80005726 <- 0xe7b30000 -mem-write: 0x8000572a <- 0x992300e7 -mem-write: 0x8000572e <- 0x570300f5 -mem-write: 0x80005732 <- 0x87b70025 -mem-write: 0x80005736 <- 0x87930000 -mem-write: 0x8000573a <- 0x463fff7 -mem-write: 0x8000573e <- 0x79302f7 -mem-write: 0x80005742 <- 0x85930065 -mem-write: 0x80005746 <- 0x5130105 -mem-write: 0x8000574a <- 0xd7030185 -mem-write: 0x8000574e <- 0x87930007 -mem-write: 0x80005752 <- 0x85930027 -mem-write: 0x80005756 <- 0x9123ffe5 -mem-write: 0x8000575a <- 0x98e300e5 -mem-write: 0x8000575e <- 0x8067fea7 -mem-write: 0x80005762 <- 0x7930000 -mem-write: 0x80005766 <- 0x5130065 -mem-write: 0x8000576a <- 0xd70301a5 -mem-write: 0x8000576e <- 0x87930007 -mem-write: 0x80005772 <- 0x1a630027 -mem-write: 0x80005776 <- 0x9ae30207 -mem-write: 0x8000577a <- 0x8713fea7 -mem-write: 0x8000577e <- 0x87930125 -mem-write: 0x80005782 <- 0x87930005 -mem-write: 0x80005786 <- 0x9f230027 -mem-write: 0x8000578a <- 0x1ce3fe07 -mem-write: 0x8000578e <- 0xd783fef7 -mem-write: 0x80005792 <- 0x87370125 -mem-write: 0x80005796 <- 0x7130000 -mem-write: 0x8000579a <- 0xe7b3fff7 -mem-write: 0x8000579e <- 0x992300e7 -mem-write: 0x800057a2 <- 0x806700f5 -mem-write: 0x800057a6 <- 0x87130000 -mem-write: 0x800057aa <- 0x87930105 -mem-write: 0x800057ae <- 0x87930005 -mem-write: 0x800057b2 <- 0x9f230027 -mem-write: 0x800057b6 <- 0x1ce3fe07 -mem-write: 0x800057ba <- 0xc7b7fef7 -mem-write: 0x800057be <- 0xa8237fff -mem-write: 0x800057c2 <- 0x806700f5 -mem-write: 0x800057c6 <- 0x1130000 -mem-write: 0x800057ca <- 0x2823f701 -mem-write: 0x800057ce <- 0x5b030761 -mem-write: 0x800057d2 <- 0x87b70125 -mem-write: 0x800057d6 <- 0x87930000 -mem-write: 0x800057da <- 0x2c23fff7 -mem-write: 0x800057de <- 0xfa330741 -mem-write: 0x800057e2 <- 0x1a130167 -mem-write: 0x800057e6 <- 0x2423010a -mem-write: 0x800057ea <- 0x22230881 -mem-write: 0x800057ee <- 0x20230891 -mem-write: 0x800057f2 <- 0x2e230921 -mem-write: 0x800057f6 <- 0x26230731 -mem-write: 0x800057fa <- 0x2a230811 -VXDRV: upload 1024 bytes to 0x800057fe -mem-write: 0x800057fe <- 0x26230751 -mem-write: 0x80005802 <- 0x24230771 -mem-write: 0x80005806 <- 0x22230781 -mem-write: 0x8000580a <- 0x5a130791 -mem-write: 0x8000580e <- 0x493010a -mem-write: 0x80005812 <- 0x89130005 -mem-write: 0x80005816 <- 0x4130005 -mem-write: 0x8000581a <- 0x89930006 -mem-write: 0x8000581e <- 0x12630006 -mem-write: 0x80005822 <- 0xf0ef10fa -mem-write: 0x80005826 <- 0x1a63b08f -mem-write: 0x8000582a <- 0x5a832805 -mem-write: 0x8000582e <- 0x77b30129 -mem-write: 0x80005832 <- 0x8263015a -mem-write: 0x80005836 <- 0x85132b47 -mem-write: 0x8000583a <- 0xf0ef0004 -mem-write: 0x8000583e <- 0xe63db4f -mem-write: 0x80005842 <- 0x55b72e05 -mem-write: 0x80005846 <- 0x85938001 -mem-write: 0x8000584a <- 0x513c205 -mem-write: 0x8000584e <- 0xf0ef0009 -mem-write: 0x80005852 <- 0x663c84f -mem-write: 0x80005856 <- 0x5a833605 -mem-write: 0x8000585a <- 0x87b70129 -mem-write: 0x8000585e <- 0x87930000 -mem-write: 0x80005862 <- 0xfab3fff7 -mem-write: 0x80005866 <- 0x9a930157 -mem-write: 0x8000586a <- 0xda93010a -mem-write: 0x8000586e <- 0x9463010a -mem-write: 0x80005872 <- 0x5132cfa -mem-write: 0x80005876 <- 0xf0ef0009 -mem-write: 0x8000587a <- 0x1063d78f -mem-write: 0x8000587e <- 0xd7833205 -mem-write: 0x80005882 <- 0xf7b30124 -mem-write: 0x80005886 <- 0x986300fa -mem-write: 0x8000588a <- 0x85130b57 -mem-write: 0x8000588e <- 0xf0ef0004 -mem-write: 0x80005892 <- 0x1863d60f -mem-write: 0x80005896 <- 0x5130005 -mem-write: 0x8000589a <- 0xf0ef0009 -mem-write: 0x8000589e <- 0xc63d54f -mem-write: 0x800058a2 <- 0x85130805 -mem-write: 0x800058a6 <- 0xf0ef0004 -mem-write: 0x800058aa <- 0x493af4f -mem-write: 0x800058ae <- 0x5130005 -mem-write: 0x800058b2 <- 0xf0ef0009 -mem-write: 0x800058b6 <- 0x84b3ae8f -mem-write: 0x800058ba <- 0x34b340a4 -mem-write: 0x800058be <- 0x94930090 -mem-write: 0x800058c2 <- 0x192300f4 -mem-write: 0x800058c6 <- 0x7130094 -mem-write: 0x800058ca <- 0x7930124 -mem-write: 0x800058ce <- 0x87930004 -mem-write: 0x800058d2 <- 0x9f230027 -mem-write: 0x800058d6 <- 0x1ce3fe07 -mem-write: 0x800058da <- 0x5783fef7 -mem-write: 0x800058de <- 0x87370124 -mem-write: 0x800058e2 <- 0x7130000 -mem-write: 0x800058e6 <- 0xe7b3fff7 -mem-write: 0x800058ea <- 0x192300e7 -mem-write: 0x800058ee <- 0x208300f4 -mem-write: 0x800058f2 <- 0x240308c1 -mem-write: 0x800058f6 <- 0x24830881 -mem-write: 0x800058fa <- 0x29030841 -mem-write: 0x800058fe <- 0x29830801 -mem-write: 0x80005902 <- 0x2a0307c1 -mem-write: 0x80005906 <- 0x2a830781 -mem-write: 0x8000590a <- 0x2b030741 -mem-write: 0x8000590e <- 0x2b830701 -mem-write: 0x80005912 <- 0x2c0306c1 -mem-write: 0x80005916 <- 0x2c830681 -mem-write: 0x8000591a <- 0x1130641 -mem-write: 0x8000591e <- 0x80670901 -mem-write: 0x80005922 <- 0xda830000 -mem-write: 0x80005926 <- 0xf7330125 -mem-write: 0x8000592a <- 0x17130157 -mem-write: 0x8000592e <- 0x57130107 -mem-write: 0x80005932 <- 0xa630107 -mem-write: 0x80005936 <- 0x851304f7 -mem-write: 0x8000593a <- 0x5930004 -mem-write: 0x8000593e <- 0xf0ef00c1 -mem-write: 0x80005942 <- 0x513a9cf -mem-write: 0x80005946 <- 0x5930009 -mem-write: 0x8000594a <- 0xf0ef0281 -mem-write: 0x8000594e <- 0x5483a90f -mem-write: 0x80005952 <- 0x590300e1 -mem-write: 0x80005956 <- 0x9c6302a1 -mem-write: 0x8000595a <- 0x7930404 -mem-write: 0x8000595e <- 0x6930101 -mem-write: 0x80005962 <- 0x88630241 -mem-write: 0x80005966 <- 0xd70320d7 -mem-write: 0x8000596a <- 0x87930007 -mem-write: 0x8000596e <- 0xae30027 -mem-write: 0x80005972 <- 0x513fe07 -mem-write: 0x80005976 <- 0xf0ef00c1 -mem-write: 0x8000597a <- 0x5703eb0f -mem-write: 0x8000597e <- 0x4b302a1 -mem-write: 0x80005982 <- 0x6f40a0 -mem-write: 0x80005986 <- 0x85130300 -mem-write: 0x8000598a <- 0xf0ef0005 -mem-write: 0x8000598e <- 0x6e39a0f -mem-write: 0x80005992 <- 0x713ec05 -mem-write: 0x80005996 <- 0x57830149 -mem-write: 0x8000599a <- 0x9130009 -mem-write: 0x8000599e <- 0x4130029 -mem-write: 0x800059a2 <- 0x1f230024 -mem-write: 0x800059a6 <- 0x18e3fef4 -mem-write: 0x800059aa <- 0xf06ffee9 -mem-write: 0x800059ae <- 0x713f45f -mem-write: 0x800059b2 <- 0xa930009 -mem-write: 0x800059b6 <- 0x7930009 -mem-write: 0x800059ba <- 0x69302c1 -mem-write: 0x800059be <- 0x12630401 -mem-write: 0x800059c2 <- 0x82630207 -mem-write: 0x800059c6 <- 0xd7031cf6 -mem-write: 0x800059ca <- 0x87930007 -mem-write: 0x800059ce <- 0xae30027 -mem-write: 0x800059d2 <- 0x513fe07 -mem-write: 0x800059d6 <- 0xf0ef0281 -mem-write: 0x800059da <- 0x5703e50f -mem-write: 0x800059de <- 0xab302a1 -mem-write: 0x800059e2 <- 0x578340a9 -mem-write: 0x800059e6 <- 0x8c130281 -mem-write: 0x800059ea <- 0x9b230389 -mem-write: 0x800059ee <- 0x9a2302e9 -mem-write: 0x800059f2 <- 0x871302f9 -mem-write: 0x800059f6 <- 0x79304e9 -mem-write: 0x800059fa <- 0x9023000c -mem-write: 0x800059fe <- 0x87930007 -mem-write: 0x80005a02 <- 0x1ce30027 -mem-write: 0x80005a06 <- 0x8a13fef7 -mem-write: 0x80005a0a <- 0xb9304c9 -mem-write: 0x80005a0e <- 0x9130000 -mem-write: 0x80005a12 <- 0xc930241 -mem-write: 0x80005a16 <- 0xb130101 -mem-write: 0x80005a1a <- 0x55030461 -mem-write: 0x80005a1e <- 0x9130009 -mem-write: 0x80005a22 <- 0x1863ffe9 -mem-write: 0x80005a26 <- 0xd7030c05 -mem-write: 0x80005a2a <- 0x79304c9 -mem-write: 0x80005a2e <- 0xebb3000a -mem-write: 0x80005a32 <- 0xd70300eb -mem-write: 0x80005a36 <- 0x8793ffe7 -mem-write: 0x80005a3a <- 0x9123ffe7 -mem-write: 0x80005a3e <- 0x9ae300e7 -mem-write: 0x80005a42 <- 0x9c23ff87 -mem-write: 0x80005a46 <- 0x1ae30209 -mem-write: 0x80005a4a <- 0x8713fd99 -mem-write: 0x80005a4e <- 0x7930349 -mem-write: 0x80005a52 <- 0x5930281 -mem-write: 0x80005a56 <- 0x56030421 -mem-write: 0x80005a5a <- 0x87930007 -mem-write: 0x80005a5e <- 0x7130027 -mem-write: 0x80005a62 <- 0x9f230027 -mem-write: 0x80005a66 <- 0x98e3fec7 -mem-write: 0x80005a6a <- 0xc6b7fef5 -mem-write: 0x80005a6e <- 0x84b3ffff -mem-write: 0x80005a72 <- 0x86930154 -mem-write: 0x80005a76 <- 0x85930026 -mem-write: 0x80005a7a <- 0x513000b -mem-write: 0x80005a7e <- 0x87930281 -mem-write: 0x80005a82 <- 0x7130009 -mem-write: 0x80005a86 <- 0x86b30400 -mem-write: 0x80005a8a <- 0x61300d4 -mem-write: 0x80005a8e <- 0xf0ef0000 -mem-write: 0x80005a92 <- 0x5703f14f -mem-write: 0x80005a96 <- 0x57830281 -mem-write: 0x80005a9a <- 0x59300c1 -mem-write: 0x80005a9e <- 0x5130004 -mem-write: 0x80005aa2 <- 0x87b30281 -mem-write: 0x80005aa6 <- 0x37b340e7 -mem-write: 0x80005aaa <- 0x7b300f0 -mem-write: 0x80005aae <- 0x142340f0 -mem-write: 0x80005ab2 <- 0xf0ef02f1 -mem-write: 0x80005ab6 <- 0xf06fc65f -mem-write: 0x80005aba <- 0x8713e39f -mem-write: 0x80005abe <- 0xd7830144 -mem-write: 0x80005ac2 <- 0x84930004 -mem-write: 0x80005ac6 <- 0x4130024 -mem-write: 0x80005aca <- 0x1f230024 -mem-write: 0x80005ace <- 0x98e3fef4 -mem-write: 0x80005ad2 <- 0xf06ffee4 -mem-write: 0x80005ad6 <- 0x513e1df -mem-write: 0x80005ada <- 0xf0ef0009 -mem-write: 0x80005ade <- 0x1ae3850f -mem-write: 0x80005ae2 <- 0x8513ea05 -mem-write: 0x80005ae6 <- 0xf0ef0004 -mem-write: 0x80005aea <- 0x8e3b08f -mem-write: 0x80005aee <- 0xf06fd605 -mem-write: 0x80005af2 <- 0x613d55f -mem-write: 0x80005af6 <- 0x5930441 -mem-write: 0x80005afa <- 0xe0ef0281 -mem-write: 0x80005afe <- 0x593f99f -mem-write: 0x80005b02 <- 0x613000a -mem-write: 0x80005b06 <- 0x7130000 -mem-write: 0x80005b0a <- 0xd80305c1 -mem-write: 0x80005b0e <- 0x57830005 -mem-write: 0x80005b12 <- 0x85930007 -mem-write: 0x80005b16 <- 0x713ffe5 -mem-write: 0x80005b1a <- 0x87b3ffe7 -mem-write: 0x80005b1e <- 0x87b30107 -mem-write: 0x80005b22 <- 0xd61300c7 -mem-write: 0x80005b26 <- 0x91230107 -mem-write: 0x80005b2a <- 0x761300f5 -mem-write: 0x80005b2e <- 0x1ee30016 -mem-write: 0x80005b32 <- 0xf06ffd67 -mem-write: 0x80005b36 <- 0xdb03ef5f -mem-write: 0x80005b3a <- 0x87b70124 -mem-write: 0x80005b3e <- 0x87930000 -mem-write: 0x80005b42 <- 0xfb33fff7 -mem-write: 0x80005b46 <- 0x1b130167 -mem-write: 0x80005b4a <- 0x5b13010b -mem-write: 0x80005b4e <- 0x14e3010b -mem-write: 0x80005b52 <- 0x8513defb -mem-write: 0x80005b56 <- 0xf0ef0004 -mem-write: 0x80005b5a <- 0x14e3a98f -mem-write: 0x80005b5e <- 0x5783d405 -mem-write: 0x80005b62 <- 0xc7930129 -mem-write: 0x80005b66 <- 0x9713fff7 -mem-write: 0x80005b6a <- 0x16e30117 -mem-write: 0x80005b6e <- 0xf06fdc07 -mem-write: 0x80005b72 <- 0x793d29f -mem-write: 0x80005b76 <- 0x4130144 -mem-write: 0x80005b7a <- 0x1f230024 -mem-write: 0x80005b7e <- 0x9ce3fe04 -mem-write: 0x80005b82 <- 0xf06ffe87 -mem-write: 0x80005b86 <- 0x793d6df -mem-write: 0x80005b8a <- 0x4130144 -mem-write: 0x80005b8e <- 0x1f230024 -mem-write: 0x80005b92 <- 0x1ce3fe04 -mem-write: 0x80005b96 <- 0xf06ffef4 -mem-write: 0x80005b9a <- 0x55b7d59f -mem-write: 0x80005b9e <- 0x85938001 -mem-write: 0x80005ba2 <- 0x8513c205 -mem-write: 0x80005ba6 <- 0xf0ef0004 -mem-write: 0x80005baa <- 0xa6392cf -mem-write: 0x80005bae <- 0xd7830005 -mem-write: 0x80005bb2 <- 0xf7b30124 -mem-write: 0x80005bb6 <- 0x8ee300fa -mem-write: 0x80005bba <- 0xf06ff957 -mem-write: 0x80005bbe <- 0x713fa5f -mem-write: 0x80005bc2 <- 0x7930104 -mem-write: 0x80005bc6 <- 0x87930004 -mem-write: 0x80005bca <- 0x9f230027 -mem-write: 0x80005bce <- 0x9ce3fe07 -mem-write: 0x80005bd2 <- 0xc7b7fee7 -mem-write: 0x80005bd6 <- 0x28237fff -mem-write: 0x80005bda <- 0xf06f00f4 -mem-write: 0x80005bde <- 0x5783d15f -mem-write: 0x80005be2 <- 0x1130125 -mem-write: 0x80005be6 <- 0x2423f501 -mem-write: 0x80005bea <- 0xc7930a81 -mem-write: 0x80005bee <- 0x2223fff7 -mem-write: 0x80005bf2 <- 0x20230a91 -mem-write: 0x80005bf6 <- 0x2e230b21 -mem-write: 0x80005bfa <- 0x26230931 -VXDRV: upload 1023 bytes to 0x80005bfe -mem-write: 0x80005bfe <- 0x2c230a11 -mem-write: 0x80005c02 <- 0x2a230941 -mem-write: 0x80005c06 <- 0x28230951 -mem-write: 0x80005c0a <- 0x26230961 -mem-write: 0x80005c0e <- 0x24230971 -mem-write: 0x80005c12 <- 0x22230981 -mem-write: 0x80005c16 <- 0x20230991 -mem-write: 0x80005c1a <- 0x2e2309a1 -mem-write: 0x80005c1e <- 0x971307b1 -mem-write: 0x80005c22 <- 0x9130117 -mem-write: 0x80005c26 <- 0x89930005 -mem-write: 0x80005c2a <- 0x4130005 -mem-write: 0x80005c2e <- 0x84930006 -mem-write: 0x80005c32 <- 0x16630006 -mem-write: 0x80005c36 <- 0xe0ef0007 -mem-write: 0x80005c3a <- 0x1863ef5f -mem-write: 0x80005c3e <- 0xd7833805 -mem-write: 0x80005c42 <- 0xc7930129 -mem-write: 0x80005c46 <- 0x9713fff7 -mem-write: 0x80005c4a <- 0xe630117 -mem-write: 0x80005c4e <- 0x5a370807 -mem-write: 0x80005c52 <- 0x5938001 -mem-write: 0x80005c56 <- 0x513c20a -mem-write: 0x80005c5a <- 0xf0ef0009 -mem-write: 0x80005c5e <- 0x463878f -mem-write: 0x80005c62 <- 0x5a031005 -mem-write: 0x80005c66 <- 0xd7030129 -mem-write: 0x80005c6a <- 0x87b70129 -mem-write: 0x80005c6e <- 0x87930000 -mem-write: 0x80005c72 <- 0xfa33fff7 -mem-write: 0x80005c76 <- 0xfab30147 -mem-write: 0x80005c7a <- 0x1a6300e7 -mem-write: 0x80005c7e <- 0x51308fa -mem-write: 0x80005c82 <- 0xf0ef0009 -mem-write: 0x80005c86 <- 0x86396cf -mem-write: 0x80005c8a <- 0x98631005 -mem-write: 0x80005c8e <- 0x8513014a -mem-write: 0x80005c92 <- 0xf0ef0009 -mem-write: 0x80005c96 <- 0x106395cf -mem-write: 0x80005c9a <- 0x7930e05 -mem-write: 0x80005c9e <- 0x4130144 -mem-write: 0x80005ca2 <- 0x1f230024 -mem-write: 0x80005ca6 <- 0x1ce3fe04 -mem-write: 0x80005caa <- 0x2083fef4 -mem-write: 0x80005cae <- 0x24030ac1 -mem-write: 0x80005cb2 <- 0x24830a81 -mem-write: 0x80005cb6 <- 0x29030a41 -mem-write: 0x80005cba <- 0x29830a01 -mem-write: 0x80005cbe <- 0x2a0309c1 -mem-write: 0x80005cc2 <- 0x2a830981 -mem-write: 0x80005cc6 <- 0x2b030941 -mem-write: 0x80005cca <- 0x2b830901 -mem-write: 0x80005cce <- 0x2c0308c1 -mem-write: 0x80005cd2 <- 0x2c830881 -mem-write: 0x80005cd6 <- 0x2d030841 -mem-write: 0x80005cda <- 0x2d830801 -mem-write: 0x80005cde <- 0x11307c1 -mem-write: 0x80005ce2 <- 0x80670b01 -mem-write: 0x80005ce6 <- 0x85130000 -mem-write: 0x80005cea <- 0xe0ef0009 -mem-write: 0x80005cee <- 0xe3e41f -mem-write: 0x80005cf2 <- 0x8713f605 -mem-write: 0x80005cf6 <- 0xd7830149 -mem-write: 0x80005cfa <- 0x89930009 -mem-write: 0x80005cfe <- 0x4130029 -mem-write: 0x80005d02 <- 0x1f230024 -mem-write: 0x80005d06 <- 0x98e3fef4 -mem-write: 0x80005d0a <- 0xf06ffee9 -mem-write: 0x80005d0e <- 0x8663fa1f -mem-write: 0x80005d12 <- 0x51308fa -mem-write: 0x80005d16 <- 0x5930009 -mem-write: 0x80005d1a <- 0xe0ef01c1 -mem-write: 0x80005d1e <- 0x593ec1f -mem-write: 0x80005d22 <- 0x85130381 -mem-write: 0x80005d26 <- 0xe0ef0009 -mem-write: 0x80005d2a <- 0x5b83eb5f -mem-write: 0x80005d2e <- 0x590303a1 -mem-write: 0x80005d32 <- 0x926301e1 -mem-write: 0x80005d36 <- 0x7930c0b -mem-write: 0x80005d3a <- 0xd9303c1 -mem-write: 0x80005d3e <- 0x8e630501 -mem-write: 0x80005d42 <- 0xd70334fd -mem-write: 0x80005d46 <- 0x87930007 -mem-write: 0x80005d4a <- 0xae30027 -mem-write: 0x80005d4e <- 0x513fe07 -mem-write: 0x80005d52 <- 0xf0ef0381 -mem-write: 0x80005d56 <- 0x7b3ad4f -mem-write: 0x80005d5a <- 0x560340a0 -mem-write: 0x80005d5e <- 0x262301e1 -mem-write: 0x80005d62 <- 0x6f00f1 -mem-write: 0x80005d66 <- 0x59309c0 -mem-write: 0x80005d6a <- 0x8513c20a -mem-write: 0x80005d6e <- 0xe0ef0009 -mem-write: 0x80005d72 <- 0x18e3f65f -mem-write: 0x80005d76 <- 0x713ee05 -mem-write: 0x80005d7a <- 0x7930104 -mem-write: 0x80005d7e <- 0x87930004 -mem-write: 0x80005d82 <- 0x9f230027 -mem-write: 0x80005d86 <- 0x9ce3fe07 -mem-write: 0x80005d8a <- 0xc7b7fee7 -mem-write: 0x80005d8e <- 0x28237fff -mem-write: 0x80005d92 <- 0xf06f00f4 -mem-write: 0x80005d96 <- 0x9ee3f19f -mem-write: 0x80005d9a <- 0x8513f74a -mem-write: 0x80005d9e <- 0xf0ef0009 -mem-write: 0x80005da2 <- 0x8e3850f -mem-write: 0x80005da6 <- 0x513f605 -mem-write: 0x80005daa <- 0xe0ef0009 -mem-write: 0x80005dae <- 0x493df1f -mem-write: 0x80005db2 <- 0x85130005 -mem-write: 0x80005db6 <- 0xe0ef0009 -mem-write: 0x80005dba <- 0x87b3de5f -mem-write: 0x80005dbe <- 0x37b340a4 -mem-write: 0x80005dc2 <- 0x979300f0 -mem-write: 0x80005dc6 <- 0x192300f7 -mem-write: 0x80005dca <- 0x71300f4 -mem-write: 0x80005dce <- 0x7930124 -mem-write: 0x80005dd2 <- 0x87930004 -mem-write: 0x80005dd6 <- 0x9f230027 -mem-write: 0x80005dda <- 0x9ce3fe07 -mem-write: 0x80005dde <- 0x5783fee7 -mem-write: 0x80005de2 <- 0x87370124 -mem-write: 0x80005de6 <- 0x7130000 -mem-write: 0x80005dea <- 0xe7b3fff7 -mem-write: 0x80005dee <- 0x192300e7 -mem-write: 0x80005df2 <- 0xf06f00f4 -mem-write: 0x80005df6 <- 0x2623eb9f -mem-write: 0x80005dfa <- 0x6130171 -mem-write: 0x80005dfe <- 0x24230009 -mem-write: 0x80005e02 <- 0x7930121 -mem-write: 0x80005e06 <- 0x6930201 -mem-write: 0x80005e0a <- 0x12630341 -mem-write: 0x80005e0e <- 0x80630206 -mem-write: 0x80005e12 <- 0xd7032af6 -mem-write: 0x80005e16 <- 0x87930007 -mem-write: 0x80005e1a <- 0xae30027 -mem-write: 0x80005e1e <- 0x513fe07 -mem-write: 0x80005e22 <- 0xf0ef01c1 -mem-write: 0x80005e26 <- 0x7b3a04f -mem-write: 0x80005e2a <- 0x242340a9 -mem-write: 0x80005e2e <- 0x270300f1 -mem-write: 0x80005e32 <- 0x8d130381 -mem-write: 0x80005e36 <- 0x7930384 -mem-write: 0x80005e3a <- 0xaa23000d -mem-write: 0x80005e3e <- 0x891302e4 -mem-write: 0x80005e42 <- 0x879304e4 -mem-write: 0x80005e46 <- 0x9f230027 -mem-write: 0x80005e4a <- 0x1ce3fe07 -mem-write: 0x80005e4e <- 0x513fef9 -mem-write: 0x80005e52 <- 0xe0ef0381 -mem-write: 0x80005e56 <- 0x5c03b69f -mem-write: 0x80005e5a <- 0xa370221 -mem-write: 0x80005e5e <- 0xd930001 -mem-write: 0x80005e62 <- 0x1a930501 -mem-write: 0x80005e66 <- 0x8ab3010c -mem-write: 0x80005e6a <- 0xb13418a -mem-write: 0x80005e6e <- 0xa1303a1 -mem-write: 0x80005e72 <- 0xc93fffa -mem-write: 0x80005e76 <- 0x99306e1 -mem-write: 0x80005e7a <- 0x57830561 -mem-write: 0x80005e7e <- 0x570303c1 -mem-write: 0x80005e82 <- 0xb9303e1 -mem-write: 0x80005e86 <- 0x9793000a -mem-write: 0x80005e8a <- 0x87b30107 -mem-write: 0x80005e8e <- 0xe86300e7 -mem-write: 0x80005e92 <- 0xd7b300fa -mem-write: 0x80005e96 <- 0x9b930387 -mem-write: 0x80005e9a <- 0xdb930107 -mem-write: 0x80005e9e <- 0x613010b -mem-write: 0x80005ea2 <- 0x5930541 -mem-write: 0x80005ea6 <- 0x851301c1 -mem-write: 0x80005eaa <- 0xe0ef000b -mem-write: 0x80005eae <- 0x713be9f -mem-write: 0x80005eb2 <- 0x79303c1 -mem-write: 0x80005eb6 <- 0xd5830581 -mem-write: 0x80005eba <- 0x56030007 -mem-write: 0x80005ebe <- 0x87930007 -mem-write: 0x80005ec2 <- 0x7130027 -mem-write: 0x80005ec6 <- 0x90630027 -mem-write: 0x80005eca <- 0x96e312c5 -mem-write: 0x80005ece <- 0x793ff97 -mem-write: 0x80005ed2 <- 0x5930000 -mem-write: 0x80005ed6 <- 0x861306c1 -mem-write: 0x80005eda <- 0x5703000d -mem-write: 0x80005ede <- 0xd8030006 -mem-write: 0x80005ee2 <- 0x6130005 -mem-write: 0x80005ee6 <- 0x733ffe6 -mem-write: 0x80005eea <- 0x73340f7 -mem-write: 0x80005eee <- 0x57934107 -mem-write: 0x80005ef2 <- 0x11230107 -mem-write: 0x80005ef6 <- 0xf79300e6 -mem-write: 0x80005efa <- 0x85930017 -mem-write: 0x80005efe <- 0x1ee3ffe5 -mem-write: 0x80005f02 <- 0x1023fd66 -mem-write: 0x80005f06 <- 0x793017d -mem-write: 0x80005f0a <- 0xd70303c1 -mem-write: 0x80005f0e <- 0x87930027 -mem-write: 0x80005f12 <- 0x9f230027 -mem-write: 0x80005f16 <- 0x9ae3fee7 -mem-write: 0x80005f1a <- 0x1823ffb7 -mem-write: 0x80005f1e <- 0xd130401 -mem-write: 0x80005f22 <- 0x1ce3002d -mem-write: 0x80005f26 <- 0x593f5a9 -mem-write: 0x80005f2a <- 0x7930000 -mem-write: 0x80005f2e <- 0x69303c1 -mem-write: 0x80005f32 <- 0xd7030521 -mem-write: 0x80005f36 <- 0x87930007 -mem-write: 0x80005f3a <- 0xe5b30027 -mem-write: 0x80005f3e <- 0x9ae300e5 -mem-write: 0x80005f42 <- 0x9793fed7 -mem-write: 0x80005f46 <- 0xd7930105 -mem-write: 0x80005f4a <- 0x84634107 -mem-write: 0x80005f4e <- 0x5930007 -mem-write: 0x80005f52 <- 0x95930010 -mem-write: 0x80005f56 <- 0xd5930105 -mem-write: 0x80005f5a <- 0x87130105 -mem-write: 0x80005f5e <- 0x7930344 -mem-write: 0x80005f62 <- 0x56030381 -mem-write: 0x80005f66 <- 0x87930007 -mem-write: 0x80005f6a <- 0x7130027 -mem-write: 0x80005f6e <- 0x9f230027 -mem-write: 0x80005f72 <- 0x98e3fec7 -mem-write: 0x80005f76 <- 0x2783fef6 -mem-write: 0x80005f7a <- 0x270300c1 -mem-write: 0x80005f7e <- 0x46b70081 -mem-write: 0x80005f82 <- 0x86930000 -mem-write: 0x80005f86 <- 0x8bb3fff6 -mem-write: 0x80005f8a <- 0x51340e7 -mem-write: 0x80005f8e <- 0x87930381 -mem-write: 0x80005f92 <- 0x7130004 -mem-write: 0x80005f96 <- 0x86b30400 -mem-write: 0x80005f9a <- 0x61300db -mem-write: 0x80005f9e <- 0xf0ef0000 -mem-write: 0x80005fa2 <- 0x5703a04f -mem-write: 0x80005fa6 <- 0x57830381 -mem-write: 0x80005faa <- 0x59301c1 -mem-write: 0x80005fae <- 0x5130004 -mem-write: 0x80005fb2 <- 0x87b30381 -mem-write: 0x80005fb6 <- 0x37b340e7 -mem-write: 0x80005fba <- 0x7b300f0 -mem-write: 0x80005fbe <- 0x1c2340f0 -mem-write: 0x80005fc2 <- 0xf0ef02f1 -mem-write: 0x80005fc6 <- 0xf06ff54f -mem-write: 0x80005fca <- 0x713ce5f -mem-write: 0x80005fce <- 0x57830149 -mem-write: 0x80005fd2 <- 0x9130009 -mem-write: 0x80005fd6 <- 0x4130029 -mem-write: 0x80005fda <- 0x1f230024 -mem-write: 0x80005fde <- 0x18e3fef4 -mem-write: 0x80005fe2 <- 0xf06ffee9 -mem-write: 0x80005fe6 <- 0x74e3cc9f -mem-write: 0x80005fea <- 0x8793eeb6 -mem-write: 0x80005fee <- 0x9893fffb -mem-write: 0x80005ff2 <- 0xd8930107 -mem-write: 0x80005ff6 <- 0x7930108 -mem-write: 0x80005ffa <- 0x26930000 -VXDRV: upload 1024 bytes to 0x80005ffd -mem-write: 0x80005ffd <- 0x13034105 -mem-write: 0x80006001 <- 0x306c106 -mem-write: 0x80006005 <- 0x3000657 -mem-write: 0x80006009 <- 0x130005d8 -mem-write: 0x8000600d <- 0x33ffe606 -mem-write: 0x80006011 <- 0x3340f707 -mem-write: 0x80006015 <- 0x93410707 -mem-write: 0x80006019 <- 0x23010757 -mem-write: 0x8000601d <- 0x9300e611 -mem-write: 0x80006021 <- 0x930017f7 -mem-write: 0x80006025 <- 0xe3ffe585 -mem-write: 0x80006029 <- 0x13fd361e -mem-write: 0x8000602d <- 0x9303c107 -mem-write: 0x80006031 <- 0x83058107 -mem-write: 0x80006035 <- 0x30007d5 -mem-write: 0x80006039 <- 0x93000756 -mem-write: 0x8000603d <- 0x13002787 -mem-write: 0x80006041 <- 0x63002707 -mem-write: 0x80006045 <- 0xe300c598 -mem-write: 0x80006049 <- 0x93ff9796 -mem-write: 0x8000604d <- 0x6f00088b -mem-write: 0x80006051 <- 0xe3e81ff0 -mem-write: 0x80006055 <- 0x93feb67c -mem-write: 0x80006059 <- 0x93ffeb87 -mem-write: 0x8000605d <- 0x9301079b -mem-write: 0x80006061 <- 0x13010bdb -mem-write: 0x80006065 <- 0x93000006 -mem-write: 0x80006069 <- 0x13034105 -mem-write: 0x8000606d <- 0x8306c107 -mem-write: 0x80006071 <- 0x3000757 -mem-write: 0x80006075 <- 0x130005d8 -mem-write: 0x80006079 <- 0xb3ffe707 -mem-write: 0x8000607d <- 0xb340c787 -mem-write: 0x80006081 <- 0x13410787 -mem-write: 0x80006085 <- 0x230107d6 -mem-write: 0x80006089 <- 0x1300f711 -mem-write: 0x8000608d <- 0x93001676 -mem-write: 0x80006091 <- 0xe3ffe585 -mem-write: 0x80006095 <- 0x6ffd371e -mem-write: 0x80006099 <- 0x93e39ff0 -mem-write: 0x8000609d <- 0x13014407 -mem-write: 0x800060a1 <- 0x23002404 -mem-write: 0x800060a5 <- 0xe3fe041f -mem-write: 0x800060a9 <- 0x6ffe879c -mem-write: 0x800060ad <- 0x3c01ff0 -mem-write: 0x800060b1 <- 0x8301c157 -mem-write: 0x800060b5 <- 0x63038157 -mem-write: 0x800060b9 <- 0x3700f704 -mem-write: 0x800060bd <- 0x23000086 -mem-write: 0x800060c1 <- 0x1300c419 -mem-write: 0x800060c5 <- 0x93012407 -mem-write: 0x800060c9 <- 0x93000407 -mem-write: 0x800060cd <- 0x23002787 -mem-write: 0x800060d1 <- 0xe3fe079f -mem-write: 0x800060d5 <- 0x83fef71c -mem-write: 0x800060d9 <- 0x37012457 -mem-write: 0x800060dd <- 0x13000087 -mem-write: 0x800060e1 <- 0xb3fff707 -mem-write: 0x800060e5 <- 0x2300e7e7 -mem-write: 0x800060e9 <- 0x6f00f419 -mem-write: 0x800060ed <- 0x13bc1ff0 -mem-write: 0x800060f1 <- 0x23fd0101 -mem-write: 0x800060f5 <- 0x23028124 -mem-write: 0x800060f9 <- 0x13021126 -mem-write: 0x800060fd <- 0x93000584 -mem-write: 0x80006101 <- 0x13004107 -mem-write: 0x80006105 <- 0x9301e107 -mem-write: 0x80006109 <- 0x23002787 -mem-write: 0x8000610d <- 0xe3fe079f -mem-write: 0x80006111 <- 0x3fee79c -mem-write: 0x80006115 <- 0x9300e556 -mem-write: 0x80006119 <- 0x93010617 -mem-write: 0x8000611d <- 0x634107d7 -mem-write: 0x80006121 <- 0xb70607ca -mem-write: 0x80006125 <- 0x93000087 -mem-write: 0x80006129 <- 0x23fff787 -mem-write: 0x8000612d <- 0x33000112 -mem-write: 0x80006131 <- 0x6300f676 -mem-write: 0x80006135 <- 0x9306f60c -mem-write: 0x80006139 <- 0x2300e507 -mem-write: 0x8000613d <- 0x1300c113 -mem-write: 0x80006141 <- 0x8300a107 -mem-write: 0x80006145 <- 0x93ffe7d6 -mem-write: 0x80006149 <- 0x13ffe787 -mem-write: 0x8000614d <- 0x23002707 -mem-write: 0x80006151 <- 0xe3fed71f -mem-write: 0x80006155 <- 0x63fef518 -mem-write: 0x80006159 <- 0x23020612 -mem-write: 0x8000615d <- 0x93000114 -mem-write: 0x80006161 <- 0x13000405 -mem-write: 0x80006165 <- 0xef004105 -mem-write: 0x80006169 <- 0x83db0ff0 -mem-write: 0x8000616d <- 0x302c120 -mem-write: 0x80006171 <- 0x13028124 -mem-write: 0x80006175 <- 0x67030101 -mem-write: 0x80006179 <- 0x93000080 -mem-write: 0x8000617d <- 0x93001007 -mem-write: 0x80006181 <- 0x13fff005 -mem-write: 0x80006185 <- 0x23004105 -mem-write: 0x80006189 <- 0xef00f114 -mem-write: 0x8000618d <- 0x6fc81fe0 -mem-write: 0x80006191 <- 0x93fd1ff0 -mem-write: 0x80006195 <- 0x23fff007 -mem-write: 0x80006199 <- 0xb700f112 -mem-write: 0x8000619d <- 0x93000087 -mem-write: 0x800061a1 <- 0x33fff787 -mem-write: 0x800061a5 <- 0xe300f676 -mem-write: 0x800061a9 <- 0x93f8f618 -mem-write: 0x800061ad <- 0x93000507 -mem-write: 0x800061b1 <- 0x300e506 -mem-write: 0x800061b5 <- 0x930007d7 -mem-write: 0x800061b9 <- 0x63002787 -mem-write: 0x800061bd <- 0xe304071c -mem-write: 0x800061c1 <- 0x13fed79a -mem-write: 0x800061c5 <- 0x93014407 -mem-write: 0x800061c9 <- 0x93000407 -mem-write: 0x800061cd <- 0x23002787 -mem-write: 0x800061d1 <- 0xe3fe079f -mem-write: 0x800061d5 <- 0x13fef71c -mem-write: 0x800061d9 <- 0x93012407 -mem-write: 0x800061dd <- 0x93000407 -mem-write: 0x800061e1 <- 0x23002787 -mem-write: 0x800061e5 <- 0xe3fe079f -mem-write: 0x800061e9 <- 0x83fef71c -mem-write: 0x800061ed <- 0x37012457 -mem-write: 0x800061f1 <- 0x13000087 -mem-write: 0x800061f5 <- 0xb3fff707 -mem-write: 0x800061f9 <- 0x2300e7e7 -mem-write: 0x800061fd <- 0x8300f419 -mem-write: 0x80006201 <- 0xe300e517 -mem-write: 0x80006205 <- 0x13f607d4 -mem-write: 0x80006209 <- 0xef000405 -mem-write: 0x8000620d <- 0x6f945fe0 -mem-write: 0x80006211 <- 0x13f5dff0 -mem-write: 0x80006215 <- 0x93010407 -mem-write: 0x80006219 <- 0x93000407 -mem-write: 0x8000621d <- 0x23002787 -mem-write: 0x80006221 <- 0xe3fe079f -mem-write: 0x80006225 <- 0xb7fef71c -mem-write: 0x80006229 <- 0x237fffc7 -mem-write: 0x8000622d <- 0x6f00f428 -mem-write: 0x80006231 <- 0x83f3dff0 -mem-write: 0x80006235 <- 0x1300c5a8 -mem-write: 0x80006239 <- 0x83e10101 -mem-write: 0x8000623d <- 0x30005ae -mem-write: 0x80006241 <- 0x30045ae -mem-write: 0x80006245 <- 0x230085a3 -mem-write: 0x80006249 <- 0x8303112e -mem-write: 0x8000624d <- 0x93040525 -mem-write: 0x80006251 <- 0x23fff008 -mem-write: 0x80006255 <- 0x93171120 -mem-write: 0x80006259 <- 0x23090008 -mem-write: 0x8000625d <- 0x231e8124 -mem-write: 0x80006261 <- 0x231d412c -mem-write: 0x80006265 <- 0x231e1126 -mem-write: 0x80006269 <- 0x231e9122 -mem-write: 0x8000626d <- 0x231f2120 -mem-write: 0x80006271 <- 0x231d312e -mem-write: 0x80006275 <- 0x231d512a -mem-write: 0x80006279 <- 0x231d6128 -mem-write: 0x8000627d <- 0x231d7126 -mem-write: 0x80006281 <- 0x231d8124 -mem-write: 0x80006285 <- 0x231d9122 -mem-write: 0x80006289 <- 0x231da120 -mem-write: 0x8000628d <- 0x231bb12e -mem-write: 0x80006291 <- 0x2303d128 -mem-write: 0x80006295 <- 0x2303c12a -mem-write: 0x80006299 <- 0x2302612c -mem-write: 0x8000629d <- 0x23171122 -mem-write: 0x800062a1 <- 0x2300c120 -mem-write: 0x800062a5 <- 0x2300d124 -mem-write: 0x800062a9 <- 0x2300e126 -mem-write: 0x800062ad <- 0x1301012c -mem-write: 0x800062b1 <- 0x1300050a -mem-write: 0x800062b5 <- 0x63000784 -mem-write: 0x800062b9 <- 0x3020580 -mem-write: 0x800062bd <- 0x93044527 -mem-write: 0x800062c1 <- 0xb3001007 -mem-write: 0x800062c5 <- 0x2300e797 -mem-write: 0x800062c9 <- 0x2300e5a2 -mem-write: 0x800062cd <- 0xef00f5a4 -mem-write: 0x800062d1 <- 0x23585010 -mem-write: 0x800062d5 <- 0x93040a20 -mem-write: 0x800062d9 <- 0x93060109 -mem-write: 0x800062dd <- 0x13000985 -mem-write: 0x800062e1 <- 0xef030105 -mem-write: 0x800062e5 <- 0x13e0dff0 -mem-write: 0x800062e9 <- 0xef000985 -mem-write: 0x800062ed <- 0x38b1fe0 -mem-write: 0x800062f1 <- 0x33000127 -mem-write: 0x800062f5 <- 0x2300a035 -mem-write: 0x800062f9 <- 0x9300a420 -mem-write: 0x800062fd <- 0xe3003007 -mem-write: 0x80006301 <- 0x9314f702 -mem-write: 0x80006305 <- 0x23014007 -mem-write: 0x80006309 <- 0xe300f122 -mem-write: 0x8000630d <- 0x835e0718 -mem-write: 0x80006311 <- 0x3072157 -mem-write: 0x80006315 <- 0x93164127 -mem-write: 0x80006319 <- 0x23fff7c7 -mem-write: 0x8000631d <- 0x1300e12a -mem-write: 0x80006321 <- 0x63011797 -mem-write: 0x80006325 <- 0x13000718 -mem-write: 0x80006329 <- 0xef000985 -mem-write: 0x8000632d <- 0xe3801fe0 -mem-write: 0x80006331 <- 0x93400514 -mem-write: 0x80006335 <- 0x23090007 -mem-write: 0x80006339 <- 0x1316f122 -mem-write: 0x8000633d <- 0x9307c107 -mem-write: 0x80006341 <- 0x13000987 -mem-write: 0x80006345 <- 0x83074106 -mem-write: 0x80006349 <- 0x930007d6 -mem-write: 0x8000634d <- 0x13002787 -mem-write: 0x80006351 <- 0x23002707 -mem-write: 0x80006355 <- 0xe3fed71f -mem-write: 0x80006359 <- 0x3fec798 -mem-write: 0x8000635d <- 0x2308e156 -mem-write: 0x80006361 <- 0x93000128 -mem-write: 0x80006365 <- 0x93010617 -mem-write: 0x80006369 <- 0x634107d7 -mem-write: 0x8000636d <- 0x130007de -mem-write: 0x80006371 <- 0xb7011616 -mem-write: 0x80006375 <- 0x13000107 -mem-write: 0x80006379 <- 0x93011656 -mem-write: 0x8000637d <- 0x23fff787 -mem-write: 0x80006381 <- 0x2308c117 -mem-write: 0x80006385 <- 0x3700f128 -mem-write: 0x80006389 <- 0x9380015b -mem-write: 0x8000638d <- 0x13c20b0d -mem-write: 0x80006391 <- 0x93014d8c -mem-write: 0x80006395 <- 0x93000006 -mem-write: 0x80006399 <- 0x13098107 -mem-write: 0x8000639d <- 0x13000c07 -mem-write: 0x800063a1 <- 0x6f0ac10d -mem-write: 0x800063a5 <- 0x83008000 -mem-write: 0x800063a9 <- 0x93000756 -mem-write: 0x800063ad <- 0x23002787 -mem-write: 0x800063b1 <- 0x13fed79f -mem-write: 0x800063b5 <- 0xe3002707 -mem-write: 0x800063b9 <- 0x63ffa798 -mem-write: 0x800063bd <- 0xb7140608 -mem-write: 0x800063c1 <- 0x93000087 -mem-write: 0x800063c5 <- 0xe3fff787 -mem-write: 0x800063c9 <- 0x8356f606 -mem-write: 0x800063cd <- 0xe308c117 -mem-write: 0x800063d1 <- 0x935a07d8 -mem-write: 0x800063d5 <- 0x1307c105 -mem-write: 0x800063d9 <- 0xef000c05 -mem-write: 0x800063dd <- 0x638f9fe0 -mem-write: 0x800063e1 <- 0xe3140502 -mem-write: 0x800063e5 <- 0x830c054c -mem-write: 0x800063e9 <- 0xe308e157 -mem-write: 0x800063ed <- 0x8362079c -mem-write: 0x800063f1 <- 0x9308c117 -mem-write: 0x800063f5 <- 0x13000004 -mem-write: 0x800063f9 <- 0x63160109 -VXDRV: upload 1024 bytes to 0x800063fd -mem-write: 0x800063fd <- 0x130207c4 -mem-write: 0x80006401 <- 0x13118d84 -mem-write: 0x80006405 <- 0x9307c106 -mem-write: 0x80006409 <- 0x93000906 -mem-write: 0x8000640d <- 0x13000605 -mem-write: 0x80006411 <- 0xef000405 -mem-write: 0x80006415 <- 0x83bb4ff0 -mem-write: 0x80006419 <- 0x9308c117 -mem-write: 0x8000641d <- 0xe3fff484 -mem-write: 0x80006421 <- 0x13fe07d2 -mem-write: 0x80006425 <- 0x930d0104 -mem-write: 0x80006429 <- 0x130e810b -mem-write: 0x8000642d <- 0x93000407 -mem-write: 0x80006431 <- 0x1307c107 -mem-write: 0x80006435 <- 0x83090106 -mem-write: 0x80006439 <- 0x930007d6 -mem-write: 0x8000643d <- 0x13002787 -mem-write: 0x80006441 <- 0x23002707 -mem-write: 0x80006445 <- 0xe3fed71f -mem-write: 0x80006449 <- 0x93fec798 -mem-write: 0x8000644d <- 0x93000006 -mem-write: 0x80006451 <- 0x13098107 -mem-write: 0x80006455 <- 0x6f000c07 -mem-write: 0x80006459 <- 0x83008000 -mem-write: 0x8000645d <- 0x93000756 -mem-write: 0x80006461 <- 0x23002787 -mem-write: 0x80006465 <- 0x13fed79f -mem-write: 0x80006469 <- 0xe3002707 -mem-write: 0x8000646d <- 0x93ffa798 -mem-write: 0x80006471 <- 0x13028d8c -mem-write: 0x80006475 <- 0xb712cd8d -mem-write: 0x80006479 <- 0x93fffffa -mem-write: 0x8000647d <- 0x6f118d8d -mem-write: 0x80006481 <- 0x1300c000 -mem-write: 0x80006485 <- 0x93014d0d -mem-write: 0x80006489 <- 0x93014c8c -mem-write: 0x8000648d <- 0x13000405 -mem-write: 0x80006491 <- 0xef000c05 -mem-write: 0x80006495 <- 0x93841fe0 -mem-write: 0x80006499 <- 0x93000507 -mem-write: 0x8000649d <- 0x13000405 -mem-write: 0x800064a1 <- 0x63000d05 -mem-write: 0x800064a5 <- 0xef04f056 -mem-write: 0x800064a9 <- 0x9382dfe0 -mem-write: 0x800064ad <- 0x93000507 -mem-write: 0x800064b1 <- 0x13000906 -mem-write: 0x800064b5 <- 0x93000406 -mem-write: 0x800064b9 <- 0x13000405 -mem-write: 0x800064bd <- 0x63000c85 -mem-write: 0x800064c1 <- 0xef0207c0 -mem-write: 0x800064c5 <- 0x13b04ff0 -mem-write: 0x800064c9 <- 0x93098106 -mem-write: 0x800064cd <- 0x93000906 -mem-write: 0x800064d1 <- 0x13000605 -mem-write: 0x800064d5 <- 0xef000c85 -mem-write: 0x800064d9 <- 0xb3af0ff0 -mem-write: 0x800064dd <- 0x93015484 -mem-write: 0x800064e1 <- 0xb301fad7 -mem-write: 0x800064e5 <- 0x93015787 -mem-write: 0x800064e9 <- 0xe34017da -mem-write: 0x800064ed <- 0x13f9bc9c -mem-write: 0x800064f1 <- 0x93098106 -mem-write: 0x800064f5 <- 0x93000906 -mem-write: 0x800064f9 <- 0x13000c05 -mem-write: 0x800064fd <- 0xef000605 -mem-write: 0x80006501 <- 0x93ee0ff0 -mem-write: 0x80006505 <- 0x6f12410a -mem-write: 0x80006509 <- 0x93030000 -mem-write: 0x8000650d <- 0x9307c107 -mem-write: 0x80006511 <- 0x308e106 -mem-write: 0x80006515 <- 0x930007d7 -mem-write: 0x80006519 <- 0xe3002787 -mem-write: 0x8000651d <- 0xe3ea071c -mem-write: 0x80006521 <- 0x93fed79a -mem-write: 0x80006525 <- 0x93000004 -mem-write: 0x80006529 <- 0x1312410a -mem-write: 0x8000652d <- 0x13160109 -mem-write: 0x80006531 <- 0x930d0104 -mem-write: 0x80006535 <- 0x930e810b -mem-write: 0x80006539 <- 0x13000405 -mem-write: 0x8000653d <- 0xef098105 -mem-write: 0x80006541 <- 0x13e9cfe0 -mem-write: 0x80006545 <- 0x93098107 -mem-write: 0x80006549 <- 0x83000407 -mem-write: 0x8000654d <- 0x930007d6 -mem-write: 0x80006551 <- 0x13002787 -mem-write: 0x80006555 <- 0x23002707 -mem-write: 0x80006559 <- 0xe3fed71f -mem-write: 0x8000655d <- 0x93ff7798 -mem-write: 0x80006561 <- 0x13000405 -mem-write: 0x80006565 <- 0x2307c105 -mem-write: 0x80006569 <- 0xef0a0118 -mem-write: 0x8000656d <- 0x93e70fe0 -mem-write: 0x80006571 <- 0x307c107 -mem-write: 0x80006575 <- 0x13000457 -mem-write: 0x80006579 <- 0x93002404 -mem-write: 0x8000657d <- 0x23002787 -mem-write: 0x80006581 <- 0xe3fee79f -mem-write: 0x80006585 <- 0x13ff7418 -mem-write: 0x80006589 <- 0x13098105 -mem-write: 0x8000658d <- 0x93000906 -mem-write: 0x80006591 <- 0x2307c105 -mem-write: 0x80006595 <- 0xef08011a -mem-write: 0x80006599 <- 0x3818ff0 -mem-write: 0x8000659d <- 0x631ac155 -mem-write: 0x800065a1 <- 0x931c0514 -mem-write: 0x800065a5 <- 0x1309410c -mem-write: 0x800065a9 <- 0x1307e104 -mem-write: 0x800065ad <- 0x930b610c -mem-write: 0x800065b1 <- 0x13c20b05 -mem-write: 0x800065b5 <- 0xef07c105 -mem-write: 0x800065b9 <- 0x63f1cfe0 -mem-write: 0x800065bd <- 0x131a0506 -mem-write: 0x800065c1 <- 0x93000007 -mem-write: 0x800065c5 <- 0x6f000c86 -mem-write: 0x800065c9 <- 0x1301c000 -mem-write: 0x800065cd <- 0x23001717 -mem-write: 0x800065d1 <- 0x1300f690 -mem-write: 0x800065d5 <- 0x93010717 -mem-write: 0x800065d9 <- 0x13ffe686 -mem-write: 0x800065dd <- 0x63010757 -mem-write: 0x800065e1 <- 0x83048684 -mem-write: 0x800065e5 <- 0x130006d7 -mem-write: 0x800065e9 <- 0x13010796 -mem-write: 0x800065ed <- 0x93410656 -mem-write: 0x800065f1 <- 0x63001797 -mem-write: 0x800065f5 <- 0x13000654 -mem-write: 0x800065f9 <- 0x93001767 -mem-write: 0x800065fd <- 0x93010797 -mem-write: 0x80006601 <- 0x130107d7 -mem-write: 0x80006605 <- 0x93002776 -mem-write: 0x80006609 <- 0xe30017e5 -mem-write: 0x8000660d <- 0x13fc0600 -mem-write: 0x80006611 <- 0x23001717 -mem-write: 0x80006615 <- 0x1300b690 -mem-write: 0x80006619 <- 0x93010717 -mem-write: 0x8000661d <- 0x13ffe686 -mem-write: 0x80006621 <- 0xe3010757 -mem-write: 0x80006625 <- 0x13fc8690 -mem-write: 0x80006629 <- 0x930b4107 -mem-write: 0x8000662d <- 0x8307c107 -mem-write: 0x80006631 <- 0x930007d6 -mem-write: 0x80006635 <- 0x13002787 -mem-write: 0x80006639 <- 0x23002707 -mem-write: 0x8000663d <- 0xe3fed71f -mem-write: 0x80006641 <- 0x23ff9798 -mem-write: 0x80006645 <- 0x130c0116 -mem-write: 0x80006649 <- 0x93000007 -mem-write: 0x8000664d <- 0x6f0cc106 -mem-write: 0x80006651 <- 0x1301c000 -mem-write: 0x80006655 <- 0x23001717 -mem-write: 0x80006659 <- 0x1300f690 -mem-write: 0x8000665d <- 0x93010717 -mem-write: 0x80006661 <- 0x13ffe686 -mem-write: 0x80006665 <- 0x63010757 -mem-write: 0x80006669 <- 0x83058684 -mem-write: 0x8000666d <- 0x130006d7 -mem-write: 0x80006671 <- 0x13010796 -mem-write: 0x80006675 <- 0x93410656 -mem-write: 0x80006679 <- 0x63001797 -mem-write: 0x8000667d <- 0x13000654 -mem-write: 0x80006681 <- 0x93001767 -mem-write: 0x80006685 <- 0x93010797 -mem-write: 0x80006689 <- 0x130107d7 -mem-write: 0x8000668d <- 0x93002776 -mem-write: 0x80006691 <- 0xe30017e5 -mem-write: 0x80006695 <- 0x13fc0600 -mem-write: 0x80006699 <- 0x23001717 -mem-write: 0x8000669d <- 0x1300b690 -mem-write: 0x800066a1 <- 0x93010717 -mem-write: 0x800066a5 <- 0x13ffe686 -mem-write: 0x800066a9 <- 0xe3010757 -mem-write: 0x800066ad <- 0x13fd8690 -mem-write: 0x800066b1 <- 0x93000007 -mem-write: 0x800066b5 <- 0x6f0cc106 -mem-write: 0x800066b9 <- 0x1301c000 -mem-write: 0x800066bd <- 0x23001717 -mem-write: 0x800066c1 <- 0x1300f690 -mem-write: 0x800066c5 <- 0x93010717 -mem-write: 0x800066c9 <- 0x13ffe686 -mem-write: 0x800066cd <- 0x63010757 -mem-write: 0x800066d1 <- 0x83058684 -mem-write: 0x800066d5 <- 0x130006d7 -mem-write: 0x800066d9 <- 0x13010796 -mem-write: 0x800066dd <- 0x93410656 -mem-write: 0x800066e1 <- 0x63001797 -mem-write: 0x800066e5 <- 0x13000654 -mem-write: 0x800066e9 <- 0x93001767 -mem-write: 0x800066ed <- 0x93010797 -mem-write: 0x800066f1 <- 0x130107d7 -mem-write: 0x800066f5 <- 0x93002776 -mem-write: 0x800066f9 <- 0xe30017e5 -mem-write: 0x800066fd <- 0x13fc0600 -mem-write: 0x80006701 <- 0x23001717 -mem-write: 0x80006705 <- 0x1300b690 -mem-write: 0x80006709 <- 0x93010717 -mem-write: 0x8000670d <- 0x13ffe686 -mem-write: 0x80006711 <- 0xe3010757 -mem-write: 0x80006715 <- 0x13fd8690 -mem-write: 0x80006719 <- 0x93000006 -mem-write: 0x8000671d <- 0x13000c86 -mem-write: 0x80006721 <- 0x830cc107 -mem-write: 0x80006725 <- 0x830006d5 -mem-write: 0x80006729 <- 0x93000757 -mem-write: 0x8000672d <- 0x13ffe686 -mem-write: 0x80006731 <- 0xb3ffe707 -mem-write: 0x80006735 <- 0xb300b787 -mem-write: 0x80006739 <- 0x1300c787 -mem-write: 0x8000673d <- 0x230107d6 -mem-write: 0x80006741 <- 0x1300f691 -mem-write: 0x80006745 <- 0xe3001676 -mem-write: 0x80006749 <- 0x13fd871e -mem-write: 0x8000674d <- 0x13098105 -mem-write: 0x80006751 <- 0x93000906 -mem-write: 0x80006755 <- 0xef07c105 -mem-write: 0x80006759 <- 0x3e59fe0 -mem-write: 0x8000675d <- 0x931ac155 -mem-write: 0x80006761 <- 0xe3fff484 -mem-write: 0x80006765 <- 0x83e40506 -mem-write: 0x80006769 <- 0x83010127 -mem-write: 0x8000676d <- 0x13000126 -mem-write: 0x80006771 <- 0xb3003007 -mem-write: 0x80006775 <- 0xb300f037 -mem-write: 0x80006779 <- 0x9340f007 -mem-write: 0x8000677d <- 0x9300d7f7 -mem-write: 0x80006781 <- 0x23020787 -mem-write: 0x80006785 <- 0x8312f102 -mem-write: 0x80006789 <- 0x63004127 -mem-write: 0x8000678d <- 0xb300e694 -mem-write: 0x80006791 <- 0x13009787 -mem-write: 0x80006795 <- 0x1302a007 -mem-write: 0x80006799 <- 0x63000784 -mem-write: 0x8000679d <- 0x1300f754 -mem-write: 0x800067a1 <- 0x1302a004 -mem-write: 0x800067a5 <- 0x6300a007 -mem-write: 0x800067a9 <- 0x134ee502 -mem-write: 0x800067ad <- 0x13030505 -mem-write: 0x800067b1 <- 0xa302e007 -mem-write: 0x800067b5 <- 0x2312a102 -mem-write: 0x800067b9 <- 0xe312e103 -mem-write: 0x800067bd <- 0x931e07c2 -mem-write: 0x800067c1 <- 0x23127107 -mem-write: 0x800067c5 <- 0x1300f128 -mem-write: 0x800067c9 <- 0x2300000c -mem-write: 0x800067cd <- 0x9300912e -mem-write: 0x800067d1 <- 0x13000c04 -mem-write: 0x800067d5 <- 0x300090c -mem-write: 0x800067d9 <- 0x93010129 -mem-write: 0x800067dd <- 0x930b410c -mem-write: 0x800067e1 <- 0x9309410d -mem-write: 0x800067e5 <- 0x1307e10b -mem-write: 0x800067e9 <- 0x130b610d -mem-write: 0x800067ed <- 0x13000007 -mem-write: 0x800067f1 <- 0x6f000d86 -mem-write: 0x800067f5 <- 0x1301c000 -mem-write: 0x800067f9 <- 0x23001717 -VXDRV: upload 1024 bytes to 0x800067fd -mem-write: 0x800067fd <- 0x1300f610 -mem-write: 0x80006801 <- 0x13010717 -mem-write: 0x80006805 <- 0x13ffe606 -mem-write: 0x80006809 <- 0x63010757 -mem-write: 0x8000680d <- 0x83057604 -mem-write: 0x80006811 <- 0x93000657 -mem-write: 0x80006815 <- 0x93010795 -mem-write: 0x80006819 <- 0x934105d5 -mem-write: 0x8000681d <- 0x63001797 -mem-write: 0x80006821 <- 0x130005d4 -mem-write: 0x80006825 <- 0x93001767 -mem-write: 0x80006829 <- 0x93010797 -mem-write: 0x8000682d <- 0x930107d7 -mem-write: 0x80006831 <- 0x13002775 -mem-write: 0x80006835 <- 0xe30017e5 -mem-write: 0x80006839 <- 0x13fc0580 -mem-write: 0x8000683d <- 0x23001717 -mem-write: 0x80006841 <- 0x1300a610 -mem-write: 0x80006845 <- 0x13010717 -mem-write: 0x80006849 <- 0x13ffe606 -mem-write: 0x8000684d <- 0xe3010757 -mem-write: 0x80006851 <- 0x13fd7610 -mem-write: 0x80006855 <- 0x93000c87 -mem-write: 0x80006859 <- 0x307c107 -mem-write: 0x8000685d <- 0x930007d6 -mem-write: 0x80006861 <- 0x13002787 -mem-write: 0x80006865 <- 0x23002707 -mem-write: 0x80006869 <- 0xe3fec71f -mem-write: 0x8000686d <- 0x23ffb798 -mem-write: 0x80006871 <- 0x130c0116 -mem-write: 0x80006875 <- 0x13000007 -mem-write: 0x80006879 <- 0x6f0cc106 -mem-write: 0x8000687d <- 0x1301c000 -mem-write: 0x80006881 <- 0x23001717 -mem-write: 0x80006885 <- 0x1300f610 -mem-write: 0x80006889 <- 0x13010717 -mem-write: 0x8000688d <- 0x13ffe606 -mem-write: 0x80006891 <- 0x63010757 -mem-write: 0x80006895 <- 0x8305a604 -mem-write: 0x80006899 <- 0x93000657 -mem-write: 0x8000689d <- 0x93010795 -mem-write: 0x800068a1 <- 0x934105d5 -mem-write: 0x800068a5 <- 0x63001797 -mem-write: 0x800068a9 <- 0x130005d4 -mem-write: 0x800068ad <- 0x93001767 -mem-write: 0x800068b1 <- 0x93010797 -mem-write: 0x800068b5 <- 0x930107d7 -mem-write: 0x800068b9 <- 0x13002775 -mem-write: 0x800068bd <- 0xe30017e5 -mem-write: 0x800068c1 <- 0x13fc0580 -mem-write: 0x800068c5 <- 0x23001717 -mem-write: 0x800068c9 <- 0x1300a610 -mem-write: 0x800068cd <- 0x13010717 -mem-write: 0x800068d1 <- 0x13ffe606 -mem-write: 0x800068d5 <- 0xe3010757 -mem-write: 0x800068d9 <- 0x13fda610 -mem-write: 0x800068dd <- 0x13000007 -mem-write: 0x800068e1 <- 0x6f0cc106 -mem-write: 0x800068e5 <- 0x1301c000 -mem-write: 0x800068e9 <- 0x23001717 -mem-write: 0x800068ed <- 0x1300f610 -mem-write: 0x800068f1 <- 0x13010717 -mem-write: 0x800068f5 <- 0x13ffe606 -mem-write: 0x800068f9 <- 0x63010757 -mem-write: 0x800068fd <- 0x8305a604 -mem-write: 0x80006901 <- 0x93000657 -mem-write: 0x80006905 <- 0x93010795 -mem-write: 0x80006909 <- 0x934105d5 -mem-write: 0x8000690d <- 0x63001797 -mem-write: 0x80006911 <- 0x130005d4 -mem-write: 0x80006915 <- 0x93001767 -mem-write: 0x80006919 <- 0x93010797 -mem-write: 0x8000691d <- 0x930107d7 -mem-write: 0x80006921 <- 0x13002775 -mem-write: 0x80006925 <- 0xe30017e5 -mem-write: 0x80006929 <- 0x13fc0580 -mem-write: 0x8000692d <- 0x23001717 -mem-write: 0x80006931 <- 0x1300a610 -mem-write: 0x80006935 <- 0x13010717 -mem-write: 0x80006939 <- 0x13ffe606 -mem-write: 0x8000693d <- 0xe3010757 -mem-write: 0x80006941 <- 0x93fda610 -mem-write: 0x80006945 <- 0x13000005 -mem-write: 0x80006949 <- 0x13000d86 -mem-write: 0x8000694d <- 0x30cc107 -mem-write: 0x80006951 <- 0x83000655 -mem-write: 0x80006955 <- 0x13000757 -mem-write: 0x80006959 <- 0x13ffe606 -mem-write: 0x8000695d <- 0xb3ffe707 -mem-write: 0x80006961 <- 0xb300a787 -mem-write: 0x80006965 <- 0x9300b787 -mem-write: 0x80006969 <- 0x230107d5 -mem-write: 0x8000696d <- 0x9300f611 -mem-write: 0x80006971 <- 0xe30015f5 -mem-write: 0x80006975 <- 0x13fda71e -mem-write: 0x80006979 <- 0x93000c06 -mem-write: 0x8000697d <- 0x1307c105 -mem-write: 0x80006981 <- 0xef098105 -mem-write: 0x80006985 <- 0x83c2dfe0 -mem-write: 0x80006989 <- 0x331ac157 -mem-write: 0x8000698d <- 0x93009907 -mem-write: 0x80006991 <- 0x13001484 -mem-write: 0x80006995 <- 0x23030786 -mem-write: 0x80006999 <- 0xe300c700 -mem-write: 0x8000699d <- 0x13e49458 -mem-write: 0x800069a1 <- 0x3fff445 -mem-write: 0x800069a5 <- 0x13010127 -mem-write: 0x800069a9 <- 0x3341f555 -mem-write: 0x800069ad <- 0x8300a475 -mem-write: 0x800069b1 <- 0x1301c124 -mem-write: 0x800069b5 <- 0x33001509 -mem-write: 0x800069b9 <- 0x33012709 -mem-write: 0x800069bd <- 0x1300a70c -mem-write: 0x800069c1 <- 0x63004007 -mem-write: 0x800069c5 <- 0x1304f75e -mem-write: 0x800069c9 <- 0xe3005007 -mem-write: 0x800069cd <- 0x8300e780 -mem-write: 0x800069d1 <- 0x13ffe947 -mem-write: 0x800069d5 <- 0x93ffe907 -mem-write: 0x800069d9 <- 0x6307f7f7 -mem-write: 0x800069dd <- 0x93780444 -mem-write: 0x800069e1 <- 0x1302e006 -mem-write: 0x800069e5 <- 0x93038006 -mem-write: 0x800069e9 <- 0x63030005 -mem-write: 0x800069ed <- 0x6300d78e -mem-write: 0x800069f1 <- 0x8378f652 -mem-write: 0x800069f5 <- 0x23fff747 -mem-write: 0x800069f9 <- 0x1300b700 -mem-write: 0x800069fd <- 0x93fff707 -mem-write: 0x80006a01 <- 0x6f07f7f7 -mem-write: 0x80006a05 <- 0x83fe9ff0 -mem-write: 0x80006a09 <- 0x93fff747 -mem-write: 0x80006a0d <- 0xe3038006 -mem-write: 0x80006a11 <- 0x9300f6f4 -mem-write: 0x80006a15 <- 0x93031007 -mem-write: 0x80006a19 <- 0xa3001484 -mem-write: 0x80006a1d <- 0xb7fef70f -mem-write: 0x80006a21 <- 0x13800155 -mem-write: 0x80006a25 <- 0x93000486 -mem-write: 0x80006a29 <- 0x13c1c585 -mem-write: 0x80006a2d <- 0xef000c05 -mem-write: 0x80006a31 <- 0x83039020 -mem-write: 0x80006a35 <- 0x3072157 -mem-write: 0x80006a39 <- 0x23014127 -mem-write: 0x80006a3d <- 0x93169128 -mem-write: 0x80006a41 <- 0x23fff7c7 -mem-write: 0x80006a45 <- 0x1316e122 -mem-write: 0x80006a49 <- 0x63011797 -mem-write: 0x80006a4d <- 0x1300071e -mem-write: 0x80006a51 <- 0xef000985 -mem-write: 0x80006a55 <- 0x63b9cfe0 -mem-write: 0x80006a59 <- 0x13220510 -mem-write: 0x80006a5d <- 0xef000985 -mem-write: 0x80006a61 <- 0x638ccfe0 -mem-write: 0x80006a65 <- 0x8320051a -mem-write: 0x80006a69 <- 0x300c126 -mem-write: 0x80006a6d <- 0x93124147 -mem-write: 0x80006a71 <- 0x23001487 -mem-write: 0x80006a75 <- 0x9300f6a0 -mem-write: 0x80006a79 <- 0x63000a87 -mem-write: 0x80006a7d <- 0x9302070a -mem-write: 0x80006a81 <- 0x6302e006 -mem-write: 0x80006a85 <- 0x31cd70c -mem-write: 0x80006a89 <- 0x930017c7 -mem-write: 0x80006a8d <- 0xe3001787 -mem-write: 0x80006a91 <- 0x93fe071a -mem-write: 0x80006a95 <- 0x63045006 -mem-write: 0x80006a99 <- 0x6f00fae6 -mem-write: 0x80006a9d <- 0x63014000 -mem-write: 0x80006aa1 <- 0x3015788 -mem-write: 0x80006aa5 <- 0x93fff7c7 -mem-write: 0x80006aa9 <- 0xe3fff787 -mem-write: 0x80006aad <- 0x23fed71a -mem-write: 0x80006ab1 <- 0x93000780 -mem-write: 0x80006ab5 <- 0x93000a87 -mem-write: 0x80006ab9 <- 0x13020006 -mem-write: 0x80006abd <- 0x302d006 -mem-write: 0x80006ac1 <- 0x630007c7 -mem-write: 0x80006ac5 <- 0x6300d704 -mem-write: 0x80006ac9 <- 0x9300c716 -mem-write: 0x80006acd <- 0x6f001787 -mem-write: 0x80006ad1 <- 0x13ff1ff0 -mem-write: 0x80006ad5 <- 0x6f000a84 -mem-write: 0x80006ad9 <- 0x300c000 -mem-write: 0x80006add <- 0x130007c7 -mem-write: 0x80006ae1 <- 0x23000684 -mem-write: 0x80006ae5 <- 0x9300e400 -mem-write: 0x80006ae9 <- 0x93001406 -mem-write: 0x80006aed <- 0xe3001787 -mem-write: 0x80006af1 <- 0x83fe0716 -mem-write: 0x80006af5 <- 0x93000126 -mem-write: 0x80006af9 <- 0x3002007 -mem-write: 0x80006afd <- 0x63fff447 -mem-write: 0x80006b01 <- 0x8312f686 -mem-write: 0x80006b05 <- 0x93004127 -mem-write: 0x80006b09 <- 0x63000786 -mem-write: 0x80006b0d <- 0x930097d4 -mem-write: 0x80006b11 <- 0x93000486 -mem-write: 0x80006b15 <- 0x63030007 -mem-write: 0x80006b19 <- 0xb302f716 -mem-write: 0x80006b1d <- 0x63415407 -mem-write: 0x80006b21 <- 0x1302f6d2 -mem-write: 0x80006b25 <- 0x6f030006 -mem-write: 0x80006b29 <- 0x63008000 -mem-write: 0x80006b2d <- 0x8300e6dc -mem-write: 0x80006b31 <- 0xa3ffe447 -mem-write: 0x80006b35 <- 0x13fe040f -mem-write: 0x80006b39 <- 0x33fff404 -mem-write: 0x80006b3d <- 0xe3415407 -mem-write: 0x80006b41 <- 0x3fec786 -mem-write: 0x80006b45 <- 0x93000127 -mem-write: 0x80006b49 <- 0x63003007 -mem-write: 0x80006b4d <- 0x830af702 -mem-write: 0x80006b51 <- 0x23008127 -mem-write: 0x80006b55 <- 0x93040a22 -mem-write: 0x80006b59 <- 0x93009786 -mem-write: 0x80006b5d <- 0x63017007 -mem-write: 0x80006b61 <- 0x130cd7f2 -mem-write: 0x80006b65 <- 0x93001007 -mem-write: 0x80006b69 <- 0x93004007 -mem-write: 0x80006b6d <- 0x13001797 -mem-write: 0x80006b71 <- 0x93014786 -mem-write: 0x80006b75 <- 0x13000705 -mem-write: 0x80006b79 <- 0xe3001707 -mem-write: 0x80006b7d <- 0x23fec6f8 -mem-write: 0x80006b81 <- 0x1304ba22 -mem-write: 0x80006b85 <- 0xef000a05 -mem-write: 0x80006b89 <- 0x23424010 -mem-write: 0x80006b8d <- 0x9304aa20 -mem-write: 0x80006b91 <- 0x93000a85 -mem-write: 0x80006b95 <- 0xef000504 -mem-write: 0x80006b99 <- 0x830a5020 -mem-write: 0x80006b9d <- 0x63018127 -mem-write: 0x80006ba1 <- 0x33000788 -mem-write: 0x80006ba5 <- 0x33415404 -mem-write: 0x80006ba9 <- 0x23008484 -mem-write: 0x80006bad <- 0x830087a0 -mem-write: 0x80006bb1 <- 0x31ec120 -mem-write: 0x80006bb5 <- 0x31e8124 -mem-write: 0x80006bb9 <- 0x831e0129 -mem-write: 0x80006bbd <- 0x31dc129 -mem-write: 0x80006bc1 <- 0x831d812a -mem-write: 0x80006bc5 <- 0x31d412a -mem-write: 0x80006bc9 <- 0x831d012b -mem-write: 0x80006bcd <- 0x31cc12b -mem-write: 0x80006bd1 <- 0x831c812c -mem-write: 0x80006bd5 <- 0x31c412c -mem-write: 0x80006bd9 <- 0x831c012d -mem-write: 0x80006bdd <- 0x131bc12d -mem-write: 0x80006be1 <- 0x83000485 -mem-write: 0x80006be5 <- 0x131e4124 -mem-write: 0x80006be9 <- 0x671f0101 -mem-write: 0x80006bed <- 0x83000080 -mem-write: 0x80006bf1 <- 0xb3004127 -mem-write: 0x80006bf5 <- 0x63009784 -mem-write: 0x80006bf9 <- 0x835004c8 -VXDRV: upload 1024 bytes to 0x80006bfd -mem-write: 0x80006bfd <- 0x300c127 -mem-write: 0x80006c01 <- 0x83008127 -mem-write: 0x80006c05 <- 0xb30007a7 -mem-write: 0x80006c09 <- 0x2300f707 -mem-write: 0x80006c0d <- 0x8300f124 -mem-write: 0x80006c11 <- 0x23008127 -mem-write: 0x80006c15 <- 0x93040a22 -mem-write: 0x80006c19 <- 0x93003786 -mem-write: 0x80006c1d <- 0xe3017007 -mem-write: 0x80006c21 <- 0x93f4d7e2 -mem-write: 0x80006c25 <- 0x6f000005 -mem-write: 0x80006c29 <- 0x93f5dff0 -mem-write: 0x80006c2d <- 0xe3030007 -mem-write: 0x80006c31 <- 0xb3f2f710 -mem-write: 0x80006c35 <- 0x93415407 -mem-write: 0x80006c39 <- 0xe3001006 -mem-write: 0x80006c3d <- 0x6feef6c4 -mem-write: 0x80006c41 <- 0x83f11ff0 -mem-write: 0x80006c45 <- 0x23008124 -mem-write: 0x80006c49 <- 0x93009122 -mem-write: 0x80006c4d <- 0x6302a007 -mem-write: 0x80006c51 <- 0x23ec97d0 -mem-write: 0x80006c55 <- 0x6f00f122 -mem-write: 0x80006c59 <- 0x3eb8ff0 -mem-write: 0x80006c5d <- 0xe30007c7 -mem-write: 0x80006c61 <- 0x3e2070a -mem-write: 0x80006c65 <- 0x930017c7 -mem-write: 0x80006c69 <- 0xa3001787 -mem-write: 0x80006c6d <- 0xe3fee78f -mem-write: 0x80006c71 <- 0x6ffe071a -mem-write: 0x80006c75 <- 0x3e21ff0 -mem-write: 0x80006c79 <- 0xb700c127 -mem-write: 0x80006c7d <- 0x93000027 -mem-write: 0x80006c81 <- 0x2370f787 -mem-write: 0x80006c85 <- 0x6f00f720 -mem-write: 0x80006c89 <- 0x13e2dff0 -mem-write: 0x80006c8d <- 0xa3031007 -mem-write: 0x80006c91 <- 0x1312e102 -mem-write: 0x80006c95 <- 0x2302e007 -mem-write: 0x80006c99 <- 0x9312e103 -mem-write: 0x80006c9d <- 0x63001484 -mem-write: 0x80006ca1 <- 0x932af05c -mem-write: 0x80006ca5 <- 0xa3030007 -mem-write: 0x80006ca9 <- 0x9312f103 -mem-write: 0x80006cad <- 0x13128107 -mem-write: 0x80006cb1 <- 0x23fff404 -mem-write: 0x80006cb5 <- 0x6f00f128 -mem-write: 0x80006cb9 <- 0x93b11ff0 -mem-write: 0x80006cbd <- 0x130b410c -mem-write: 0x80006cc1 <- 0x93000c87 -mem-write: 0x80006cc5 <- 0x1307c107 -mem-write: 0x80006cc9 <- 0x83090106 -mem-write: 0x80006ccd <- 0x930007d6 -mem-write: 0x80006cd1 <- 0x13002787 -mem-write: 0x80006cd5 <- 0x23002707 -mem-write: 0x80006cd9 <- 0xe3fed71f -mem-write: 0x80006cdd <- 0xb7fec798 -mem-write: 0x80006ce1 <- 0x93000047 -mem-write: 0x80006ce5 <- 0x2308e787 -mem-write: 0x80006ce9 <- 0xb70cf113 -mem-write: 0x80006ced <- 0x93000087 -mem-write: 0x80006cf1 <- 0x23fff787 -mem-write: 0x80006cf5 <- 0xb700f12e -mem-write: 0x80006cf9 <- 0x93ffffc7 -mem-write: 0x80006cfd <- 0x1312410a -mem-write: 0x80006d01 <- 0x130d0104 -mem-write: 0x80006d05 <- 0x1301000e -mem-write: 0x80006d09 <- 0x930c8d83 -mem-write: 0x80006d0d <- 0x23002787 -mem-write: 0x80006d11 <- 0x23034124 -mem-write: 0x80006d15 <- 0x93035122 -mem-write: 0x80006d19 <- 0x93000004 -mem-write: 0x80006d1d <- 0x13000c8a -mem-write: 0x80006d21 <- 0x93160109 -mem-write: 0x80006d25 <- 0x9300040c -mem-write: 0x80006d29 <- 0x230aa10b -mem-write: 0x80006d2d <- 0x1302f120 -mem-write: 0x80006d31 <- 0x13000e0a -mem-write: 0x80006d35 <- 0x93000304 -mem-write: 0x80006d39 <- 0x13000906 -mem-write: 0x80006d3d <- 0x93098106 -mem-write: 0x80006d41 <- 0x13000a85 -mem-write: 0x80006d45 <- 0xef000405 -mem-write: 0x80006d49 <- 0x13e99fe0 -mem-write: 0x80006d4d <- 0x9304c107 -mem-write: 0x80006d51 <- 0x83098107 -mem-write: 0x80006d55 <- 0x930007d6 -mem-write: 0x80006d59 <- 0x13002787 -mem-write: 0x80006d5d <- 0x23002707 -mem-write: 0x80006d61 <- 0xe3fed71f -mem-write: 0x80006d65 <- 0x83ffa798 -mem-write: 0x80006d69 <- 0x8301c127 -mem-write: 0x80006d6d <- 0x3305e155 -mem-write: 0x80006d71 <- 0x8300f5f6 -mem-write: 0x80006d75 <- 0x33020127 -mem-write: 0x80006d79 <- 0x6300f605 -mem-write: 0x80006d7d <- 0x133aa050 -mem-write: 0x80006d81 <- 0x33090006 -mem-write: 0x80006d85 <- 0x1340a606 -mem-write: 0x80006d89 <- 0x93000c87 -mem-write: 0x80006d8d <- 0x8304c107 -mem-write: 0x80006d91 <- 0x930007d6 -mem-write: 0x80006d95 <- 0x13002787 -mem-write: 0x80006d99 <- 0x23002707 -mem-write: 0x80006d9d <- 0xe3fed71f -mem-write: 0x80006da1 <- 0x63ff3798 -mem-write: 0x80006da5 <- 0x9306c054 -mem-write: 0x80006da9 <- 0x1300f007 -mem-write: 0x80006dad <- 0x63000c87 -mem-write: 0x80006db1 <- 0x1302c7dc -mem-write: 0x80006db5 <- 0x93ff0606 -mem-write: 0x80006db9 <- 0x13004656 -mem-write: 0x80006dbd <- 0x13001687 -mem-write: 0x80006dc1 <- 0x33001717 -mem-write: 0x80006dc5 <- 0x9300ec87 -mem-write: 0x80006dc9 <- 0x93000c87 -mem-write: 0x80006dcd <- 0x23002787 -mem-write: 0x80006dd1 <- 0xe3fe079f -mem-write: 0x80006dd5 <- 0x13fee79c -mem-write: 0x80006dd9 <- 0x33080006 -mem-write: 0x80006ddd <- 0x9340a606 -mem-write: 0x80006de1 <- 0x33004696 -mem-write: 0x80006de5 <- 0x1340d606 -mem-write: 0x80006de9 <- 0x33001616 -mem-write: 0x80006ded <- 0x8300cd86 -mem-write: 0x80006df1 <- 0x83000757 -mem-write: 0x80006df5 <- 0xb3230656 -mem-write: 0x80006df9 <- 0x2300d7f7 -mem-write: 0x80006dfd <- 0x9300f710 -mem-write: 0x80006e01 <- 0x93010595 -mem-write: 0x80006e05 <- 0x634105d5 -mem-write: 0x80006e09 <- 0x931605c0 -mem-write: 0x80006e0d <- 0x13098107 -mem-write: 0x80006e11 <- 0x3000c87 -mem-write: 0x80006e15 <- 0x830007d6 -mem-write: 0x80006e19 <- 0x93000756 -mem-write: 0x80006e1d <- 0x13002787 -mem-write: 0x80006e21 <- 0x63002707 -mem-write: 0x80006e25 <- 0xe302d614 -mem-write: 0x80006e29 <- 0x13fefb96 -mem-write: 0x80006e2d <- 0x93000a87 -mem-write: 0x80006e31 <- 0x83098107 -mem-write: 0x80006e35 <- 0x930007d6 -mem-write: 0x80006e39 <- 0x13002787 -mem-write: 0x80006e3d <- 0x23002707 -mem-write: 0x80006e41 <- 0xe3fed71f -mem-write: 0x80006e45 <- 0xb3ffa798 -mem-write: 0x80006e49 <- 0x13014484 -mem-write: 0x80006e4d <- 0x93014404 -mem-write: 0x80006e51 <- 0x1312cd87 -mem-write: 0x80006e55 <- 0xe3001a5a -mem-write: 0x80006e59 <- 0x83eef410 -mem-write: 0x80006e5d <- 0x30c6157 -mem-write: 0x80006e61 <- 0x1308e157 -mem-write: 0x80006e65 <- 0x3000c84 -mem-write: 0x80006e69 <- 0xb302812a -mem-write: 0x80006e6d <- 0x3700e787 -mem-write: 0x80006e71 <- 0x93ffffc7 -mem-write: 0x80006e75 <- 0x13000a8c -mem-write: 0x80006e79 <- 0x83f72707 -mem-write: 0x80006e7d <- 0xb302412a -mem-write: 0x80006e81 <- 0x2300e787 -mem-write: 0x80006e85 <- 0x130cf113 -mem-write: 0x80006e89 <- 0x9307c107 -mem-write: 0x80006e8d <- 0x13000c87 -mem-write: 0x80006e91 <- 0x830c8106 -mem-write: 0x80006e95 <- 0x930007d6 -mem-write: 0x80006e99 <- 0x13002787 -mem-write: 0x80006e9d <- 0x23002707 -mem-write: 0x80006ea1 <- 0xe3fed71f -mem-write: 0x80006ea5 <- 0x13fec798 -mem-write: 0x80006ea9 <- 0x93000007 -mem-write: 0x80006ead <- 0x6f098107 -mem-write: 0x80006eb1 <- 0x3008000 -mem-write: 0x80006eb5 <- 0x93000c57 -mem-write: 0x80006eb9 <- 0x23002787 -mem-write: 0x80006ebd <- 0x13fee79f -mem-write: 0x80006ec1 <- 0xe3002c0c -mem-write: 0x80006ec5 <- 0x13ffa798 -mem-write: 0x80006ec9 <- 0x37028d8d -mem-write: 0x80006ecd <- 0x9300001c -mem-write: 0x80006ed1 <- 0x6f118d8d -mem-write: 0x80006ed5 <- 0x13010000 -mem-write: 0x80006ed9 <- 0x63001c5c -mem-write: 0x80006edd <- 0x1329bd00 -mem-write: 0x80006ee1 <- 0x93014d0d -mem-write: 0x80006ee5 <- 0x13000c85 -mem-write: 0x80006ee9 <- 0xef000d85 -mem-write: 0x80006eed <- 0x93de9fd0 -mem-write: 0x80006ef1 <- 0x93000507 -mem-write: 0x80006ef5 <- 0x13000c85 -mem-write: 0x80006ef9 <- 0x63000d05 -mem-write: 0x80006efd <- 0xef26f040 -mem-write: 0x80006f01 <- 0xe3dd5fd0 -mem-write: 0x80006f05 <- 0x93fca04a -mem-write: 0x80006f09 <- 0x13000906 -mem-write: 0x80006f0d <- 0x93000c86 -mem-write: 0x80006f11 <- 0x13000c85 -mem-write: 0x80006f15 <- 0xef000d05 -mem-write: 0x80006f19 <- 0x13cc9fe0 -mem-write: 0x80006f1d <- 0x93098106 -mem-write: 0x80006f21 <- 0x93000906 -mem-write: 0x80006f25 <- 0x13000605 -mem-write: 0x80006f29 <- 0xef000d05 -mem-write: 0x80006f2d <- 0xb389dfe0 -mem-write: 0x80006f31 <- 0x6f018484 -mem-write: 0x80006f35 <- 0x93fa5ff0 -mem-write: 0x80006f39 <- 0xb712410a -mem-write: 0x80006f3d <- 0x93800155 -mem-write: 0x80006f41 <- 0x13bf8585 -mem-write: 0x80006f45 <- 0xb7000a85 -mem-write: 0x80006f49 <- 0xef000024 -mem-write: 0x80006f4d <- 0x9331c020 -mem-write: 0x80006f51 <- 0x6f70f484 -mem-write: 0x80006f55 <- 0x13ae1ff0 -mem-write: 0x80006f59 <- 0xe312710c -mem-write: 0x80006f5d <- 0x23ac0792 -mem-write: 0x80006f61 <- 0x6f018128 -mem-write: 0x80006f65 <- 0x93865ff0 -mem-write: 0x80006f69 <- 0x1304c107 -mem-write: 0x80006f6d <- 0x6f000c87 -mem-write: 0x80006f71 <- 0x9300c000 -mem-write: 0x80006f75 <- 0xe305e106 -mem-write: 0x80006f79 <- 0x3e8f68a -mem-write: 0x80006f7d <- 0x830007d6 -mem-write: 0x80006f81 <- 0x93000756 -mem-write: 0x80006f85 <- 0x13002787 -mem-write: 0x80006f89 <- 0xe3002707 -mem-write: 0x80006f8d <- 0x83fed604 -mem-write: 0x80006f91 <- 0x30e2157 -mem-write: 0x80006f95 <- 0xb301c127 -mem-write: 0x80006f99 <- 0x6300f777 -mem-write: 0x80006f9d <- 0x1300e79e -mem-write: 0x80006fa1 <- 0xef000c85 -mem-write: 0x80006fa5 <- 0xe3b89fd0 -mem-write: 0x80006fa9 <- 0x13e60512 -mem-write: 0x80006fad <- 0xef000c85 -mem-write: 0x80006fb1 <- 0xe3e41fd0 -mem-write: 0x80006fb5 <- 0x93e4051c -mem-write: 0x80006fb9 <- 0x130ec105 -mem-write: 0x80006fbd <- 0xef000c05 -mem-write: 0x80006fc1 <- 0x93c1dfd0 -mem-write: 0x80006fc5 <- 0x13108105 -mem-write: 0x80006fc9 <- 0xef000c85 -mem-write: 0x80006fcd <- 0x3c11fd0 -mem-write: 0x80006fd1 <- 0x30ec156 -mem-write: 0x80006fd5 <- 0x8310a155 -mem-write: 0x80006fd9 <- 0x130ee158 -mem-write: 0x80006fdd <- 0x13fff646 -mem-write: 0x80006fe1 <- 0x13010616 -mem-write: 0x80006fe5 <- 0x23010656 -mem-write: 0x80006fe9 <- 0xb30ec116 -mem-write: 0x80006fed <- 0x9340a885 -mem-write: 0x80006ff1 <- 0x63000506 -mem-write: 0x80006ff5 <- 0x8306b05e -mem-write: 0x80006ff9 <- 0x13024126 -VXDRV: upload 1024 bytes to 0x80006ffd -mem-write: 0x80006ffd <- 0x93108107 -mem-write: 0x80007001 <- 0x83120107 -mem-write: 0x80007005 <- 0x13000755 -mem-write: 0x80007009 <- 0x93002707 -mem-write: 0x8000700d <- 0x23002686 -mem-write: 0x80007011 <- 0xe3feb69f -mem-write: 0x80007015 <- 0x23fef718 -mem-write: 0x80007019 <- 0x1312011e -mem-write: 0x8000701d <- 0x93108107 -mem-write: 0x80007021 <- 0x6f0ec106 -mem-write: 0x80007025 <- 0x3008000 -mem-write: 0x80007029 <- 0x130006d6 -mem-write: 0x8000702d <- 0x23002707 -mem-write: 0x80007031 <- 0x93fec71f -mem-write: 0x80007035 <- 0xe3002686 -mem-write: 0x80007039 <- 0x83fef718 -mem-write: 0x8000703d <- 0x23024127 -mem-write: 0x80007041 <- 0x13120110 -mem-write: 0x80007045 <- 0x130ec107 -mem-write: 0x80007049 <- 0x8313c106 -mem-write: 0x8000704d <- 0x930007d6 -mem-write: 0x80007051 <- 0x13002787 -mem-write: 0x80007055 <- 0x23002707 -mem-write: 0x80007059 <- 0xe3fed71f -mem-write: 0x8000705d <- 0x83fec798 -mem-write: 0x80007061 <- 0xb310a156 -mem-write: 0x80007065 <- 0x23411505 -mem-write: 0x80007069 <- 0x13100112 -mem-write: 0x8000706d <- 0x63000685 -mem-write: 0x80007071 <- 0x232c0586 -mem-write: 0x80007075 <- 0x9302d126 -mem-write: 0x80007079 <- 0x63f6f007 -mem-write: 0x8000707d <- 0x1306f5c8 -mem-write: 0x80007081 <- 0xef0ec105 -mem-write: 0x80007085 <- 0x83d89fd0 -mem-write: 0x80007089 <- 0x9302c126 -mem-write: 0x8000708d <- 0x93000505 -mem-write: 0x80007091 <- 0x13120107 -mem-write: 0x80007095 <- 0x3104105 -mem-write: 0x80007099 <- 0x30ec156 -mem-write: 0x8000709d <- 0x63108157 -mem-write: 0x800070a1 <- 0x132ee60a -mem-write: 0x800070a5 <- 0x13000007 -mem-write: 0x800070a9 <- 0x3000706 -mem-write: 0x800070ad <- 0x30007d7 -mem-write: 0x800070b1 <- 0x93000558 -mem-write: 0x800070b5 <- 0x33ffe787 -mem-write: 0x800070b9 <- 0x3340c707 -mem-write: 0x800070bd <- 0x13410707 -mem-write: 0x800070c1 <- 0x23010756 -mem-write: 0x800070c5 <- 0x1300e791 -mem-write: 0x800070c9 <- 0x1310a107 -mem-write: 0x800070cd <- 0x13001676 -mem-write: 0x800070d1 <- 0xe3ffe505 -mem-write: 0x800070d5 <- 0x13fce79c -mem-write: 0x800070d9 <- 0x93001006 -mem-write: 0x800070dd <- 0x13000907 -mem-write: 0x800070e1 <- 0x13040007 -mem-write: 0x800070e5 <- 0xef108105 -mem-write: 0x800070e9 <- 0x938bcfe0 -mem-write: 0x800070ed <- 0x13000c85 -mem-write: 0x800070f1 <- 0xef108105 -mem-write: 0x800070f5 <- 0x6fe24fe0 -mem-write: 0x800070f9 <- 0x83d15ff0 -mem-write: 0x800070fd <- 0x93008127 -mem-write: 0x80007101 <- 0x6ffff784 -mem-write: 0x80007105 <- 0x83b45ff0 -mem-write: 0x80007109 <- 0x2300c127 -mem-write: 0x8000710d <- 0x13120102 -mem-write: 0x80007111 <- 0x23000a84 -mem-write: 0x80007115 <- 0x6f0007a0 -mem-write: 0x80007119 <- 0x93af9ff0 -mem-write: 0x8000711d <- 0x13000c87 -mem-write: 0x80007121 <- 0x930e4107 -mem-write: 0x80007125 <- 0x23002787 -mem-write: 0x80007129 <- 0xe3fe079f -mem-write: 0x8000712d <- 0x6ffee79c -mem-write: 0x80007131 <- 0x83cd1ff0 -mem-write: 0x80007135 <- 0x93010127 -mem-write: 0x80007139 <- 0x6312410a -mem-write: 0x8000713d <- 0xb706078a -mem-write: 0x80007141 <- 0x93800155 -mem-write: 0x80007145 <- 0x13c00585 -mem-write: 0x80007149 <- 0xb7000a85 -mem-write: 0x8000714d <- 0xef000024 -mem-write: 0x80007151 <- 0x93118020 -mem-write: 0x80007155 <- 0x6f70f484 -mem-write: 0x80007159 <- 0x938ddff0 -mem-write: 0x8000715d <- 0x6f0e810b -mem-write: 0x80007161 <- 0x93bd8ff0 -mem-write: 0x80007165 <- 0x23031007 -mem-write: 0x80007169 <- 0x93fef90f -mem-write: 0x8000716d <- 0x6f001484 -mem-write: 0x80007171 <- 0x938b1ff0 -mem-write: 0x80007175 <- 0x23001787 -mem-write: 0x80007179 <- 0x6f00f700 -mem-write: 0x8000717d <- 0x938a5ff0 -mem-write: 0x80007181 <- 0xb712410a -mem-write: 0x80007185 <- 0x93800155 -mem-write: 0x80007189 <- 0x13c18585 -mem-write: 0x8000718d <- 0xb7000a85 -mem-write: 0x80007191 <- 0xef000024 -mem-write: 0x80007195 <- 0x930d4020 -mem-write: 0x80007199 <- 0x6f70f484 -mem-write: 0x8000719d <- 0x83899ff0 -mem-write: 0x800071a1 <- 0x131ac157 -mem-write: 0x800071a5 <- 0x1312610c -mem-write: 0x800071a9 <- 0x6f127109 -mem-write: 0x800071ad <- 0xb7815ff0 -mem-write: 0x800071b1 <- 0x93800155 -mem-write: 0x800071b5 <- 0x13c0c585 -mem-write: 0x800071b9 <- 0xb7000a85 -mem-write: 0x800071bd <- 0xef000024 -mem-write: 0x800071c1 <- 0x930a8020 -mem-write: 0x800071c5 <- 0x6f70f484 -mem-write: 0x800071c9 <- 0x9386dff0 -mem-write: 0x800071cd <- 0x13098105 -mem-write: 0x800071d1 <- 0xef07c105 -mem-write: 0x800071d5 <- 0x93d44fe0 -mem-write: 0x800071d9 <- 0x13c20b05 -mem-write: 0x800071dd <- 0xef098105 -mem-write: 0x800071e1 <- 0x63af5fd0 -mem-write: 0x800071e5 <- 0xe3fe0516 -mem-write: 0x800071e9 <- 0x8382044c -mem-write: 0x800071ed <- 0x13ffe947 -mem-write: 0x800071f1 <- 0x13fd2787 -mem-write: 0x800071f5 <- 0x13001737 -mem-write: 0x800071f9 <- 0x33fff747 -mem-write: 0x800071fd <- 0x300ec07 -mem-write: 0x80007201 <- 0x13000747 -mem-write: 0x80007205 <- 0xe3001777 -mem-write: 0x80007209 <- 0x1380070c -mem-write: 0x8000720d <- 0x93ffe907 -mem-write: 0x80007211 <- 0x6f07f7f7 -mem-write: 0x80007215 <- 0x93fccff0 -mem-write: 0x80007219 <- 0xa3001787 -mem-write: 0x8000721d <- 0x6ffef70f -mem-write: 0x80007221 <- 0x13801ff0 -mem-write: 0x80007225 <- 0x930d0104 -mem-write: 0x80007229 <- 0x13000405 -mem-write: 0x8000722d <- 0xb707c105 -mem-write: 0x80007231 <- 0xef00004c -mem-write: 0x80007235 <- 0x939a9fd0 -mem-write: 0x80007239 <- 0x93000004 -mem-write: 0x8000723d <- 0x130e810b -mem-write: 0x80007241 <- 0x930cc109 -mem-write: 0x80007245 <- 0x930d210a -mem-write: 0x80007249 <- 0x83ffec8c -mem-write: 0x8000724d <- 0x930e8157 -mem-write: 0x80007251 <- 0x630077f7 -mem-write: 0x80007255 <- 0x130c079a -mem-write: 0x80007259 <- 0x930b4107 -mem-write: 0x8000725d <- 0x83000407 -mem-write: 0x80007261 <- 0x930007d6 -mem-write: 0x80007265 <- 0x13002787 -mem-write: 0x80007269 <- 0x23002707 -mem-write: 0x8000726d <- 0xe3fed71f -mem-write: 0x80007271 <- 0x13ff7798 -mem-write: 0x80007275 <- 0x230b4105 -mem-write: 0x80007279 <- 0xef0c0116 -mem-write: 0x8000727d <- 0x13f40fd0 -mem-write: 0x80007281 <- 0xef0b4105 -mem-write: 0x80007285 <- 0x13f38fd0 -mem-write: 0x80007289 <- 0x93000006 -mem-write: 0x8000728d <- 0x13000906 -mem-write: 0x80007291 <- 0x83000b87 -mem-write: 0x80007295 <- 0x830006d5 -mem-write: 0x80007299 <- 0x93000757 -mem-write: 0x8000729d <- 0x13ffe686 -mem-write: 0x800072a1 <- 0xb3ffe707 -mem-write: 0x800072a5 <- 0xb300b787 -mem-write: 0x800072a9 <- 0x1300c787 -mem-write: 0x800072ad <- 0x230107d6 -mem-write: 0x800072b1 <- 0x1300f691 -mem-write: 0x800072b5 <- 0xe3001676 -mem-write: 0x800072b9 <- 0x83fd571e -mem-write: 0x800072bd <- 0x30b6157 -mem-write: 0x800072c1 <- 0x930b8157 -mem-write: 0x800072c5 <- 0x23003787 -mem-write: 0x800072c9 <- 0x630af11b -mem-write: 0x800072cd <- 0x13020700 -mem-write: 0x800072d1 <- 0xef0b4105 -mem-write: 0x800072d5 <- 0x83ee8fd0 -mem-write: 0x800072d9 <- 0x30b6157 -mem-write: 0x800072dd <- 0x930b8157 -mem-write: 0x800072e1 <- 0x23001787 -mem-write: 0x800072e5 <- 0xe30af11b -mem-write: 0x800072e9 <- 0x83fe0714 -mem-write: 0x800072ed <- 0x630cc157 -mem-write: 0x800072f1 <- 0x8302079c -mem-write: 0x800072f5 <- 0x630b6157 -mem-write: 0x800072f9 <- 0x1302fce8 -mem-write: 0x800072fd <- 0x93000407 -mem-write: 0x80007301 <- 0x830b4107 -mem-write: 0x80007305 <- 0x930007d6 -mem-write: 0x80007309 <- 0x13002787 -mem-write: 0x8000730d <- 0x23002707 -mem-write: 0x80007311 <- 0xe3fed71f -mem-write: 0x80007315 <- 0x23ff2798 -mem-write: 0x80007319 <- 0x930e0114 -mem-write: 0x8000731d <- 0x93fff484 -mem-write: 0x80007321 <- 0xe3fd5007 -mem-write: 0x80007325 <- 0x93f2f494 -mem-write: 0x80007329 <- 0x1307c105 -mem-write: 0x8000732d <- 0xef000405 -mem-write: 0x80007331 <- 0x13be8fe0 -mem-write: 0x80007335 <- 0x6f160109 -mem-write: 0x80007339 <- 0x138f4ff0 -mem-write: 0x8000733d <- 0x9310c107 -mem-write: 0x80007341 <- 0x830f0107 -mem-write: 0x80007345 <- 0x30007d8 -mem-write: 0x80007349 <- 0x93000756 -mem-write: 0x8000734d <- 0x13002787 -mem-write: 0x80007351 <- 0x63002707 -mem-write: 0x80007355 <- 0x1302c898 -mem-write: 0x80007359 <- 0xe3106106 -mem-write: 0x8000735d <- 0x3fec794 -mem-write: 0x80007361 <- 0x830ec157 -mem-write: 0x80007365 <- 0x63108157 -mem-write: 0x80007369 <- 0x9306f702 -mem-write: 0x8000736d <- 0x13000c87 -mem-write: 0x80007371 <- 0x930e4107 -mem-write: 0x80007375 <- 0x23002787 -mem-write: 0x80007379 <- 0xe3fe079f -mem-write: 0x8000737d <- 0x6ffee79c -mem-write: 0x80007381 <- 0x63a8dff0 -mem-write: 0x80007385 <- 0x930d1666 -mem-write: 0x80007389 <- 0x13120107 -mem-write: 0x8000738d <- 0x6f104105 -mem-write: 0x80007391 <- 0x13d09ff0 -mem-write: 0x80007395 <- 0x13000007 -mem-write: 0x80007399 <- 0x30ee103 -mem-write: 0x8000739d <- 0x30007d8 -mem-write: 0x800073a1 <- 0x93000556 -mem-write: 0x800073a5 <- 0x13ffe787 -mem-write: 0x800073a9 <- 0x33ffe505 -mem-write: 0x800073ad <- 0x33010606 -mem-write: 0x800073b1 <- 0x1300e607 -mem-write: 0x800073b5 <- 0x23010756 -mem-write: 0x800073b9 <- 0x1300e791 -mem-write: 0x800073bd <- 0xe3001677 -mem-write: 0x800073c1 <- 0x13fc651e -mem-write: 0x800073c5 <- 0x6f000006 -mem-write: 0x800073c9 <- 0x13d15ff0 -mem-write: 0x800073cd <- 0x63000687 -mem-write: 0x800073d1 <- 0x83060692 -mem-write: 0x800073d5 <- 0x6310e117 -mem-write: 0x800073d9 <- 0x930407ce -mem-write: 0x800073dd <- 0x6f120106 -mem-write: 0x800073e1 <- 0x23020000 -mem-write: 0x800073e5 <- 0x1300f690 -mem-write: 0x800073e9 <- 0x13001717 -mem-write: 0x800073ed <- 0x93010717 -mem-write: 0x800073f1 <- 0x93ffe686 -mem-write: 0x800073f5 <- 0x1310a107 -mem-write: 0x800073f9 <- 0xe3010757 -VXDRV: upload 1024 bytes to 0x800073fd -mem-write: 0x800073fd <- 0x83cef688 -mem-write: 0x80007401 <- 0x130006d7 -mem-write: 0x80007405 <- 0x13010796 -mem-write: 0x80007409 <- 0x93410656 -mem-write: 0x8000740d <- 0x63001797 -mem-write: 0x80007411 <- 0x13000654 -mem-write: 0x80007415 <- 0x93001767 -mem-write: 0x80007419 <- 0x93010797 -mem-write: 0x8000741d <- 0x130107d7 -mem-write: 0x80007421 <- 0x93002776 -mem-write: 0x80007425 <- 0xe30017e5 -mem-write: 0x80007429 <- 0x23fa060e -mem-write: 0x8000742d <- 0x6f00b690 -mem-write: 0x80007431 <- 0x13fb9ff0 -mem-write: 0x80007435 <- 0x9310c106 -mem-write: 0x80007439 <- 0x63120107 -mem-write: 0x8000743d <- 0x63080712 -mem-write: 0x80007441 <- 0x308c782 -mem-write: 0x80007445 <- 0x13000657 -mem-write: 0x80007449 <- 0x6f002606 -mem-write: 0x8000744d <- 0x3ff1ff0 -mem-write: 0x80007451 <- 0x13024126 -mem-write: 0x80007455 <- 0x93108107 -mem-write: 0x80007459 <- 0x3120107 -mem-write: 0x8000745d <- 0x13000755 -mem-write: 0x80007461 <- 0x13002707 -mem-write: 0x80007465 <- 0x23002606 -mem-write: 0x80007469 <- 0xe3fea61f -mem-write: 0x8000746d <- 0x23fef718 -mem-write: 0x80007471 <- 0x1312011e -mem-write: 0x80007475 <- 0x13108106 -mem-write: 0x80007479 <- 0x130ec107 -mem-write: 0x8000747d <- 0x3104105 -mem-write: 0x80007481 <- 0x13000758 -mem-write: 0x80007485 <- 0x13002707 -mem-write: 0x80007489 <- 0x23002606 -mem-write: 0x8000748d <- 0xe3ff061f -mem-write: 0x80007491 <- 0x3fea718 -mem-write: 0x80007495 <- 0x23024127 -mem-write: 0x80007499 <- 0x93120110 -mem-write: 0x8000749d <- 0x130ec108 -mem-write: 0x800074a1 <- 0x313c106 -mem-write: 0x800074a5 <- 0x13000758 -mem-write: 0x800074a9 <- 0x93002707 -mem-write: 0x800074ad <- 0x23002888 -mem-write: 0x800074b1 <- 0xe3ff089f -mem-write: 0x800074b5 <- 0x23fec718 -mem-write: 0x800074b9 <- 0x6f100112 -mem-write: 0x800074bd <- 0x13bddff0 -mem-write: 0x800074c1 <- 0x23001685 -mem-write: 0x800074c5 <- 0x6f10a115 -mem-write: 0x800074c9 <- 0x3c25ff0 -mem-write: 0x800074cd <- 0x83008527 -mem-write: 0x800074d1 <- 0x300c527 -mem-write: 0x800074d5 <- 0x83000526 -mem-write: 0x800074d9 <- 0x13004526 -mem-write: 0x800074dd <- 0x13fc0101 -mem-write: 0x800074e1 <- 0x93000105 -mem-write: 0x800074e5 <- 0x23014105 -mem-write: 0x800074e9 <- 0x2300e124 -mem-write: 0x800074ed <- 0x2300f126 -mem-write: 0x800074f1 <- 0x2302112e -mem-write: 0x800074f5 <- 0x2300c120 -mem-write: 0x800074f9 <- 0xef00d122 -mem-write: 0x800074fd <- 0x83bf5fe0 -mem-write: 0x80007501 <- 0x13026157 -mem-write: 0x80007505 <- 0x93000005 -mem-write: 0x80007509 <- 0x13fff7c7 -mem-write: 0x8000750d <- 0x63011797 -mem-write: 0x80007511 <- 0x1300071a -mem-write: 0x80007515 <- 0xef014105 -mem-write: 0x80007519 <- 0x13e14fd0 -mem-write: 0x8000751d <- 0x13001535 -mem-write: 0x80007521 <- 0x83001505 -mem-write: 0x80007525 <- 0x1303c120 -mem-write: 0x80007529 <- 0x67040101 -mem-write: 0x8000752d <- 0x13000080 -mem-write: 0x80007531 <- 0x670f0505 -mem-write: 0x80007535 <- 0x13000080 -mem-write: 0x80007539 <- 0x67128185 -mem-write: 0x8000753d <- 0x13000080 -mem-write: 0x80007541 <- 0x67128185 -mem-write: 0x80007545 <- 0x13000080 -mem-write: 0x80007549 <- 0x23f90101 -mem-write: 0x8000754d <- 0x13068124 -mem-write: 0x80007551 <- 0x83000584 -mem-write: 0x80007555 <- 0x2300e595 -mem-write: 0x80007559 <- 0x23069122 -mem-write: 0x8000755d <- 0x23072120 -mem-write: 0x80007561 <- 0x93061126 -mem-write: 0x80007565 <- 0x13000604 -mem-write: 0x80007569 <- 0x63000689 -mem-write: 0x8000756d <- 0x130405ca -mem-write: 0x80007571 <- 0xef008106 -mem-write: 0x80007575 <- 0x63434060 -mem-write: 0x80007579 <- 0x3040544 -mem-write: 0x8000757d <- 0xb700c127 -mem-write: 0x80007581 <- 0x830000f7 -mem-write: 0x80007585 <- 0xb306c120 -mem-write: 0x80007589 <- 0x3700e7f7 -mem-write: 0x8000758d <- 0xb3ffffe7 -mem-write: 0x80007591 <- 0x300e787 -mem-write: 0x80007595 <- 0x93068124 -mem-write: 0x80007599 <- 0x230017b7 -mem-write: 0x8000759d <- 0x9300f920 -mem-write: 0x800075a1 <- 0x23400007 -mem-write: 0x800075a5 <- 0x3700f4a0 -mem-write: 0x800075a9 <- 0x83000015 -mem-write: 0x800075ad <- 0x3064124 -mem-write: 0x800075b1 <- 0x13060129 -mem-write: 0x800075b5 <- 0x13800505 -mem-write: 0x800075b9 <- 0x67070101 -mem-write: 0x800075bd <- 0x83000080 -mem-write: 0x800075c1 <- 0x2300c457 -mem-write: 0x800075c5 <- 0x93000920 -mem-write: 0x800075c9 <- 0x630807f7 -mem-write: 0x800075cd <- 0x83020784 -mem-write: 0x800075d1 <- 0x306c120 -mem-write: 0x800075d5 <- 0x93068124 -mem-write: 0x800075d9 <- 0x23040007 -mem-write: 0x800075dd <- 0x300f4a0 -mem-write: 0x800075e1 <- 0x83060129 -mem-write: 0x800075e5 <- 0x13064124 -mem-write: 0x800075e9 <- 0x13000005 -mem-write: 0x800075ed <- 0x67070101 -mem-write: 0x800075f1 <- 0x83000080 -mem-write: 0x800075f5 <- 0x306c120 -mem-write: 0x800075f9 <- 0x93068124 -mem-write: 0x800075fd <- 0x23400007 -mem-write: 0x80007601 <- 0x300f4a0 -mem-write: 0x80007605 <- 0x83060129 -mem-write: 0x80007609 <- 0x13064124 -mem-write: 0x8000760d <- 0x13000005 -mem-write: 0x80007611 <- 0x67070101 -mem-write: 0x80007615 <- 0x83000080 -mem-write: 0x80007619 <- 0x1300c5d7 -mem-write: 0x8000761d <- 0x23fe0101 -mem-write: 0x80007621 <- 0x2300812c -mem-write: 0x80007625 <- 0x2300112e -mem-write: 0x80007629 <- 0x2300912a -mem-write: 0x8000762d <- 0x93012128 -mem-write: 0x80007631 <- 0x130027f7 -mem-write: 0x80007635 <- 0x63000584 -mem-write: 0x80007639 <- 0x93020788 -mem-write: 0x8000763d <- 0x23043587 -mem-write: 0x80007641 <- 0x2300f5a0 -mem-write: 0x80007645 <- 0x9300f5a8 -mem-write: 0x80007649 <- 0x23001007 -mem-write: 0x8000764d <- 0x8300f5aa -mem-write: 0x80007651 <- 0x301c120 -mem-write: 0x80007655 <- 0x83018124 -mem-write: 0x80007659 <- 0x3014124 -mem-write: 0x8000765d <- 0x13010129 -mem-write: 0x80007661 <- 0x67020101 -mem-write: 0x80007665 <- 0x93000080 -mem-write: 0x80007669 <- 0x1300c106 -mem-write: 0x8000766d <- 0x93008106 -mem-write: 0x80007671 <- 0xef000504 -mem-write: 0x80007675 <- 0x83ed5ff0 -mem-write: 0x80007679 <- 0x13008125 -mem-write: 0x8000767d <- 0x13000509 -mem-write: 0x80007681 <- 0xef000485 -mem-write: 0x80007685 <- 0x830b4000 -mem-write: 0x80007689 <- 0x6300c417 -mem-write: 0x8000768d <- 0x37040508 -mem-write: 0x80007691 <- 0x13800047 -mem-write: 0x80007695 <- 0x230e0707 -mem-write: 0x80007699 <- 0x302e4ae -mem-write: 0x8000769d <- 0x83008127 -mem-write: 0x800076a1 <- 0x9300c126 -mem-write: 0x800076a5 <- 0x230807e7 -mem-write: 0x800076a9 <- 0x2300f416 -mem-write: 0x800076ad <- 0x2300a420 -mem-write: 0x800076b1 <- 0x2300a428 -mem-write: 0x800076b5 <- 0x6300e42a -mem-write: 0x800076b9 <- 0xb3040698 -mem-write: 0x800076bd <- 0x830127e7 -mem-write: 0x800076c1 <- 0x2301c120 -mem-write: 0x800076c5 <- 0x300f416 -mem-write: 0x800076c9 <- 0x83018124 -mem-write: 0x800076cd <- 0x3014124 -mem-write: 0x800076d1 <- 0x13010129 -mem-write: 0x800076d5 <- 0x67020101 -mem-write: 0x800076d9 <- 0x13000080 -mem-write: 0x800076dd <- 0xe32007f7 -mem-write: 0x800076e1 <- 0x93f60718 -mem-write: 0x800076e5 <- 0x93ffc7f7 -mem-write: 0x800076e9 <- 0x130027e7 -mem-write: 0x800076ed <- 0x23043407 -mem-write: 0x800076f1 <- 0x9300f416 -mem-write: 0x800076f5 <- 0x23001007 -mem-write: 0x800076f9 <- 0x2300e420 -mem-write: 0x800076fd <- 0x2300e428 -mem-write: 0x80007701 <- 0x6f00f42a -mem-write: 0x80007705 <- 0x83f4dff0 -mem-write: 0x80007709 <- 0x1300e415 -mem-write: 0x8000770d <- 0xef000485 -mem-write: 0x80007711 <- 0x637a4060 -mem-write: 0x80007715 <- 0x83000516 -mem-write: 0x80007719 <- 0x6f00c417 -mem-write: 0x8000771d <- 0x3fa1ff0 -mem-write: 0x80007721 <- 0x1300c457 -mem-write: 0x80007725 <- 0x13ffc777 -mem-write: 0x80007729 <- 0x93001767 -mem-write: 0x8000772d <- 0x93010717 -mem-write: 0x80007731 <- 0x6f4107d7 -mem-write: 0x80007735 <- 0x13f89ff0 -mem-write: 0x80007739 <- 0x23fd0101 -mem-write: 0x8000773d <- 0x2301312e -mem-write: 0x80007741 <- 0x23021126 -mem-write: 0x80007745 <- 0x23028124 -mem-write: 0x80007749 <- 0x23029122 -mem-write: 0x8000774d <- 0x23032120 -mem-write: 0x80007751 <- 0x2301412c -mem-write: 0x80007755 <- 0x2301512a -mem-write: 0x80007759 <- 0x23016128 -mem-write: 0x8000775d <- 0x23017126 -mem-write: 0x80007761 <- 0x23018124 -mem-write: 0x80007765 <- 0x93019122 -mem-write: 0x80007769 <- 0x1300b587 -mem-write: 0x8000776d <- 0x93016007 -mem-write: 0x80007771 <- 0x63000509 -mem-write: 0x80007775 <- 0x9306f764 -mem-write: 0x80007779 <- 0x63010007 -mem-write: 0x8000777d <- 0xef1eb7e2 -mem-write: 0x80007781 <- 0x93025000 -mem-write: 0x80007785 <- 0x13010004 -mem-write: 0x80007789 <- 0x93002006 -mem-write: 0x8000778d <- 0x13018007 -mem-write: 0x80007791 <- 0xb3c30189 -mem-write: 0x80007795 <- 0x300f907 -mem-write: 0x80007799 <- 0x130047a4 -mem-write: 0x8000779d <- 0x63ff8787 -mem-write: 0x800077a1 <- 0x8320e408 -mem-write: 0x800077a5 <- 0x83004427 -mem-write: 0x800077a9 <- 0x300c426 -mem-write: 0x800077ad <- 0x93008426 -mem-write: 0x800077b1 <- 0xb3ffc7f7 -mem-write: 0x800077b5 <- 0x300f407 -mem-write: 0x800077b9 <- 0x230047a7 -mem-write: 0x800077bd <- 0x2300d626 -mem-write: 0x800077c1 <- 0x1300c6a4 -mem-write: 0x800077c5 <- 0x13001767 -mem-write: 0x800077c9 <- 0x23000985 -mem-write: 0x800077cd <- 0xef00e7a2 -mem-write: 0x800077d1 <- 0x137d8000 -mem-write: 0x800077d5 <- 0x6f008405 -mem-write: 0x800077d9 <- 0x93194000 -mem-write: 0x800077dd <- 0x63ff87f4 -mem-write: 0x800077e1 <- 0x631807c0 -mem-write: 0x800077e5 <- 0xef16b4ee -mem-write: 0x800077e9 <- 0x937bc000 -mem-write: 0x800077ed <- 0x631f7007 -mem-write: 0x800077f1 <- 0x934497fa -mem-write: 0x800077f5 <- 0x630094d7 -mem-write: 0x800077f9 <- 0x131a0784 -VXDRV: upload 1024 bytes to 0x800077fd -mem-write: 0x800077fd <- 0x63004007 -mem-write: 0x80007801 <- 0x933cf760 -mem-write: 0x80007805 <- 0x130064d7 -mem-write: 0x80007809 <- 0x13039786 -mem-write: 0x8000780d <- 0x93038785 -mem-write: 0x80007811 <- 0x13003616 -mem-write: 0x80007815 <- 0xb3c30189 -mem-write: 0x80007819 <- 0x300d906 -mem-write: 0x8000781d <- 0x930046a4 -mem-write: 0x80007821 <- 0x63ff8686 -mem-write: 0x80007825 <- 0x93028686 -mem-write: 0x80007829 <- 0x6f00f005 -mem-write: 0x8000782d <- 0x63010000 -mem-write: 0x80007831 <- 0x3320752 -mem-write: 0x80007835 <- 0x6300c424 -mem-write: 0x80007839 <- 0x8300868c -mem-write: 0x8000783d <- 0x93004427 -mem-write: 0x80007841 <- 0x33ffc7f7 -mem-write: 0x80007845 <- 0xe3409787 -mem-write: 0x80007849 <- 0x13fee5d4 -mem-write: 0x8000784d <- 0x3000506 -mem-write: 0x80007851 <- 0x93010924 -mem-write: 0x80007855 <- 0x63008908 -mem-write: 0x80007859 <- 0x3171408 -mem-write: 0x8000785d <- 0x93004425 -mem-write: 0x80007861 <- 0x1300f006 -mem-write: 0x80007865 <- 0xb3ffc575 -mem-write: 0x80007869 <- 0x63409507 -mem-write: 0x8000786d <- 0x2340f6c2 -mem-write: 0x80007871 <- 0x2301192a -mem-write: 0x80007875 <- 0x63011928 -mem-write: 0x80007879 <- 0x933c07dc -mem-write: 0x8000787d <- 0x631ff007 -mem-write: 0x80007881 <- 0x932ea7e0 -mem-write: 0x80007885 <- 0x93ff8577 -mem-write: 0x80007889 <- 0x83008787 -mem-write: 0x8000788d <- 0xb3004925 -mem-write: 0x80007891 <- 0x8300f907 -mem-write: 0x80007895 <- 0x130007a6 -mem-write: 0x80007899 <- 0x13005555 -mem-write: 0x8000789d <- 0x33001007 -mem-write: 0x800078a1 <- 0x3300a717 -mem-write: 0x800078a5 <- 0x9300b767 -mem-write: 0x800078a9 <- 0x23ff8785 -mem-write: 0x800078ad <- 0x2300b426 -mem-write: 0x800078b1 <- 0x2300d424 -mem-write: 0x800078b5 <- 0x2300e922 -mem-write: 0x800078b9 <- 0x230087a0 -mem-write: 0x800078bd <- 0x930086a6 -mem-write: 0x800078c1 <- 0x93402657 -mem-write: 0x800078c5 <- 0xb3001005 -mem-write: 0x800078c9 <- 0x6300f595 -mem-write: 0x800078cd <- 0xb310b768 -mem-write: 0x800078d1 <- 0x6300e5f7 -mem-write: 0x800078d5 <- 0x93020794 -mem-write: 0x800078d9 <- 0x13001595 -mem-write: 0x800078dd <- 0xb3ffc676 -mem-write: 0x800078e1 <- 0x1300e5f7 -mem-write: 0x800078e5 <- 0x63004606 -mem-write: 0x800078e9 <- 0x9300079a -mem-write: 0x800078ed <- 0xb3001595 -mem-write: 0x800078f1 <- 0x1300e5f7 -mem-write: 0x800078f5 <- 0xe3004606 -mem-write: 0x800078f9 <- 0x13fe078a -mem-write: 0x800078fd <- 0x1300f008 -mem-write: 0x80007901 <- 0x33003613 -mem-write: 0x80007905 <- 0x13006903 -mem-write: 0x80007909 <- 0x83000305 -mem-write: 0x8000790d <- 0x1300c527 -mem-write: 0x80007911 <- 0x6300060e -mem-write: 0x80007915 <- 0x32cf508 -mem-write: 0x80007919 <- 0x130047a7 -mem-write: 0x8000791d <- 0x83000784 -mem-write: 0x80007921 <- 0x1300c7a7 -mem-write: 0x80007925 <- 0xb3ffc777 -mem-write: 0x80007929 <- 0x63409706 -mem-write: 0x8000792d <- 0xe32cd848 -mem-write: 0x80007931 <- 0x33fe06c2 -mem-write: 0x80007935 <- 0x8300e407 -mem-write: 0x80007939 <- 0x3004726 -mem-write: 0x8000793d <- 0x13008426 -mem-write: 0x80007941 <- 0x93000985 -mem-write: 0x80007945 <- 0x230016e6 -mem-write: 0x80007949 <- 0x2300d722 -mem-write: 0x8000794d <- 0x2300f626 -mem-write: 0x80007951 <- 0xef00c7a4 -mem-write: 0x80007955 <- 0x13654000 -mem-write: 0x80007959 <- 0x6f008405 -mem-write: 0x8000795d <- 0x93010000 -mem-write: 0x80007961 <- 0x2300c007 -mem-write: 0x80007965 <- 0x1300f9a0 -mem-write: 0x80007969 <- 0x83000005 -mem-write: 0x8000796d <- 0x302c120 -mem-write: 0x80007971 <- 0x83028124 -mem-write: 0x80007975 <- 0x3024124 -mem-write: 0x80007979 <- 0x83020129 -mem-write: 0x8000797d <- 0x301c129 -mem-write: 0x80007981 <- 0x8301812a -mem-write: 0x80007985 <- 0x301412a -mem-write: 0x80007989 <- 0x8301012b -mem-write: 0x8000798d <- 0x300c12b -mem-write: 0x80007991 <- 0x8300812c -mem-write: 0x80007995 <- 0x1300412c -mem-write: 0x80007999 <- 0x67030101 -mem-write: 0x8000799d <- 0x93000080 -mem-write: 0x800079a1 <- 0x13200006 -mem-write: 0x800079a5 <- 0x13040006 -mem-write: 0x800079a9 <- 0x6f03f005 -mem-write: 0x800079ad <- 0x3e69ff0 -mem-write: 0x800079b1 <- 0x1300c7a4 -mem-write: 0x800079b5 <- 0xe3002606 -mem-write: 0x800079b9 <- 0x3de8796 -mem-write: 0x800079bd <- 0x93010924 -mem-write: 0x800079c1 <- 0xe3008908 -mem-write: 0x800079c5 <- 0x3e9141c -mem-write: 0x800079c9 <- 0x93004927 -mem-write: 0x800079cd <- 0x93402657 -mem-write: 0x800079d1 <- 0xb3001005 -mem-write: 0x800079d5 <- 0xe300f595 -mem-write: 0x800079d9 <- 0x3eeb77c -mem-write: 0x800079dd <- 0x83008924 -mem-write: 0x800079e1 <- 0x1300442a -mem-write: 0x800079e5 <- 0x63ffcafb -mem-write: 0x800079e9 <- 0xb3009b68 -mem-write: 0x800079ed <- 0x13409b07 -mem-write: 0x800079f1 <- 0x6300f007 -mem-write: 0x800079f5 <- 0x8312f74c -mem-write: 0x800079f9 <- 0x31f01aa -mem-write: 0x800079fd <- 0x931dc1a7 -mem-write: 0x80007a01 <- 0x33fff007 -mem-write: 0x80007a05 <- 0xb301640a -mem-write: 0x80007a09 <- 0x6301548a -mem-write: 0x80007a0d <- 0xb734f704 -mem-write: 0x80007a11 <- 0x93000017 -mem-write: 0x80007a15 <- 0xb300f787 -mem-write: 0x80007a19 <- 0xb700fa8a -mem-write: 0x80007a1d <- 0xb3fffff7 -mem-write: 0x80007a21 <- 0x9300fafa -mem-write: 0x80007a25 <- 0x13000a85 -mem-write: 0x80007a29 <- 0xef000985 -mem-write: 0x80007a2d <- 0x93774010 -mem-write: 0x80007a31 <- 0x93fff007 -mem-write: 0x80007a35 <- 0x6300050b -mem-write: 0x80007a39 <- 0x6328f506 -mem-write: 0x80007a3d <- 0x13294562 -mem-write: 0x80007a41 <- 0x831f818c -mem-write: 0x80007a45 <- 0xb3000c25 -mem-write: 0x80007a49 <- 0x2300ba85 -mem-write: 0x80007a4d <- 0x9300bc20 -mem-write: 0x80007a51 <- 0x63000587 -mem-write: 0x80007a55 <- 0x8338aa0e -mem-write: 0x80007a59 <- 0x131dc1a6 -mem-write: 0x80007a5d <- 0x63fff007 -mem-write: 0x80007a61 <- 0x333ae686 -mem-write: 0x80007a65 <- 0xb3414b8a -mem-write: 0x80007a69 <- 0x2300fa07 -mem-write: 0x80007a6d <- 0x9300fc20 -mem-write: 0x80007a71 <- 0x63007bfc -mem-write: 0x80007a75 <- 0xb7300c82 -mem-write: 0x80007a79 <- 0xb3000017 -mem-write: 0x80007a7d <- 0x93419b8b -mem-write: 0x80007a81 <- 0x93008785 -mem-write: 0x80007a85 <- 0xb3008b8b -mem-write: 0x80007a89 <- 0xb3419585 -mem-write: 0x80007a8d <- 0x93015b8a -mem-write: 0x80007a91 <- 0xb3fff787 -mem-write: 0x80007a95 <- 0x33415585 -mem-write: 0x80007a99 <- 0x9300f5fa -mem-write: 0x80007a9d <- 0x13000a05 -mem-write: 0x80007aa1 <- 0xef000985 -mem-write: 0x80007aa5 <- 0x936fc010 -mem-write: 0x80007aa9 <- 0x63fff007 -mem-write: 0x80007aad <- 0x333af50a -mem-write: 0x80007ab1 <- 0xb3417505 -mem-write: 0x80007ab5 <- 0x8301450a -mem-write: 0x80007ab9 <- 0x23000c25 -mem-write: 0x80007abd <- 0x93017924 -mem-write: 0x80007ac1 <- 0xb3001aea -mem-write: 0x80007ac5 <- 0x2300ba05 -mem-write: 0x80007ac9 <- 0x2300bc20 -mem-write: 0x80007acd <- 0x63015ba2 -mem-write: 0x80007ad1 <- 0x93352402 -mem-write: 0x80007ad5 <- 0x6300f006 -mem-write: 0x80007ad9 <- 0x33566f2 -mem-write: 0x80007add <- 0x93004427 -mem-write: 0x80007ae1 <- 0x93ff4b07 -mem-write: 0x80007ae5 <- 0x13ff87f7 -mem-write: 0x80007ae9 <- 0x33001777 -mem-write: 0x80007aed <- 0x2300f767 -mem-write: 0x80007af1 <- 0x1300e422 -mem-write: 0x80007af5 <- 0x33005006 -mem-write: 0x80007af9 <- 0x2300f407 -mem-write: 0x80007afd <- 0x2300c722 -mem-write: 0x80007b01 <- 0x6300c724 -mem-write: 0x80007b05 <- 0x8336f6e8 -mem-write: 0x80007b09 <- 0x13004baa -mem-write: 0x80007b0d <- 0x3000b84 -mem-write: 0x80007b11 <- 0x631ec1a7 -mem-write: 0x80007b15 <- 0x2300b774 -mem-write: 0x80007b19 <- 0x31eb1a6 -mem-write: 0x80007b1d <- 0x631e81a7 -mem-write: 0x80007b21 <- 0x231ab776 -mem-write: 0x80007b25 <- 0x6f1eb1a4 -mem-write: 0x80007b29 <- 0x131a4000 -mem-write: 0x80007b2d <- 0x230014e7 -mem-write: 0x80007b31 <- 0xb300e422 -mem-write: 0x80007b35 <- 0x23009404 -mem-write: 0x80007b39 <- 0x93009924 -mem-write: 0x80007b3d <- 0x130017e7 -mem-write: 0x80007b41 <- 0x23000985 -mem-write: 0x80007b45 <- 0xef00f4a2 -mem-write: 0x80007b49 <- 0x13460000 -mem-write: 0x80007b4d <- 0x6f008405 -mem-write: 0x80007b51 <- 0x83e1dff0 -mem-write: 0x80007b55 <- 0x300c426 -mem-write: 0x80007b59 <- 0x6f008426 -mem-write: 0x80007b5d <- 0x93c59ff0 -mem-write: 0x80007b61 <- 0x13009557 -mem-write: 0x80007b65 <- 0x63004007 -mem-write: 0x80007b69 <- 0x1314f772 -mem-write: 0x80007b6d <- 0x63014007 -mem-write: 0x80007b71 <- 0x9322f76a -mem-write: 0x80007b75 <- 0x9305c786 -mem-write: 0x80007b79 <- 0x9305b785 -mem-write: 0x80007b7d <- 0xb3003696 -mem-write: 0x80007b81 <- 0x8300d906 -mem-write: 0x80007b85 <- 0x930006a7 -mem-write: 0x80007b89 <- 0x63ff8686 -mem-write: 0x80007b8d <- 0x31cf688 -mem-write: 0x80007b91 <- 0x130047a7 -mem-write: 0x80007b95 <- 0x63ffc777 -mem-write: 0x80007b99 <- 0x8300e576 -mem-write: 0x80007b9d <- 0xe30087a7 -mem-write: 0x80007ba1 <- 0x83fef698 -mem-write: 0x80007ba5 <- 0x300c7a6 -mem-write: 0x80007ba9 <- 0x23004927 -mem-write: 0x80007bad <- 0x2300d426 -mem-write: 0x80007bb1 <- 0x2300f424 -mem-write: 0x80007bb5 <- 0x230086a4 -mem-write: 0x80007bb9 <- 0x6f0087a6 -mem-write: 0x80007bbd <- 0x13d05ff0 -mem-write: 0x80007bc1 <- 0x63014007 -mem-write: 0x80007bc5 <- 0x1312f776 -mem-write: 0x80007bc9 <- 0x63054007 -mem-write: 0x80007bcd <- 0x931ef76a -mem-write: 0x80007bd1 <- 0x1300c4d7 -mem-write: 0x80007bd5 <- 0x1306f786 -mem-write: 0x80007bd9 <- 0x9306e785 -mem-write: 0x80007bdd <- 0x6f003616 -mem-write: 0x80007be1 <- 0x13c35ff0 -mem-write: 0x80007be5 <- 0x93001e0e -mem-write: 0x80007be9 <- 0x13003e77 -mem-write: 0x80007bed <- 0x63008505 -mem-write: 0x80007bf1 <- 0x8310078e -mem-write: 0x80007bf5 <- 0x6f00c527 -mem-write: 0x80007bf9 <- 0x3d1dff0 -VXDRV: upload 1023 bytes to 0x80007bfd -mem-write: 0x80007bfd <- 0x93008426 -mem-write: 0x80007c01 <- 0x230014e5 -mem-write: 0x80007c05 <- 0x2300b422 -mem-write: 0x80007c09 <- 0x2300f626 -mem-write: 0x80007c0d <- 0xb300c7a4 -mem-write: 0x80007c11 <- 0x23009404 -mem-write: 0x80007c15 <- 0x2300992a -mem-write: 0x80007c19 <- 0x93009928 -mem-write: 0x80007c1d <- 0x230016e7 -mem-write: 0x80007c21 <- 0x230114a6 -mem-write: 0x80007c25 <- 0x230114a4 -mem-write: 0x80007c29 <- 0x3300f4a2 -mem-write: 0x80007c2d <- 0x1300e407 -mem-write: 0x80007c31 <- 0x23000985 -mem-write: 0x80007c35 <- 0xef00d720 -mem-write: 0x80007c39 <- 0x13370000 -mem-write: 0x80007c3d <- 0x6f008405 -mem-write: 0x80007c41 <- 0x13d2dff0 -mem-write: 0x80007c45 <- 0x930034d6 -mem-write: 0x80007c49 <- 0x6f008487 -mem-write: 0x80007c4d <- 0x33b45ff0 -mem-write: 0x80007c51 <- 0x8300a407 -mem-write: 0x80007c55 <- 0x13004727 -mem-write: 0x80007c59 <- 0x93000985 -mem-write: 0x80007c5d <- 0x230017e7 -mem-write: 0x80007c61 <- 0xef00f722 -mem-write: 0x80007c65 <- 0x13344000 -mem-write: 0x80007c69 <- 0x6f008405 -mem-write: 0x80007c6d <- 0x13d01ff0 -mem-write: 0x80007c71 <- 0x230014e7 -mem-write: 0x80007c75 <- 0xb300e422 -mem-write: 0x80007c79 <- 0x23009404 -mem-write: 0x80007c7d <- 0x2300992a -mem-write: 0x80007c81 <- 0x13009928 -mem-write: 0x80007c85 <- 0x230017e7 -mem-write: 0x80007c89 <- 0x230114a6 -mem-write: 0x80007c8d <- 0x230114a4 -mem-write: 0x80007c91 <- 0x3300e4a2 -mem-write: 0x80007c95 <- 0x2300a405 -mem-write: 0x80007c99 <- 0x1300f520 -mem-write: 0x80007c9d <- 0xef000985 -mem-write: 0x80007ca1 <- 0x13308000 -mem-write: 0x80007ca5 <- 0x6f008405 -mem-write: 0x80007ca9 <- 0x93cc5ff0 -mem-write: 0x80007cad <- 0x93006557 -mem-write: 0x80007cb1 <- 0x93039786 -mem-write: 0x80007cb5 <- 0x93038785 -mem-write: 0x80007cb9 <- 0x6f003696 -mem-write: 0x80007cbd <- 0x63ec5ff0 -mem-write: 0x80007cc1 <- 0x311240e -mem-write: 0x80007cc5 <- 0x83008924 -mem-write: 0x80007cc9 <- 0x9300442a -mem-write: 0x80007ccd <- 0xb3ffcafa -mem-write: 0x80007cd1 <- 0x63409a87 -mem-write: 0x80007cd5 <- 0x13009ae6 -mem-write: 0x80007cd9 <- 0xe300f007 -mem-write: 0x80007cdd <- 0x13e4f748 -mem-write: 0x80007ce1 <- 0xef000985 -mem-write: 0x80007ce5 <- 0x132c4000 -mem-write: 0x80007ce9 <- 0x6f000005 -mem-write: 0x80007ced <- 0x13c81ff0 -mem-write: 0x80007cf1 <- 0x1305c786 -mem-write: 0x80007cf5 <- 0x9305b785 -mem-write: 0x80007cf9 <- 0x6f003616 -mem-write: 0x80007cfd <- 0x83b19ff0 -mem-write: 0x80007d01 <- 0x13008327 -mem-write: 0x80007d05 <- 0x63fff606 -mem-write: 0x80007d09 <- 0x931c6790 -mem-write: 0x80007d0d <- 0x13003677 -mem-write: 0x80007d11 <- 0xe3ff8303 -mem-write: 0x80007d15 <- 0x3fe0796 -mem-write: 0x80007d19 <- 0x93004927 -mem-write: 0x80007d1d <- 0xb3fff5c7 -mem-write: 0x80007d21 <- 0x2300e7f7 -mem-write: 0x80007d25 <- 0x9300f922 -mem-write: 0x80007d29 <- 0xe3001595 -mem-write: 0x80007d2d <- 0xe3cab7e8 -mem-write: 0x80007d31 <- 0x33ca0586 -mem-write: 0x80007d35 <- 0x6300f5f7 -mem-write: 0x80007d39 <- 0x9300071a -mem-write: 0x80007d3d <- 0x33001595 -mem-write: 0x80007d41 <- 0x1300f5f7 -mem-write: 0x80007d45 <- 0xe3004e0e -mem-write: 0x80007d49 <- 0x13fe070a -mem-write: 0x80007d4d <- 0x6f000e06 -mem-write: 0x80007d51 <- 0x93bb1ff0 -mem-write: 0x80007d55 <- 0x6f010a8a -mem-write: 0x80007d59 <- 0x3ccdff0 -mem-write: 0x80007d5d <- 0x93004925 -mem-write: 0x80007d61 <- 0x134025d5 -mem-write: 0x80007d65 <- 0x33001007 -mem-write: 0x80007d69 <- 0x3300b717 -mem-write: 0x80007d6d <- 0x2300a767 -mem-write: 0x80007d71 <- 0x6f00e922 -mem-write: 0x80007d75 <- 0xb3e39ff0 -mem-write: 0x80007d79 <- 0xb3015b85 -mem-write: 0x80007d7d <- 0x9340b005 -mem-write: 0x80007d81 <- 0x13014595 -mem-write: 0x80007d85 <- 0x930145da -mem-write: 0x80007d89 <- 0x13000a05 -mem-write: 0x80007d8d <- 0xef000985 -mem-write: 0x80007d91 <- 0x93410010 -mem-write: 0x80007d95 <- 0xe3fff007 -mem-write: 0x80007d99 <- 0x13d0f51c -mem-write: 0x80007d9d <- 0x6f00000a -mem-write: 0x80007da1 <- 0x13d19ff0 -mem-write: 0x80007da5 <- 0x63054007 -mem-write: 0x80007da9 <- 0x9308f760 -mem-write: 0x80007dad <- 0x9300c557 -mem-write: 0x80007db1 <- 0x9306f786 -mem-write: 0x80007db5 <- 0x9306e785 -mem-write: 0x80007db9 <- 0x6f003696 -mem-write: 0x80007dbd <- 0x13dc5ff0 -mem-write: 0x80007dc1 <- 0x63154007 -mem-write: 0x80007dc5 <- 0x9308f760 -mem-write: 0x80007dc9 <- 0x1300f4d7 -mem-write: 0x80007dcd <- 0x13078786 -mem-write: 0x80007dd1 <- 0x93077785 -mem-write: 0x80007dd5 <- 0x6f003616 -mem-write: 0x80007dd9 <- 0x13a3dff0 -mem-write: 0x80007ddd <- 0x831f818c -mem-write: 0x80007de1 <- 0xb3000c27 -mem-write: 0x80007de5 <- 0x2300fa87 -mem-write: 0x80007de9 <- 0x6f00fc20 -mem-write: 0x80007ded <- 0x13c6dff0 -mem-write: 0x80007df1 <- 0xe3014a17 -mem-write: 0x80007df5 <- 0x3c60712 -mem-write: 0x80007df9 <- 0xb3008924 -mem-write: 0x80007dfd <- 0x93015b0a -mem-write: 0x80007e01 <- 0x23001aea -mem-write: 0x80007e05 <- 0x6f015422 -mem-write: 0x80007e09 <- 0x23d09ff0 -mem-write: 0x80007e0d <- 0x6f1d71ae -mem-write: 0x80007e11 <- 0x13c61ff0 -mem-write: 0x80007e15 <- 0x6f000b84 -mem-write: 0x80007e19 <- 0x93cf9ff0 -mem-write: 0x80007e1d <- 0x23001007 -mem-write: 0x80007e21 <- 0x6f00fba2 -mem-write: 0x80007e25 <- 0x13ebdff0 -mem-write: 0x80007e29 <- 0x63154007 -mem-write: 0x80007e2d <- 0x9306f762 -mem-write: 0x80007e31 <- 0x9300f557 -mem-write: 0x80007e35 <- 0x93078786 -mem-write: 0x80007e39 <- 0x93077785 -mem-write: 0x80007e3d <- 0x6f003696 -mem-write: 0x80007e41 <- 0x13d41ff0 -mem-write: 0x80007e45 <- 0x63554007 -mem-write: 0x80007e49 <- 0x9306f762 -mem-write: 0x80007e4d <- 0x130124d7 -mem-write: 0x80007e51 <- 0x1307d786 -mem-write: 0x80007e55 <- 0x9307c785 -mem-write: 0x80007e59 <- 0x6f003616 -mem-write: 0x80007e5d <- 0x939b9ff0 -mem-write: 0x80007e61 <- 0xb3ff8c8c -mem-write: 0x80007e65 <- 0xb3019a8a -mem-write: 0x80007e69 <- 0x13417a8a -mem-write: 0x80007e6d <- 0x6f00000a -mem-write: 0x80007e71 <- 0x93c49ff0 -mem-write: 0x80007e75 <- 0x13008405 -mem-write: 0x80007e79 <- 0xef000985 -mem-write: 0x80007e7d <- 0x3ee8fc0 -mem-write: 0x80007e81 <- 0x83008924 -mem-write: 0x80007e85 <- 0x83000c25 -mem-write: 0x80007e89 <- 0x6f00442a -mem-write: 0x80007e8d <- 0x13c85ff0 -mem-write: 0x80007e91 <- 0x63554007 -mem-write: 0x80007e95 <- 0x9302f764 -mem-write: 0x80007e99 <- 0x93012557 -mem-write: 0x80007e9d <- 0x9307d786 -mem-write: 0x80007ea1 <- 0x9307c785 -mem-write: 0x80007ea5 <- 0x6f003696 -mem-write: 0x80007ea9 <- 0x93cd9ff0 -mem-write: 0x80007ead <- 0x133f8006 -mem-write: 0x80007eb1 <- 0x1307f006 -mem-write: 0x80007eb5 <- 0x6f07e005 -mem-write: 0x80007eb9 <- 0x9395dff0 -mem-write: 0x80007ebd <- 0x933f8006 -mem-write: 0x80007ec1 <- 0x6f07e005 -mem-write: 0x80007ec5 <- 0x83cbdff0 -mem-write: 0x80007ec9 <- 0x6f004927 -mem-write: 0x80007ecd <- 0x93e5dff0 -mem-write: 0x80007ed1 <- 0x93003577 -mem-write: 0x80007ed5 <- 0x630ff5f6 -mem-write: 0x80007ed9 <- 0x9302078a -mem-write: 0x80007edd <- 0x63fff607 -mem-write: 0x80007ee1 <- 0x1302060e -mem-write: 0x80007ee5 <- 0x6ffff006 -mem-write: 0x80007ee9 <- 0x13018000 -mem-write: 0x80007eed <- 0x13001505 -mem-write: 0x80007ef1 <- 0x63003577 -mem-write: 0x80007ef5 <- 0x9300070e -mem-write: 0x80007ef9 <- 0x63fff787 -mem-write: 0x80007efd <- 0x302c780 -mem-write: 0x80007f01 <- 0xe3000547 -mem-write: 0x80007f05 <- 0x67fed714 -mem-write: 0x80007f09 <- 0x93000080 -mem-write: 0x80007f0d <- 0x13000607 -mem-write: 0x80007f11 <- 0x63003007 -mem-write: 0x80007f15 <- 0x6302f766 -mem-write: 0x80007f19 <- 0x13000796 -mem-write: 0x80007f1d <- 0x67000005 -mem-write: 0x80007f21 <- 0xb3000080 -mem-write: 0x80007f25 <- 0x6f00f507 -mem-write: 0x80007f29 <- 0x1300c000 -mem-write: 0x80007f2d <- 0xe3001505 -mem-write: 0x80007f31 <- 0x3fea786 -mem-write: 0x80007f35 <- 0xe3000547 -mem-write: 0x80007f39 <- 0x67fed71a -mem-write: 0x80007f3d <- 0x37000080 -mem-write: 0x80007f41 <- 0x93000107 -mem-write: 0x80007f45 <- 0x13008598 -mem-write: 0x80007f49 <- 0xb3fff707 -mem-write: 0x80007f4d <- 0x9300e8f8 -mem-write: 0x80007f51 <- 0xb30ff5f5 -mem-write: 0x80007f55 <- 0x9300b8e5 -mem-write: 0x80007f59 <- 0xb3010598 -mem-write: 0x80007f5d <- 0x3700b8e8 -mem-write: 0x80007f61 <- 0xb7feff08 -mem-write: 0x80007f65 <- 0x13808085 -mem-write: 0x80007f69 <- 0x93eff808 -mem-write: 0x80007f6d <- 0x13080585 -mem-write: 0x80007f71 <- 0x3003003 -mem-write: 0x80007f75 <- 0x33000527 -mem-write: 0x80007f79 <- 0x3300e8c7 -mem-write: 0x80007f7d <- 0x13010706 -mem-write: 0x80007f81 <- 0x33fff747 -mem-write: 0x80007f85 <- 0x3300e677 -mem-write: 0x80007f89 <- 0xe300b777 -mem-write: 0x80007f8d <- 0x93f8071c -mem-write: 0x80007f91 <- 0x13ffc787 -mem-write: 0x80007f95 <- 0xe3004505 -mem-write: 0x80007f99 <- 0xe3fcf36e -mem-write: 0x80007f9d <- 0x6ff80794 -mem-write: 0x80007fa1 <- 0x67f7dff0 -mem-write: 0x80007fa5 <- 0x67000080 -mem-write: 0x80007fa9 <- 0x83000080 -mem-write: 0x80007fad <- 0x1304c527 -mem-write: 0x80007fb1 <- 0x23ff0101 -mem-write: 0x80007fb5 <- 0x23008124 -mem-write: 0x80007fb9 <- 0x23009122 -mem-write: 0x80007fbd <- 0x23001126 -mem-write: 0x80007fc1 <- 0x13012120 -mem-write: 0x80007fc5 <- 0x93000504 -mem-write: 0x80007fc9 <- 0x63000584 -mem-write: 0x80007fcd <- 0x1302078e -mem-write: 0x80007fd1 <- 0xb3002495 -mem-write: 0x80007fd5 <- 0x300a787 -mem-write: 0x80007fd9 <- 0x630007a5 -mem-write: 0x80007fdd <- 0x3040506 -mem-write: 0x80007fe1 <- 0x23000527 -mem-write: 0x80007fe5 <- 0x2300e7a0 -mem-write: 0x80007fe9 <- 0x23000528 -mem-write: 0x80007fed <- 0x83000526 -mem-write: 0x80007ff1 <- 0x300c120 -mem-write: 0x80007ff5 <- 0x83008124 -mem-write: 0x80007ff9 <- 0x3004124 -VXDRV: upload 1024 bytes to 0x80007ffc -mem-write: 0x80007ffc <- 0x12903 -mem-write: 0x80008000 <- 0x1010113 -mem-write: 0x80008004 <- 0x8067 -mem-write: 0x80008008 <- 0x2100613 -mem-write: 0x8000800c <- 0x400593 -mem-write: 0x80008010 <- 0x518050ef -mem-write: 0x80008014 <- 0x4a42623 -mem-write: 0x80008018 <- 0x50793 -mem-write: 0x8000801c <- 0xfa051ae3 -mem-write: 0x80008020 <- 0x513 -mem-write: 0x80008024 <- 0xfcdff06f -mem-write: 0x80008028 <- 0x100913 -mem-write: 0x8000802c <- 0x991933 -mem-write: 0x80008030 <- 0x590613 -mem-write: 0x80008034 <- 0x261613 -mem-write: 0x80008038 <- 0x100593 -mem-write: 0x8000803c <- 0x40513 -mem-write: 0x80008040 <- 0x4e8050ef -mem-write: 0x80008044 <- 0xfc050ee3 -mem-write: 0x80008048 <- 0x952223 -mem-write: 0x8000804c <- 0x1252423 -mem-write: 0x80008050 <- 0xf99ff06f -mem-write: 0x80008054 <- 0x2058063 -mem-write: 0x80008058 <- 0x45a703 -mem-write: 0x8000805c <- 0x4c52783 -mem-write: 0x80008060 <- 0x271713 -mem-write: 0x80008064 <- 0xe787b3 -mem-write: 0x80008068 <- 0x7a703 -mem-write: 0x8000806c <- 0xe5a023 -mem-write: 0x80008070 <- 0xb7a023 -mem-write: 0x80008074 <- 0x8067 -mem-write: 0x80008078 <- 0xfe010113 -mem-write: 0x8000807c <- 0x912a23 -mem-write: 0x80008080 <- 0x105a483 -mem-write: 0x80008084 <- 0x10337 -mem-write: 0x80008088 <- 0x812c23 -mem-write: 0x8000808c <- 0x1212823 -mem-write: 0x80008090 <- 0x1312623 -mem-write: 0x80008094 <- 0x112e23 -mem-write: 0x80008098 <- 0x1412423 -mem-write: 0x8000809c <- 0x58913 -mem-write: 0x800080a0 <- 0x50993 -mem-write: 0x800080a4 <- 0x68413 -mem-write: 0x800080a8 <- 0x1458813 -mem-write: 0x800080ac <- 0x893 -mem-write: 0x800080b0 <- 0xfff30313 -mem-write: 0x800080b4 <- 0x82783 -mem-write: 0x800080b8 <- 0x480813 -mem-write: 0x800080bc <- 0x188893 -mem-write: 0x800080c0 <- 0x67f6b3 -mem-write: 0x800080c4 <- 0x2c686b3 -mem-write: 0x800080c8 <- 0x107d793 -mem-write: 0x800080cc <- 0x2c787b3 -mem-write: 0x800080d0 <- 0x8686b3 -mem-write: 0x800080d4 <- 0x106de13 -mem-write: 0x800080d8 <- 0x66f733 -mem-write: 0x800080dc <- 0x1c786b3 -mem-write: 0x800080e0 <- 0x1069793 -mem-write: 0x800080e4 <- 0xe78733 -mem-write: 0x800080e8 <- 0xfee82e23 -mem-write: 0x800080ec <- 0x106d413 -mem-write: 0x800080f0 <- 0xfc98c2e3 -mem-write: 0x800080f4 <- 0x2040263 -mem-write: 0x800080f8 <- 0x892783 -mem-write: 0x800080fc <- 0x4f4d063 -mem-write: 0x80008100 <- 0x448793 -mem-write: 0x80008104 <- 0x279793 -mem-write: 0x80008108 <- 0xf907b3 -mem-write: 0x8000810c <- 0x87a223 -mem-write: 0x80008110 <- 0x148493 -mem-write: 0x80008114 <- 0x992823 -mem-write: 0x80008118 <- 0x1c12083 -mem-write: 0x8000811c <- 0x1812403 -mem-write: 0x80008120 <- 0x1412483 -mem-write: 0x80008124 <- 0xc12983 -mem-write: 0x80008128 <- 0x812a03 -mem-write: 0x8000812c <- 0x90513 -mem-write: 0x80008130 <- 0x1012903 -mem-write: 0x80008134 <- 0x2010113 -mem-write: 0x80008138 <- 0x8067 -mem-write: 0x8000813c <- 0x492583 -mem-write: 0x80008140 <- 0x98513 -mem-write: 0x80008144 <- 0x158593 -mem-write: 0x80008148 <- 0xe65ff0ef -mem-write: 0x8000814c <- 0x50a13 -mem-write: 0x80008150 <- 0x4050c63 -mem-write: 0x80008154 <- 0x1092603 -mem-write: 0x80008158 <- 0xc90593 -mem-write: 0x8000815c <- 0xc50513 -mem-write: 0x80008160 <- 0x260613 -mem-write: 0x80008164 <- 0x261613 -mem-write: 0x80008168 <- 0x719050ef -mem-write: 0x8000816c <- 0x492703 -mem-write: 0x80008170 <- 0x4c9a783 -mem-write: 0x80008174 <- 0x271713 -mem-write: 0x80008178 <- 0xe787b3 -mem-write: 0x8000817c <- 0x7a703 -mem-write: 0x80008180 <- 0xe92023 -mem-write: 0x80008184 <- 0x127a023 -mem-write: 0x80008188 <- 0x448793 -mem-write: 0x8000818c <- 0xa0913 -mem-write: 0x80008190 <- 0x279793 -mem-write: 0x80008194 <- 0xf907b3 -mem-write: 0x80008198 <- 0x87a223 -mem-write: 0x8000819c <- 0x148493 -mem-write: 0x800081a0 <- 0x992823 -mem-write: 0x800081a4 <- 0xf75ff06f -mem-write: 0x800081a8 <- 0x800156b7 -mem-write: 0x800081ac <- 0x80015537 -mem-write: 0x800081b0 <- 0xe7468693 -mem-write: 0x800081b4 <- 0x613 -mem-write: 0x800081b8 <- 0xb500593 -mem-write: 0x800081bc <- 0xe8850513 -mem-write: 0x800081c0 <- 0x300050ef -mem-write: 0x800081c4 <- 0xfe010113 -mem-write: 0x800081c8 <- 0x812c23 -mem-write: 0x800081cc <- 0x912a23 -mem-write: 0x800081d0 <- 0x1212823 -mem-write: 0x800081d4 <- 0x1312623 -mem-write: 0x800081d8 <- 0x1412423 -mem-write: 0x800081dc <- 0x868813 -mem-write: 0x800081e0 <- 0x900793 -mem-write: 0x800081e4 <- 0x112e23 -mem-write: 0x800081e8 <- 0x1512223 -mem-write: 0x800081ec <- 0x2f84833 -mem-write: 0x800081f0 <- 0x68993 -mem-write: 0x800081f4 <- 0x50913 -mem-write: 0x800081f8 <- 0x58413 -mem-write: 0x800081fc <- 0x60a13 -mem-write: 0x80008200 <- 0x70493 -mem-write: 0x80008204 <- 0xcd7d863 -mem-write: 0x80008208 <- 0x100793 -mem-write: 0x8000820c <- 0x593 -mem-write: 0x80008210 <- 0x179793 -mem-write: 0x80008214 <- 0x158593 -mem-write: 0x80008218 <- 0xff07cce3 -mem-write: 0x8000821c <- 0x90513 -mem-write: 0x80008220 <- 0xd8dff0ef -mem-write: 0x80008224 <- 0x50593 -mem-write: 0x80008228 <- 0xa050a63 -mem-write: 0x8000822c <- 0x100793 -mem-write: 0x80008230 <- 0xf52823 -mem-write: 0x80008234 <- 0x952a23 -mem-write: 0x80008238 <- 0x900793 -mem-write: 0x8000823c <- 0x947d663 -mem-write: 0x80008240 <- 0x940a93 -mem-write: 0x80008244 <- 0xa8493 -mem-write: 0x80008248 <- 0x1440433 -mem-write: 0x8000824c <- 0x4c683 -mem-write: 0x80008250 <- 0xa00613 -mem-write: 0x80008254 <- 0x90513 -mem-write: 0x80008258 <- 0xfd068693 -mem-write: 0x8000825c <- 0xe1dff0ef -mem-write: 0x80008260 <- 0x148493 -mem-write: 0x80008264 <- 0x50593 -mem-write: 0x80008268 <- 0xfe8492e3 -mem-write: 0x8000826c <- 0xff8a0413 -mem-write: 0x80008270 <- 0x8a8433 -mem-write: 0x80008274 <- 0x33a5663 -mem-write: 0x80008278 <- 0x414989b3 -mem-write: 0x8000827c <- 0x13409b3 -mem-write: 0x80008280 <- 0x44683 -mem-write: 0x80008284 <- 0xa00613 -mem-write: 0x80008288 <- 0x90513 -mem-write: 0x8000828c <- 0xfd068693 -mem-write: 0x80008290 <- 0xde9ff0ef -mem-write: 0x80008294 <- 0x140413 -mem-write: 0x80008298 <- 0x50593 -mem-write: 0x8000829c <- 0xfe8992e3 -mem-write: 0x800082a0 <- 0x1c12083 -mem-write: 0x800082a4 <- 0x1812403 -mem-write: 0x800082a8 <- 0x1412483 -mem-write: 0x800082ac <- 0x1012903 -mem-write: 0x800082b0 <- 0xc12983 -mem-write: 0x800082b4 <- 0x812a03 -mem-write: 0x800082b8 <- 0x412a83 -mem-write: 0x800082bc <- 0x58513 -mem-write: 0x800082c0 <- 0x2010113 -mem-write: 0x800082c4 <- 0x8067 -mem-write: 0x800082c8 <- 0xa40413 -mem-write: 0x800082cc <- 0x900a13 -mem-write: 0x800082d0 <- 0xfa5ff06f -mem-write: 0x800082d4 <- 0x593 -mem-write: 0x800082d8 <- 0xf45ff06f -mem-write: 0x800082dc <- 0x800156b7 -mem-write: 0x800082e0 <- 0x80015537 -mem-write: 0x800082e4 <- 0xe7468693 -mem-write: 0x800082e8 <- 0x613 -mem-write: 0x800082ec <- 0xce00593 -mem-write: 0x800082f0 <- 0xe8850513 -mem-write: 0x800082f4 <- 0x1cc050ef -mem-write: 0x800082f8 <- 0xffff0737 -mem-write: 0x800082fc <- 0xe57733 -mem-write: 0x80008300 <- 0x50793 -mem-write: 0x80008304 <- 0x513 -mem-write: 0x80008308 <- 0x71663 -mem-write: 0x8000830c <- 0x1079793 -mem-write: 0x80008310 <- 0x1000513 -mem-write: 0x80008314 <- 0xff000737 -mem-write: 0x80008318 <- 0xe7f733 -mem-write: 0x8000831c <- 0x71663 -mem-write: 0x80008320 <- 0x850513 -mem-write: 0x80008324 <- 0x879793 -mem-write: 0x80008328 <- 0xf0000737 -mem-write: 0x8000832c <- 0xe7f733 -mem-write: 0x80008330 <- 0x71663 -mem-write: 0x80008334 <- 0x450513 -mem-write: 0x80008338 <- 0x479793 -mem-write: 0x8000833c <- 0xc0000737 -mem-write: 0x80008340 <- 0xe7f733 -mem-write: 0x80008344 <- 0x71663 -mem-write: 0x80008348 <- 0x250513 -mem-write: 0x8000834c <- 0x279793 -mem-write: 0x80008350 <- 0x7c863 -mem-write: 0x80008354 <- 0x179713 -mem-write: 0x80008358 <- 0x150513 -mem-write: 0x8000835c <- 0x75463 -mem-write: 0x80008360 <- 0x8067 -mem-write: 0x80008364 <- 0x2000513 -mem-write: 0x80008368 <- 0x8067 -mem-write: 0x8000836c <- 0x52783 -mem-write: 0x80008370 <- 0x50713 -mem-write: 0x80008374 <- 0x77f693 -mem-write: 0x80008378 <- 0x2068463 -mem-write: 0x8000837c <- 0x17f693 -mem-write: 0x80008380 <- 0x513 -mem-write: 0x80008384 <- 0x6069e63 -mem-write: 0x80008388 <- 0x27f693 -mem-write: 0x8000838c <- 0x8068063 -mem-write: 0x80008390 <- 0x17d793 -mem-write: 0x80008394 <- 0xf72023 -mem-write: 0x80008398 <- 0x100513 -mem-write: 0x8000839c <- 0x8067 -mem-write: 0x800083a0 <- 0x1079693 -mem-write: 0x800083a4 <- 0x106d693 -mem-write: 0x800083a8 <- 0x513 -mem-write: 0x800083ac <- 0x69663 -mem-write: 0x800083b0 <- 0x107d793 -mem-write: 0x800083b4 <- 0x1000513 -mem-write: 0x800083b8 <- 0xff7f693 -mem-write: 0x800083bc <- 0x69663 -mem-write: 0x800083c0 <- 0x850513 -mem-write: 0x800083c4 <- 0x87d793 -mem-write: 0x800083c8 <- 0xf7f693 -mem-write: 0x800083cc <- 0x69663 -mem-write: 0x800083d0 <- 0x450513 -mem-write: 0x800083d4 <- 0x47d793 -mem-write: 0x800083d8 <- 0x37f693 -mem-write: 0x800083dc <- 0x69663 -mem-write: 0x800083e0 <- 0x250513 -mem-write: 0x800083e4 <- 0x27d793 -mem-write: 0x800083e8 <- 0x17f693 -mem-write: 0x800083ec <- 0x69c63 -mem-write: 0x800083f0 <- 0x17d793 -mem-write: 0x800083f4 <- 0x150513 -mem-write: 0x800083f8 <- 0x79663 -VXDRV: upload 1024 bytes to 0x800083fc -mem-write: 0x800083fc <- 0x2000513 -mem-write: 0x80008400 <- 0x8067 -mem-write: 0x80008404 <- 0xf72023 -mem-write: 0x80008408 <- 0x8067 -mem-write: 0x8000840c <- 0x27d793 -mem-write: 0x80008410 <- 0xf72023 -mem-write: 0x80008414 <- 0x200513 -mem-write: 0x80008418 <- 0x8067 -mem-write: 0x8000841c <- 0xff010113 -mem-write: 0x80008420 <- 0x812423 -mem-write: 0x80008424 <- 0x58413 -mem-write: 0x80008428 <- 0x100593 -mem-write: 0x8000842c <- 0x112623 -mem-write: 0x80008430 <- 0xb7dff0ef -mem-write: 0x80008434 <- 0x2050063 -mem-write: 0x80008438 <- 0xc12083 -mem-write: 0x8000843c <- 0x852a23 -mem-write: 0x80008440 <- 0x812403 -mem-write: 0x80008444 <- 0x100713 -mem-write: 0x80008448 <- 0xe52823 -mem-write: 0x8000844c <- 0x1010113 -mem-write: 0x80008450 <- 0x8067 -mem-write: 0x80008454 <- 0x800156b7 -mem-write: 0x80008458 <- 0x80015537 -mem-write: 0x8000845c <- 0xe7468693 -mem-write: 0x80008460 <- 0x613 -mem-write: 0x80008464 <- 0x14000593 -mem-write: 0x80008468 <- 0xe8850513 -mem-write: 0x8000846c <- 0x54050ef -mem-write: 0x80008470 <- 0xfe010113 -mem-write: 0x80008474 <- 0x1212823 -mem-write: 0x80008478 <- 0x1312623 -mem-write: 0x8000847c <- 0x105a903 -mem-write: 0x80008480 <- 0x1062983 -mem-write: 0x80008484 <- 0x912a23 -mem-write: 0x80008488 <- 0x1412423 -mem-write: 0x8000848c <- 0x112e23 -mem-write: 0x80008490 <- 0x812c23 -mem-write: 0x80008494 <- 0x58a13 -mem-write: 0x80008498 <- 0x60493 -mem-write: 0x8000849c <- 0x1394c63 -mem-write: 0x800084a0 <- 0x98713 -mem-write: 0x800084a4 <- 0x58493 -mem-write: 0x800084a8 <- 0x90993 -mem-write: 0x800084ac <- 0x60a13 -mem-write: 0x800084b0 <- 0x70913 -mem-write: 0x800084b4 <- 0x84a783 -mem-write: 0x800084b8 <- 0x44a583 -mem-write: 0x800084bc <- 0x1298433 -mem-write: 0x800084c0 <- 0x87a7b3 -mem-write: 0x800084c4 <- 0xf585b3 -mem-write: 0x800084c8 <- 0xae5ff0ef -mem-write: 0x800084cc <- 0x1a050c63 -mem-write: 0x800084d0 <- 0x1450313 -mem-write: 0x800084d4 <- 0x241893 -mem-write: 0x800084d8 <- 0x11308b3 -mem-write: 0x800084dc <- 0x30793 -mem-write: 0x800084e0 <- 0x1137863 -mem-write: 0x800084e4 <- 0x7a023 -mem-write: 0x800084e8 <- 0x478793 -mem-write: 0x800084ec <- 0xff17ece3 -mem-write: 0x800084f0 <- 0x14a0813 -mem-write: 0x800084f4 <- 0x291e13 -mem-write: 0x800084f8 <- 0x1448e93 -mem-write: 0x800084fc <- 0x299593 -mem-write: 0x80008500 <- 0x1c80e33 -mem-write: 0x80008504 <- 0xbe85b3 -mem-write: 0x80008508 <- 0xbc87c63 -mem-write: 0x8000850c <- 0x1548793 -mem-write: 0x80008510 <- 0x400f13 -mem-write: 0x80008514 <- 0x14f5fe63 -mem-write: 0x80008518 <- 0x10637 -mem-write: 0x8000851c <- 0xfff60613 -mem-write: 0x80008520 <- 0x100006f -mem-write: 0x80008524 <- 0x480813 -mem-write: 0x80008528 <- 0x430313 -mem-write: 0x8000852c <- 0x9c87a63 -mem-write: 0x80008530 <- 0x82f83 -mem-write: 0x80008534 <- 0xcff4b3 -mem-write: 0x80008538 <- 0xc049463 -mem-write: 0x8000853c <- 0x10fdf93 -mem-write: 0x80008540 <- 0xfe0f82e3 -mem-write: 0x80008544 <- 0x32703 -mem-write: 0x80008548 <- 0x30293 -mem-write: 0x8000854c <- 0xe8693 -mem-write: 0x80008550 <- 0x70493 -mem-write: 0x80008554 <- 0x393 -mem-write: 0x80008558 <- 0x6a783 -mem-write: 0x8000855c <- 0x104d993 -mem-write: 0x80008560 <- 0xc77733 -mem-write: 0x80008564 <- 0xc7f7b3 -mem-write: 0x80008568 <- 0x3f787b3 -mem-write: 0x8000856c <- 0x42a483 -mem-write: 0x80008570 <- 0x428293 -mem-write: 0x80008574 <- 0x468693 -mem-write: 0x80008578 <- 0xc4f933 -mem-write: 0x8000857c <- 0x13787b3 -mem-write: 0x80008580 <- 0x7787b3 -mem-write: 0x80008584 <- 0x1079393 -mem-write: 0x80008588 <- 0xe3e733 -mem-write: 0x8000858c <- 0xfee2ae23 -mem-write: 0x80008590 <- 0xffe6d703 -mem-write: 0x80008594 <- 0x107d793 -mem-write: 0x80008598 <- 0x3f70733 -mem-write: 0x8000859c <- 0x1270733 -mem-write: 0x800085a0 <- 0xf70733 -mem-write: 0x800085a4 <- 0x1075393 -mem-write: 0x800085a8 <- 0xfab6e8e3 -mem-write: 0x800085ac <- 0x1e307b3 -mem-write: 0x800085b0 <- 0xe7a023 -mem-write: 0x800085b4 <- 0x480813 -mem-write: 0x800085b8 <- 0x430313 -mem-write: 0x800085bc <- 0xf7c86ae3 -mem-write: 0x800085c0 <- 0x804863 -mem-write: 0x800085c4 <- 0x180006f -mem-write: 0x800085c8 <- 0xfff40413 -mem-write: 0x800085cc <- 0x40863 -mem-write: 0x800085d0 <- 0xffc8a783 -mem-write: 0x800085d4 <- 0xffc88893 -mem-write: 0x800085d8 <- 0xfe0788e3 -mem-write: 0x800085dc <- 0x1c12083 -mem-write: 0x800085e0 <- 0x852823 -mem-write: 0x800085e4 <- 0x1812403 -mem-write: 0x800085e8 <- 0x1412483 -mem-write: 0x800085ec <- 0x1012903 -mem-write: 0x800085f0 <- 0xc12983 -mem-write: 0x800085f4 <- 0x812a03 -mem-write: 0x800085f8 <- 0x2010113 -mem-write: 0x800085fc <- 0x8067 -mem-write: 0x80008600 <- 0x30393 -mem-write: 0x80008604 <- 0xe8293 -mem-write: 0x80008608 <- 0x913 -mem-write: 0x8000860c <- 0x2a703 -mem-write: 0x80008610 <- 0x3af83 -mem-write: 0x80008614 <- 0x438393 -mem-write: 0x80008618 <- 0xc776b3 -mem-write: 0x8000861c <- 0x29686b3 -mem-write: 0x80008620 <- 0x1075793 -mem-write: 0x80008624 <- 0xcff733 -mem-write: 0x80008628 <- 0x10fdf93 -mem-write: 0x8000862c <- 0x428293 -mem-write: 0x80008630 <- 0x29787b3 -mem-write: 0x80008634 <- 0xe686b3 -mem-write: 0x80008638 <- 0x12686b3 -mem-write: 0x8000863c <- 0x106d713 -mem-write: 0x80008640 <- 0xc6f6b3 -mem-write: 0x80008644 <- 0x1f787b3 -mem-write: 0x80008648 <- 0xe787b3 -mem-write: 0x8000864c <- 0x1079713 -mem-write: 0x80008650 <- 0xd766b3 -mem-write: 0x80008654 <- 0xfed3ae23 -mem-write: 0x80008658 <- 0x107d913 -mem-write: 0x8000865c <- 0xfab2e8e3 -mem-write: 0x80008660 <- 0x1e307b3 -mem-write: 0x80008664 <- 0x127a023 -mem-write: 0x80008668 <- 0x82f83 -mem-write: 0x8000866c <- 0xed1ff06f -mem-write: 0x80008670 <- 0x40958f33 -mem-write: 0x80008674 <- 0xfebf0f13 -mem-write: 0x80008678 <- 0xffcf7f13 -mem-write: 0x8000867c <- 0x4f0f13 -mem-write: 0x80008680 <- 0xe99ff06f -mem-write: 0x80008684 <- 0x800156b7 -mem-write: 0x80008688 <- 0x80015537 -mem-write: 0x8000868c <- 0xe7468693 -mem-write: 0x80008690 <- 0x613 -mem-write: 0x80008694 <- 0x15d00593 -mem-write: 0x80008698 <- 0xe8850513 -mem-write: 0x8000869c <- 0x625040ef -mem-write: 0x800086a0 <- 0xfe010113 -mem-write: 0x800086a4 <- 0x812c23 -mem-write: 0x800086a8 <- 0x1312623 -mem-write: 0x800086ac <- 0x1412423 -mem-write: 0x800086b0 <- 0x112e23 -mem-write: 0x800086b4 <- 0x912a23 -mem-write: 0x800086b8 <- 0x1212823 -mem-write: 0x800086bc <- 0x367793 -mem-write: 0x800086c0 <- 0x60413 -mem-write: 0x800086c4 <- 0x50993 -mem-write: 0x800086c8 <- 0x58a13 -mem-write: 0x800086cc <- 0xc079463 -mem-write: 0x800086d0 <- 0x40245413 -mem-write: 0x800086d4 <- 0xa0913 -mem-write: 0x800086d8 <- 0x6040863 -mem-write: 0x800086dc <- 0x489a483 -mem-write: 0x800086e0 <- 0xc048e63 -mem-write: 0x800086e4 <- 0x147793 -mem-write: 0x800086e8 <- 0xa0913 -mem-write: 0x800086ec <- 0x2079063 -mem-write: 0x800086f0 <- 0x40145413 -mem-write: 0x800086f4 <- 0x4040a63 -mem-write: 0x800086f8 <- 0x4a503 -mem-write: 0x800086fc <- 0x6050863 -mem-write: 0x80008700 <- 0x50493 -mem-write: 0x80008704 <- 0x147793 -mem-write: 0x80008708 <- 0xfe0784e3 -mem-write: 0x8000870c <- 0x48613 -mem-write: 0x80008710 <- 0x90593 -mem-write: 0x80008714 <- 0x98513 -mem-write: 0x80008718 <- 0xd59ff0ef -mem-write: 0x8000871c <- 0x6090863 -mem-write: 0x80008720 <- 0x492703 -mem-write: 0x80008724 <- 0x4c9a783 -mem-write: 0x80008728 <- 0x40145413 -mem-write: 0x8000872c <- 0x271713 -mem-write: 0x80008730 <- 0xe787b3 -mem-write: 0x80008734 <- 0x7a703 -mem-write: 0x80008738 <- 0xe92023 -mem-write: 0x8000873c <- 0x127a023 -mem-write: 0x80008740 <- 0x50913 -mem-write: 0x80008744 <- 0xfa041ae3 -mem-write: 0x80008748 <- 0x1c12083 -mem-write: 0x8000874c <- 0x1812403 -mem-write: 0x80008750 <- 0x1412483 -mem-write: 0x80008754 <- 0xc12983 -mem-write: 0x80008758 <- 0x812a03 -mem-write: 0x8000875c <- 0x90513 -mem-write: 0x80008760 <- 0x1012903 -mem-write: 0x80008764 <- 0x2010113 -mem-write: 0x80008768 <- 0x8067 -mem-write: 0x8000876c <- 0x48613 -mem-write: 0x80008770 <- 0x48593 -mem-write: 0x80008774 <- 0x98513 -mem-write: 0x80008778 <- 0xcf9ff0ef -mem-write: 0x8000877c <- 0xa4a023 -mem-write: 0x80008780 <- 0x52023 -mem-write: 0x80008784 <- 0x50493 -mem-write: 0x80008788 <- 0xf7dff06f -mem-write: 0x8000878c <- 0x50913 -mem-write: 0x80008790 <- 0xf61ff06f -mem-write: 0x80008794 <- 0xfff78793 -mem-write: 0x80008798 <- 0x80015737 -mem-write: 0x8000879c <- 0xee070713 -mem-write: 0x800087a0 <- 0x279793 -mem-write: 0x800087a4 <- 0xf707b3 -mem-write: 0x800087a8 <- 0x7a603 -mem-write: 0x800087ac <- 0x693 -mem-write: 0x800087b0 <- 0x8c9ff0ef -mem-write: 0x800087b4 <- 0x50a13 -mem-write: 0x800087b8 <- 0xf19ff06f -mem-write: 0x800087bc <- 0x27100593 -mem-write: 0x800087c0 <- 0x98513 -mem-write: 0x800087c4 <- 0xc59ff0ef -mem-write: 0x800087c8 <- 0x4a9a423 -mem-write: 0x800087cc <- 0x50493 -mem-write: 0x800087d0 <- 0x52023 -mem-write: 0x800087d4 <- 0xf11ff06f -mem-write: 0x800087d8 <- 0xfe010113 -mem-write: 0x800087dc <- 0x1412423 -mem-write: 0x800087e0 <- 0x105aa03 -mem-write: 0x800087e4 <- 0x85a783 -mem-write: 0x800087e8 <- 0x1312623 -mem-write: 0x800087ec <- 0x40565993 -mem-write: 0x800087f0 <- 0x1498a33 -mem-write: 0x800087f4 <- 0x812c23 -mem-write: 0x800087f8 <- 0x912a23 -VXDRV: upload 1024 bytes to 0x800087fc -mem-write: 0x800087fc <- 0x1212823 -mem-write: 0x80008800 <- 0x1512223 -mem-write: 0x80008804 <- 0x112e23 -mem-write: 0x80008808 <- 0x1a0913 -mem-write: 0x8000880c <- 0x58493 -mem-write: 0x80008810 <- 0x60413 -mem-write: 0x80008814 <- 0x45a583 -mem-write: 0x80008818 <- 0x50a93 -mem-write: 0x8000881c <- 0x127d863 -mem-write: 0x80008820 <- 0x179793 -mem-write: 0x80008824 <- 0x158593 -mem-write: 0x80008828 <- 0xff27cce3 -mem-write: 0x8000882c <- 0xa8513 -mem-write: 0x80008830 <- 0xf7cff0ef -mem-write: 0x80008834 <- 0x10050c63 -mem-write: 0x80008838 <- 0x1450813 -mem-write: 0x8000883c <- 0x3305463 -mem-write: 0x80008840 <- 0x598993 -mem-write: 0x80008844 <- 0x299993 -mem-write: 0x80008848 <- 0x1350733 -mem-write: 0x8000884c <- 0x80793 -mem-write: 0x80008850 <- 0x478793 -mem-write: 0x80008854 <- 0xfe07ae23 -mem-write: 0x80008858 <- 0xfee79ce3 -mem-write: 0x8000885c <- 0xfec98993 -mem-write: 0x80008860 <- 0x1380833 -mem-write: 0x80008864 <- 0x104a703 -mem-write: 0x80008868 <- 0x1448793 -mem-write: 0x8000886c <- 0x1f47313 -mem-write: 0x80008870 <- 0x271613 -mem-write: 0x80008874 <- 0xc78633 -mem-write: 0x80008878 <- 0xa030463 -mem-write: 0x8000887c <- 0x2000593 -mem-write: 0x80008880 <- 0x406585b3 -mem-write: 0x80008884 <- 0x80893 -mem-write: 0x80008888 <- 0x693 -mem-write: 0x8000888c <- 0x7a703 -mem-write: 0x80008890 <- 0x488893 -mem-write: 0x80008894 <- 0x478793 -mem-write: 0x80008898 <- 0x671733 -mem-write: 0x8000889c <- 0xd76733 -mem-write: 0x800088a0 <- 0xfee8ae23 -mem-write: 0x800088a4 <- 0xffc7a703 -mem-write: 0x800088a8 <- 0xb756b3 -mem-write: 0x800088ac <- 0xfec7e0e3 -mem-write: 0x800088b0 <- 0x1548713 -mem-write: 0x800088b4 <- 0x400793 -mem-write: 0x800088b8 <- 0xe66a63 -mem-write: 0x800088bc <- 0x409607b3 -mem-write: 0x800088c0 <- 0xfeb78793 -mem-write: 0x800088c4 <- 0xffc7f793 -mem-write: 0x800088c8 <- 0x478793 -mem-write: 0x800088cc <- 0xf80833 -mem-write: 0x800088d0 <- 0xd82023 -mem-write: 0x800088d4 <- 0x68463 -mem-write: 0x800088d8 <- 0x90a13 -mem-write: 0x800088dc <- 0x44a703 -mem-write: 0x800088e0 <- 0x4caa783 -mem-write: 0x800088e4 <- 0x1c12083 -mem-write: 0x800088e8 <- 0x271713 -mem-write: 0x800088ec <- 0xe787b3 -mem-write: 0x800088f0 <- 0x7a703 -mem-write: 0x800088f4 <- 0x1452823 -mem-write: 0x800088f8 <- 0x1812403 -mem-write: 0x800088fc <- 0xe4a023 -mem-write: 0x80008900 <- 0x97a023 -mem-write: 0x80008904 <- 0x1012903 -mem-write: 0x80008908 <- 0x1412483 -mem-write: 0x8000890c <- 0xc12983 -mem-write: 0x80008910 <- 0x812a03 -mem-write: 0x80008914 <- 0x412a83 -mem-write: 0x80008918 <- 0x2010113 -mem-write: 0x8000891c <- 0x8067 -mem-write: 0x80008920 <- 0x7a703 -mem-write: 0x80008924 <- 0x478793 -mem-write: 0x80008928 <- 0x480813 -mem-write: 0x8000892c <- 0xfee82e23 -mem-write: 0x80008930 <- 0xfac7f6e3 -mem-write: 0x80008934 <- 0x7a703 -mem-write: 0x80008938 <- 0x478793 -mem-write: 0x8000893c <- 0x480813 -mem-write: 0x80008940 <- 0xfee82e23 -mem-write: 0x80008944 <- 0xfcc7eee3 -mem-write: 0x80008948 <- 0xf95ff06f -mem-write: 0x8000894c <- 0x800156b7 -mem-write: 0x80008950 <- 0x80015537 -mem-write: 0x80008954 <- 0xe7468693 -mem-write: 0x80008958 <- 0x613 -mem-write: 0x8000895c <- 0x1d900593 -mem-write: 0x80008960 <- 0xe8850513 -mem-write: 0x80008964 <- 0x35d040ef -mem-write: 0x80008968 <- 0x1052703 -mem-write: 0x8000896c <- 0x105a783 -mem-write: 0x80008970 <- 0x50813 -mem-write: 0x80008974 <- 0x40f70533 -mem-write: 0x80008978 <- 0x4f71463 -mem-write: 0x8000897c <- 0x279793 -mem-write: 0x80008980 <- 0x1480813 -mem-write: 0x80008984 <- 0x1458593 -mem-write: 0x80008988 <- 0xf80733 -mem-write: 0x8000898c <- 0xf587b3 -mem-write: 0x80008990 <- 0x80006f -mem-write: 0x80008994 <- 0x2e87663 -mem-write: 0x80008998 <- 0xffc72683 -mem-write: 0x8000899c <- 0xffc7a603 -mem-write: 0x800089a0 <- 0xffc70713 -mem-write: 0x800089a4 <- 0xffc78793 -mem-write: 0x800089a8 <- 0xfec686e3 -mem-write: 0x800089ac <- 0xc6b6b3 -mem-write: 0x800089b0 <- 0x40d00533 -mem-write: 0x800089b4 <- 0xffe57513 -mem-write: 0x800089b8 <- 0x150513 -mem-write: 0x800089bc <- 0x8067 -mem-write: 0x800089c0 <- 0x8067 -mem-write: 0x800089c4 <- 0x105a783 -mem-write: 0x800089c8 <- 0x1062703 -mem-write: 0x800089cc <- 0xff010113 -mem-write: 0x800089d0 <- 0x812423 -mem-write: 0x800089d4 <- 0x912223 -mem-write: 0x800089d8 <- 0x1212023 -mem-write: 0x800089dc <- 0x112623 -mem-write: 0x800089e0 <- 0x58493 -mem-write: 0x800089e4 <- 0x60413 -mem-write: 0x800089e8 <- 0x40e78933 -mem-write: 0x800089ec <- 0x1ae79463 -mem-write: 0x800089f0 <- 0x271693 -mem-write: 0x800089f4 <- 0x1458593 -mem-write: 0x800089f8 <- 0x1460713 -mem-write: 0x800089fc <- 0xd587b3 -mem-write: 0x80008a00 <- 0xd70733 -mem-write: 0x80008a04 <- 0x80006f -mem-write: 0x80008a08 <- 0x18f5fc63 -mem-write: 0x80008a0c <- 0xffc7a603 -mem-write: 0x80008a10 <- 0xffc72683 -mem-write: 0x80008a14 <- 0xffc78793 -mem-write: 0x80008a18 <- 0xffc70713 -mem-write: 0x80008a1c <- 0xfed606e3 -mem-write: 0x80008a20 <- 0x16d66063 -mem-write: 0x80008a24 <- 0x44a583 -mem-write: 0x80008a28 <- 0xd84ff0ef -mem-write: 0x80008a2c <- 0x1a050263 -mem-write: 0x80008a30 <- 0x104ae03 -mem-write: 0x80008a34 <- 0x1042283 -mem-write: 0x80008a38 <- 0x1448f93 -mem-write: 0x80008a3c <- 0x2e1e93 -mem-write: 0x80008a40 <- 0x1440813 -mem-write: 0x80008a44 <- 0x229293 -mem-write: 0x80008a48 <- 0x1450393 -mem-write: 0x80008a4c <- 0x108b7 -mem-write: 0x80008a50 <- 0x1252623 -mem-write: 0x80008a54 <- 0x1df8eb3 -mem-write: 0x80008a58 <- 0x5802b3 -mem-write: 0x80008a5c <- 0x38f13 -mem-write: 0x80008a60 <- 0xf8313 -mem-write: 0x80008a64 <- 0x793 -mem-write: 0x80008a68 <- 0xfff88893 -mem-write: 0x80008a6c <- 0x32703 -mem-write: 0x80008a70 <- 0x82583 -mem-write: 0x80008a74 <- 0x4f0f13 -mem-write: 0x80008a78 <- 0x11776b3 -mem-write: 0x80008a7c <- 0xf686b3 -mem-write: 0x80008a80 <- 0x115f7b3 -mem-write: 0x80008a84 <- 0x40f686b3 -mem-write: 0x80008a88 <- 0x105d593 -mem-write: 0x80008a8c <- 0x1075793 -mem-write: 0x80008a90 <- 0x40b787b3 -mem-write: 0x80008a94 <- 0x4106d713 -mem-write: 0x80008a98 <- 0xe787b3 -mem-write: 0x80008a9c <- 0x1079713 -mem-write: 0x80008aa0 <- 0x116f6b3 -mem-write: 0x80008aa4 <- 0xd766b3 -mem-write: 0x80008aa8 <- 0x480813 -mem-write: 0x80008aac <- 0xfedf2e23 -mem-write: 0x80008ab0 <- 0x430313 -mem-write: 0x80008ab4 <- 0x4107d793 -mem-write: 0x80008ab8 <- 0xfa586ae3 -mem-write: 0x80008abc <- 0x408285b3 -mem-write: 0x80008ac0 <- 0xfeb58593 -mem-write: 0x80008ac4 <- 0x1540413 -mem-write: 0x80008ac8 <- 0x25d593 -mem-write: 0x80008acc <- 0x713 -mem-write: 0x80008ad0 <- 0x82e463 -mem-write: 0x80008ad4 <- 0x259713 -mem-write: 0x80008ad8 <- 0xe38733 -mem-write: 0x80008adc <- 0x400813 -mem-write: 0x80008ae0 <- 0x82e663 -mem-write: 0x80008ae4 <- 0x158593 -mem-write: 0x80008ae8 <- 0x259813 -mem-write: 0x80008aec <- 0x10f8fb3 -mem-write: 0x80008af0 <- 0x10383b3 -mem-write: 0x80008af4 <- 0x5dffe63 -mem-write: 0x80008af8 <- 0x108b7 -mem-write: 0x80008afc <- 0x38813 -mem-write: 0x80008b00 <- 0xf8593 -mem-write: 0x80008b04 <- 0xfff88893 -mem-write: 0x80008b08 <- 0x5a703 -mem-write: 0x80008b0c <- 0x480813 -mem-write: 0x80008b10 <- 0x458593 -mem-write: 0x80008b14 <- 0x1177633 -mem-write: 0x80008b18 <- 0xf60633 -mem-write: 0x80008b1c <- 0x41065693 -mem-write: 0x80008b20 <- 0x1075793 -mem-write: 0x80008b24 <- 0xd787b3 -mem-write: 0x80008b28 <- 0x1079693 -mem-write: 0x80008b2c <- 0x1167633 -mem-write: 0x80008b30 <- 0xc6e6b3 -mem-write: 0x80008b34 <- 0xfed82e23 -mem-write: 0x80008b38 <- 0x4107d793 -mem-write: 0x80008b3c <- 0xfdd5e6e3 -mem-write: 0x80008b40 <- 0xfffe8713 -mem-write: 0x80008b44 <- 0x41f70fb3 -mem-write: 0x80008b48 <- 0xffcff713 -mem-write: 0x80008b4c <- 0xe38733 -mem-write: 0x80008b50 <- 0x69a63 -mem-write: 0x80008b54 <- 0xffc72783 -mem-write: 0x80008b58 <- 0xfffe0e13 -mem-write: 0x80008b5c <- 0xffc70713 -mem-write: 0x80008b60 <- 0xfe078ae3 -mem-write: 0x80008b64 <- 0xc12083 -mem-write: 0x80008b68 <- 0x812403 -mem-write: 0x80008b6c <- 0x1c52823 -mem-write: 0x80008b70 <- 0x412483 -mem-write: 0x80008b74 <- 0x12903 -mem-write: 0x80008b78 <- 0x1010113 -mem-write: 0x80008b7c <- 0x8067 -mem-write: 0x80008b80 <- 0x48793 -mem-write: 0x80008b84 <- 0x100913 -mem-write: 0x80008b88 <- 0x40493 -mem-write: 0x80008b8c <- 0x78413 -mem-write: 0x80008b90 <- 0xe95ff06f -mem-write: 0x80008b94 <- 0xfe0946e3 -mem-write: 0x80008b98 <- 0x913 -mem-write: 0x80008b9c <- 0xe89ff06f -mem-write: 0x80008ba0 <- 0x593 -mem-write: 0x80008ba4 <- 0xc08ff0ef -mem-write: 0x80008ba8 <- 0x4050263 -mem-write: 0x80008bac <- 0xc12083 -mem-write: 0x80008bb0 <- 0x812403 -mem-write: 0x80008bb4 <- 0x100793 -mem-write: 0x80008bb8 <- 0xf52823 -mem-write: 0x80008bbc <- 0x52a23 -mem-write: 0x80008bc0 <- 0x412483 -mem-write: 0x80008bc4 <- 0x12903 -mem-write: 0x80008bc8 <- 0x1010113 -mem-write: 0x80008bcc <- 0x8067 -mem-write: 0x80008bd0 <- 0x800156b7 -mem-write: 0x80008bd4 <- 0x80015537 -mem-write: 0x80008bd8 <- 0xe7468693 -mem-write: 0x80008bdc <- 0x613 -mem-write: 0x80008be0 <- 0x24000593 -mem-write: 0x80008be4 <- 0xe8850513 -mem-write: 0x80008be8 <- 0xd9040ef -mem-write: 0x80008bec <- 0x800156b7 -mem-write: 0x80008bf0 <- 0x80015537 -mem-write: 0x80008bf4 <- 0xe7468693 -mem-write: 0x80008bf8 <- 0x613 -VXDRV: upload 1024 bytes to 0x80008bfc -mem-write: 0x80008bfc <- 0x23200593 -mem-write: 0x80008c00 <- 0xe8850513 -mem-write: 0x80008c04 <- 0xbd040ef -mem-write: 0x80008c08 <- 0x7ff007b7 -mem-write: 0x80008c0c <- 0xb7f5b3 -mem-write: 0x80008c10 <- 0xfcc007b7 -mem-write: 0x80008c14 <- 0xf585b3 -mem-write: 0x80008c18 <- 0xb05863 -mem-write: 0x80008c1c <- 0x793 -mem-write: 0x80008c20 <- 0x78513 -mem-write: 0x80008c24 <- 0x8067 -mem-write: 0x80008c28 <- 0x40b005b3 -mem-write: 0x80008c2c <- 0x4145d593 -mem-write: 0x80008c30 <- 0x1300793 -mem-write: 0x80008c34 <- 0xb7c863 -mem-write: 0x80008c38 <- 0x807b7 -mem-write: 0x80008c3c <- 0x40b7d5b3 -mem-write: 0x80008c40 <- 0xfddff06f -mem-write: 0x80008c44 <- 0xfec58713 -mem-write: 0x80008c48 <- 0x1e00693 -mem-write: 0x80008c4c <- 0x593 -mem-write: 0x80008c50 <- 0x100793 -mem-write: 0x80008c54 <- 0xfce6c6e3 -mem-write: 0x80008c58 <- 0x800007b7 -mem-write: 0x80008c5c <- 0xe7d7b3 -mem-write: 0x80008c60 <- 0x78513 -mem-write: 0x80008c64 <- 0x8067 -mem-write: 0x80008c68 <- 0xfe010113 -mem-write: 0x80008c6c <- 0x912a23 -mem-write: 0x80008c70 <- 0x1052483 -mem-write: 0x80008c74 <- 0x812c23 -mem-write: 0x80008c78 <- 0x1450413 -mem-write: 0x80008c7c <- 0x249493 -mem-write: 0x80008c80 <- 0x9404b3 -mem-write: 0x80008c84 <- 0x1212823 -mem-write: 0x80008c88 <- 0xffc4a903 -mem-write: 0x80008c8c <- 0x1312623 -mem-write: 0x80008c90 <- 0x1412423 -mem-write: 0x80008c94 <- 0x90513 -mem-write: 0x80008c98 <- 0x58993 -mem-write: 0x80008c9c <- 0x112e23 -mem-write: 0x80008ca0 <- 0xe58ff0ef -mem-write: 0x80008ca4 <- 0x2000713 -mem-write: 0x80008ca8 <- 0x40a707b3 -mem-write: 0x80008cac <- 0xf9a023 -mem-write: 0x80008cb0 <- 0xa00793 -mem-write: 0x80008cb4 <- 0xffc48a13 -mem-write: 0x80008cb8 <- 0x8a7d063 -mem-write: 0x80008cbc <- 0xff550513 -mem-write: 0x80008cc0 <- 0x5447063 -mem-write: 0x80008cc4 <- 0xff84a783 -mem-write: 0x80008cc8 <- 0x4050063 -mem-write: 0x80008ccc <- 0x40a706b3 -mem-write: 0x80008cd0 <- 0xd7d733 -mem-write: 0x80008cd4 <- 0xa91933 -mem-write: 0x80008cd8 <- 0xe96933 -mem-write: 0x80008cdc <- 0xff848613 -mem-write: 0x80008ce0 <- 0x3ff00737 -mem-write: 0x80008ce4 <- 0xe96733 -mem-write: 0x80008ce8 <- 0xa797b3 -mem-write: 0x80008cec <- 0x2c47263 -mem-write: 0x80008cf0 <- 0xff44a603 -mem-write: 0x80008cf4 <- 0xd656b3 -mem-write: 0x80008cf8 <- 0xd7e7b3 -mem-write: 0x80008cfc <- 0x140006f -mem-write: 0x80008d00 <- 0x793 -mem-write: 0x80008d04 <- 0x6051463 -mem-write: 0x80008d08 <- 0x3ff00737 -mem-write: 0x80008d0c <- 0xe96733 -mem-write: 0x80008d10 <- 0x1c12083 -mem-write: 0x80008d14 <- 0x1812403 -mem-write: 0x80008d18 <- 0x1412483 -mem-write: 0x80008d1c <- 0x1012903 -mem-write: 0x80008d20 <- 0xc12983 -mem-write: 0x80008d24 <- 0x812a03 -mem-write: 0x80008d28 <- 0x78513 -mem-write: 0x80008d2c <- 0x70593 -mem-write: 0x80008d30 <- 0x2010113 -mem-write: 0x80008d34 <- 0x8067 -mem-write: 0x80008d38 <- 0xb00693 -mem-write: 0x80008d3c <- 0x40a686b3 -mem-write: 0x80008d40 <- 0x3ff007b7 -mem-write: 0x80008d44 <- 0xd95733 -mem-write: 0x80008d48 <- 0xf76733 -mem-write: 0x80008d4c <- 0x793 -mem-write: 0x80008d50 <- 0x1447663 -mem-write: 0x80008d54 <- 0xff84a783 -mem-write: 0x80008d58 <- 0xd7d7b3 -mem-write: 0x80008d5c <- 0x1550513 -mem-write: 0x80008d60 <- 0xa91533 -mem-write: 0x80008d64 <- 0xf567b3 -mem-write: 0x80008d68 <- 0xfa9ff06f -mem-write: 0x80008d6c <- 0xa91533 -mem-write: 0x80008d70 <- 0x3ff00737 -mem-write: 0x80008d74 <- 0xe56733 -mem-write: 0x80008d78 <- 0x793 -mem-write: 0x80008d7c <- 0xf95ff06f -mem-write: 0x80008d80 <- 0xfd010113 -mem-write: 0x80008d84 <- 0x1412c23 -mem-write: 0x80008d88 <- 0x58a13 -mem-write: 0x80008d8c <- 0x100593 -mem-write: 0x80008d90 <- 0x2912223 -mem-write: 0x80008d94 <- 0x3212023 -mem-write: 0x80008d98 <- 0x1312e23 -mem-write: 0x80008d9c <- 0x2112623 -mem-write: 0x80008da0 <- 0x2812423 -mem-write: 0x80008da4 <- 0x1512a23 -mem-write: 0x80008da8 <- 0x60493 -mem-write: 0x80008dac <- 0x68993 -mem-write: 0x80008db0 <- 0x70913 -mem-write: 0x80008db4 <- 0x9f8ff0ef -mem-write: 0x80008db8 <- 0x10050a63 -mem-write: 0x80008dbc <- 0x144d793 -mem-write: 0x80008dc0 <- 0x100737 -mem-write: 0x80008dc4 <- 0xfff70613 -mem-write: 0x80008dc8 <- 0x1579693 -mem-write: 0x80008dcc <- 0x50413 -mem-write: 0x80008dd0 <- 0x967633 -mem-write: 0x80008dd4 <- 0x7ff7fa93 -mem-write: 0x80008dd8 <- 0x68463 -mem-write: 0x80008ddc <- 0xe66633 -mem-write: 0x80008de0 <- 0xc12623 -mem-write: 0x80008de4 <- 0x80a0863 -mem-write: 0x80008de8 <- 0x810513 -mem-write: 0x80008dec <- 0x1412423 -mem-write: 0x80008df0 <- 0xd7cff0ef -mem-write: 0x80008df4 <- 0xc12703 -mem-write: 0x80008df8 <- 0x50793 -mem-write: 0x80008dfc <- 0xc050263 -mem-write: 0x80008e00 <- 0x812603 -mem-write: 0x80008e04 <- 0x2000693 -mem-write: 0x80008e08 <- 0x40a686b3 -mem-write: 0x80008e0c <- 0xd716b3 -mem-write: 0x80008e10 <- 0xc6e6b3 -mem-write: 0x80008e14 <- 0xa75733 -mem-write: 0x80008e18 <- 0xd42a23 -mem-write: 0x80008e1c <- 0xe12623 -mem-write: 0x80008e20 <- 0xe034b3 -mem-write: 0x80008e24 <- 0x148493 -mem-write: 0x80008e28 <- 0xe42c23 -mem-write: 0x80008e2c <- 0x942823 -mem-write: 0x80008e30 <- 0x60a8463 -mem-write: 0x80008e34 <- 0xbcda8a93 -mem-write: 0x80008e38 <- 0xfa8ab3 -mem-write: 0x80008e3c <- 0x3500513 -mem-write: 0x80008e40 <- 0x159a023 -mem-write: 0x80008e44 <- 0x40f507b3 -mem-write: 0x80008e48 <- 0xf92023 -mem-write: 0x80008e4c <- 0x2c12083 -mem-write: 0x80008e50 <- 0x40513 -mem-write: 0x80008e54 <- 0x2812403 -mem-write: 0x80008e58 <- 0x2412483 -mem-write: 0x80008e5c <- 0x2012903 -mem-write: 0x80008e60 <- 0x1c12983 -mem-write: 0x80008e64 <- 0x1812a03 -mem-write: 0x80008e68 <- 0x1412a83 -mem-write: 0x80008e6c <- 0x3010113 -mem-write: 0x80008e70 <- 0x8067 -mem-write: 0x80008e74 <- 0xc10513 -mem-write: 0x80008e78 <- 0xcf4ff0ef -mem-write: 0x80008e7c <- 0x100793 -mem-write: 0x80008e80 <- 0xf42823 -mem-write: 0x80008e84 <- 0xc12783 -mem-write: 0x80008e88 <- 0x100493 -mem-write: 0x80008e8c <- 0xf42a23 -mem-write: 0x80008e90 <- 0x2050793 -mem-write: 0x80008e94 <- 0xfa0a90e3 -mem-write: 0x80008e98 <- 0x249713 -mem-write: 0x80008e9c <- 0xe40733 -mem-write: 0x80008ea0 <- 0x1072503 -mem-write: 0x80008ea4 <- 0xbce78793 -mem-write: 0x80008ea8 <- 0xf9a023 -mem-write: 0x80008eac <- 0xc4cff0ef -mem-write: 0x80008eb0 <- 0x549493 -mem-write: 0x80008eb4 <- 0x40a484b3 -mem-write: 0x80008eb8 <- 0x992023 -mem-write: 0x80008ebc <- 0xf91ff06f -mem-write: 0x80008ec0 <- 0x812683 -mem-write: 0x80008ec4 <- 0xd42a23 -mem-write: 0x80008ec8 <- 0xf59ff06f -mem-write: 0x80008ecc <- 0x800156b7 -mem-write: 0x80008ed0 <- 0x80015537 -mem-write: 0x80008ed4 <- 0xe7468693 -mem-write: 0x80008ed8 <- 0x613 -mem-write: 0x80008edc <- 0x30a00593 -mem-write: 0x80008ee0 <- 0xe8850513 -mem-write: 0x80008ee4 <- 0x5dc040ef -mem-write: 0x80008ee8 <- 0xfd010113 -mem-write: 0x80008eec <- 0x3212023 -mem-write: 0x80008ef0 <- 0x58913 -mem-write: 0x80008ef4 <- 0x810593 -mem-write: 0x80008ef8 <- 0x2112623 -mem-write: 0x80008efc <- 0x2812423 -mem-write: 0x80008f00 <- 0x2912223 -mem-write: 0x80008f04 <- 0x1312e23 -mem-write: 0x80008f08 <- 0x50993 -mem-write: 0x80008f0c <- 0xd5dff0ef -mem-write: 0x80008f10 <- 0x50493 -mem-write: 0x80008f14 <- 0x58413 -mem-write: 0x80008f18 <- 0x90513 -mem-write: 0x80008f1c <- 0xc10593 -mem-write: 0x80008f20 <- 0xd49ff0ef -mem-write: 0x80008f24 <- 0x1092783 -mem-write: 0x80008f28 <- 0x109a703 -mem-write: 0x80008f2c <- 0xc12683 -mem-write: 0x80008f30 <- 0x40f70733 -mem-write: 0x80008f34 <- 0x812783 -mem-write: 0x80008f38 <- 0x571713 -mem-write: 0x80008f3c <- 0x40d787b3 -mem-write: 0x80008f40 <- 0xf707b3 -mem-write: 0x80008f44 <- 0x50693 -mem-write: 0x80008f48 <- 0x2f05e63 -mem-write: 0x80008f4c <- 0x1479793 -mem-write: 0x80008f50 <- 0x878433 -mem-write: 0x80008f54 <- 0x68613 -mem-write: 0x80008f58 <- 0x48513 -mem-write: 0x80008f5c <- 0x58693 -mem-write: 0x80008f60 <- 0x40593 -mem-write: 0x80008f64 <- 0x4c9070ef -mem-write: 0x80008f68 <- 0x2c12083 -mem-write: 0x80008f6c <- 0x2812403 -mem-write: 0x80008f70 <- 0x2412483 -mem-write: 0x80008f74 <- 0x2012903 -mem-write: 0x80008f78 <- 0x1c12983 -mem-write: 0x80008f7c <- 0x3010113 -mem-write: 0x80008f80 <- 0x8067 -mem-write: 0x80008f84 <- 0x1479713 -mem-write: 0x80008f88 <- 0x40e585b3 -mem-write: 0x80008f8c <- 0xfc9ff06f -mem-write: 0x80008f90 <- 0xff010113 -mem-write: 0x80008f94 <- 0x1212023 -mem-write: 0x80008f98 <- 0x112623 -mem-write: 0x80008f9c <- 0x812423 -mem-write: 0x80008fa0 <- 0x912223 -mem-write: 0x80008fa4 <- 0x1700793 -mem-write: 0x80008fa8 <- 0x50913 -mem-write: 0x80008fac <- 0x4a7d663 -mem-write: 0x80008fb0 <- 0x1a81a783 -mem-write: 0x80008fb4 <- 0x1ac1a583 -mem-write: 0x80008fb8 <- 0x1b01a403 -mem-write: 0x80008fbc <- 0x1b41a483 -mem-write: 0x80008fc0 <- 0x78513 -mem-write: 0x80008fc4 <- 0x40613 -mem-write: 0x80008fc8 <- 0x48693 -mem-write: 0x80008fcc <- 0x340080ef -mem-write: 0x80008fd0 <- 0xfff90913 -mem-write: 0x80008fd4 <- 0x50793 -mem-write: 0x80008fd8 <- 0xfe0914e3 -mem-write: 0x80008fdc <- 0xc12083 -mem-write: 0x80008fe0 <- 0x812403 -mem-write: 0x80008fe4 <- 0x412483 -mem-write: 0x80008fe8 <- 0x12903 -mem-write: 0x80008fec <- 0x78513 -mem-write: 0x80008ff0 <- 0x1010113 -mem-write: 0x80008ff4 <- 0x8067 -mem-write: 0x80008ff8 <- 0x800157b7 -VXDRV: upload 1024 bytes to 0x80008ffc -mem-write: 0x80008ffc <- 0x351913 -mem-write: 0x80009000 <- 0xee078793 -mem-write: 0x80009004 <- 0x1278933 -mem-write: 0x80009008 <- 0x1092783 -mem-write: 0x8000900c <- 0xc12083 -mem-write: 0x80009010 <- 0x812403 -mem-write: 0x80009014 <- 0x1492583 -mem-write: 0x80009018 <- 0x412483 -mem-write: 0x8000901c <- 0x12903 -mem-write: 0x80009020 <- 0x78513 -mem-write: 0x80009024 <- 0x1010113 -mem-write: 0x80009028 <- 0x8067 -mem-write: 0x8000902c <- 0x1062683 -mem-write: 0x80009030 <- 0xfff58593 -mem-write: 0x80009034 <- 0x4055d593 -mem-write: 0x80009038 <- 0x158593 -mem-write: 0x8000903c <- 0x1460793 -mem-write: 0x80009040 <- 0x269693 -mem-write: 0x80009044 <- 0x259593 -mem-write: 0x80009048 <- 0xd786b3 -mem-write: 0x8000904c <- 0xb505b3 -mem-write: 0x80009050 <- 0x2d7f863 -mem-write: 0x80009054 <- 0x50713 -mem-write: 0x80009058 <- 0x7a803 -mem-write: 0x8000905c <- 0x478793 -mem-write: 0x80009060 <- 0x470713 -mem-write: 0x80009064 <- 0xff072e23 -mem-write: 0x80009068 <- 0xfed7e8e3 -mem-write: 0x8000906c <- 0x40c687b3 -mem-write: 0x80009070 <- 0xfeb78793 -mem-write: 0x80009074 <- 0xffc7f793 -mem-write: 0x80009078 <- 0x478793 -mem-write: 0x8000907c <- 0xf50533 -mem-write: 0x80009080 <- 0xb57863 -mem-write: 0x80009084 <- 0x450513 -mem-write: 0x80009088 <- 0xfe052e23 -mem-write: 0x8000908c <- 0xfeb56ce3 -mem-write: 0x80009090 <- 0x8067 -mem-write: 0x80009094 <- 0x1052703 -mem-write: 0x80009098 <- 0x4055d613 -mem-write: 0x8000909c <- 0x1450693 -mem-write: 0x800090a0 <- 0x2c75263 -mem-write: 0x800090a4 <- 0x271793 -mem-write: 0x800090a8 <- 0xf687b3 -mem-write: 0x800090ac <- 0x4f6f263 -mem-write: 0x800090b0 <- 0xffc7a703 -mem-write: 0x800090b4 <- 0xffc78793 -mem-write: 0x800090b8 <- 0xfe070ae3 -mem-write: 0x800090bc <- 0x100513 -mem-write: 0x800090c0 <- 0x8067 -mem-write: 0x800090c4 <- 0x261793 -mem-write: 0x800090c8 <- 0xf687b3 -mem-write: 0x800090cc <- 0xfee650e3 -mem-write: 0x800090d0 <- 0x1f5f593 -mem-write: 0x800090d4 <- 0xfc058ce3 -mem-write: 0x800090d8 <- 0x7a603 -mem-write: 0x800090dc <- 0x100513 -mem-write: 0x800090e0 <- 0xb65733 -mem-write: 0x800090e4 <- 0xb715b3 -mem-write: 0x800090e8 <- 0xfcb602e3 -mem-write: 0x800090ec <- 0x8067 -mem-write: 0x800090f0 <- 0x513 -mem-write: 0x800090f4 <- 0x8067 -mem-write: 0x800090f8 <- 0xff010113 -mem-write: 0x800090fc <- 0x912223 -mem-write: 0x80009100 <- 0x800004b7 -mem-write: 0x80009104 <- 0x812423 -mem-write: 0x80009108 <- 0x112623 -mem-write: 0x8000910c <- 0xfff4c493 -mem-write: 0x80009110 <- 0x60413 -mem-write: 0x80009114 <- 0x62023 -mem-write: 0x80009118 <- 0xb4f6b3 -mem-write: 0x8000911c <- 0x7ff00637 -mem-write: 0x80009120 <- 0x58793 -mem-write: 0x80009124 <- 0x50713 -mem-write: 0x80009128 <- 0x4c6de63 -mem-write: 0x8000912c <- 0xa6e8b3 -mem-write: 0x80009130 <- 0x4088a63 -mem-write: 0x80009134 <- 0xc5f633 -mem-write: 0x80009138 <- 0x58813 -mem-write: 0x8000913c <- 0x893 -mem-write: 0x80009140 <- 0x2061063 -mem-write: 0x80009144 <- 0x1bc1a683 -mem-write: 0x80009148 <- 0x1b81a603 -mem-write: 0x8000914c <- 0x1c0080ef -mem-write: 0x80009150 <- 0x50713 -mem-write: 0x80009154 <- 0x58813 -mem-write: 0x80009158 <- 0xb4f6b3 -mem-write: 0x8000915c <- 0xfca00893 -mem-write: 0x80009160 <- 0x4146d693 -mem-write: 0x80009164 <- 0x801007b7 -mem-write: 0x80009168 <- 0xfff78793 -mem-write: 0x8000916c <- 0xc0268693 -mem-write: 0x80009170 <- 0xf87833 -mem-write: 0x80009174 <- 0x11686b3 -mem-write: 0x80009178 <- 0x3fe007b7 -mem-write: 0x8000917c <- 0xf867b3 -mem-write: 0x80009180 <- 0xd42023 -mem-write: 0x80009184 <- 0xc12083 -mem-write: 0x80009188 <- 0x812403 -mem-write: 0x8000918c <- 0x412483 -mem-write: 0x80009190 <- 0x70513 -mem-write: 0x80009194 <- 0x78593 -mem-write: 0x80009198 <- 0x1010113 -mem-write: 0x8000919c <- 0x8067 -mem-write: 0x800091a0 <- 0xff010113 -mem-write: 0x800091a4 <- 0x812423 -mem-write: 0x800091a8 <- 0x912223 -mem-write: 0x800091ac <- 0x50413 -mem-write: 0x800091b0 <- 0x58513 -mem-write: 0x800091b4 <- 0x112623 -mem-write: 0x800091b8 <- 0x2401a423 -mem-write: 0x800091bc <- 0xc54f70ef -mem-write: 0x800091c0 <- 0xfff00793 -mem-write: 0x800091c4 <- 0xf50c63 -mem-write: 0x800091c8 <- 0xc12083 -mem-write: 0x800091cc <- 0x812403 -mem-write: 0x800091d0 <- 0x412483 -mem-write: 0x800091d4 <- 0x1010113 -mem-write: 0x800091d8 <- 0x8067 -mem-write: 0x800091dc <- 0x2481a783 -mem-write: 0x800091e0 <- 0xfe0784e3 -mem-write: 0x800091e4 <- 0xc12083 -mem-write: 0x800091e8 <- 0xf42023 -mem-write: 0x800091ec <- 0x812403 -mem-write: 0x800091f0 <- 0x412483 -mem-write: 0x800091f4 <- 0x1010113 -mem-write: 0x800091f8 <- 0x8067 -mem-write: 0x800091fc <- 0xf6010113 -mem-write: 0x80009200 <- 0x8c10e93 -mem-write: 0x80009204 <- 0x8f12a23 -mem-write: 0x80009208 <- 0x80000337 -mem-write: 0x8000920c <- 0xffff07b7 -mem-write: 0x80009210 <- 0x58e13 -mem-write: 0x80009214 <- 0xfff34313 -mem-write: 0x80009218 <- 0x8d12623 -mem-write: 0x8000921c <- 0x20878793 -mem-write: 0x80009220 <- 0x810593 -mem-write: 0x80009224 <- 0xe8693 -mem-write: 0x80009228 <- 0x6112e23 -mem-write: 0x8000922c <- 0xf12a23 -mem-write: 0x80009230 <- 0x8e12823 -mem-write: 0x80009234 <- 0x9012c23 -mem-write: 0x80009238 <- 0x9112e23 -mem-write: 0x8000923c <- 0x1c12423 -mem-write: 0x80009240 <- 0x1c12c23 -mem-write: 0x80009244 <- 0x612e23 -mem-write: 0x80009248 <- 0x612823 -mem-write: 0x8000924c <- 0x1d12223 -mem-write: 0x80009250 <- 0x3d0000ef -mem-write: 0x80009254 <- 0x812783 -mem-write: 0x80009258 <- 0x78023 -mem-write: 0x8000925c <- 0x7c12083 -mem-write: 0x80009260 <- 0xa010113 -mem-write: 0x80009264 <- 0x8067 -mem-write: 0x80009268 <- 0x50e13 -mem-write: 0x8000926c <- 0xf6010113 -mem-write: 0x80009270 <- 0x1d81a503 -mem-write: 0x80009274 <- 0x8810e93 -mem-write: 0x80009278 <- 0x8f12a23 -mem-write: 0x8000927c <- 0x80000337 -mem-write: 0x80009280 <- 0xffff07b7 -mem-write: 0x80009284 <- 0xfff34313 -mem-write: 0x80009288 <- 0x8c12423 -mem-write: 0x8000928c <- 0x8d12623 -mem-write: 0x80009290 <- 0x20878793 -mem-write: 0x80009294 <- 0x58613 -mem-write: 0x80009298 <- 0xe8693 -mem-write: 0x8000929c <- 0x810593 -mem-write: 0x800092a0 <- 0x6112e23 -mem-write: 0x800092a4 <- 0xf12a23 -mem-write: 0x800092a8 <- 0x8e12823 -mem-write: 0x800092ac <- 0x9012c23 -mem-write: 0x800092b0 <- 0x9112e23 -mem-write: 0x800092b4 <- 0x1c12423 -mem-write: 0x800092b8 <- 0x1c12c23 -mem-write: 0x800092bc <- 0x612e23 -mem-write: 0x800092c0 <- 0x612823 -mem-write: 0x800092c4 <- 0x1d12223 -mem-write: 0x800092c8 <- 0x358000ef -mem-write: 0x800092cc <- 0x812783 -mem-write: 0x800092d0 <- 0x78023 -mem-write: 0x800092d4 <- 0x7c12083 -mem-write: 0x800092d8 <- 0xa010113 -mem-write: 0x800092dc <- 0x8067 -mem-write: 0x800092e0 <- 0xff010113 -mem-write: 0x800092e4 <- 0x812423 -mem-write: 0x800092e8 <- 0x58413 -mem-write: 0x800092ec <- 0xe59583 -mem-write: 0x800092f0 <- 0x112623 -mem-write: 0x800092f4 <- 0x7c9040ef -mem-write: 0x800092f8 <- 0x2054063 -mem-write: 0x800092fc <- 0x5042783 -mem-write: 0x80009300 <- 0xc12083 -mem-write: 0x80009304 <- 0xa787b3 -mem-write: 0x80009308 <- 0x4f42823 -mem-write: 0x8000930c <- 0x812403 -mem-write: 0x80009310 <- 0x1010113 -mem-write: 0x80009314 <- 0x8067 -mem-write: 0x80009318 <- 0xc45783 -mem-write: 0x8000931c <- 0xfffff737 -mem-write: 0x80009320 <- 0xfff70713 -mem-write: 0x80009324 <- 0xe7f7b3 -mem-write: 0x80009328 <- 0xc12083 -mem-write: 0x8000932c <- 0xf41623 -mem-write: 0x80009330 <- 0x812403 -mem-write: 0x80009334 <- 0x1010113 -mem-write: 0x80009338 <- 0x8067 -mem-write: 0x8000933c <- 0x513 -mem-write: 0x80009340 <- 0x8067 -mem-write: 0x80009344 <- 0xc59783 -mem-write: 0x80009348 <- 0xfe010113 -mem-write: 0x8000934c <- 0x812c23 -mem-write: 0x80009350 <- 0x912a23 -mem-write: 0x80009354 <- 0x1212823 -mem-write: 0x80009358 <- 0x1312623 -mem-write: 0x8000935c <- 0x112e23 -mem-write: 0x80009360 <- 0x1007f713 -mem-write: 0x80009364 <- 0x58413 -mem-write: 0x80009368 <- 0x50493 -mem-write: 0x8000936c <- 0xe59583 -mem-write: 0x80009370 <- 0x60913 -mem-write: 0x80009374 <- 0x68993 -mem-write: 0x80009378 <- 0x2071e63 -mem-write: 0x8000937c <- 0xfffff737 -mem-write: 0x80009380 <- 0xfff70713 -mem-write: 0x80009384 <- 0xe7f7b3 -mem-write: 0x80009388 <- 0xf41623 -mem-write: 0x8000938c <- 0x1812403 -mem-write: 0x80009390 <- 0x1c12083 -mem-write: 0x80009394 <- 0x98693 -mem-write: 0x80009398 <- 0x90613 -mem-write: 0x8000939c <- 0xc12983 -mem-write: 0x800093a0 <- 0x1012903 -mem-write: 0x800093a4 <- 0x48513 -mem-write: 0x800093a8 <- 0x1412483 -mem-write: 0x800093ac <- 0x2010113 -mem-write: 0x800093b0 <- 0xa80406f -mem-write: 0x800093b4 <- 0x200693 -mem-write: 0x800093b8 <- 0x613 -mem-write: 0x800093bc <- 0x3ed040ef -mem-write: 0x800093c0 <- 0xc41783 -mem-write: 0x800093c4 <- 0xe41583 -mem-write: 0x800093c8 <- 0xfb5ff06f -mem-write: 0x800093cc <- 0xff010113 -mem-write: 0x800093d0 <- 0x812423 -mem-write: 0x800093d4 <- 0x58413 -mem-write: 0x800093d8 <- 0xe59583 -mem-write: 0x800093dc <- 0x112623 -mem-write: 0x800093e0 <- 0x3c9040ef -mem-write: 0x800093e4 <- 0xfff00793 -mem-write: 0x800093e8 <- 0x2f50463 -mem-write: 0x800093ec <- 0xc45783 -mem-write: 0x800093f0 <- 0x1737 -mem-write: 0x800093f4 <- 0xc12083 -mem-write: 0x800093f8 <- 0xe7e7b3 -VXDRV: upload 1024 bytes to 0x800093fc -mem-write: 0x800093fc <- 0x4a42823 -mem-write: 0x80009400 <- 0xf41623 -mem-write: 0x80009404 <- 0x812403 -mem-write: 0x80009408 <- 0x1010113 -mem-write: 0x8000940c <- 0x8067 -mem-write: 0x80009410 <- 0xc45783 -mem-write: 0x80009414 <- 0xfffff737 -mem-write: 0x80009418 <- 0xfff70713 -mem-write: 0x8000941c <- 0xe7f7b3 -mem-write: 0x80009420 <- 0xc12083 -mem-write: 0x80009424 <- 0xf41623 -mem-write: 0x80009428 <- 0x812403 -mem-write: 0x8000942c <- 0x1010113 -mem-write: 0x80009430 <- 0x8067 -mem-write: 0x80009434 <- 0xe59583 -mem-write: 0x80009438 <- 0x1a00406f -mem-write: 0x8000943c <- 0xb567b3 -mem-write: 0x80009440 <- 0x37f793 -mem-write: 0x80009444 <- 0x8079263 -mem-write: 0x80009448 <- 0x5a703 -mem-write: 0x8000944c <- 0x7f7f86b7 -mem-write: 0x80009450 <- 0xf7f68693 -mem-write: 0x80009454 <- 0xd777b3 -mem-write: 0x80009458 <- 0xd787b3 -mem-write: 0x8000945c <- 0xe7e7b3 -mem-write: 0x80009460 <- 0xd7e7b3 -mem-write: 0x80009464 <- 0xfff00613 -mem-write: 0x80009468 <- 0x6c79e63 -mem-write: 0x8000946c <- 0x50613 -mem-write: 0x80009470 <- 0xfff00813 -mem-write: 0x80009474 <- 0xe62023 -mem-write: 0x80009478 <- 0x45a703 -mem-write: 0x8000947c <- 0x458593 -mem-write: 0x80009480 <- 0x460613 -mem-write: 0x80009484 <- 0xd777b3 -mem-write: 0x80009488 <- 0xd787b3 -mem-write: 0x8000948c <- 0xe7e7b3 -mem-write: 0x80009490 <- 0xd7e7b3 -mem-write: 0x80009494 <- 0xff0780e3 -mem-write: 0x80009498 <- 0x5c783 -mem-write: 0x8000949c <- 0x15c703 -mem-write: 0x800094a0 <- 0x25c683 -mem-write: 0x800094a4 <- 0xf60023 -mem-write: 0x800094a8 <- 0x78a63 -mem-write: 0x800094ac <- 0xe600a3 -mem-write: 0x800094b0 <- 0x70663 -mem-write: 0x800094b4 <- 0xd60123 -mem-write: 0x800094b8 <- 0x69463 -mem-write: 0x800094bc <- 0x8067 -mem-write: 0x800094c0 <- 0x601a3 -mem-write: 0x800094c4 <- 0x8067 -mem-write: 0x800094c8 <- 0x50793 -mem-write: 0x800094cc <- 0x5c703 -mem-write: 0x800094d0 <- 0x178793 -mem-write: 0x800094d4 <- 0x158593 -mem-write: 0x800094d8 <- 0xfee78fa3 -mem-write: 0x800094dc <- 0xfe0718e3 -mem-write: 0x800094e0 <- 0x8067 -mem-write: 0x800094e4 <- 0x50613 -mem-write: 0x800094e8 <- 0xfb1ff06f -mem-write: 0x800094ec <- 0x357793 -mem-write: 0x800094f0 <- 0x50713 -mem-write: 0x800094f4 <- 0x4079c63 -mem-write: 0x800094f8 <- 0x7f7f86b7 -mem-write: 0x800094fc <- 0xf7f68693 -mem-write: 0x80009500 <- 0xfff00593 -mem-write: 0x80009504 <- 0x72603 -mem-write: 0x80009508 <- 0x470713 -mem-write: 0x8000950c <- 0xd677b3 -mem-write: 0x80009510 <- 0xd787b3 -mem-write: 0x80009514 <- 0xc7e7b3 -mem-write: 0x80009518 <- 0xd7e7b3 -mem-write: 0x8000951c <- 0xfeb784e3 -mem-write: 0x80009520 <- 0xffc74683 -mem-write: 0x80009524 <- 0xffd74603 -mem-write: 0x80009528 <- 0xffe74783 -mem-write: 0x8000952c <- 0x40a70733 -mem-write: 0x80009530 <- 0x4068063 -mem-write: 0x80009534 <- 0x2060a63 -mem-write: 0x80009538 <- 0xf03533 -mem-write: 0x8000953c <- 0xe50533 -mem-write: 0x80009540 <- 0xffe50513 -mem-write: 0x80009544 <- 0x8067 -mem-write: 0x80009548 <- 0xfa0688e3 -mem-write: 0x8000954c <- 0x74783 -mem-write: 0x80009550 <- 0x170713 -mem-write: 0x80009554 <- 0x377693 -mem-write: 0x80009558 <- 0xfe0798e3 -mem-write: 0x8000955c <- 0x40a70733 -mem-write: 0x80009560 <- 0xfff70513 -mem-write: 0x80009564 <- 0x8067 -mem-write: 0x80009568 <- 0xffd70513 -mem-write: 0x8000956c <- 0x8067 -mem-write: 0x80009570 <- 0xffc70513 -mem-write: 0x80009574 <- 0x8067 -mem-write: 0x80009578 <- 0xa5e7b3 -mem-write: 0x8000957c <- 0x37f793 -mem-write: 0x80009580 <- 0x50713 -mem-write: 0x80009584 <- 0x6079863 -mem-write: 0x80009588 <- 0x300793 -mem-write: 0x8000958c <- 0x6c7f463 -mem-write: 0x80009590 <- 0xfeff0337 -mem-write: 0x80009594 <- 0x808088b7 -mem-write: 0x80009598 <- 0xeff30313 -mem-write: 0x8000959c <- 0x8088893 -mem-write: 0x800095a0 <- 0x300e13 -mem-write: 0x800095a4 <- 0x5a683 -mem-write: 0x800095a8 <- 0x6687b3 -mem-write: 0x800095ac <- 0xfff6c813 -mem-write: 0x800095b0 <- 0x107f7b3 -mem-write: 0x800095b4 <- 0x117f7b3 -mem-write: 0x800095b8 <- 0x2079e63 -mem-write: 0x800095bc <- 0xd72023 -mem-write: 0x800095c0 <- 0xffc60613 -mem-write: 0x800095c4 <- 0x470713 -mem-write: 0x800095c8 <- 0x458593 -mem-write: 0x800095cc <- 0xfcce6ce3 -mem-write: 0x800095d0 <- 0x158593 -mem-write: 0x800095d4 <- 0x170793 -mem-write: 0x800095d8 <- 0x2060463 -mem-write: 0x800095dc <- 0xfff5c683 -mem-write: 0x800095e0 <- 0xfff60813 -mem-write: 0x800095e4 <- 0xfed78fa3 -mem-write: 0x800095e8 <- 0x68e63 -mem-write: 0x800095ec <- 0x78713 -mem-write: 0x800095f0 <- 0x80613 -mem-write: 0x800095f4 <- 0x158593 -mem-write: 0x800095f8 <- 0x170793 -mem-write: 0x800095fc <- 0xfe0610e3 -mem-write: 0x80009600 <- 0x8067 -mem-write: 0x80009604 <- 0xc70633 -mem-write: 0x80009608 <- 0x80a63 -mem-write: 0x8000960c <- 0x178793 -mem-write: 0x80009610 <- 0xfe078fa3 -mem-write: 0x80009614 <- 0xfec79ce3 -mem-write: 0x80009618 <- 0x8067 -mem-write: 0x8000961c <- 0x8067 -mem-write: 0x80009620 <- 0xe1010113 -mem-write: 0x80009624 <- 0x1e112623 -mem-write: 0x80009628 <- 0x1f212023 -mem-write: 0x8000962c <- 0x1d812423 -mem-write: 0x80009630 <- 0x1da12023 -mem-write: 0x80009634 <- 0x58c13 -mem-write: 0x80009638 <- 0x60913 -mem-write: 0x8000963c <- 0xd12a23 -mem-write: 0x80009640 <- 0x1e812423 -mem-write: 0x80009644 <- 0x1e912223 -mem-write: 0x80009648 <- 0x1d312e23 -mem-write: 0x8000964c <- 0x1d412c23 -mem-write: 0x80009650 <- 0x1d512a23 -mem-write: 0x80009654 <- 0x1d612823 -mem-write: 0x80009658 <- 0x1d712623 -mem-write: 0x8000965c <- 0x1d912223 -mem-write: 0x80009660 <- 0x1bb12e23 -mem-write: 0x80009664 <- 0x50d13 -mem-write: 0x80009668 <- 0xed1fd0ef -mem-write: 0x8000966c <- 0x52783 -mem-write: 0x80009670 <- 0x78513 -mem-write: 0x80009674 <- 0x2f12823 -mem-write: 0x80009678 <- 0xe75ff0ef -mem-write: 0x8000967c <- 0xcc5703 -mem-write: 0x80009680 <- 0xe012823 -mem-write: 0x80009684 <- 0xe012a23 -mem-write: 0x80009688 <- 0xe012c23 -mem-write: 0x8000968c <- 0xe012e23 -mem-write: 0x80009690 <- 0x8077713 -mem-write: 0x80009694 <- 0x2a12623 -mem-write: 0x80009698 <- 0x70863 -mem-write: 0x8000969c <- 0x10c2703 -mem-write: 0x800096a0 <- 0x71463 -mem-write: 0x800096a4 <- 0x56c0106f -mem-write: 0x800096a8 <- 0x10c10793 -mem-write: 0x800096ac <- 0x80015737 -mem-write: 0x800096b0 <- 0xef12223 -mem-write: 0x800096b4 <- 0x78893 -mem-write: 0x800096b8 <- 0x870793 -mem-write: 0x800096bc <- 0x80015737 -mem-write: 0x800096c0 <- 0xf12c23 -mem-write: 0x800096c4 <- 0x90b13 -mem-write: 0x800096c8 <- 0x18470793 -mem-write: 0x800096cc <- 0xf12423 -mem-write: 0x800096d0 <- 0xb4783 -mem-write: 0x800096d4 <- 0xe012623 -mem-write: 0x800096d8 <- 0xe012423 -mem-write: 0x800096dc <- 0x2012023 -mem-write: 0x800096e0 <- 0x2012a23 -mem-write: 0x800096e4 <- 0x2012c23 -mem-write: 0x800096e8 <- 0x2012e23 -mem-write: 0x800096ec <- 0x4012423 -mem-write: 0x800096f0 <- 0x4012623 -mem-write: 0x800096f4 <- 0x12623 -mem-write: 0x800096f8 <- 0x22078463 -mem-write: 0x800096fc <- 0xb0413 -mem-write: 0x80009700 <- 0x2500693 -mem-write: 0x80009704 <- 0x2cd78463 -mem-write: 0x80009708 <- 0x144783 -mem-write: 0x8000970c <- 0x140413 -mem-write: 0x80009710 <- 0xfe079ae3 -mem-write: 0x80009714 <- 0x416404b3 -mem-write: 0x80009718 <- 0x21640463 -mem-write: 0x8000971c <- 0xec12683 -mem-write: 0x80009720 <- 0xe812783 -mem-write: 0x80009724 <- 0x168a023 -mem-write: 0x80009728 <- 0x9686b3 -mem-write: 0x8000972c <- 0x178793 -mem-write: 0x80009730 <- 0x98a223 -mem-write: 0x80009734 <- 0xed12623 -mem-write: 0x80009738 <- 0xef12423 -mem-write: 0x8000973c <- 0x700693 -mem-write: 0x80009740 <- 0x888893 -mem-write: 0x80009744 <- 0x28f6cc63 -mem-write: 0x80009748 <- 0xc12703 -mem-write: 0x8000974c <- 0x44783 -mem-write: 0x80009750 <- 0x970733 -mem-write: 0x80009754 <- 0xe12623 -mem-write: 0x80009758 <- 0x1c078463 -mem-write: 0x8000975c <- 0x144483 -mem-write: 0x80009760 <- 0xc0103a3 -mem-write: 0x80009764 <- 0x140413 -mem-write: 0x80009768 <- 0xfff00d93 -mem-write: 0x8000976c <- 0x993 -mem-write: 0x80009770 <- 0xa13 -mem-write: 0x80009774 <- 0x5a00913 -mem-write: 0x80009778 <- 0x900a93 -mem-write: 0x8000977c <- 0x2a00b93 -mem-write: 0x80009780 <- 0x88c93 -mem-write: 0x80009784 <- 0x140413 -mem-write: 0x80009788 <- 0xfe048793 -mem-write: 0x8000978c <- 0x4f96463 -mem-write: 0x80009790 <- 0x1812703 -mem-write: 0x80009794 <- 0x279793 -mem-write: 0x80009798 <- 0xe787b3 -mem-write: 0x8000979c <- 0x7a783 -mem-write: 0x800097a0 <- 0x78067 -mem-write: 0x800097a4 <- 0x993 -mem-write: 0x800097a8 <- 0xfd048693 -mem-write: 0x800097ac <- 0x44483 -mem-write: 0x800097b0 <- 0x299793 -mem-write: 0x800097b4 <- 0x13787b3 -mem-write: 0x800097b8 <- 0x179793 -mem-write: 0x800097bc <- 0xf689b3 -mem-write: 0x800097c0 <- 0xfd048693 -mem-write: 0x800097c4 <- 0x140413 -mem-write: 0x800097c8 <- 0xfedaf2e3 -mem-write: 0x800097cc <- 0xfe048793 -mem-write: 0x800097d0 <- 0xfcf970e3 -mem-write: 0x800097d4 <- 0xc8893 -mem-write: 0x800097d8 <- 0x14048463 -mem-write: 0x800097dc <- 0x14910623 -mem-write: 0x800097e0 <- 0xc0103a3 -mem-write: 0x800097e4 <- 0x100a93 -mem-write: 0x800097e8 <- 0x100c93 -mem-write: 0x800097ec <- 0x14c10b13 -mem-write: 0x800097f0 <- 0x12823 -mem-write: 0x800097f4 <- 0xd93 -mem-write: 0x800097f8 <- 0x2012423 -VXDRV: upload 1024 bytes to 0x800097fc -mem-write: 0x800097fc <- 0x2012223 -mem-write: 0x80009800 <- 0x12e23 -mem-write: 0x80009804 <- 0x2a7b93 -mem-write: 0x80009808 <- 0xb8463 -mem-write: 0x8000980c <- 0x2a8a93 -mem-write: 0x80009810 <- 0x84a7913 -mem-write: 0x80009814 <- 0xec12783 -mem-write: 0x80009818 <- 0x91663 -mem-write: 0x8000981c <- 0x41598833 -mem-write: 0x80009820 <- 0x63004ce3 -mem-write: 0x80009824 <- 0xc714683 -mem-write: 0x80009828 <- 0x2068a63 -mem-write: 0x8000982c <- 0xe812683 -mem-write: 0x80009830 <- 0xc710613 -mem-write: 0x80009834 <- 0xc8a023 -mem-write: 0x80009838 <- 0x178793 -mem-write: 0x8000983c <- 0x100613 -mem-write: 0x80009840 <- 0x168693 -mem-write: 0x80009844 <- 0xc8a223 -mem-write: 0x80009848 <- 0xef12623 -mem-write: 0x8000984c <- 0xed12423 -mem-write: 0x80009850 <- 0x700613 -mem-write: 0x80009854 <- 0x888893 -mem-write: 0x80009858 <- 0x4cd64c63 -mem-write: 0x8000985c <- 0x20b8a63 -mem-write: 0x80009860 <- 0xe812683 -mem-write: 0x80009864 <- 0xc810613 -mem-write: 0x80009868 <- 0xc8a023 -mem-write: 0x8000986c <- 0x278793 -mem-write: 0x80009870 <- 0x200613 -mem-write: 0x80009874 <- 0x168693 -mem-write: 0x80009878 <- 0xc8a223 -mem-write: 0x8000987c <- 0xef12623 -mem-write: 0x80009880 <- 0xed12423 -mem-write: 0x80009884 <- 0x700613 -mem-write: 0x80009888 <- 0x888893 -mem-write: 0x8000988c <- 0x6ad64ce3 -mem-write: 0x80009890 <- 0x8000693 -mem-write: 0x80009894 <- 0x42d900e3 -mem-write: 0x80009898 <- 0x419d8db3 -mem-write: 0x8000989c <- 0x4db04ee3 -mem-write: 0x800098a0 <- 0x100a7693 -mem-write: 0x800098a4 <- 0x2c069ae3 -mem-write: 0x800098a8 <- 0xe812703 -mem-write: 0x800098ac <- 0x19787b3 -mem-write: 0x800098b0 <- 0x168a023 -mem-write: 0x800098b4 <- 0x170713 -mem-write: 0x800098b8 <- 0x198a223 -mem-write: 0x800098bc <- 0xef12623 -mem-write: 0x800098c0 <- 0xee12423 -mem-write: 0x800098c4 <- 0x700693 -mem-write: 0x800098c8 <- 0x5ae6c063 -mem-write: 0x800098cc <- 0x888893 -mem-write: 0x800098d0 <- 0x4a7a13 -mem-write: 0x800098d4 <- 0xa0663 -mem-write: 0x800098d8 <- 0x415984b3 -mem-write: 0x800098dc <- 0x5a904663 -mem-write: 0x800098e0 <- 0x159d463 -mem-write: 0x800098e4 <- 0xa8993 -mem-write: 0x800098e8 <- 0xc12703 -mem-write: 0x800098ec <- 0x1370733 -mem-write: 0x800098f0 <- 0xe12623 -mem-write: 0x800098f4 <- 0x52079ce3 -mem-write: 0x800098f8 <- 0x1012783 -mem-write: 0x800098fc <- 0xe012423 -mem-write: 0x80009900 <- 0x78863 -mem-write: 0x80009904 <- 0x1012583 -mem-write: 0x80009908 <- 0xd0513 -mem-write: 0x8000990c <- 0xc59fa0ef -mem-write: 0x80009910 <- 0x10c10893 -mem-write: 0x80009914 <- 0x40b13 -mem-write: 0x80009918 <- 0xb4783 -mem-write: 0x8000991c <- 0xde0790e3 -mem-write: 0x80009920 <- 0xec12783 -mem-write: 0x80009924 <- 0x78463 -mem-write: 0x80009928 <- 0x3450106f -mem-write: 0x8000992c <- 0xcc5703 -mem-write: 0x80009930 <- 0x4077713 -mem-write: 0x80009934 <- 0x70463 -mem-write: 0x80009938 <- 0x3f80206f -mem-write: 0x8000993c <- 0x1ec12083 -mem-write: 0x80009940 <- 0x1e812403 -mem-write: 0x80009944 <- 0xc12503 -mem-write: 0x80009948 <- 0x1e412483 -mem-write: 0x8000994c <- 0x1e012903 -mem-write: 0x80009950 <- 0x1dc12983 -mem-write: 0x80009954 <- 0x1d812a03 -mem-write: 0x80009958 <- 0x1d412a83 -mem-write: 0x8000995c <- 0x1d012b03 -mem-write: 0x80009960 <- 0x1cc12b83 -mem-write: 0x80009964 <- 0x1c812c03 -mem-write: 0x80009968 <- 0x1c412c83 -mem-write: 0x8000996c <- 0x1c012d03 -mem-write: 0x80009970 <- 0x1bc12d83 -mem-write: 0x80009974 <- 0x1f010113 -mem-write: 0x80009978 <- 0x8067 -mem-write: 0x8000997c <- 0xd0513 -mem-write: 0x80009980 <- 0xbb9fd0ef -mem-write: 0x80009984 <- 0x452783 -mem-write: 0x80009988 <- 0x78513 -mem-write: 0x8000998c <- 0x4f12623 -mem-write: 0x80009990 <- 0xb5dff0ef -mem-write: 0x80009994 <- 0x50793 -mem-write: 0x80009998 <- 0xd0513 -mem-write: 0x8000999c <- 0x78493 -mem-write: 0x800099a0 <- 0x4f12423 -mem-write: 0x800099a4 <- 0xb95fd0ef -mem-write: 0x800099a8 <- 0x852783 -mem-write: 0x800099ac <- 0x2f12e23 -mem-write: 0x800099b0 <- 0x48463 -mem-write: 0x800099b4 <- 0x1640106f -mem-write: 0x800099b8 <- 0x44483 -mem-write: 0x800099bc <- 0xdc9ff06f -mem-write: 0x800099c0 <- 0x44483 -mem-write: 0x800099c4 <- 0x20a6a13 -mem-write: 0x800099c8 <- 0xdbdff06f -mem-write: 0x800099cc <- 0x416404b3 -mem-write: 0x800099d0 <- 0xd56416e3 -mem-write: 0x800099d4 <- 0x44783 -mem-write: 0x800099d8 <- 0xd81ff06f -mem-write: 0x800099dc <- 0xe410613 -mem-write: 0x800099e0 <- 0xc0593 -mem-write: 0x800099e4 <- 0xd0513 -mem-write: 0x800099e8 <- 0x174050ef -mem-write: 0x800099ec <- 0xf40510e3 -mem-write: 0x800099f0 <- 0x10c10893 -mem-write: 0x800099f4 <- 0xd55ff06f -mem-write: 0x800099f8 <- 0x8a7793 -mem-write: 0x800099fc <- 0xc8893 -mem-write: 0x80009a00 <- 0x78463 -mem-write: 0x80009a04 <- 0xa80106f -mem-write: 0x80009a08 <- 0x1412783 -mem-write: 0x80009a0c <- 0xb010513 -mem-write: 0x80009a10 <- 0x1912823 -mem-write: 0x80009a14 <- 0x778793 -mem-write: 0x80009a18 <- 0xff87f793 -mem-write: 0x80009a1c <- 0x7a583 -mem-write: 0x80009a20 <- 0x47a603 -mem-write: 0x80009a24 <- 0x878793 -mem-write: 0x80009a28 <- 0xf12a23 -mem-write: 0x80009a2c <- 0x1810a0ef -mem-write: 0x80009a30 <- 0xb012783 -mem-write: 0x80009a34 <- 0x1012883 -mem-write: 0x80009a38 <- 0xef12823 -mem-write: 0x80009a3c <- 0xb412783 -mem-write: 0x80009a40 <- 0xef12a23 -mem-write: 0x80009a44 <- 0xb812783 -mem-write: 0x80009a48 <- 0xef12c23 -mem-write: 0x80009a4c <- 0xbc12783 -mem-write: 0x80009a50 <- 0xef12e23 -mem-write: 0x80009a54 <- 0xf010513 -mem-write: 0x80009a58 <- 0x1112823 -mem-write: 0x80009a5c <- 0xa71fd0ef -mem-write: 0x80009a60 <- 0xca12623 -mem-write: 0x80009a64 <- 0x200793 -mem-write: 0x80009a68 <- 0x1012883 -mem-write: 0x80009a6c <- 0xf51463 -mem-write: 0x80009a70 <- 0x6580106f -mem-write: 0x80009a74 <- 0x100793 -mem-write: 0x80009a78 <- 0xf51463 -mem-write: 0x80009a7c <- 0x750106f -mem-write: 0x80009a80 <- 0x6100793 -mem-write: 0x80009a84 <- 0xf49463 -mem-write: 0x80009a88 <- 0x19c0206f -mem-write: 0x80009a8c <- 0x4100793 -mem-write: 0x80009a90 <- 0xf49463 -mem-write: 0x80009a94 <- 0x52d0106f -mem-write: 0x80009a98 <- 0xfdf4fb93 -mem-write: 0x80009a9c <- 0xfff00793 -mem-write: 0x80009aa0 <- 0x5712a23 -mem-write: 0x80009aa4 <- 0xfd9463 -mem-write: 0x80009aa8 <- 0x2150106f -mem-write: 0x80009aac <- 0x4700793 -mem-write: 0x80009ab0 <- 0xfb9463 -mem-write: 0x80009ab4 <- 0x1e80206f -mem-write: 0x80009ab8 <- 0xfc12303 -mem-write: 0x80009abc <- 0x3412423 -mem-write: 0x80009ac0 <- 0xf012e03 -mem-write: 0x80009ac4 <- 0xf412e83 -mem-write: 0x80009ac8 <- 0xf812f03 -mem-write: 0x80009acc <- 0x100a6793 -mem-write: 0x80009ad0 <- 0x35463 -mem-write: 0x80009ad4 <- 0x39c0206f -mem-write: 0x80009ad8 <- 0x4012c23 -mem-write: 0x80009adc <- 0x78a13 -mem-write: 0x80009ae0 <- 0x12823 -mem-write: 0x80009ae4 <- 0x4600793 -mem-write: 0x80009ae8 <- 0xfb9463 -mem-write: 0x80009aec <- 0x2b90106f -mem-write: 0x80009af0 <- 0x4500793 -mem-write: 0x80009af4 <- 0x5112223 -mem-write: 0x80009af8 <- 0xfb8463 -mem-write: 0x80009afc <- 0x33d0106f -mem-write: 0x80009b00 <- 0x1d8913 -mem-write: 0x80009b04 <- 0xb010a93 -mem-write: 0x80009b08 <- 0x90693 -mem-write: 0x80009b0c <- 0xdc10813 -mem-write: 0x80009b10 <- 0xd010793 -mem-write: 0x80009b14 <- 0xcc10713 -mem-write: 0x80009b18 <- 0x200613 -mem-write: 0x80009b1c <- 0xa8593 -mem-write: 0x80009b20 <- 0xd0513 -mem-write: 0x80009b24 <- 0xbc12823 -mem-write: 0x80009b28 <- 0x5c12023 -mem-write: 0x80009b2c <- 0xbd12a23 -mem-write: 0x80009b30 <- 0x3d12223 -mem-write: 0x80009b34 <- 0xbe12c23 -mem-write: 0x80009b38 <- 0x3e12023 -mem-write: 0x80009b3c <- 0xa612e23 -mem-write: 0x80009b40 <- 0x612e23 -mem-write: 0x80009b44 <- 0xef0fc0ef -mem-write: 0x80009b48 <- 0x1c12303 -mem-write: 0x80009b4c <- 0x2012f03 -mem-write: 0x80009b50 <- 0x2412e83 -mem-write: 0x80009b54 <- 0x4012e03 -mem-write: 0x80009b58 <- 0x4412883 -mem-write: 0x80009b5c <- 0x50b13 -mem-write: 0x80009b60 <- 0x1250933 -mem-write: 0x80009b64 <- 0xa010c93 -mem-write: 0x80009b68 <- 0xc8593 -mem-write: 0x80009b6c <- 0xa8513 -mem-write: 0x80009b70 <- 0x1112e23 -mem-write: 0x80009b74 <- 0xbc12823 -mem-write: 0x80009b78 <- 0xbd12a23 -mem-write: 0x80009b7c <- 0xbe12c23 -mem-write: 0x80009b80 <- 0xa612e23 -mem-write: 0x80009b84 <- 0xa012023 -mem-write: 0x80009b88 <- 0xa012223 -mem-write: 0x80009b8c <- 0xa012423 -mem-write: 0x80009b90 <- 0xa012623 -mem-write: 0x80009b94 <- 0x53d070ef -mem-write: 0x80009b98 <- 0x1c12883 -mem-write: 0x80009b9c <- 0x90713 -mem-write: 0x80009ba0 <- 0x2050263 -mem-write: 0x80009ba4 <- 0xdc12703 -mem-write: 0x80009ba8 <- 0x1277e63 -mem-write: 0x80009bac <- 0x3000693 -mem-write: 0x80009bb0 <- 0x170793 -mem-write: 0x80009bb4 <- 0xcf12e23 -mem-write: 0x80009bb8 <- 0xd70023 -mem-write: 0x80009bbc <- 0xdc12703 -mem-write: 0x80009bc0 <- 0xff2768e3 -mem-write: 0x80009bc4 <- 0x416707b3 -mem-write: 0x80009bc8 <- 0x2f12023 -mem-write: 0x80009bcc <- 0xcc12703 -mem-write: 0x80009bd0 <- 0x4700793 -mem-write: 0x80009bd4 <- 0xe12e23 -mem-write: 0x80009bd8 <- 0x5412703 -mem-write: 0x80009bdc <- 0xf71463 -mem-write: 0x80009be0 <- 0x1150106f -mem-write: 0x80009be4 <- 0x5412703 -mem-write: 0x80009be8 <- 0x4600793 -mem-write: 0x80009bec <- 0xf71463 -mem-write: 0x80009bf0 <- 0x34d0106f -mem-write: 0x80009bf4 <- 0x1c12783 -mem-write: 0x80009bf8 <- 0x5412703 -VXDRV: upload 1023 bytes to 0x80009bfc -mem-write: 0x80009bfc <- 0x4100593 -mem-write: 0x80009c00 <- 0xfff78793 -mem-write: 0x80009c04 <- 0xcf12623 -mem-write: 0x80009c08 <- 0xff4f693 -mem-write: 0x80009c0c <- 0x613 -mem-write: 0x80009c10 <- 0xb71863 -mem-write: 0x80009c14 <- 0xf68693 -mem-write: 0x80009c18 <- 0xff6f693 -mem-write: 0x80009c1c <- 0x100613 -mem-write: 0x80009c20 <- 0xcd10a23 -mem-write: 0x80009c24 <- 0x2b00693 -mem-write: 0x80009c28 <- 0x7da63 -mem-write: 0x80009c2c <- 0x1c12703 -mem-write: 0x80009c30 <- 0x100793 -mem-write: 0x80009c34 <- 0x2d00693 -mem-write: 0x80009c38 <- 0x40e787b3 -mem-write: 0x80009c3c <- 0xcd10aa3 -mem-write: 0x80009c40 <- 0x900693 -mem-write: 0x80009c44 <- 0xf6c463 -mem-write: 0x80009c48 <- 0xf40206f -mem-write: 0x80009c4c <- 0xe310813 -mem-write: 0x80009c50 <- 0x80513 -mem-write: 0x80009c54 <- 0xa00613 -mem-write: 0x80009c58 <- 0x6300e13 -mem-write: 0x80009c5c <- 0x2c7e733 -mem-write: 0x80009c60 <- 0x50593 -mem-write: 0x80009c64 <- 0x78693 -mem-write: 0x80009c68 <- 0xfff50513 -mem-write: 0x80009c6c <- 0x3070713 -mem-write: 0x80009c70 <- 0xfee58fa3 -mem-write: 0x80009c74 <- 0x2c7c7b3 -mem-write: 0x80009c78 <- 0xfede42e3 -mem-write: 0x80009c7c <- 0x3078793 -mem-write: 0x80009c80 <- 0xff7f613 -mem-write: 0x80009c84 <- 0xfec50fa3 -mem-write: 0x80009c88 <- 0xffe58793 -mem-write: 0x80009c8c <- 0x107e463 -mem-write: 0x80009c90 <- 0x3980206f -mem-write: 0x80009c94 <- 0xd610693 -mem-write: 0x80009c98 <- 0x80006f -mem-write: 0x80009c9c <- 0x7c603 -mem-write: 0x80009ca0 <- 0xc68023 -mem-write: 0x80009ca4 <- 0x178793 -mem-write: 0x80009ca8 <- 0x168693 -mem-write: 0x80009cac <- 0xff0798e3 -mem-write: 0x80009cb0 <- 0xe510793 -mem-write: 0x80009cb4 <- 0x40b787b3 -mem-write: 0x80009cb8 <- 0xd610713 -mem-write: 0x80009cbc <- 0xf707b3 -mem-write: 0x80009cc0 <- 0xd410693 -mem-write: 0x80009cc4 <- 0x40d787b3 -mem-write: 0x80009cc8 <- 0x2f12c23 -mem-write: 0x80009ccc <- 0x2012703 -mem-write: 0x80009cd0 <- 0x3812683 -mem-write: 0x80009cd4 <- 0x100793 -mem-write: 0x80009cd8 <- 0xd70cb3 -mem-write: 0x80009cdc <- 0xe7c463 -mem-write: 0x80009ce0 <- 0x2300206f -mem-write: 0x80009ce4 <- 0x2c12783 -mem-write: 0x80009ce8 <- 0xfc8cb3 -mem-write: 0x80009cec <- 0x2812783 -mem-write: 0x80009cf0 <- 0xfffcca93 -mem-write: 0x80009cf4 <- 0x41fada93 -mem-write: 0x80009cf8 <- 0xbff7fa13 -mem-write: 0x80009cfc <- 0x100a6a13 -mem-write: 0x80009d00 <- 0x15cfab3 -mem-write: 0x80009d04 <- 0x2012423 -mem-write: 0x80009d08 <- 0x2012223 -mem-write: 0x80009d0c <- 0x12e23 -mem-write: 0x80009d10 <- 0x5812783 -mem-write: 0x80009d14 <- 0x79463 -mem-write: 0x80009d18 <- 0x510106f -mem-write: 0x80009d1c <- 0x2d00793 -mem-write: 0x80009d20 <- 0xcf103a3 -mem-write: 0x80009d24 <- 0xd93 -mem-write: 0x80009d28 <- 0x1a8a93 -mem-write: 0x80009d2c <- 0xad9ff06f -mem-write: 0x80009d30 <- 0xe410613 -mem-write: 0x80009d34 <- 0xc0593 -mem-write: 0x80009d38 <- 0xd0513 -mem-write: 0x80009d3c <- 0x621040ef -mem-write: 0x80009d40 <- 0x100510e3 -mem-write: 0x80009d44 <- 0xec12783 -mem-write: 0x80009d48 <- 0x10c10893 -mem-write: 0x80009d4c <- 0xb11ff06f -mem-write: 0x80009d50 <- 0xe812683 -mem-write: 0x80009d54 <- 0x178c93 -mem-write: 0x80009d58 <- 0x2012783 -mem-write: 0x80009d5c <- 0x100613 -mem-write: 0x80009d60 <- 0x168a023 -mem-write: 0x80009d64 <- 0x168493 -mem-write: 0x80009d68 <- 0x888913 -mem-write: 0x80009d6c <- 0x36f658e3 -mem-write: 0x80009d70 <- 0x100793 -mem-write: 0x80009d74 <- 0xf8a223 -mem-write: 0x80009d78 <- 0xf912623 -mem-write: 0x80009d7c <- 0xe912423 -mem-write: 0x80009d80 <- 0x700793 -mem-write: 0x80009d84 <- 0x4a97c0e3 -mem-write: 0x80009d88 <- 0x2c12783 -mem-write: 0x80009d8c <- 0x3012703 -mem-write: 0x80009d90 <- 0x148493 -mem-write: 0x80009d94 <- 0xfc8cb3 -mem-write: 0x80009d98 <- 0xf92223 -mem-write: 0x80009d9c <- 0xe92023 -mem-write: 0x80009da0 <- 0xf912623 -mem-write: 0x80009da4 <- 0xe912423 -mem-write: 0x80009da8 <- 0x700793 -mem-write: 0x80009dac <- 0x890913 -mem-write: 0x80009db0 <- 0x4897cce3 -mem-write: 0x80009db4 <- 0xf012783 -mem-write: 0x80009db8 <- 0x148613 -mem-write: 0x80009dbc <- 0xa010593 -mem-write: 0x80009dc0 <- 0xaf12823 -mem-write: 0x80009dc4 <- 0xf412783 -mem-write: 0x80009dc8 <- 0xb010513 -mem-write: 0x80009dcc <- 0xc12e23 -mem-write: 0x80009dd0 <- 0xaf12a23 -mem-write: 0x80009dd4 <- 0xf812783 -mem-write: 0x80009dd8 <- 0xa012023 -mem-write: 0x80009ddc <- 0xa012223 -mem-write: 0x80009de0 <- 0xaf12c23 -mem-write: 0x80009de4 <- 0xfc12783 -mem-write: 0x80009de8 <- 0xa012423 -mem-write: 0x80009dec <- 0xa012623 -mem-write: 0x80009df0 <- 0xaf12e23 -mem-write: 0x80009df4 <- 0x2dd070ef -mem-write: 0x80009df8 <- 0x1c12603 -mem-write: 0x80009dfc <- 0x2012783 -mem-write: 0x80009e00 <- 0x890893 -mem-write: 0x80009e04 <- 0x60693 -mem-write: 0x80009e08 <- 0xfff78d93 -mem-write: 0x80009e0c <- 0x2e050ce3 -mem-write: 0x80009e10 <- 0x1b0713 -mem-write: 0x80009e14 <- 0x1bc8cb3 -mem-write: 0x80009e18 <- 0xe92023 -mem-write: 0x80009e1c <- 0x1b92223 -mem-write: 0x80009e20 <- 0xf912623 -mem-write: 0x80009e24 <- 0xec12423 -mem-write: 0x80009e28 <- 0x700793 -mem-write: 0x80009e2c <- 0xc7d463 -mem-write: 0x80009e30 <- 0x180106f -mem-write: 0x80009e34 <- 0x1090793 -mem-write: 0x80009e38 <- 0x248693 -mem-write: 0x80009e3c <- 0x88913 -mem-write: 0x80009e40 <- 0x78893 -mem-write: 0x80009e44 <- 0x3812603 -mem-write: 0x80009e48 <- 0xd410713 -mem-write: 0x80009e4c <- 0xe92023 -mem-write: 0x80009e50 <- 0x19607b3 -mem-write: 0x80009e54 <- 0xc92223 -mem-write: 0x80009e58 <- 0xef12623 -mem-write: 0x80009e5c <- 0xed12423 -mem-write: 0x80009e60 <- 0x700713 -mem-write: 0x80009e64 <- 0xa6d756e3 -mem-write: 0x80009e68 <- 0xe410613 -mem-write: 0x80009e6c <- 0xc0593 -mem-write: 0x80009e70 <- 0xd0513 -mem-write: 0x80009e74 <- 0x4e9040ef -mem-write: 0x80009e78 <- 0x7c051463 -mem-write: 0x80009e7c <- 0xec12783 -mem-write: 0x80009e80 <- 0x10c10893 -mem-write: 0x80009e84 <- 0xa4dff06f -mem-write: 0x80009e88 <- 0x1000693 -mem-write: 0x80009e8c <- 0xe812703 -mem-write: 0x80009e90 <- 0x96c463 -mem-write: 0x80009e94 <- 0x1210106f -mem-write: 0x80009e98 <- 0x800156b7 -mem-write: 0x80009e9c <- 0x17468e93 -mem-write: 0x80009ea0 <- 0x1000913 -mem-write: 0x80009ea4 <- 0x700a13 -mem-write: 0x80009ea8 <- 0xe8b13 -mem-write: 0x80009eac <- 0xc0006f -mem-write: 0x80009eb0 <- 0xff048493 -mem-write: 0x80009eb4 <- 0x4995663 -mem-write: 0x80009eb8 <- 0x1078793 -mem-write: 0x80009ebc <- 0x170713 -mem-write: 0x80009ec0 <- 0x168a023 -mem-write: 0x80009ec4 <- 0x128a223 -mem-write: 0x80009ec8 <- 0xef12623 -mem-write: 0x80009ecc <- 0xee12423 -mem-write: 0x80009ed0 <- 0x888893 -mem-write: 0x80009ed4 <- 0xfcea5ee3 -mem-write: 0x80009ed8 <- 0xe410613 -mem-write: 0x80009edc <- 0xc0593 -mem-write: 0x80009ee0 <- 0xd0513 -mem-write: 0x80009ee4 <- 0x479040ef -mem-write: 0x80009ee8 <- 0x74051c63 -mem-write: 0x80009eec <- 0xff048493 -mem-write: 0x80009ef0 <- 0xec12783 -mem-write: 0x80009ef4 <- 0xe812703 -mem-write: 0x80009ef8 <- 0x10c10893 -mem-write: 0x80009efc <- 0xfa994ee3 -mem-write: 0x80009f00 <- 0xb0e93 -mem-write: 0x80009f04 <- 0x9787b3 -mem-write: 0x80009f08 <- 0x170713 -mem-write: 0x80009f0c <- 0x1d8a023 -mem-write: 0x80009f10 <- 0x98a223 -mem-write: 0x80009f14 <- 0xef12623 -mem-write: 0x80009f18 <- 0xee12423 -mem-write: 0x80009f1c <- 0x700693 -mem-write: 0x80009f20 <- 0x9ce6d0e3 -mem-write: 0x80009f24 <- 0xe410613 -mem-write: 0x80009f28 <- 0xc0593 -mem-write: 0x80009f2c <- 0xd0513 -mem-write: 0x80009f30 <- 0x42d040ef -mem-write: 0x80009f34 <- 0x70051663 -mem-write: 0x80009f38 <- 0xec12783 -mem-write: 0x80009f3c <- 0x9a5ff06f -mem-write: 0x80009f40 <- 0x1412783 -mem-write: 0x80009f44 <- 0xc0103a3 -mem-write: 0x80009f48 <- 0xc8893 -mem-write: 0x80009f4c <- 0x7ab03 -mem-write: 0x80009f50 <- 0x478913 -mem-write: 0x80009f54 <- 0x4e0b02e3 -mem-write: 0x80009f58 <- 0xfff00793 -mem-write: 0x80009f5c <- 0xfd9463 -mem-write: 0x80009f60 <- 0x1fc0106f -mem-write: 0x80009f64 <- 0xd8613 -mem-write: 0x80009f68 <- 0x593 -mem-write: 0x80009f6c <- 0xb0513 -mem-write: 0x80009f70 <- 0x1912a23 -mem-write: 0x80009f74 <- 0xf5dfd0ef -mem-write: 0x80009f78 <- 0xa12823 -mem-write: 0x80009f7c <- 0x1412883 -mem-write: 0x80009f80 <- 0x51463 -mem-write: 0x80009f84 <- 0x75c0106f -mem-write: 0x80009f88 <- 0x1012783 -mem-write: 0x80009f8c <- 0x1212a23 -mem-write: 0x80009f90 <- 0x12823 -mem-write: 0x80009f94 <- 0x41678cb3 -mem-write: 0x80009f98 <- 0xc714783 -mem-write: 0x80009f9c <- 0xfffcca93 -mem-write: 0x80009fa0 <- 0x41fada93 -mem-write: 0x80009fa4 <- 0x2012423 -mem-write: 0x80009fa8 <- 0x2012223 -mem-write: 0x80009fac <- 0x12e23 -mem-write: 0x80009fb0 <- 0x15cfab3 -mem-write: 0x80009fb4 <- 0xd93 -mem-write: 0x80009fb8 <- 0x840786e3 -mem-write: 0x80009fbc <- 0x1a8a93 -mem-write: 0x80009fc0 <- 0x845ff06f -mem-write: 0x80009fc4 <- 0x1412703 -mem-write: 0x80009fc8 <- 0xc8893 -mem-write: 0x80009fcc <- 0xc0103a3 -mem-write: 0x80009fd0 <- 0x72783 -mem-write: 0x80009fd4 <- 0x470713 -mem-write: 0x80009fd8 <- 0xe12a23 -mem-write: 0x80009fdc <- 0x14f10623 -mem-write: 0x80009fe0 <- 0x100a93 -mem-write: 0x80009fe4 <- 0x100c93 -mem-write: 0x80009fe8 <- 0x14c10b13 -mem-write: 0x80009fec <- 0x805ff06f -mem-write: 0x80009ff0 <- 0x44483 -mem-write: 0x80009ff4 <- 0x4a6a13 -mem-write: 0x80009ff8 <- 0x5cff06f -VXDRV: upload 1024 bytes to 0x80009ffb -mem-write: 0x80009ffb <- 0x412683f8 -mem-write: 0x80009fff <- 0xa779301 -mem-write: 0x8000a003 <- 0xc889302 -mem-write: 0x8000a007 <- 0x6a70300 -mem-write: 0x8000a00b <- 0x46869300 -mem-write: 0x8000a00f <- 0xd12a2300 -mem-write: 0x8000a013 <- 0x790e300 -mem-write: 0x8000a017 <- 0xa779328 -mem-write: 0x8000a01b <- 0x7846301 -mem-write: 0x8000a01f <- 0xc0106f00 -mem-write: 0x8000a023 <- 0xa779312 -mem-write: 0x8000a027 <- 0x7846304 -mem-write: 0x8000a02b <- 0x80106f00 -mem-write: 0x8000a02f <- 0xa7a133d -mem-write: 0x8000a033 <- 0xa146320 -mem-write: 0x8000a037 <- 0x40106f00 -mem-write: 0x8000a03b <- 0xc1278311 -mem-write: 0x8000a03f <- 0x40b1300 -mem-write: 0x8000a043 <- 0xf7002300 -mem-write: 0x8000a047 <- 0x1ff06f00 -mem-write: 0x8000a04b <- 0x444838d -mem-write: 0x8000a04f <- 0xc0079300 -mem-write: 0x8000a053 <- 0xf48ee306 -mem-write: 0x8000a057 <- 0xa6a1338 -mem-write: 0x8000a05b <- 0x8ff06f01 -mem-write: 0x8000a05f <- 0x412703f2 -mem-write: 0x8000a063 <- 0xff87b701 -mem-write: 0x8000a067 <- 0x7c793ff -mem-write: 0x8000a06b <- 0xf1142383 -mem-write: 0x8000a06f <- 0x4707930c -mem-write: 0x8000a073 <- 0xf12a2300 -mem-write: 0x8000a077 <- 0x7290300 -mem-write: 0x8000a07b <- 0x157b700 -mem-write: 0x8000a07f <- 0xc7879380 -mem-write: 0x8000a083 <- 0xc8893a3 -mem-write: 0x8000a087 <- 0xf12a2300 -mem-write: 0x8000a08b <- 0xc9302 -mem-write: 0x8000a08f <- 0x2a6b9300 -mem-write: 0x8000a093 <- 0x20079300 -mem-write: 0x8000a097 <- 0x80049300 -mem-write: 0x8000a09b <- 0x103a307 -mem-write: 0x8000a09f <- 0xf007130c -mem-write: 0x8000a0a3 <- 0xed8663ff -mem-write: 0x8000a0a7 <- 0x99673320 -mem-write: 0x8000a0ab <- 0xfbfa1301 -mem-write: 0x8000a0af <- 0x71e63f7 -mem-write: 0x8000a0b3 <- 0xd94631e -mem-write: 0x8000a0b7 <- 0x7906326 -mem-write: 0x8000a0bb <- 0x1bfc931c -mem-write: 0x8000a0bf <- 0x10b1300 -mem-write: 0x8000a0c3 <- 0xc90e31b -mem-write: 0x8000a0c7 <- 0xc8a931c -mem-write: 0x8000a0cb <- 0xbcd46300 -mem-write: 0x8000a0cf <- 0xd8a9301 -mem-write: 0x8000a0d3 <- 0x71478300 -mem-write: 0x8000a0d7 <- 0x128230c -mem-write: 0x8000a0db <- 0x1242300 -mem-write: 0x8000a0df <- 0x1222302 -mem-write: 0x8000a0e3 <- 0x12e2302 -mem-write: 0x8000a0e7 <- 0x79ae300 -mem-write: 0x8000a0eb <- 0x8ff06fec -mem-write: 0x8000a0ef <- 0xc8893f1 -mem-write: 0x8000a0f3 <- 0xa6a1300 -mem-write: 0x8000a0f7 <- 0xa779301 -mem-write: 0x8000a0fb <- 0x78ce302 -mem-write: 0x8000a0ff <- 0x41278306 -mem-write: 0x8000a103 <- 0x778b1301 -mem-write: 0x8000a107 <- 0x8b7b1300 -mem-write: 0x8000a10b <- 0xb2903ff -mem-write: 0x8000a10f <- 0x4b2c8300 -mem-write: 0x8000a113 <- 0x8b079300 -mem-write: 0x8000a117 <- 0xf12a2300 -mem-write: 0x8000a11b <- 0xfa7b9300 -mem-write: 0x8000a11f <- 0x793bf -mem-write: 0x8000a123 <- 0x9ff06f00 -mem-write: 0x8000a127 <- 0x44483f7 -mem-write: 0x8000a12b <- 0x80079300 -mem-write: 0x8000a12f <- 0xf488e306 -mem-write: 0x8000a133 <- 0xa6a132c -mem-write: 0x8000a137 <- 0xcff06f04 -mem-write: 0x8000a13b <- 0xc8893e4 -mem-write: 0x8000a13f <- 0xa6b9300 -mem-write: 0x8000a143 <- 0xbf79301 -mem-write: 0x8000a147 <- 0x78ce302 -mem-write: 0x8000a14b <- 0x41278304 -mem-write: 0x8000a14f <- 0x778b1301 -mem-write: 0x8000a153 <- 0x8b7b1300 -mem-write: 0x8000a157 <- 0x8b0793ff -mem-write: 0x8000a15b <- 0xf12a2300 -mem-write: 0x8000a15f <- 0xb290300 -mem-write: 0x8000a163 <- 0x4b2c8300 -mem-write: 0x8000a167 <- 0x10079300 -mem-write: 0x8000a16b <- 0x1ff06f00 -mem-write: 0x8000a16f <- 0x44483f3 -mem-write: 0x8000a173 <- 0x8a6a1300 -mem-write: 0x8000a177 <- 0xcff06f00 -mem-write: 0x8000a17b <- 0x412783e0 -mem-write: 0x8000a17f <- 0x4448301 -mem-write: 0x8000a183 <- 0x7a98300 -mem-write: 0x8000a187 <- 0x47879300 -mem-write: 0x8000a18b <- 0xf12a2300 -mem-write: 0x8000a18f <- 0x9da6300 -mem-write: 0x8000a193 <- 0x3009b3de -mem-write: 0x8000a197 <- 0x4a6a1341 -mem-write: 0x8000a19b <- 0x8ff06f00 -mem-write: 0x8000a19f <- 0x44483de -mem-write: 0x8000a1a3 <- 0x1a6a1300 -mem-write: 0x8000a1a7 <- 0xcff06f00 -mem-write: 0x8000a1ab <- 0x714783dd -mem-write: 0x8000a1af <- 0x444830c -mem-write: 0x8000a1b3 <- 0x7986300 -mem-write: 0x8000a1b7 <- 0x793dc -mem-write: 0x8000a1bb <- 0xf103a302 -mem-write: 0x8000a1bf <- 0x4ff06f0c -mem-write: 0x8000a1c3 <- 0x44483dc -mem-write: 0x8000a1c7 <- 0xa6a1300 -mem-write: 0x8000a1cb <- 0x8ff06f08 -mem-write: 0x8000a1cf <- 0x44483db -mem-write: 0x8000a1d3 <- 0x14071300 -mem-write: 0x8000a1d7 <- 0x74946300 -mem-write: 0x8000a1db <- 0x50106f01 -mem-write: 0x8000a1df <- 0x486935f -mem-write: 0x8000a1e3 <- 0x70413fd -mem-write: 0x8000a1e7 <- 0xd9300 -mem-write: 0x8000a1eb <- 0xdaee6300 -mem-write: 0x8000a1ef <- 0x44483d8 -mem-write: 0x8000a1f3 <- 0x2d979300 -mem-write: 0x8000a1f7 <- 0xb787b300 -mem-write: 0x8000a1fb <- 0x17979301 -mem-write: 0x8000a1ff <- 0xd78db300 -mem-write: 0x8000a203 <- 0x4869300 -mem-write: 0x8000a207 <- 0x140413fd -mem-write: 0x8000a20b <- 0xdaf2e300 -mem-write: 0x8000a20f <- 0x8ff06ffe -mem-write: 0x8000a213 <- 0xb00793d7 -mem-write: 0x8000a217 <- 0x4448302 -mem-write: 0x8000a21b <- 0xf103a300 -mem-write: 0x8000a21f <- 0x4ff06f0c -mem-write: 0x8000a223 <- 0xc8893d6 -mem-write: 0x8000a227 <- 0xa6a1300 -mem-write: 0x8000a22b <- 0xa779301 -mem-write: 0x8000a22f <- 0x7806302 -mem-write: 0x8000a233 <- 0x4127837a -mem-write: 0x8000a237 <- 0x778b1301 -mem-write: 0x8000a23b <- 0x8b7b1300 -mem-write: 0x8000a23f <- 0x4b2783ff -mem-write: 0x8000a243 <- 0xb290300 -mem-write: 0x8000a247 <- 0x8b071300 -mem-write: 0x8000a24b <- 0xe12a2300 -mem-write: 0x8000a24f <- 0x78c9300 -mem-write: 0x8000a253 <- 0x7c66300 -mem-write: 0x8000a257 <- 0xf007937a -mem-write: 0x8000a25b <- 0xa0b93ff -mem-write: 0x8000a25f <- 0xfd846300 -mem-write: 0x8000a263 <- 0x9967b302 -mem-write: 0x8000a267 <- 0xfa7b9301 -mem-write: 0x8000a26b <- 0x79e63f7 -mem-write: 0x8000a26f <- 0xd926300 -mem-write: 0x8000a273 <- 0xb8a1302 -mem-write: 0x8000a277 <- 0xd9300 -mem-write: 0x8000a27b <- 0xc9300 -mem-write: 0x8000a27f <- 0x10b1300 -mem-write: 0x8000a283 <- 0x5ff06f1b -mem-write: 0x8000a287 <- 0xc96e3e4 -mem-write: 0x8000a28b <- 0x90079340 -mem-write: 0x8000a28f <- 0x27e2e300 -mem-write: 0x8000a293 <- 0x9091341 -mem-write: 0x8000a297 <- 0x2107a303 -mem-write: 0x8000a29b <- 0xb8a131b -mem-write: 0x8000a29f <- 0x100c9300 -mem-write: 0x8000a2a3 <- 0xf10b1300 -mem-write: 0x8000a2a7 <- 0x1ff06f1a -mem-write: 0x8000a2ab <- 0xa0b93e2 -mem-write: 0x8000a2af <- 0x10071300 -mem-write: 0x8000a2b3 <- 0xe78ae300 -mem-write: 0x8000a2b7 <- 0x200713fc -mem-write: 0x8000a2bb <- 0xe78c6300 -mem-write: 0x8000a2bf <- 0x10b1306 -mem-write: 0x8000a2c3 <- 0xdc97131b -mem-write: 0x8000a2c7 <- 0x79779301 -mem-write: 0x8000a2cb <- 0x39591300 -mem-write: 0x8000a2cf <- 0x7879300 -mem-write: 0x8000a2d3 <- 0x27693303 -mem-write: 0x8000a2d7 <- 0x3cdc9301 -mem-write: 0x8000a2db <- 0xfb0fa300 -mem-write: 0x8000a2df <- 0x996733fe -mem-write: 0x8000a2e3 <- 0xb061301 -mem-write: 0x8000a2e7 <- 0xfb0b1300 -mem-write: 0x8000a2eb <- 0x71ce3ff -mem-write: 0x8000a2ef <- 0x1bf693fc -mem-write: 0x8000a2f3 <- 0x68a6300 -mem-write: 0x8000a2f7 <- 0x69306 -mem-write: 0x8000a2fb <- 0xd7866303 -mem-write: 0x8000a2ff <- 0xe6061306 -mem-write: 0x8000a303 <- 0x10793ff -mem-write: 0x8000a307 <- 0xdb0fa31b -mem-write: 0x8000a30b <- 0xc78cb3fe -mem-write: 0x8000a30f <- 0xb8a1340 -mem-write: 0x8000a313 <- 0x60b1300 -mem-write: 0x8000a317 <- 0x1ff06f00 -mem-write: 0x8000a31b <- 0x100713db -mem-write: 0x8000a31f <- 0xe7946300 -mem-write: 0x8000a323 <- 0x10106f00 -mem-write: 0x8000a327 <- 0x20071317 -mem-write: 0x8000a32b <- 0xa0b9300 -mem-write: 0x8000a32f <- 0xe798e300 -mem-write: 0x8000a333 <- 0x412683f8 -mem-write: 0x8000a337 <- 0x10b1303 -mem-write: 0x8000a33b <- 0xf977931b -mem-write: 0x8000a33f <- 0xf687b300 -mem-write: 0x8000a343 <- 0x7c70300 -mem-write: 0x8000a347 <- 0x49591300 -mem-write: 0x8000a34b <- 0xcc979300 -mem-write: 0x8000a34f <- 0x27e93301 -mem-write: 0x8000a353 <- 0x4cdc9301 -mem-write: 0x8000a357 <- 0xeb0fa300 -mem-write: 0x8000a35b <- 0x9967b3fe -mem-write: 0x8000a35f <- 0xfb0b1301 -mem-write: 0x8000a363 <- 0x79ce3ff -mem-write: 0x8000a367 <- 0x10793fc -mem-write: 0x8000a36b <- 0x678cb31b -mem-write: 0x8000a36f <- 0xb8a1341 -mem-write: 0x8000a373 <- 0x5ff06f00 -mem-write: 0x8000a377 <- 0x500693d5 -mem-write: 0x8000a37b <- 0x96dae306 -mem-write: 0x8000a37f <- 0x126839c -mem-write: 0x8000a383 <- 0x105930f -mem-write: 0x8000a387 <- 0x105130a -mem-write: 0x8000a38b <- 0xd128230b -mem-write: 0x8000a38f <- 0x4126830a -mem-write: 0x8000a393 <- 0x1122230f -mem-write: 0x8000a397 <- 0xf1202305 -mem-write: 0x8000a39b <- 0xd12a2304 -mem-write: 0x8000a39f <- 0x8126830a -mem-write: 0x8000a3a3 <- 0x120230f -mem-write: 0x8000a3a7 <- 0x122230a -mem-write: 0x8000a3ab <- 0xd12c230a -mem-write: 0x8000a3af <- 0xc126830a -mem-write: 0x8000a3b3 <- 0x124230f -mem-write: 0x8000a3b7 <- 0x126230a -mem-write: 0x8000a3bb <- 0xd12e230a -mem-write: 0x8000a3bf <- 0x70ef0a -mem-write: 0x8000a3c3 <- 0x1278351 -mem-write: 0x8000a3c7 <- 0x41288304 -mem-write: 0x8000a3cb <- 0x51c6304 -mem-write: 0x8000a3cf <- 0x81270338 -mem-write: 0x8000a3d3 <- 0x156b70e -mem-write: 0x8000a3d7 <- 0x6869380 -mem-write: 0x8000a3db <- 0xd8a02398 -mem-write: 0x8000a3df <- 0x17879300 -mem-write: 0x8000a3e3 <- 0x10069300 -mem-write: 0x8000a3e7 <- 0x17071300 -mem-write: 0x8000a3eb <- 0xd8a22300 -mem-write: 0x8000a3ef <- 0xf1262300 -mem-write: 0x8000a3f3 <- 0xe124230e -mem-write: 0x8000a3f7 <- 0x7006930e -VXDRV: upload 1024 bytes to 0x8000a3fb -mem-write: 0x8000a3fb <- 0x88889300 -mem-write: 0x8000a3ff <- 0xe6cce300 -mem-write: 0x8000a403 <- 0xc1270344 -mem-write: 0x8000a407 <- 0x126830c -mem-write: 0x8000a40b <- 0xd7506302 -mem-write: 0x8000a40f <- 0x1270366 -mem-write: 0x8000a413 <- 0xc1268303 -mem-write: 0x8000a417 <- 0x88889302 -mem-write: 0x8000a41b <- 0xe8ac2300 -mem-write: 0x8000a41f <- 0x812703fe -mem-write: 0x8000a423 <- 0xd787b30e -mem-write: 0x8000a427 <- 0xd8ae2300 -mem-write: 0x8000a42b <- 0x170713fe -mem-write: 0x8000a42f <- 0xf1262300 -mem-write: 0x8000a433 <- 0xe124230e -mem-write: 0x8000a437 <- 0x7006930e -mem-write: 0x8000a43b <- 0xe6cc6300 -mem-write: 0x8000a43f <- 0x1270376 -mem-write: 0x8000a443 <- 0xf7049302 -mem-write: 0x8000a447 <- 0x905463ff -mem-write: 0x8000a44b <- 0x693c8 -mem-write: 0x8000a44f <- 0x81270301 -mem-write: 0x8000a453 <- 0x96d2e30e -mem-write: 0x8000a457 <- 0x91342 -mem-write: 0x8000a45b <- 0x700c9301 -mem-write: 0x8000a45f <- 0xc0006f00 -mem-write: 0x8000a463 <- 0x4849300 -mem-write: 0x8000a467 <- 0x9958e3ff -mem-write: 0x8000a46b <- 0x81268340 -mem-write: 0x8000a46f <- 0x7879300 -mem-write: 0x8000a473 <- 0x17071301 -mem-write: 0x8000a477 <- 0xd8a02300 -mem-write: 0x8000a47b <- 0x28a22300 -mem-write: 0x8000a47f <- 0xf1262301 -mem-write: 0x8000a483 <- 0xe124230e -mem-write: 0x8000a487 <- 0x8888930e -mem-write: 0x8000a48b <- 0xecdce300 -mem-write: 0x8000a48f <- 0x410613fc -mem-write: 0x8000a493 <- 0xc05930e -mem-write: 0x8000a497 <- 0xd051300 -mem-write: 0x8000a49b <- 0x40ef00 -mem-write: 0x8000a49f <- 0x510636c -mem-write: 0x8000a4a3 <- 0xc127831a -mem-write: 0x8000a4a7 <- 0x8127030e -mem-write: 0x8000a4ab <- 0xc108930e -mem-write: 0x8000a4af <- 0x5ff06f10 -mem-write: 0x8000a4b3 <- 0x598933fb -mem-write: 0x8000a4b7 <- 0x20506341 -mem-write: 0x8000a4bb <- 0x613bf -mem-write: 0x8000a4bf <- 0x81268301 -mem-write: 0x8000a4c3 <- 0x2654630e -mem-write: 0x8000a4c7 <- 0xe1307 -mem-write: 0x8000a4cb <- 0x700b9301 -mem-write: 0x8000a4cf <- 0xc0006f00 -mem-write: 0x8000a4d3 <- 0x9091300 -mem-write: 0x8000a4d7 <- 0x2e5a63ff -mem-write: 0x8000a4db <- 0x81270305 -mem-write: 0x8000a4df <- 0x7879300 -mem-write: 0x8000a4e3 <- 0x16869301 -mem-write: 0x8000a4e7 <- 0xe8a02300 -mem-write: 0x8000a4eb <- 0xc8a22300 -mem-write: 0x8000a4ef <- 0xf1262301 -mem-write: 0x8000a4f3 <- 0xd124230e -mem-write: 0x8000a4f7 <- 0x8888930e -mem-write: 0x8000a4fb <- 0xdbdce300 -mem-write: 0x8000a4ff <- 0x410613fc -mem-write: 0x8000a503 <- 0xc05930e -mem-write: 0x8000a507 <- 0xd051300 -mem-write: 0x8000a50b <- 0x40ef00 -mem-write: 0x8000a50f <- 0x5186365 -mem-write: 0x8000a513 <- 0xe1312 -mem-write: 0x8000a517 <- 0x9091301 -mem-write: 0x8000a51b <- 0xc12783ff -mem-write: 0x8000a51f <- 0x8126830e -mem-write: 0x8000a523 <- 0xc108930e -mem-write: 0x8000a527 <- 0x2e4ae310 -mem-write: 0x8000a52b <- 0x812703fb -mem-write: 0x8000a52f <- 0x2787b300 -mem-write: 0x8000a533 <- 0x16869301 -mem-write: 0x8000a537 <- 0xe8a02300 -mem-write: 0x8000a53b <- 0x28a22300 -mem-write: 0x8000a53f <- 0xf1262301 -mem-write: 0x8000a543 <- 0xd124230e -mem-write: 0x8000a547 <- 0x7006130e -mem-write: 0x8000a54b <- 0x88889300 -mem-write: 0x8000a54f <- 0xd6546300 -mem-write: 0x8000a553 <- 0x410613b4 -mem-write: 0x8000a557 <- 0xc05930e -mem-write: 0x8000a55b <- 0xd051300 -mem-write: 0x8000a55f <- 0xc040ef00 -mem-write: 0x8000a563 <- 0x51e635f -mem-write: 0x8000a567 <- 0x9d8db30c -mem-write: 0x8000a56b <- 0xc1278341 -mem-write: 0x8000a56f <- 0xc108930e -mem-write: 0x8000a573 <- 0xb0566310 -mem-write: 0x8000a577 <- 0x613b3 -mem-write: 0x8000a57b <- 0x81268301 -mem-write: 0x8000a57f <- 0xb652630e -mem-write: 0x8000a583 <- 0xb9307 -mem-write: 0x8000a587 <- 0x70091301 -mem-write: 0x8000a58b <- 0xc0006f00 -mem-write: 0x8000a58f <- 0xd8d9300 -mem-write: 0x8000a593 <- 0xbbd863ff -mem-write: 0x8000a597 <- 0x81270305 -mem-write: 0x8000a59b <- 0x7879300 -mem-write: 0x8000a59f <- 0x16869301 -mem-write: 0x8000a5a3 <- 0xe8a02300 -mem-write: 0x8000a5a7 <- 0x78a22300 -mem-write: 0x8000a5ab <- 0xf1262301 -mem-write: 0x8000a5af <- 0xd124230e -mem-write: 0x8000a5b3 <- 0x8888930e -mem-write: 0x8000a5b7 <- 0xd95ce300 -mem-write: 0x8000a5bb <- 0x410613fc -mem-write: 0x8000a5bf <- 0xc05930e -mem-write: 0x8000a5c3 <- 0xd051300 -mem-write: 0x8000a5c7 <- 0x4040ef00 -mem-write: 0x8000a5cb <- 0x51a6359 -mem-write: 0x8000a5cf <- 0xd8d9306 -mem-write: 0x8000a5d3 <- 0xc12783ff -mem-write: 0x8000a5d7 <- 0x8126830e -mem-write: 0x8000a5db <- 0xc108930e -mem-write: 0x8000a5df <- 0xbbcce310 -mem-write: 0x8000a5e3 <- 0x812703fb -mem-write: 0x8000a5e7 <- 0xb787b300 -mem-write: 0x8000a5eb <- 0x16869301 -mem-write: 0x8000a5ef <- 0xe8a02300 -mem-write: 0x8000a5f3 <- 0xb8a22300 -mem-write: 0x8000a5f7 <- 0xf1262301 -mem-write: 0x8000a5fb <- 0xd124230e -mem-write: 0x8000a5ff <- 0x7006130e -mem-write: 0x8000a603 <- 0x88889300 -mem-write: 0x8000a607 <- 0xd65c6300 -mem-write: 0x8000a60b <- 0x410613a8 -mem-write: 0x8000a60f <- 0xc05930e -mem-write: 0x8000a613 <- 0xd051300 -mem-write: 0x8000a617 <- 0x4040ef00 -mem-write: 0x8000a61b <- 0x5126354 -mem-write: 0x8000a61f <- 0xc1278302 -mem-write: 0x8000a623 <- 0xc108930e -mem-write: 0x8000a627 <- 0x8ff06f10 -mem-write: 0x8000a62b <- 0x410613a7 -mem-write: 0x8000a62f <- 0xc05930e -mem-write: 0x8000a633 <- 0xd051300 -mem-write: 0x8000a637 <- 0x4040ef00 -mem-write: 0x8000a63b <- 0x50e6352 -mem-write: 0x8000a63f <- 0x12b83aa -mem-write: 0x8000a643 <- 0xb846301 -mem-write: 0x8000a647 <- 0xb8593ae -mem-write: 0x8000a64b <- 0xd051300 -mem-write: 0x8000a64f <- 0x5f90ef00 -mem-write: 0x8000a653 <- 0x8ff06ff1 -mem-write: 0x8000a657 <- 0x15737ad -mem-write: 0x8000a65b <- 0x61380 -mem-write: 0x8000a65f <- 0x81268301 -mem-write: 0x8000a663 <- 0x470e930e -mem-write: 0x8000a667 <- 0x65c6317 -mem-write: 0x8000a66b <- 0x81202309 -mem-write: 0x8000a66f <- 0x91222304 -mem-write: 0x8000a673 <- 0xd041304 -mem-write: 0x8000a677 <- 0xc049300 -mem-write: 0x8000a67b <- 0xe1300 -mem-write: 0x8000a67f <- 0x70029301 -mem-write: 0x8000a683 <- 0x80c1300 -mem-write: 0x8000a687 <- 0xe8d1300 -mem-write: 0x8000a68b <- 0xc0006f00 -mem-write: 0x8000a68f <- 0xc0c1300 -mem-write: 0x8000a693 <- 0x8e5a63ff -mem-write: 0x8000a697 <- 0x7879305 -mem-write: 0x8000a69b <- 0x16869301 -mem-write: 0x8000a69f <- 0xa8a02300 -mem-write: 0x8000a6a3 <- 0xc8a22301 -mem-write: 0x8000a6a7 <- 0xf1262301 -mem-write: 0x8000a6ab <- 0xd124230e -mem-write: 0x8000a6af <- 0x8888930e -mem-write: 0x8000a6b3 <- 0xd2dee300 -mem-write: 0x8000a6b7 <- 0x410613fc -mem-write: 0x8000a6bb <- 0x485930e -mem-write: 0x8000a6bf <- 0x4051300 -mem-write: 0x8000a6c3 <- 0x8040ef00 -mem-write: 0x8000a6c7 <- 0x512e349 -mem-write: 0x8000a6cb <- 0xe1316 -mem-write: 0x8000a6cf <- 0xc0c1301 -mem-write: 0x8000a6d3 <- 0xc12783ff -mem-write: 0x8000a6d7 <- 0x8126830e -mem-write: 0x8000a6db <- 0xc108930e -mem-write: 0x8000a6df <- 0x70029310 -mem-write: 0x8000a6e3 <- 0x8e4ae300 -mem-write: 0x8000a6e7 <- 0xc0813fb -mem-write: 0x8000a6eb <- 0xd0e9300 -mem-write: 0x8000a6ef <- 0x48c1300 -mem-write: 0x8000a6f3 <- 0x40d1300 -mem-write: 0x8000a6f7 <- 0x41248300 -mem-write: 0x8000a6fb <- 0x1240304 -mem-write: 0x8000a6ff <- 0x787b304 -mem-write: 0x8000a703 <- 0x16869301 -mem-write: 0x8000a707 <- 0xd8a02300 -mem-write: 0x8000a70b <- 0x8a22301 -mem-write: 0x8000a70f <- 0xf1262301 -mem-write: 0x8000a713 <- 0xd124230e -mem-write: 0x8000a717 <- 0x7006130e -mem-write: 0x8000a71b <- 0x88889300 -mem-write: 0x8000a71f <- 0xd6526300 -mem-write: 0x8000a723 <- 0x41061390 -mem-write: 0x8000a727 <- 0xc05930e -mem-write: 0x8000a72b <- 0xd051300 -mem-write: 0x8000a72f <- 0xc040ef00 -mem-write: 0x8000a733 <- 0x516e342 -mem-write: 0x8000a737 <- 0xc12783f0 -mem-write: 0x8000a73b <- 0xc108930e -mem-write: 0x8000a73f <- 0x4ff06f10 -mem-write: 0x8000a743 <- 0x4106138e -mem-write: 0x8000a747 <- 0xc05930e -mem-write: 0x8000a74b <- 0xd051300 -mem-write: 0x8000a74f <- 0xc040ef00 -mem-write: 0x8000a753 <- 0x516e340 -mem-write: 0x8000a757 <- 0xc12783ee -mem-write: 0x8000a75b <- 0xc108930e -mem-write: 0x8000a75f <- 0xff06f10 -mem-write: 0x8000a763 <- 0xc1258393 -mem-write: 0x8000a767 <- 0xb05c630c -mem-write: 0x8000a76b <- 0xc127037e -mem-write: 0x8000a76f <- 0x1268301 -mem-write: 0x8000a773 <- 0x7049302 -mem-write: 0x8000a777 <- 0xe6c26300 -mem-write: 0x8000a77b <- 0x9056633c -mem-write: 0x8000a77f <- 0x81268302 -mem-write: 0x8000a783 <- 0x9787b30e -mem-write: 0x8000a787 <- 0x68a02300 -mem-write: 0x8000a78b <- 0x16869301 -mem-write: 0x8000a78f <- 0x98a22300 -mem-write: 0x8000a793 <- 0xf1262300 -mem-write: 0x8000a797 <- 0xd124230e -mem-write: 0x8000a79b <- 0x7006130e -mem-write: 0x8000a79f <- 0x88889300 -mem-write: 0x8000a7a3 <- 0xd64ce300 -mem-write: 0x8000a7a7 <- 0xf4c69340 -mem-write: 0x8000a7ab <- 0xc12703ff -mem-write: 0x8000a7af <- 0xf6d69301 -mem-write: 0x8000a7b3 <- 0xd4f4b341 -mem-write: 0x8000a7b7 <- 0x9704b300 -mem-write: 0x8000a7bb <- 0x904e6340 -mem-write: 0x8000a7bf <- 0xc1270348 -mem-write: 0x8000a7c3 <- 0xa769301 -mem-write: 0x8000a7c7 <- 0xeb0db340 -mem-write: 0x8000a7cb <- 0x69a6300 -mem-write: 0x8000a7cf <- 0xc124834e -mem-write: 0x8000a7d3 <- 0x127030c -mem-write: 0x8000a7d7 <- 0xe4c66302 -mem-write: 0x8000a7db <- 0x1a769300 -mem-write: 0x8000a7df <- 0x682e300 -mem-write: 0x8000a7e3 <- 0x1268340 -mem-write: 0x8000a7e7 <- 0xc1270303 -mem-write: 0x8000a7eb <- 0x70061302 -mem-write: 0x8000a7ef <- 0xd8a02300 -mem-write: 0x8000a7f3 <- 0x81268300 -mem-write: 0x8000a7f7 <- 0xe787b30e -VXDRV: upload 1024 bytes to 0x8000a7fb -mem-write: 0x8000a7fb <- 0xe8a22300 -mem-write: 0x8000a7ff <- 0x16869300 -mem-write: 0x8000a803 <- 0xf1262300 -mem-write: 0x8000a807 <- 0xd124230e -mem-write: 0x8000a80b <- 0x8888930e -mem-write: 0x8000a80f <- 0xd644e300 -mem-write: 0x8000a813 <- 0x126836a -mem-write: 0x8000a817 <- 0xdb073302 -mem-write: 0x8000a81b <- 0x9684b300 -mem-write: 0x8000a81f <- 0xb7073340 -mem-write: 0x8000a823 <- 0x4891341 -mem-write: 0x8000a827 <- 0x97546300 -mem-write: 0x8000a82b <- 0x7091300 -mem-write: 0x8000a82f <- 0x20566300 -mem-write: 0x8000a833 <- 0x81270303 -mem-write: 0x8000a837 <- 0x2787b30e -mem-write: 0x8000a83b <- 0xb8a02301 -mem-write: 0x8000a83f <- 0x17071301 -mem-write: 0x8000a843 <- 0x28a22300 -mem-write: 0x8000a847 <- 0xf1262301 -mem-write: 0x8000a84b <- 0xe124230e -mem-write: 0x8000a84f <- 0x7006930e -mem-write: 0x8000a853 <- 0x88889300 -mem-write: 0x8000a857 <- 0xe6cae300 -mem-write: 0x8000a85b <- 0xf947136a -mem-write: 0x8000a85f <- 0xf75713ff -mem-write: 0x8000a863 <- 0xe9773341 -mem-write: 0x8000a867 <- 0xe484b300 -mem-write: 0x8000a86b <- 0x90446340 -mem-write: 0x8000a86f <- 0xff06f00 -mem-write: 0x8000a873 <- 0x69386 -mem-write: 0x8000a877 <- 0x81270301 -mem-write: 0x8000a87b <- 0x96de630e -mem-write: 0x8000a87f <- 0x9137e -mem-write: 0x8000a883 <- 0x700c9301 -mem-write: 0x8000a887 <- 0xc0006f00 -mem-write: 0x8000a88b <- 0x4849300 -mem-write: 0x8000a88f <- 0x995463ff -mem-write: 0x8000a893 <- 0x8126837e -mem-write: 0x8000a897 <- 0x7879300 -mem-write: 0x8000a89b <- 0x17071301 -mem-write: 0x8000a89f <- 0xd8a02300 -mem-write: 0x8000a8a3 <- 0x28a22300 -mem-write: 0x8000a8a7 <- 0xf1262301 -mem-write: 0x8000a8ab <- 0xe124230e -mem-write: 0x8000a8af <- 0x8888930e -mem-write: 0x8000a8b3 <- 0xecdce300 -mem-write: 0x8000a8b7 <- 0x410613fc -mem-write: 0x8000a8bb <- 0xc05930e -mem-write: 0x8000a8bf <- 0xd051300 -mem-write: 0x8000a8c3 <- 0x8040ef00 -mem-write: 0x8000a8c7 <- 0x51ce329 -mem-write: 0x8000a8cb <- 0xc12783d6 -mem-write: 0x8000a8cf <- 0x8127030e -mem-write: 0x8000a8d3 <- 0xc108930e -mem-write: 0x8000a8d7 <- 0x5ff06f10 -mem-write: 0x8000a8db <- 0x1a7793fb -mem-write: 0x8000a8df <- 0x7986300 -mem-write: 0x8000a8e3 <- 0xc8a223c8 -mem-write: 0x8000a8e7 <- 0x91262300 -mem-write: 0x8000a8eb <- 0x9124230f -mem-write: 0x8000a8ef <- 0x7007930e -mem-write: 0x8000a8f3 <- 0x97ca6300 -mem-write: 0x8000a8f7 <- 0x26869354 -mem-write: 0x8000a8fb <- 0x8889300 -mem-write: 0x8000a8ff <- 0x4ff06f01 -mem-write: 0x8000a903 <- 0xb05063d4 -mem-write: 0x8000a907 <- 0x713d5 -mem-write: 0x8000a90b <- 0xb7446301 -mem-write: 0x8000a90f <- 0x80106f01 -mem-write: 0x8000a913 <- 0x700b136b -mem-write: 0x8000a917 <- 0x6049300 -mem-write: 0x8000a91b <- 0x6f00 -mem-write: 0x8000a91f <- 0xd8d9301 -mem-write: 0x8000a923 <- 0xb75ee3ff -mem-write: 0x8000a927 <- 0x14849311 -mem-write: 0x8000a92b <- 0x81278300 -mem-write: 0x8000a92f <- 0xc8c9300 -mem-write: 0x8000a933 <- 0xe9222301 -mem-write: 0x8000a937 <- 0xf9202300 -mem-write: 0x8000a93b <- 0x91262300 -mem-write: 0x8000a93f <- 0x9124230f -mem-write: 0x8000a943 <- 0x8909130e -mem-write: 0x8000a947 <- 0x9b5ce300 -mem-write: 0x8000a94b <- 0x410613fc -mem-write: 0x8000a94f <- 0xc05930e -mem-write: 0x8000a953 <- 0xd051300 -mem-write: 0x8000a957 <- 0x4040ef00 -mem-write: 0x8000a95b <- 0x512e320 -mem-write: 0x8000a95f <- 0xc12c83ce -mem-write: 0x8000a963 <- 0x8124830e -mem-write: 0x8000a967 <- 0xc109130e -mem-write: 0x8000a96b <- 0x71310 -mem-write: 0x8000a96f <- 0x1ff06f01 -mem-write: 0x8000a973 <- 0x412683fb -mem-write: 0x8000a977 <- 0xa779301 -mem-write: 0x8000a97b <- 0x46871301 -mem-write: 0x8000a97f <- 0x7946300 -mem-write: 0x8000a983 <- 0xa779318 -mem-write: 0x8000a987 <- 0x786e304 -mem-write: 0x8000a98b <- 0x41278314 -mem-write: 0x8000a98f <- 0xc9301 -mem-write: 0x8000a993 <- 0xe12a2300 -mem-write: 0x8000a997 <- 0x7d90300 -mem-write: 0x8000a99b <- 0xff06f00 -mem-write: 0x8000a99f <- 0x412683f8 -mem-write: 0x8000a9a3 <- 0xbf79301 -mem-write: 0x8000a9a7 <- 0x46871301 -mem-write: 0x8000a9ab <- 0x7946300 -mem-write: 0x8000a9af <- 0xbf79314 -mem-write: 0x8000a9b3 <- 0x780e304 -mem-write: 0x8000a9b7 <- 0x41278310 -mem-write: 0x8000a9bb <- 0xc9301 -mem-write: 0x8000a9bf <- 0xe12a2300 -mem-write: 0x8000a9c3 <- 0x7d90300 -mem-write: 0x8000a9c7 <- 0x10079300 -mem-write: 0x8000a9cb <- 0xff06f00 -mem-write: 0x8000a9cf <- 0x412683ed -mem-write: 0x8000a9d3 <- 0xa779301 -mem-write: 0x8000a9d7 <- 0x46871301 -mem-write: 0x8000a9db <- 0x7926300 -mem-write: 0x8000a9df <- 0xa779310 -mem-write: 0x8000a9e3 <- 0x788e304 -mem-write: 0x8000a9e7 <- 0x4127830a -mem-write: 0x8000a9eb <- 0xe12a2301 -mem-write: 0x8000a9ef <- 0x7990300 -mem-write: 0x8000a9f3 <- 0xf95c9300 -mem-write: 0x8000a9f7 <- 0xc879341 -mem-write: 0x8000a9fb <- 0x7dee300 -mem-write: 0x8000a9ff <- 0x2037b384 -mem-write: 0x8000aa03 <- 0x900cb301 -mem-write: 0x8000aa07 <- 0xfc8cb341 -mem-write: 0x8000aa0b <- 0xd0079340 -mem-write: 0x8000aa0f <- 0xf103a302 -mem-write: 0x8000aa13 <- 0x2009330c -mem-write: 0x8000aa17 <- 0xa0b9341 -mem-write: 0x8000aa1b <- 0x10079300 -mem-write: 0x8000aa1f <- 0xff06f00 -mem-write: 0x8000aa23 <- 0x410613e8 -mem-write: 0x8000aa27 <- 0xc05930e -mem-write: 0x8000aa2b <- 0xd051300 -mem-write: 0x8000aa2f <- 0xc040ef00 -mem-write: 0x8000aa33 <- 0x516e312 -mem-write: 0x8000aa37 <- 0xc12c83c0 -mem-write: 0x8000aa3b <- 0x8124830e -mem-write: 0x8000aa3f <- 0xc109130e -mem-write: 0x8000aa43 <- 0x4ff06f10 -mem-write: 0x8000aa47 <- 0x410613b4 -mem-write: 0x8000aa4b <- 0xc05930e -mem-write: 0x8000aa4f <- 0xd051300 -mem-write: 0x8000aa53 <- 0x8040ef00 -mem-write: 0x8000aa57 <- 0x514e310 -mem-write: 0x8000aa5b <- 0xc12c83be -mem-write: 0x8000aa5f <- 0x8124830e -mem-write: 0x8000aa63 <- 0xc109130e -mem-write: 0x8000aa67 <- 0xcff06f10 -mem-write: 0x8000aa6b <- 0x1a7713b4 -mem-write: 0x8000aa6f <- 0x7146300 -mem-write: 0x8000aa73 <- 0xdfe06f00 -mem-write: 0x8000aa77 <- 0x9ff06fe5 -mem-write: 0x8000aa7b <- 0xc889399 -mem-write: 0x8000aa7f <- 0xcff06f00 -mem-write: 0x8000aa83 <- 0x793fa -mem-write: 0x8000aa87 <- 0xf107a303 -mem-write: 0x8000aa8b <- 0xf10b131a -mem-write: 0x8000aa8f <- 0x8ff06f1a -mem-write: 0x8000aa93 <- 0xc12683e3 -mem-write: 0x8000aa97 <- 0x40b1300 -mem-write: 0x8000aa9b <- 0xf6d79300 -mem-write: 0x8000aa9f <- 0xd7202341 -mem-write: 0x8000aaa3 <- 0xf7222300 -mem-write: 0x8000aaa7 <- 0x1fe06f00 -mem-write: 0x8000aaab <- 0x412703e7 -mem-write: 0x8000aaaf <- 0x7278301 -mem-write: 0x8000aab3 <- 0x47071300 -mem-write: 0x8000aab7 <- 0xe12a2300 -mem-write: 0x8000aabb <- 0x7a58300 -mem-write: 0x8000aabf <- 0x47a60300 -mem-write: 0x8000aac3 <- 0x87a68300 -mem-write: 0x8000aac7 <- 0xc7a78300 -mem-write: 0x8000aacb <- 0xb1282300 -mem-write: 0x8000aacf <- 0xc12a230e -mem-write: 0x8000aad3 <- 0xd12c230e -mem-write: 0x8000aad7 <- 0xf12e230e -mem-write: 0x8000aadb <- 0x9fe06f0e -mem-write: 0x8000aadf <- 0x6a903f7 -mem-write: 0x8000aae3 <- 0xe12a2300 -mem-write: 0x8000aae7 <- 0xf95c9300 -mem-write: 0x8000aaeb <- 0xc879341 -mem-write: 0x8000aaef <- 0x4ff06f00 -mem-write: 0x8000aaf3 <- 0x6a903f6 -mem-write: 0x8000aaf7 <- 0xc9300 -mem-write: 0x8000aafb <- 0xe12a2300 -mem-write: 0x8000aaff <- 0x10079300 -mem-write: 0x8000ab03 <- 0x8ff06f00 -mem-write: 0x8000ab07 <- 0x6a903d9 -mem-write: 0x8000ab0b <- 0xc9300 -mem-write: 0x8000ab0f <- 0xe12a2300 -mem-write: 0x8000ab13 <- 0x8ff06f00 -mem-write: 0x8000ab17 <- 0xc12783e0 -mem-write: 0x8000ab1b <- 0x4448303 -mem-write: 0x8000ab1f <- 0x7946300 -mem-write: 0x8000ab23 <- 0x1fe06f00 -mem-write: 0x8000ab27 <- 0x7c783c6 -mem-write: 0x8000ab2b <- 0x7946300 -mem-write: 0x8000ab2f <- 0x5fe06f00 -mem-write: 0x8000ab33 <- 0xa6a13c5 -mem-write: 0x8000ab37 <- 0xdfe06f40 -mem-write: 0x8000ab3b <- 0x68493c4 -mem-write: 0x8000ab3f <- 0x9040e300 -mem-write: 0x8000ab43 <- 0x5ff06fc4 -mem-write: 0x8000ab47 <- 0xc8893c6 -mem-write: 0x8000ab4b <- 0xa0b9300 -mem-write: 0x8000ab4f <- 0x4ff06f00 -mem-write: 0x8000ab53 <- 0x157b7df -mem-write: 0x8000ab57 <- 0xc7879380 -mem-write: 0x8000ab5b <- 0xc8893a3 -mem-write: 0x8000ab5f <- 0xf12a2300 -mem-write: 0x8000ab63 <- 0xa779302 -mem-write: 0x8000ab67 <- 0x7806302 -mem-write: 0x8000ab6b <- 0x4127832c -mem-write: 0x8000ab6f <- 0x778b1301 -mem-write: 0x8000ab73 <- 0x8b7b1300 -mem-write: 0x8000ab77 <- 0xb2903ff -mem-write: 0x8000ab7b <- 0x4b2c8300 -mem-write: 0x8000ab7f <- 0x8b079300 -mem-write: 0x8000ab83 <- 0xf12a2300 -mem-write: 0x8000ab87 <- 0x1a779300 -mem-write: 0x8000ab8b <- 0x78e6300 -mem-write: 0x8000ab8f <- 0x9967b300 -mem-write: 0x8000ab93 <- 0x78a6301 -mem-write: 0x8000ab97 <- 0x79300 -mem-write: 0x8000ab9b <- 0xf1042303 -mem-write: 0x8000ab9f <- 0x9104a30c -mem-write: 0x8000aba3 <- 0x2a6a130c -mem-write: 0x8000aba7 <- 0xfa7b9300 -mem-write: 0x8000abab <- 0x200793bf -mem-write: 0x8000abaf <- 0xcff06f00 -mem-write: 0x8000abb3 <- 0x410613ce -mem-write: 0x8000abb7 <- 0xc05930e -mem-write: 0x8000abbb <- 0xd051300 -mem-write: 0x8000abbf <- 0xd030ef00 -mem-write: 0x8000abc3 <- 0x51ee379 -mem-write: 0x8000abc7 <- 0xc12783a6 -mem-write: 0x8000abcb <- 0xc108930e -mem-write: 0x8000abcf <- 0x1ff06f10 -mem-write: 0x8000abd3 <- 0x157b787 -mem-write: 0x8000abd7 <- 0x7879380 -mem-write: 0x8000abdb <- 0xc8893a5 -mem-write: 0x8000abdf <- 0xf12a2300 -mem-write: 0x8000abe3 <- 0x1ff06f02 -mem-write: 0x8000abe7 <- 0xc8893f8 -mem-write: 0x8000abeb <- 0xcff06f00 -mem-write: 0x8000abef <- 0x144483d0 -mem-write: 0x8000abf3 <- 0xa6a1300 -mem-write: 0x8000abf7 <- 0x14041302 -VXDRV: upload 1024 bytes to 0x8000abfb -mem-write: 0x8000abfb <- 0x9fe06f00 -mem-write: 0x8000abff <- 0x144483b8 -mem-write: 0x8000ac03 <- 0xa6a1300 -mem-write: 0x8000ac07 <- 0x14041320 -mem-write: 0x8000ac0b <- 0x9fe06f00 -mem-write: 0x8000ac0f <- 0x593b7 -mem-write: 0x8000ac13 <- 0xd051304 -mem-write: 0x8000ac17 <- 0x1fc0ef00 -mem-write: 0x8000ac1b <- 0xac2023b2 -mem-write: 0x8000ac1f <- 0xac282300 -mem-write: 0x8000ac23 <- 0x5146300 -mem-write: 0x8000ac27 <- 0xc0106f00 -mem-write: 0x8000ac2b <- 0x7133c -mem-write: 0x8000ac2f <- 0xec2a2304 -mem-write: 0x8000ac33 <- 0x5fe06f00 -mem-write: 0x8000ac37 <- 0x600793a7 -mem-write: 0x8000ac3b <- 0xd8c9300 -mem-write: 0x8000ac3f <- 0xb7ee6300 -mem-write: 0x8000ac43 <- 0x1573779 -mem-write: 0x8000ac47 <- 0xc8a9380 -mem-write: 0x8000ac4b <- 0x212a2300 -mem-write: 0x8000ac4f <- 0x470b1301 -mem-write: 0x8000ac53 <- 0xdfe06fa6 -mem-write: 0x8000ac57 <- 0x613b9 -mem-write: 0x8000ac5b <- 0x81268301 -mem-write: 0x8000ac5f <- 0x9658630e -mem-write: 0x8000ac63 <- 0xc936a -mem-write: 0x8000ac67 <- 0x700d9301 -mem-write: 0x8000ac6b <- 0xc0006f00 -mem-write: 0x8000ac6f <- 0x4849300 -mem-write: 0x8000ac73 <- 0x9cde63ff -mem-write: 0x8000ac77 <- 0x81270368 -mem-write: 0x8000ac7b <- 0x7879300 -mem-write: 0x8000ac7f <- 0x16869301 -mem-write: 0x8000ac83 <- 0xe8a02300 -mem-write: 0x8000ac87 <- 0x98a22300 -mem-write: 0x8000ac8b <- 0xf1262301 -mem-write: 0x8000ac8f <- 0xd124230e -mem-write: 0x8000ac93 <- 0x8888930e -mem-write: 0x8000ac97 <- 0xdddce300 -mem-write: 0x8000ac9b <- 0x410613fc -mem-write: 0x8000ac9f <- 0xc05930e -mem-write: 0x8000aca3 <- 0xd051300 -mem-write: 0x8000aca7 <- 0x5030ef00 -mem-write: 0x8000acab <- 0x51ae36b -mem-write: 0x8000acaf <- 0xc1278398 -mem-write: 0x8000acb3 <- 0x8126830e -mem-write: 0x8000acb7 <- 0xc108930e -mem-write: 0x8000acbb <- 0x5ff06f10 -mem-write: 0x8000acbf <- 0x12703fb -mem-write: 0x8000acc3 <- 0x412c8302 -mem-write: 0x8000acc7 <- 0x412e2302 -mem-write: 0x8000accb <- 0x81202301 -mem-write: 0x8000accf <- 0x31222304 -mem-write: 0x8000acd3 <- 0x51222305 -mem-write: 0x8000acd7 <- 0x81298303 -mem-write: 0x8000acdb <- 0x61242302 -mem-write: 0x8000acdf <- 0xeb0bb303 -mem-write: 0x8000ace3 <- 0xc1240300 -mem-write: 0x8000ace7 <- 0x812a0303 -mem-write: 0x8000aceb <- 0xc12a8304 -mem-write: 0x8000acef <- 0x70049304 -mem-write: 0x8000acf3 <- 0x91300 -mem-write: 0x8000acf7 <- 0xc0b1301 -mem-write: 0x8000acfb <- 0xc886300 -mem-write: 0x8000acff <- 0x9986308 -mem-write: 0x8000ad03 <- 0xf4041308 -mem-write: 0x8000ad07 <- 0xfc8c93ff -mem-write: 0x8000ad0b <- 0x812703ff -mem-write: 0x8000ad0f <- 0x4787b30e -mem-write: 0x8000ad13 <- 0x58a02301 -mem-write: 0x8000ad17 <- 0x17071301 -mem-write: 0x8000ad1b <- 0x48a22300 -mem-write: 0x8000ad1f <- 0xf1262301 -mem-write: 0x8000ad23 <- 0xe124230e -mem-write: 0x8000ad27 <- 0x8888930e -mem-write: 0x8000ad2b <- 0xe4c46300 -mem-write: 0x8000ad2f <- 0x4468314 -mem-write: 0x8000ad33 <- 0xbb863300 -mem-write: 0x8000ad37 <- 0x68c1341 -mem-write: 0x8000ad3b <- 0xd6546300 -mem-write: 0x8000ad3f <- 0x60c1300 -mem-write: 0x8000ad43 <- 0x80566300 -mem-write: 0x8000ad47 <- 0x81268303 -mem-write: 0x8000ad4b <- 0x8787b30e -mem-write: 0x8000ad4f <- 0xb8a02301 -mem-write: 0x8000ad53 <- 0x16869301 -mem-write: 0x8000ad57 <- 0x88a22300 -mem-write: 0x8000ad5b <- 0xf1262301 -mem-write: 0x8000ad5f <- 0xd124230e -mem-write: 0x8000ad63 <- 0xd4c0630e -mem-write: 0x8000ad67 <- 0x4468334 -mem-write: 0x8000ad6b <- 0x88889300 -mem-write: 0x8000ad6f <- 0xfc461300 -mem-write: 0x8000ad73 <- 0xf65613ff -mem-write: 0x8000ad77 <- 0xcc773341 -mem-write: 0x8000ad7b <- 0xe68c3300 -mem-write: 0x8000ad7f <- 0x804c6340 -mem-write: 0x8000ad83 <- 0xdd8db301 -mem-write: 0x8000ad87 <- 0xc9ce300 -mem-write: 0x8000ad8b <- 0x98c63f6 -mem-write: 0x8000ad8f <- 0xf9899372 -mem-write: 0x8000ad93 <- 0x9ff06fff -mem-write: 0x8000ad97 <- 0x812683f7 -mem-write: 0x8000ad9b <- 0x8948630e -mem-write: 0x8000ad9f <- 0x80006f01 -mem-write: 0x8000ada3 <- 0xc0c1305 -mem-write: 0x8000ada7 <- 0x895863ff -mem-write: 0x8000adab <- 0x81270305 -mem-write: 0x8000adaf <- 0x7879300 -mem-write: 0x8000adb3 <- 0x16869301 -mem-write: 0x8000adb7 <- 0xe8a02300 -mem-write: 0x8000adbb <- 0x28a22300 -mem-write: 0x8000adbf <- 0xf1262301 -mem-write: 0x8000adc3 <- 0xd124230e -mem-write: 0x8000adc7 <- 0x8888930e -mem-write: 0x8000adcb <- 0xd4dce300 -mem-write: 0x8000adcf <- 0x410613fc -mem-write: 0x8000add3 <- 0xb05930e -mem-write: 0x8000add7 <- 0xd051300 -mem-write: 0x8000addb <- 0x1030ef00 -mem-write: 0x8000addf <- 0x51c6358 -mem-write: 0x8000ade3 <- 0xc0c135a -mem-write: 0x8000ade7 <- 0xc12783ff -mem-write: 0x8000adeb <- 0x8126830e -mem-write: 0x8000adef <- 0xc108930e -mem-write: 0x8000adf3 <- 0x894ce310 -mem-write: 0x8000adf7 <- 0x812703fb -mem-write: 0x8000adfb <- 0x8787b300 -mem-write: 0x8000adff <- 0x16869301 -mem-write: 0x8000ae03 <- 0xe8a02300 -mem-write: 0x8000ae07 <- 0x88a22300 -mem-write: 0x8000ae0b <- 0xf1262301 -mem-write: 0x8000ae0f <- 0xd124230e -mem-write: 0x8000ae13 <- 0xd4c4630e -mem-write: 0x8000ae17 <- 0x4468376 -mem-write: 0x8000ae1b <- 0x88889300 -mem-write: 0x8000ae1f <- 0xdd8db300 -mem-write: 0x8000ae23 <- 0x5ff06f00 -mem-write: 0x8000ae27 <- 0x412683f6 -mem-write: 0x8000ae2b <- 0xa779301 -mem-write: 0x8000ae2f <- 0x46871301 -mem-write: 0x8000ae33 <- 0x7846300 -mem-write: 0x8000ae37 <- 0x6a90320 -mem-write: 0x8000ae3b <- 0xc9300 -mem-write: 0x8000ae3f <- 0xe12a2300 -mem-write: 0x8000ae43 <- 0x5ff06f00 -mem-write: 0x8000ae47 <- 0x410613d4 -mem-write: 0x8000ae4b <- 0xc05930e -mem-write: 0x8000ae4f <- 0xd051300 -mem-write: 0x8000ae53 <- 0x9030ef00 -mem-write: 0x8000ae57 <- 0x5146350 -mem-write: 0x8000ae5b <- 0x812683fe -mem-write: 0x8000ae5f <- 0xc12c830e -mem-write: 0x8000ae63 <- 0x4108930e -mem-write: 0x8000ae67 <- 0x16869311 -mem-write: 0x8000ae6b <- 0xc1091300 -mem-write: 0x8000ae6f <- 0x5fe06f10 -mem-write: 0x8000ae73 <- 0x410613fd -mem-write: 0x8000ae77 <- 0xb05930e -mem-write: 0x8000ae7b <- 0xd051300 -mem-write: 0x8000ae7f <- 0xd030ef00 -mem-write: 0x8000ae83 <- 0x51a634d -mem-write: 0x8000ae87 <- 0xc1278350 -mem-write: 0x8000ae8b <- 0xc108930e -mem-write: 0x8000ae8f <- 0x1ff06f10 -mem-write: 0x8000ae93 <- 0x10b13ea -mem-write: 0x8000ae97 <- 0x7931b -mem-write: 0x8000ae9b <- 0x81282300 -mem-write: 0x8000ae9f <- 0x912e2300 -mem-write: 0x8000aea3 <- 0xb041300 -mem-write: 0x8000aea7 <- 0x31222300 -mem-write: 0x8000aeab <- 0xc0b1303 -mem-write: 0x8000aeaf <- 0x9049300 -mem-write: 0x8000aeb3 <- 0xc899300 -mem-write: 0x8000aeb7 <- 0xbfa1300 -mem-write: 0x8000aebb <- 0xc12c8340 -mem-write: 0x8000aebf <- 0xf00a9303 -mem-write: 0x8000aec3 <- 0x88c130f -mem-write: 0x8000aec7 <- 0x7891300 -mem-write: 0x8000aecb <- 0x40006f00 -mem-write: 0x8000aecf <- 0xa0061302 -mem-write: 0x8000aed3 <- 0x69300 -mem-write: 0x8000aed7 <- 0x4851300 -mem-write: 0x8000aedb <- 0x9859300 -mem-write: 0x8000aedf <- 0x8050ef00 -mem-write: 0x8000aee3 <- 0x9806350 -mem-write: 0x8000aee7 <- 0x504934c -mem-write: 0x8000aeeb <- 0x5899300 -mem-write: 0x8000aeef <- 0xa0061300 -mem-write: 0x8000aef3 <- 0x69300 -mem-write: 0x8000aef7 <- 0x4851300 -mem-write: 0x8000aefb <- 0x9859300 -mem-write: 0x8000aeff <- 0xd050ef00 -mem-write: 0x8000af03 <- 0x5051311 -mem-write: 0x8000af07 <- 0xa40fa303 -mem-write: 0x8000af0b <- 0x190913fe -mem-write: 0x8000af0f <- 0xf4041300 -mem-write: 0x8000af13 <- 0xa0ee3ff -mem-write: 0x8000af17 <- 0xcc683fa -mem-write: 0x8000af1b <- 0xd91ae300 -mem-write: 0x8000af1f <- 0x5908e3fa -mem-write: 0x8000af23 <- 0x99a63fb -mem-write: 0x8000af27 <- 0x90079342 -mem-write: 0x8000af2b <- 0x97e66300 -mem-write: 0x8000af2f <- 0xc089342 -mem-write: 0x8000af33 <- 0x1079300 -mem-write: 0x8000af37 <- 0xb0c131b -mem-write: 0x8000af3b <- 0x40b1300 -mem-write: 0x8000af3f <- 0x912e2300 -mem-write: 0x8000af43 <- 0xc1248303 -mem-write: 0x8000af47 <- 0x41298301 -mem-write: 0x8000af4b <- 0x1240302 -mem-write: 0x8000af4f <- 0x21202301 -mem-write: 0x8000af53 <- 0x678cb303 -mem-write: 0x8000af57 <- 0xb8a1341 -mem-write: 0x8000af5b <- 0xcff06f00 -mem-write: 0x8000af5f <- 0x81268396 -mem-write: 0x8000af63 <- 0x156370e -mem-write: 0x8000af67 <- 0x6061380 -mem-write: 0x8000af6b <- 0xc8a02398 -mem-write: 0x8000af6f <- 0x17879300 -mem-write: 0x8000af73 <- 0x10061300 -mem-write: 0x8000af77 <- 0x16869300 -mem-write: 0x8000af7b <- 0xc8a22300 -mem-write: 0x8000af7f <- 0xf1262300 -mem-write: 0x8000af83 <- 0xd124230e -mem-write: 0x8000af87 <- 0x7006130e -mem-write: 0x8000af8b <- 0x88889300 -mem-write: 0x8000af8f <- 0xd64c6300 -mem-write: 0x8000af93 <- 0x5986306 -mem-write: 0x8000af97 <- 0x1270320 -mem-write: 0x8000af9b <- 0x1a769302 -mem-write: 0x8000af9f <- 0xe6e6b300 -mem-write: 0x8000afa3 <- 0x6946300 -mem-write: 0x8000afa7 <- 0x9fe06f00 -mem-write: 0x8000afab <- 0x1268392 -mem-write: 0x8000afaf <- 0xc1270303 -mem-write: 0x8000afb3 <- 0x70061302 -mem-write: 0x8000afb7 <- 0xd8a02300 -mem-write: 0x8000afbb <- 0x81268300 -mem-write: 0x8000afbf <- 0xe787b30e -mem-write: 0x8000afc3 <- 0xe8a22300 -mem-write: 0x8000afc7 <- 0x16869300 -mem-write: 0x8000afcb <- 0xf1262300 -mem-write: 0x8000afcf <- 0xd124230e -mem-write: 0x8000afd3 <- 0xd64e630e -mem-write: 0x8000afd7 <- 0x8888934a -mem-write: 0x8000afdb <- 0x1270300 -mem-write: 0x8000afdf <- 0x16869302 -mem-write: 0x8000afe3 <- 0x68a02300 -mem-write: 0x8000afe7 <- 0xe787b301 -mem-write: 0x8000afeb <- 0xe8a22300 -mem-write: 0x8000afef <- 0xf1262300 -mem-write: 0x8000aff3 <- 0xd124230e -mem-write: 0x8000aff7 <- 0x7007130e -VXDRV: upload 1024 bytes to 0x8000affb -mem-write: 0x8000affb <- 0xd7446300 -mem-write: 0x8000afff <- 0xdfe06f00 -mem-write: 0x8000b003 <- 0x5fe06f8c -mem-write: 0x8000b007 <- 0x410613e6 -mem-write: 0x8000b00b <- 0xc05930e -mem-write: 0x8000b00f <- 0xd051300 -mem-write: 0x8000b013 <- 0x9030ef00 -mem-write: 0x8000b017 <- 0x5146334 -mem-write: 0x8000b01b <- 0xc12583e2 -mem-write: 0x8000b01f <- 0xc127830c -mem-write: 0x8000b023 <- 0xc108930e -mem-write: 0x8000b027 <- 0xdff06f10 -mem-write: 0x8000b02b <- 0x12b83f6 -mem-write: 0x8000b02f <- 0x40d1301 -mem-write: 0x8000b033 <- 0x48c1300 -mem-write: 0x8000b037 <- 0xcff06f00 -mem-write: 0x8000b03b <- 0xa7793e0 -mem-write: 0x8000b03f <- 0x78c6304 -mem-write: 0x8000b043 <- 0x41278322 -mem-write: 0x8000b047 <- 0xc9301 -mem-write: 0x8000b04b <- 0xe12a2300 -mem-write: 0x8000b04f <- 0x7d90300 -mem-write: 0x8000b053 <- 0x5ff06f00 -mem-write: 0x8000b057 <- 0x410613b3 -mem-write: 0x8000b05b <- 0xc05930e -mem-write: 0x8000b05f <- 0xd051300 -mem-write: 0x8000b063 <- 0x9030ef00 -mem-write: 0x8000b067 <- 0x51c632f -mem-write: 0x8000b06b <- 0xc12783dc -mem-write: 0x8000b06f <- 0xc108930e -mem-write: 0x8000b073 <- 0xff06f10 -mem-write: 0x8000b077 <- 0x812683b9 -mem-write: 0x8000b07b <- 0x9787b300 -mem-write: 0x8000b07f <- 0x98a22300 -mem-write: 0x8000b083 <- 0xd8a02300 -mem-write: 0x8000b087 <- 0x17071300 -mem-write: 0x8000b08b <- 0xf1262300 -mem-write: 0x8000b08f <- 0xe124230e -mem-write: 0x8000b093 <- 0x7006930e -mem-write: 0x8000b097 <- 0xe6c46300 -mem-write: 0x8000b09b <- 0x1fe06f00 -mem-write: 0x8000b09f <- 0x9fe06f83 -mem-write: 0x8000b0a3 <- 0x410613dc -mem-write: 0x8000b0a7 <- 0xb05930e -mem-write: 0x8000b0ab <- 0xd051300 -mem-write: 0x8000b0af <- 0xd030ef00 -mem-write: 0x8000b0b3 <- 0x512632a -mem-write: 0x8000b0b7 <- 0x446832e -mem-write: 0x8000b0bb <- 0xc1278300 -mem-write: 0x8000b0bf <- 0xc108930e -mem-write: 0x8000b0c3 <- 0xdff06f10 -mem-write: 0x8000b0c7 <- 0x12783ca -mem-write: 0x8000b0cb <- 0x105930f -mem-write: 0x8000b0cf <- 0x105130a -mem-write: 0x8000b0d3 <- 0xf128230b -mem-write: 0x8000b0d7 <- 0x4127830a -mem-write: 0x8000b0db <- 0x120230f -mem-write: 0x8000b0df <- 0x122230a -mem-write: 0x8000b0e3 <- 0xf12a230a -mem-write: 0x8000b0e7 <- 0x8127830a -mem-write: 0x8000b0eb <- 0x124230f -mem-write: 0x8000b0ef <- 0x126230a -mem-write: 0x8000b0f3 <- 0xf12c230a -mem-write: 0x8000b0f7 <- 0xc127830a -mem-write: 0x8000b0fb <- 0xf12e230f -mem-write: 0x8000b0ff <- 0x1060ef0a -mem-write: 0x8000b103 <- 0x128831e -mem-write: 0x8000b107 <- 0x5426301 -mem-write: 0x8000b10b <- 0x71478352 -mem-write: 0x8000b10f <- 0x7007130c -mem-write: 0x8000b113 <- 0x975e6304 -mem-write: 0x8000b117 <- 0x1573728 -mem-write: 0x8000b11b <- 0x70b1380 -mem-write: 0x8000b11f <- 0x12823a3 -mem-write: 0x8000b123 <- 0x1242300 -mem-write: 0x8000b127 <- 0x1222302 -mem-write: 0x8000b12b <- 0x12e2302 -mem-write: 0x8000b12f <- 0xfa7a1300 -mem-write: 0x8000b133 <- 0x300a93f7 -mem-write: 0x8000b137 <- 0x300c9300 -mem-write: 0x8000b13b <- 0xd9300 -mem-write: 0x8000b13f <- 0x7846300 -mem-write: 0x8000b143 <- 0x9fe06f00 -mem-write: 0x8000b147 <- 0xcfe06fe7 -mem-write: 0x8000b14b <- 0xc12783eb -mem-write: 0x8000b14f <- 0x40b1300 -mem-write: 0x8000b153 <- 0xf7202300 -mem-write: 0x8000b157 <- 0xfe06f00 -mem-write: 0x8000b15b <- 0xb0513fc -mem-write: 0x8000b15f <- 0x91202300 -mem-write: 0x8000b163 <- 0x8fe0ef05 -mem-write: 0x8000b167 <- 0x714783b8 -mem-write: 0x8000b16b <- 0xf54a930c -mem-write: 0x8000b16f <- 0xfada93ff -mem-write: 0x8000b173 <- 0x212a2341 -mem-write: 0x8000b177 <- 0x1282301 -mem-write: 0x8000b17b <- 0x1242300 -mem-write: 0x8000b17f <- 0x1222302 -mem-write: 0x8000b183 <- 0x12e2302 -mem-write: 0x8000b187 <- 0x1288300 -mem-write: 0x8000b18b <- 0x50c9304 -mem-write: 0x8000b18f <- 0x557ab300 -mem-write: 0x8000b193 <- 0xd9301 -mem-write: 0x8000b197 <- 0x7846300 -mem-write: 0x8000b19b <- 0x1fe06f00 -mem-write: 0x8000b19f <- 0x4fe06fe2 -mem-write: 0x8000b1a3 <- 0x12683e6 -mem-write: 0x8000b1a7 <- 0xc1270303 -mem-write: 0x8000b1ab <- 0x70061302 -mem-write: 0x8000b1af <- 0xd8a02300 -mem-write: 0x8000b1b3 <- 0x81268300 -mem-write: 0x8000b1b7 <- 0xe787b30e -mem-write: 0x8000b1bb <- 0xe8a22300 -mem-write: 0x8000b1bf <- 0x16869300 -mem-write: 0x8000b1c3 <- 0xf1262300 -mem-write: 0x8000b1c7 <- 0xd124230e -mem-write: 0x8000b1cb <- 0x8888930e -mem-write: 0x8000b1cf <- 0xd6406300 -mem-write: 0x8000b1d3 <- 0x5d4e32c -mem-write: 0x8000b1d7 <- 0x613e0 -mem-write: 0x8000b1db <- 0xb004b3ff -mem-write: 0x8000b1df <- 0xc5d4e340 -mem-write: 0x8000b1e3 <- 0x91326 -mem-write: 0x8000b1e7 <- 0x700c9301 -mem-write: 0x8000b1eb <- 0xc0006f00 -mem-write: 0x8000b1ef <- 0x4849300 -mem-write: 0x8000b1f3 <- 0x995ae3ff -mem-write: 0x8000b1f7 <- 0x81270324 -mem-write: 0x8000b1fb <- 0x7879300 -mem-write: 0x8000b1ff <- 0x16869301 -mem-write: 0x8000b203 <- 0xe8a02300 -mem-write: 0x8000b207 <- 0x28a22300 -mem-write: 0x8000b20b <- 0xf1262301 -mem-write: 0x8000b20f <- 0xd124230e -mem-write: 0x8000b213 <- 0x8888930e -mem-write: 0x8000b217 <- 0xdcdce300 -mem-write: 0x8000b21b <- 0x410613fc -mem-write: 0x8000b21f <- 0xc05930e -mem-write: 0x8000b223 <- 0xd051300 -mem-write: 0x8000b227 <- 0x5030ef00 -mem-write: 0x8000b22b <- 0x51a6313 -mem-write: 0x8000b22f <- 0xc12783c0 -mem-write: 0x8000b233 <- 0x8126830e -mem-write: 0x8000b237 <- 0xc108930e -mem-write: 0x8000b23b <- 0x5ff06f10 -mem-write: 0x8000b23f <- 0x148693fb -mem-write: 0x8000b243 <- 0x89071300 -mem-write: 0x8000b247 <- 0x81278300 -mem-write: 0x8000b24b <- 0xbc8cb300 -mem-write: 0x8000b24f <- 0xb9222301 -mem-write: 0x8000b253 <- 0xf9202301 -mem-write: 0x8000b257 <- 0x91262300 -mem-write: 0x8000b25b <- 0xd124230f -mem-write: 0x8000b25f <- 0x7007930e -mem-write: 0x8000b263 <- 0xd7c2e300 -mem-write: 0x8000b267 <- 0x168693be -mem-write: 0x8000b26b <- 0x87089300 -mem-write: 0x8000b26f <- 0x7091300 -mem-write: 0x8000b273 <- 0x1fe06f00 -mem-write: 0x8000b277 <- 0xa7793bd -mem-write: 0x8000b27b <- 0x78e6320 -mem-write: 0x8000b27f <- 0x4127831c -mem-write: 0x8000b283 <- 0xc9301 -mem-write: 0x8000b287 <- 0xe12a2300 -mem-write: 0x8000b28b <- 0x7c90300 -mem-write: 0x8000b28f <- 0x9ff06f00 -mem-write: 0x8000b293 <- 0xa77938f -mem-write: 0x8000b297 <- 0x7846320 -mem-write: 0x8000b29b <- 0x4127831a -mem-write: 0x8000b29f <- 0xe12a2301 -mem-write: 0x8000b2a3 <- 0x7890300 -mem-write: 0x8000b2a7 <- 0xf95c9300 -mem-write: 0x8000b2ab <- 0xc879341 -mem-write: 0x8000b2af <- 0x5fe06f00 -mem-write: 0x8000b2b3 <- 0xbf793fa -mem-write: 0x8000b2b7 <- 0x7886320 -mem-write: 0x8000b2bb <- 0x41278316 -mem-write: 0x8000b2bf <- 0xc9301 -mem-write: 0x8000b2c3 <- 0xe12a2300 -mem-write: 0x8000b2c7 <- 0x7c90300 -mem-write: 0x8000b2cb <- 0x10079300 -mem-write: 0x8000b2cf <- 0xdfe06f00 -mem-write: 0x8000b2d3 <- 0xa7793dc -mem-write: 0x8000b2d7 <- 0x78e6320 -mem-write: 0x8000b2db <- 0x41278312 -mem-write: 0x8000b2df <- 0xc9301 -mem-write: 0x8000b2e3 <- 0xe12a2300 -mem-write: 0x8000b2e7 <- 0x7c90300 -mem-write: 0x8000b2eb <- 0x1fe06f00 -mem-write: 0x8000b2ef <- 0xc12783e3 -mem-write: 0x8000b2f3 <- 0x7c8630f -mem-write: 0x8000b2f7 <- 0x71478318 -mem-write: 0x8000b2fb <- 0x7007130c -mem-write: 0x8000b2ff <- 0x975c6304 -mem-write: 0x8000b303 <- 0x1573746 -mem-write: 0x8000b307 <- 0x870b1380 -mem-write: 0x8000b30b <- 0x5ff06fa3 -mem-write: 0x8000b30f <- 0x812703e1 -mem-write: 0x8000b313 <- 0x9787b300 -mem-write: 0x8000b317 <- 0x16869300 -mem-write: 0x8000b31b <- 0xe8a02300 -mem-write: 0x8000b31f <- 0x98a22300 -mem-write: 0x8000b323 <- 0xf1262300 -mem-write: 0x8000b327 <- 0xd124230e -mem-write: 0x8000b32b <- 0x7006130e -mem-write: 0x8000b32f <- 0x88889300 -mem-write: 0x8000b333 <- 0xd6566300 -mem-write: 0x8000b337 <- 0x410613c8 -mem-write: 0x8000b33b <- 0xc05930e -mem-write: 0x8000b33f <- 0xd051300 -mem-write: 0x8000b343 <- 0x9030ef00 -mem-write: 0x8000b347 <- 0x51c6301 -mem-write: 0x8000b34b <- 0xc12783ae -mem-write: 0x8000b34f <- 0xc108930e -mem-write: 0x8000b353 <- 0xcff06f10 -mem-write: 0x8000b357 <- 0x812783c6 -mem-write: 0x8000b35b <- 0xc1258304 -mem-write: 0x8000b35f <- 0x91304 -mem-write: 0x8000b363 <- 0xf4043300 -mem-write: 0x8000b367 <- 0x7861340 -mem-write: 0x8000b36b <- 0x4051300 -mem-write: 0x8000b36f <- 0x8fe0ef00 -mem-write: 0x8000b373 <- 0x1cc583a0 -mem-write: 0x8000b377 <- 0xa0061300 -mem-write: 0x8000b37b <- 0x69300 -mem-write: 0x8000b37f <- 0xb0383300 -mem-write: 0x8000b383 <- 0x4851300 -mem-write: 0x8000b387 <- 0x9859300 -mem-write: 0x8000b38b <- 0xc8cb300 -mem-write: 0x8000b38f <- 0x8050ef01 -mem-write: 0x8000b393 <- 0x5ff06f05 -mem-write: 0x8000b397 <- 0x12b83b5 -mem-write: 0x8000b39b <- 0xb0c1301 -mem-write: 0x8000b39f <- 0x4ff06f00 -mem-write: 0x8000b3a3 <- 0x900793aa -mem-write: 0x8000b3a7 <- 0x97e0e300 -mem-write: 0x8000b3ab <- 0x5ff06fb4 -mem-write: 0x8000b3af <- 0x15737b8 -mem-write: 0x8000b3b3 <- 0xc70b1380 -mem-write: 0x8000b3b7 <- 0x9ff06fa2 -mem-write: 0x8000b3bb <- 0x410613d6 -mem-write: 0x8000b3bf <- 0xc05930e -mem-write: 0x8000b3c3 <- 0xd051300 -mem-write: 0x8000b3c7 <- 0x4030ef00 -mem-write: 0x8000b3cb <- 0x51a6379 -mem-write: 0x8000b3cf <- 0xc12783a6 -mem-write: 0x8000b3d3 <- 0xc108930e -mem-write: 0x8000b3d7 <- 0xff06f10 -mem-write: 0x8000b3db <- 0x600c93bd -mem-write: 0x8000b3df <- 0x5ff06f00 -mem-write: 0x8000b3e3 <- 0x1268386 -mem-write: 0x8000b3e7 <- 0xdb073302 -mem-write: 0x8000b3eb <- 0x9684b300 -mem-write: 0x8000b3ef <- 0xb7083340 -mem-write: 0x8000b3f3 <- 0x4891341 -mem-write: 0x8000b3f7 <- 0x98526300 -VXDRV: upload 1024 bytes to 0x8000b3fb -mem-write: 0x8000b3fb <- 0x80913c6 -mem-write: 0x8000b3ff <- 0xcff06f00 -mem-write: 0x8000b403 <- 0xc12783c5 -mem-write: 0x8000b407 <- 0x40b1300 -mem-write: 0x8000b40b <- 0xf7102300 -mem-write: 0x8000b40f <- 0x8fe06f00 -mem-write: 0x8000b413 <- 0x412783d0 -mem-write: 0x8000b417 <- 0xc9301 -mem-write: 0x8000b41b <- 0xe12a2300 -mem-write: 0x8000b41f <- 0x7a90300 -mem-write: 0x8000b423 <- 0x9fe06f00 -mem-write: 0x8000b427 <- 0x412783cf -mem-write: 0x8000b42b <- 0xc9301 -mem-write: 0x8000b42f <- 0xe12a2300 -mem-write: 0x8000b433 <- 0x7a90300 -mem-write: 0x8000b437 <- 0x10079300 -mem-write: 0x8000b43b <- 0x1fe06f00 -mem-write: 0x8000b43f <- 0x412783c6 -mem-write: 0x8000b443 <- 0xe12a2301 -mem-write: 0x8000b447 <- 0x7a90300 -mem-write: 0x8000b44b <- 0xf95c9300 -mem-write: 0x8000b44f <- 0xc879341 -mem-write: 0x8000b453 <- 0x1fe06f00 -mem-write: 0x8000b457 <- 0x412783e0 -mem-write: 0x8000b45b <- 0xc9301 -mem-write: 0x8000b45f <- 0xe12a2300 -mem-write: 0x8000b463 <- 0x7a90300 -mem-write: 0x8000b467 <- 0xff06f00 -mem-write: 0x8000b46b <- 0x410613f2 -mem-write: 0x8000b46f <- 0xc05930e -mem-write: 0x8000b473 <- 0xd051300 -mem-write: 0x8000b477 <- 0x4030ef00 -mem-write: 0x8000b47b <- 0xcc57036e -mem-write: 0x8000b47f <- 0xfe06f00 -mem-write: 0x8000b483 <- 0xd00793cb -mem-write: 0x8000b487 <- 0xf103a302 -mem-write: 0x8000b48b <- 0x1ff06f0c -mem-write: 0x8000b48f <- 0x410613e7 -mem-write: 0x8000b493 <- 0xc05930e -mem-write: 0x8000b497 <- 0xd051300 -mem-write: 0x8000b49b <- 0x30ef00 -mem-write: 0x8000b49f <- 0x510636c -mem-write: 0x8000b4a3 <- 0xc125839a -mem-write: 0x8000b4a7 <- 0xc127830c -mem-write: 0x8000b4ab <- 0x8126830e -mem-write: 0x8000b4af <- 0xc108930e -mem-write: 0x8000b4b3 <- 0x5d4e310 -mem-write: 0x8000b4b7 <- 0x1ff06fb2 -mem-write: 0x8000b4bb <- 0x600d93d2 -mem-write: 0x8000b4bf <- 0x8fe06f00 -mem-write: 0x8000b4c3 <- 0x12703df -mem-write: 0x8000b4c7 <- 0xb0c1302 -mem-write: 0x8000b4cb <- 0x812b0300 -mem-write: 0x8000b4cf <- 0x812e2302 -mem-write: 0x8000b4d3 <- 0xc12a0302 -mem-write: 0x8000b4d7 <- 0xeb06b301 -mem-write: 0x8000b4db <- 0x1240300 -mem-write: 0x8000b4df <- 0x41298304 -mem-write: 0x8000b4e3 <- 0x412a8304 -mem-write: 0x8000b4e7 <- 0xb6f46302 -mem-write: 0x8000b4eb <- 0x68d93af -mem-write: 0x8000b4ef <- 0xff06f00 -mem-write: 0x8000b4f3 <- 0xc12703ae -mem-write: 0x8000b4f7 <- 0xd0079301 -mem-write: 0x8000b4fb <- 0xf74463ff -mem-write: 0x8000b4ff <- 0xedda6300 -mem-write: 0x8000b503 <- 0xe4849300 -mem-write: 0x8000b507 <- 0xf4f793ff -mem-write: 0x8000b50b <- 0xf12a23fd -mem-write: 0x8000b50f <- 0x4fe06f04 -mem-write: 0x8000b513 <- 0x12783ee -mem-write: 0x8000b517 <- 0xc1270302 -mem-write: 0x8000b51b <- 0xf7446301 -mem-write: 0x8000b51f <- 0x81278326 -mem-write: 0x8000b523 <- 0x70c9302 -mem-write: 0x8000b527 <- 0x17f79300 -mem-write: 0x8000b52b <- 0x7866300 -mem-write: 0x8000b52f <- 0xc1278300 -mem-write: 0x8000b533 <- 0xf70cb302 -mem-write: 0x8000b537 <- 0x81278300 -mem-write: 0x8000b53b <- 0x7f79302 -mem-write: 0x8000b53f <- 0x7866340 -mem-write: 0x8000b543 <- 0xc1278300 -mem-write: 0x8000b547 <- 0xf04ae301 -mem-write: 0x8000b54b <- 0xfcca9312 -mem-write: 0x8000b54f <- 0xfada93ff -mem-write: 0x8000b553 <- 0x5cfab341 -mem-write: 0x8000b557 <- 0x70049301 -mem-write: 0x8000b55b <- 0x1242306 -mem-write: 0x8000b55f <- 0x1222302 -mem-write: 0x8000b563 <- 0xcfe06f02 -mem-write: 0x8000b567 <- 0x714783fa -mem-write: 0x8000b56b <- 0xd930c -mem-write: 0x8000b56f <- 0x7846300 -mem-write: 0x8000b573 <- 0x9fe06f00 -mem-write: 0x8000b577 <- 0xcfe06fa4 -mem-write: 0x8000b57b <- 0x410613a8 -mem-write: 0x8000b57f <- 0xb05930e -mem-write: 0x8000b583 <- 0xd051300 -mem-write: 0x8000b587 <- 0x4030ef00 -mem-write: 0x8000b58b <- 0x516e35d -mem-write: 0x8000b58f <- 0x44683e0 -mem-write: 0x8000b593 <- 0xc1278300 -mem-write: 0x8000b597 <- 0xc108930e -mem-write: 0x8000b59b <- 0xdd8db310 -mem-write: 0x8000b59f <- 0x8ff06f00 -mem-write: 0x8000b5a3 <- 0x10a93fe -mem-write: 0x8000b5a7 <- 0xc108130b -mem-write: 0x8000b5ab <- 0x107930d -mem-write: 0x8000b5af <- 0xc107130d -mem-write: 0x8000b5b3 <- 0xd86930c -mem-write: 0x8000b5b7 <- 0x30061300 -mem-write: 0x8000b5bb <- 0xa859300 -mem-write: 0x8000b5bf <- 0xd051300 -mem-write: 0x8000b5c3 <- 0x11222300 -mem-write: 0x8000b5c7 <- 0xc1282305 -mem-write: 0x8000b5cb <- 0xc120230b -mem-write: 0x8000b5cf <- 0xd12a2305 -mem-write: 0x8000b5d3 <- 0xd122230b -mem-write: 0x8000b5d7 <- 0xe12c2303 -mem-write: 0x8000b5db <- 0xe120230b -mem-write: 0x8000b5df <- 0x612e2303 -mem-write: 0x8000b5e3 <- 0x612e230a -mem-write: 0x8000b5e7 <- 0xdfa0ef00 -mem-write: 0x8000b5eb <- 0xc12303c4 -mem-write: 0x8000b5ef <- 0x12f0301 -mem-write: 0x8000b5f3 <- 0x412e8302 -mem-write: 0x8000b5f7 <- 0x12e0302 -mem-write: 0x8000b5fb <- 0x41288304 -mem-write: 0x8000b5ff <- 0x50b1304 -mem-write: 0x8000b603 <- 0x60079300 -mem-write: 0x8000b607 <- 0xbb093304 -mem-write: 0x8000b60b <- 0xfb9a6301 -mem-write: 0x8000b60f <- 0xb468362 -mem-write: 0x8000b613 <- 0x79300 -mem-write: 0x8000b617 <- 0xf686e303 -mem-write: 0x8000b61b <- 0x10c9310 -mem-write: 0x8000b61f <- 0xc127830a -mem-write: 0x8000b623 <- 0xf909330c -mem-write: 0x8000b627 <- 0xfe06f00 -mem-write: 0x8000b62b <- 0xd00793d4 -mem-write: 0x8000b62f <- 0xf103a302 -mem-write: 0x8000b633 <- 0xdff06f0c -mem-write: 0x8000b637 <- 0x10a93ad -mem-write: 0x8000b63b <- 0x107930b -mem-write: 0x8000b63f <- 0xc108130d -mem-write: 0x8000b643 <- 0xc107130d -mem-write: 0x8000b647 <- 0xd86930c -mem-write: 0x8000b64b <- 0x20061300 -mem-write: 0x8000b64f <- 0xa859300 -mem-write: 0x8000b653 <- 0xd051300 -mem-write: 0x8000b657 <- 0xc1282300 -mem-write: 0x8000b65b <- 0xc120230b -mem-write: 0x8000b65f <- 0xd12a2305 -mem-write: 0x8000b663 <- 0xd122230b -mem-write: 0x8000b667 <- 0xe12c2303 -mem-write: 0x8000b66b <- 0xe120230b -mem-write: 0x8000b66f <- 0x612e2303 -mem-write: 0x8000b673 <- 0x612e230a -mem-write: 0x8000b677 <- 0xdfa0ef00 -mem-write: 0x8000b67b <- 0x700793bb -mem-write: 0x8000b67f <- 0xc1230304 -mem-write: 0x8000b683 <- 0x12f0301 -mem-write: 0x8000b687 <- 0x412e8302 -mem-write: 0x8000b68b <- 0x12e0302 -mem-write: 0x8000b68f <- 0x41288304 -mem-write: 0x8000b693 <- 0x50b1304 -mem-write: 0x8000b697 <- 0xfb96e300 -mem-write: 0x8000b69b <- 0x812783f6 -mem-write: 0x8000b69f <- 0x17f79302 -mem-write: 0x8000b6a3 <- 0x7986300 -mem-write: 0x8000b6a7 <- 0x70079358 -mem-write: 0x8000b6ab <- 0xc1270304 -mem-write: 0x8000b6af <- 0xf12a230d -mem-write: 0x8000b6b3 <- 0xfe06f04 -mem-write: 0x8000b6b7 <- 0x410613d1 -mem-write: 0x8000b6bb <- 0xc05930e -mem-write: 0x8000b6bf <- 0xd051300 -mem-write: 0x8000b6c3 <- 0x8030ef00 -mem-write: 0x8000b6c7 <- 0x5046349 -mem-write: 0x8000b6cb <- 0x5fe06f00 -mem-write: 0x8000b6cf <- 0xc12483f7 -mem-write: 0x8000b6d3 <- 0xc127830c -mem-write: 0x8000b6d7 <- 0xc108930e -mem-write: 0x8000b6db <- 0x8ff06f10 -mem-write: 0x8000b6df <- 0x71478393 -mem-write: 0x8000b6e3 <- 0x212a230c -mem-write: 0x8000b6e7 <- 0x1242301 -mem-write: 0x8000b6eb <- 0x1222302 -mem-write: 0x8000b6ef <- 0x12e2302 -mem-write: 0x8000b6f3 <- 0xd8a9300 -mem-write: 0x8000b6f7 <- 0xd8c9300 -mem-write: 0x8000b6fb <- 0xd9300 -mem-write: 0x8000b6ff <- 0x7846300 -mem-write: 0x8000b703 <- 0x9fe06f00 -mem-write: 0x8000b707 <- 0xcfe06f8b -mem-write: 0x8000b70b <- 0x4106138f -mem-write: 0x8000b70f <- 0xc05930e -mem-write: 0x8000b713 <- 0xd051300 -mem-write: 0x8000b717 <- 0x4030ef00 -mem-write: 0x8000b71b <- 0x5046344 -mem-write: 0x8000b71f <- 0x1fe06f00 -mem-write: 0x8000b723 <- 0xc12483f2 -mem-write: 0x8000b727 <- 0x127030c -mem-write: 0x8000b72b <- 0xc1278302 -mem-write: 0x8000b72f <- 0xc108930e -mem-write: 0x8000b733 <- 0x9704b310 -mem-write: 0x8000b737 <- 0x4ff06f40 -mem-write: 0x8000b73b <- 0x81278392 -mem-write: 0x8000b73f <- 0xc1270302 -mem-write: 0x8000b743 <- 0x17f79301 -mem-write: 0x8000b747 <- 0xb7e7b300 -mem-write: 0x8000b74b <- 0xe054e301 -mem-write: 0x8000b74f <- 0x7966304 -mem-write: 0x8000b753 <- 0xc12c837a -mem-write: 0x8000b757 <- 0x60049301 -mem-write: 0x8000b75b <- 0x81278306 -mem-write: 0x8000b75f <- 0x7f79302 -mem-write: 0x8000b763 <- 0x79e6340 -mem-write: 0x8000b767 <- 0xfcca9370 -mem-write: 0x8000b76b <- 0xfada93ff -mem-write: 0x8000b76f <- 0x5cfab341 -mem-write: 0x8000b773 <- 0x9ff06f01 -mem-write: 0x8000b777 <- 0x15737de -mem-write: 0x8000b77b <- 0x470b1380 -mem-write: 0x8000b77f <- 0x1ff06fa3 -mem-write: 0x8000b783 <- 0x127839a -mem-write: 0x8000b787 <- 0xc1270302 -mem-write: 0x8000b78b <- 0x70049302 -mem-write: 0x8000b78f <- 0xe78cb306 -mem-write: 0x8000b793 <- 0xc1278300 -mem-write: 0x8000b797 <- 0xf042e301 -mem-write: 0x8000b79b <- 0xfc8cb3fc -mem-write: 0x8000b79f <- 0x1c8c9340 -mem-write: 0x8000b7a3 <- 0xfcca9300 -mem-write: 0x8000b7a7 <- 0xfada93ff -mem-write: 0x8000b7ab <- 0x5cfab341 -mem-write: 0x8000b7af <- 0xdff06f01 -mem-write: 0x8000b7b3 <- 0x156b7da -mem-write: 0x8000b7b7 <- 0x468e9380 -mem-write: 0x8000b7bb <- 0x8fe06f17 -mem-write: 0x8000b7bf <- 0x793f4 -mem-write: 0x8000b7c3 <- 0xf1042303 -mem-write: 0x8000b7c7 <- 0x8007930c -mem-write: 0x8000b7cb <- 0x2a671305 -mem-write: 0x8000b7cf <- 0xf104a300 -mem-write: 0x8000b7d3 <- 0xe124230c -mem-write: 0x8000b7d7 <- 0x30079302 -mem-write: 0x8000b7db <- 0x1282306 -mem-write: 0x8000b7df <- 0xc10b1300 -mem-write: 0x8000b7e3 <- 0xb7ce6314 -mem-write: 0x8000b7e7 <- 0xc1230341 -mem-write: 0x8000b7eb <- 0xf4fb930f -mem-write: 0x8000b7ef <- 0x712a23fd -mem-write: 0x8000b7f3 <- 0x12c2305 -mem-write: 0x8000b7f7 <- 0x12e0304 -VXDRV: upload 1024 bytes to 0x8000b7fb -mem-write: 0x8000b7fb <- 0x412e830f -mem-write: 0x8000b7ff <- 0x812f030f -mem-write: 0x8000b803 <- 0x2a6a130f -mem-write: 0x8000b807 <- 0x3426310 -mem-write: 0x8000b80b <- 0x10079338 -mem-write: 0x8000b80f <- 0xf48e6306 -mem-write: 0x8000b813 <- 0x10079354 -mem-write: 0x8000b817 <- 0xf4846304 -mem-write: 0x8000b81b <- 0x8fe06f00 -mem-write: 0x8000b81f <- 0x10a93ac -mem-write: 0x8000b823 <- 0xa85130b -mem-write: 0x8000b827 <- 0x11282300 -mem-write: 0x8000b82b <- 0xc1282305 -mem-write: 0x8000b82f <- 0xd12a230b -mem-write: 0x8000b833 <- 0xe12c230b -mem-write: 0x8000b837 <- 0x612e230b -mem-write: 0x8000b83b <- 0x5080ef0a -mem-write: 0x8000b83f <- 0xc1061356 -mem-write: 0x8000b843 <- 0x5fd0ef0c -mem-write: 0x8000b847 <- 0x586138b -mem-write: 0x8000b84b <- 0x5059300 -mem-write: 0x8000b84f <- 0xa851300 -mem-write: 0x8000b853 <- 0x9080ef00 -mem-write: 0x8000b857 <- 0x1278335 -mem-write: 0x8000b85b <- 0x10c930b -mem-write: 0x8000b85f <- 0x109130a -mem-write: 0x8000b863 <- 0xf1282309 -mem-write: 0x8000b867 <- 0x41278308 -mem-write: 0x8000b86b <- 0x106130b -mem-write: 0x8000b86f <- 0x9059308 -mem-write: 0x8000b873 <- 0xf12a2300 -mem-write: 0x8000b877 <- 0x81278308 -mem-write: 0x8000b87b <- 0xc85130b -mem-write: 0x8000b87f <- 0xc1202300 -mem-write: 0x8000b883 <- 0xf12c2304 -mem-write: 0x8000b887 <- 0xc1278308 -mem-write: 0x8000b88b <- 0x120230b -mem-write: 0x8000b88f <- 0x1222308 -mem-write: 0x8000b893 <- 0xf12e2308 -mem-write: 0x8000b897 <- 0xfc07b708 -mem-write: 0x8000b89b <- 0xf126233f -mem-write: 0x8000b89f <- 0x1242308 -mem-write: 0x8000b8a3 <- 0x60ef08 -mem-write: 0x8000b8a7 <- 0x1280338 -mem-write: 0x8000b8ab <- 0x412e030a -mem-write: 0x8000b8af <- 0x812e830a -mem-write: 0x8000b8b3 <- 0xc12f030a -mem-write: 0x8000b8b7 <- 0xc85930a -mem-write: 0x8000b8bb <- 0xa851300 -mem-write: 0x8000b8bf <- 0x1282300 -mem-write: 0x8000b8c3 <- 0x122230b -mem-write: 0x8000b8c7 <- 0xc12a2305 -mem-write: 0x8000b8cb <- 0xc122230b -mem-write: 0x8000b8cf <- 0xd12c2303 -mem-write: 0x8000b8d3 <- 0xd120230b -mem-write: 0x8000b8d7 <- 0xe12e2303 -mem-write: 0x8000b8db <- 0xe12e230b -mem-write: 0x8000b8df <- 0x1202301 -mem-write: 0x8000b8e3 <- 0x122230a -mem-write: 0x8000b8e7 <- 0x124230a -mem-write: 0x8000b8eb <- 0x126230a -mem-write: 0x8000b8ef <- 0x1050ef0a -mem-write: 0x8000b8f3 <- 0xc12f037e -mem-write: 0x8000b8f7 <- 0x12e8301 -mem-write: 0x8000b8fb <- 0x412e0302 -mem-write: 0x8000b8ff <- 0x41280302 -mem-write: 0x8000b903 <- 0x1288304 -mem-write: 0x8000b907 <- 0x5166305 -mem-write: 0x8000b90b <- 0x10079300 -mem-write: 0x8000b90f <- 0xf1262300 -mem-write: 0x8000b913 <- 0x157b70c -mem-write: 0x8000b917 <- 0x7879380 -mem-write: 0x8000b91b <- 0xf12223a5 -mem-write: 0x8000b91f <- 0xfd869302 -mem-write: 0x8000b923 <- 0x412e23ff -mem-write: 0x8000b927 <- 0x91222305 -mem-write: 0x8000b92b <- 0xb1262306 -mem-write: 0x8000b92f <- 0xa12a2307 -mem-write: 0x8000b933 <- 0x812c2307 -mem-write: 0x8000b937 <- 0xb0b9307 -mem-write: 0x8000b93b <- 0x81202300 -mem-write: 0x8000b93f <- 0x31242306 -mem-write: 0x8000b943 <- 0x11282307 -mem-write: 0x8000b947 <- 0x68c1307 -mem-write: 0x8000b94b <- 0x612e2300 -mem-write: 0x8000b94f <- 0x80d1307 -mem-write: 0x8000b953 <- 0xe0d9300 -mem-write: 0x8000b957 <- 0xe849300 -mem-write: 0x8000b95b <- 0xf0a1300 -mem-write: 0x8000b95f <- 0x80006f00 -mem-write: 0x8000b963 <- 0xc859304 -mem-write: 0x8000b967 <- 0xa851300 -mem-write: 0x8000b96b <- 0xc1202300 -mem-write: 0x8000b96f <- 0xf12e2302 -mem-write: 0x8000b973 <- 0xf12c2301 -mem-write: 0x8000b977 <- 0xc12e230b -mem-write: 0x8000b97b <- 0x6128230a -mem-write: 0x8000b97f <- 0x312a230b -mem-write: 0x8000b983 <- 0x120230b -mem-write: 0x8000b987 <- 0x122230a -mem-write: 0x8000b98b <- 0x124230a -mem-write: 0x8000b98f <- 0x126230a -mem-write: 0x8000b993 <- 0xd050ef0a -mem-write: 0x8000b997 <- 0xc12f8373 -mem-write: 0x8000b99b <- 0x1260301 -mem-write: 0x8000b99f <- 0xfc0c1302 -mem-write: 0x8000b9a3 <- 0x50263ff -mem-write: 0x8000b9a7 <- 0x307b70e -mem-write: 0x8000b9ab <- 0x9061340 -mem-write: 0x8000b9af <- 0xc859300 -mem-write: 0x8000b9b3 <- 0xa851300 -mem-write: 0x8000b9b7 <- 0xf12e2300 -mem-write: 0x8000b9bb <- 0xa1202308 -mem-write: 0x8000b9bf <- 0xb122230b -mem-write: 0x8000b9c3 <- 0x9124230b -mem-write: 0x8000b9c7 <- 0x4126230a -mem-write: 0x8000b9cb <- 0x128230b -mem-write: 0x8000b9cf <- 0x12a2308 -mem-write: 0x8000b9d3 <- 0x12c2308 -mem-write: 0x8000b9d7 <- 0xc060ef08 -mem-write: 0x8000b9db <- 0xa851324 -mem-write: 0x8000b9df <- 0x8080ef00 -mem-write: 0x8000b9e3 <- 0x5059376 -mem-write: 0x8000b9e7 <- 0x5041300 -mem-write: 0x8000b9eb <- 0xa851300 -mem-write: 0x8000b9ef <- 0x1298300 -mem-write: 0x8000b9f3 <- 0x4124830b -mem-write: 0x8000b9f7 <- 0x812b030b -mem-write: 0x8000b9fb <- 0xc12a030b -mem-write: 0x8000b9ff <- 0xd080ef0b -mem-write: 0x8000ba03 <- 0x1270305 -mem-write: 0x8000ba07 <- 0x126030b -mem-write: 0x8000ba0b <- 0x9059304 -mem-write: 0x8000ba0f <- 0xe1202300 -mem-write: 0x8000ba13 <- 0x41270308 -mem-write: 0x8000ba17 <- 0xc85130b -mem-write: 0x8000ba1b <- 0x31282300 -mem-write: 0x8000ba1f <- 0xe1222309 -mem-write: 0x8000ba23 <- 0x81270308 -mem-write: 0x8000ba27 <- 0x912a230b -mem-write: 0x8000ba2b <- 0x612c2308 -mem-write: 0x8000ba2f <- 0xe1242309 -mem-write: 0x8000ba33 <- 0xc1270308 -mem-write: 0x8000ba37 <- 0x412e230b -mem-write: 0x8000ba3b <- 0xe1262309 -mem-write: 0x8000ba3f <- 0x8070ef08 -mem-write: 0x8000ba43 <- 0x4127831e -mem-write: 0x8000ba47 <- 0x12b0302 -mem-write: 0x8000ba4b <- 0x4129830a -mem-write: 0x8000ba4f <- 0x8787330a -mem-write: 0x8000ba53 <- 0x7470300 -mem-write: 0x8000ba57 <- 0x812f8300 -mem-write: 0x8000ba5b <- 0xc126030a -mem-write: 0x8000ba5f <- 0x7128230a -mem-write: 0x8000ba63 <- 0xeb802305 -mem-write: 0x8000ba67 <- 0x81222300 -mem-write: 0x8000ba6b <- 0xf0079305 -mem-write: 0x8000ba6f <- 0x1b8b93ff -mem-write: 0x8000ba73 <- 0xb0d1300 -mem-write: 0x8000ba77 <- 0x98d9300 -mem-write: 0x8000ba7b <- 0xf849300 -mem-write: 0x8000ba7f <- 0x60a1300 -mem-write: 0x8000ba83 <- 0xfc10e300 -mem-write: 0x8000ba87 <- 0x12883ee -mem-write: 0x8000ba8b <- 0xb039307 -mem-write: 0x8000ba8f <- 0x9829300 -mem-write: 0x8000ba93 <- 0xfe093700 -mem-write: 0x8000ba97 <- 0xc85933f -mem-write: 0x8000ba9b <- 0xa851300 -mem-write: 0x8000ba9f <- 0x11202300 -mem-write: 0x8000baa3 <- 0x812e2303 -mem-write: 0x8000baa7 <- 0xc12a0300 -mem-write: 0x8000baab <- 0x41248305 -mem-write: 0x8000baaf <- 0x1240306 -mem-write: 0x8000bab3 <- 0x71282306 -mem-write: 0x8000bab7 <- 0x7122230a -mem-write: 0x8000babb <- 0x512a2306 -mem-write: 0x8000babf <- 0x5120230a -mem-write: 0x8000bac3 <- 0xf12c2306 -mem-write: 0x8000bac7 <- 0xf12e230b -mem-write: 0x8000bacb <- 0xc12e2305 -mem-write: 0x8000bacf <- 0xc120230a -mem-write: 0x8000bad3 <- 0x1202304 -mem-write: 0x8000bad7 <- 0x122230a -mem-write: 0x8000badb <- 0x124230a -mem-write: 0x8000badf <- 0x2126230a -mem-write: 0x8000bae3 <- 0x9050ef0b -mem-write: 0x8000bae7 <- 0xc12d836b -mem-write: 0x8000baeb <- 0x412d0306 -mem-write: 0x8000baef <- 0x812c0307 -mem-write: 0x8000baf3 <- 0xc12b0307 -mem-write: 0x8000baf7 <- 0x81298307 -mem-write: 0x8000bafb <- 0x1288306 -mem-write: 0x8000baff <- 0xa0406302 -mem-write: 0x8000bb03 <- 0x4123830a -mem-write: 0x8000bb07 <- 0x1228306 -mem-write: 0x8000bb0b <- 0xc12f8306 -mem-write: 0x8000bb0f <- 0x1260305 -mem-write: 0x8000bb13 <- 0xc859304 -mem-write: 0x8000bb17 <- 0xa851300 -mem-write: 0x8000bb1b <- 0x71282300 -mem-write: 0x8000bb1f <- 0x512a230a -mem-write: 0x8000bb23 <- 0xf12c230a -mem-write: 0x8000bb27 <- 0xc12e230b -mem-write: 0x8000bb2b <- 0x120230a -mem-write: 0x8000bb2f <- 0x122230a -mem-write: 0x8000bb33 <- 0x124230a -mem-write: 0x8000bb37 <- 0x2126230a -mem-write: 0x8000bb3b <- 0x5050ef0b -mem-write: 0x8000bb3f <- 0x1288359 -mem-write: 0x8000bb43 <- 0x5186302 -mem-write: 0x8000bb47 <- 0xc1278300 -mem-write: 0x8000bb4b <- 0x17fc9301 -mem-write: 0x8000bb4f <- 0xc986300 -mem-write: 0x8000bb53 <- 0x41278304 -mem-write: 0x8000bb57 <- 0x61304 -mem-write: 0x8000bb5b <- 0x17869303 -mem-write: 0x8000bb5f <- 0xdb86b300 -mem-write: 0x8000bb63 <- 0x7c86300 -mem-write: 0x8000bb67 <- 0x1b8b9300 -mem-write: 0x8000bb6b <- 0xcb8fa300 -mem-write: 0x8000bb6f <- 0xdb9ce3fe -mem-write: 0x8000bb73 <- 0x6b87b3fe -mem-write: 0x8000bb77 <- 0xf1202341 -mem-write: 0x8000bb7b <- 0xfe06f02 -mem-write: 0x8000bb7f <- 0x41242385 -mem-write: 0x8000bb83 <- 0x1282303 -mem-write: 0x8000bb87 <- 0x90a1300 -mem-write: 0x8000bb8b <- 0x7b700 -mem-write: 0x8000bb8f <- 0x67c33380 -mem-write: 0x8000bb93 <- 0xd0079300 -mem-write: 0x8000bb97 <- 0xf12c2302 -mem-write: 0x8000bb9b <- 0x1ff06f04 -mem-write: 0x8000bb9f <- 0x12783c7 -mem-write: 0x8000bba3 <- 0xb869305 -mem-write: 0x8000bba7 <- 0xf12e2300 -mem-write: 0x8000bbab <- 0x4127830c -mem-write: 0x8000bbaf <- 0xfbc60302 -mem-write: 0x8000bbb3 <- 0xf7c583ff -mem-write: 0x8000bbb7 <- 0xb6106300 -mem-write: 0x8000bbbb <- 0x51302 -mem-write: 0x8000bbbf <- 0xa68fa303 -mem-write: 0x8000bbc3 <- 0xc12683fe -mem-write: 0x8000bbc7 <- 0xf687930d -mem-write: 0x8000bbcb <- 0xf12e23ff -mem-write: 0x8000bbcf <- 0xf6c6030c -mem-write: 0x8000bbd3 <- 0xc586e3ff -mem-write: 0x8000bbd7 <- 0x160593fe -mem-write: 0x8000bbdb <- 0x90051300 -mem-write: 0x8000bbdf <- 0xf5f59303 -mem-write: 0x8000bbe3 <- 0xa606630f -mem-write: 0x8000bbe7 <- 0xb68fa300 -mem-write: 0x8000bbeb <- 0x9ff06ffe -mem-write: 0x8000bbef <- 0x412783f8 -mem-write: 0x8000bbf3 <- 0xa7c58302 -mem-write: 0x8000bbf7 <- 0xb68fa300 -VXDRV: upload 1023 bytes to 0x8000bbfb -mem-write: 0x8000bbfb <- 0x9ff06ffe -mem-write: 0x8000bbff <- 0x1d8593f7 -mem-write: 0x8000bc03 <- 0xd051300 -mem-write: 0x8000bc07 <- 0x11282300 -mem-write: 0x8000bc0b <- 0xdfb0ef01 -mem-write: 0x8000bc0f <- 0x12883b2 -mem-write: 0x8000bc13 <- 0x50b1301 -mem-write: 0x8000bc17 <- 0x5086300 -mem-write: 0x8000bc1b <- 0xa128233e -mem-write: 0x8000bc1f <- 0x9ff06f00 -mem-write: 0x8000bc23 <- 0x793bc -mem-write: 0x8000bc27 <- 0xf1042303 -mem-write: 0x8000bc2b <- 0x8007930c -mem-write: 0x8000bc2f <- 0xdff06f07 -mem-write: 0x8000bc33 <- 0x700793b9 -mem-write: 0x8000bc37 <- 0xbb093304 -mem-write: 0x8000bc3b <- 0xf12a2301 -mem-write: 0x8000bc3f <- 0x10c9304 -mem-write: 0x8000bc43 <- 0x5fd06f0a -mem-write: 0x8000bc47 <- 0x812703f2 -mem-write: 0x8000bc4b <- 0x9787b300 -mem-write: 0x8000bc4f <- 0x16869300 -mem-write: 0x8000bc53 <- 0xe8a02300 -mem-write: 0x8000bc57 <- 0x98a22300 -mem-write: 0x8000bc5b <- 0xf1262300 -mem-write: 0x8000bc5f <- 0xd124230e -mem-write: 0x8000bc63 <- 0x7006130e -mem-write: 0x8000bc67 <- 0xd6586300 -mem-write: 0x8000bc6b <- 0x410613b6 -mem-write: 0x8000bc6f <- 0xc05930e -mem-write: 0x8000bc73 <- 0xd051300 -mem-write: 0x8000bc77 <- 0x5020ef00 -mem-write: 0x8000bc7b <- 0x504636e -mem-write: 0x8000bc7f <- 0x1fe06f00 -mem-write: 0x8000bc83 <- 0xc127839c -mem-write: 0x8000bc87 <- 0x8126830e -mem-write: 0x8000bc8b <- 0xc108930e -mem-write: 0x8000bc8f <- 0xcff06f10 -mem-write: 0x8000bc93 <- 0xa0b93b4 -mem-write: 0x8000bc97 <- 0xcfe06f00 -mem-write: 0x8000bc9b <- 0xd9463df -mem-write: 0x8000bc9f <- 0x100d9300 -mem-write: 0x8000bca3 <- 0xc1230300 -mem-write: 0x8000bca7 <- 0x12e030f -mem-write: 0x8000bcab <- 0x412e830f -mem-write: 0x8000bcaf <- 0x812f030f -mem-write: 0x8000bcb3 <- 0xa69130f -mem-write: 0x8000bcb7 <- 0x344e310 -mem-write: 0x8000bcbb <- 0x10a93ec -mem-write: 0x8000bcbf <- 0xc108130b -mem-write: 0x8000bcc3 <- 0x107930d -mem-write: 0x8000bcc7 <- 0xc107130d -mem-write: 0x8000bccb <- 0xd86930c -mem-write: 0x8000bccf <- 0x20061300 -mem-write: 0x8000bcd3 <- 0xa859300 -mem-write: 0x8000bcd7 <- 0xd051300 -mem-write: 0x8000bcdb <- 0x11222300 -mem-write: 0x8000bcdf <- 0xc1282305 -mem-write: 0x8000bce3 <- 0xc120230b -mem-write: 0x8000bce7 <- 0xd12a2305 -mem-write: 0x8000bceb <- 0xd122230b -mem-write: 0x8000bcef <- 0xe12c2303 -mem-write: 0x8000bcf3 <- 0xe120230b -mem-write: 0x8000bcf7 <- 0x612e2303 -mem-write: 0x8000bcfb <- 0x612e230a -mem-write: 0x8000bcff <- 0x4fa0ef00 -mem-write: 0x8000bd03 <- 0xc12303d3 -mem-write: 0x8000bd07 <- 0x41242301 -mem-write: 0x8000bd0b <- 0x12f0303 -mem-write: 0x8000bd0f <- 0x412e8302 -mem-write: 0x8000bd13 <- 0x12e0302 -mem-write: 0x8000bd17 <- 0x41288304 -mem-write: 0x8000bd1b <- 0x50b1304 -mem-write: 0x8000bd1f <- 0x90a1300 -mem-write: 0x8000bd23 <- 0x1282300 -mem-write: 0x8000bd27 <- 0x12c2300 -mem-write: 0x8000bd2b <- 0x1ff06f04 -mem-write: 0x8000bd2f <- 0xf0079397 -mem-write: 0x8000bd33 <- 0xf12623ff -mem-write: 0x8000bd37 <- 0x5fd06f00 -mem-write: 0x8000bd3b <- 0x610693c0 -mem-write: 0x8000bd3f <- 0x618630d -mem-write: 0x8000bd43 <- 0x69300 -mem-write: 0x8000bd47 <- 0xd10b2303 -mem-write: 0x8000bd4b <- 0x7106930c -mem-write: 0x8000bd4f <- 0x107130d -mem-write: 0x8000bd53 <- 0x787931b -mem-write: 0x8000bd57 <- 0xe6863303 -mem-write: 0x8000bd5b <- 0xf6802340 -mem-write: 0x8000bd5f <- 0xd6079300 -mem-write: 0x8000bd63 <- 0xf12c230d -mem-write: 0x8000bd67 <- 0x5fd06f02 -mem-write: 0x8000bd6b <- 0x10a93f6 -mem-write: 0x8000bd6f <- 0xa85130b -mem-write: 0x8000bd73 <- 0x11282300 -mem-write: 0x8000bd77 <- 0xc1282305 -mem-write: 0x8000bd7b <- 0xd12a230b -mem-write: 0x8000bd7f <- 0xe12c230b -mem-write: 0x8000bd83 <- 0x612e230b -mem-write: 0x8000bd87 <- 0x9080ef0a -mem-write: 0x8000bd8b <- 0xc1061301 -mem-write: 0x8000bd8f <- 0x8fd0ef0c -mem-write: 0x8000bd93 <- 0x58613b6 -mem-write: 0x8000bd97 <- 0x5059300 -mem-write: 0x8000bd9b <- 0xa851300 -mem-write: 0x8000bd9f <- 0xc080ef00 -mem-write: 0x8000bda3 <- 0x1278360 -mem-write: 0x8000bda7 <- 0x10c930b -mem-write: 0x8000bdab <- 0x109130a -mem-write: 0x8000bdaf <- 0xf1282309 -mem-write: 0x8000bdb3 <- 0x41278308 -mem-write: 0x8000bdb7 <- 0x106130b -mem-write: 0x8000bdbb <- 0x9059308 -mem-write: 0x8000bdbf <- 0xf12a2300 -mem-write: 0x8000bdc3 <- 0x81278308 -mem-write: 0x8000bdc7 <- 0xc85130b -mem-write: 0x8000bdcb <- 0xc1202300 -mem-write: 0x8000bdcf <- 0xf12c2304 -mem-write: 0x8000bdd3 <- 0xc1278308 -mem-write: 0x8000bdd7 <- 0x120230b -mem-write: 0x8000bddb <- 0x1222308 -mem-write: 0x8000bddf <- 0xf12e2308 -mem-write: 0x8000bde3 <- 0xfc07b708 -mem-write: 0x8000bde7 <- 0xf126233f -mem-write: 0x8000bdeb <- 0x1242308 -mem-write: 0x8000bdef <- 0x5050ef08 -mem-write: 0x8000bdf3 <- 0x1280363 -mem-write: 0x8000bdf7 <- 0x412e030a -mem-write: 0x8000bdfb <- 0x812e830a -mem-write: 0x8000bdff <- 0xc12f030a -mem-write: 0x8000be03 <- 0xc85930a -mem-write: 0x8000be07 <- 0xa851300 -mem-write: 0x8000be0b <- 0x1282300 -mem-write: 0x8000be0f <- 0x122230b -mem-write: 0x8000be13 <- 0xc12a2305 -mem-write: 0x8000be17 <- 0xc122230b -mem-write: 0x8000be1b <- 0xd12c2303 -mem-write: 0x8000be1f <- 0xd120230b -mem-write: 0x8000be23 <- 0xe12e2303 -mem-write: 0x8000be27 <- 0xe12e230b -mem-write: 0x8000be2b <- 0x1202301 -mem-write: 0x8000be2f <- 0x122230a -mem-write: 0x8000be33 <- 0x124230a -mem-write: 0x8000be37 <- 0x126230a -mem-write: 0x8000be3b <- 0x5050ef0a -mem-write: 0x8000be3f <- 0xc12f0329 -mem-write: 0x8000be43 <- 0x12e8301 -mem-write: 0x8000be47 <- 0x412e0302 -mem-write: 0x8000be4b <- 0x41280302 -mem-write: 0x8000be4f <- 0x1288304 -mem-write: 0x8000be53 <- 0x5166305 -mem-write: 0x8000be57 <- 0x10079300 -mem-write: 0x8000be5b <- 0xf1262300 -mem-write: 0x8000be5f <- 0x157b70c -mem-write: 0x8000be63 <- 0xc7879380 -mem-write: 0x8000be67 <- 0xf12223a3 -mem-write: 0x8000be6b <- 0x5ff06f02 -mem-write: 0x8000be6f <- 0x12823ab -mem-write: 0x8000be73 <- 0x78a1300 -mem-write: 0x8000be77 <- 0x5ff06f00 -mem-write: 0x8000be7b <- 0x700493d1 -mem-write: 0x8000be7f <- 0xc1260306 -mem-write: 0x8000be83 <- 0xf0069303 -mem-write: 0x8000be87 <- 0x647830f -mem-write: 0x8000be8b <- 0xd7886300 -mem-write: 0x8000be8f <- 0xc1270318 -mem-write: 0x8000be93 <- 0x51301 -mem-write: 0x8000be97 <- 0x59300 -mem-write: 0x8000be9b <- 0xe7de6300 -mem-write: 0x8000be9f <- 0xf7073300 -mem-write: 0x8000bea3 <- 0x16478340 -mem-write: 0x8000bea7 <- 0x7846300 -mem-write: 0x8000beab <- 0x15859304 -mem-write: 0x8000beaf <- 0x16061300 -mem-write: 0x8000beb3 <- 0xd794e300 -mem-write: 0x8000beb7 <- 0xc12e23fe -mem-write: 0x8000bebb <- 0xe12e2302 -mem-write: 0x8000bebf <- 0xb1222300 -mem-write: 0x8000bec3 <- 0xa1242302 -mem-write: 0x8000bec7 <- 0x81270302 -mem-write: 0x8000becb <- 0x41278302 -mem-write: 0x8000becf <- 0xe787b302 -mem-write: 0x8000bed3 <- 0x81270300 -mem-write: 0x8000bed7 <- 0xe787b304 -mem-write: 0x8000bedb <- 0x978cb302 -mem-write: 0x8000bedf <- 0xfcca9301 -mem-write: 0x8000bee3 <- 0xfada93ff -mem-write: 0x8000bee7 <- 0x5cfab341 -mem-write: 0x8000beeb <- 0x5fd06f01 -mem-write: 0x8000beef <- 0x64783e2 -mem-write: 0x8000bef3 <- 0x15051300 -mem-write: 0x8000bef7 <- 0xdff06f00 -mem-write: 0x8000befb <- 0xc12783fb -mem-write: 0x8000beff <- 0x60049302 -mem-write: 0x8000bf03 <- 0xf70cb306 -mem-write: 0x8000bf07 <- 0xbc8cb300 -mem-write: 0x8000bf0b <- 0x1ff06f01 -mem-write: 0x8000bf0f <- 0x81278385 -mem-write: 0x8000bf13 <- 0x17f79302 -mem-write: 0x8000bf17 <- 0x7946300 -mem-write: 0x8000bf1b <- 0x1fd06f00 -mem-write: 0x8000bf1f <- 0x5fd06fdd -mem-write: 0x8000bf23 <- 0x10c93dc -mem-write: 0x8000bf27 <- 0xc85930a -mem-write: 0x8000bf2b <- 0xa851300 -mem-write: 0x8000bf2f <- 0x11222300 -mem-write: 0x8000bf33 <- 0xc1282305 -mem-write: 0x8000bf37 <- 0xc120230b -mem-write: 0x8000bf3b <- 0xd12a2305 -mem-write: 0x8000bf3f <- 0xd122230b -mem-write: 0x8000bf43 <- 0xe12c2303 -mem-write: 0x8000bf47 <- 0xe120230b -mem-write: 0x8000bf4b <- 0x612e2303 -mem-write: 0x8000bf4f <- 0x612e230a -mem-write: 0x8000bf53 <- 0x1202300 -mem-write: 0x8000bf57 <- 0x122230a -mem-write: 0x8000bf5b <- 0x124230a -mem-write: 0x8000bf5f <- 0x126230a -mem-write: 0x8000bf63 <- 0xd050ef0a -mem-write: 0x8000bf67 <- 0xc1230316 -mem-write: 0x8000bf6b <- 0x12f0301 -mem-write: 0x8000bf6f <- 0x412e8302 -mem-write: 0x8000bf73 <- 0x12e0302 -mem-write: 0x8000bf77 <- 0x41288304 -mem-write: 0x8000bf7b <- 0x5026304 -mem-write: 0x8000bf7f <- 0x100793ea -mem-write: 0x8000bf83 <- 0xb787b300 -mem-write: 0x8000bf87 <- 0xf1262341 -mem-write: 0x8000bf8b <- 0xf909330c -mem-write: 0x8000bf8f <- 0x9fd06f00 -mem-write: 0x8000bf93 <- 0x79a63bd -mem-write: 0x8000bf97 <- 0x100a9300 -mem-write: 0x8000bf9b <- 0x60049300 -mem-write: 0x8000bf9f <- 0x100c9306 -mem-write: 0x8000bfa3 <- 0x8ff06f00 -mem-write: 0x8000bfa7 <- 0xc12783db -mem-write: 0x8000bfab <- 0x60049302 -mem-write: 0x8000bfaf <- 0x178c9306 -mem-write: 0x8000bfb3 <- 0xbc8cb300 -mem-write: 0x8000bfb7 <- 0xfcca9301 -mem-write: 0x8000bfbb <- 0xfada93ff -mem-write: 0x8000bfbf <- 0x5cfab341 -mem-write: 0x8000bfc3 <- 0x8ff06f01 -mem-write: 0x8000bfc7 <- 0x88713d9 -mem-write: 0x8000bfcb <- 0xcff06f00 -mem-write: 0x8000bfcf <- 0x412783a7 -mem-write: 0x8000bfd3 <- 0x7ad8301 -mem-write: 0x8000bfd7 <- 0x47879300 -mem-write: 0x8000bfdb <- 0xdd46300 -mem-write: 0x8000bfdf <- 0xf00d9300 -mem-write: 0x8000bfe3 <- 0x144483ff -mem-write: 0x8000bfe7 <- 0xf12a2300 -mem-write: 0x8000bfeb <- 0x7041300 -mem-write: 0x8000bfef <- 0x4fd06f00 -mem-write: 0x8000bff3 <- 0xc00793f9 -mem-write: 0x8000bff7 <- 0xb6202300 -VXDRV: upload 1024 bytes to 0x8000bffa -mem-write: 0x8000bffa <- 0x79300fd -mem-write: 0x8000bffe <- 0x2623fff0 -mem-write: 0x8000c002 <- 0xd06f00f1 -mem-write: 0x8000c006 <- 0x5703939f -mem-write: 0x8000c00a <- 0x679300cc -mem-write: 0x8000c00e <- 0x87130407 -mem-write: 0x8000c012 <- 0x16230007 -mem-write: 0x8000c016 <- 0xd06f00fc -mem-write: 0x8000c01a <- 0x2423919f -mem-write: 0x8000c01e <- 0x22230201 -mem-write: 0x8000c022 <- 0xf06f0201 -mem-write: 0x8000c026 <- 0x793ea5f -mem-write: 0x8000c02a <- 0x2c230020 -mem-write: 0x8000c02e <- 0xd06f02f1 -mem-write: 0x8000c032 <- 0xa783c9df -mem-write: 0x8000c036 <- 0x1130645 -mem-write: 0x8000c03a <- 0x2823fd01 -mem-write: 0x8000c03e <- 0x26230161 -mem-write: 0x8000c042 <- 0x24230211 -mem-write: 0x8000c046 <- 0x22230281 -mem-write: 0x8000c04a <- 0x20230291 -mem-write: 0x8000c04e <- 0x2e230321 -mem-write: 0x8000c052 <- 0x2c230131 -mem-write: 0x8000c056 <- 0x2a230141 -mem-write: 0x8000c05a <- 0x26230151 -mem-write: 0x8000c05e <- 0x24230171 -mem-write: 0x8000c062 <- 0x97130181 -mem-write: 0x8000c066 <- 0xb130127 -mem-write: 0x8000c06a <- 0x58630006 -mem-write: 0x8000c06e <- 0x27830a07 -mem-write: 0x8000c072 <- 0x2b830086 -mem-write: 0x8000c076 <- 0x89130006 -mem-write: 0x8000c07a <- 0x9930005 -mem-write: 0x8000c07e <- 0xa930005 -mem-write: 0x8000c082 <- 0x8863fff0 -mem-write: 0x8000c086 <- 0xac030807 -mem-write: 0x8000c08a <- 0xa403004b -mem-write: 0x8000c08e <- 0x5a13000b -mem-write: 0x8000c092 <- 0x663002c -mem-write: 0x8000c096 <- 0x493060a -mem-write: 0x8000c09a <- 0x6f0000 -mem-write: 0x8000c09e <- 0x41300c0 -mem-write: 0x8000c0a2 <- 0xc630044 -mem-write: 0x8000c0a6 <- 0x2583049a -mem-write: 0x8000c0aa <- 0x6130004 -mem-write: 0x8000c0ae <- 0x85130009 -mem-write: 0x8000c0b2 <- 0x10ef0009 -mem-write: 0x8000c0b6 <- 0x849304d0 -mem-write: 0x8000c0ba <- 0x12e30014 -mem-write: 0x8000c0be <- 0x513ff55 -mem-write: 0x8000c0c2 <- 0x2083fff0 -mem-write: 0x8000c0c6 <- 0x240302c1 -mem-write: 0x8000c0ca <- 0x24230281 -mem-write: 0x8000c0ce <- 0x2223000b -mem-write: 0x8000c0d2 <- 0x2483000b -mem-write: 0x8000c0d6 <- 0x29030241 -mem-write: 0x8000c0da <- 0x29830201 -mem-write: 0x8000c0de <- 0x2a0301c1 -mem-write: 0x8000c0e2 <- 0x2a830181 -mem-write: 0x8000c0e6 <- 0x2b030141 -mem-write: 0x8000c0ea <- 0x2b830101 -mem-write: 0x8000c0ee <- 0x2c0300c1 -mem-write: 0x8000c0f2 <- 0x1130081 -mem-write: 0x8000c0f6 <- 0x80670301 -mem-write: 0x8000c0fa <- 0x27830000 -mem-write: 0x8000c0fe <- 0x7c13008b -mem-write: 0x8000c102 <- 0x87b3ffcc -mem-write: 0x8000c106 <- 0x24234187 -mem-write: 0x8000c10a <- 0x8b9300fb -mem-write: 0x8000c10e <- 0x9ce3008b -mem-write: 0x8000c112 <- 0x513f607 -mem-write: 0x8000c116 <- 0xf06f0000 -mem-write: 0x8000c11a <- 0x10effadf -mem-write: 0x8000c11e <- 0xf06f0f10 -mem-write: 0x8000c122 <- 0x2703fa5f -mem-write: 0x8000c126 <- 0x4630086 -mem-write: 0x8000c12a <- 0xf06f0007 -mem-write: 0x8000c12e <- 0x2223f09f -mem-write: 0x8000c132 <- 0x5130006 -mem-write: 0x8000c136 <- 0x80670000 -mem-write: 0x8000c13a <- 0x1130000 -mem-write: 0x8000c13e <- 0x2e23ed01 -mem-write: 0x8000c142 <- 0x2c231131 -mem-write: 0x8000c146 <- 0x26231141 -mem-write: 0x8000c14a <- 0x26231171 -mem-write: 0x8000c14e <- 0x24231211 -mem-write: 0x8000c152 <- 0x22231281 -mem-write: 0x8000c156 <- 0x20231291 -mem-write: 0x8000c15a <- 0x2a231321 -mem-write: 0x8000c15e <- 0x28231151 -mem-write: 0x8000c162 <- 0x24231161 -mem-write: 0x8000c166 <- 0x22231181 -mem-write: 0x8000c16a <- 0x20231191 -mem-write: 0x8000c16e <- 0x2e2311a1 -mem-write: 0x8000c172 <- 0x28230fb1 -mem-write: 0x8000c176 <- 0xa1300d1 -mem-write: 0x8000c17a <- 0x89930005 -mem-write: 0x8000c17e <- 0xb930005 -mem-write: 0x8000c182 <- 0x6630006 -mem-write: 0x8000c186 <- 0x27830005 -mem-write: 0x8000c18a <- 0x8e630385 -mem-write: 0x8000c18e <- 0x97035e07 -mem-write: 0x8000c192 <- 0x179300c9 -mem-write: 0x8000c196 <- 0x16930107 -mem-write: 0x8000c19a <- 0xd7930127 -mem-write: 0x8000c19e <- 0xca630107 -mem-write: 0x8000c1a2 <- 0x27b70206 -mem-write: 0x8000c1a6 <- 0xa6830000 -mem-write: 0x8000c1aa <- 0x67b30649 -mem-write: 0x8000c1ae <- 0x979300f7 -mem-write: 0x8000c1b2 <- 0xe7370107 -mem-write: 0x8000c1b6 <- 0xd793ffff -mem-write: 0x8000c1ba <- 0x7134107 -mem-write: 0x8000c1be <- 0xf733fff7 -mem-write: 0x8000c1c2 <- 0x962300e6 -mem-write: 0x8000c1c6 <- 0x979300f9 -mem-write: 0x8000c1ca <- 0xa2230107 -mem-write: 0x8000c1ce <- 0xd79306e9 -mem-write: 0x8000c1d2 <- 0xf7130107 -mem-write: 0x8000c1d6 <- 0x630087 -mem-write: 0x8000c1da <- 0xa7034007 -mem-write: 0x8000c1de <- 0xc630109 -mem-write: 0x8000c1e2 <- 0xf7933e07 -mem-write: 0x8000c1e6 <- 0x71301a7 -mem-write: 0x8000c1ea <- 0x866300a0 -mem-write: 0x8000c1ee <- 0x57b740e7 -mem-write: 0x8000c1f2 <- 0x87938001 -mem-write: 0x8000c1f6 <- 0x5b371947 -mem-write: 0x8000c1fa <- 0x4938001 -mem-write: 0x8000c1fe <- 0x2a2304c1 -mem-write: 0x8000c202 <- 0x593700f1 -mem-write: 0x8000c206 <- 0x7938001 -mem-write: 0x8000c20a <- 0x8c13300b -mem-write: 0x8000c20e <- 0x2023000b -mem-write: 0x8000c212 <- 0x24230491 -mem-write: 0x8000c216 <- 0x22230401 -mem-write: 0x8000c21a <- 0x2c230401 -mem-write: 0x8000c21e <- 0x2e230001 -mem-write: 0x8000c222 <- 0x22230001 -mem-write: 0x8000c226 <- 0x20230201 -mem-write: 0x8000c22a <- 0x26230201 -mem-write: 0x8000c22e <- 0x24230001 -mem-write: 0x8000c232 <- 0x91300f1 -mem-write: 0x8000c236 <- 0x8b933109 -mem-write: 0x8000c23a <- 0x47830004 -mem-write: 0x8000c23e <- 0x8863000c -mem-write: 0x8000c242 <- 0x4132607 -mem-write: 0x8000c246 <- 0x713000c -mem-write: 0x8000c24a <- 0x8e630250 -mem-write: 0x8000c24e <- 0x478342e7 -mem-write: 0x8000c252 <- 0x4130014 -mem-write: 0x8000c256 <- 0x9ae30014 -mem-write: 0x8000c25a <- 0xcb3fe07 -mem-write: 0x8000c25e <- 0x8634184 -mem-write: 0x8000c262 <- 0x27032584 -mem-write: 0x8000c266 <- 0x27830481 -mem-write: 0x8000c26a <- 0xa0230441 -mem-write: 0x8000c26e <- 0x8733018b -mem-write: 0x8000c272 <- 0x879300ec -mem-write: 0x8000c276 <- 0xa2230017 -mem-write: 0x8000c27a <- 0x2423019b -mem-write: 0x8000c27e <- 0x222304e1 -mem-write: 0x8000c282 <- 0x69304f1 -mem-write: 0x8000c286 <- 0x8b930070 -mem-write: 0x8000c28a <- 0xd063008b -mem-write: 0x8000c28e <- 0xae302f6 -mem-write: 0x8000c292 <- 0x6133a07 -mem-write: 0x8000c296 <- 0x85930401 -mem-write: 0x8000c29a <- 0x5130009 -mem-write: 0x8000c29e <- 0xf0ef000a -mem-write: 0x8000c2a2 <- 0x1a63d95f -mem-write: 0x8000c2a6 <- 0x8b932005 -mem-write: 0x8000c2aa <- 0x27030004 -mem-write: 0x8000c2ae <- 0x478300c1 -mem-write: 0x8000c2b2 <- 0x7330004 -mem-write: 0x8000c2b6 <- 0x26230197 -mem-write: 0x8000c2ba <- 0x8a6300e1 -mem-write: 0x8000c2be <- 0x47031e07 -mem-write: 0x8000c2c2 <- 0xc130014 -mem-write: 0x8000c2c6 <- 0xda30014 -mem-write: 0x8000c2ca <- 0xa930201 -mem-write: 0x8000c2ce <- 0x2223fff0 -mem-write: 0x8000c2d2 <- 0xb130001 -mem-write: 0x8000c2d6 <- 0xc930000 -mem-write: 0x8000c2da <- 0xd1305a0 -mem-write: 0x8000c2de <- 0x6130090 -mem-write: 0x8000c2e2 <- 0xc1302a0 -mem-write: 0x8000c2e6 <- 0x793001c -mem-write: 0x8000c2ea <- 0xe863fe07 -mem-write: 0x8000c2ee <- 0x268304fc -mem-write: 0x8000c2f2 <- 0x97930141 -mem-write: 0x8000c2f6 <- 0x87b30027 -mem-write: 0x8000c2fa <- 0xa78300d7 -mem-write: 0x8000c2fe <- 0x80670007 -mem-write: 0x8000c302 <- 0x22230007 -mem-write: 0x8000c306 <- 0x7930001 -mem-write: 0x8000c30a <- 0x2583fd07 -mem-write: 0x8000c30e <- 0x47030041 -mem-write: 0x8000c312 <- 0xc13000c -mem-write: 0x8000c316 <- 0x9693001c -mem-write: 0x8000c31a <- 0x86b30025 -mem-write: 0x8000c31e <- 0x969300b6 -mem-write: 0x8000c322 <- 0x87b30016 -mem-write: 0x8000c326 <- 0x222300d7 -mem-write: 0x8000c32a <- 0x79300f1 -mem-write: 0x8000c32e <- 0x7ee3fd07 -mem-write: 0x8000c332 <- 0x793fcfd -mem-write: 0x8000c336 <- 0xfce3fe07 -mem-write: 0x8000c33a <- 0xa63fafc -mem-write: 0x8000c33e <- 0x6231607 -mem-write: 0x8000c342 <- 0xda308e1 -mem-write: 0x8000c346 <- 0xc930201 -mem-write: 0x8000c34a <- 0xd130010 -mem-write: 0x8000c34e <- 0x4130010 -mem-write: 0x8000c352 <- 0xa9308c1 -mem-write: 0x8000c356 <- 0x7f930000 -mem-write: 0x8000c35a <- 0x8463002b -mem-write: 0x8000c35e <- 0x8c93000f -mem-write: 0x8000c362 <- 0x2703002c -mem-write: 0x8000c366 <- 0x7f130441 -mem-write: 0x8000c36a <- 0x2783084b -mem-write: 0x8000c36e <- 0x6930481 -mem-write: 0x8000c372 <- 0x86130017 -mem-write: 0x8000c376 <- 0x18630006 -mem-write: 0x8000c37a <- 0x2583000f -mem-write: 0x8000c37e <- 0x8db30041 -mem-write: 0x8000c382 <- 0x42e34195 -mem-write: 0x8000c386 <- 0x458309b0 -mem-write: 0x8000c38a <- 0x869303b1 -mem-write: 0x8000c38e <- 0x8c63008b -mem-write: 0x8000c392 <- 0x7130205 -mem-write: 0x8000c396 <- 0x879303b1 -mem-write: 0x8000c39a <- 0xa0230017 -mem-write: 0x8000c39e <- 0x71300eb -mem-write: 0x8000c3a2 <- 0xa2230010 -mem-write: 0x8000c3a6 <- 0x242300eb -mem-write: 0x8000c3aa <- 0x222304f1 -mem-write: 0x8000c3ae <- 0x71304c1 -mem-write: 0x8000c3b2 <- 0x40630070 -mem-write: 0x8000c3b6 <- 0x7137ec7 -mem-write: 0x8000c3ba <- 0x8b930006 -mem-write: 0x8000c3be <- 0x6130006 -mem-write: 0x8000c3c2 <- 0x86930016 -mem-write: 0x8000c3c6 <- 0x8e630086 -mem-write: 0x8000c3ca <- 0x713040f -mem-write: 0x8000c3ce <- 0x879303c1 -mem-write: 0x8000c3d2 <- 0xa0230027 -mem-write: 0x8000c3d6 <- 0x71300eb -mem-write: 0x8000c3da <- 0xa2230020 -mem-write: 0x8000c3de <- 0x242300eb -mem-write: 0x8000c3e2 <- 0x222304f1 -mem-write: 0x8000c3e6 <- 0x71304c1 -mem-write: 0x8000c3ea <- 0x50e30070 -mem-write: 0x8000c3ee <- 0x84e300c7 -mem-write: 0x8000c3f2 <- 0x6132a07 -mem-write: 0x8000c3f6 <- 0x85930401 -VXDRV: upload 1024 bytes to 0x8000c3fa -mem-write: 0x8000c3fa <- 0x5130009 -mem-write: 0x8000c3fe <- 0x2423000a -mem-write: 0x8000c402 <- 0xf0ef03e1 -mem-write: 0x8000c406 <- 0x1863c31f -mem-write: 0x8000c40a <- 0x27030a05 -mem-write: 0x8000c40e <- 0x27830441 -mem-write: 0x8000c412 <- 0x2f030481 -mem-write: 0x8000c416 <- 0x6930281 -mem-write: 0x8000c41a <- 0x6130541 -mem-write: 0x8000c41e <- 0x8b930017 -mem-write: 0x8000c422 <- 0x5930004 -mem-write: 0x8000c426 <- 0x6630800 -mem-write: 0x8000c42a <- 0x8ab35abf -mem-write: 0x8000c42e <- 0x426341aa -mem-write: 0x8000c432 <- 0x7b36950 -mem-write: 0x8000c436 <- 0xa02300fd -mem-write: 0x8000c43a <- 0xa223008b -mem-write: 0x8000c43e <- 0x242301ab -mem-write: 0x8000c442 <- 0x222304f1 -mem-write: 0x8000c446 <- 0x71304c1 -mem-write: 0x8000c44a <- 0x52630070 -mem-write: 0x8000c44e <- 0x8ee302c7 -mem-write: 0x8000c452 <- 0x6130a07 -mem-write: 0x8000c456 <- 0x85930401 -mem-write: 0x8000c45a <- 0x5130009 -mem-write: 0x8000c45e <- 0xf0ef000a -mem-write: 0x8000c462 <- 0x1a63bd5f -mem-write: 0x8000c466 <- 0x27830405 -mem-write: 0x8000c46a <- 0x86930481 -mem-write: 0x8000c46e <- 0x73130004 -mem-write: 0x8000c472 <- 0x863004b -mem-write: 0x8000c476 <- 0x27030003 -mem-write: 0x8000c47a <- 0xbb30041 -mem-write: 0x8000c47e <- 0x44e34197 -mem-write: 0x8000c482 <- 0x24030b70 -mem-write: 0x8000c486 <- 0x54630041 -mem-write: 0x8000c48a <- 0x84130194 -mem-write: 0x8000c48e <- 0x2703000c -mem-write: 0x8000c492 <- 0x73300c1 -mem-write: 0x8000c496 <- 0x26230087 -mem-write: 0x8000c49a <- 0x986300e1 -mem-write: 0x8000c49e <- 0x47836c07 -mem-write: 0x8000c4a2 <- 0x2223000c -mem-write: 0x8000c4a6 <- 0x8b930401 -mem-write: 0x8000c4aa <- 0x9ce30004 -mem-write: 0x8000c4ae <- 0x2783d807 -mem-write: 0x8000c4b2 <- 0x9ae30481 -mem-write: 0x8000c4b6 <- 0xd7836407 -mem-write: 0x8000c4ba <- 0xf79300c9 -mem-write: 0x8000c4be <- 0x92e30407 -mem-write: 0x8000c4c2 <- 0x20836807 -mem-write: 0x8000c4c6 <- 0x240312c1 -mem-write: 0x8000c4ca <- 0x25031281 -mem-write: 0x8000c4ce <- 0x248300c1 -mem-write: 0x8000c4d2 <- 0x29031241 -mem-write: 0x8000c4d6 <- 0x29831201 -mem-write: 0x8000c4da <- 0x2a0311c1 -mem-write: 0x8000c4de <- 0x2a831181 -mem-write: 0x8000c4e2 <- 0x2b031141 -mem-write: 0x8000c4e6 <- 0x2b831101 -mem-write: 0x8000c4ea <- 0x2c0310c1 -mem-write: 0x8000c4ee <- 0x2c831081 -mem-write: 0x8000c4f2 <- 0x2d031041 -mem-write: 0x8000c4f6 <- 0x2d831001 -mem-write: 0x8000c4fa <- 0x1130fc1 -mem-write: 0x8000c4fe <- 0x80671301 -mem-write: 0x8000c502 <- 0x5130000 -mem-write: 0x8000c506 <- 0xb0ef000a -mem-write: 0x8000c50a <- 0x2783830f -mem-write: 0x8000c50e <- 0x85130045 -mem-write: 0x8000c512 <- 0x20230007 -mem-write: 0x8000c516 <- 0xc0ef02f1 -mem-write: 0x8000c51a <- 0x793fd5f -mem-write: 0x8000c51e <- 0x5130005 -mem-write: 0x8000c522 <- 0x8413000a -mem-write: 0x8000c526 <- 0x22230007 -mem-write: 0x8000c52a <- 0xb0ef02f1 -mem-write: 0x8000c52e <- 0x278380cf -mem-write: 0x8000c532 <- 0x6130085 -mem-write: 0x8000c536 <- 0x2e2302a0 -mem-write: 0x8000c53a <- 0x18e300f1 -mem-write: 0x8000c53e <- 0x47032a04 -mem-write: 0x8000c542 <- 0xf06f000c -mem-write: 0x8000c546 <- 0x4703da1f -mem-write: 0x8000c54a <- 0x6b13000c -mem-write: 0x8000c54e <- 0xf06f020b -mem-write: 0x8000c552 <- 0x6b13d95f -mem-write: 0x8000c556 <- 0x7793010b -mem-write: 0x8000c55a <- 0x8463020b -mem-write: 0x8000c55e <- 0x27831607 -mem-write: 0x8000c562 <- 0x87930101 -mem-write: 0x8000c566 <- 0xf7930077 -mem-write: 0x8000c56a <- 0xa703ff87 -mem-write: 0x8000c56e <- 0xad030047 -mem-write: 0x8000c572 <- 0x87930007 -mem-write: 0x8000c576 <- 0x28230087 -mem-write: 0x8000c57a <- 0xc9300f1 -mem-write: 0x8000c57e <- 0x4a630007 -mem-write: 0x8000c582 <- 0x7131607 -mem-write: 0x8000c586 <- 0xd93fff0 -mem-write: 0x8000c58a <- 0x8863000b -mem-write: 0x8000c58e <- 0x673300ea -mem-write: 0x8000c592 <- 0x7d93019d -mem-write: 0x8000c596 <- 0xce3f7fb -mem-write: 0x8000c59a <- 0x96e30a07 -mem-write: 0x8000c59e <- 0x713160c -mem-write: 0x8000c5a2 <- 0x62e30090 -mem-write: 0x8000c5a6 <- 0x79317a7 -mem-write: 0x8000c5aa <- 0x7a3030d -mem-write: 0x8000c5ae <- 0x8b130ef1 -mem-write: 0x8000c5b2 <- 0xd13000d -mem-write: 0x8000c5b6 <- 0x4130010 -mem-write: 0x8000c5ba <- 0x8c930ef1 -mem-write: 0x8000c5be <- 0xd463000a -mem-write: 0x8000c5c2 <- 0xc9301aa -mem-write: 0x8000c5c6 <- 0x4783000d -mem-write: 0x8000c5ca <- 0x37b303b1 -mem-write: 0x8000c5ce <- 0x8cb300f0 -mem-write: 0x8000c5d2 <- 0xf06f00fc -mem-write: 0x8000c5d6 <- 0x8593d85f -mem-write: 0x8000c5da <- 0x5130009 -mem-write: 0x8000c5de <- 0x70ef000a -mem-write: 0x8000c5e2 <- 0x10e3d08f -mem-write: 0x8000c5e6 <- 0xd7835605 -mem-write: 0x8000c5ea <- 0x71300c9 -mem-write: 0x8000c5ee <- 0xf79300a0 -mem-write: 0x8000c5f2 <- 0x9ee301a7 -mem-write: 0x8000c5f6 <- 0x9783bee7 -mem-write: 0x8000c5fa <- 0xcae300e9 -mem-write: 0x8000c5fe <- 0x2683be07 -mem-write: 0x8000c602 <- 0x86130101 -mem-write: 0x8000c606 <- 0x8593000b -mem-write: 0x8000c60a <- 0x5130009 -mem-write: 0x8000c60e <- 0xef000a -mem-write: 0x8000c612 <- 0x26235890 -mem-write: 0x8000c616 <- 0xf06f00a1 -mem-write: 0x8000c61a <- 0x6b13eadf -mem-write: 0x8000c61e <- 0x7793010b -mem-write: 0x8000c622 <- 0x8a63020b -mem-write: 0x8000c626 <- 0x27830607 -mem-write: 0x8000c62a <- 0x87930101 -mem-write: 0x8000c62e <- 0xf7930077 -mem-write: 0x8000c632 <- 0xad03ff87 -mem-write: 0x8000c636 <- 0xac830007 -mem-write: 0x8000c63a <- 0x87930047 -mem-write: 0x8000c63e <- 0x28230087 -mem-write: 0x8000c642 <- 0x7d9300f1 -mem-write: 0x8000c646 <- 0x713bffb -mem-write: 0x8000c64a <- 0xda30000 -mem-write: 0x8000c64e <- 0x6930201 -mem-write: 0x8000c652 <- 0x8463fff0 -mem-write: 0x8000c656 <- 0x66b30cda -mem-write: 0x8000c65a <- 0xfb13019d -mem-write: 0x8000c65e <- 0x9063f7fd -mem-write: 0x8000c662 <- 0x9c635a06 -mem-write: 0x8000c666 <- 0x1863300a -mem-write: 0x8000c66a <- 0xfd137e07 -mem-write: 0x8000c66e <- 0x413001d -mem-write: 0x8000c672 <- 0x4e30f01 -mem-write: 0x8000c676 <- 0x793f40d -mem-write: 0x8000c67a <- 0x7a30300 -mem-write: 0x8000c67e <- 0x4130ef1 -mem-write: 0x8000c682 <- 0xf06f0ef1 -mem-write: 0x8000c686 <- 0xcb3f39f -mem-write: 0x8000c68a <- 0x1ce34184 -mem-write: 0x8000c68e <- 0x4783bd84 -mem-write: 0x8000c692 <- 0xf06f0004 -mem-write: 0x8000c696 <- 0x2683c29f -mem-write: 0x8000c69a <- 0x77930101 -mem-write: 0x8000c69e <- 0x8713010b -mem-write: 0x8000c6a2 <- 0x9ce30046 -mem-write: 0x8000c6a6 <- 0x77931607 -mem-write: 0x8000c6aa <- 0x88e3040b -mem-write: 0x8000c6ae <- 0x27833807 -mem-write: 0x8000c6b2 <- 0xc930101 -mem-write: 0x8000c6b6 <- 0x28230000 -mem-write: 0x8000c6ba <- 0xdd0300e1 -mem-write: 0x8000c6be <- 0xf06f0007 -mem-write: 0x8000c6c2 <- 0x2683f85f -mem-write: 0x8000c6c6 <- 0x77930101 -mem-write: 0x8000c6ca <- 0x8713010b -mem-write: 0x8000c6ce <- 0x94e30046 -mem-write: 0x8000c6d2 <- 0x77931007 -mem-write: 0x8000c6d6 <- 0x82e3040b -mem-write: 0x8000c6da <- 0x27833207 -mem-write: 0x8000c6de <- 0x28230101 -mem-write: 0x8000c6e2 <- 0x9d0300e1 -mem-write: 0x8000c6e6 <- 0x5c930007 -mem-write: 0x8000c6ea <- 0x871341fd -mem-write: 0x8000c6ee <- 0x5ae3000c -mem-write: 0x8000c6f2 <- 0x3733e807 -mem-write: 0x8000c6f6 <- 0xeb301a0 -mem-write: 0x8000c6fa <- 0x8cb34190 -mem-write: 0x8000c6fe <- 0x71340ee -mem-write: 0x8000c702 <- 0xda302d0 -mem-write: 0x8000c706 <- 0x69302e1 -mem-write: 0x8000c70a <- 0xd33fff0 -mem-write: 0x8000c70e <- 0xd9341a0 -mem-write: 0x8000c712 <- 0x713000b -mem-write: 0x8000c716 <- 0x90e30010 -mem-write: 0x8000c71a <- 0x693f4da -mem-write: 0x8000c71e <- 0xee30010 -mem-write: 0x8000c722 <- 0x693e6d7 -mem-write: 0x8000c726 <- 0x4630020 -mem-write: 0x8000c72a <- 0x41326d7 -mem-write: 0x8000c72e <- 0x97930f01 -mem-write: 0x8000c732 <- 0x771301dc -mem-write: 0x8000c736 <- 0x5d13007d -mem-write: 0x8000c73a <- 0x713003d -mem-write: 0x8000c73e <- 0xed330307 -mem-write: 0x8000c742 <- 0xdc9301a7 -mem-write: 0x8000c746 <- 0xfa3003c -mem-write: 0x8000c74a <- 0x67b3fee4 -mem-write: 0x8000c74e <- 0x613019d -mem-write: 0x8000c752 <- 0x4130004 -mem-write: 0x8000c756 <- 0x9ce3fff4 -mem-write: 0x8000c75a <- 0xf793fc07 -mem-write: 0x8000c75e <- 0x8263001d -mem-write: 0x8000c762 <- 0x7932607 -mem-write: 0x8000c766 <- 0xe630300 -mem-write: 0x8000c76a <- 0x61324f7 -mem-write: 0x8000c76e <- 0xfa3ffe6 -mem-write: 0x8000c772 <- 0x793fef4 -mem-write: 0x8000c776 <- 0x8d330f01 -mem-write: 0x8000c77a <- 0x8b1340c7 -mem-write: 0x8000c77e <- 0x413000d -mem-write: 0x8000c782 <- 0xf06f0006 -mem-write: 0x8000c786 <- 0x70efe39f -mem-write: 0x8000c78a <- 0xf06fc6df -mem-write: 0x8000c78e <- 0x2783a05f -mem-write: 0x8000c792 <- 0xda30101 -mem-write: 0x8000c796 <- 0xa4030201 -mem-write: 0x8000c79a <- 0x8d930007 -mem-write: 0x8000c79e <- 0xe30047 -mem-write: 0x8000c7a2 <- 0x7932204 -mem-write: 0x8000c7a6 <- 0x88e3fff0 -mem-write: 0x8000c7aa <- 0x861312fa -mem-write: 0x8000c7ae <- 0x593000a -mem-write: 0x8000c7b2 <- 0x5130000 -mem-write: 0x8000c7b6 <- 0xb0ef0004 -mem-write: 0x8000c7ba <- 0xe3f18f -mem-write: 0x8000c7be <- 0xd333605 -mem-write: 0x8000c7c2 <- 0x28234085 -mem-write: 0x8000c7c6 <- 0xa9301b1 -mem-write: 0x8000c7ca <- 0xf06f0000 -mem-write: 0x8000c7ce <- 0x2703df1f -mem-write: 0x8000c7d2 <- 0xda30101 -mem-write: 0x8000c7d6 <- 0xc930201 -mem-write: 0x8000c7da <- 0x27830010 -mem-write: 0x8000c7de <- 0x7130007 -mem-write: 0x8000c7e2 <- 0x28230047 -mem-write: 0x8000c7e6 <- 0x62300e1 -mem-write: 0x8000c7ea <- 0xd1308f1 -mem-write: 0x8000c7ee <- 0x4130010 -mem-write: 0x8000c7f2 <- 0xf06f08c1 -mem-write: 0x8000c7f6 <- 0x2783b61f -VXDRV: upload 1024 bytes to 0x8000c7fa -mem-write: 0x8000c7fa <- 0x87370101 -mem-write: 0x8000c7fe <- 0x4713ffff -mem-write: 0x8000c802 <- 0xad038307 -mem-write: 0x8000c806 <- 0x87930007 -mem-write: 0x8000c80a <- 0x28230047 -mem-write: 0x8000c80e <- 0x57b700f1 -mem-write: 0x8000c812 <- 0x87938001 -mem-write: 0x8000c816 <- 0x1e23a3c7 -mem-write: 0x8000c81a <- 0xc9302e1 -mem-write: 0x8000c81e <- 0x6d930000 -mem-write: 0x8000c822 <- 0x2c23002b -mem-write: 0x8000c826 <- 0x71300f1 -mem-write: 0x8000c82a <- 0xf06f0020 -mem-write: 0x8000c82e <- 0x4703e21f -mem-write: 0x8000c832 <- 0x793000c -mem-write: 0x8000c836 <- 0x6e306c0 -mem-write: 0x8000c83a <- 0x6b1316f7 -mem-write: 0x8000c83e <- 0xf06f010b -mem-write: 0x8000c842 <- 0x4703aa5f -mem-write: 0x8000c846 <- 0x793000c -mem-write: 0x8000c84a <- 0x4e30680 -mem-write: 0x8000c84e <- 0x6b1314f7 -mem-write: 0x8000c852 <- 0xf06f040b -mem-write: 0x8000c856 <- 0x6d93a91f -mem-write: 0x8000c85a <- 0xf793010b -mem-write: 0x8000c85e <- 0x8463020d -mem-write: 0x8000c862 <- 0x27836007 -mem-write: 0x8000c866 <- 0x7130101 -mem-write: 0x8000c86a <- 0x87930010 -mem-write: 0x8000c86e <- 0xf7930077 -mem-write: 0x8000c872 <- 0xad03ff87 -mem-write: 0x8000c876 <- 0xac830007 -mem-write: 0x8000c87a <- 0x87930047 -mem-write: 0x8000c87e <- 0x28230087 -mem-write: 0x8000c882 <- 0xf06f00f1 -mem-write: 0x8000c886 <- 0x4703dc9f -mem-write: 0x8000c88a <- 0x6b13000c -mem-write: 0x8000c88e <- 0xf06f080b -mem-write: 0x8000c892 <- 0x2683a55f -mem-write: 0x8000c896 <- 0x47030101 -mem-write: 0x8000c89a <- 0xa783000c -mem-write: 0x8000c89e <- 0x86930006 -mem-write: 0x8000c8a2 <- 0x28230046 -mem-write: 0x8000c8a6 <- 0x222300d1 -mem-write: 0x8000c8aa <- 0xdce300f1 -mem-write: 0x8000c8ae <- 0x7b3a207 -mem-write: 0x8000c8b2 <- 0x222340f0 -mem-write: 0x8000c8b6 <- 0x6b1300f1 -mem-write: 0x8000c8ba <- 0xf06f004b -mem-write: 0x8000c8be <- 0x4703a29f -mem-write: 0x8000c8c2 <- 0x6b13000c -mem-write: 0x8000c8c6 <- 0xf06f001b -mem-write: 0x8000c8ca <- 0x4783a1df -mem-write: 0x8000c8ce <- 0x470303b1 -mem-write: 0x8000c8d2 <- 0x98e3000c -mem-write: 0x8000c8d6 <- 0x793a007 -mem-write: 0x8000c8da <- 0xda30200 -mem-write: 0x8000c8de <- 0xf06f02f1 -mem-write: 0x8000c8e2 <- 0x4703a05f -mem-write: 0x8000c8e6 <- 0x6b13000c -mem-write: 0x8000c8ea <- 0xf06f004b -mem-write: 0x8000c8ee <- 0x7939f9f -mem-write: 0x8000c8f2 <- 0x470302b0 -mem-write: 0x8000c8f6 <- 0xda3000c -mem-write: 0x8000c8fa <- 0xf06f02f1 -mem-write: 0x8000c8fe <- 0x47039e9f -mem-write: 0x8000c902 <- 0x693000c -mem-write: 0x8000c906 <- 0xae3001c -mem-write: 0x8000c90a <- 0x79324c7 -mem-write: 0x8000c90e <- 0x8c13fd07 -mem-write: 0x8000c912 <- 0xa930006 -mem-write: 0x8000c916 <- 0x68e30000 -mem-write: 0x8000c91a <- 0x47039cfd -mem-write: 0x8000c91e <- 0x9693000c -mem-write: 0x8000c922 <- 0x8ab3002a -mem-write: 0x8000c926 <- 0x9a930156 -mem-write: 0x8000c92a <- 0x8ab3001a -mem-write: 0x8000c92e <- 0x79300fa -mem-write: 0x8000c932 <- 0xc13fd07 -mem-write: 0x8000c936 <- 0x72e3001c -mem-write: 0x8000c93a <- 0xf06ffefd -mem-write: 0x8000c93e <- 0x26839adf -mem-write: 0x8000c942 <- 0x77930101 -mem-write: 0x8000c946 <- 0xa703020b -mem-write: 0x8000c94a <- 0x86930006 -mem-write: 0x8000c94e <- 0x28230046 -mem-write: 0x8000c952 <- 0x9a6300d1 -mem-write: 0x8000c956 <- 0x77936a07 -mem-write: 0x8000c95a <- 0x9ce3010b -mem-write: 0x8000c95e <- 0x77930407 -mem-write: 0x8000c962 <- 0x90e3040b -mem-write: 0x8000c966 <- 0x73131407 -mem-write: 0x8000c96a <- 0x4e3200b -mem-write: 0x8000c96e <- 0x27830403 -mem-write: 0x8000c972 <- 0x2300c1 -mem-write: 0x8000c976 <- 0xf06f00f7 -mem-write: 0x8000c97a <- 0x6938c5f -mem-write: 0x8000c97e <- 0xee30010 -mem-write: 0x8000c982 <- 0x6931ad7 -mem-write: 0x8000c986 <- 0xd930020 -mem-write: 0x8000c98a <- 0x10e3000b -mem-write: 0x8000c98e <- 0x2683dad7 -mem-write: 0x8000c992 <- 0x4130181 -mem-write: 0x8000c996 <- 0x77930f01 -mem-write: 0x8000c99a <- 0x87b300fd -mem-write: 0x8000c99e <- 0xc70300f6 -mem-write: 0x8000c9a2 <- 0x5d130007 -mem-write: 0x8000c9a6 <- 0x9793004d -mem-write: 0x8000c9aa <- 0xed3301cc -mem-write: 0x8000c9ae <- 0xdc9301a7 -mem-write: 0x8000c9b2 <- 0xfa3004c -mem-write: 0x8000c9b6 <- 0x67b3fee4 -mem-write: 0x8000c9ba <- 0x413019d -mem-write: 0x8000c9be <- 0x9ce3fff4 -mem-write: 0x8000c9c2 <- 0x793fc07 -mem-write: 0x8000c9c6 <- 0x8d330f01 -mem-write: 0x8000c9ca <- 0x8b134087 -mem-write: 0x8000c9ce <- 0xf06f000d -mem-write: 0x8000c9d2 <- 0x2583bedf -mem-write: 0x8000c9d6 <- 0x8db30041 -mem-write: 0x8000c9da <- 0x58e34195 -mem-write: 0x8000c9de <- 0x593a5b0 -mem-write: 0x8000c9e2 <- 0xd6e30100 -mem-write: 0x8000c9e6 <- 0xe9317b5 -mem-write: 0x8000c9ea <- 0xf130100 -mem-write: 0x8000c9ee <- 0x6f0070 -mem-write: 0x8000c9f2 <- 0x6130180 -mem-write: 0x8000c9f6 <- 0x8b930027 -mem-write: 0x8000c9fa <- 0x8713008b -mem-write: 0x8000c9fe <- 0x8d930006 -mem-write: 0x8000ca02 <- 0xdc63ff0d -mem-write: 0x8000ca06 <- 0x879305be -mem-write: 0x8000ca0a <- 0x6930107 -mem-write: 0x8000ca0e <- 0xa0230017 -mem-write: 0x8000ca12 <- 0xa223012b -mem-write: 0x8000ca16 <- 0x242301db -mem-write: 0x8000ca1a <- 0x222304f1 -mem-write: 0x8000ca1e <- 0x5ae304d1 -mem-write: 0x8000ca22 <- 0x8063fcdf -mem-write: 0x8000ca26 <- 0x6131607 -mem-write: 0x8000ca2a <- 0x85930401 -mem-write: 0x8000ca2e <- 0x5130009 -mem-write: 0x8000ca32 <- 0xf0ef000a -mem-write: 0x8000ca36 <- 0x10e3e00f -mem-write: 0x8000ca3a <- 0x2703a805 -mem-write: 0x8000ca3e <- 0xe930441 -mem-write: 0x8000ca42 <- 0x8d930100 -mem-write: 0x8000ca46 <- 0x2783ff0d -mem-write: 0x8000ca4a <- 0x8b930481 -mem-write: 0x8000ca4e <- 0x6130004 -mem-write: 0x8000ca52 <- 0xf130017 -mem-write: 0x8000ca56 <- 0xc8e30070 -mem-write: 0x8000ca5a <- 0x593fbbe -mem-write: 0x8000ca5e <- 0x85130006 -mem-write: 0x8000ca62 <- 0x87b3008b -mem-write: 0x8000ca66 <- 0xa02301b7 -mem-write: 0x8000ca6a <- 0xa223012b -mem-write: 0x8000ca6e <- 0x242301bb -mem-write: 0x8000ca72 <- 0x222304f1 -mem-write: 0x8000ca76 <- 0x71304b1 -mem-write: 0x8000ca7a <- 0x5a630070 -mem-write: 0x8000ca7e <- 0x866352b7 -mem-write: 0x8000ca82 <- 0x6137e07 -mem-write: 0x8000ca86 <- 0x85930401 -mem-write: 0x8000ca8a <- 0x5130009 -mem-write: 0x8000ca8e <- 0xf0ef000a -mem-write: 0x8000ca92 <- 0x12e3da4f -mem-write: 0x8000ca96 <- 0x2703a205 -mem-write: 0x8000ca9a <- 0x8ab30441 -mem-write: 0x8000ca9e <- 0x278341aa -mem-write: 0x8000caa2 <- 0x6930481 -mem-write: 0x8000caa6 <- 0x6130541 -mem-write: 0x8000caaa <- 0x8b930017 -mem-write: 0x8000caae <- 0x52e30004 -mem-write: 0x8000cab2 <- 0x5939950 -mem-write: 0x8000cab6 <- 0xd0630100 -mem-write: 0x8000caba <- 0x8937b55 -mem-write: 0x8000cabe <- 0xd930100 -mem-write: 0x8000cac2 <- 0x6f0070 -mem-write: 0x8000cac6 <- 0x6130180 -mem-write: 0x8000caca <- 0x8b930027 -mem-write: 0x8000cace <- 0x8713008b -mem-write: 0x8000cad2 <- 0x8a930006 -mem-write: 0x8000cad6 <- 0xda63ff0a -mem-write: 0x8000cada <- 0x87930558 -mem-write: 0x8000cade <- 0x6930107 -mem-write: 0x8000cae2 <- 0xa0230017 -mem-write: 0x8000cae6 <- 0xa223012b -mem-write: 0x8000caea <- 0x2423011b -mem-write: 0x8000caee <- 0x222304f1 -mem-write: 0x8000caf2 <- 0xdae304d1 -mem-write: 0x8000caf6 <- 0x8263fcdd -mem-write: 0x8000cafa <- 0x6130607 -mem-write: 0x8000cafe <- 0x85930401 -mem-write: 0x8000cb02 <- 0x5130009 -mem-write: 0x8000cb06 <- 0xf0ef000a -mem-write: 0x8000cb0a <- 0x16e3d2cf -mem-write: 0x8000cb0e <- 0x27039a05 -mem-write: 0x8000cb12 <- 0x8930441 -mem-write: 0x8000cb16 <- 0x8a930100 -mem-write: 0x8000cb1a <- 0x2783ff0a -mem-write: 0x8000cb1e <- 0x8b930481 -mem-write: 0x8000cb22 <- 0x6130004 -mem-write: 0x8000cb26 <- 0xcae30017 -mem-write: 0x8000cb2a <- 0x8593fb58 -mem-write: 0x8000cb2e <- 0x87b3008b -mem-write: 0x8000cb32 <- 0xa0230157 -mem-write: 0x8000cb36 <- 0xa223012b -mem-write: 0x8000cb3a <- 0x2423015b -mem-write: 0x8000cb3e <- 0x222304f1 -mem-write: 0x8000cb42 <- 0x71304c1 -mem-write: 0x8000cb46 <- 0x46630070 -mem-write: 0x8000cb4a <- 0x6132cc7 -mem-write: 0x8000cb4e <- 0x86930016 -mem-write: 0x8000cb52 <- 0x8b930085 -mem-write: 0x8000cb56 <- 0xf06f0005 -mem-write: 0x8000cb5a <- 0x6138ddf -mem-write: 0x8000cb5e <- 0x7130010 -mem-write: 0x8000cb62 <- 0x8b930000 -mem-write: 0x8000cb66 <- 0xf06f0004 -mem-write: 0x8000cb6a <- 0x613f6df -mem-write: 0x8000cb6e <- 0x85930401 -mem-write: 0x8000cb72 <- 0x5130009 -mem-write: 0x8000cb76 <- 0xf0ef000a -mem-write: 0x8000cb7a <- 0x2e3cbcf -mem-write: 0x8000cb7e <- 0xf06f9205 -mem-write: 0x8000cb82 <- 0x613939f -mem-write: 0x8000cb86 <- 0x7130010 -mem-write: 0x8000cb8a <- 0x8b930000 -mem-write: 0x8000cb8e <- 0xf06f0004 -mem-write: 0x8000cb92 <- 0x8c63e71f -mem-write: 0x8000cb96 <- 0x6133007 -mem-write: 0x8000cb9a <- 0x85930401 -mem-write: 0x8000cb9e <- 0x5130009 -mem-write: 0x8000cba2 <- 0x2623000a -mem-write: 0x8000cba6 <- 0x242303e1 -mem-write: 0x8000cbaa <- 0xf0ef03f1 -mem-write: 0x8000cbae <- 0x14e3c88f -mem-write: 0x8000cbb2 <- 0x27039005 -mem-write: 0x8000cbb6 <- 0x27830441 -mem-write: 0x8000cbba <- 0x2f030481 -mem-write: 0x8000cbbe <- 0x2f8302c1 -mem-write: 0x8000cbc2 <- 0x6930281 -mem-write: 0x8000cbc6 <- 0x6130541 -mem-write: 0x8000cbca <- 0x8b930017 -mem-write: 0x8000cbce <- 0xf06f0004 -mem-write: 0x8000cbd2 <- 0x793ff8f -mem-write: 0x8000cbd6 <- 0x262303c1 -mem-write: 0x8000cbda <- 0x79304f1 -mem-write: 0x8000cbde <- 0x28230020 -mem-write: 0x8000cbe2 <- 0x61304f1 -mem-write: 0x8000cbe6 <- 0x6930010 -mem-write: 0x8000cbea <- 0x7130541 -mem-write: 0x8000cbee <- 0x8b930006 -mem-write: 0x8000cbf2 <- 0x6130006 -mem-write: 0x8000cbf6 <- 0x86930017 -VXDRV: upload 1024 bytes to 0x8000cbfa -mem-write: 0x8000cbfa <- 0xf06f008b -mem-write: 0x8000cbfe <- 0xd93829f -mem-write: 0x8000cc02 <- 0xf06f000b -mem-write: 0x8000cc06 <- 0x613b19f -mem-write: 0x8000cc0a <- 0x50630100 -mem-write: 0x8000cc0e <- 0x861373b6 -mem-write: 0x8000cc12 <- 0xe93000b -mem-write: 0x8000cc16 <- 0xb930100 -mem-write: 0x8000cc1a <- 0x2930004 -mem-write: 0x8000cc1e <- 0x84130070 -mem-write: 0x8000cc22 <- 0x24230009 -mem-write: 0x8000cc26 <- 0x899303f1 -mem-write: 0x8000cc2a <- 0xd93000d -mem-write: 0x8000cc2e <- 0x8c13000c -mem-write: 0x8000cc32 <- 0xa93000a -mem-write: 0x8000cc36 <- 0x6f000f -mem-write: 0x8000cc3a <- 0x51301c0 -mem-write: 0x8000cc3e <- 0x6130027 -mem-write: 0x8000cc42 <- 0x87130086 -mem-write: 0x8000cc46 <- 0x89930006 -mem-write: 0x8000cc4a <- 0xde63ff09 -mem-write: 0x8000cc4e <- 0x693053e -mem-write: 0x8000cc52 <- 0x25830017 -mem-write: 0x8000cc56 <- 0x87930081 -mem-write: 0x8000cc5a <- 0x22230107 -mem-write: 0x8000cc5e <- 0x202301d6 -mem-write: 0x8000cc62 <- 0x242300b6 -mem-write: 0x8000cc66 <- 0x222304f1 -mem-write: 0x8000cc6a <- 0xd8e304d1 -mem-write: 0x8000cc6e <- 0x8663fcd2 -mem-write: 0x8000cc72 <- 0x6130807 -mem-write: 0x8000cc76 <- 0x5930401 -mem-write: 0x8000cc7a <- 0x5130004 -mem-write: 0x8000cc7e <- 0xf0ef000a -mem-write: 0x8000cc82 <- 0x1663bb4f -mem-write: 0x8000cc86 <- 0x27034c05 -mem-write: 0x8000cc8a <- 0xe930441 -mem-write: 0x8000cc8e <- 0x89930100 -mem-write: 0x8000cc92 <- 0x2783ff09 -mem-write: 0x8000cc96 <- 0x86130481 -mem-write: 0x8000cc9a <- 0x5130004 -mem-write: 0x8000cc9e <- 0x2930017 -mem-write: 0x8000cca2 <- 0xc6e30070 -mem-write: 0x8000cca6 <- 0x2f83fb3e -mem-write: 0x8000ccaa <- 0x8f130281 -mem-write: 0x8000ccae <- 0x593000a -mem-write: 0x8000ccb2 <- 0xa930005 -mem-write: 0x8000ccb6 <- 0x8c13000c -mem-write: 0x8000ccba <- 0x8d93000d -mem-write: 0x8000ccbe <- 0x9930009 -mem-write: 0x8000ccc2 <- 0x84130004 -mem-write: 0x8000ccc6 <- 0xb93000b -mem-write: 0x8000ccca <- 0x27030006 -mem-write: 0x8000ccce <- 0x87b30081 -mem-write: 0x8000ccd2 <- 0xa22301b7 -mem-write: 0x8000ccd6 <- 0xa02301bb -mem-write: 0x8000ccda <- 0x242300eb -mem-write: 0x8000ccde <- 0x222304f1 -mem-write: 0x8000cce2 <- 0x71304b1 -mem-write: 0x8000cce6 <- 0x42630070 -mem-write: 0x8000ccea <- 0x8b931eb7 -mem-write: 0x8000ccee <- 0x8613008b -mem-write: 0x8000ccf2 <- 0x87130015 -mem-write: 0x8000ccf6 <- 0xf06f0005 -mem-write: 0x8000ccfa <- 0x713e90f -mem-write: 0x8000ccfe <- 0x5130000 -mem-write: 0x8000cd02 <- 0x86130010 -mem-write: 0x8000cd06 <- 0xf06f0004 -mem-write: 0x8000cd0a <- 0x2223f41f -mem-write: 0x8000cd0e <- 0x73130401 -mem-write: 0x8000cd12 <- 0x263004b -mem-write: 0x8000cd16 <- 0x27030e03 -mem-write: 0x8000cd1a <- 0xbb30041 -mem-write: 0x8000cd1e <- 0x5c634197 -mem-write: 0x8000cd22 <- 0x86930d70 -mem-write: 0x8000cd26 <- 0x7130004 -mem-write: 0x8000cd2a <- 0x26030100 -mem-write: 0x8000cd2e <- 0x52630441 -mem-write: 0x8000cd32 <- 0xd136177 -mem-write: 0x8000cd36 <- 0xd930100 -mem-write: 0x8000cd3a <- 0x6f0070 -mem-write: 0x8000cd3e <- 0x5130180 -mem-write: 0x8000cd42 <- 0x86930026 -mem-write: 0x8000cd46 <- 0x6130086 -mem-write: 0x8000cd4a <- 0x8b930007 -mem-write: 0x8000cd4e <- 0x5a63ff0b -mem-write: 0x8000cd52 <- 0x2583057d -mem-write: 0x8000cd56 <- 0x87930081 -mem-write: 0x8000cd5a <- 0x7130107 -mem-write: 0x8000cd5e <- 0xa0230016 -mem-write: 0x8000cd62 <- 0xa22300b6 -mem-write: 0x8000cd66 <- 0x242301a6 -mem-write: 0x8000cd6a <- 0x222304f1 -mem-write: 0x8000cd6e <- 0xd8e304e1 -mem-write: 0x8000cd72 <- 0x8a63fced -mem-write: 0x8000cd76 <- 0x6130607 -mem-write: 0x8000cd7a <- 0x85930401 -mem-write: 0x8000cd7e <- 0x5130009 -mem-write: 0x8000cd82 <- 0xf0ef000a -mem-write: 0x8000cd86 <- 0x1863ab0f -mem-write: 0x8000cd8a <- 0x2603f205 -mem-write: 0x8000cd8e <- 0x8b930441 -mem-write: 0x8000cd92 <- 0x2783ff0b -mem-write: 0x8000cd96 <- 0x86930481 -mem-write: 0x8000cd9a <- 0x5130004 -mem-write: 0x8000cd9e <- 0x4ae30016 -mem-write: 0x8000cda2 <- 0x593fb7d -mem-write: 0x8000cda6 <- 0x27030005 -mem-write: 0x8000cdaa <- 0x87b30081 -mem-write: 0x8000cdae <- 0xa2230177 -mem-write: 0x8000cdb2 <- 0xa0230176 -mem-write: 0x8000cdb6 <- 0x242300e6 -mem-write: 0x8000cdba <- 0x222304f1 -mem-write: 0x8000cdbe <- 0x71304b1 -mem-write: 0x8000cdc2 <- 0x50630070 -mem-write: 0x8000cdc6 <- 0x8863ecb7 -mem-write: 0x8000cdca <- 0x6130207 -mem-write: 0x8000cdce <- 0x85930401 -mem-write: 0x8000cdd2 <- 0x5130009 -mem-write: 0x8000cdd6 <- 0xf0ef000a -mem-write: 0x8000cdda <- 0x1e63a5cf -mem-write: 0x8000cdde <- 0x2783ec05 -mem-write: 0x8000cde2 <- 0xf06f0481 -mem-write: 0x8000cde6 <- 0x513ea0f -mem-write: 0x8000cdea <- 0x6130010 -mem-write: 0x8000cdee <- 0x86930000 -mem-write: 0x8000cdf2 <- 0xf06f0004 -mem-write: 0x8000cdf6 <- 0x2403f59f -mem-write: 0x8000cdfa <- 0x54630041 -mem-write: 0x8000cdfe <- 0x84130194 -mem-write: 0x8000ce02 <- 0x2783000c -mem-write: 0x8000ce06 <- 0x87b300c1 -mem-write: 0x8000ce0a <- 0x26230087 -mem-write: 0x8000ce0e <- 0xf06f00f1 -mem-write: 0x8000ce12 <- 0x8263e90f -mem-write: 0x8000ce16 <- 0x6133407 -mem-write: 0x8000ce1a <- 0x85930401 -mem-write: 0x8000ce1e <- 0x5130009 -mem-write: 0x8000ce22 <- 0xf0ef000a -mem-write: 0x8000ce26 <- 0x1863a10f -mem-write: 0x8000ce2a <- 0x2603e805 -mem-write: 0x8000ce2e <- 0x27830441 -mem-write: 0x8000ce32 <- 0x6930481 -mem-write: 0x8000ce36 <- 0x6130541 -mem-write: 0x8000ce3a <- 0x8b930016 -mem-write: 0x8000ce3e <- 0xf06f0004 -mem-write: 0x8000ce42 <- 0x2223df4f -mem-write: 0x8000ce46 <- 0x8b930401 -mem-write: 0x8000ce4a <- 0xf06f0004 -mem-write: 0x8000ce4e <- 0x9c63c60f -mem-write: 0x8000ce52 <- 0x8b13f40a -mem-write: 0x8000ce56 <- 0xa93000d -mem-write: 0x8000ce5a <- 0xd130000 -mem-write: 0x8000ce5e <- 0x4130000 -mem-write: 0x8000ce62 <- 0xf06f0f01 -mem-write: 0x8000ce66 <- 0x2683f58f -mem-write: 0x8000ce6a <- 0xf7930101 -mem-write: 0x8000ce6e <- 0x8713010d -mem-write: 0x8000ce72 <- 0x98630046 -mem-write: 0x8000ce76 <- 0xf7931407 -mem-write: 0x8000ce7a <- 0x8063040d -mem-write: 0x8000ce7e <- 0x27833a07 -mem-write: 0x8000ce82 <- 0xc930101 -mem-write: 0x8000ce86 <- 0x28230000 -mem-write: 0x8000ce8a <- 0xdd0300e1 -mem-write: 0x8000ce8e <- 0x7130007 -mem-write: 0x8000ce92 <- 0xf06f0010 -mem-write: 0x8000ce96 <- 0x693fb8f -mem-write: 0x8000ce9a <- 0x6130541 -mem-write: 0x8000ce9e <- 0x7130010 -mem-write: 0x8000cea2 <- 0x8b930000 -mem-write: 0x8000cea6 <- 0xf06f0004 -mem-write: 0x8000ceaa <- 0x8063d7cf -mem-write: 0x8000ceae <- 0x793180f -mem-write: 0x8000ceb2 <- 0x262303c1 -mem-write: 0x8000ceb6 <- 0x79304f1 -mem-write: 0x8000ceba <- 0x28230020 -mem-write: 0x8000cebe <- 0x71304f1 -mem-write: 0x8000cec2 <- 0xb930010 -mem-write: 0x8000cec6 <- 0xf06f0541 -mem-write: 0x8000ceca <- 0x8263d2df -mem-write: 0x8000cece <- 0x6132207 -mem-write: 0x8000ced2 <- 0x85930401 -mem-write: 0x8000ced6 <- 0x5130009 -mem-write: 0x8000ceda <- 0x2623000a -mem-write: 0x8000cede <- 0x242303e1 -mem-write: 0x8000cee2 <- 0xf0ef03f1 -mem-write: 0x8000cee6 <- 0x1863950f -mem-write: 0x8000ceea <- 0x2703dc05 -mem-write: 0x8000ceee <- 0x27830441 -mem-write: 0x8000cef2 <- 0x2f030481 -mem-write: 0x8000cef6 <- 0x2f8302c1 -mem-write: 0x8000cefa <- 0x8b930281 -mem-write: 0x8000cefe <- 0x6130004 -mem-write: 0x8000cf02 <- 0xf06f0017 -mem-write: 0x8000cf06 <- 0xf793c84f -mem-write: 0x8000cf0a <- 0x2423400d -mem-write: 0x8000cf0e <- 0x26230341 -mem-write: 0x8000cf12 <- 0x8a130331 -mem-write: 0x8000cf16 <- 0x993000c -mem-write: 0x8000cf1a <- 0xb13000d -mem-write: 0x8000cf1e <- 0x2d030000 -mem-write: 0x8000cf22 <- 0x41301c1 -mem-write: 0x8000cf26 <- 0x8c930f01 -mem-write: 0x8000cf2a <- 0x6f0007 -mem-write: 0x8000cf2e <- 0x6130240 -mem-write: 0x8000cf32 <- 0x69300a0 -mem-write: 0x8000cf36 <- 0x85130000 -mem-write: 0x8000cf3a <- 0x5930009 -mem-write: 0x8000cf3e <- 0x30ef000a -mem-write: 0x8000cf42 <- 0xe634a80 -mem-write: 0x8000cf46 <- 0x993300a -mem-write: 0x8000cf4a <- 0x8a130005 -mem-write: 0x8000cf4e <- 0x6130005 -mem-write: 0x8000cf52 <- 0x69300a0 -mem-write: 0x8000cf56 <- 0x85130000 -mem-write: 0x8000cf5a <- 0x5930009 -mem-write: 0x8000cf5e <- 0x30ef000a -mem-write: 0x8000cf62 <- 0x5130bd0 -mem-write: 0x8000cf66 <- 0xfa30305 -mem-write: 0x8000cf6a <- 0xb13fea4 -mem-write: 0x8000cf6e <- 0x413001b -mem-write: 0x8000cf72 <- 0x8ee3fff4 -mem-write: 0x8000cf76 <- 0x4683fa0c -mem-write: 0x8000cf7a <- 0x9ae3000d -mem-write: 0x8000cf7e <- 0x793fb66 -mem-write: 0x8000cf82 <- 0x6e30ff0 -mem-write: 0x8000cf86 <- 0x1463fafb -mem-write: 0x8000cf8a <- 0x793180a -mem-write: 0x8000cf8e <- 0xe0630090 -mem-write: 0x8000cf92 <- 0x7931937 -mem-write: 0x8000cf96 <- 0x2e230f01 -mem-write: 0x8000cf9a <- 0x2a0301a1 -mem-write: 0x8000cf9e <- 0x29830281 -mem-write: 0x8000cfa2 <- 0x8d3302c1 -mem-write: 0x8000cfa6 <- 0x8b134087 -mem-write: 0x8000cfaa <- 0xf06f000d -mem-write: 0x8000cfae <- 0x8613e10f -mem-write: 0x8000cfb2 <- 0x6930015 -mem-write: 0x8000cfb6 <- 0x87130085 -mem-write: 0x8000cfba <- 0xb930005 -mem-write: 0x8000cfbe <- 0xf06f0005 -mem-write: 0x8000cfc2 <- 0x2823c6cf -mem-write: 0x8000cfc6 <- 0xad0300e1 -mem-write: 0x8000cfca <- 0xc930006 -mem-write: 0x8000cfce <- 0x7130000 -mem-write: 0x8000cfd2 <- 0xf06f0010 -mem-write: 0x8000cfd6 <- 0xad03e78f -mem-write: 0x8000cfda <- 0x28230006 -mem-write: 0x8000cfde <- 0x5c9300e1 -mem-write: 0x8000cfe2 <- 0x871341fd -mem-write: 0x8000cfe6 <- 0xf06f000c -mem-write: 0x8000cfea <- 0x2783d98f -mem-write: 0x8000cfee <- 0x470301c1 -mem-write: 0x8000cff2 <- 0x8863000c -mem-write: 0x8000cff6 <- 0xc783ae07 -VXDRV: upload 1024 bytes to 0x8000cffa -mem-write: 0x8000cffa <- 0x84630007 -mem-write: 0x8000cffe <- 0x6b13ae07 -mem-write: 0x8000d002 <- 0xf06f400b -mem-write: 0x8000d006 <- 0x2683ae0f -mem-write: 0x8000d00a <- 0xd79300c1 -mem-write: 0x8000d00e <- 0x202341f6 -mem-write: 0x8000d012 <- 0x222300d7 -mem-write: 0x8000d016 <- 0xf06f00f7 -mem-write: 0x8000d01a <- 0xad03a24f -mem-write: 0x8000d01e <- 0xc930006 -mem-write: 0x8000d022 <- 0x28230000 -mem-write: 0x8000d026 <- 0xf06f00e1 -mem-write: 0x8000d02a <- 0x713e1cf -mem-write: 0x8000d02e <- 0x6930000 -mem-write: 0x8000d032 <- 0x6130541 -mem-write: 0x8000d036 <- 0x8b930010 -mem-write: 0x8000d03a <- 0xf06f0004 -mem-write: 0x8000d03e <- 0xd93be8f -mem-write: 0x8000d042 <- 0xf06f000b -mem-write: 0x8000d046 <- 0x57b7819f -mem-write: 0x8000d04a <- 0x87938001 -mem-write: 0x8000d04e <- 0x2c23a507 -mem-write: 0x8000d052 <- 0x779300f1 -mem-write: 0x8000d056 <- 0x8063020b -mem-write: 0x8000d05a <- 0x27830607 -mem-write: 0x8000d05e <- 0x87930101 -mem-write: 0x8000d062 <- 0xf7930077 -mem-write: 0x8000d066 <- 0xad03ff87 -mem-write: 0x8000d06a <- 0xac830007 -mem-write: 0x8000d06e <- 0x87930047 -mem-write: 0x8000d072 <- 0x28230087 -mem-write: 0x8000d076 <- 0x769300f1 -mem-write: 0x8000d07a <- 0x8e63001b -mem-write: 0x8000d07e <- 0x66b30006 -mem-write: 0x8000d082 <- 0x8a63019d -mem-write: 0x8000d086 <- 0x6930006 -mem-write: 0x8000d08a <- 0xe230300 -mem-write: 0x8000d08e <- 0xea302d1 -mem-write: 0x8000d092 <- 0x6b1302e1 -mem-write: 0x8000d096 <- 0x7d93002b -mem-write: 0x8000d09a <- 0x713bffb -mem-write: 0x8000d09e <- 0xf06f0020 -mem-write: 0x8000d0a2 <- 0x57b7dacf -mem-write: 0x8000d0a6 <- 0x87938001 -mem-write: 0x8000d0aa <- 0x2c23a3c7 -mem-write: 0x8000d0ae <- 0x779300f1 -mem-write: 0x8000d0b2 <- 0x94e3020b -mem-write: 0x8000d0b6 <- 0x2603fa07 -mem-write: 0x8000d0ba <- 0x77930101 -mem-write: 0x8000d0be <- 0x693010b -mem-write: 0x8000d0c2 <- 0x8a630046 -mem-write: 0x8000d0c6 <- 0x2d030a07 -mem-write: 0x8000d0ca <- 0xc930006 -mem-write: 0x8000d0ce <- 0x28230000 -mem-write: 0x8000d0d2 <- 0xf06f00d1 -mem-write: 0x8000d0d6 <- 0x513fa5f -mem-write: 0x8000d0da <- 0xc0ef0004 -mem-write: 0x8000d0de <- 0xd13c10f -mem-write: 0x8000d0e2 <- 0x28230005 -mem-write: 0x8000d0e6 <- 0xa9301b1 -mem-write: 0x8000d0ea <- 0xf06f0000 -mem-write: 0x8000d0ee <- 0x4703cd0f -mem-write: 0x8000d0f2 <- 0x1a6303b1 -mem-write: 0x8000d0f6 <- 0x9ee31807 -mem-write: 0x8000d0fa <- 0x713ac0f -mem-write: 0x8000d0fe <- 0x6130000 -mem-write: 0x8000d102 <- 0x6930010 -mem-write: 0x8000d106 <- 0x8b930541 -mem-write: 0x8000d10a <- 0xf06f0004 -mem-write: 0x8000d10e <- 0x2783b18f -mem-write: 0x8000d112 <- 0x25830241 -mem-write: 0x8000d116 <- 0xb130201 -mem-write: 0x8000d11a <- 0x4330000 -mem-write: 0x8000d11e <- 0x861340f4 -mem-write: 0x8000d122 <- 0x5130007 -mem-write: 0x8000d126 <- 0xc0ef0004 -mem-write: 0x8000d12a <- 0x4583c50f -mem-write: 0x8000d12e <- 0x613001d -mem-write: 0x8000d132 <- 0x69300a0 -mem-write: 0x8000d136 <- 0x37330000 -mem-write: 0x8000d13a <- 0x851300b0 -mem-write: 0x8000d13e <- 0x5930009 -mem-write: 0x8000d142 <- 0xd33000a -mem-write: 0x8000d146 <- 0x30ef00ed -mem-write: 0x8000d14a <- 0xf06f2a00 -mem-write: 0x8000d14e <- 0x993dfdf -mem-write: 0x8000d152 <- 0xf06f0004 -mem-write: 0x8000d156 <- 0x713b64f -mem-write: 0x8000d15a <- 0x7930010 -mem-write: 0x8000d15e <- 0x2623000d -mem-write: 0x8000d162 <- 0x28230481 -mem-write: 0x8000d166 <- 0x242305a1 -mem-write: 0x8000d16a <- 0x222305a1 -mem-write: 0x8000d16e <- 0x69304e1 -mem-write: 0x8000d172 <- 0xf06f0541 -mem-write: 0x8000d176 <- 0x7793afcf -mem-write: 0x8000d17a <- 0x8263040b -mem-write: 0x8000d17e <- 0x27830607 -mem-write: 0x8000d182 <- 0xc930101 -mem-write: 0x8000d186 <- 0x28230000 -mem-write: 0x8000d18a <- 0xdd0300d1 -mem-write: 0x8000d18e <- 0xf06f0007 -mem-write: 0x8000d192 <- 0x4703ee9f -mem-write: 0x8000d196 <- 0x6b13001c -mem-write: 0x8000d19a <- 0xc13200b -mem-write: 0x8000d19e <- 0xf06f001c -mem-write: 0x8000d1a2 <- 0x4703944f -mem-write: 0x8000d1a6 <- 0x6b13001c -mem-write: 0x8000d1aa <- 0xc13020b -mem-write: 0x8000d1ae <- 0xf06f001c -mem-write: 0x8000d1b2 <- 0x2783934f -mem-write: 0x8000d1b6 <- 0x202300c1 -mem-write: 0x8000d1ba <- 0xf06f00f7 -mem-write: 0x8000d1be <- 0x793880f -mem-write: 0x8000d1c2 <- 0x8d130060 -mem-write: 0x8000d1c6 <- 0xec63000a -mem-write: 0x8000d1ca <- 0x5e370b57 -mem-write: 0x8000d1ce <- 0xc938001 -mem-write: 0x8000d1d2 <- 0x2823000d -mem-write: 0x8000d1d6 <- 0x41301b1 -mem-write: 0x8000d1da <- 0xf06fa64e -mem-write: 0x8000d1de <- 0x7793978f -mem-write: 0x8000d1e2 <- 0x8863200b -mem-write: 0x8000d1e6 <- 0x27831007 -mem-write: 0x8000d1ea <- 0xc930101 -mem-write: 0x8000d1ee <- 0x28230000 -mem-write: 0x8000d1f2 <- 0xcd0300d1 -mem-write: 0x8000d1f6 <- 0xf06f0007 -mem-write: 0x8000d1fa <- 0x7793e81f -mem-write: 0x8000d1fe <- 0x8e63200b -mem-write: 0x8000d202 <- 0x27830c07 -mem-write: 0x8000d206 <- 0x28230101 -mem-write: 0x8000d20a <- 0x8d0300e1 -mem-write: 0x8000d20e <- 0x5c930007 -mem-write: 0x8000d212 <- 0x871341fd -mem-write: 0x8000d216 <- 0xf06f000c -mem-write: 0x8000d21a <- 0xf793b68f -mem-write: 0x8000d21e <- 0x8263200d -mem-write: 0x8000d222 <- 0x27830a07 -mem-write: 0x8000d226 <- 0xc930101 -mem-write: 0x8000d22a <- 0x28230000 -mem-write: 0x8000d22e <- 0xcd0300e1 -mem-write: 0x8000d232 <- 0x7130007 -mem-write: 0x8000d236 <- 0xf06f0010 -mem-write: 0x8000d23a <- 0x7793c14f -mem-write: 0x8000d23e <- 0x8863200b -mem-write: 0x8000d242 <- 0x27830607 -mem-write: 0x8000d246 <- 0xc930101 -mem-write: 0x8000d24a <- 0x28230000 -mem-write: 0x8000d24e <- 0xcd0300e1 -mem-write: 0x8000d252 <- 0xf06f0007 -mem-write: 0x8000d256 <- 0x8593bf0f -mem-write: 0x8000d25a <- 0xf06f0006 -mem-write: 0x8000d25e <- 0x7938d5f -mem-write: 0x8000d262 <- 0xe2e30090 -mem-write: 0x8000d266 <- 0xf06fcf37 -mem-write: 0x8000d26a <- 0x693d2df -mem-write: 0x8000d26e <- 0x6130541 -mem-write: 0x8000d272 <- 0x7130010 -mem-write: 0x8000d276 <- 0x8b930000 -mem-write: 0x8000d27a <- 0xf06f0004 -mem-write: 0x8000d27e <- 0xd139b0f -mem-write: 0x8000d282 <- 0xf06f0060 -mem-write: 0x8000d286 <- 0x793f49f -mem-write: 0x8000d28a <- 0x262303b1 -mem-write: 0x8000d28e <- 0x79304f1 -mem-write: 0x8000d292 <- 0x28230010 -mem-write: 0x8000d296 <- 0x61304f1 -mem-write: 0x8000d29a <- 0x6930010 -mem-write: 0x8000d29e <- 0xf06f0541 -mem-write: 0x8000d2a2 <- 0x2783918f -mem-write: 0x8000d2a6 <- 0x102300c1 -mem-write: 0x8000d2aa <- 0xe06f00f7 -mem-write: 0x8000d2ae <- 0x2783f91f -mem-write: 0x8000d2b2 <- 0xc930101 -mem-write: 0x8000d2b6 <- 0x28230000 -mem-write: 0x8000d2ba <- 0xad0300e1 -mem-write: 0x8000d2be <- 0xf06f0007 -mem-write: 0x8000d2c2 <- 0x2783b84f -mem-write: 0x8000d2c6 <- 0xc930101 -mem-write: 0x8000d2ca <- 0x28230000 -mem-write: 0x8000d2ce <- 0xad0300e1 -mem-write: 0x8000d2d2 <- 0x7130007 -mem-write: 0x8000d2d6 <- 0xf06f0010 -mem-write: 0x8000d2da <- 0x2783b74f -mem-write: 0x8000d2de <- 0x28230101 -mem-write: 0x8000d2e2 <- 0xad0300e1 -mem-write: 0x8000d2e6 <- 0x5c930007 -mem-write: 0x8000d2ea <- 0x871341fd -mem-write: 0x8000d2ee <- 0xf06f000c -mem-write: 0x8000d2f2 <- 0x2783a90f -mem-write: 0x8000d2f6 <- 0xc930101 -mem-write: 0x8000d2fa <- 0x28230000 -mem-write: 0x8000d2fe <- 0xad0300d1 -mem-write: 0x8000d302 <- 0xf06f0007 -mem-write: 0x8000d306 <- 0x613d75f -mem-write: 0x8000d30a <- 0x85930401 -mem-write: 0x8000d30e <- 0x5130009 -mem-write: 0x8000d312 <- 0xe0ef000a -mem-write: 0x8000d316 <- 0xf06fd21f -mem-write: 0x8000d31a <- 0x8d139a0f -mem-write: 0x8000d31e <- 0x2823000a -mem-write: 0x8000d322 <- 0xa9301b1 -mem-write: 0x8000d326 <- 0xf06f0000 -mem-write: 0x8000d32a <- 0x8593a94f -mem-write: 0x8000d32e <- 0xf06f0006 -mem-write: 0x8000d332 <- 0x59399df -mem-write: 0x8000d336 <- 0xf06f0016 -mem-write: 0x8000d33a <- 0xd93a71f -mem-write: 0x8000d33e <- 0xf06f000b -mem-write: 0x8000d342 <- 0x793a68f -mem-write: 0x8000d346 <- 0x2623fff0 -mem-write: 0x8000d34a <- 0xf06f00f1 -mem-write: 0x8000d34e <- 0x8513978f -mem-write: 0x8000d352 <- 0x5930006 -mem-write: 0x8000d356 <- 0xf06f0006 -mem-write: 0x8000d35a <- 0x2783f0cf -mem-write: 0x8000d35e <- 0xaa830101 -mem-write: 0x8000d362 <- 0x87930007 -mem-write: 0x8000d366 <- 0xd4630047 -mem-write: 0x8000d36a <- 0xa93000a -mem-write: 0x8000d36e <- 0x4703fff0 -mem-write: 0x8000d372 <- 0x2823001c -mem-write: 0x8000d376 <- 0x8c1300f1 -mem-write: 0x8000d37a <- 0xe06f0006 -mem-write: 0x8000d37e <- 0x793f69f -mem-write: 0x8000d382 <- 0xa5030005 -mem-write: 0x8000d386 <- 0x6931d81 -mem-write: 0x8000d38a <- 0x86130006 -mem-write: 0x8000d38e <- 0x85930005 -mem-write: 0x8000d392 <- 0xe06f0007 -mem-write: 0x8000d396 <- 0xd783da9f -mem-write: 0x8000d39a <- 0xae0300c5 -mem-write: 0x8000d39e <- 0xd3030645 -mem-write: 0x8000d3a2 <- 0xa88300e5 -mem-write: 0x8000d3a6 <- 0xa80301c5 -mem-write: 0x8000d3aa <- 0x1130245 -mem-write: 0x8000d3ae <- 0xf793b801 -mem-write: 0x8000d3b2 <- 0x713ffd7 -mem-write: 0x8000d3b6 <- 0x2c234000 -mem-write: 0x8000d3ba <- 0x1a234681 -mem-write: 0x8000d3be <- 0x841300f1 -mem-write: 0x8000d3c2 <- 0x7930005 -mem-write: 0x8000d3c6 <- 0x5930701 -mem-write: 0x8000d3ca <- 0x2a230081 -mem-write: 0x8000d3ce <- 0x28234691 -mem-write: 0x8000d3d2 <- 0x2e234721 -mem-write: 0x8000d3d6 <- 0x9134611 -mem-write: 0x8000d3da <- 0x26230005 -mem-write: 0x8000d3de <- 0x1b2307c1 -mem-write: 0x8000d3e2 <- 0x22230061 -mem-write: 0x8000d3e6 <- 0x26230311 -mem-write: 0x8000d3ea <- 0x24230301 -mem-write: 0x8000d3ee <- 0x2c2300f1 -mem-write: 0x8000d3f2 <- 0x282300f1 -mem-write: 0x8000d3f6 <- 0x2e2300e1 -VXDRV: upload 1024 bytes to 0x8000d3fa -mem-write: 0x8000d3fa <- 0x202300e1 -mem-write: 0x8000d3fe <- 0xe0ef0201 -mem-write: 0x8000d402 <- 0x493d3df -mem-write: 0x8000d406 <- 0x5c630005 -mem-write: 0x8000d40a <- 0x57830205 -mem-write: 0x8000d40e <- 0xf7930141 -mem-write: 0x8000d412 <- 0x88630407 -mem-write: 0x8000d416 <- 0x57830007 -mem-write: 0x8000d41a <- 0xe79300c4 -mem-write: 0x8000d41e <- 0x16230407 -mem-write: 0x8000d422 <- 0x208300f4 -mem-write: 0x8000d426 <- 0x240347c1 -mem-write: 0x8000d42a <- 0x29034781 -mem-write: 0x8000d42e <- 0x85134701 -mem-write: 0x8000d432 <- 0x24830004 -mem-write: 0x8000d436 <- 0x1134741 -mem-write: 0x8000d43a <- 0x80674801 -mem-write: 0x8000d43e <- 0x5930000 -mem-write: 0x8000d442 <- 0x5130081 -mem-write: 0x8000d446 <- 0x60ef0009 -mem-write: 0x8000d44a <- 0xe3c11f -mem-write: 0x8000d44e <- 0x493fc05 -mem-write: 0x8000d452 <- 0xf06ffff0 -mem-write: 0x8000d456 <- 0x113fb9f -mem-write: 0x8000d45a <- 0x8713ff01 -mem-write: 0x8000d45e <- 0x24230005 -mem-write: 0x8000d462 <- 0x22230081 -mem-write: 0x8000d466 <- 0x5930091 -mem-write: 0x8000d46a <- 0x4130006 -mem-write: 0x8000d46e <- 0x86130005 -mem-write: 0x8000d472 <- 0x5130006 -mem-write: 0x8000d476 <- 0x26230007 -mem-write: 0x8000d47a <- 0xa4230011 -mem-write: 0x8000d47e <- 0x30ef2401 -mem-write: 0x8000d482 <- 0x793858f -mem-write: 0x8000d486 <- 0xc63fff0 -mem-write: 0x8000d48a <- 0x208300f5 -mem-write: 0x8000d48e <- 0x240300c1 -mem-write: 0x8000d492 <- 0x24830081 -mem-write: 0x8000d496 <- 0x1130041 -mem-write: 0x8000d49a <- 0x80670101 -mem-write: 0x8000d49e <- 0xa7830000 -mem-write: 0x8000d4a2 <- 0x84e32481 -mem-write: 0x8000d4a6 <- 0x2083fe07 -mem-write: 0x8000d4aa <- 0x202300c1 -mem-write: 0x8000d4ae <- 0x240300f4 -mem-write: 0x8000d4b2 <- 0x24830081 -mem-write: 0x8000d4b6 <- 0x1130041 -mem-write: 0x8000d4ba <- 0x80670101 -mem-write: 0x8000d4be <- 0xa7030000 -mem-write: 0x8000d4c2 <- 0x1131d81 -mem-write: 0x8000d4c6 <- 0x8793ff01 -mem-write: 0x8000d4ca <- 0x8130006 -mem-write: 0x8000d4ce <- 0x26230006 -mem-write: 0x8000d4d2 <- 0x28830011 -mem-write: 0x8000d4d6 <- 0x69300c7 -mem-write: 0x8000d4da <- 0x87130005 -mem-write: 0x8000d4de <- 0x86130005 -mem-write: 0x8000d4e2 <- 0x630007 -mem-write: 0x8000d4e6 <- 0x57b70208 -mem-write: 0x8000d4ea <- 0x87938001 -mem-write: 0x8000d4ee <- 0x55b73207 -mem-write: 0x8000d4f2 <- 0x85938001 -mem-write: 0x8000d4f6 <- 0x85133305 -mem-write: 0x8000d4fa <- 0xef0008 -mem-write: 0x8000d4fe <- 0x20ef28c0 -mem-write: 0x8000d502 <- 0x58373a50 -mem-write: 0x8000d506 <- 0x7938001 -mem-write: 0x8000d50a <- 0x813a188 -mem-write: 0x8000d50e <- 0xf06fa188 -mem-write: 0x8000d512 <- 0x113fe1f -mem-write: 0x8000d516 <- 0x693ff01 -mem-write: 0x8000d51a <- 0x6130006 -mem-write: 0x8000d51e <- 0x26230000 -mem-write: 0x8000d522 <- 0xf0ef0011 -mem-write: 0x8000d526 <- 0x85b3f9df -mem-write: 0x8000d52a <- 0x11302c5 -mem-write: 0x8000d52e <- 0x2423ff01 -mem-write: 0x8000d532 <- 0x26230081 -mem-write: 0x8000d536 <- 0xa0ef0011 -mem-write: 0x8000d53a <- 0x413a00f -mem-write: 0x8000d53e <- 0x8630005 -mem-write: 0x8000d542 <- 0x26030205 -mem-write: 0x8000d546 <- 0x713ffc5 -mem-write: 0x8000d54a <- 0x76130240 -mem-write: 0x8000d54e <- 0x613ffc6 -mem-write: 0x8000d552 <- 0x6063ffc6 -mem-write: 0x8000d556 <- 0x69306c7 -mem-write: 0x8000d55a <- 0x7930130 -mem-write: 0x8000d55e <- 0xe2630005 -mem-write: 0x8000d562 <- 0xa02302c6 -mem-write: 0x8000d566 <- 0xa2230007 -mem-write: 0x8000d56a <- 0xa4230007 -mem-write: 0x8000d56e <- 0x20830007 -mem-write: 0x8000d572 <- 0x51300c1 -mem-write: 0x8000d576 <- 0x24030004 -mem-write: 0x8000d57a <- 0x1130081 -mem-write: 0x8000d57e <- 0x80670101 -mem-write: 0x8000d582 <- 0x20230000 -mem-write: 0x8000d586 <- 0x22230005 -mem-write: 0x8000d58a <- 0x7930005 -mem-write: 0x8000d58e <- 0xf06301b0 -mem-write: 0x8000d592 <- 0x242304c7 -mem-write: 0x8000d596 <- 0x26230005 -mem-write: 0x8000d59a <- 0x7930005 -mem-write: 0x8000d59e <- 0x12e30105 -mem-write: 0x8000d5a2 <- 0x2823fce6 -mem-write: 0x8000d5a6 <- 0x7930005 -mem-write: 0x8000d5aa <- 0x2a230185 -mem-write: 0x8000d5ae <- 0xf06f0005 -mem-write: 0x8000d5b2 <- 0x593fb5f -mem-write: 0x8000d5b6 <- 0x30ef0000 -mem-write: 0x8000d5ba <- 0x2083861f -mem-write: 0x8000d5be <- 0x51300c1 -mem-write: 0x8000d5c2 <- 0x24030004 -mem-write: 0x8000d5c6 <- 0x1130081 -mem-write: 0x8000d5ca <- 0x80670101 -mem-write: 0x8000d5ce <- 0x7930000 -mem-write: 0x8000d5d2 <- 0xf06f0085 -mem-write: 0x8000d5d6 <- 0x113f91f -mem-write: 0x8000d5da <- 0x2423ff01 -mem-write: 0x8000d5de <- 0x22230081 -mem-write: 0x8000d5e2 <- 0x4130091 -mem-write: 0x8000d5e6 <- 0x85130005 -mem-write: 0x8000d5ea <- 0x26230005 -mem-write: 0x8000d5ee <- 0xa4230011 -mem-write: 0x8000d5f2 <- 0x20ef2401 -mem-write: 0x8000d5f6 <- 0x793d31f -mem-write: 0x8000d5fa <- 0xc63fff0 -mem-write: 0x8000d5fe <- 0x208300f5 -mem-write: 0x8000d602 <- 0x240300c1 -mem-write: 0x8000d606 <- 0x24830081 -mem-write: 0x8000d60a <- 0x1130041 -mem-write: 0x8000d60e <- 0x80670101 -mem-write: 0x8000d612 <- 0xa7830000 -mem-write: 0x8000d616 <- 0x84e32481 -mem-write: 0x8000d61a <- 0x2083fe07 -mem-write: 0x8000d61e <- 0x202300c1 -mem-write: 0x8000d622 <- 0x240300f4 -mem-write: 0x8000d626 <- 0x24830081 -mem-write: 0x8000d62a <- 0x1130041 -mem-write: 0x8000d62e <- 0x80670101 -mem-write: 0x8000d632 <- 0x1130000 -mem-write: 0x8000d636 <- 0x2623ff01 -mem-write: 0x8000d63a <- 0x24230011 -mem-write: 0x8000d63e <- 0x22230081 -mem-write: 0x8000d642 <- 0x20230091 -mem-write: 0x8000d646 <- 0x80630121 -mem-write: 0x8000d64a <- 0x84130205 -mem-write: 0x8000d64e <- 0x4930005 -mem-write: 0x8000d652 <- 0x6630005 -mem-write: 0x8000d656 <- 0x27830005 -mem-write: 0x8000d65a <- 0x8c630385 -mem-write: 0x8000d65e <- 0x17830a07 -mem-write: 0x8000d662 <- 0x926300c4 -mem-write: 0x8000d666 <- 0x20830207 -mem-write: 0x8000d66a <- 0x240300c1 -mem-write: 0x8000d66e <- 0x9130081 -mem-write: 0x8000d672 <- 0x24830000 -mem-write: 0x8000d676 <- 0x5130041 -mem-write: 0x8000d67a <- 0x29030009 -mem-write: 0x8000d67e <- 0x1130001 -mem-write: 0x8000d682 <- 0x80670101 -mem-write: 0x8000d686 <- 0x5930000 -mem-write: 0x8000d68a <- 0x85130004 -mem-write: 0x8000d68e <- 0x60ef0004 -mem-write: 0x8000d692 <- 0x2783f6cf -mem-write: 0x8000d696 <- 0x91302c4 -mem-write: 0x8000d69a <- 0x8a630005 -mem-write: 0x8000d69e <- 0x25830007 -mem-write: 0x8000d6a2 <- 0x851301c4 -mem-write: 0x8000d6a6 <- 0x80e70004 -mem-write: 0x8000d6aa <- 0x4c630007 -mem-write: 0x8000d6ae <- 0x57830605 -mem-write: 0x8000d6b2 <- 0xf79300c4 -mem-write: 0x8000d6b6 <- 0x9e630807 -mem-write: 0x8000d6ba <- 0x25830607 -mem-write: 0x8000d6be <- 0x8c630304 -mem-write: 0x8000d6c2 <- 0x7930005 -mem-write: 0x8000d6c6 <- 0x86630404 -mem-write: 0x8000d6ca <- 0x851300f5 -mem-write: 0x8000d6ce <- 0x60ef0004 -mem-write: 0x8000d6d2 <- 0x2823e95f -mem-write: 0x8000d6d6 <- 0x25830204 -mem-write: 0x8000d6da <- 0x88630444 -mem-write: 0x8000d6de <- 0x85130005 -mem-write: 0x8000d6e2 <- 0x60ef0004 -mem-write: 0x8000d6e6 <- 0x2223e81f -mem-write: 0x8000d6ea <- 0x60ef0404 -mem-write: 0x8000d6ee <- 0x1623d19f -mem-write: 0x8000d6f2 <- 0x60ef0004 -mem-write: 0x8000d6f6 <- 0x2083d15f -mem-write: 0x8000d6fa <- 0x240300c1 -mem-write: 0x8000d6fe <- 0x24830081 -mem-write: 0x8000d702 <- 0x5130041 -mem-write: 0x8000d706 <- 0x29030009 -mem-write: 0x8000d70a <- 0x1130001 -mem-write: 0x8000d70e <- 0x80670101 -mem-write: 0x8000d712 <- 0x60ef0000 -mem-write: 0x8000d716 <- 0x1783ce1f -mem-write: 0x8000d71a <- 0x86e300c4 -mem-write: 0x8000d71e <- 0xf06ff407 -mem-write: 0x8000d722 <- 0x5783f69f -mem-write: 0x8000d726 <- 0x91300c4 -mem-write: 0x8000d72a <- 0xf793fff0 -mem-write: 0x8000d72e <- 0x86e30807 -mem-write: 0x8000d732 <- 0x2583f807 -mem-write: 0x8000d736 <- 0x85130104 -mem-write: 0x8000d73a <- 0x60ef0004 -mem-write: 0x8000d73e <- 0xf06fe29f -mem-write: 0x8000d742 <- 0x593f7df -mem-write: 0x8000d746 <- 0xa5030005 -mem-write: 0x8000d74a <- 0xf06f1d81 -mem-write: 0x8000d74e <- 0x113ee9f -mem-write: 0x8000d752 <- 0x313fc01 -mem-write: 0x8000d756 <- 0x262302c1 -mem-write: 0x8000d75a <- 0x69302d1 -mem-write: 0x8000d75e <- 0x2e230003 -mem-write: 0x8000d762 <- 0x28230011 -mem-write: 0x8000d766 <- 0x2a2302e1 -mem-write: 0x8000d76a <- 0x2c2302f1 -mem-write: 0x8000d76e <- 0x2e230301 -mem-write: 0x8000d772 <- 0x26230311 -mem-write: 0x8000d776 <- 0xe0ef0061 -mem-write: 0x8000d77a <- 0x20839c5f -mem-write: 0x8000d77e <- 0x11301c1 -mem-write: 0x8000d782 <- 0x80670401 -mem-write: 0x8000d786 <- 0xe130000 -mem-write: 0x8000d78a <- 0x1130005 -mem-write: 0x8000d78e <- 0xa503fc01 -mem-write: 0x8000d792 <- 0x3131d81 -mem-write: 0x8000d796 <- 0x24230281 -mem-write: 0x8000d79a <- 0x262302c1 -mem-write: 0x8000d79e <- 0x861302d1 -mem-write: 0x8000d7a2 <- 0x6930005 -mem-write: 0x8000d7a6 <- 0x5930003 -mem-write: 0x8000d7aa <- 0x2e23000e -mem-write: 0x8000d7ae <- 0x28230011 -mem-write: 0x8000d7b2 <- 0x2a2302e1 -mem-write: 0x8000d7b6 <- 0x2c2302f1 -mem-write: 0x8000d7ba <- 0x2e230301 -mem-write: 0x8000d7be <- 0x26230311 -mem-write: 0x8000d7c2 <- 0xe0ef0061 -mem-write: 0x8000d7c6 <- 0x2083979f -mem-write: 0x8000d7ca <- 0x11301c1 -mem-write: 0x8000d7ce <- 0x80670401 -mem-write: 0x8000d7d2 <- 0x1130000 -mem-write: 0x8000d7d6 <- 0x2423fd01 -mem-write: 0x8000d7da <- 0x2e230281 -mem-write: 0x8000d7de <- 0x28230131 -mem-write: 0x8000d7e2 <- 0x26230161 -mem-write: 0x8000d7e6 <- 0x22230211 -mem-write: 0x8000d7ea <- 0x20230291 -mem-write: 0x8000d7ee <- 0x2c230321 -mem-write: 0x8000d7f2 <- 0x2a230141 -mem-write: 0x8000d7f6 <- 0xb130151 -VXDRV: upload 1024 bytes to 0x8000d7fa -mem-write: 0x8000d7fa <- 0x89930005 -mem-write: 0x8000d7fe <- 0x4130005 -mem-write: 0x8000d802 <- 0xef0006 -mem-write: 0x8000d806 <- 0x7937880 -mem-write: 0x8000d80a <- 0x10630010 -mem-write: 0x8000d80e <- 0x879302f5 -mem-write: 0x8000d812 <- 0x713fff9 -mem-write: 0x8000d816 <- 0x6a630fe0 -mem-write: 0x8000d81a <- 0xf71300f7 -mem-write: 0x8000d81e <- 0x6230ff9 -mem-write: 0x8000d822 <- 0x91300e1 -mem-write: 0x8000d826 <- 0x6f0010 -mem-write: 0x8000d82a <- 0x69302c0 -mem-write: 0x8000d82e <- 0x861305c4 -mem-write: 0x8000d832 <- 0x5930009 -mem-write: 0x8000d836 <- 0x51300c1 -mem-write: 0x8000d83a <- 0x20ef000b -mem-write: 0x8000d83e <- 0x7937300 -mem-write: 0x8000d842 <- 0x913fff0 -mem-write: 0x8000d846 <- 0x4630005 -mem-write: 0x8000d84a <- 0xe630af5 -mem-write: 0x8000d84e <- 0x47030805 -mem-write: 0x8000d852 <- 0x49300c1 -mem-write: 0x8000d856 <- 0xa130000 -mem-write: 0x8000d85a <- 0xa93fff0 -mem-write: 0x8000d85e <- 0x6f00a0 -mem-write: 0x8000d862 <- 0x27830280 -mem-write: 0x8000d866 <- 0x86930004 -mem-write: 0x8000d86a <- 0x20230017 -mem-write: 0x8000d86e <- 0x802300d4 -mem-write: 0x8000d872 <- 0x849300e7 -mem-write: 0x8000d876 <- 0x7930014 -mem-write: 0x8000d87a <- 0x87b300c1 -mem-write: 0x8000d87e <- 0xf4630097 -mem-write: 0x8000d882 <- 0xc7030724 -mem-write: 0x8000d886 <- 0x27830007 -mem-write: 0x8000d88a <- 0x87930084 -mem-write: 0x8000d88e <- 0x2423fff7 -mem-write: 0x8000d892 <- 0xd8e300f4 -mem-write: 0x8000d896 <- 0x2683fc07 -mem-write: 0x8000d89a <- 0x5930184 -mem-write: 0x8000d89e <- 0x6130007 -mem-write: 0x8000d8a2 <- 0x5130004 -mem-write: 0x8000d8a6 <- 0xc463000b -mem-write: 0x8000d8aa <- 0x1ce300d7 -mem-write: 0x8000d8ae <- 0x20effb57 -mem-write: 0x8000d8b2 <- 0x10e35240 -mem-write: 0x8000d8b6 <- 0x913fd45 -mem-write: 0x8000d8ba <- 0x2083fff0 -mem-write: 0x8000d8be <- 0x240302c1 -mem-write: 0x8000d8c2 <- 0x24830281 -mem-write: 0x8000d8c6 <- 0x29830241 -mem-write: 0x8000d8ca <- 0x2a0301c1 -mem-write: 0x8000d8ce <- 0x2a830181 -mem-write: 0x8000d8d2 <- 0x2b030141 -mem-write: 0x8000d8d6 <- 0x5130101 -mem-write: 0x8000d8da <- 0x29030009 -mem-write: 0x8000d8de <- 0x1130201 -mem-write: 0x8000d8e2 <- 0x80670301 -mem-write: 0x8000d8e6 <- 0x89130000 -mem-write: 0x8000d8ea <- 0xf06f0009 -mem-write: 0x8000d8ee <- 0x5783fd1f -mem-write: 0x8000d8f2 <- 0xe79300c4 -mem-write: 0x8000d8f6 <- 0x16230407 -mem-write: 0x8000d8fa <- 0xf06f00f4 -mem-write: 0x8000d8fe <- 0x1783fc1f -mem-write: 0x8000d902 <- 0x971300c6 -mem-write: 0x8000d906 <- 0x40630127 -mem-write: 0x8000d90a <- 0x27030207 -mem-write: 0x8000d90e <- 0x26b70646 -mem-write: 0x8000d912 <- 0xe7b30000 -mem-write: 0x8000d916 <- 0x26b700d7 -mem-write: 0x8000d91a <- 0x67330000 -mem-write: 0x8000d91e <- 0x162300d7 -mem-write: 0x8000d922 <- 0x222300f6 -mem-write: 0x8000d926 <- 0xf06f06e6 -mem-write: 0x8000d92a <- 0x113eadf -mem-write: 0x8000d92e <- 0x2c23fe01 -mem-write: 0x8000d932 <- 0xa4030081 -mem-write: 0x8000d936 <- 0x2e231d81 -mem-write: 0x8000d93a <- 0x86130011 -mem-write: 0x8000d93e <- 0x5930005 -mem-write: 0x8000d942 <- 0x6630005 -mem-write: 0x8000d946 <- 0x27830004 -mem-write: 0x8000d94a <- 0x80630384 -mem-write: 0x8000d94e <- 0x17830407 -mem-write: 0x8000d952 <- 0x971300c6 -mem-write: 0x8000d956 <- 0x40630127 -mem-write: 0x8000d95a <- 0x27030207 -mem-write: 0x8000d95e <- 0x26b70646 -mem-write: 0x8000d962 <- 0xe7b30000 -mem-write: 0x8000d966 <- 0x26b700d7 -mem-write: 0x8000d96a <- 0x67330000 -mem-write: 0x8000d96e <- 0x162300d7 -mem-write: 0x8000d972 <- 0x222300f6 -mem-write: 0x8000d976 <- 0x51306e6 -mem-write: 0x8000d97a <- 0x24030004 -mem-write: 0x8000d97e <- 0x20830181 -mem-write: 0x8000d982 <- 0x11301c1 -mem-write: 0x8000d986 <- 0xf06f0201 -mem-write: 0x8000d98a <- 0x2423e4df -mem-write: 0x8000d98e <- 0x51300a1 -mem-write: 0x8000d992 <- 0x26230004 -mem-write: 0x8000d996 <- 0x60ef00c1 -mem-write: 0x8000d99a <- 0x2603a5df -mem-write: 0x8000d99e <- 0x258300c1 -mem-write: 0x8000d9a2 <- 0xf06f0081 -mem-write: 0x8000d9a6 <- 0x113fadf -mem-write: 0x8000d9aa <- 0x8713ff01 -mem-write: 0x8000d9ae <- 0x24230005 -mem-write: 0x8000d9b2 <- 0x22230081 -mem-write: 0x8000d9b6 <- 0x4130091 -mem-write: 0x8000d9ba <- 0x5930005 -mem-write: 0x8000d9be <- 0x5130006 -mem-write: 0x8000d9c2 <- 0x26230007 -mem-write: 0x8000d9c6 <- 0xa4230011 -mem-write: 0x8000d9ca <- 0x20ef2401 -mem-write: 0x8000d9ce <- 0x79395df -mem-write: 0x8000d9d2 <- 0xc63fff0 -mem-write: 0x8000d9d6 <- 0x208300f5 -mem-write: 0x8000d9da <- 0x240300c1 -mem-write: 0x8000d9de <- 0x24830081 -mem-write: 0x8000d9e2 <- 0x1130041 -mem-write: 0x8000d9e6 <- 0x80670101 -mem-write: 0x8000d9ea <- 0xa7830000 -mem-write: 0x8000d9ee <- 0x84e32481 -mem-write: 0x8000d9f2 <- 0x2083fe07 -mem-write: 0x8000d9f6 <- 0x202300c1 -mem-write: 0x8000d9fa <- 0x240300f4 -mem-write: 0x8000d9fe <- 0x24830081 -mem-write: 0x8000da02 <- 0x1130041 -mem-write: 0x8000da06 <- 0x80670101 -mem-write: 0x8000da0a <- 0x27830000 -mem-write: 0x8000da0e <- 0x8e630086 -mem-write: 0x8000da12 <- 0xd7833207 -mem-write: 0x8000da16 <- 0x11300c5 -mem-write: 0x8000da1a <- 0x2423fd01 -mem-write: 0x8000da1e <- 0x2c230281 -mem-write: 0x8000da22 <- 0x2a230141 -mem-write: 0x8000da26 <- 0x26230151 -mem-write: 0x8000da2a <- 0x22230211 -mem-write: 0x8000da2e <- 0x20230291 -mem-write: 0x8000da32 <- 0x2e230321 -mem-write: 0x8000da36 <- 0x28230131 -mem-write: 0x8000da3a <- 0x26230161 -mem-write: 0x8000da3e <- 0x24230171 -mem-write: 0x8000da42 <- 0x22230181 -mem-write: 0x8000da46 <- 0x20230191 -mem-write: 0x8000da4a <- 0xf71301a1 -mem-write: 0x8000da4e <- 0xa130087 -mem-write: 0x8000da52 <- 0xa930006 -mem-write: 0x8000da56 <- 0x84130005 -mem-write: 0x8000da5a <- 0x6630005 -mem-write: 0x8000da5e <- 0xa7030807 -mem-write: 0x8000da62 <- 0x2630105 -mem-write: 0x8000da66 <- 0xf7130807 -mem-write: 0x8000da6a <- 0x24830027 -mem-write: 0x8000da6e <- 0xc63000a -mem-write: 0x8000da72 <- 0x27830807 -mem-write: 0x8000da76 <- 0x25830244 -mem-write: 0x8000da7a <- 0xb3701c4 -mem-write: 0x8000da7e <- 0x9938000 -mem-write: 0x8000da82 <- 0x9130000 -mem-write: 0x8000da86 <- 0x4b130000 -mem-write: 0x8000da8a <- 0x8613c00b -mem-write: 0x8000da8e <- 0x85130009 -mem-write: 0x8000da92 <- 0x263000a -mem-write: 0x8000da96 <- 0x6930409 -mem-write: 0x8000da9a <- 0x74630009 -mem-write: 0x8000da9e <- 0x693012b -mem-write: 0x8000daa2 <- 0x80e7000b -mem-write: 0x8000daa6 <- 0x58630007 -mem-write: 0x8000daaa <- 0x278328a0 -mem-write: 0x8000daae <- 0x89b3008a -mem-write: 0x8000dab2 <- 0x93300a9 -mem-write: 0x8000dab6 <- 0x853340a9 -mem-write: 0x8000daba <- 0x242340a7 -mem-write: 0x8000dabe <- 0xa6300aa -mem-write: 0x8000dac2 <- 0x27832005 -mem-write: 0x8000dac6 <- 0x25830244 -mem-write: 0x8000daca <- 0x861301c4 -mem-write: 0x8000dace <- 0x85130009 -mem-write: 0x8000dad2 <- 0x12e3000a -mem-write: 0x8000dad6 <- 0xa983fc09 -mem-write: 0x8000dada <- 0xa9030004 -mem-write: 0x8000dade <- 0x84930044 -mem-write: 0x8000dae2 <- 0xf06f0084 -mem-write: 0x8000dae6 <- 0x593fa9f -mem-write: 0x8000daea <- 0x85130004 -mem-write: 0x8000daee <- 0x50ef000a -mem-write: 0x8000daf2 <- 0x1c63ff9f -mem-write: 0x8000daf6 <- 0x57833a05 -mem-write: 0x8000dafa <- 0x248300c4 -mem-write: 0x8000dafe <- 0xf713000a -mem-write: 0x8000db02 <- 0x18e30027 -mem-write: 0x8000db06 <- 0xf713f607 -mem-write: 0x8000db0a <- 0x14630017 -mem-write: 0x8000db0e <- 0x2c832407 -mem-write: 0x8000db12 <- 0x25030084 -mem-write: 0x8000db16 <- 0xb370004 -mem-write: 0x8000db1a <- 0x4b938000 -mem-write: 0x8000db1e <- 0xc13ffeb -mem-write: 0x8000db22 <- 0x9130000 -mem-write: 0x8000db26 <- 0x4b130000 -mem-write: 0x8000db2a <- 0xe63fffb -mem-write: 0x8000db2e <- 0xf7130e09 -mem-write: 0x8000db32 <- 0xc632007 -mem-write: 0x8000db36 <- 0x8d132407 -mem-write: 0x8000db3a <- 0x6263000c -mem-write: 0x8000db3e <- 0xf7132f99 -mem-write: 0x8000db42 <- 0xa634807 -mem-write: 0x8000db46 <- 0x29830807 -mem-write: 0x8000db4a <- 0x25830144 -mem-write: 0x8000db4e <- 0x7130104 -mem-write: 0x8000db52 <- 0x96930019 -mem-write: 0x8000db56 <- 0x86b30019 -mem-write: 0x8000db5a <- 0xd9930136 -mem-write: 0x8000db5e <- 0xd3301f6 -mem-write: 0x8000db62 <- 0x89b340b5 -mem-write: 0x8000db66 <- 0xd99300d9 -mem-write: 0x8000db6a <- 0x7334019 -mem-write: 0x8000db6e <- 0x861301a7 -mem-write: 0x8000db72 <- 0xf6630009 -mem-write: 0x8000db76 <- 0x99300e9 -mem-write: 0x8000db7a <- 0x6130007 -mem-write: 0x8000db7e <- 0xf7930007 -mem-write: 0x8000db82 <- 0x84634007 -mem-write: 0x8000db86 <- 0x5932e07 -mem-write: 0x8000db8a <- 0x85130006 -mem-write: 0x8000db8e <- 0x90ef000a -mem-write: 0x8000db92 <- 0xc93ba9f -mem-write: 0x8000db96 <- 0x2630005 -mem-write: 0x8000db9a <- 0x25833005 -mem-write: 0x8000db9e <- 0x6130104 -mem-write: 0x8000dba2 <- 0xef000d -mem-write: 0x8000dba6 <- 0x57834dc0 -mem-write: 0x8000dbaa <- 0xf79300c4 -mem-write: 0x8000dbae <- 0xe793b7f7 -mem-write: 0x8000dbb2 <- 0x16230807 -mem-write: 0x8000dbb6 <- 0x853300f4 -mem-write: 0x8000dbba <- 0x87b301ac -mem-write: 0x8000dbbe <- 0x282341a9 -mem-write: 0x8000dbc2 <- 0x20230194 -mem-write: 0x8000dbc6 <- 0x2a2300a4 -mem-write: 0x8000dbca <- 0xc930134 -mem-write: 0x8000dbce <- 0x24230009 -mem-write: 0x8000dbd2 <- 0xd1300f4 -mem-write: 0x8000dbd6 <- 0x6130009 -mem-write: 0x8000dbda <- 0x593000d -mem-write: 0x8000dbde <- 0xef000c -mem-write: 0x8000dbe2 <- 0x27035bc0 -mem-write: 0x8000dbe6 <- 0x27830084 -mem-write: 0x8000dbea <- 0x9930004 -mem-write: 0x8000dbee <- 0xcb30009 -mem-write: 0x8000dbf2 <- 0x87b34197 -mem-write: 0x8000dbf6 <- 0x242301a7 -VXDRV: upload 1023 bytes to 0x8000dbfa -mem-write: 0x8000dbfa <- 0x20230194 -mem-write: 0x8000dbfe <- 0x91300f4 -mem-write: 0x8000dc02 <- 0x26030000 -mem-write: 0x8000dc06 <- 0xc33008a -mem-write: 0x8000dc0a <- 0x9b3013c -mem-write: 0x8000dc0e <- 0x24234136 -mem-write: 0x8000dc12 <- 0x8063013a -mem-write: 0x8000dc16 <- 0x2c830c09 -mem-write: 0x8000dc1a <- 0x25030084 -mem-write: 0x8000dc1e <- 0x57830004 -mem-write: 0x8000dc22 <- 0x16e300c4 -mem-write: 0x8000dc26 <- 0xac03f009 -mem-write: 0x8000dc2a <- 0xa9030004 -mem-write: 0x8000dc2e <- 0x84930044 -mem-write: 0x8000dc32 <- 0xf06f0084 -mem-write: 0x8000dc36 <- 0xa983ef9f -mem-write: 0x8000dc3a <- 0xac030044 -mem-write: 0x8000dc3e <- 0x84930004 -mem-write: 0x8000dc42 <- 0x8ae30084 -mem-write: 0x8000dc46 <- 0x8613fe09 -mem-write: 0x8000dc4a <- 0x5930009 -mem-write: 0x8000dc4e <- 0x51300a0 -mem-write: 0x8000dc52 <- 0xa0ef000c -mem-write: 0x8000dc56 <- 0x463a7cf -mem-write: 0x8000dc5a <- 0x5131205 -mem-write: 0x8000dc5e <- 0xb330015 -mem-write: 0x8000dc62 <- 0x7934185 -mem-write: 0x8000dc66 <- 0x8b93000b -mem-write: 0x8000dc6a <- 0xf4630009 -mem-write: 0x8000dc6e <- 0x8b930137 -mem-write: 0x8000dc72 <- 0x25030007 -mem-write: 0x8000dc76 <- 0x27830004 -mem-write: 0x8000dc7a <- 0x26830104 -mem-write: 0x8000dc7e <- 0xf8630144 -mem-write: 0x8000dc82 <- 0x290300a7 -mem-write: 0x8000dc86 <- 0x89330084 -mem-write: 0x8000dc8a <- 0x42630126 -mem-write: 0x8000dc8e <- 0xc8630979 -mem-write: 0x8000dc92 <- 0x27831adb -mem-write: 0x8000dc96 <- 0x25830244 -mem-write: 0x8000dc9a <- 0x61301c4 -mem-write: 0x8000dc9e <- 0x8513000c -mem-write: 0x8000dca2 <- 0x80e7000a -mem-write: 0x8000dca6 <- 0x9130007 -mem-write: 0x8000dcaa <- 0x56630005 -mem-write: 0x8000dcae <- 0xb3308a0 -mem-write: 0x8000dcb2 <- 0x513412b -mem-write: 0x8000dcb6 <- 0xa630010 -mem-write: 0x8000dcba <- 0x2603160b -mem-write: 0x8000dcbe <- 0xc33008a -mem-write: 0x8000dcc2 <- 0x89b3012c -mem-write: 0x8000dcc6 <- 0x9334129 -mem-write: 0x8000dcca <- 0x24234126 -mem-write: 0x8000dcce <- 0x1a63012a -mem-write: 0x8000dcd2 <- 0x5130809 -mem-write: 0x8000dcd6 <- 0x20830000 -mem-write: 0x8000dcda <- 0x240302c1 -mem-write: 0x8000dcde <- 0x24830281 -mem-write: 0x8000dce2 <- 0x29030241 -mem-write: 0x8000dce6 <- 0x29830201 -mem-write: 0x8000dcea <- 0x2a0301c1 -mem-write: 0x8000dcee <- 0x2a830181 -mem-write: 0x8000dcf2 <- 0x2b030141 -mem-write: 0x8000dcf6 <- 0x2b830101 -mem-write: 0x8000dcfa <- 0x2c0300c1 -mem-write: 0x8000dcfe <- 0x2c830081 -mem-write: 0x8000dd02 <- 0x2d030041 -mem-write: 0x8000dd06 <- 0x1130001 -mem-write: 0x8000dd0a <- 0x80670301 -mem-write: 0x8000dd0e <- 0x5930000 -mem-write: 0x8000dd12 <- 0x613000c -mem-write: 0x8000dd16 <- 0xef0009 -mem-write: 0x8000dd1a <- 0x27834840 -mem-write: 0x8000dd1e <- 0x5930004 -mem-write: 0x8000dd22 <- 0x85130004 -mem-write: 0x8000dd26 <- 0x87b3000a -mem-write: 0x8000dd2a <- 0x20230127 -mem-write: 0x8000dd2e <- 0x60ef00f4 -mem-write: 0x8000dd32 <- 0xee3b28f -mem-write: 0x8000dd36 <- 0x1783f605 -mem-write: 0x8000dd3a <- 0xe79300c4 -mem-write: 0x8000dd3e <- 0x16230407 -mem-write: 0x8000dd42 <- 0x51300f4 -mem-write: 0x8000dd46 <- 0xf06ffff0 -mem-write: 0x8000dd4a <- 0x513f91f -mem-write: 0x8000dd4e <- 0x80670000 -mem-write: 0x8000dd52 <- 0xb130000 -mem-write: 0x8000dd56 <- 0x5130000 -mem-write: 0x8000dd5a <- 0xc130000 -mem-write: 0x8000dd5e <- 0x9930000 -mem-write: 0x8000dd62 <- 0x8ae30000 -mem-write: 0x8000dd66 <- 0x1ee3ec09 -mem-write: 0x8000dd6a <- 0x8613ee05 -mem-write: 0x8000dd6e <- 0x5930009 -mem-write: 0x8000dd72 <- 0x51300a0 -mem-write: 0x8000dd76 <- 0xa0ef000c -mem-write: 0x8000dd7a <- 0x10e3958f -mem-write: 0x8000dd7e <- 0x8793ee05 -mem-write: 0x8000dd82 <- 0x8b130019 -mem-write: 0x8000dd86 <- 0xf06f0007 -mem-write: 0x8000dd8a <- 0x2783ee1f -mem-write: 0x8000dd8e <- 0xe2630104 -mem-write: 0x8000dd92 <- 0x278304a7 -mem-write: 0x8000dd96 <- 0x6e630144 -mem-write: 0x8000dd9a <- 0x69302f9 -mem-write: 0x8000dd9e <- 0xf4630009 -mem-write: 0x8000dda2 <- 0x693012b -mem-write: 0x8000dda6 <- 0xc6b3000b -mem-write: 0x8000ddaa <- 0x270302f6 -mem-write: 0x8000ddae <- 0x25830244 -mem-write: 0x8000ddb2 <- 0x61301c4 -mem-write: 0x8000ddb6 <- 0x8513000c -mem-write: 0x8000ddba <- 0x86b3000a -mem-write: 0x8000ddbe <- 0xe702f6 -mem-write: 0x8000ddc2 <- 0x9930007 -mem-write: 0x8000ddc6 <- 0x58e30005 -mem-write: 0x8000ddca <- 0x933f6a0 -mem-write: 0x8000ddce <- 0xf06f4139 -mem-write: 0x8000ddd2 <- 0x8993e35f -mem-write: 0x8000ddd6 <- 0x7463000c -mem-write: 0x8000ddda <- 0x9930199 -mem-write: 0x8000ddde <- 0x86130009 -mem-write: 0x8000dde2 <- 0x5930009 -mem-write: 0x8000dde6 <- 0xef000c -mem-write: 0x8000ddea <- 0x27833b40 -mem-write: 0x8000ddee <- 0x27030084 -mem-write: 0x8000ddf2 <- 0x87b30004 -mem-write: 0x8000ddf6 <- 0x7334137 -mem-write: 0x8000ddfa <- 0x24230137 -mem-write: 0x8000ddfe <- 0x202300f4 -mem-write: 0x8000de02 <- 0x94e300e4 -mem-write: 0x8000de06 <- 0x593fc07 -mem-write: 0x8000de0a <- 0x85130004 -mem-write: 0x8000de0e <- 0x60ef000a -mem-write: 0x8000de12 <- 0x12e3a48f -mem-write: 0x8000de16 <- 0x933f205 -mem-write: 0x8000de1a <- 0xf06f4139 -mem-write: 0x8000de1e <- 0xc93de9f -mem-write: 0x8000de22 <- 0xd130009 -mem-write: 0x8000de26 <- 0xf06f0009 -mem-write: 0x8000de2a <- 0x593db1f -mem-write: 0x8000de2e <- 0x85130004 -mem-write: 0x8000de32 <- 0x60ef000a -mem-write: 0x8000de36 <- 0x2e3a24f -mem-write: 0x8000de3a <- 0xf06fe805 -mem-write: 0x8000de3e <- 0x8613efdf -mem-write: 0x8000de42 <- 0x593000b -mem-write: 0x8000de46 <- 0xef000c -mem-write: 0x8000de4a <- 0x27833540 -mem-write: 0x8000de4e <- 0x26030084 -mem-write: 0x8000de52 <- 0x89130004 -mem-write: 0x8000de56 <- 0x87b3000b -mem-write: 0x8000de5a <- 0x6334177 -mem-write: 0x8000de5e <- 0x24230176 -mem-write: 0x8000de62 <- 0x202300f4 -mem-write: 0x8000de66 <- 0xf06f00c4 -mem-write: 0x8000de6a <- 0x8513e49f -mem-write: 0x8000de6e <- 0xef000a -mem-write: 0x8000de72 <- 0xc934b40 -mem-write: 0x8000de76 <- 0x10e30005 -mem-write: 0x8000de7a <- 0x2583d405 -mem-write: 0x8000de7e <- 0x85130104 -mem-write: 0x8000de82 <- 0x60ef000a -mem-write: 0x8000de86 <- 0x1783ee0f -mem-write: 0x8000de8a <- 0x71300c4 -mem-write: 0x8000de8e <- 0xa02300c0 -mem-write: 0x8000de92 <- 0xf79300ea -mem-write: 0x8000de96 <- 0xf06ff7f7 -mem-write: 0x8000de9a <- 0x713ea5f -mem-write: 0x8000de9e <- 0x178300c0 -mem-write: 0x8000dea2 <- 0xa02300c4 -mem-write: 0x8000dea6 <- 0xf06f00ea -mem-write: 0x8000deaa <- 0x513e95f -mem-write: 0x8000deae <- 0xf06ffff0 -mem-write: 0x8000deb2 <- 0x113e29f -mem-write: 0x8000deb6 <- 0x2423ff01 -mem-write: 0x8000deba <- 0x22230081 -mem-write: 0x8000debe <- 0x4130091 -mem-write: 0x8000dec2 <- 0x85130005 -mem-write: 0x8000dec6 <- 0x26230005 -mem-write: 0x8000deca <- 0xa4230011 -mem-write: 0x8000dece <- 0x20ef2401 -mem-write: 0x8000ded2 <- 0x793c68f -mem-write: 0x8000ded6 <- 0xc63fff0 -mem-write: 0x8000deda <- 0x208300f5 -mem-write: 0x8000dede <- 0x240300c1 -mem-write: 0x8000dee2 <- 0x24830081 -mem-write: 0x8000dee6 <- 0x1130041 -mem-write: 0x8000deea <- 0x80670101 -mem-write: 0x8000deee <- 0xa7830000 -mem-write: 0x8000def2 <- 0x84e32481 -mem-write: 0x8000def6 <- 0x2083fe07 -mem-write: 0x8000defa <- 0x202300c1 -mem-write: 0x8000defe <- 0x240300f4 -mem-write: 0x8000df02 <- 0x24830081 -mem-write: 0x8000df06 <- 0x1130041 -mem-write: 0x8000df0a <- 0x80670101 -mem-write: 0x8000df0e <- 0x1130000 -mem-write: 0x8000df12 <- 0x2623ff01 -mem-write: 0x8000df16 <- 0x24230011 -mem-write: 0x8000df1a <- 0x22230081 -mem-write: 0x8000df1e <- 0xc630091 -mem-write: 0x8000df22 <- 0x55b70206 -mem-write: 0x8000df26 <- 0x85938001 -mem-write: 0x8000df2a <- 0x5133645 -mem-write: 0x8000df2e <- 0x4130006 -mem-write: 0x8000df32 <- 0xef0006 -mem-write: 0x8000df36 <- 0x54b72ad0 -mem-write: 0x8000df3a <- 0x12638001 -mem-write: 0x8000df3e <- 0x85130205 -mem-write: 0x8000df42 <- 0x20833604 -mem-write: 0x8000df46 <- 0x240300c1 -mem-write: 0x8000df4a <- 0x24830081 -mem-write: 0x8000df4e <- 0x1130041 -mem-write: 0x8000df52 <- 0x80670101 -mem-write: 0x8000df56 <- 0x54b70000 -mem-write: 0x8000df5a <- 0xf06f8001 -mem-write: 0x8000df5e <- 0x8593fe5f -mem-write: 0x8000df62 <- 0x5133604 -mem-write: 0x8000df66 <- 0xef0004 -mem-write: 0x8000df6a <- 0xae32790 -mem-write: 0x8000df6e <- 0x55b7fc05 -mem-write: 0x8000df72 <- 0x85938001 -mem-write: 0x8000df76 <- 0x513a185 -mem-write: 0x8000df7a <- 0xef0004 -mem-write: 0x8000df7e <- 0xe32650 -mem-write: 0x8000df82 <- 0x513fc05 -mem-write: 0x8000df86 <- 0xf06f0000 -mem-write: 0x8000df8a <- 0xc503fbdf -mem-write: 0x8000df8e <- 0x80671601 -mem-write: 0x8000df92 <- 0x7930000 -mem-write: 0x8000df96 <- 0xa5030005 -mem-write: 0x8000df9a <- 0x86131d81 -mem-write: 0x8000df9e <- 0x85930005 -mem-write: 0x8000dfa2 <- 0xf06f0007 -mem-write: 0x8000dfa6 <- 0x113f6df -mem-write: 0x8000dfaa <- 0x8713ff01 -mem-write: 0x8000dfae <- 0x24230005 -mem-write: 0x8000dfb2 <- 0x22230081 -mem-write: 0x8000dfb6 <- 0x5930091 -mem-write: 0x8000dfba <- 0x4130006 -mem-write: 0x8000dfbe <- 0x86130005 -mem-write: 0x8000dfc2 <- 0x5130006 -mem-write: 0x8000dfc6 <- 0x26230007 -mem-write: 0x8000dfca <- 0xa4230011 -mem-write: 0x8000dfce <- 0x20ef2401 -mem-write: 0x8000dfd2 <- 0x793b70f -mem-write: 0x8000dfd6 <- 0xc63fff0 -mem-write: 0x8000dfda <- 0x208300f5 -mem-write: 0x8000dfde <- 0x240300c1 -mem-write: 0x8000dfe2 <- 0x24830081 -mem-write: 0x8000dfe6 <- 0x1130041 -mem-write: 0x8000dfea <- 0x80670101 -mem-write: 0x8000dfee <- 0xa7830000 -mem-write: 0x8000dff2 <- 0x84e32481 -mem-write: 0x8000dff6 <- 0x2483fe07 -VXDRV: upload 1024 bytes to 0x8000dff9 -mem-write: 0x8000dff9 <- 0x2300c120 -mem-write: 0x8000dffd <- 0x300f420 -mem-write: 0x8000e001 <- 0x83008124 -mem-write: 0x8000e005 <- 0x13004124 -mem-write: 0x8000e009 <- 0x67010101 -mem-write: 0x8000e00d <- 0x3000080 -mem-write: 0x8000e011 <- 0x6711c1a3 -mem-write: 0x8000e015 <- 0x63000300 -mem-write: 0x8000e019 <- 0x63020580 -mem-write: 0x8000e01d <- 0x63040602 -mem-write: 0x8000e021 <- 0x83040688 -mem-write: 0x8000e025 <- 0x23000647 -mem-write: 0x8000e029 <- 0x300f5a0 -mem-write: 0x8000e02d <- 0x33000645 -mem-write: 0x8000e031 <- 0x6700a035 -mem-write: 0x8000e035 <- 0x13000080 -mem-write: 0x8000e039 <- 0x93ff0101 -mem-write: 0x8000e03d <- 0x6300c105 -mem-write: 0x8000e041 <- 0x63020604 -mem-write: 0x8000e045 <- 0x8302068a -mem-write: 0x8000e049 <- 0x23000647 -mem-write: 0x8000e04d <- 0x300f5a0 -mem-write: 0x8000e051 <- 0x33000645 -mem-write: 0x8000e055 <- 0x1300a035 -mem-write: 0x8000e059 <- 0x67010101 -mem-write: 0x8000e05d <- 0x13000080 -mem-write: 0x8000e061 <- 0x67000005 -mem-write: 0x8000e065 <- 0x13000080 -mem-write: 0x8000e069 <- 0x6f000005 -mem-write: 0x8000e06d <- 0x13fedff0 -mem-write: 0x8000e071 <- 0x67ffe005 -mem-write: 0x8000e075 <- 0x13000080 -mem-write: 0x8000e079 <- 0x6fffe005 -mem-write: 0x8000e07d <- 0xb3fddff0 -mem-write: 0x8000e081 <- 0x9300a5c7 -mem-write: 0x8000e085 <- 0xb30037f7 -mem-write: 0x8000e089 <- 0x6300c508 -mem-write: 0x8000e08d <- 0x93060792 -mem-write: 0x8000e091 <- 0x63003007 -mem-write: 0x8000e095 <- 0x9304c7fe -mem-write: 0x8000e099 <- 0x13003577 -mem-write: 0x8000e09d <- 0x63000507 -mem-write: 0x8000e0a1 <- 0x13060798 -mem-write: 0x8000e0a5 <- 0x93ffc8f6 -mem-write: 0x8000e0a9 <- 0x63fe0607 -mem-write: 0x8000e0ad <- 0x6308f76c -mem-write: 0x8000e0b1 <- 0x9302c77c -mem-write: 0x8000e0b5 <- 0x93000586 -mem-write: 0x8000e0b9 <- 0x3000707 -mem-write: 0x8000e0bd <- 0x930006a8 -mem-write: 0x8000e0c1 <- 0x93004787 -mem-write: 0x8000e0c5 <- 0x23004686 -mem-write: 0x8000e0c9 <- 0xe3ff07ae -mem-write: 0x8000e0cd <- 0x93fec7e8 -mem-write: 0x8000e0d1 <- 0xb3fff607 -mem-write: 0x8000e0d5 <- 0x9340e787 -mem-write: 0x8000e0d9 <- 0x93ffc7f7 -mem-write: 0x8000e0dd <- 0x33004787 -mem-write: 0x8000e0e1 <- 0xb300f707 -mem-write: 0x8000e0e5 <- 0x6300f585 -mem-write: 0x8000e0e9 <- 0x67011768 -mem-write: 0x8000e0ed <- 0x13000080 -mem-write: 0x8000e0f1 <- 0xe3000507 -mem-write: 0x8000e0f5 <- 0x83ff157c -mem-write: 0x8000e0f9 <- 0x130005c7 -mem-write: 0x8000e0fd <- 0x93001707 -mem-write: 0x8000e101 <- 0xa3001585 -mem-write: 0x8000e105 <- 0xe3fef70f -mem-write: 0x8000e109 <- 0x67ff1768 -mem-write: 0x8000e10d <- 0x83000080 -mem-write: 0x8000e111 <- 0x130005c6 -mem-write: 0x8000e115 <- 0x93001707 -mem-write: 0x8000e119 <- 0xa3003777 -mem-write: 0x8000e11d <- 0x93fed70f -mem-write: 0x8000e121 <- 0xe3001585 -mem-write: 0x8000e125 <- 0x83f80780 -mem-write: 0x8000e129 <- 0x130005c6 -mem-write: 0x8000e12d <- 0x93001707 -mem-write: 0x8000e131 <- 0xa3003777 -mem-write: 0x8000e135 <- 0x93fed70f -mem-write: 0x8000e139 <- 0xe3001585 -mem-write: 0x8000e13d <- 0x6ffc079a -mem-write: 0x8000e141 <- 0x83f65ff0 -mem-write: 0x8000e145 <- 0x830045a6 -mem-write: 0x8000e149 <- 0x830005a2 -mem-write: 0x8000e14d <- 0x30085af -mem-write: 0x8000e151 <- 0x8300c5af -mem-write: 0x8000e155 <- 0x30105ae -mem-write: 0x8000e159 <- 0x30145ae -mem-write: 0x8000e15d <- 0x30185a3 -mem-write: 0x8000e161 <- 0x2301c5a8 -mem-write: 0x8000e165 <- 0x8300d722 -mem-write: 0x8000e169 <- 0x230205a6 -mem-write: 0x8000e16d <- 0x23005720 -mem-write: 0x8000e171 <- 0x2301f724 -mem-write: 0x8000e175 <- 0x2301e726 -mem-write: 0x8000e179 <- 0x2301d728 -mem-write: 0x8000e17d <- 0x2301c72a -mem-write: 0x8000e181 <- 0x2300672c -mem-write: 0x8000e185 <- 0x2301072e -mem-write: 0x8000e189 <- 0x1302d720 -mem-write: 0x8000e18d <- 0x93024707 -mem-write: 0x8000e191 <- 0xe3024585 -mem-write: 0x8000e195 <- 0x6ffaf768 -mem-write: 0x8000e199 <- 0x63f19ff0 -mem-write: 0x8000e19d <- 0xb302a5f6 -mem-write: 0x8000e1a1 <- 0x6300c587 -mem-write: 0x8000e1a5 <- 0x3302f572 -mem-write: 0x8000e1a9 <- 0x6300c507 -mem-write: 0x8000e1ad <- 0x830e060a -mem-write: 0x8000e1b1 <- 0x93fff7c6 -mem-write: 0x8000e1b5 <- 0x13fff787 -mem-write: 0x8000e1b9 <- 0x23fff707 -mem-write: 0x8000e1bd <- 0xe300d700 -mem-write: 0x8000e1c1 <- 0x67fef598 -mem-write: 0x8000e1c5 <- 0x93000080 -mem-write: 0x8000e1c9 <- 0x6300f007 -mem-write: 0x8000e1cd <- 0x9302c7e8 -mem-write: 0x8000e1d1 <- 0x93000507 -mem-write: 0x8000e1d5 <- 0x63fff606 -mem-write: 0x8000e1d9 <- 0x930c060c -mem-write: 0x8000e1dd <- 0xb3001686 -mem-write: 0x8000e1e1 <- 0x300d786 -mem-write: 0x8000e1e5 <- 0x930005c7 -mem-write: 0x8000e1e9 <- 0x93001787 -mem-write: 0x8000e1ed <- 0xa3001585 -mem-write: 0x8000e1f1 <- 0xe3fee78f -mem-write: 0x8000e1f5 <- 0x67fed798 -mem-write: 0x8000e1f9 <- 0xb3000080 -mem-write: 0x8000e1fd <- 0x9300a5e7 -mem-write: 0x8000e201 <- 0x630037f7 -mem-write: 0x8000e205 <- 0x930a0790 -mem-write: 0x8000e209 <- 0x93ff0608 -mem-write: 0x8000e20d <- 0x93ff08f8 -mem-write: 0x8000e211 <- 0x33010888 -mem-write: 0x8000e215 <- 0x13011508 -mem-write: 0x8000e219 <- 0x93000587 -mem-write: 0x8000e21d <- 0x83000507 -mem-write: 0x8000e221 <- 0x13000726 -mem-write: 0x8000e225 <- 0x93010707 -mem-write: 0x8000e229 <- 0x23010787 -mem-write: 0x8000e22d <- 0x83fed7a8 -mem-write: 0x8000e231 <- 0x23ff4726 -mem-write: 0x8000e235 <- 0x83fed7aa -mem-write: 0x8000e239 <- 0x23ff8726 -mem-write: 0x8000e23d <- 0x83fed7ac -mem-write: 0x8000e241 <- 0x23ffc726 -mem-write: 0x8000e245 <- 0xe3fed7ae -mem-write: 0x8000e249 <- 0x13fcf81c -mem-write: 0x8000e24d <- 0xb300c677 -mem-write: 0x8000e251 <- 0x13011585 -mem-write: 0x8000e255 <- 0x6300f678 -mem-write: 0x8000e259 <- 0x1304070e -mem-write: 0x8000e25d <- 0x93000587 -mem-write: 0x8000e261 <- 0x13000788 -mem-write: 0x8000e265 <- 0x300300e -mem-write: 0x8000e269 <- 0x13000723 -mem-write: 0x8000e26d <- 0xb3004707 -mem-write: 0x8000e271 <- 0x2340e806 -mem-write: 0x8000e275 <- 0xb30068a0 -mem-write: 0x8000e279 <- 0x9300d586 -mem-write: 0x8000e27d <- 0xe3004888 -mem-write: 0x8000e281 <- 0x13fede64 -mem-write: 0x8000e285 <- 0x13ffc807 -mem-write: 0x8000e289 <- 0x13ffc777 -mem-write: 0x8000e28d <- 0x13004707 -mem-write: 0x8000e291 <- 0xb3003676 -mem-write: 0x8000e295 <- 0xb300e787 -mem-write: 0x8000e299 <- 0x6f00e585 -mem-write: 0x8000e29d <- 0x67f39ff0 -mem-write: 0x8000e2a1 <- 0x93000080 -mem-write: 0x8000e2a5 <- 0x93fff606 -mem-write: 0x8000e2a9 <- 0x6f000507 -mem-write: 0x8000e2ad <- 0x67f31ff0 -mem-write: 0x8000e2b1 <- 0x13000080 -mem-write: 0x8000e2b5 <- 0x6f000806 -mem-write: 0x8000e2b9 <- 0x13f1dff0 -mem-write: 0x8000e2bd <- 0x13ff0101 -mem-write: 0x8000e2c1 <- 0x23000587 -mem-write: 0x8000e2c5 <- 0x23008124 -mem-write: 0x8000e2c9 <- 0x93009122 -mem-write: 0x8000e2cd <- 0x13000605 -mem-write: 0x8000e2d1 <- 0x13000504 -mem-write: 0x8000e2d5 <- 0x13000686 -mem-write: 0x8000e2d9 <- 0x23000705 -mem-write: 0x8000e2dd <- 0x23001126 -mem-write: 0x8000e2e1 <- 0xef2401a4 -mem-write: 0x8000e2e5 <- 0x93950f20 -mem-write: 0x8000e2e9 <- 0x63fff007 -mem-write: 0x8000e2ed <- 0x8300f50c -mem-write: 0x8000e2f1 <- 0x300c120 -mem-write: 0x8000e2f5 <- 0x83008124 -mem-write: 0x8000e2f9 <- 0x13004124 -mem-write: 0x8000e2fd <- 0x67010101 -mem-write: 0x8000e301 <- 0x83000080 -mem-write: 0x8000e305 <- 0xe32481a7 -mem-write: 0x8000e309 <- 0x83fe0784 -mem-write: 0x8000e30d <- 0x2300c120 -mem-write: 0x8000e311 <- 0x300f420 -mem-write: 0x8000e315 <- 0x83008124 -mem-write: 0x8000e319 <- 0x13004124 -mem-write: 0x8000e31d <- 0x67010101 -mem-write: 0x8000e321 <- 0x13000080 -mem-write: 0x8000e325 <- 0x23fd0101 -mem-write: 0x8000e329 <- 0x23032120 -mem-write: 0x8000e32d <- 0x23021126 -mem-write: 0x8000e331 <- 0x23028124 -mem-write: 0x8000e335 <- 0x23029122 -mem-write: 0x8000e339 <- 0x2301312e -mem-write: 0x8000e33d <- 0x2301412c -mem-write: 0x8000e341 <- 0x2301512a -mem-write: 0x8000e345 <- 0x23016128 -mem-write: 0x8000e349 <- 0x23017126 -mem-write: 0x8000e34d <- 0x13018124 -mem-write: 0x8000e351 <- 0x63000609 -mem-write: 0x8000e355 <- 0x13220582 -mem-write: 0x8000e359 <- 0x93000584 -mem-write: 0x8000e35d <- 0xef000509 -mem-write: 0x8000e361 <- 0x93c45f90 -mem-write: 0x8000e365 <- 0x9300b904 -mem-write: 0x8000e369 <- 0x63016007 -mem-write: 0x8000e36d <- 0x930e97fc -mem-write: 0x8000e371 <- 0x13ff84f4 -mem-write: 0x8000e375 <- 0x63000487 -mem-write: 0x8000e379 <- 0x630e04cc -mem-write: 0x8000e37d <- 0x830f24ea -mem-write: 0x8000e381 <- 0x93ffc427 -mem-write: 0x8000e385 <- 0x13ff840a -mem-write: 0x8000e389 <- 0x33ffc7fa -mem-write: 0x8000e38d <- 0x63014a8b -mem-write: 0x8000e391 <- 0x9318ea5a -mem-write: 0x8000e395 <- 0x3c3018b -mem-write: 0x8000e399 <- 0x83008ba6 -mem-write: 0x8000e39d <- 0x63004b26 -mem-write: 0x8000e3a1 <- 0x1323660e -mem-write: 0x8000e3a5 <- 0x33ffe6f6 -mem-write: 0x8000e3a9 <- 0x300cb06 -mem-write: 0x8000e3ad <- 0x13004626 -mem-write: 0x8000e3b1 <- 0x63001676 -mem-write: 0x8000e3b5 <- 0x931a0614 -mem-write: 0x8000e3b9 <- 0x33ffc6f6 -mem-write: 0x8000e3bd <- 0x6300da06 -mem-write: 0x8000e3c1 <- 0x9332e65e -mem-write: 0x8000e3c5 <- 0x630017f7 -mem-write: 0x8000e3c9 <- 0x3020794 -mem-write: 0x8000e3cd <- 0x33ff842c -mem-write: 0x8000e3d1 <- 0x83418a8c -mem-write: 0x8000e3d5 <- 0x93004c27 -mem-write: 0x8000e3d9 <- 0xb3ffc7f7 -mem-write: 0x8000e3dd <- 0xb300d786 -mem-write: 0x8000e3e1 <- 0x6301468b -mem-write: 0x8000e3e5 <- 0xb334ebda -mem-write: 0x8000e3e9 <- 0x6300fa0b -mem-write: 0x8000e3ed <- 0x930cebd2 -mem-write: 0x8000e3f1 <- 0x13000905 -mem-write: 0x8000e3f5 <- 0xef000985 -VXDRV: upload 1024 bytes to 0x8000e3f9 -mem-write: 0x8000e3f9 <- 0x13b40f90 -mem-write: 0x8000e3fd <- 0x63000509 -mem-write: 0x8000e401 <- 0x8304050c -mem-write: 0x8000e405 <- 0x13ffc427 -mem-write: 0x8000e409 <- 0x93ff8507 -mem-write: 0x8000e40d <- 0xb3ffe7f7 -mem-write: 0x8000e411 <- 0x6300fa87 -mem-write: 0x8000e415 <- 0x1330e782 -mem-write: 0x8000e419 <- 0x93ffca06 -mem-write: 0x8000e41d <- 0x63024007 -mem-write: 0x8000e421 <- 0x1330c7e6 -mem-write: 0x8000e425 <- 0x83013007 -mem-write: 0x8000e429 <- 0x63000426 -mem-write: 0x8000e42d <- 0x9326c76c -mem-write: 0x8000e431 <- 0x13000507 -mem-write: 0x8000e435 <- 0x23000407 -mem-write: 0x8000e439 <- 0x8300d7a0 -mem-write: 0x8000e43d <- 0x23004726 -mem-write: 0x8000e441 <- 0x300d7a2 -mem-write: 0x8000e445 <- 0x23008727 -mem-write: 0x8000e449 <- 0x9300e7a4 -mem-write: 0x8000e44d <- 0x13000405 -mem-write: 0x8000e451 <- 0xef000985 -mem-write: 0x8000e455 <- 0x13910f60 -mem-write: 0x8000e459 <- 0xef000985 -mem-write: 0x8000e45d <- 0x6fb4df90 -mem-write: 0x8000e461 <- 0x9301c000 -mem-write: 0x8000e465 <- 0x13010004 -mem-write: 0x8000e469 <- 0xe3010007 -mem-write: 0x8000e46d <- 0x93f124fa -mem-write: 0x8000e471 <- 0x2300c007 -mem-write: 0x8000e475 <- 0x1300f9a0 -mem-write: 0x8000e479 <- 0x83000009 -mem-write: 0x8000e47d <- 0x302c120 -mem-write: 0x8000e481 <- 0x83028124 -mem-write: 0x8000e485 <- 0x83024124 -mem-write: 0x8000e489 <- 0x301c129 -mem-write: 0x8000e48d <- 0x8301812a -mem-write: 0x8000e491 <- 0x301412a -mem-write: 0x8000e495 <- 0x8301012b -mem-write: 0x8000e499 <- 0x300c12b -mem-write: 0x8000e49d <- 0x1300812c -mem-write: 0x8000e4a1 <- 0x3000905 -mem-write: 0x8000e4a5 <- 0x13020129 -mem-write: 0x8000e4a9 <- 0x67030101 -mem-write: 0x8000e4ad <- 0x83000080 -mem-write: 0x8000e4b1 <- 0x300cc27 -mem-write: 0x8000e4b5 <- 0x13008c27 -mem-write: 0x8000e4b9 <- 0x93ffca06 -mem-write: 0x8000e4bd <- 0x23024006 -mem-write: 0x8000e4c1 <- 0x2300f726 -mem-write: 0x8000e4c5 <- 0x1300e7a4 -mem-write: 0x8000e4c9 <- 0x33008c09 -mem-write: 0x8000e4cd <- 0x63017c0b -mem-write: 0x8000e4d1 <- 0x932ec6e4 -mem-write: 0x8000e4d5 <- 0x3013005 -mem-write: 0x8000e4d9 <- 0x93000427 -mem-write: 0x8000e4dd <- 0x63000907 -mem-write: 0x8000e4e1 <- 0x2302c5f2 -mem-write: 0x8000e4e5 <- 0x300ec24 -mem-write: 0x8000e4e9 <- 0x93004427 -mem-write: 0x8000e4ed <- 0x2301b007 -mem-write: 0x8000e4f1 <- 0x6300ec26 -mem-write: 0x8000e4f5 <- 0x330c7e2 -mem-write: 0x8000e4f9 <- 0x93008427 -mem-write: 0x8000e4fd <- 0x13010c07 -mem-write: 0x8000e501 <- 0x23008404 -mem-write: 0x8000e505 <- 0x300e7a0 -mem-write: 0x8000e509 <- 0x13004427 -mem-write: 0x8000e50d <- 0x93000b8a -mem-write: 0x8000e511 <- 0x23000c0a -mem-write: 0x8000e515 <- 0x300e7a2 -mem-write: 0x8000e519 <- 0x13008427 -mem-write: 0x8000e51d <- 0x23000904 -mem-write: 0x8000e521 <- 0x8300e7a4 -mem-write: 0x8000e525 <- 0x33004aa7 -mem-write: 0x8000e529 <- 0x93409a07 -mem-write: 0x8000e52d <- 0x9300f006 -mem-write: 0x8000e531 <- 0x630017f7 -mem-write: 0x8000e535 <- 0xb306e6ec -mem-write: 0x8000e539 <- 0x2300fa67 -mem-write: 0x8000e53d <- 0x8300faa2 -mem-write: 0x8000e541 <- 0x93004b27 -mem-write: 0x8000e545 <- 0x230017e7 -mem-write: 0x8000e549 <- 0x1300fb22 -mem-write: 0x8000e54d <- 0xef000985 -mem-write: 0x8000e551 <- 0x13a59f90 -mem-write: 0x8000e555 <- 0x6f000409 -mem-write: 0x8000e559 <- 0x93f25ff0 -mem-write: 0x8000e55d <- 0xe30017f7 -mem-write: 0x8000e561 <- 0x3e80798 -mem-write: 0x8000e565 <- 0x33ff842c -mem-write: 0x8000e569 <- 0x83418a8c -mem-write: 0x8000e56d <- 0x93004c27 -mem-write: 0x8000e571 <- 0x6fffc7f7 -mem-write: 0x8000e575 <- 0x3e75ff0 -mem-write: 0x8000e579 <- 0x83028124 -mem-write: 0x8000e57d <- 0x8302c120 -mem-write: 0x8000e581 <- 0x3024124 -mem-write: 0x8000e585 <- 0x83020129 -mem-write: 0x8000e589 <- 0x301c129 -mem-write: 0x8000e58d <- 0x8301812a -mem-write: 0x8000e591 <- 0x301412a -mem-write: 0x8000e595 <- 0x8301012b -mem-write: 0x8000e599 <- 0x300c12b -mem-write: 0x8000e59d <- 0x9300812c -mem-write: 0x8000e5a1 <- 0x13000605 -mem-write: 0x8000e5a5 <- 0x6f030101 -mem-write: 0x8000e5a9 <- 0xb3990f90 -mem-write: 0x8000e5ad <- 0x230097e7 -mem-write: 0x8000e5b1 <- 0xb300faa2 -mem-write: 0x8000e5b5 <- 0x13009a85 -mem-write: 0x8000e5b9 <- 0x23001767 -mem-write: 0x8000e5bd <- 0x8300e5a2 -mem-write: 0x8000e5c1 <- 0x93004b27 -mem-write: 0x8000e5c5 <- 0x13008585 -mem-write: 0x8000e5c9 <- 0x93000985 -mem-write: 0x8000e5cd <- 0x230017e7 -mem-write: 0x8000e5d1 <- 0xef00fb22 -mem-write: 0x8000e5d5 <- 0x6ff91f50 -mem-write: 0x8000e5d9 <- 0x93f75ff0 -mem-write: 0x8000e5dd <- 0x33ffc6f6 -mem-write: 0x8000e5e1 <- 0x9300da06 -mem-write: 0x8000e5e5 <- 0x63010485 -mem-write: 0x8000e5e9 <- 0x930eb650 -mem-write: 0x8000e5ed <- 0xe30017f7 -mem-write: 0x8000e5f1 <- 0x3e00790 -mem-write: 0x8000e5f5 <- 0x33ff842c -mem-write: 0x8000e5f9 <- 0x83418a8c -mem-write: 0x8000e5fd <- 0x93004c27 -mem-write: 0x8000e601 <- 0xb3ffc7f7 -mem-write: 0x8000e605 <- 0x3300d786 -mem-write: 0x8000e609 <- 0xe301468b -mem-write: 0x8000e60d <- 0x83dcbb4e -mem-write: 0x8000e611 <- 0x300cc27 -mem-write: 0x8000e615 <- 0x13008c27 -mem-write: 0x8000e619 <- 0x93ffca06 -mem-write: 0x8000e61d <- 0x23024006 -mem-write: 0x8000e621 <- 0x2300f726 -mem-write: 0x8000e625 <- 0x1300e7a4 -mem-write: 0x8000e629 <- 0x63008c09 -mem-write: 0x8000e62d <- 0x9320c6ee -mem-write: 0x8000e631 <- 0x3013005 -mem-write: 0x8000e635 <- 0x93000427 -mem-write: 0x8000e639 <- 0x63000907 -mem-write: 0x8000e63d <- 0x2302c5f2 -mem-write: 0x8000e641 <- 0x300ec24 -mem-write: 0x8000e645 <- 0x93004427 -mem-write: 0x8000e649 <- 0x2301b007 -mem-write: 0x8000e64d <- 0x6300ec26 -mem-write: 0x8000e651 <- 0x320c7e4 -mem-write: 0x8000e655 <- 0x93008427 -mem-write: 0x8000e659 <- 0x13010c07 -mem-write: 0x8000e65d <- 0x23008404 -mem-write: 0x8000e661 <- 0x300e7a0 -mem-write: 0x8000e665 <- 0x23004427 -mem-write: 0x8000e669 <- 0x300e7a2 -mem-write: 0x8000e66d <- 0x23008427 -mem-write: 0x8000e671 <- 0x3300e7a4 -mem-write: 0x8000e675 <- 0xb3009c07 -mem-write: 0x8000e679 <- 0x23409b07 -mem-write: 0x8000e67d <- 0x9300eba4 -mem-write: 0x8000e681 <- 0x230017e7 -mem-write: 0x8000e685 <- 0x8300f722 -mem-write: 0x8000e689 <- 0x13004c27 -mem-write: 0x8000e68d <- 0x93000985 -mem-write: 0x8000e691 <- 0xb30017f7 -mem-write: 0x8000e695 <- 0x230097e4 -mem-write: 0x8000e699 <- 0xef009c22 -mem-write: 0x8000e69d <- 0x6f90df90 -mem-write: 0x8000e6a1 <- 0x23dddff0 -mem-write: 0x8000e6a5 <- 0x8300d520 -mem-write: 0x8000e6a9 <- 0x13004426 -mem-write: 0x8000e6ad <- 0x2301b007 -mem-write: 0x8000e6b1 <- 0x6300d522 -mem-write: 0x8000e6b5 <- 0x8312c760 -mem-write: 0x8000e6b9 <- 0x13008426 -mem-write: 0x8000e6bd <- 0x93008407 -mem-write: 0x8000e6c1 <- 0x6f008507 -mem-write: 0x8000e6c5 <- 0xb3d75ff0 -mem-write: 0x8000e6c9 <- 0xb3009a8a -mem-write: 0x8000e6cd <- 0x23409607 -mem-write: 0x8000e6d1 <- 0x93015ba4 -mem-write: 0x8000e6d5 <- 0x230017e7 -mem-write: 0x8000e6d9 <- 0x8300faa2 -mem-write: 0x8000e6dd <- 0x13ffc427 -mem-write: 0x8000e6e1 <- 0x13000985 -mem-write: 0x8000e6e5 <- 0x93000409 -mem-write: 0x8000e6e9 <- 0xb30017f7 -mem-write: 0x8000e6ed <- 0x230097e4 -mem-write: 0x8000e6f1 <- 0xeffe942e -mem-write: 0x8000e6f5 <- 0x6f8b5f90 -mem-write: 0x8000e6f9 <- 0x83d85ff0 -mem-write: 0x8000e6fd <- 0x300cb27 -mem-write: 0x8000e701 <- 0x13008b27 -mem-write: 0x8000e705 <- 0x3300060a -mem-write: 0x8000e709 <- 0x2300ca8b -mem-write: 0x8000e70d <- 0x2300f726 -mem-write: 0x8000e711 <- 0x6f00e7a4 -mem-write: 0x8000e715 <- 0x83e11ff0 -mem-write: 0x8000e719 <- 0x93ffc527 -mem-write: 0x8000e71d <- 0x33ffc7f7 -mem-write: 0x8000e721 <- 0x3300fa0a -mem-write: 0x8000e725 <- 0x6f014a8b -mem-write: 0x8000e729 <- 0x93dfdff0 -mem-write: 0x8000e72d <- 0xef000405 -mem-write: 0x8000e731 <- 0x6fa6dff0 -mem-write: 0x8000e735 <- 0x83d19ff0 -mem-write: 0x8000e739 <- 0x300cb27 -mem-write: 0x8000e73d <- 0x13008b27 -mem-write: 0x8000e741 <- 0x93ffca06 -mem-write: 0x8000e745 <- 0x23024006 -mem-write: 0x8000e749 <- 0x2300f726 -mem-write: 0x8000e74d <- 0x300e7a4 -mem-write: 0x8000e751 <- 0x83008c27 -mem-write: 0x8000e755 <- 0x1300cc27 -mem-write: 0x8000e759 <- 0x33008c09 -mem-write: 0x8000e75d <- 0x23017c0b -mem-write: 0x8000e761 <- 0x2300f726 -mem-write: 0x8000e765 <- 0x6300e7a4 -mem-write: 0x8000e769 <- 0x9304c6e8 -mem-write: 0x8000e76d <- 0x3013006 -mem-write: 0x8000e771 <- 0x93000427 -mem-write: 0x8000e775 <- 0xe3000907 -mem-write: 0x8000e779 <- 0x23d8c6f6 -mem-write: 0x8000e77d <- 0x300ec24 -mem-write: 0x8000e781 <- 0x93004427 -mem-write: 0x8000e785 <- 0x2301b007 -mem-write: 0x8000e789 <- 0x300ec26 -mem-write: 0x8000e78d <- 0xe3008427 -mem-write: 0x8000e791 <- 0x23d6c7f6 -mem-write: 0x8000e795 <- 0x300ec28 -mem-write: 0x8000e799 <- 0x9300c427 -mem-write: 0x8000e79d <- 0x23024007 -mem-write: 0x8000e7a1 <- 0x300ec2a -mem-write: 0x8000e7a5 <- 0x63010427 -mem-write: 0x8000e7a9 <- 0x9306f604 -mem-write: 0x8000e7ad <- 0x13018c07 -mem-write: 0x8000e7b1 <- 0x6f010404 -mem-write: 0x8000e7b5 <- 0x93d51ff0 -mem-write: 0x8000e7b9 <- 0x13000405 -mem-write: 0x8000e7bd <- 0xef000905 -mem-write: 0x8000e7c1 <- 0x139ddff0 -mem-write: 0x8000e7c5 <- 0x13000904 -mem-write: 0x8000e7c9 <- 0x93000b8a -mem-write: 0x8000e7cd <- 0x6f000c0a -mem-write: 0x8000e7d1 <- 0x3d55ff0 -mem-write: 0x8000e7d5 <- 0x23008427 -mem-write: 0x8000e7d9 <- 0x300e524 -mem-write: 0x8000e7dd <- 0x2300c427 -mem-write: 0x8000e7e1 <- 0x8300e526 -mem-write: 0x8000e7e5 <- 0x63010426 -mem-write: 0x8000e7e9 <- 0x1304f602 -mem-write: 0x8000e7ed <- 0x93010407 -mem-write: 0x8000e7f1 <- 0x6f010507 -mem-write: 0x8000e7f5 <- 0x83c45ff0 -VXDRV: upload 1024 bytes to 0x8000e7f9 -mem-write: 0x8000e7f9 <- 0x23008427 -mem-write: 0x8000e7fd <- 0x8300fc28 -mem-write: 0x8000e801 <- 0x2300c427 -mem-write: 0x8000e805 <- 0x300fc2a -mem-write: 0x8000e809 <- 0xe3010427 -mem-write: 0x8000e80d <- 0x23fad610 -mem-write: 0x8000e811 <- 0x300ec2c -mem-write: 0x8000e815 <- 0x93014427 -mem-write: 0x8000e819 <- 0x13020c07 -mem-write: 0x8000e81d <- 0x23018404 -mem-write: 0x8000e821 <- 0x300ec2e -mem-write: 0x8000e825 <- 0x6f000427 -mem-write: 0x8000e829 <- 0x23cddff0 -mem-write: 0x8000e82d <- 0x8300d528 -mem-write: 0x8000e831 <- 0x13014426 -mem-write: 0x8000e835 <- 0x93018407 -mem-write: 0x8000e839 <- 0x23018507 -mem-write: 0x8000e83d <- 0x8300d52a -mem-write: 0x8000e841 <- 0x6f018426 -mem-write: 0x8000e845 <- 0x93bf5ff0 -mem-write: 0x8000e849 <- 0x13000405 -mem-write: 0x8000e84d <- 0xef000905 -mem-write: 0x8000e851 <- 0x6f94dff0 -mem-write: 0x8000e855 <- 0x83e21ff0 -mem-write: 0x8000e859 <- 0x23008427 -mem-write: 0x8000e85d <- 0x8300fc28 -mem-write: 0x8000e861 <- 0x2300c427 -mem-write: 0x8000e865 <- 0x300fc2a -mem-write: 0x8000e869 <- 0x63010427 -mem-write: 0x8000e86d <- 0x9300d608 -mem-write: 0x8000e871 <- 0x13018c07 -mem-write: 0x8000e875 <- 0x6f010404 -mem-write: 0x8000e879 <- 0x23de9ff0 -mem-write: 0x8000e87d <- 0x300ec2c -mem-write: 0x8000e881 <- 0x93014427 -mem-write: 0x8000e885 <- 0x13020c07 -mem-write: 0x8000e889 <- 0x23018404 -mem-write: 0x8000e88d <- 0x300ec2e -mem-write: 0x8000e891 <- 0x6f000427 -mem-write: 0x8000e895 <- 0x13dcdff0 -mem-write: 0x8000e899 <- 0x23ff0101 -mem-write: 0x8000e89d <- 0x13008124 -mem-write: 0x8000e8a1 <- 0x83000584 -mem-write: 0x8000e8a5 <- 0x230005a5 -mem-write: 0x8000e8a9 <- 0x23009122 -mem-write: 0x8000e8ad <- 0x93001126 -mem-write: 0x8000e8b1 <- 0x63000504 -mem-write: 0x8000e8b5 <- 0xef000584 -mem-write: 0x8000e8b9 <- 0x93fe1ff0 -mem-write: 0x8000e8bd <- 0x3000405 -mem-write: 0x8000e8c1 <- 0x83008124 -mem-write: 0x8000e8c5 <- 0x1300c120 -mem-write: 0x8000e8c9 <- 0x83000485 -mem-write: 0x8000e8cd <- 0x13004124 -mem-write: 0x8000e8d1 <- 0x6f010101 -mem-write: 0x8000e8d5 <- 0x83c91f50 -mem-write: 0x8000e8d9 <- 0x631d81a7 -mem-write: 0x8000e8dd <- 0x8310a780 -mem-write: 0x8000e8e1 <- 0x1304c525 -mem-write: 0x8000e8e5 <- 0x23fe0101 -mem-write: 0x8000e8e9 <- 0x2300912a -mem-write: 0x8000e8ed <- 0x2300112e -mem-write: 0x8000e8f1 <- 0x2300812c -mem-write: 0x8000e8f5 <- 0x23012128 -mem-write: 0x8000e8f9 <- 0x93013126 -mem-write: 0x8000e8fd <- 0x63000504 -mem-write: 0x8000e901 <- 0x13040580 -mem-write: 0x8000e905 <- 0x93000009 -mem-write: 0x8000e909 <- 0xb3080009 -mem-write: 0x8000e90d <- 0x3012587 -mem-write: 0x8000e911 <- 0x630007a4 -mem-write: 0x8000e915 <- 0x9300040e -mem-write: 0x8000e919 <- 0x3000405 -mem-write: 0x8000e91d <- 0x13000424 -mem-write: 0x8000e921 <- 0xef000485 -mem-write: 0x8000e925 <- 0xe3c41f50 -mem-write: 0x8000e929 <- 0x83fe0418 -mem-write: 0x8000e92d <- 0x1304c4a5 -mem-write: 0x8000e931 <- 0xe3004909 -mem-write: 0x8000e935 <- 0x13fd391c -mem-write: 0x8000e939 <- 0xef000485 -mem-write: 0x8000e93d <- 0x83c29f50 -mem-write: 0x8000e941 <- 0x630404a5 -mem-write: 0x8000e945 <- 0x13000586 -mem-write: 0x8000e949 <- 0xef000485 -mem-write: 0x8000e94d <- 0x3c19f50 -mem-write: 0x8000e951 <- 0x631484a4 -mem-write: 0x8000e955 <- 0x13020400 -mem-write: 0x8000e959 <- 0x6314c489 -mem-write: 0x8000e95d <- 0x9301240c -mem-write: 0x8000e961 <- 0x3000405 -mem-write: 0x8000e965 <- 0x13000424 -mem-write: 0x8000e969 <- 0xef000485 -mem-write: 0x8000e96d <- 0xe3bf9f50 -mem-write: 0x8000e971 <- 0x83fe8918 -mem-write: 0x8000e975 <- 0x630544a5 -mem-write: 0x8000e979 <- 0x13000586 -mem-write: 0x8000e97d <- 0xef000485 -mem-write: 0x8000e981 <- 0x83be5f50 -mem-write: 0x8000e985 <- 0x630384a7 -mem-write: 0x8000e989 <- 0x8302078c -mem-write: 0x8000e98d <- 0x1303c4a7 -mem-write: 0x8000e991 <- 0xe7000485 -mem-write: 0x8000e995 <- 0x83000780 -mem-write: 0x8000e999 <- 0x632e04a5 -mem-write: 0x8000e99d <- 0x3020582 -mem-write: 0x8000e9a1 <- 0x83018124 -mem-write: 0x8000e9a5 <- 0x301c120 -mem-write: 0x8000e9a9 <- 0x83010129 -mem-write: 0x8000e9ad <- 0x1300c129 -mem-write: 0x8000e9b1 <- 0x83000485 -mem-write: 0x8000e9b5 <- 0x13014124 -mem-write: 0x8000e9b9 <- 0x6f020101 -mem-write: 0x8000e9bd <- 0x83eddff0 -mem-write: 0x8000e9c1 <- 0x301c120 -mem-write: 0x8000e9c5 <- 0x83018124 -mem-write: 0x8000e9c9 <- 0x3014124 -mem-write: 0x8000e9cd <- 0x83010129 -mem-write: 0x8000e9d1 <- 0x1300c129 -mem-write: 0x8000e9d5 <- 0x67020101 -mem-write: 0x8000e9d9 <- 0x67000080 -mem-write: 0x8000e9dd <- 0x33000080 -mem-write: 0x8000e9e1 <- 0x9300b567 -mem-write: 0x8000e9e5 <- 0x13fff003 -mem-write: 0x8000e9e9 <- 0x63003777 -mem-write: 0x8000e9ed <- 0xb7100710 -mem-write: 0x8000e9f1 <- 0x937f7f87 -mem-write: 0x8000e9f5 <- 0x3f7f787 -mem-write: 0x8000e9f9 <- 0x83000526 -mem-write: 0x8000e9fd <- 0xb30005a6 -mem-write: 0x8000ea01 <- 0x3300f672 -mem-write: 0x8000ea05 <- 0xb300f663 -mem-write: 0x8000ea09 <- 0xb300f282 -mem-write: 0x8000ea0d <- 0x630062e2 -mem-write: 0x8000ea11 <- 0x63107292 -mem-write: 0x8000ea15 <- 0x308d616 -mem-write: 0x8000ea19 <- 0x83004526 -mem-write: 0x8000ea1d <- 0xb30045a6 -mem-write: 0x8000ea21 <- 0x3300f672 -mem-write: 0x8000ea25 <- 0xb300f663 -mem-write: 0x8000ea29 <- 0xb300f282 -mem-write: 0x8000ea2d <- 0x630062e2 -mem-write: 0x8000ea31 <- 0x630c729e -mem-write: 0x8000ea35 <- 0x306d616 -mem-write: 0x8000ea39 <- 0x83008526 -mem-write: 0x8000ea3d <- 0xb30085a6 -mem-write: 0x8000ea41 <- 0x3300f672 -mem-write: 0x8000ea45 <- 0xb300f663 -mem-write: 0x8000ea49 <- 0xb300f282 -mem-write: 0x8000ea4d <- 0x630062e2 -mem-write: 0x8000ea51 <- 0x630c7298 -mem-write: 0x8000ea55 <- 0x304d616 -mem-write: 0x8000ea59 <- 0x8300c526 -mem-write: 0x8000ea5d <- 0xb300c5a6 -mem-write: 0x8000ea61 <- 0x3300f672 -mem-write: 0x8000ea65 <- 0xb300f663 -mem-write: 0x8000ea69 <- 0xb300f282 -mem-write: 0x8000ea6d <- 0x630062e2 -mem-write: 0x8000ea71 <- 0x630c7292 -mem-write: 0x8000ea75 <- 0x302d616 -mem-write: 0x8000ea79 <- 0x83010526 -mem-write: 0x8000ea7d <- 0xb30105a6 -mem-write: 0x8000ea81 <- 0x3300f672 -mem-write: 0x8000ea85 <- 0xb300f663 -mem-write: 0x8000ea89 <- 0xb300f282 -mem-write: 0x8000ea8d <- 0x630062e2 -mem-write: 0x8000ea91 <- 0x130a729c -mem-write: 0x8000ea95 <- 0x93014505 -mem-write: 0x8000ea99 <- 0xe3014585 -mem-write: 0x8000ea9d <- 0x13f4d60e -mem-write: 0x8000eaa1 <- 0x93010617 -mem-write: 0x8000eaa5 <- 0x63010697 -mem-write: 0x8000eaa9 <- 0x1300f71e -mem-write: 0x8000eaad <- 0x93010657 -mem-write: 0x8000eab1 <- 0x330106d7 -mem-write: 0x8000eab5 <- 0x9340f705 -mem-write: 0x8000eab9 <- 0x630ff575 -mem-write: 0x8000eabd <- 0x67020590 -mem-write: 0x8000eac1 <- 0x13000080 -mem-write: 0x8000eac5 <- 0x93010757 -mem-write: 0x8000eac9 <- 0x330107d7 -mem-write: 0x8000eacd <- 0x9340f705 -mem-write: 0x8000ead1 <- 0x630ff575 -mem-write: 0x8000ead5 <- 0x67000594 -mem-write: 0x8000ead9 <- 0x13000080 -mem-write: 0x8000eadd <- 0x930ff777 -mem-write: 0x8000eae1 <- 0x330ff7f7 -mem-write: 0x8000eae5 <- 0x6740f705 -mem-write: 0x8000eae9 <- 0x3000080 -mem-write: 0x8000eaed <- 0x83000546 -mem-write: 0x8000eaf1 <- 0x130005c6 -mem-write: 0x8000eaf5 <- 0x93001505 -mem-write: 0x8000eaf9 <- 0x63001585 -mem-write: 0x8000eafd <- 0xe300d614 -mem-write: 0x8000eb01 <- 0x33fe0616 -mem-write: 0x8000eb05 <- 0x6740d605 -mem-write: 0x8000eb09 <- 0x13000080 -mem-write: 0x8000eb0d <- 0x93004505 -mem-write: 0x8000eb11 <- 0xe3004585 -mem-write: 0x8000eb15 <- 0x13fcd61c -mem-write: 0x8000eb19 <- 0x67000005 -mem-write: 0x8000eb1d <- 0x13000080 -mem-write: 0x8000eb21 <- 0x93008505 -mem-write: 0x8000eb25 <- 0xe3008585 -mem-write: 0x8000eb29 <- 0x13fcd612 -mem-write: 0x8000eb2d <- 0x67000005 -mem-write: 0x8000eb31 <- 0x13000080 -mem-write: 0x8000eb35 <- 0x9300c505 -mem-write: 0x8000eb39 <- 0xe300c585 -mem-write: 0x8000eb3d <- 0x13fad618 -mem-write: 0x8000eb41 <- 0x67000005 -mem-write: 0x8000eb45 <- 0x13000080 -mem-write: 0x8000eb49 <- 0x93010505 -mem-write: 0x8000eb4d <- 0xe3010585 -mem-write: 0x8000eb51 <- 0x13f8d61e -mem-write: 0x8000eb55 <- 0x67000005 -mem-write: 0x8000eb59 <- 0x83000080 -mem-write: 0x8000eb5d <- 0x13008627 -mem-write: 0x8000eb61 <- 0x23fd0101 -mem-write: 0x8000eb65 <- 0x2301512a -mem-write: 0x8000eb69 <- 0x23021126 -mem-write: 0x8000eb6d <- 0x23028124 -mem-write: 0x8000eb71 <- 0x23029122 -mem-write: 0x8000eb75 <- 0x23032120 -mem-write: 0x8000eb79 <- 0x2301312e -mem-write: 0x8000eb7d <- 0x2301412c -mem-write: 0x8000eb81 <- 0x23016128 -mem-write: 0x8000eb85 <- 0x23017126 -mem-write: 0x8000eb89 <- 0x93018124 -mem-write: 0x8000eb8d <- 0x6300060a -mem-write: 0x8000eb91 <- 0x13140788 -mem-write: 0x8000eb95 <- 0x8300050b -mem-write: 0x8000eb99 <- 0x3000629 -mem-write: 0x8000eb9d <- 0x830005a5 -mem-write: 0x8000eba1 <- 0x130085a4 -mem-write: 0x8000eba5 <- 0x6f000584 -mem-write: 0x8000eba9 <- 0x830d4000 -mem-write: 0x8000ebad <- 0x1300c457 -mem-write: 0x8000ebb1 <- 0x634807f7 -mem-write: 0x8000ebb5 <- 0x8308070a -mem-write: 0x8000ebb9 <- 0x83014426 -mem-write: 0x8000ebbd <- 0x13010425 -mem-write: 0x8000ebc1 <- 0x93001907 -mem-write: 0x8000ebc5 <- 0xb3001694 -mem-write: 0x8000ebc9 <- 0x9300d486 -mem-write: 0x8000ebcd <- 0x3301f6d4 -mem-write: 0x8000ebd1 <- 0xb340b50a -mem-write: 0x8000ebd5 <- 0x9300d484 -mem-write: 0x8000ebd9 <- 0x334014d4 -mem-write: 0x8000ebdd <- 0x13014707 -mem-write: 0x8000ebe1 <- 0x63000486 -mem-write: 0x8000ebe5 <- 0x9300e4f6 -mem-write: 0x8000ebe9 <- 0x13000704 -mem-write: 0x8000ebed <- 0x93000706 -mem-write: 0x8000ebf1 <- 0x634007f7 -mem-write: 0x8000ebf5 <- 0x930a0786 -VXDRV: upload 1024 bytes to 0x8000ebf9 -mem-write: 0x8000ebf9 <- 0x13000605 -mem-write: 0x8000ebfd <- 0xef000b05 -mem-write: 0x8000ec01 <- 0x13b39f80 -mem-write: 0x8000ec05 <- 0x6300050c -mem-write: 0x8000ec09 <- 0x830a050a -mem-write: 0x8000ec0d <- 0x13010425 -mem-write: 0x8000ec11 <- 0xef000a06 -mem-write: 0x8000ec15 <- 0x83c6cff0 -mem-write: 0x8000ec19 <- 0x9300c457 -mem-write: 0x8000ec1d <- 0x93b7f7f7 -mem-write: 0x8000ec21 <- 0x230807e7 -mem-write: 0x8000ec25 <- 0x3300f416 -mem-write: 0x8000ec29 <- 0x33014c05 -mem-write: 0x8000ec2d <- 0x2341448a -mem-write: 0x8000ec31 <- 0x2300942a -mem-write: 0x8000ec35 <- 0x23014424 -mem-write: 0x8000ec39 <- 0x23018428 -mem-write: 0x8000ec3d <- 0x9300a420 -mem-write: 0x8000ec41 <- 0x13000904 -mem-write: 0x8000ec45 <- 0x1300090a -mem-write: 0x8000ec49 <- 0x93000a06 -mem-write: 0x8000ec4d <- 0xef000b85 -mem-write: 0x8000ec51 <- 0x3d4cff0 -mem-write: 0x8000ec55 <- 0x3008427 -mem-write: 0x8000ec59 <- 0x83000425 -mem-write: 0x8000ec5d <- 0xb3008aa7 -mem-write: 0x8000ec61 <- 0x33409704 -mem-write: 0x8000ec65 <- 0x23014505 -mem-write: 0x8000ec69 <- 0x23009424 -mem-write: 0x8000ec6d <- 0x3300a420 -mem-write: 0x8000ec71 <- 0x23412789 -mem-write: 0x8000ec75 <- 0x63012aa4 -mem-write: 0x8000ec79 <- 0x3060904 -mem-write: 0x8000ec7d <- 0x830049a9 -mem-write: 0x8000ec81 <- 0x130009ab -mem-write: 0x8000ec85 <- 0x9300048a -mem-write: 0x8000ec89 <- 0xe3008989 -mem-write: 0x8000ec8d <- 0xe3fe0908 -mem-write: 0x8000ec91 <- 0x93f0997e -mem-write: 0x8000ec95 <- 0x13000904 -mem-write: 0x8000ec99 <- 0x6f00090a -mem-write: 0x8000ec9d <- 0x13fadff0 -mem-write: 0x8000eca1 <- 0xef000b05 -mem-write: 0x8000eca5 <- 0x13e80ff0 -mem-write: 0x8000eca9 <- 0xe300050c -mem-write: 0x8000ecad <- 0x83f6051e -mem-write: 0x8000ecb1 <- 0x13010425 -mem-write: 0x8000ecb5 <- 0xef000b05 -mem-write: 0x8000ecb9 <- 0x938adf50 -mem-write: 0x8000ecbd <- 0x2300c007 -mem-write: 0x8000ecc1 <- 0x8300fb20 -mem-write: 0x8000ecc5 <- 0x1300c457 -mem-write: 0x8000ecc9 <- 0x93fff005 -mem-write: 0x8000eccd <- 0x230407e7 -mem-write: 0x8000ecd1 <- 0x2300f416 -mem-write: 0x8000ecd5 <- 0x23000aa4 -mem-write: 0x8000ecd9 <- 0x6f000aa2 -mem-write: 0x8000ecdd <- 0x2300c000 -mem-write: 0x8000ece1 <- 0x13000aa2 -mem-write: 0x8000ece5 <- 0x83000005 -mem-write: 0x8000ece9 <- 0x302c120 -mem-write: 0x8000eced <- 0x83028124 -mem-write: 0x8000ecf1 <- 0x3024124 -mem-write: 0x8000ecf5 <- 0x83020129 -mem-write: 0x8000ecf9 <- 0x301c129 -mem-write: 0x8000ecfd <- 0x8301812a -mem-write: 0x8000ed01 <- 0x301412a -mem-write: 0x8000ed05 <- 0x8301012b -mem-write: 0x8000ed09 <- 0x300c12b -mem-write: 0x8000ed0d <- 0x1300812c -mem-write: 0x8000ed11 <- 0x67030101 -mem-write: 0x8000ed15 <- 0x83000080 -mem-write: 0x8000ed19 <- 0x1300c5d7 -mem-write: 0x8000ed1d <- 0x23ed0101 -mem-write: 0x8000ed21 <- 0x2311412c -mem-write: 0x8000ed25 <- 0x23116128 -mem-write: 0x8000ed29 <- 0x2311a120 -mem-write: 0x8000ed2d <- 0x23121126 -mem-write: 0x8000ed31 <- 0x23128124 -mem-write: 0x8000ed35 <- 0x23129122 -mem-write: 0x8000ed39 <- 0x23132120 -mem-write: 0x8000ed3d <- 0x2311312e -mem-write: 0x8000ed41 <- 0x2311512a -mem-write: 0x8000ed45 <- 0x23117126 -mem-write: 0x8000ed49 <- 0x23118124 -mem-write: 0x8000ed4d <- 0x23119122 -mem-write: 0x8000ed51 <- 0x930fb12e -mem-write: 0x8000ed55 <- 0x230807f7 -mem-write: 0x8000ed59 <- 0x1300d126 -mem-write: 0x8000ed5d <- 0x1300058a -mem-write: 0x8000ed61 <- 0x1300050b -mem-write: 0x8000ed65 <- 0x6300060d -mem-write: 0x8000ed69 <- 0x83000786 -mem-write: 0x8000ed6d <- 0xe30105a7 -mem-write: 0x8000ed71 <- 0xb75e0784 -mem-write: 0x8000ed75 <- 0x93800157 -mem-write: 0x8000ed79 <- 0x9304c10a -mem-write: 0x8000ed7d <- 0xb7370787 -mem-write: 0x8000ed81 <- 0xb780015b -mem-write: 0x8000ed85 <- 0x93800154 -mem-write: 0x8000ed89 <- 0x23000d09 -mem-write: 0x8000ed8d <- 0x23055120 -mem-write: 0x8000ed91 <- 0x23040124 -mem-write: 0x8000ed95 <- 0x23040122 -mem-write: 0x8000ed99 <- 0x2300012a -mem-write: 0x8000ed9d <- 0x2300012c -mem-write: 0x8000eda1 <- 0x23020120 -mem-write: 0x8000eda5 <- 0x2300012e -mem-write: 0x8000eda9 <- 0x23000124 -mem-write: 0x8000edad <- 0x9300f128 -mem-write: 0x8000edb1 <- 0x934dcb8b -mem-write: 0x8000edb5 <- 0x134ec484 -mem-write: 0x8000edb9 <- 0x83000a8d -mem-write: 0x8000edbd <- 0x630009c7 -mem-write: 0x8000edc1 <- 0x1320078c -mem-write: 0x8000edc5 <- 0x93000984 -mem-write: 0x8000edc9 <- 0x63025006 -mem-write: 0x8000edcd <- 0x832ad788 -mem-write: 0x8000edd1 <- 0x13001447 -mem-write: 0x8000edd5 <- 0xe3001404 -mem-write: 0x8000edd9 <- 0x33fe079a -mem-write: 0x8000eddd <- 0x6341340c -mem-write: 0x8000ede1 <- 0x831f340c -mem-write: 0x8000ede5 <- 0x83048126 -mem-write: 0x8000ede9 <- 0x23044127 -mem-write: 0x8000eded <- 0xb3013d20 -mem-write: 0x8000edf1 <- 0x93018686 -mem-write: 0x8000edf5 <- 0x23001787 -mem-write: 0x8000edf9 <- 0x23018d22 -mem-write: 0x8000edfd <- 0x2304d124 -mem-write: 0x8000ee01 <- 0x9304f122 -mem-write: 0x8000ee05 <- 0x13007006 -mem-write: 0x8000ee09 <- 0x63008d0d -mem-write: 0x8000ee0d <- 0x328f6c0 -mem-write: 0x8000ee11 <- 0x83008127 -mem-write: 0x8000ee15 <- 0x33000447 -mem-write: 0x8000ee19 <- 0x23018707 -mem-write: 0x8000ee1d <- 0x6300e124 -mem-write: 0x8000ee21 <- 0x931a078c -mem-write: 0x8000ee25 <- 0x83fff008 -mem-write: 0x8000ee29 <- 0x93001446 -mem-write: 0x8000ee2d <- 0xa3001409 -mem-write: 0x8000ee31 <- 0x2302010d -mem-write: 0x8000ee35 <- 0x13000122 -mem-write: 0x8000ee39 <- 0x13000009 -mem-write: 0x8000ee3d <- 0x9305a00c -mem-write: 0x8000ee41 <- 0x9300900c -mem-write: 0x8000ee45 <- 0x1302a005 -mem-write: 0x8000ee49 <- 0x93000884 -mem-write: 0x8000ee4d <- 0x93001989 -mem-write: 0x8000ee51 <- 0x63fe0687 -mem-write: 0x8000ee55 <- 0x304fc68 -mem-write: 0x8000ee59 <- 0x93010127 -mem-write: 0x8000ee5d <- 0xb3002797 -mem-write: 0x8000ee61 <- 0x8300e787 -mem-write: 0x8000ee65 <- 0x670007a7 -mem-write: 0x8000ee69 <- 0x23000780 -mem-write: 0x8000ee6d <- 0x93000122 -mem-write: 0x8000ee71 <- 0x3fd0687 -mem-write: 0x8000ee75 <- 0x83004126 -mem-write: 0x8000ee79 <- 0x930009c6 -mem-write: 0x8000ee7d <- 0x13001989 -mem-write: 0x8000ee81 <- 0x33002617 -mem-write: 0x8000ee85 <- 0x1300c707 -mem-write: 0x8000ee89 <- 0xb3001717 -mem-write: 0x8000ee8d <- 0x2300e787 -mem-write: 0x8000ee91 <- 0x9300f122 -mem-write: 0x8000ee95 <- 0xe3fd0687 -mem-write: 0x8000ee99 <- 0x93fcfcfe -mem-write: 0x8000ee9d <- 0xe3fe0687 -mem-write: 0x8000eea1 <- 0x63fafc7c -mem-write: 0x8000eea5 <- 0x2312068a -mem-write: 0x8000eea9 <- 0xa308d106 -mem-write: 0x8000eead <- 0x1302010d -mem-write: 0x8000eeb1 <- 0x9300100c -mem-write: 0x8000eeb5 <- 0x1300100c -mem-write: 0x8000eeb9 <- 0x9308c104 -mem-write: 0x8000eebd <- 0x13000008 -mem-write: 0x8000eec1 <- 0x6300297f -mem-write: 0x8000eec5 <- 0x13000f04 -mem-write: 0x8000eec9 <- 0x93002c0c -mem-write: 0x8000eecd <- 0x8308497e -mem-write: 0x8000eed1 <- 0x3048127 -mem-write: 0x8000eed5 <- 0x63044126 -mem-write: 0x8000eed9 <- 0x3000e98 -mem-write: 0x8000eedd <- 0xb3004127 -mem-write: 0x8000eee1 <- 0x6341870d -mem-write: 0x8000eee5 <- 0x37bb04a -mem-write: 0x8000eee9 <- 0x9303b145 -mem-write: 0x8000eeed <- 0x93001605 -mem-write: 0x8000eef1 <- 0x63008d06 -mem-write: 0x8000eef5 <- 0x13040500 -mem-write: 0x8000eef9 <- 0x9303b105 -mem-write: 0x8000eefd <- 0x23001787 -mem-write: 0x8000ef01 <- 0x1300ad20 -mem-write: 0x8000ef05 <- 0x23001005 -mem-write: 0x8000ef09 <- 0x2300ad22 -mem-write: 0x8000ef0d <- 0x2304f124 -mem-write: 0x8000ef11 <- 0x1304b122 -mem-write: 0x8000ef15 <- 0xe3007005 -mem-write: 0x8000ef19 <- 0x930ab540 -mem-write: 0x8000ef1d <- 0x1300260f -mem-write: 0x8000ef21 <- 0x13010d05 -mem-write: 0x8000ef25 <- 0x13000586 -mem-write: 0x8000ef29 <- 0x9300068d -mem-write: 0x8000ef2d <- 0x93000f85 -mem-write: 0x8000ef31 <- 0x63000506 -mem-write: 0x8000ef35 <- 0x13020f0c -mem-write: 0x8000ef39 <- 0x9303c106 -mem-write: 0x8000ef3d <- 0x23002787 -mem-write: 0x8000ef41 <- 0x1300cd20 -mem-write: 0x8000ef45 <- 0x23002006 -mem-write: 0x8000ef49 <- 0x2300cd22 -mem-write: 0x8000ef4d <- 0x2304f124 -mem-write: 0x8000ef51 <- 0x1304b122 -mem-write: 0x8000ef55 <- 0xe3007007 -mem-write: 0x8000ef59 <- 0x130ab742 -mem-write: 0x8000ef5d <- 0x13000586 -mem-write: 0x8000ef61 <- 0x9300068d -mem-write: 0x8000ef65 <- 0x93001585 -mem-write: 0x8000ef69 <- 0x13008686 -mem-write: 0x8000ef6d <- 0x63080005 -mem-write: 0x8000ef71 <- 0xb354ae8c -mem-write: 0x8000ef75 <- 0x6341988d -mem-write: 0x8000ef79 <- 0xb363b044 -mem-write: 0x8000ef7d <- 0x2300fc87 -mem-write: 0x8000ef81 <- 0x23008d20 -mem-write: 0x8000ef85 <- 0x23019d22 -mem-write: 0x8000ef89 <- 0x2304f124 -mem-write: 0x8000ef8d <- 0x1304b122 -mem-write: 0x8000ef91 <- 0x63007007 -mem-write: 0x8000ef95 <- 0x136cb742 -mem-write: 0x8000ef99 <- 0x63004973 -mem-write: 0x8000ef9d <- 0x3000308 -mem-write: 0x8000efa1 <- 0xb3004127 -mem-write: 0x8000efa5 <- 0xe341870c -mem-write: 0x8000efa9 <- 0x3099048 -mem-write: 0x8000efad <- 0x63004124 -mem-write: 0x8000efb1 <- 0x13018454 -mem-write: 0x8000efb5 <- 0x3000c04 -mem-write: 0x8000efb9 <- 0x33008127 -mem-write: 0x8000efbd <- 0x23008707 -mem-write: 0x8000efc1 <- 0x6300e124 -mem-write: 0x8000efc5 <- 0x836a079a -mem-write: 0x8000efc9 <- 0x230009c7 -mem-write: 0x8000efcd <- 0x13040122 -mem-write: 0x8000efd1 <- 0xe3000a8d -mem-write: 0x8000efd5 <- 0x83de0798 -mem-write: 0x8000efd9 <- 0xe3048127 -mem-write: 0x8000efdd <- 0x8356079e -mem-write: 0x8000efe1 <- 0x9300ca57 -mem-write: 0x8000efe5 <- 0xe30407f7 -mem-write: 0x8000efe9 <- 0x835a0794 -mem-write: 0x8000efed <- 0x312c120 -mem-write: 0x8000eff1 <- 0x3128124 -mem-write: 0x8000eff5 <- 0x83008125 -VXDRV: upload 1024 bytes to 0x8000eff9 -mem-write: 0x8000eff9 <- 0x3124124 -mem-write: 0x8000effd <- 0x83120129 -mem-write: 0x8000f001 <- 0x311c129 -mem-write: 0x8000f005 <- 0x8311812a -mem-write: 0x8000f009 <- 0x311412a -mem-write: 0x8000f00d <- 0x8311012b -mem-write: 0x8000f011 <- 0x310c12b -mem-write: 0x8000f015 <- 0x8310812c -mem-write: 0x8000f019 <- 0x310412c -mem-write: 0x8000f01d <- 0x8310012d -mem-write: 0x8000f021 <- 0x130fc12d -mem-write: 0x8000f025 <- 0x67130101 -mem-write: 0x8000f029 <- 0x13000080 -mem-write: 0x8000f02d <- 0xef000b05 -mem-write: 0x8000f031 <- 0x83d08f80 -mem-write: 0x8000f035 <- 0x13004527 -mem-write: 0x8000f039 <- 0x23000785 -mem-write: 0x8000f03d <- 0xef00f12e -mem-write: 0x8000f041 <- 0x93cacfa0 -mem-write: 0x8000f045 <- 0x13000507 -mem-write: 0x8000f049 <- 0x93000b05 -mem-write: 0x8000f04d <- 0x2300078d -mem-write: 0x8000f051 <- 0xef02f120 -mem-write: 0x8000f055 <- 0x83ce4f80 -mem-write: 0x8000f059 <- 0x93008527 -mem-write: 0x8000f05d <- 0x2302a005 -mem-write: 0x8000f061 <- 0xe300f12c -mem-write: 0x8000f065 <- 0x831e0d98 -mem-write: 0x8000f069 <- 0x6f0009c6 -mem-write: 0x8000f06d <- 0x83de1ff0 -mem-write: 0x8000f071 <- 0x130009c6 -mem-write: 0x8000f075 <- 0x6f020969 -mem-write: 0x8000f079 <- 0x33dd5ff0 -mem-write: 0x8000f07d <- 0xe341340c -mem-write: 0x8000f081 <- 0x83d73412 -mem-write: 0x8000f085 <- 0x6f000447 -mem-write: 0x8000f089 <- 0x13d99ff0 -mem-write: 0x8000f08d <- 0x93040106 -mem-write: 0x8000f091 <- 0x13000a05 -mem-write: 0x8000f095 <- 0xef000b05 -mem-write: 0x8000f099 <- 0xe3ac5ff0 -mem-write: 0x8000f09d <- 0x13f40512 -mem-write: 0x8000f0a1 <- 0x6f000a8d -mem-write: 0x8000f0a5 <- 0x83d6dff0 -mem-write: 0x8000f0a9 <- 0x9300c127 -mem-write: 0x8000f0ad <- 0xa3000408 -mem-write: 0x8000f0b1 <- 0x302010d -mem-write: 0x8000f0b5 <- 0x930007a4 -mem-write: 0x8000f0b9 <- 0xe300478d -mem-write: 0x8000f0bd <- 0x93380404 -mem-write: 0x8000f0c1 <- 0xe3fff007 -mem-write: 0x8000f0c5 <- 0x1326f88e -mem-write: 0x8000f0c9 <- 0x93000886 -mem-write: 0x8000f0cd <- 0x13000005 -mem-write: 0x8000f0d1 <- 0x23000405 -mem-write: 0x8000f0d5 <- 0xef011126 -mem-write: 0x8000f0d9 <- 0x83df9f80 -mem-write: 0x8000f0dd <- 0xe300c128 -mem-write: 0x8000f0e1 <- 0xb3480506 -mem-write: 0x8000f0e5 <- 0x2340850c -mem-write: 0x8000f0e9 <- 0x9301b126 -mem-write: 0x8000f0ed <- 0x6f000008 -mem-write: 0x8000f0f1 <- 0x3094000 -mem-write: 0x8000f0f5 <- 0xa300c127 -mem-write: 0x8000f0f9 <- 0x1302010d -mem-write: 0x8000f0fd <- 0x8300100c -mem-write: 0x8000f101 <- 0x13000727 -mem-write: 0x8000f105 <- 0x23004707 -mem-write: 0x8000f109 <- 0x2300e126 -mem-write: 0x8000f10d <- 0x9308f106 -mem-write: 0x8000f111 <- 0x1300100c -mem-write: 0x8000f115 <- 0x6f08c104 -mem-write: 0x8000f119 <- 0x93da5ff0 -mem-write: 0x8000f11d <- 0x93020977 -mem-write: 0x8000f121 <- 0x63000408 -mem-write: 0x8000f125 <- 0x830e078e -mem-write: 0x8000f129 <- 0x9300c127 -mem-write: 0x8000f12d <- 0x93007787 -mem-write: 0x8000f131 <- 0x83ff87f7 -mem-write: 0x8000f135 <- 0x830047a6 -mem-write: 0x8000f139 <- 0x930007ac -mem-write: 0x8000f13d <- 0x23008787 -mem-write: 0x8000f141 <- 0x1300f126 -mem-write: 0x8000f145 <- 0x6300068c -mem-write: 0x8000f149 <- 0x931006c4 -mem-write: 0x8000f14d <- 0x93fff006 -mem-write: 0x8000f151 <- 0x6300090d -mem-write: 0x8000f155 <- 0xb300d888 -mem-write: 0x8000f159 <- 0x93018ce6 -mem-write: 0x8000f15d <- 0x63f7f97d -mem-write: 0x8000f161 <- 0xe376068e -mem-write: 0x8000f165 <- 0x93000c1c -mem-write: 0x8000f169 <- 0xe3009006 -mem-write: 0x8000f16d <- 0x930196e8 -mem-write: 0x8000f171 <- 0xa3030c87 -mem-write: 0x8000f175 <- 0x130ef107 -mem-write: 0x8000f179 <- 0x93000d89 -mem-write: 0x8000f17d <- 0x1300100c -mem-write: 0x8000f181 <- 0x130ef104 -mem-write: 0x8000f185 <- 0x6300088c -mem-write: 0x8000f189 <- 0x130198d4 -mem-write: 0x8000f18d <- 0x83000c8c -mem-write: 0x8000f191 <- 0xb303b147 -mem-write: 0x8000f195 <- 0x3300f037 -mem-write: 0x8000f199 <- 0x6f00fc0c -mem-write: 0x8000f19d <- 0x93d25ff0 -mem-write: 0x8000f1a1 <- 0x13000408 -mem-write: 0x8000f1a5 <- 0x93010969 -mem-write: 0x8000f1a9 <- 0x63020977 -mem-write: 0x8000f1ad <- 0x83740784 -mem-write: 0x8000f1b1 <- 0x9300c127 -mem-write: 0x8000f1b5 <- 0x93007787 -mem-write: 0x8000f1b9 <- 0x83ff87f7 -mem-write: 0x8000f1bd <- 0x30007ac -mem-write: 0x8000f1c1 <- 0x930047ac -mem-write: 0x8000f1c5 <- 0x23008787 -mem-write: 0x8000f1c9 <- 0x9300f126 -mem-write: 0x8000f1cd <- 0x93bff97d -mem-write: 0x8000f1d1 <- 0xa3000006 -mem-write: 0x8000f1d5 <- 0x1302010d -mem-write: 0x8000f1d9 <- 0x63fff006 -mem-write: 0x8000f1dd <- 0x3308c88e -mem-write: 0x8000f1e1 <- 0x13018ce6 -mem-write: 0x8000f1e5 <- 0x63f7fdf9 -mem-write: 0x8000f1e9 <- 0x634a0614 -mem-write: 0x8000f1ed <- 0x63280892 -mem-write: 0x8000f1f1 <- 0x936e069a -mem-write: 0x8000f1f5 <- 0x13001dfc -mem-write: 0x8000f1f9 <- 0xe30f0104 -mem-write: 0x8000f1fd <- 0x93f80c84 -mem-write: 0x8000f201 <- 0xa3030007 -mem-write: 0x8000f205 <- 0x130ef107 -mem-write: 0x8000f209 <- 0x6f0ef104 -mem-write: 0x8000f20d <- 0x13f79ff0 -mem-write: 0x8000f211 <- 0x93010969 -mem-write: 0x8000f215 <- 0x93020977 -mem-write: 0x8000f219 <- 0xe3000408 -mem-write: 0x8000f21d <- 0x3f00796 -mem-write: 0x8000f221 <- 0x9300c127 -mem-write: 0x8000f225 <- 0x93010977 -mem-write: 0x8000f229 <- 0xe3004706 -mem-write: 0x8000f22d <- 0x93040792 -mem-write: 0x8000f231 <- 0xe3040977 -mem-write: 0x8000f235 <- 0x83260786 -mem-write: 0x8000f239 <- 0x2300c127 -mem-write: 0x8000f23d <- 0x8300d126 -mem-write: 0x8000f241 <- 0x1300079c -mem-write: 0x8000f245 <- 0x9341fcdc -mem-write: 0x8000f249 <- 0xe3000c06 -mem-write: 0x8000f24d <- 0xb3f006d0 -mem-write: 0x8000f251 <- 0xb3019036 -mem-write: 0x8000f255 <- 0x3341800e -mem-write: 0x8000f259 <- 0x9340de8c -mem-write: 0x8000f25d <- 0xa302d006 -mem-write: 0x8000f261 <- 0x1302d10d -mem-write: 0x8000f265 <- 0xb3fff006 -mem-write: 0x8000f269 <- 0x9341900c -mem-write: 0x8000f26d <- 0x9300090d -mem-write: 0x8000f271 <- 0xe3001006 -mem-write: 0x8000f275 <- 0x13f6c896 -mem-write: 0x8000f279 <- 0xe3001006 -mem-write: 0x8000f27d <- 0x13eec684 -mem-write: 0x8000f281 <- 0x63002006 -mem-write: 0x8000f285 <- 0x1320c680 -mem-write: 0x8000f289 <- 0x930f0104 -mem-write: 0x8000f28d <- 0x9301dc17 -mem-write: 0x8000f291 <- 0x93007cf6 -mem-write: 0x8000f295 <- 0x93003cdc -mem-write: 0x8000f299 <- 0xb3030686 -mem-write: 0x8000f29d <- 0x130197ec -mem-write: 0x8000f2a1 <- 0xa3003c5c -mem-write: 0x8000f2a5 <- 0xb3fed40f -mem-write: 0x8000f2a9 <- 0x93018ce7 -mem-write: 0x8000f2ad <- 0x13000405 -mem-write: 0x8000f2b1 <- 0xe3fff404 -mem-write: 0x8000f2b5 <- 0x93fc079c -mem-write: 0x8000f2b9 <- 0x63001df7 -mem-write: 0x8000f2bd <- 0x931e078e -mem-write: 0x8000f2c1 <- 0x63030007 -mem-write: 0x8000f2c5 <- 0x931ef68a -mem-write: 0x8000f2c9 <- 0xa3ffe585 -mem-write: 0x8000f2cd <- 0x93fef40f -mem-write: 0x8000f2d1 <- 0xb30f0107 -mem-write: 0x8000f2d5 <- 0x1340b78c -mem-write: 0x8000f2d9 <- 0x13000d89 -mem-write: 0x8000f2dd <- 0x6f000584 -mem-write: 0x8000f2e1 <- 0x93ea5ff0 -mem-write: 0x8000f2e5 <- 0x93000408 -mem-write: 0x8000f2e9 <- 0x9301096d -mem-write: 0x8000f2ed <- 0x63020df7 -mem-write: 0x8000f2f1 <- 0x83620788 -mem-write: 0x8000f2f5 <- 0x9300c127 -mem-write: 0x8000f2f9 <- 0x13001006 -mem-write: 0x8000f2fd <- 0x13007789 -mem-write: 0x8000f301 <- 0x93ff8979 -mem-write: 0x8000f305 <- 0x83008907 -mem-write: 0x8000f309 <- 0x300092c -mem-write: 0x8000f30d <- 0x2300492c -mem-write: 0x8000f311 <- 0x6f00f126 -mem-write: 0x8000f315 <- 0x83ec1ff0 -mem-write: 0x8000f319 <- 0xb700c127 -mem-write: 0x8000f31d <- 0x93ffff86 -mem-write: 0x8000f321 <- 0x838306c6 -mem-write: 0x8000f325 <- 0x930007ac -mem-write: 0x8000f329 <- 0x23004787 -mem-write: 0x8000f32d <- 0xb700f126 -mem-write: 0x8000f331 <- 0x93800157 -mem-write: 0x8000f335 <- 0x23a3c787 -mem-write: 0x8000f339 <- 0x9302d11e -mem-write: 0x8000f33d <- 0x13000408 -mem-write: 0x8000f341 <- 0x9300000c -mem-write: 0x8000f345 <- 0x2300296d -mem-write: 0x8000f349 <- 0x9300f12a -mem-write: 0x8000f34d <- 0x6f002006 -mem-write: 0x8000f351 <- 0x83e85ff0 -mem-write: 0x8000f355 <- 0x130009c6 -mem-write: 0x8000f359 <- 0x6f080969 -mem-write: 0x8000f35d <- 0x83af1ff0 -mem-write: 0x8000f361 <- 0x130009c6 -mem-write: 0x8000f365 <- 0xe3001987 -mem-write: 0x8000f369 <- 0x9322b68a -mem-write: 0x8000f36d <- 0x93fd0687 -mem-write: 0x8000f371 <- 0x13000709 -mem-write: 0x8000f375 <- 0xe3000004 -mem-write: 0x8000f379 <- 0x83acfcec -mem-write: 0x8000f37d <- 0x130009c6 -mem-write: 0x8000f381 <- 0xb3002417 -mem-write: 0x8000f385 <- 0x93008708 -mem-write: 0x8000f389 <- 0x33001898 -mem-write: 0x8000f38d <- 0x9300f884 -mem-write: 0x8000f391 <- 0x93fd0687 -mem-write: 0x8000f395 <- 0xe3001989 -mem-write: 0x8000f399 <- 0x6ffefcf2 -mem-write: 0x8000f39d <- 0x83ab5ff0 -mem-write: 0x8000f3a1 <- 0x130009c6 -mem-write: 0x8000f3a5 <- 0x6f004969 -mem-write: 0x8000f3a9 <- 0x93aa5ff0 -mem-write: 0x8000f3ad <- 0x8302b007 -mem-write: 0x8000f3b1 <- 0xa30009c6 -mem-write: 0x8000f3b5 <- 0x6f02f10d -mem-write: 0x8000f3b9 <- 0x3a95ff0 -mem-write: 0x8000f3bd <- 0x8300c127 -mem-write: 0x8000f3c1 <- 0x830009c6 -mem-write: 0x8000f3c5 <- 0x13000727 -mem-write: 0x8000f3c9 <- 0x23004707 -mem-write: 0x8000f3cd <- 0x2300e126 -mem-write: 0x8000f3d1 <- 0xe300f122 -mem-write: 0x8000f3d5 <- 0xb3a607dc -mem-write: 0x8000f3d9 <- 0x2340f007 -mem-write: 0x8000f3dd <- 0x1300f122 -mem-write: 0x8000f3e1 <- 0x6f004969 -mem-write: 0x8000f3e5 <- 0x83a69ff0 -mem-write: 0x8000f3e9 <- 0x130009c6 -mem-write: 0x8000f3ed <- 0x6f001969 -mem-write: 0x8000f3f1 <- 0x83a5dff0 -mem-write: 0x8000f3f5 <- 0x8303b147 -VXDRV: upload 1024 bytes to 0x8000f3f9 -mem-write: 0x8000f3f9 <- 0xe30009c6 -mem-write: 0x8000f3fd <- 0x93a40798 -mem-write: 0x8000f401 <- 0xa3020007 -mem-write: 0x8000f405 <- 0x6f02f10d -mem-write: 0x8000f409 <- 0x83a45ff0 -mem-write: 0x8000f40d <- 0x930009c6 -mem-write: 0x8000f411 <- 0x63068007 -mem-write: 0x8000f415 <- 0x137ef68e -mem-write: 0x8000f419 <- 0x6f040969 -mem-write: 0x8000f41d <- 0x3a31ff0 -mem-write: 0x8000f421 <- 0x9300c127 -mem-write: 0x8000f425 <- 0x83020977 -mem-write: 0x8000f429 <- 0x13000726 -mem-write: 0x8000f42d <- 0x23004707 -mem-write: 0x8000f431 <- 0x6300e126 -mem-write: 0x8000f435 <- 0x935e079c -mem-write: 0x8000f439 <- 0x63010977 -mem-write: 0x8000f43d <- 0x937e079e -mem-write: 0x8000f441 <- 0xe3040977 -mem-write: 0x8000f445 <- 0x13100794 -mem-write: 0x8000f449 <- 0x63200973 -mem-write: 0x8000f44d <- 0x837e0306 -mem-write: 0x8000f451 <- 0x23008127 -mem-write: 0x8000f455 <- 0x6f00f680 -mem-write: 0x8000f459 <- 0x83965ff0 -mem-write: 0x8000f45d <- 0x930009c6 -mem-write: 0x8000f461 <- 0x6306c007 -mem-write: 0x8000f465 <- 0x137af68e -mem-write: 0x8000f469 <- 0x6f010969 -mem-write: 0x8000f46d <- 0x139e1ff0 -mem-write: 0x8000f471 <- 0xe3001006 -mem-write: 0x8000f475 <- 0x1310c684 -mem-write: 0x8000f479 <- 0x93002006 -mem-write: 0x8000f47d <- 0xe300090d -mem-write: 0x8000f481 <- 0x83e0c694 -mem-write: 0x8000f485 <- 0x13014126 -mem-write: 0x8000f489 <- 0x930f0104 -mem-write: 0x8000f48d <- 0xb300fcf7 -mem-write: 0x8000f491 <- 0x300f687 -mem-write: 0x8000f495 <- 0x930007c7 -mem-write: 0x8000f499 <- 0x93004cdc -mem-write: 0x8000f49d <- 0xb301cc17 -mem-write: 0x8000f4a1 <- 0x130197ec -mem-write: 0x8000f4a5 <- 0xa3004c5c -mem-write: 0x8000f4a9 <- 0xb3fee40f -mem-write: 0x8000f4ad <- 0x13018ce7 -mem-write: 0x8000f4b1 <- 0xe3fff404 -mem-write: 0x8000f4b5 <- 0x93fc079c -mem-write: 0x8000f4b9 <- 0xb30f0107 -mem-write: 0x8000f4bd <- 0x1340878c -mem-write: 0x8000f4c1 <- 0x6f000d89 -mem-write: 0x8000f4c5 <- 0x3cc1ff0 -mem-write: 0x8000f4c9 <- 0xb3004127 -mem-write: 0x8000f4cd <- 0xe341870d -mem-write: 0x8000f4d1 <- 0x13abb052 -mem-write: 0x8000f4d5 <- 0xe3010005 -mem-write: 0x8000f4d9 <- 0x230bb556 -mem-write: 0x8000f4dd <- 0x93028122 -mem-write: 0x8000f4e1 <- 0x13010006 -mem-write: 0x8000f4e5 <- 0x93000a04 -mem-write: 0x8000f4e9 <- 0x1300700e -mem-write: 0x8000f4ed <- 0x93000d8a -mem-write: 0x8000f4f1 <- 0x9300098d -mem-write: 0x8000f4f5 <- 0x6f000889 -mem-write: 0x8000f4f9 <- 0x1300c000 -mem-write: 0x8000f4fd <- 0x63ff0a0a -mem-write: 0x8000f501 <- 0x930546da -mem-write: 0x8000f505 <- 0x13010787 -mem-write: 0x8000f509 <- 0x23001606 -mem-write: 0x8000f50d <- 0x23009d20 -mem-write: 0x8000f511 <- 0x2300dd22 -mem-write: 0x8000f515 <- 0x2304f124 -mem-write: 0x8000f519 <- 0x1304c122 -mem-write: 0x8000f51d <- 0xe3008d0d -mem-write: 0x8000f521 <- 0x13fccede -mem-write: 0x8000f525 <- 0x93040106 -mem-write: 0x8000f529 <- 0x13000405 -mem-write: 0x8000f52d <- 0xef000b05 -mem-write: 0x8000f531 <- 0x63e2cff0 -mem-write: 0x8000f535 <- 0x936e051e -mem-write: 0x8000f539 <- 0x13010006 -mem-write: 0x8000f53d <- 0x83ff0a0a -mem-write: 0x8000f541 <- 0x3048127 -mem-write: 0x8000f545 <- 0x13044126 -mem-write: 0x8000f549 <- 0x93000a8d -mem-write: 0x8000f54d <- 0xe300700e -mem-write: 0x8000f551 <- 0x93fb46ca -mem-write: 0x8000f555 <- 0x93000988 -mem-write: 0x8000f559 <- 0x93000d89 -mem-write: 0x8000f55d <- 0x13000a0d -mem-write: 0x8000f561 <- 0x300040a -mem-write: 0x8000f565 <- 0x13024124 -mem-write: 0x8000f569 <- 0x13001606 -mem-write: 0x8000f56d <- 0xb3008d05 -mem-write: 0x8000f571 <- 0x2301b787 -mem-write: 0x8000f575 <- 0x23009d20 -mem-write: 0x8000f579 <- 0x2301bd22 -mem-write: 0x8000f57d <- 0x2304f124 -mem-write: 0x8000f581 <- 0x1304c122 -mem-write: 0x8000f585 <- 0x63007007 -mem-write: 0x8000f589 <- 0xb364c74a -mem-write: 0x8000f58d <- 0x9341988d -mem-write: 0x8000f591 <- 0x93001605 -mem-write: 0x8000f595 <- 0x13008506 -mem-write: 0x8000f599 <- 0xe300050d -mem-write: 0x8000f59d <- 0x139fb050 -mem-write: 0x8000f5a1 <- 0x63010005 -mem-write: 0x8000f5a5 <- 0x9373b55e -mem-write: 0x8000f5a9 <- 0x93010006 -mem-write: 0x8000f5ad <- 0x6f007008 -mem-write: 0x8000f5b1 <- 0x9300c000 -mem-write: 0x8000f5b5 <- 0x63ff0d8d -mem-write: 0x8000f5b9 <- 0x9305b6da -mem-write: 0x8000f5bd <- 0x13010787 -mem-write: 0x8000f5c1 <- 0x23001606 -mem-write: 0x8000f5c5 <- 0x23009d20 -mem-write: 0x8000f5c9 <- 0x2300dd22 -mem-write: 0x8000f5cd <- 0x2304f124 -mem-write: 0x8000f5d1 <- 0x1304c122 -mem-write: 0x8000f5d5 <- 0xe3008d0d -mem-write: 0x8000f5d9 <- 0x13fcc8de -mem-write: 0x8000f5dd <- 0x93040106 -mem-write: 0x8000f5e1 <- 0x13000a05 -mem-write: 0x8000f5e5 <- 0xef000b05 -mem-write: 0x8000f5e9 <- 0xe3d74ff0 -mem-write: 0x8000f5ed <- 0x939e051a -mem-write: 0x8000f5f1 <- 0x93010006 -mem-write: 0x8000f5f5 <- 0x83ff0d8d -mem-write: 0x8000f5f9 <- 0x3048127 -mem-write: 0x8000f5fd <- 0x13044126 -mem-write: 0x8000f601 <- 0x93000a8d -mem-write: 0x8000f605 <- 0xe3007008 -mem-write: 0x8000f609 <- 0x93fbb6ca -mem-write: 0x8000f60d <- 0x13001605 -mem-write: 0x8000f611 <- 0xb3008d06 -mem-write: 0x8000f615 <- 0x2301b787 -mem-write: 0x8000f619 <- 0x23009d20 -mem-write: 0x8000f61d <- 0x2301bd22 -mem-write: 0x8000f621 <- 0x2304f124 -mem-write: 0x8000f625 <- 0x1304b122 -mem-write: 0x8000f629 <- 0x63007007 -mem-write: 0x8000f62d <- 0x1332b742 -mem-write: 0x8000f631 <- 0x9300060d -mem-write: 0x8000f635 <- 0xb3001585 -mem-write: 0x8000f639 <- 0x2300fc87 -mem-write: 0x8000f63d <- 0x23008d20 -mem-write: 0x8000f641 <- 0x23019d22 -mem-write: 0x8000f645 <- 0x2304f124 -mem-write: 0x8000f649 <- 0x1304b122 -mem-write: 0x8000f64d <- 0x93007007 -mem-write: 0x8000f651 <- 0xe3008606 -mem-write: 0x8000f655 <- 0x1394b752 -mem-write: 0x8000f659 <- 0x93040106 -mem-write: 0x8000f65d <- 0x13000a05 -mem-write: 0x8000f661 <- 0xef000b05 -mem-write: 0x8000f665 <- 0xe3cf8ff0 -mem-write: 0x8000f669 <- 0x8396051c -mem-write: 0x8000f66d <- 0x93048127 -mem-write: 0x8000f671 <- 0x6f000a86 -mem-write: 0x8000f675 <- 0x13925ff0 -mem-write: 0x8000f679 <- 0x93040106 -mem-write: 0x8000f67d <- 0x13000a05 -mem-write: 0x8000f681 <- 0xef000b05 -mem-write: 0x8000f685 <- 0xe3cd8ff0 -mem-write: 0x8000f689 <- 0x6f940500 -mem-write: 0x8000f68d <- 0x93955ff0 -mem-write: 0x8000f691 <- 0x6f00090d -mem-write: 0x8000f695 <- 0x93be5ff0 -mem-write: 0x8000f699 <- 0x63010006 -mem-write: 0x8000f69d <- 0x130bb6de -mem-write: 0x8000f6a1 <- 0x93000d07 -mem-write: 0x8000f6a5 <- 0x1300700f -mem-write: 0x8000f6a9 <- 0x23000c0d -mem-write: 0x8000f6ad <- 0x1303e122 -mem-write: 0x8000f6b1 <- 0x2300090c -mem-write: 0x8000f6b5 <- 0x1303d124 -mem-write: 0x8000f6b9 <- 0x13000a09 -mem-write: 0x8000f6bd <- 0x9300098a -mem-write: 0x8000f6c1 <- 0x13000409 -mem-write: 0x8000f6c5 <- 0x93000d84 -mem-write: 0x8000f6c9 <- 0x93000c8d -mem-write: 0x8000f6cd <- 0x6f00088c -mem-write: 0x8000f6d1 <- 0x1300c000 -mem-write: 0x8000f6d5 <- 0x63ff0404 -mem-write: 0x8000f6d9 <- 0x930486da -mem-write: 0x8000f6dd <- 0x13010787 -mem-write: 0x8000f6e1 <- 0x23001606 -mem-write: 0x8000f6e5 <- 0x23017720 -mem-write: 0x8000f6e9 <- 0x2300d722 -mem-write: 0x8000f6ed <- 0x2304f124 -mem-write: 0x8000f6f1 <- 0x1304c122 -mem-write: 0x8000f6f5 <- 0xe3008707 -mem-write: 0x8000f6f9 <- 0x13fccfde -mem-write: 0x8000f6fd <- 0x93040106 -mem-write: 0x8000f701 <- 0x13000905 -mem-write: 0x8000f705 <- 0xef000b05 -mem-write: 0x8000f709 <- 0x63c54ff0 -mem-write: 0x8000f70d <- 0x934a0516 -mem-write: 0x8000f711 <- 0x13010006 -mem-write: 0x8000f715 <- 0x83ff0404 -mem-write: 0x8000f719 <- 0x3048127 -mem-write: 0x8000f71d <- 0x13044126 -mem-write: 0x8000f721 <- 0x93000a87 -mem-write: 0x8000f725 <- 0xe300700f -mem-write: 0x8000f729 <- 0x3fa86ca -mem-write: 0x8000f72d <- 0x8302412f -mem-write: 0x8000f731 <- 0x9302812e -mem-write: 0x8000f735 <- 0x93000c88 -mem-write: 0x8000f739 <- 0x93000d8c -mem-write: 0x8000f73d <- 0x1300040d -mem-write: 0x8000f741 <- 0x93000984 -mem-write: 0x8000f745 <- 0x13000a09 -mem-write: 0x8000f749 <- 0x1300090a -mem-write: 0x8000f74d <- 0x13000c09 -mem-write: 0x8000f751 <- 0x13000d0c -mem-write: 0x8000f755 <- 0xb300070d -mem-write: 0x8000f759 <- 0x1301b787 -mem-write: 0x8000f75d <- 0x23001606 -mem-write: 0x8000f761 <- 0x23017d20 -mem-write: 0x8000f765 <- 0x2301bd22 -mem-write: 0x8000f769 <- 0x2304f124 -mem-write: 0x8000f76d <- 0x9304c122 -mem-write: 0x8000f771 <- 0x13007006 -mem-write: 0x8000f775 <- 0x63008d0d -mem-write: 0x8000f779 <- 0x13f6c6d8 -mem-write: 0x8000f77d <- 0x93040106 -mem-write: 0x8000f781 <- 0x13000a05 -mem-write: 0x8000f785 <- 0x23000b05 -mem-write: 0x8000f789 <- 0x23031126 -mem-write: 0x8000f78d <- 0x2303d124 -mem-write: 0x8000f791 <- 0xef03e122 -mem-write: 0x8000f795 <- 0xe3bc8ff0 -mem-write: 0x8000f799 <- 0x83840514 -mem-write: 0x8000f79d <- 0x3048127 -mem-write: 0x8000f7a1 <- 0x83044126 -mem-write: 0x8000f7a5 <- 0x8302c128 -mem-write: 0x8000f7a9 <- 0x302812e -mem-write: 0x8000f7ad <- 0x1302412f -mem-write: 0x8000f7b1 <- 0x6f000a8d -mem-write: 0x8000f7b5 <- 0x13f34ff0 -mem-write: 0x8000f7b9 <- 0x93040106 -mem-write: 0x8000f7bd <- 0x13000a05 -mem-write: 0x8000f7c1 <- 0x23000b05 -mem-write: 0x8000f7c5 <- 0x23031126 -mem-write: 0x8000f7c9 <- 0x2303d124 -mem-write: 0x8000f7cd <- 0xef03e122 -mem-write: 0x8000f7d1 <- 0xe3b8cff0 -mem-write: 0x8000f7d5 <- 0x3800516 -mem-write: 0x8000f7d9 <- 0x83044126 -mem-write: 0x8000f7dd <- 0x83048127 -mem-write: 0x8000f7e1 <- 0x8302c128 -mem-write: 0x8000f7e5 <- 0x302812e -mem-write: 0x8000f7e9 <- 0x9302412f -mem-write: 0x8000f7ed <- 0x93054106 -mem-write: 0x8000f7f1 <- 0x13001605 -mem-write: 0x8000f7f5 <- 0x6f000a8d -VXDRV: upload 1024 bytes to 0x8000f7f9 -mem-write: 0x8000f7f9 <- 0x13f3cff0 -mem-write: 0x8000f7fd <- 0x93040106 -mem-write: 0x8000f801 <- 0x13000a05 -mem-write: 0x8000f805 <- 0x23000b05 -mem-write: 0x8000f809 <- 0x23031124 -mem-write: 0x8000f80d <- 0xef03d122 -mem-write: 0x8000f811 <- 0x63b4cff0 -mem-write: 0x8000f815 <- 0x3fc0516 -mem-write: 0x8000f819 <- 0x83044126 -mem-write: 0x8000f81d <- 0x83048127 -mem-write: 0x8000f821 <- 0x83028128 -mem-write: 0x8000f825 <- 0x9302412e -mem-write: 0x8000f829 <- 0x93054106 -mem-write: 0x8000f82d <- 0x13001605 -mem-write: 0x8000f831 <- 0x6f000a8d -mem-write: 0x8000f835 <- 0x13f38ff0 -mem-write: 0x8000f839 <- 0x3010006 -mem-write: 0x8000f83d <- 0x63044127 -mem-write: 0x8000f841 <- 0x93079650 -mem-write: 0x8000f845 <- 0x1301000d -mem-write: 0x8000f849 <- 0x6f007004 -mem-write: 0x8000f84d <- 0x9300c000 -mem-write: 0x8000f851 <- 0x63ff0c8c -mem-write: 0x8000f855 <- 0x93059dd6 -mem-write: 0x8000f859 <- 0x13010787 -mem-write: 0x8000f85d <- 0x23001707 -mem-write: 0x8000f861 <- 0x230176a0 -mem-write: 0x8000f865 <- 0x2301b6a2 -mem-write: 0x8000f869 <- 0x2304f124 -mem-write: 0x8000f86d <- 0x9304e122 -mem-write: 0x8000f871 <- 0xe3008686 -mem-write: 0x8000f875 <- 0x13fce45e -mem-write: 0x8000f879 <- 0x93040106 -mem-write: 0x8000f87d <- 0x13000a05 -mem-write: 0x8000f881 <- 0xef000b05 -mem-write: 0x8000f885 <- 0x63ad8ff0 -mem-write: 0x8000f889 <- 0x93f4051c -mem-write: 0x8000f88d <- 0x83ff0c8c -mem-write: 0x8000f891 <- 0x3048127 -mem-write: 0x8000f895 <- 0x93044127 -mem-write: 0x8000f899 <- 0xe3000a86 -mem-write: 0x8000f89d <- 0xb3fb9dce -mem-write: 0x8000f8a1 <- 0x13019787 -mem-write: 0x8000f8a5 <- 0x23001707 -mem-write: 0x8000f8a9 <- 0x230176a0 -mem-write: 0x8000f8ad <- 0x230196a2 -mem-write: 0x8000f8b1 <- 0x2304f124 -mem-write: 0x8000f8b5 <- 0x9304e122 -mem-write: 0x8000f8b9 <- 0x63007006 -mem-write: 0x8000f8bd <- 0x13eee6d8 -mem-write: 0x8000f8c1 <- 0x93040106 -mem-write: 0x8000f8c5 <- 0x13000a05 -mem-write: 0x8000f8c9 <- 0xef000b05 -mem-write: 0x8000f8cd <- 0x63a90ff0 -mem-write: 0x8000f8d1 <- 0x83f00518 -mem-write: 0x8000f8d5 <- 0x6f048127 -mem-write: 0x8000f8d9 <- 0xe3ed4ff0 -mem-write: 0x8000f8dd <- 0x1388089a -mem-write: 0x8000f8e1 <- 0x93000d89 -mem-write: 0x8000f8e5 <- 0x93000008 -mem-write: 0x8000f8e9 <- 0x1300000c -mem-write: 0x8000f8ed <- 0x6f0f0104 -mem-write: 0x8000f8f1 <- 0x3895ff0 -mem-write: 0x8000f8f5 <- 0x9300c127 -mem-write: 0x8000f8f9 <- 0x93010977 -mem-write: 0x8000f8fd <- 0x63004706 -mem-write: 0x8000f901 <- 0x93180792 -mem-write: 0x8000f905 <- 0x63040977 -mem-write: 0x8000f909 <- 0x8336078e -mem-write: 0x8000f90d <- 0x1300c127 -mem-write: 0x8000f911 <- 0x2300000c -mem-write: 0x8000f915 <- 0x8300d126 -mem-write: 0x8000f919 <- 0x6f0007dc -mem-write: 0x8000f91d <- 0x38b1ff0 -mem-write: 0x8000f921 <- 0x9300c127 -mem-write: 0x8000f925 <- 0x93010df7 -mem-write: 0x8000f929 <- 0x63004706 -mem-write: 0x8000f92d <- 0x9310079a -mem-write: 0x8000f931 <- 0x63040df7 -mem-write: 0x8000f935 <- 0x83380786 -mem-write: 0x8000f939 <- 0x1300c127 -mem-write: 0x8000f93d <- 0x2300000c -mem-write: 0x8000f941 <- 0x8300d126 -mem-write: 0x8000f945 <- 0x930007dc -mem-write: 0x8000f949 <- 0x6f001006 -mem-write: 0x8000f94d <- 0x13889ff0 -mem-write: 0x8000f951 <- 0x93040106 -mem-write: 0x8000f955 <- 0x13000a05 -mem-write: 0x8000f959 <- 0xef000b05 -mem-write: 0x8000f95d <- 0x63a00ff0 -mem-write: 0x8000f961 <- 0x83e80510 -mem-write: 0x8000f965 <- 0x83044125 -mem-write: 0x8000f969 <- 0x93048127 -mem-write: 0x8000f96d <- 0x93054106 -mem-write: 0x8000f971 <- 0x13001585 -mem-write: 0x8000f975 <- 0x6f000a8d -mem-write: 0x8000f979 <- 0x93e04ff0 -mem-write: 0x8000f97d <- 0x23400df7 -mem-write: 0x8000f981 <- 0x23034124 -mem-write: 0x8000f985 <- 0x13033126 -mem-write: 0x8000f989 <- 0x93000c0a -mem-write: 0x8000f98d <- 0x13000c89 -mem-write: 0x8000f991 <- 0x83000009 -mem-write: 0x8000f995 <- 0x1301812c -mem-write: 0x8000f999 <- 0x230f0104 -mem-write: 0x8000f99d <- 0x13031122 -mem-write: 0x8000f9a1 <- 0x6f00078c -mem-write: 0x8000f9a5 <- 0x13024000 -mem-write: 0x8000f9a9 <- 0x9300a006 -mem-write: 0x8000f9ad <- 0x13000006 -mem-write: 0x8000f9b1 <- 0x93000985 -mem-write: 0x8000f9b5 <- 0xef000a05 -mem-write: 0x8000f9b9 <- 0x63231000 -mem-write: 0x8000f9bd <- 0x93320a06 -mem-write: 0x8000f9c1 <- 0x13000509 -mem-write: 0x8000f9c5 <- 0x1300058a -mem-write: 0x8000f9c9 <- 0x9300a006 -mem-write: 0x8000f9cd <- 0x13000006 -mem-write: 0x8000f9d1 <- 0x93000985 -mem-write: 0x8000f9d5 <- 0xef000a05 -mem-write: 0x8000f9d9 <- 0x13645000 -mem-write: 0x8000f9dd <- 0xa3030505 -mem-write: 0x8000f9e1 <- 0x13fea40f -mem-write: 0x8000f9e5 <- 0x13001909 -mem-write: 0x8000f9e9 <- 0xe3fff404 -mem-write: 0x8000f9ed <- 0x83fa0c0e -mem-write: 0x8000f9f1 <- 0xe3000cc6 -mem-write: 0x8000f9f5 <- 0x93fb269a -mem-write: 0x8000f9f9 <- 0xe30ff007 -mem-write: 0x8000f9fd <- 0x63faf906 -mem-write: 0x8000fa01 <- 0x93160a1c -mem-write: 0x8000fa05 <- 0x63009007 -mem-write: 0x8000fa09 <- 0x931737e8 -mem-write: 0x8000fa0d <- 0x230f0107 -mem-write: 0x8000fa11 <- 0x8301912c -mem-write: 0x8000fa15 <- 0x3024128 -mem-write: 0x8000fa19 <- 0x8302812a -mem-write: 0x8000fa1d <- 0xb302c129 -mem-write: 0x8000fa21 <- 0x1340878c -mem-write: 0x8000fa25 <- 0x6f000d89 -mem-write: 0x8000fa29 <- 0x3f5cff0 -mem-write: 0x8000fa2d <- 0x93008127 -mem-write: 0x8000fa31 <- 0x2341f757 -mem-write: 0x8000fa35 <- 0x2300e6a0 -mem-write: 0x8000fa39 <- 0x6f00f6a2 -mem-write: 0x8000fa3d <- 0x23b80ff0 -mem-write: 0x8000fa41 <- 0x8300d126 -mem-write: 0x8000fa45 <- 0x1300072c -mem-write: 0x8000fa49 <- 0x9300000c -mem-write: 0x8000fa4d <- 0x6f001006 -mem-write: 0x8000fa51 <- 0x83f84ff0 -mem-write: 0x8000fa55 <- 0x83018127 -mem-write: 0x8000fa59 <- 0x630009c6 -mem-write: 0x8000fa5d <- 0x83be0788 -mem-write: 0x8000fa61 <- 0x630007c7 -mem-write: 0x8000fa65 <- 0x13be0784 -mem-write: 0x8000fa69 <- 0x6f400969 -mem-write: 0x8000fa6d <- 0x83be0ff0 -mem-write: 0x8000fa71 <- 0x2300072c -mem-write: 0x8000fa75 <- 0x1300d126 -mem-write: 0x8000fa79 <- 0x9341fcdc -mem-write: 0x8000fa7d <- 0x6f000c06 -mem-write: 0x8000fa81 <- 0x83ec8ff0 -mem-write: 0x8000fa85 <- 0x1300072c -mem-write: 0x8000fa89 <- 0x2300000c -mem-write: 0x8000fa8d <- 0x6f00d126 -mem-write: 0x8000fa91 <- 0xb7f3cff0 -mem-write: 0x8000fa95 <- 0x93800157 -mem-write: 0x8000fa99 <- 0x23a50787 -mem-write: 0x8000fa9d <- 0x9300f12a -mem-write: 0x8000faa1 <- 0x93020977 -mem-write: 0x8000faa5 <- 0x63000408 -mem-write: 0x8000faa9 <- 0x8306078c -mem-write: 0x8000faad <- 0x9300c127 -mem-write: 0x8000fab1 <- 0x93007787 -mem-write: 0x8000fab5 <- 0x83ff87f7 -mem-write: 0x8000fab9 <- 0x30007ac -mem-write: 0x8000fabd <- 0x930047ac -mem-write: 0x8000fac1 <- 0x23008787 -mem-write: 0x8000fac5 <- 0x1300f126 -mem-write: 0x8000fac9 <- 0x63001976 -mem-write: 0x8000facd <- 0x3300060e -mem-write: 0x8000fad1 <- 0x63018ce6 -mem-write: 0x8000fad5 <- 0x1300060a -mem-write: 0x8000fad9 <- 0x23030006 -mem-write: 0x8000fadd <- 0xa302c10e -mem-write: 0x8000fae1 <- 0x1302d10e -mem-write: 0x8000fae5 <- 0x93002969 -mem-write: 0x8000fae9 <- 0x93bff97d -mem-write: 0x8000faed <- 0x6f002006 -mem-write: 0x8000faf1 <- 0x93ee4ff0 -mem-write: 0x8000faf5 <- 0x93000408 -mem-write: 0x8000faf9 <- 0x6f00090d -mem-write: 0x8000fafd <- 0x93ff0ff0 -mem-write: 0x8000fb01 <- 0x6f000408 -mem-write: 0x8000fb05 <- 0xb7ea4ff0 -mem-write: 0x8000fb09 <- 0x93800157 -mem-write: 0x8000fb0d <- 0x23a3c787 -mem-write: 0x8000fb11 <- 0x9300f12a -mem-write: 0x8000fb15 <- 0x93020977 -mem-write: 0x8000fb19 <- 0xe3000408 -mem-write: 0x8000fb1d <- 0x3f80798 -mem-write: 0x8000fb21 <- 0x9300c127 -mem-write: 0x8000fb25 <- 0x13010977 -mem-write: 0x8000fb29 <- 0x63004706 -mem-write: 0x8000fb2d <- 0x8308078a -mem-write: 0x8000fb31 <- 0x1300072c -mem-write: 0x8000fb35 <- 0x2300000c -mem-write: 0x8000fb39 <- 0x6f00c126 -mem-write: 0x8000fb3d <- 0x13f8dff0 -mem-write: 0x8000fb41 <- 0xef000405 -mem-write: 0x8000fb45 <- 0x939a9f90 -mem-write: 0x8000fb49 <- 0x2300050c -mem-write: 0x8000fb4d <- 0x9301b126 -mem-write: 0x8000fb51 <- 0x6f000008 -mem-write: 0x8000fb55 <- 0x93e30ff0 -mem-write: 0x8000fb59 <- 0xef040005 -mem-write: 0x8000fb5d <- 0x23bddf70 -mem-write: 0x8000fb61 <- 0x2300aa20 -mem-write: 0x8000fb65 <- 0x6300aa28 -mem-write: 0x8000fb69 <- 0x9324050c -mem-write: 0x8000fb6d <- 0x23040007 -mem-write: 0x8000fb71 <- 0x6f00fa2a -mem-write: 0x8000fb75 <- 0x83a00ff0 -mem-write: 0x8000fb79 <- 0x83020127 -mem-write: 0x8000fb7d <- 0x1301c125 -mem-write: 0x8000fb81 <- 0x33000009 -mem-write: 0x8000fb85 <- 0x1340f404 -mem-write: 0x8000fb89 <- 0x13000786 -mem-write: 0x8000fb8d <- 0xef000405 -mem-write: 0x8000fb91 <- 0x839e9f90 -mem-write: 0x8000fb95 <- 0x13001cc5 -mem-write: 0x8000fb99 <- 0x9300a006 -mem-write: 0x8000fb9d <- 0x33000006 -mem-write: 0x8000fba1 <- 0x1300b038 -mem-write: 0x8000fba5 <- 0x93000985 -mem-write: 0x8000fba9 <- 0xb3000a05 -mem-write: 0x8000fbad <- 0xef010c8c -mem-write: 0x8000fbb1 <- 0x6f039000 -mem-write: 0x8000fbb5 <- 0x13e0dff0 -mem-write: 0x8000fbb9 <- 0x6f00090a -mem-write: 0x8000fbbd <- 0x93c24ff0 -mem-write: 0x8000fbc1 <- 0x63040977 -mem-write: 0x8000fbc5 <- 0x830a0782 -mem-write: 0x8000fbc9 <- 0x1300c127 -mem-write: 0x8000fbcd <- 0x2300000c -mem-write: 0x8000fbd1 <- 0x8300c126 -mem-write: 0x8000fbd5 <- 0x6f0007dc -mem-write: 0x8000fbd9 <- 0x13ef1ff0 -mem-write: 0x8000fbdd <- 0x93040106 -mem-write: 0x8000fbe1 <- 0x13000a05 -mem-write: 0x8000fbe5 <- 0x23000b05 -mem-write: 0x8000fbe9 <- 0xef031122 -mem-write: 0x8000fbed <- 0x63f71fe0 -mem-write: 0x8000fbf1 <- 0x3be0518 -mem-write: 0x8000fbf5 <- 0x83044126 -VXDRV: upload 1023 bytes to 0x8000fbf9 -mem-write: 0x8000fbf9 <- 0x83048127 -mem-write: 0x8000fbfd <- 0x93024128 -mem-write: 0x8000fc01 <- 0x93054106 -mem-write: 0x8000fc05 <- 0x13001605 -mem-write: 0x8000fc09 <- 0x6f000a8d -mem-write: 0x8000fc0d <- 0x83b68ff0 -mem-write: 0x8000fc11 <- 0x130019c6 -mem-write: 0x8000fc15 <- 0x93200969 -mem-write: 0x8000fc19 <- 0x6f001989 -mem-write: 0x8000fc1d <- 0x83a30ff0 -mem-write: 0x8000fc21 <- 0x130019c6 -mem-write: 0x8000fc25 <- 0x93020969 -mem-write: 0x8000fc29 <- 0x6f001989 -mem-write: 0x8000fc2d <- 0x13a20ff0 -mem-write: 0x8000fc31 <- 0x6f00040a -mem-write: 0x8000fc35 <- 0x83bacff0 -mem-write: 0x8000fc39 <- 0x23008127 -mem-write: 0x8000fc3d <- 0x6f00f6a0 -mem-write: 0x8000fc41 <- 0x9397cff0 -mem-write: 0x8000fc45 <- 0x93006007 -mem-write: 0x8000fc49 <- 0x6300088c -mem-write: 0x8000fc4d <- 0x930117f4 -mem-write: 0x8000fc51 <- 0x3700600c -mem-write: 0x8000fc55 <- 0x1380015e -mem-write: 0x8000fc59 <- 0x23000c8c -mem-write: 0x8000fc5d <- 0x1301b126 -mem-write: 0x8000fc61 <- 0x6fa64e04 -mem-write: 0x8000fc65 <- 0x93a58ff0 -mem-write: 0x8000fc69 <- 0x63200977 -mem-write: 0x8000fc6d <- 0x830c0786 -mem-write: 0x8000fc71 <- 0x1300c127 -mem-write: 0x8000fc75 <- 0x2300000c -mem-write: 0x8000fc79 <- 0x8300c126 -mem-write: 0x8000fc7d <- 0x6f0007cc -mem-write: 0x8000fc81 <- 0x93e49ff0 -mem-write: 0x8000fc85 <- 0x63200977 -mem-write: 0x8000fc89 <- 0x8308078e -mem-write: 0x8000fc8d <- 0x1300c127 -mem-write: 0x8000fc91 <- 0x2300000c -mem-write: 0x8000fc95 <- 0x8300d126 -mem-write: 0x8000fc99 <- 0x6f0007cc -mem-write: 0x8000fc9d <- 0x93d30ff0 -mem-write: 0x8000fca1 <- 0x63200977 -mem-write: 0x8000fca5 <- 0x83060784 -mem-write: 0x8000fca9 <- 0x2300c127 -mem-write: 0x8000fcad <- 0x8300d126 -mem-write: 0x8000fcb1 <- 0x1300078c -mem-write: 0x8000fcb5 <- 0x9341fcdc -mem-write: 0x8000fcb9 <- 0x6f000c06 -mem-write: 0x8000fcbd <- 0x93c8cff0 -mem-write: 0x8000fcc1 <- 0x63200df7 -mem-write: 0x8000fcc5 <- 0x83020788 -mem-write: 0x8000fcc9 <- 0x1300c127 -mem-write: 0x8000fccd <- 0x2300000c -mem-write: 0x8000fcd1 <- 0x8300d126 -mem-write: 0x8000fcd5 <- 0x930007cc -mem-write: 0x8000fcd9 <- 0x6f001006 -mem-write: 0x8000fcdd <- 0x13cf8ff0 -mem-write: 0x8000fce1 <- 0x6f000686 -mem-write: 0x8000fce5 <- 0x93931ff0 -mem-write: 0x8000fce9 <- 0xe3009007 -mem-write: 0x8000fced <- 0x6fcd37ea -mem-write: 0x8000fcf1 <- 0x83d1dff0 -mem-write: 0x8000fcf5 <- 0x1300c127 -mem-write: 0x8000fcf9 <- 0x2300000c -mem-write: 0x8000fcfd <- 0x8300d126 -mem-write: 0x8000fd01 <- 0x930007ac -mem-write: 0x8000fd05 <- 0x6f001006 -mem-write: 0x8000fd09 <- 0x83cccff0 -mem-write: 0x8000fd0d <- 0x2300c127 -mem-write: 0x8000fd11 <- 0x8300d126 -mem-write: 0x8000fd15 <- 0x130007ac -mem-write: 0x8000fd19 <- 0x9341fcdc -mem-write: 0x8000fd1d <- 0x6f000c06 -mem-write: 0x8000fd21 <- 0x83c28ff0 -mem-write: 0x8000fd25 <- 0x1300c127 -mem-write: 0x8000fd29 <- 0x2300000c -mem-write: 0x8000fd2d <- 0x8300d126 -mem-write: 0x8000fd31 <- 0x6f0007ac -mem-write: 0x8000fd35 <- 0x83c98ff0 -mem-write: 0x8000fd39 <- 0x1300c127 -mem-write: 0x8000fd3d <- 0x2300000c -mem-write: 0x8000fd41 <- 0x8300c126 -mem-write: 0x8000fd45 <- 0x6f0007ac -mem-write: 0x8000fd49 <- 0x83d81ff0 -mem-write: 0x8000fd4d <- 0x23008127 -mem-write: 0x8000fd51 <- 0x6f00f690 -mem-write: 0x8000fd55 <- 0x13868ff0 -mem-write: 0x8000fd59 <- 0x93040106 -mem-write: 0x8000fd5d <- 0x13000a05 -mem-write: 0x8000fd61 <- 0xef000b05 -mem-write: 0x8000fd65 <- 0x6fdf9fe0 -mem-write: 0x8000fd69 <- 0x93a78ff0 -mem-write: 0x8000fd6d <- 0x2300088c -mem-write: 0x8000fd71 <- 0x9301b126 -mem-write: 0x8000fd75 <- 0x6f000008 -mem-write: 0x8000fd79 <- 0x93c0cff0 -mem-write: 0x8000fd7d <- 0x6f00090d -mem-write: 0x8000fd81 <- 0x13bf0ff0 -mem-write: 0x8000fd85 <- 0x13000685 -mem-write: 0x8000fd89 <- 0x6f000586 -mem-write: 0x8000fd8d <- 0x93fe4ff0 -mem-write: 0x8000fd91 <- 0x23fff007 -mem-write: 0x8000fd95 <- 0x6f00f124 -mem-write: 0x8000fd99 <- 0x83a54ff0 -mem-write: 0x8000fd9d <- 0x300c127 -mem-write: 0x8000fda1 <- 0x930007a4 -mem-write: 0x8000fda5 <- 0x63004787 -mem-write: 0x8000fda9 <- 0x13000454 -mem-write: 0x8000fdad <- 0x83fff004 -mem-write: 0x8000fdb1 <- 0x230019c6 -mem-write: 0x8000fdb5 <- 0x9300f126 -mem-write: 0x8000fdb9 <- 0x6f000709 -mem-write: 0x8000fdbd <- 0x93890ff0 -mem-write: 0x8000fdc1 <- 0x2300c007 -mem-write: 0x8000fdc5 <- 0x9300fb20 -mem-write: 0x8000fdc9 <- 0x23fff007 -mem-write: 0x8000fdcd <- 0x6f00f124 -mem-write: 0x8000fdd1 <- 0x13a1cff0 -mem-write: 0x8000fdd5 <- 0x23fe0101 -mem-write: 0x8000fdd9 <- 0x2300812c -mem-write: 0x8000fddd <- 0x2300912a -mem-write: 0x8000fde1 <- 0x23012128 -mem-write: 0x8000fde5 <- 0x2300112e -mem-write: 0x8000fde9 <- 0x13013126 -mem-write: 0x8000fded <- 0x93000509 -mem-write: 0x8000fdf1 <- 0x13000584 -mem-write: 0x8000fdf5 <- 0x63000604 -mem-write: 0x8000fdf9 <- 0x83000506 -mem-write: 0x8000fdfd <- 0x63038527 -mem-write: 0x8000fe01 <- 0x3140788 -mem-write: 0x8000fe05 <- 0x8300c417 -mem-write: 0x8000fe09 <- 0x93018426 -mem-write: 0x8000fe0d <- 0x23008777 -mem-write: 0x8000fe11 <- 0x9300d424 -mem-write: 0x8000fe15 <- 0x93010716 -mem-write: 0x8000fe19 <- 0x630106d6 -mem-write: 0x8000fe1d <- 0x83080782 -mem-write: 0x8000fe21 <- 0x63010427 -mem-write: 0x8000fe25 <- 0x1306078e -mem-write: 0x8000fe29 <- 0x93012696 -mem-write: 0x8000fe2d <- 0x930ff4f9 -mem-write: 0x8000fe31 <- 0x630ff4f4 -mem-write: 0x8000fe35 <- 0x308065e -mem-write: 0x8000fe39 <- 0x83000427 -mem-write: 0x8000fe3d <- 0xb3014426 -mem-write: 0x8000fe41 <- 0x6340f707 -mem-write: 0x8000fe45 <- 0x830ad7de -mem-write: 0x8000fe49 <- 0x13008426 -mem-write: 0x8000fe4d <- 0x23001706 -mem-write: 0x8000fe51 <- 0x9300c420 -mem-write: 0x8000fe55 <- 0x23fff686 -mem-write: 0x8000fe59 <- 0x2300d424 -mem-write: 0x8000fe5d <- 0x3013700 -mem-write: 0x8000fe61 <- 0x93014427 -mem-write: 0x8000fe65 <- 0x63001787 -mem-write: 0x8000fe69 <- 0x830cf708 -mem-write: 0x8000fe6d <- 0x9300c457 -mem-write: 0x8000fe71 <- 0x630017f7 -mem-write: 0x8000fe75 <- 0x93000786 -mem-write: 0x8000fe79 <- 0x6300a007 -mem-write: 0x8000fe7d <- 0x830af48e -mem-write: 0x8000fe81 <- 0x301c120 -mem-write: 0x8000fe85 <- 0x3018124 -mem-write: 0x8000fe89 <- 0x83010129 -mem-write: 0x8000fe8d <- 0x1300c129 -mem-write: 0x8000fe91 <- 0x83000485 -mem-write: 0x8000fe95 <- 0x13014124 -mem-write: 0x8000fe99 <- 0x67020101 -mem-write: 0x8000fe9d <- 0x93000080 -mem-write: 0x8000fea1 <- 0x13000405 -mem-write: 0x8000fea5 <- 0xef000905 -mem-write: 0x8000fea9 <- 0x63c41f30 -mem-write: 0x8000fead <- 0x308051e -mem-write: 0x8000feb1 <- 0x9300c417 -mem-write: 0x8000feb5 <- 0x830ff4f9 -mem-write: 0x8000feb9 <- 0x93010427 -mem-write: 0x8000febd <- 0x93010716 -mem-write: 0x8000fec1 <- 0x130106d6 -mem-write: 0x8000fec5 <- 0x93012696 -mem-write: 0x8000fec9 <- 0xe30ff4f4 -mem-write: 0x8000fecd <- 0x83f60646 -mem-write: 0x8000fed1 <- 0x37064426 -mem-write: 0x8000fed5 <- 0x33000026 -mem-write: 0x8000fed9 <- 0x3700c767 -mem-write: 0x8000fedd <- 0x13ffffe6 -mem-write: 0x8000fee1 <- 0xb3fff606 -mem-write: 0x8000fee5 <- 0x2300c6f6 -mem-write: 0x8000fee9 <- 0x300e416 -mem-write: 0x8000feed <- 0x23000427 -mem-write: 0x8000fef1 <- 0x8306d422 -mem-write: 0x8000fef5 <- 0xb3014426 -mem-write: 0x8000fef9 <- 0xe340f707 -mem-write: 0x8000fefd <- 0x93f4d7c6 -mem-write: 0x8000ff01 <- 0x13000405 -mem-write: 0x8000ff05 <- 0xef000905 -mem-write: 0x8000ff09 <- 0x63950f40 -mem-write: 0x8000ff0d <- 0x302051e -mem-write: 0x8000ff11 <- 0x83000427 -mem-write: 0x8000ff15 <- 0x93008426 -mem-write: 0x8000ff19 <- 0x13001007 -mem-write: 0x8000ff1d <- 0x93001706 -mem-write: 0x8000ff21 <- 0x23fff686 -mem-write: 0x8000ff25 <- 0x2300c420 -mem-write: 0x8000ff29 <- 0x2300d424 -mem-write: 0x8000ff2d <- 0x3013700 -mem-write: 0x8000ff31 <- 0xe3014427 -mem-write: 0x8000ff35 <- 0x93f2f71c -mem-write: 0x8000ff39 <- 0x13000405 -mem-write: 0x8000ff3d <- 0xef000905 -mem-write: 0x8000ff41 <- 0xe3918f40 -mem-write: 0x8000ff45 <- 0x93f2050e -mem-write: 0x8000ff49 <- 0x6ffff004 -mem-write: 0x8000ff4d <- 0xeff35ff0 -mem-write: 0x8000ff51 <- 0x6fca4f40 -mem-write: 0x8000ff55 <- 0x93eb1ff0 -mem-write: 0x8000ff59 <- 0x3000507 -mem-write: 0x8000ff5d <- 0x131d81a5 -mem-write: 0x8000ff61 <- 0x93000586 -mem-write: 0x8000ff65 <- 0x6f000785 -mem-write: 0x8000ff69 <- 0x13e6dff0 -mem-write: 0x8000ff6d <- 0x23fe0101 -mem-write: 0x8000ff71 <- 0x2300812c -mem-write: 0x8000ff75 <- 0x2300912a -mem-write: 0x8000ff79 <- 0x8300112e -mem-write: 0x8000ff7d <- 0x131181a7 -mem-write: 0x8000ff81 <- 0x93000504 -mem-write: 0x8000ff85 <- 0x63000684 -mem-write: 0x8000ff89 <- 0xe7020582 -mem-write: 0x8000ff8d <- 0x93000780 -mem-write: 0x8000ff91 <- 0x63fff007 -mem-write: 0x8000ff95 <- 0x8302f506 -mem-write: 0x8000ff99 <- 0x301c120 -mem-write: 0x8000ff9d <- 0x83018124 -mem-write: 0x8000ffa1 <- 0x13014124 -mem-write: 0x8000ffa5 <- 0x67020101 -mem-write: 0x8000ffa9 <- 0x13000080 -mem-write: 0x8000ffad <- 0x93000006 -mem-write: 0x8000ffb1 <- 0xe7004105 -mem-write: 0x8000ffb5 <- 0x93000780 -mem-write: 0x8000ffb9 <- 0xe3fff007 -mem-write: 0x8000ffbd <- 0x23fcf51e -mem-write: 0x8000ffc1 <- 0x930004a0 -mem-write: 0x8000ffc5 <- 0x8308a007 -mem-write: 0x8000ffc9 <- 0x2301c120 -mem-write: 0x8000ffcd <- 0x300f420 -mem-write: 0x8000ffd1 <- 0x83018124 -mem-write: 0x8000ffd5 <- 0x13014124 -mem-write: 0x8000ffd9 <- 0x67020101 -mem-write: 0x8000ffdd <- 0x13000080 -mem-write: 0x8000ffe1 <- 0x23fe0101 -mem-write: 0x8000ffe5 <- 0x2300812c -mem-write: 0x8000ffe9 <- 0x2300912a -mem-write: 0x8000ffed <- 0x8300112e -mem-write: 0x8000fff1 <- 0x831d81a4 -mem-write: 0x8000fff5 <- 0x831181a7 -VXDRV: upload 1024 bytes to 0x8000fff8 -mem-write: 0x8000fff8 <- 0x60413 -mem-write: 0x8000fffc <- 0x2050a63 -mem-write: 0x80010000 <- 0x58613 -mem-write: 0x80010004 <- 0x40693 -mem-write: 0x80010008 <- 0x50593 -mem-write: 0x8001000c <- 0x48513 -mem-write: 0x80010010 <- 0x780e7 -mem-write: 0x80010014 <- 0xfff00793 -mem-write: 0x80010018 <- 0x2f50a63 -mem-write: 0x8001001c <- 0x1c12083 -mem-write: 0x80010020 <- 0x1812403 -mem-write: 0x80010024 <- 0x1412483 -mem-write: 0x80010028 <- 0x2010113 -mem-write: 0x8001002c <- 0x8067 -mem-write: 0x80010030 <- 0x60693 -mem-write: 0x80010034 <- 0x410593 -mem-write: 0x80010038 <- 0x613 -mem-write: 0x8001003c <- 0x48513 -mem-write: 0x80010040 <- 0x780e7 -mem-write: 0x80010044 <- 0xfff00793 -mem-write: 0x80010048 <- 0xfcf51ae3 -mem-write: 0x8001004c <- 0x42023 -mem-write: 0x80010050 <- 0x1c12083 -mem-write: 0x80010054 <- 0x1812403 -mem-write: 0x80010058 <- 0x8a00793 -mem-write: 0x8001005c <- 0xf4a023 -mem-write: 0x80010060 <- 0x1412483 -mem-write: 0x80010064 <- 0x2010113 -mem-write: 0x80010068 <- 0x8067 -mem-write: 0x8001006c <- 0x1181a303 -mem-write: 0x80010070 <- 0x30067 -mem-write: 0x80010074 <- 0x2058463 -mem-write: 0x80010078 <- 0xff00793 -mem-write: 0x8001007c <- 0xc7e863 -mem-write: 0x80010080 <- 0xc58023 -mem-write: 0x80010084 <- 0x100513 -mem-write: 0x80010088 <- 0x8067 -mem-write: 0x8001008c <- 0x8a00793 -mem-write: 0x80010090 <- 0xf52023 -mem-write: 0x80010094 <- 0xfff00513 -mem-write: 0x80010098 <- 0x8067 -mem-write: 0x8001009c <- 0x513 -mem-write: 0x800100a0 <- 0x8067 -mem-write: 0x800100a4 <- 0xff010113 -mem-write: 0x800100a8 <- 0x600513 -mem-write: 0x800100ac <- 0x112623 -mem-write: 0x800100b0 <- 0x28c000ef -mem-write: 0x800100b4 <- 0x100513 -mem-write: 0x800100b8 <- 0xd78f00ef -mem-write: 0x800100bc <- 0xff010113 -mem-write: 0x800100c0 <- 0x8000593 -mem-write: 0x800100c4 <- 0x812423 -mem-write: 0x800100c8 <- 0x112623 -mem-write: 0x800100cc <- 0x50413 -mem-write: 0x800100d0 <- 0xe68f70ef -mem-write: 0x800100d4 <- 0x2ca42e23 -mem-write: 0x800100d8 <- 0x2050463 -mem-write: 0x800100dc <- 0x8050793 -mem-write: 0x800100e0 <- 0x52023 -mem-write: 0x800100e4 <- 0x450513 -mem-write: 0x800100e8 <- 0xfef51ce3 -mem-write: 0x800100ec <- 0x513 -mem-write: 0x800100f0 <- 0xc12083 -mem-write: 0x800100f4 <- 0x812403 -mem-write: 0x800100f8 <- 0x1010113 -mem-write: 0x800100fc <- 0x8067 -mem-write: 0x80010100 <- 0xfff00513 -mem-write: 0x80010104 <- 0xfedff06f -mem-write: 0x80010108 <- 0x2dc52783 -mem-write: 0x8001010c <- 0x78663 -mem-write: 0x80010110 <- 0x513 -mem-write: 0x80010114 <- 0x8067 -mem-write: 0x80010118 <- 0xfa5ff06f -mem-write: 0x8001011c <- 0xfe010113 -mem-write: 0x80010120 <- 0x912a23 -mem-write: 0x80010124 <- 0x112e23 -mem-write: 0x80010128 <- 0x812c23 -mem-write: 0x8001012c <- 0x1f00793 -mem-write: 0x80010130 <- 0x50493 -mem-write: 0x80010134 <- 0x2b7ea63 -mem-write: 0x80010138 <- 0x58413 -mem-write: 0x8001013c <- 0x2dc52583 -mem-write: 0x80010140 <- 0x4058463 -mem-write: 0x80010144 <- 0x241413 -mem-write: 0x80010148 <- 0x858433 -mem-write: 0x8001014c <- 0x42503 -mem-write: 0x80010150 <- 0xc42023 -mem-write: 0x80010154 <- 0x1c12083 -mem-write: 0x80010158 <- 0x1812403 -mem-write: 0x8001015c <- 0x1412483 -mem-write: 0x80010160 <- 0x2010113 -mem-write: 0x80010164 <- 0x8067 -mem-write: 0x80010168 <- 0x1c12083 -mem-write: 0x8001016c <- 0x1812403 -mem-write: 0x80010170 <- 0x1600793 -mem-write: 0x80010174 <- 0xf52023 -mem-write: 0x80010178 <- 0x1412483 -mem-write: 0x8001017c <- 0xfff00513 -mem-write: 0x80010180 <- 0x2010113 -mem-write: 0x80010184 <- 0x8067 -mem-write: 0x80010188 <- 0xc12623 -mem-write: 0x8001018c <- 0xf31ff0ef -mem-write: 0x80010190 <- 0x50793 -mem-write: 0x80010194 <- 0xfff00513 -mem-write: 0x80010198 <- 0xfa079ee3 -mem-write: 0x8001019c <- 0x2dc4a583 -mem-write: 0x800101a0 <- 0xc12603 -mem-write: 0x800101a4 <- 0xfa1ff06f -mem-write: 0x800101a8 <- 0xff010113 -mem-write: 0x800101ac <- 0x912223 -mem-write: 0x800101b0 <- 0x112623 -mem-write: 0x800101b4 <- 0x812423 -mem-write: 0x800101b8 <- 0x1f00793 -mem-write: 0x800101bc <- 0x50493 -mem-write: 0x800101c0 <- 0xab7ea63 -mem-write: 0x800101c4 <- 0x2dc52783 -mem-write: 0x800101c8 <- 0x58413 -mem-write: 0x800101cc <- 0x4078463 -mem-write: 0x800101d0 <- 0x259713 -mem-write: 0x800101d4 <- 0xe787b3 -mem-write: 0x800101d8 <- 0x7a703 -mem-write: 0x800101dc <- 0x2070c63 -mem-write: 0x800101e0 <- 0x100693 -mem-write: 0x800101e4 <- 0x6d70c63 -mem-write: 0x800101e8 <- 0xfff00693 -mem-write: 0x800101ec <- 0x4d70863 -mem-write: 0x800101f0 <- 0x58513 -mem-write: 0x800101f4 <- 0x7a023 -mem-write: 0x800101f8 <- 0x700e7 -mem-write: 0x800101fc <- 0x513 -mem-write: 0x80010200 <- 0xc12083 -mem-write: 0x80010204 <- 0x812403 -mem-write: 0x80010208 <- 0x412483 -mem-write: 0x8001020c <- 0x1010113 -mem-write: 0x80010210 <- 0x8067 -mem-write: 0x80010214 <- 0x48513 -mem-write: 0x80010218 <- 0x1cc000ef -mem-write: 0x8001021c <- 0x40613 -mem-write: 0x80010220 <- 0x812403 -mem-write: 0x80010224 <- 0xc12083 -mem-write: 0x80010228 <- 0x50593 -mem-write: 0x8001022c <- 0x48513 -mem-write: 0x80010230 <- 0x412483 -mem-write: 0x80010234 <- 0x1010113 -mem-write: 0x80010238 <- 0x1480006f -mem-write: 0x8001023c <- 0xc12083 -mem-write: 0x80010240 <- 0x812403 -mem-write: 0x80010244 <- 0x1600793 -mem-write: 0x80010248 <- 0xf52023 -mem-write: 0x8001024c <- 0x412483 -mem-write: 0x80010250 <- 0x100513 -mem-write: 0x80010254 <- 0x1010113 -mem-write: 0x80010258 <- 0x8067 -mem-write: 0x8001025c <- 0xc12083 -mem-write: 0x80010260 <- 0x812403 -mem-write: 0x80010264 <- 0x412483 -mem-write: 0x80010268 <- 0x513 -mem-write: 0x8001026c <- 0x1010113 -mem-write: 0x80010270 <- 0x8067 -mem-write: 0x80010274 <- 0x1600793 -mem-write: 0x80010278 <- 0xf52023 -mem-write: 0x8001027c <- 0xfff00513 -mem-write: 0x80010280 <- 0xf81ff06f -mem-write: 0x80010284 <- 0x1f00793 -mem-write: 0x80010288 <- 0xab7e663 -mem-write: 0x8001028c <- 0x2dc52783 -mem-write: 0x80010290 <- 0xfe010113 -mem-write: 0x80010294 <- 0x912c23 -mem-write: 0x80010298 <- 0x112e23 -mem-write: 0x8001029c <- 0x50493 -mem-write: 0x800102a0 <- 0x4078c63 -mem-write: 0x800102a4 <- 0x259713 -mem-write: 0x800102a8 <- 0xe787b3 -mem-write: 0x800102ac <- 0x7a703 -mem-write: 0x800102b0 <- 0x2070a63 -mem-write: 0x800102b4 <- 0xfff00693 -mem-write: 0x800102b8 <- 0x6d70663 -mem-write: 0x800102bc <- 0x100693 -mem-write: 0x800102c0 <- 0x4d70863 -mem-write: 0x800102c4 <- 0x58513 -mem-write: 0x800102c8 <- 0x7a023 -mem-write: 0x800102cc <- 0x700e7 -mem-write: 0x800102d0 <- 0x513 -mem-write: 0x800102d4 <- 0x1c12083 -mem-write: 0x800102d8 <- 0x1812483 -mem-write: 0x800102dc <- 0x2010113 -mem-write: 0x800102e0 <- 0x8067 -mem-write: 0x800102e4 <- 0x1c12083 -mem-write: 0x800102e8 <- 0x1812483 -mem-write: 0x800102ec <- 0x100513 -mem-write: 0x800102f0 <- 0x2010113 -mem-write: 0x800102f4 <- 0x8067 -mem-write: 0x800102f8 <- 0xb12623 -mem-write: 0x800102fc <- 0xdc1ff0ef -mem-write: 0x80010300 <- 0x2051663 -mem-write: 0x80010304 <- 0x2dc4a783 -mem-write: 0x80010308 <- 0xc12583 -mem-write: 0x8001030c <- 0xf99ff06f -mem-write: 0x80010310 <- 0x1c12083 -mem-write: 0x80010314 <- 0x1812483 -mem-write: 0x80010318 <- 0x300513 -mem-write: 0x8001031c <- 0x2010113 -mem-write: 0x80010320 <- 0x8067 -mem-write: 0x80010324 <- 0x200513 -mem-write: 0x80010328 <- 0xfadff06f -mem-write: 0x8001032c <- 0xfff00513 -mem-write: 0x80010330 <- 0xfa5ff06f -mem-write: 0x80010334 <- 0xfff00513 -mem-write: 0x80010338 <- 0x8067 -mem-write: 0x8001033c <- 0x50593 -mem-write: 0x80010340 <- 0x1d81a503 -mem-write: 0x80010344 <- 0xe65ff06f -mem-write: 0x80010348 <- 0x50793 -mem-write: 0x8001034c <- 0x1d81a503 -mem-write: 0x80010350 <- 0x58613 -mem-write: 0x80010354 <- 0x78593 -mem-write: 0x80010358 <- 0xdc5ff06f -mem-write: 0x8001035c <- 0x1d81a503 -mem-write: 0x80010360 <- 0x2dc52783 -mem-write: 0x80010364 <- 0x78663 -mem-write: 0x80010368 <- 0x513 -mem-write: 0x8001036c <- 0x8067 -mem-write: 0x80010370 <- 0xd4dff06f -mem-write: 0x80010374 <- 0x50593 -mem-write: 0x80010378 <- 0x1d81a503 -mem-write: 0x8001037c <- 0xf09ff06f -mem-write: 0x80010380 <- 0xff010113 -mem-write: 0x80010384 <- 0x58713 -mem-write: 0x80010388 <- 0x812423 -mem-write: 0x8001038c <- 0x912223 -mem-write: 0x80010390 <- 0x50413 -mem-write: 0x80010394 <- 0x60593 -mem-write: 0x80010398 <- 0x70513 -mem-write: 0x8001039c <- 0x112623 -mem-write: 0x800103a0 <- 0x2401a423 -mem-write: 0x800103a4 <- 0xba0f00ef -mem-write: 0x800103a8 <- 0xfff00793 -mem-write: 0x800103ac <- 0xf50c63 -mem-write: 0x800103b0 <- 0xc12083 -mem-write: 0x800103b4 <- 0x812403 -mem-write: 0x800103b8 <- 0x412483 -mem-write: 0x800103bc <- 0x1010113 -mem-write: 0x800103c0 <- 0x8067 -mem-write: 0x800103c4 <- 0x2481a783 -mem-write: 0x800103c8 <- 0xfe0784e3 -mem-write: 0x800103cc <- 0xc12083 -mem-write: 0x800103d0 <- 0xf42023 -mem-write: 0x800103d4 <- 0x812403 -mem-write: 0x800103d8 <- 0x412483 -mem-write: 0x800103dc <- 0x1010113 -mem-write: 0x800103e0 <- 0x8067 -mem-write: 0x800103e4 <- 0xb68f006f -mem-write: 0x800103e8 <- 0x50893 -mem-write: 0x800103ec <- 0x58793 -mem-write: 0x800103f0 <- 0x60813 -mem-write: 0x800103f4 <- 0x68513 -VXDRV: upload 1024 bytes to 0x800103f8 -mem-write: 0x800103f8 <- 0x88313 -mem-write: 0x800103fc <- 0x28069463 -mem-write: 0x80010400 <- 0x800156b7 -mem-write: 0x80010404 <- 0x6b468693 -mem-write: 0x80010408 <- 0xec5f663 -mem-write: 0x8001040c <- 0x10737 -mem-write: 0x80010410 <- 0xce67863 -mem-write: 0x80010414 <- 0xff00713 -mem-write: 0x80010418 <- 0xc73733 -mem-write: 0x8001041c <- 0x371713 -mem-write: 0x80010420 <- 0xe65533 -mem-write: 0x80010424 <- 0xa686b3 -mem-write: 0x80010428 <- 0x6c683 -mem-write: 0x8001042c <- 0x2000513 -mem-write: 0x80010430 <- 0xe68733 -mem-write: 0x80010434 <- 0x40e506b3 -mem-write: 0x80010438 <- 0xe50c63 -mem-write: 0x8001043c <- 0xd797b3 -mem-write: 0x80010440 <- 0xe8d733 -mem-write: 0x80010444 <- 0xd61833 -mem-write: 0x80010448 <- 0xf765b3 -mem-write: 0x8001044c <- 0xd89333 -mem-write: 0x80010450 <- 0x1085893 -mem-write: 0x80010454 <- 0x315d7b3 -mem-write: 0x80010458 <- 0x1081613 -mem-write: 0x8001045c <- 0x1065613 -mem-write: 0x80010460 <- 0x1035713 -mem-write: 0x80010464 <- 0x315f6b3 -mem-write: 0x80010468 <- 0x78513 -mem-write: 0x8001046c <- 0x2f605b3 -mem-write: 0x80010470 <- 0x1069693 -mem-write: 0x80010474 <- 0xe6e733 -mem-write: 0x80010478 <- 0xb77e63 -mem-write: 0x8001047c <- 0x1070733 -mem-write: 0x80010480 <- 0xfff78513 -mem-write: 0x80010484 <- 0x1076863 -mem-write: 0x80010488 <- 0xb77663 -mem-write: 0x8001048c <- 0xffe78513 -mem-write: 0x80010490 <- 0x1070733 -mem-write: 0x80010494 <- 0x40b70733 -mem-write: 0x80010498 <- 0x31777b3 -mem-write: 0x8001049c <- 0x1031313 -mem-write: 0x800104a0 <- 0x1035313 -mem-write: 0x800104a4 <- 0x3175733 -mem-write: 0x800104a8 <- 0x1079793 -mem-write: 0x800104ac <- 0x67e333 -mem-write: 0x800104b0 <- 0x2e606b3 -mem-write: 0x800104b4 <- 0x70613 -mem-write: 0x800104b8 <- 0xd37c63 -mem-write: 0x800104bc <- 0x680333 -mem-write: 0x800104c0 <- 0xfff70613 -mem-write: 0x800104c4 <- 0x1036663 -mem-write: 0x800104c8 <- 0xd37463 -mem-write: 0x800104cc <- 0xffe70613 -mem-write: 0x800104d0 <- 0x1051513 -mem-write: 0x800104d4 <- 0xc56533 -mem-write: 0x800104d8 <- 0x593 -mem-write: 0x800104dc <- 0xe40006f -mem-write: 0x800104e0 <- 0x1000537 -mem-write: 0x800104e4 <- 0x1000713 -mem-write: 0x800104e8 <- 0xf2a66ce3 -mem-write: 0x800104ec <- 0x1800713 -mem-write: 0x800104f0 <- 0xf31ff06f -mem-write: 0x800104f4 <- 0x61663 -mem-write: 0x800104f8 <- 0x100713 -mem-write: 0x800104fc <- 0x2c75833 -mem-write: 0x80010500 <- 0x10737 -mem-write: 0x80010504 <- 0xce87063 -mem-write: 0x80010508 <- 0xff00713 -mem-write: 0x8001050c <- 0x1077463 -mem-write: 0x80010510 <- 0x800513 -mem-write: 0x80010514 <- 0xa85733 -mem-write: 0x80010518 <- 0xe686b3 -mem-write: 0x8001051c <- 0x6c703 -mem-write: 0x80010520 <- 0x2000613 -mem-write: 0x80010524 <- 0xa70733 -mem-write: 0x80010528 <- 0x40e606b3 -mem-write: 0x8001052c <- 0xae61663 -mem-write: 0x80010530 <- 0x410787b3 -mem-write: 0x80010534 <- 0x100593 -mem-write: 0x80010538 <- 0x1085893 -mem-write: 0x8001053c <- 0x1081613 -mem-write: 0x80010540 <- 0x1065613 -mem-write: 0x80010544 <- 0x1035713 -mem-write: 0x80010548 <- 0x317f6b3 -mem-write: 0x8001054c <- 0x317d7b3 -mem-write: 0x80010550 <- 0x1069693 -mem-write: 0x80010554 <- 0xe6e733 -mem-write: 0x80010558 <- 0x2f60e33 -mem-write: 0x8001055c <- 0x78513 -mem-write: 0x80010560 <- 0x1c77e63 -mem-write: 0x80010564 <- 0x1070733 -mem-write: 0x80010568 <- 0xfff78513 -mem-write: 0x8001056c <- 0x1076863 -mem-write: 0x80010570 <- 0x1c77663 -mem-write: 0x80010574 <- 0xffe78513 -mem-write: 0x80010578 <- 0x1070733 -mem-write: 0x8001057c <- 0x41c70733 -mem-write: 0x80010580 <- 0x31777b3 -mem-write: 0x80010584 <- 0x1031313 -mem-write: 0x80010588 <- 0x1035313 -mem-write: 0x8001058c <- 0x3175733 -mem-write: 0x80010590 <- 0x1079793 -mem-write: 0x80010594 <- 0x67e333 -mem-write: 0x80010598 <- 0x2e606b3 -mem-write: 0x8001059c <- 0x70613 -mem-write: 0x800105a0 <- 0xd37c63 -mem-write: 0x800105a4 <- 0x680333 -mem-write: 0x800105a8 <- 0xfff70613 -mem-write: 0x800105ac <- 0x1036663 -mem-write: 0x800105b0 <- 0xd37463 -mem-write: 0x800105b4 <- 0xffe70613 -mem-write: 0x800105b8 <- 0x1051513 -mem-write: 0x800105bc <- 0xc56533 -mem-write: 0x800105c0 <- 0x8067 -mem-write: 0x800105c4 <- 0x1000737 -mem-write: 0x800105c8 <- 0x1000513 -mem-write: 0x800105cc <- 0xf4e864e3 -mem-write: 0x800105d0 <- 0x1800513 -mem-write: 0x800105d4 <- 0xf41ff06f -mem-write: 0x800105d8 <- 0xd81833 -mem-write: 0x800105dc <- 0xe7d5b3 -mem-write: 0x800105e0 <- 0xd89333 -mem-write: 0x800105e4 <- 0xd797b3 -mem-write: 0x800105e8 <- 0xe8d733 -mem-write: 0x800105ec <- 0x1085893 -mem-write: 0x800105f0 <- 0xf76633 -mem-write: 0x800105f4 <- 0x315f733 -mem-write: 0x800105f8 <- 0x1081793 -mem-write: 0x800105fc <- 0x107d793 -mem-write: 0x80010600 <- 0x1065513 -mem-write: 0x80010604 <- 0x315d5b3 -mem-write: 0x80010608 <- 0x1071713 -mem-write: 0x8001060c <- 0xa76733 -mem-write: 0x80010610 <- 0x2b786b3 -mem-write: 0x80010614 <- 0x58513 -mem-write: 0x80010618 <- 0xd77e63 -mem-write: 0x8001061c <- 0x1070733 -mem-write: 0x80010620 <- 0xfff58513 -mem-write: 0x80010624 <- 0x1076863 -mem-write: 0x80010628 <- 0xd77663 -mem-write: 0x8001062c <- 0xffe58513 -mem-write: 0x80010630 <- 0x1070733 -mem-write: 0x80010634 <- 0x40d706b3 -mem-write: 0x80010638 <- 0x316f733 -mem-write: 0x8001063c <- 0x1061613 -mem-write: 0x80010640 <- 0x1065613 -mem-write: 0x80010644 <- 0x316d6b3 -mem-write: 0x80010648 <- 0x1071713 -mem-write: 0x8001064c <- 0x2d788b3 -mem-write: 0x80010650 <- 0xc767b3 -mem-write: 0x80010654 <- 0x68713 -mem-write: 0x80010658 <- 0x117fe63 -mem-write: 0x8001065c <- 0x10787b3 -mem-write: 0x80010660 <- 0xfff68713 -mem-write: 0x80010664 <- 0x107e863 -mem-write: 0x80010668 <- 0x117f663 -mem-write: 0x8001066c <- 0xffe68713 -mem-write: 0x80010670 <- 0x10787b3 -mem-write: 0x80010674 <- 0x1051593 -mem-write: 0x80010678 <- 0x411787b3 -mem-write: 0x8001067c <- 0xe5e5b3 -mem-write: 0x80010680 <- 0xeb9ff06f -mem-write: 0x80010684 <- 0x18d5e663 -mem-write: 0x80010688 <- 0x10737 -mem-write: 0x8001068c <- 0x4e6f463 -mem-write: 0x80010690 <- 0xff00713 -mem-write: 0x80010694 <- 0xd735b3 -mem-write: 0x80010698 <- 0x359593 -mem-write: 0x8001069c <- 0x80015737 -mem-write: 0x800106a0 <- 0xb6d533 -mem-write: 0x800106a4 <- 0x6b470713 -mem-write: 0x800106a8 <- 0xa70733 -mem-write: 0x800106ac <- 0x74703 -mem-write: 0x800106b0 <- 0x2000513 -mem-write: 0x800106b4 <- 0xb70733 -mem-write: 0x800106b8 <- 0x40e505b3 -mem-write: 0x800106bc <- 0x2e51663 -mem-write: 0x800106c0 <- 0x100513 -mem-write: 0x800106c4 <- 0xeef6eee3 -mem-write: 0x800106c8 <- 0xc8b533 -mem-write: 0x800106cc <- 0x154513 -mem-write: 0x800106d0 <- 0xef1ff06f -mem-write: 0x800106d4 <- 0x1000737 -mem-write: 0x800106d8 <- 0x1000593 -mem-write: 0x800106dc <- 0xfce6e0e3 -mem-write: 0x800106e0 <- 0x1800593 -mem-write: 0x800106e4 <- 0xfb9ff06f -mem-write: 0x800106e8 <- 0xe65333 -mem-write: 0x800106ec <- 0xb696b3 -mem-write: 0x800106f0 <- 0xd36333 -mem-write: 0x800106f4 <- 0x1035513 -mem-write: 0x800106f8 <- 0xb61eb3 -mem-write: 0x800106fc <- 0xe7d633 -mem-write: 0x80010700 <- 0x2a676b3 -mem-write: 0x80010704 <- 0xb797b3 -mem-write: 0x80010708 <- 0xe8d733 -mem-write: 0x8001070c <- 0xf76833 -mem-write: 0x80010710 <- 0x1031793 -mem-write: 0x80010714 <- 0x107d793 -mem-write: 0x80010718 <- 0x1085713 -mem-write: 0x8001071c <- 0x2a65633 -mem-write: 0x80010720 <- 0x1069693 -mem-write: 0x80010724 <- 0xe6e733 -mem-write: 0x80010728 <- 0x2c78f33 -mem-write: 0x8001072c <- 0x60e13 -mem-write: 0x80010730 <- 0x1e77e63 -mem-write: 0x80010734 <- 0x670733 -mem-write: 0x80010738 <- 0xfff60e13 -mem-write: 0x8001073c <- 0x676863 -mem-write: 0x80010740 <- 0x1e77663 -mem-write: 0x80010744 <- 0xffe60e13 -mem-write: 0x80010748 <- 0x670733 -mem-write: 0x8001074c <- 0x41e70733 -mem-write: 0x80010750 <- 0x2a776b3 -mem-write: 0x80010754 <- 0x2a75733 -mem-write: 0x80010758 <- 0x1069693 -mem-write: 0x8001075c <- 0x2e78633 -mem-write: 0x80010760 <- 0x1081793 -mem-write: 0x80010764 <- 0x107d793 -mem-write: 0x80010768 <- 0xf6e7b3 -mem-write: 0x8001076c <- 0x70693 -mem-write: 0x80010770 <- 0xc7fe63 -mem-write: 0x80010774 <- 0x6787b3 -mem-write: 0x80010778 <- 0xfff70693 -mem-write: 0x8001077c <- 0x67e863 -mem-write: 0x80010780 <- 0xc7f663 -mem-write: 0x80010784 <- 0xffe70693 -mem-write: 0x80010788 <- 0x6787b3 -mem-write: 0x8001078c <- 0x10e1513 -mem-write: 0x80010790 <- 0x10e37 -mem-write: 0x80010794 <- 0xd56533 -mem-write: 0x80010798 <- 0xfffe0693 -mem-write: 0x8001079c <- 0xd57833 -mem-write: 0x800107a0 <- 0x40c787b3 -mem-write: 0x800107a4 <- 0xdef6b3 -mem-write: 0x800107a8 <- 0x1055613 -mem-write: 0x800107ac <- 0x10ede93 -mem-write: 0x800107b0 <- 0x2d80333 -mem-write: 0x800107b4 <- 0x2d606b3 -mem-write: 0x800107b8 <- 0x1035713 -mem-write: 0x800107bc <- 0x3d80833 -mem-write: 0x800107c0 <- 0xd80833 -mem-write: 0x800107c4 <- 0x1070733 -mem-write: 0x800107c8 <- 0x3d60633 -mem-write: 0x800107cc <- 0xd77463 -mem-write: 0x800107d0 <- 0x1c60633 -mem-write: 0x800107d4 <- 0x1075693 -mem-write: 0x800107d8 <- 0xc68633 -mem-write: 0x800107dc <- 0x2c7e663 -mem-write: 0x800107e0 <- 0xcec79ce3 -mem-write: 0x800107e4 <- 0x107b7 -mem-write: 0x800107e8 <- 0xfff78793 -mem-write: 0x800107ec <- 0xf77733 -mem-write: 0x800107f0 <- 0x1071713 -mem-write: 0x800107f4 <- 0xf37333 -VXDRV: upload 1024 bytes to 0x800107f8 -mem-write: 0x800107f8 <- 0xb898b3 -mem-write: 0x800107fc <- 0x670733 -mem-write: 0x80010800 <- 0x593 -mem-write: 0x80010804 <- 0xdae8fee3 -mem-write: 0x80010808 <- 0xfff50513 -mem-write: 0x8001080c <- 0xccdff06f -mem-write: 0x80010810 <- 0x593 -mem-write: 0x80010814 <- 0x513 -mem-write: 0x80010818 <- 0xda9ff06f -mem-write: 0x8001081c <- 0x60893 -mem-write: 0x80010820 <- 0x68713 -mem-write: 0x80010824 <- 0x50793 -mem-write: 0x80010828 <- 0x58813 -mem-write: 0x8001082c <- 0x22069c63 -mem-write: 0x80010830 <- 0x800156b7 -mem-write: 0x80010834 <- 0x6b468693 -mem-write: 0x80010838 <- 0xcc5fc63 -mem-write: 0x8001083c <- 0x10337 -mem-write: 0x80010840 <- 0xa667e63 -mem-write: 0x80010844 <- 0xff00313 -mem-write: 0x80010848 <- 0xc37463 -mem-write: 0x8001084c <- 0x800713 -mem-write: 0x80010850 <- 0xe65333 -mem-write: 0x80010854 <- 0x6686b3 -mem-write: 0x80010858 <- 0x6ce03 -mem-write: 0x8001085c <- 0xee0e33 -mem-write: 0x80010860 <- 0x2000713 -mem-write: 0x80010864 <- 0x41c70333 -mem-write: 0x80010868 <- 0x1c70c63 -mem-write: 0x8001086c <- 0x6595b3 -mem-write: 0x80010870 <- 0x1c55e33 -mem-write: 0x80010874 <- 0x6618b3 -mem-write: 0x80010878 <- 0xbe6833 -mem-write: 0x8001087c <- 0x6517b3 -mem-write: 0x80010880 <- 0x108d613 -mem-write: 0x80010884 <- 0x2c87733 -mem-write: 0x80010888 <- 0x1089513 -mem-write: 0x8001088c <- 0x1055513 -mem-write: 0x80010890 <- 0x107d693 -mem-write: 0x80010894 <- 0x2c85833 -mem-write: 0x80010898 <- 0x1071713 -mem-write: 0x8001089c <- 0xd766b3 -mem-write: 0x800108a0 <- 0x3050833 -mem-write: 0x800108a4 <- 0x106fa63 -mem-write: 0x800108a8 <- 0x11686b3 -mem-write: 0x800108ac <- 0x116e663 -mem-write: 0x800108b0 <- 0x106f463 -mem-write: 0x800108b4 <- 0x11686b3 -mem-write: 0x800108b8 <- 0x410686b3 -mem-write: 0x800108bc <- 0x2c6f733 -mem-write: 0x800108c0 <- 0x1079793 -mem-write: 0x800108c4 <- 0x107d793 -mem-write: 0x800108c8 <- 0x2c6d6b3 -mem-write: 0x800108cc <- 0x2d506b3 -mem-write: 0x800108d0 <- 0x1071513 -mem-write: 0x800108d4 <- 0xf567b3 -mem-write: 0x800108d8 <- 0xd7fa63 -mem-write: 0x800108dc <- 0x11787b3 -mem-write: 0x800108e0 <- 0x117e663 -mem-write: 0x800108e4 <- 0xd7f463 -mem-write: 0x800108e8 <- 0x11787b3 -mem-write: 0x800108ec <- 0x40d787b3 -mem-write: 0x800108f0 <- 0x67d533 -mem-write: 0x800108f4 <- 0x593 -mem-write: 0x800108f8 <- 0x8067 -mem-write: 0x800108fc <- 0x1000337 -mem-write: 0x80010900 <- 0x1000713 -mem-write: 0x80010904 <- 0xf46666e3 -mem-write: 0x80010908 <- 0x1800713 -mem-write: 0x8001090c <- 0xf45ff06f -mem-write: 0x80010910 <- 0x61663 -mem-write: 0x80010914 <- 0x100613 -mem-write: 0x80010918 <- 0x31658b3 -mem-write: 0x8001091c <- 0x10637 -mem-write: 0x80010920 <- 0xac8f263 -mem-write: 0x80010924 <- 0xff00613 -mem-write: 0x80010928 <- 0x1167463 -mem-write: 0x8001092c <- 0x800713 -mem-write: 0x80010930 <- 0xe8d633 -mem-write: 0x80010934 <- 0xc686b3 -mem-write: 0x80010938 <- 0x6ce03 -mem-write: 0x8001093c <- 0xee0e33 -mem-write: 0x80010940 <- 0x2000713 -mem-write: 0x80010944 <- 0x41c70333 -mem-write: 0x80010948 <- 0x9c71863 -mem-write: 0x8001094c <- 0x411585b3 -mem-write: 0x80010950 <- 0x108d713 -mem-write: 0x80010954 <- 0x1089513 -mem-write: 0x80010958 <- 0x1055513 -mem-write: 0x8001095c <- 0x107d613 -mem-write: 0x80010960 <- 0x2e5f6b3 -mem-write: 0x80010964 <- 0x2e5d5b3 -mem-write: 0x80010968 <- 0x1069693 -mem-write: 0x8001096c <- 0xc6e6b3 -mem-write: 0x80010970 <- 0x2b505b3 -mem-write: 0x80010974 <- 0xb6fa63 -mem-write: 0x80010978 <- 0x11686b3 -mem-write: 0x8001097c <- 0x116e663 -mem-write: 0x80010980 <- 0xb6f463 -mem-write: 0x80010984 <- 0x11686b3 -mem-write: 0x80010988 <- 0x40b685b3 -mem-write: 0x8001098c <- 0x2e5f6b3 -mem-write: 0x80010990 <- 0x1079793 -mem-write: 0x80010994 <- 0x107d793 -mem-write: 0x80010998 <- 0x2e5d5b3 -mem-write: 0x8001099c <- 0x2b505b3 -mem-write: 0x800109a0 <- 0x1069513 -mem-write: 0x800109a4 <- 0xf567b3 -mem-write: 0x800109a8 <- 0xb7fa63 -mem-write: 0x800109ac <- 0x11787b3 -mem-write: 0x800109b0 <- 0x117e663 -mem-write: 0x800109b4 <- 0xb7f463 -mem-write: 0x800109b8 <- 0x11787b3 -mem-write: 0x800109bc <- 0x40b787b3 -mem-write: 0x800109c0 <- 0xf31ff06f -mem-write: 0x800109c4 <- 0x1000637 -mem-write: 0x800109c8 <- 0x1000713 -mem-write: 0x800109cc <- 0xf6c8e2e3 -mem-write: 0x800109d0 <- 0x1800713 -mem-write: 0x800109d4 <- 0xf5dff06f -mem-write: 0x800109d8 <- 0x6898b3 -mem-write: 0x800109dc <- 0x1c5d733 -mem-write: 0x800109e0 <- 0x6517b3 -mem-write: 0x800109e4 <- 0x1c55e33 -mem-write: 0x800109e8 <- 0x108d513 -mem-write: 0x800109ec <- 0x2a776b3 -mem-write: 0x800109f0 <- 0x6595b3 -mem-write: 0x800109f4 <- 0xbe6e33 -mem-write: 0x800109f8 <- 0x1089593 -mem-write: 0x800109fc <- 0x105d593 -mem-write: 0x80010a00 <- 0x10e5613 -mem-write: 0x80010a04 <- 0x2a75733 -mem-write: 0x80010a08 <- 0x1069693 -mem-write: 0x80010a0c <- 0xc6e6b3 -mem-write: 0x80010a10 <- 0x2e58733 -mem-write: 0x80010a14 <- 0xe6fa63 -mem-write: 0x80010a18 <- 0x11686b3 -mem-write: 0x80010a1c <- 0x116e663 -mem-write: 0x80010a20 <- 0xe6f463 -mem-write: 0x80010a24 <- 0x11686b3 -mem-write: 0x80010a28 <- 0x40e68633 -mem-write: 0x80010a2c <- 0x2a676b3 -mem-write: 0x80010a30 <- 0x10e1e13 -mem-write: 0x80010a34 <- 0x10e5e13 -mem-write: 0x80010a38 <- 0x2a65633 -mem-write: 0x80010a3c <- 0x1069693 -mem-write: 0x80010a40 <- 0x2c58633 -mem-write: 0x80010a44 <- 0x1c6e5b3 -mem-write: 0x80010a48 <- 0xc5fa63 -mem-write: 0x80010a4c <- 0x11585b3 -mem-write: 0x80010a50 <- 0x115e663 -mem-write: 0x80010a54 <- 0xc5f463 -mem-write: 0x80010a58 <- 0x11585b3 -mem-write: 0x80010a5c <- 0x40c585b3 -mem-write: 0x80010a60 <- 0xef1ff06f -mem-write: 0x80010a64 <- 0xe8d5eae3 -mem-write: 0x80010a68 <- 0x10737 -mem-write: 0x80010a6c <- 0x4e6fc63 -mem-write: 0x80010a70 <- 0xff00e13 -mem-write: 0x80010a74 <- 0xde3733 -mem-write: 0x80010a78 <- 0x371713 -mem-write: 0x80010a7c <- 0x800158b7 -mem-write: 0x80010a80 <- 0xe6d333 -mem-write: 0x80010a84 <- 0x6b488893 -mem-write: 0x80010a88 <- 0x6888b3 -mem-write: 0x80010a8c <- 0x8ce03 -mem-write: 0x80010a90 <- 0xee0e33 -mem-write: 0x80010a94 <- 0x2000713 -mem-write: 0x80010a98 <- 0x41c70333 -mem-write: 0x80010a9c <- 0x3c71e63 -mem-write: 0x80010aa0 <- 0xb6e463 -mem-write: 0x80010aa4 <- 0xc56a63 -mem-write: 0x80010aa8 <- 0x40c507b3 -mem-write: 0x80010aac <- 0x40d585b3 -mem-write: 0x80010ab0 <- 0xf53533 -mem-write: 0x80010ab4 <- 0x40a58833 -mem-write: 0x80010ab8 <- 0x78513 -mem-write: 0x80010abc <- 0x80593 -mem-write: 0x80010ac0 <- 0xe39ff06f -mem-write: 0x80010ac4 <- 0x10008b7 -mem-write: 0x80010ac8 <- 0x1000713 -mem-write: 0x80010acc <- 0xfb16e8e3 -mem-write: 0x80010ad0 <- 0x1800713 -mem-write: 0x80010ad4 <- 0xfa9ff06f -mem-write: 0x80010ad8 <- 0x1c65733 -mem-write: 0x80010adc <- 0x6696b3 -mem-write: 0x80010ae0 <- 0xd76f33 -mem-write: 0x80010ae4 <- 0x1c5d7b3 -mem-write: 0x80010ae8 <- 0x10f5713 -mem-write: 0x80010aec <- 0x2e7f8b3 -mem-write: 0x80010af0 <- 0x6595b3 -mem-write: 0x80010af4 <- 0x1c55833 -mem-write: 0x80010af8 <- 0xb86833 -mem-write: 0x80010afc <- 0x10f1593 -mem-write: 0x80010b00 <- 0x105d593 -mem-write: 0x80010b04 <- 0x1085693 -mem-write: 0x80010b08 <- 0x661633 -mem-write: 0x80010b0c <- 0x651533 -mem-write: 0x80010b10 <- 0x2e7d7b3 -mem-write: 0x80010b14 <- 0x1089893 -mem-write: 0x80010b18 <- 0xd8e6b3 -mem-write: 0x80010b1c <- 0x2f58eb3 -mem-write: 0x80010b20 <- 0x78893 -mem-write: 0x80010b24 <- 0x1d6fe63 -mem-write: 0x80010b28 <- 0x1e686b3 -mem-write: 0x80010b2c <- 0xfff78893 -mem-write: 0x80010b30 <- 0x1e6e863 -mem-write: 0x80010b34 <- 0x1d6f663 -mem-write: 0x80010b38 <- 0xffe78893 -mem-write: 0x80010b3c <- 0x1e686b3 -mem-write: 0x80010b40 <- 0x41d686b3 -mem-write: 0x80010b44 <- 0x2e6feb3 -mem-write: 0x80010b48 <- 0x1081813 -mem-write: 0x80010b4c <- 0x1085813 -mem-write: 0x80010b50 <- 0x2e6d6b3 -mem-write: 0x80010b54 <- 0x10e9e93 -mem-write: 0x80010b58 <- 0x10eeeb3 -mem-write: 0x80010b5c <- 0x2d585b3 -mem-write: 0x80010b60 <- 0x68793 -mem-write: 0x80010b64 <- 0xbefe63 -mem-write: 0x80010b68 <- 0x1ee8eb3 -mem-write: 0x80010b6c <- 0xfff68793 -mem-write: 0x80010b70 <- 0x1eee863 -mem-write: 0x80010b74 <- 0xbef663 -mem-write: 0x80010b78 <- 0xffe68793 -mem-write: 0x80010b7c <- 0x1ee8eb3 -mem-write: 0x80010b80 <- 0x40be85b3 -mem-write: 0x80010b84 <- 0x1089893 -mem-write: 0x80010b88 <- 0x10eb7 -mem-write: 0x80010b8c <- 0xf8e8b3 -mem-write: 0x80010b90 <- 0xfffe8793 -mem-write: 0x80010b94 <- 0xf8f833 -mem-write: 0x80010b98 <- 0x1065693 -mem-write: 0x80010b9c <- 0x108d893 -mem-write: 0x80010ba0 <- 0xf677b3 -mem-write: 0x80010ba4 <- 0x2f80733 -mem-write: 0x80010ba8 <- 0x2f887b3 -mem-write: 0x80010bac <- 0x2d80833 -mem-write: 0x80010bb0 <- 0x2d888b3 -mem-write: 0x80010bb4 <- 0xf80833 -mem-write: 0x80010bb8 <- 0x1075693 -mem-write: 0x80010bbc <- 0x10686b3 -mem-write: 0x80010bc0 <- 0xf6f463 -mem-write: 0x80010bc4 <- 0x1d888b3 -mem-write: 0x80010bc8 <- 0x107b7 -mem-write: 0x80010bcc <- 0xfff78793 -mem-write: 0x80010bd0 <- 0x106d813 -mem-write: 0x80010bd4 <- 0xf6f6b3 -mem-write: 0x80010bd8 <- 0x1069693 -mem-write: 0x80010bdc <- 0xf77733 -mem-write: 0x80010be0 <- 0x11808b3 -mem-write: 0x80010be4 <- 0xe68733 -mem-write: 0x80010be8 <- 0x115e663 -mem-write: 0x80010bec <- 0x1159e63 -mem-write: 0x80010bf0 <- 0xe57c63 -mem-write: 0x80010bf4 <- 0x40c70633 -VXDRV: upload 1024 bytes to 0x80010bf8 -mem-write: 0x80010bf8 <- 0xc73733 -mem-write: 0x80010bfc <- 0x1e70733 -mem-write: 0x80010c00 <- 0x40e888b3 -mem-write: 0x80010c04 <- 0x60713 -mem-write: 0x80010c08 <- 0x40e50733 -mem-write: 0x80010c0c <- 0xe53533 -mem-write: 0x80010c10 <- 0x411585b3 -mem-write: 0x80010c14 <- 0x40a585b3 -mem-write: 0x80010c18 <- 0x1c597b3 -mem-write: 0x80010c1c <- 0x675733 -mem-write: 0x80010c20 <- 0xe7e533 -mem-write: 0x80010c24 <- 0x65d5b3 -mem-write: 0x80010c28 <- 0xcd1ff06f -mem-write: 0x80010c2c <- 0xfd010113 -mem-write: 0x80010c30 <- 0x145d793 -mem-write: 0x80010c34 <- 0x2912223 -mem-write: 0x80010c38 <- 0x3212023 -mem-write: 0x80010c3c <- 0x1412c23 -mem-write: 0x80010c40 <- 0x1612823 -mem-write: 0x80010c44 <- 0x1812423 -mem-write: 0x80010c48 <- 0xc59493 -mem-write: 0x80010c4c <- 0x2112623 -mem-write: 0x80010c50 <- 0x2812423 -mem-write: 0x80010c54 <- 0x1312e23 -mem-write: 0x80010c58 <- 0x1512a23 -mem-write: 0x80010c5c <- 0x1712623 -mem-write: 0x80010c60 <- 0x1579713 -mem-write: 0x80010c64 <- 0x50913 -mem-write: 0x80010c68 <- 0x60b13 -mem-write: 0x80010c6c <- 0x68c13 -mem-write: 0x80010c70 <- 0xc4d493 -mem-write: 0x80010c74 <- 0x1f5da13 -mem-write: 0x80010c78 <- 0xa070463 -mem-write: 0x80010c7c <- 0x7ff7fa93 -mem-write: 0x80010c80 <- 0x7ff00793 -mem-write: 0x80010c84 <- 0x10fa8063 -mem-write: 0x80010c88 <- 0x1d55993 -mem-write: 0x80010c8c <- 0x349493 -mem-write: 0x80010c90 <- 0x99e4b3 -mem-write: 0x80010c94 <- 0x8009b7 -mem-write: 0x80010c98 <- 0x134e9b3 -mem-write: 0x80010c9c <- 0x351413 -mem-write: 0x80010ca0 <- 0xc01a8a93 -mem-write: 0x80010ca4 <- 0xb93 -mem-write: 0x80010ca8 <- 0x14c5793 -mem-write: 0x80010cac <- 0xcc1513 -mem-write: 0x80010cb0 <- 0x1579713 -mem-write: 0x80010cb4 <- 0xc55493 -mem-write: 0x80010cb8 <- 0x7ff7f593 -mem-write: 0x80010cbc <- 0x1fc5c13 -mem-write: 0x80010cc0 <- 0x10070063 -mem-write: 0x80010cc4 <- 0x7ff00793 -mem-write: 0x80010cc8 <- 0x16f58263 -mem-write: 0x80010ccc <- 0x349513 -mem-write: 0x80010cd0 <- 0x1db5793 -mem-write: 0x80010cd4 <- 0xa7e533 -mem-write: 0x80010cd8 <- 0x8004b7 -mem-write: 0x80010cdc <- 0x9564b3 -mem-write: 0x80010ce0 <- 0x3b1f93 -mem-write: 0x80010ce4 <- 0xc0158513 -mem-write: 0x80010ce8 <- 0x613 -mem-write: 0x80010cec <- 0x2b9793 -mem-write: 0x80010cf0 <- 0xc7e7b3 -mem-write: 0x80010cf4 <- 0xfff78793 -mem-write: 0x80010cf8 <- 0xe00713 -mem-write: 0x80010cfc <- 0x18a46b3 -mem-write: 0x80010d00 <- 0x40aa85b3 -mem-write: 0x80010d04 <- 0x16f76063 -mem-write: 0x80010d08 <- 0x80015737 -mem-write: 0x80010d0c <- 0x279793 -mem-write: 0x80010d10 <- 0x60070713 -mem-write: 0x80010d14 <- 0xe787b3 -mem-write: 0x80010d18 <- 0x7a783 -mem-write: 0x80010d1c <- 0x78067 -mem-write: 0x80010d20 <- 0xa4e9b3 -mem-write: 0x80010d24 <- 0x6098e63 -mem-write: 0x80010d28 <- 0x4048063 -mem-write: 0x80010d2c <- 0x48513 -mem-write: 0x80010d30 <- 0x3bd030ef -mem-write: 0x80010d34 <- 0xff550793 -mem-write: 0x80010d38 <- 0x1c00713 -mem-write: 0x80010d3c <- 0x2f74c63 -mem-write: 0x80010d40 <- 0x1d00993 -mem-write: 0x80010d44 <- 0xff850413 -mem-write: 0x80010d48 <- 0x40f989b3 -mem-write: 0x80010d4c <- 0x8494b3 -mem-write: 0x80010d50 <- 0x13959b3 -mem-write: 0x80010d54 <- 0x99e9b3 -mem-write: 0x80010d58 <- 0x891433 -mem-write: 0x80010d5c <- 0xc0d00593 -mem-write: 0x80010d60 <- 0x40a58ab3 -mem-write: 0x80010d64 <- 0xf41ff06f -mem-write: 0x80010d68 <- 0x385030ef -mem-write: 0x80010d6c <- 0x2050513 -mem-write: 0x80010d70 <- 0xfc5ff06f -mem-write: 0x80010d74 <- 0xfd850493 -mem-write: 0x80010d78 <- 0x9919b3 -mem-write: 0x80010d7c <- 0x413 -mem-write: 0x80010d80 <- 0xfddff06f -mem-write: 0x80010d84 <- 0xa4e9b3 -mem-write: 0x80010d88 <- 0x2098463 -mem-write: 0x80010d8c <- 0x50413 -mem-write: 0x80010d90 <- 0x48993 -mem-write: 0x80010d94 <- 0x7ff00a93 -mem-write: 0x80010d98 <- 0x300b93 -mem-write: 0x80010d9c <- 0xf0dff06f -mem-write: 0x80010da0 <- 0x413 -mem-write: 0x80010da4 <- 0xa93 -mem-write: 0x80010da8 <- 0x100b93 -mem-write: 0x80010dac <- 0xefdff06f -mem-write: 0x80010db0 <- 0x413 -mem-write: 0x80010db4 <- 0x7ff00a93 -mem-write: 0x80010db8 <- 0x200b93 -mem-write: 0x80010dbc <- 0xeedff06f -mem-write: 0x80010dc0 <- 0x164efb3 -mem-write: 0x80010dc4 <- 0x80f8063 -mem-write: 0x80010dc8 <- 0x4048263 -mem-write: 0x80010dcc <- 0x48513 -mem-write: 0x80010dd0 <- 0x31d030ef -mem-write: 0x80010dd4 <- 0x50593 -mem-write: 0x80010dd8 <- 0xff558793 -mem-write: 0x80010ddc <- 0x1c00713 -mem-write: 0x80010de0 <- 0x2f74e63 -mem-write: 0x80010de4 <- 0x1d00693 -mem-write: 0x80010de8 <- 0xff858f93 -mem-write: 0x80010dec <- 0x40f686b3 -mem-write: 0x80010df0 <- 0x1f49533 -mem-write: 0x80010df4 <- 0xdb56b3 -mem-write: 0x80010df8 <- 0xa6e4b3 -mem-write: 0x80010dfc <- 0x1fb1fb3 -mem-write: 0x80010e00 <- 0xc0d00713 -mem-write: 0x80010e04 <- 0x40b70533 -mem-write: 0x80010e08 <- 0xee1ff06f -mem-write: 0x80010e0c <- 0xb0513 -mem-write: 0x80010e10 <- 0x2dd030ef -mem-write: 0x80010e14 <- 0x2050593 -mem-write: 0x80010e18 <- 0xfc1ff06f -mem-write: 0x80010e1c <- 0xfd858513 -mem-write: 0x80010e20 <- 0xab14b3 -mem-write: 0x80010e24 <- 0xf93 -mem-write: 0x80010e28 <- 0xfd9ff06f -mem-write: 0x80010e2c <- 0x164efb3 -mem-write: 0x80010e30 <- 0x20f8263 -mem-write: 0x80010e34 <- 0xb0f93 -mem-write: 0x80010e38 <- 0x7ff00513 -mem-write: 0x80010e3c <- 0x300613 -mem-write: 0x80010e40 <- 0xeadff06f -mem-write: 0x80010e44 <- 0x493 -mem-write: 0x80010e48 <- 0x513 -mem-write: 0x80010e4c <- 0x100613 -mem-write: 0x80010e50 <- 0xe9dff06f -mem-write: 0x80010e54 <- 0x493 -mem-write: 0x80010e58 <- 0x7ff00513 -mem-write: 0x80010e5c <- 0x200613 -mem-write: 0x80010e60 <- 0xe8dff06f -mem-write: 0x80010e64 <- 0x134e663 -mem-write: 0x80010e68 <- 0x34999c63 -mem-write: 0x80010e6c <- 0x35f46a63 -mem-write: 0x80010e70 <- 0x1f99613 -mem-write: 0x80010e74 <- 0x145713 -mem-write: 0x80010e78 <- 0x1f41793 -mem-write: 0x80010e7c <- 0x19d993 -mem-write: 0x80010e80 <- 0xe66433 -mem-write: 0x80010e84 <- 0x849513 -mem-write: 0x80010e88 <- 0x18fd893 -mem-write: 0x80010e8c <- 0xa8e8b3 -mem-write: 0x80010e90 <- 0x1055513 -mem-write: 0x80010e94 <- 0x2a9d833 -mem-write: 0x80010e98 <- 0x1089e93 -mem-write: 0x80010e9c <- 0x10ede93 -mem-write: 0x80010ea0 <- 0x1045713 -mem-write: 0x80010ea4 <- 0x8f9313 -mem-write: 0x80010ea8 <- 0x2a9f4b3 -mem-write: 0x80010eac <- 0x80f93 -mem-write: 0x80010eb0 <- 0x30e8633 -mem-write: 0x80010eb4 <- 0x1049993 -mem-write: 0x80010eb8 <- 0x1376733 -mem-write: 0x80010ebc <- 0xc77e63 -mem-write: 0x80010ec0 <- 0x1170733 -mem-write: 0x80010ec4 <- 0xfff80f93 -mem-write: 0x80010ec8 <- 0x1176863 -mem-write: 0x80010ecc <- 0xc77663 -mem-write: 0x80010ed0 <- 0xffe80f93 -mem-write: 0x80010ed4 <- 0x1170733 -mem-write: 0x80010ed8 <- 0x40c70733 -mem-write: 0x80010edc <- 0x2a75e33 -mem-write: 0x80010ee0 <- 0x1041413 -mem-write: 0x80010ee4 <- 0x1045413 -mem-write: 0x80010ee8 <- 0x2a77733 -mem-write: 0x80010eec <- 0xe0613 -mem-write: 0x80010ef0 <- 0x3ce8833 -mem-write: 0x80010ef4 <- 0x1071713 -mem-write: 0x80010ef8 <- 0xe46733 -mem-write: 0x80010efc <- 0x1077e63 -mem-write: 0x80010f00 <- 0x1170733 -mem-write: 0x80010f04 <- 0xfffe0613 -mem-write: 0x80010f08 <- 0x1176863 -mem-write: 0x80010f0c <- 0x1077663 -mem-write: 0x80010f10 <- 0xffee0613 -mem-write: 0x80010f14 <- 0x1170733 -mem-write: 0x80010f18 <- 0x41070433 -mem-write: 0x80010f1c <- 0x10f9f93 -mem-write: 0x80010f20 <- 0x10837 -mem-write: 0x80010f24 <- 0xcfefb3 -mem-write: 0x80010f28 <- 0xfff80e13 -mem-write: 0x80010f2c <- 0x10fd613 -mem-write: 0x80010f30 <- 0x1cff733 -mem-write: 0x80010f34 <- 0x1035f13 -mem-write: 0x80010f38 <- 0x1c37e33 -mem-write: 0x80010f3c <- 0x2ee03b3 -mem-write: 0x80010f40 <- 0x3c604b3 -mem-write: 0x80010f44 <- 0x2ef0733 -mem-write: 0x80010f48 <- 0x3e602b3 -mem-write: 0x80010f4c <- 0x970633 -mem-write: 0x80010f50 <- 0x103d713 -mem-write: 0x80010f54 <- 0xc70733 -mem-write: 0x80010f58 <- 0x977463 -mem-write: 0x80010f5c <- 0x10282b3 -mem-write: 0x80010f60 <- 0x1075613 -mem-write: 0x80010f64 <- 0x560633 -mem-write: 0x80010f68 <- 0x102b7 -mem-write: 0x80010f6c <- 0xfff28293 -mem-write: 0x80010f70 <- 0x577833 -mem-write: 0x80010f74 <- 0x1081813 -mem-write: 0x80010f78 <- 0x53f3b3 -mem-write: 0x80010f7c <- 0x780833 -mem-write: 0x80010f80 <- 0xc46863 -mem-write: 0x80010f84 <- 0xf8493 -mem-write: 0x80010f88 <- 0x4c41463 -mem-write: 0x80010f8c <- 0x507f263 -mem-write: 0x80010f90 <- 0x6787b3 -mem-write: 0x80010f94 <- 0x67b733 -mem-write: 0x80010f98 <- 0x1170733 -mem-write: 0x80010f9c <- 0xe40433 -mem-write: 0x80010fa0 <- 0xffff8493 -mem-write: 0x80010fa4 <- 0x88e663 -mem-write: 0x80010fa8 <- 0x2889463 -mem-write: 0x80010fac <- 0x267e263 -mem-write: 0x80010fb0 <- 0xc46663 -mem-write: 0x80010fb4 <- 0x861e63 -mem-write: 0x80010fb8 <- 0x107fc63 -mem-write: 0x80010fbc <- 0x6787b3 -mem-write: 0x80010fc0 <- 0x67b733 -mem-write: 0x80010fc4 <- 0x1170733 -mem-write: 0x80010fc8 <- 0xffef8493 -mem-write: 0x80010fcc <- 0xe40433 -mem-write: 0x80010fd0 <- 0x41078833 -mem-write: 0x80010fd4 <- 0x40c40433 -mem-write: 0x80010fd8 <- 0x107b7b3 -mem-write: 0x80010fdc <- 0x40f40433 -mem-write: 0x80010fe0 <- 0xfff00f93 -mem-write: 0x80010fe4 <- 0x12888463 -mem-write: 0x80010fe8 <- 0x2a45fb3 -mem-write: 0x80010fec <- 0x1085713 -mem-write: 0x80010ff0 <- 0x2a47433 -mem-write: 0x80010ff4 <- 0xf8613 -VXDRV: upload 1024 bytes to 0x80010ff8 -mem-write: 0x80010ff8 <- 0x3fe87b3 -mem-write: 0x80010ffc <- 0x1041413 -mem-write: 0x80011000 <- 0x876433 -mem-write: 0x80011004 <- 0xf47e63 -mem-write: 0x80011008 <- 0x1140433 -mem-write: 0x8001100c <- 0xffff8613 -mem-write: 0x80011010 <- 0x1146863 -mem-write: 0x80011014 <- 0xf47663 -mem-write: 0x80011018 <- 0xffef8613 -mem-write: 0x8001101c <- 0x1140433 -mem-write: 0x80011020 <- 0x40f40433 -mem-write: 0x80011024 <- 0x2a45733 -mem-write: 0x80011028 <- 0x1081813 -mem-write: 0x8001102c <- 0x1085813 -mem-write: 0x80011030 <- 0x2a47433 -mem-write: 0x80011034 <- 0x70793 -mem-write: 0x80011038 <- 0x2ee8eb3 -mem-write: 0x8001103c <- 0x1041413 -mem-write: 0x80011040 <- 0x886433 -mem-write: 0x80011044 <- 0x1d47e63 -mem-write: 0x80011048 <- 0x1140433 -mem-write: 0x8001104c <- 0xfff70793 -mem-write: 0x80011050 <- 0x1146863 -mem-write: 0x80011054 <- 0x1d47663 -mem-write: 0x80011058 <- 0xffe70793 -mem-write: 0x8001105c <- 0x1140433 -mem-write: 0x80011060 <- 0x1061613 -mem-write: 0x80011064 <- 0xf66633 -mem-write: 0x80011068 <- 0x1061793 -mem-write: 0x8001106c <- 0x107d793 -mem-write: 0x80011070 <- 0x1065713 -mem-write: 0x80011074 <- 0x2ef0833 -mem-write: 0x80011078 <- 0x41d40433 -mem-write: 0x8001107c <- 0x2ff0f33 -mem-write: 0x80011080 <- 0x3c78eb3 -mem-write: 0x80011084 <- 0x3c70e33 -mem-write: 0x80011088 <- 0x10ed793 -mem-write: 0x8001108c <- 0x1cf0f33 -mem-write: 0x80011090 <- 0x1e787b3 -mem-write: 0x80011094 <- 0x1c7f663 -mem-write: 0x80011098 <- 0x10737 -mem-write: 0x8001109c <- 0xe80833 -mem-write: 0x800110a0 <- 0x107d713 -mem-write: 0x800110a4 <- 0x1070733 -mem-write: 0x800110a8 <- 0x10837 -mem-write: 0x800110ac <- 0xfff80813 -mem-write: 0x800110b0 <- 0x107f533 -mem-write: 0x800110b4 <- 0x1051513 -mem-write: 0x800110b8 <- 0x10efeb3 -mem-write: 0x800110bc <- 0x1d50533 -mem-write: 0x800110c0 <- 0xe46863 -mem-write: 0x800110c4 <- 0x24e41063 -mem-write: 0x800110c8 <- 0x60f93 -mem-write: 0x800110cc <- 0x4050063 -mem-write: 0x800110d0 <- 0x888433 -mem-write: 0x800110d4 <- 0xfff60f93 -mem-write: 0x800110d8 <- 0x3146463 -mem-write: 0x800110dc <- 0xe46663 -mem-write: 0x800110e0 <- 0x22e41063 -mem-write: 0x800110e4 <- 0x2a37063 -mem-write: 0x800110e8 <- 0x131793 -mem-write: 0x800110ec <- 0x67b333 -mem-write: 0x800110f0 <- 0x11308b3 -mem-write: 0x800110f4 <- 0xffe60f93 -mem-write: 0x800110f8 <- 0x1140433 -mem-write: 0x800110fc <- 0x78313 -mem-write: 0x80011100 <- 0xe41463 -mem-write: 0x80011104 <- 0x650463 -mem-write: 0x80011108 <- 0x1fef93 -mem-write: 0x8001110c <- 0x3ff58793 -mem-write: 0x80011110 <- 0x10f05863 -mem-write: 0x80011114 <- 0x7ff713 -mem-write: 0x80011118 <- 0x2070063 -mem-write: 0x8001111c <- 0xfff713 -mem-write: 0x80011120 <- 0x400613 -mem-write: 0x80011124 <- 0xc70a63 -mem-write: 0x80011128 <- 0x4f8613 -mem-write: 0x8001112c <- 0x1f63fb3 -mem-write: 0x80011130 <- 0x1f484b3 -mem-write: 0x80011134 <- 0x60f93 -mem-write: 0x80011138 <- 0x749713 -mem-write: 0x8001113c <- 0x75a63 -mem-write: 0x80011140 <- 0xff0007b7 -mem-write: 0x80011144 <- 0xfff78793 -mem-write: 0x80011148 <- 0xf4f4b3 -mem-write: 0x8001114c <- 0x40058793 -mem-write: 0x80011150 <- 0x7fe00713 -mem-write: 0x80011154 <- 0xaf74063 -mem-write: 0x80011158 <- 0x3fdf93 -mem-write: 0x8001115c <- 0x1d49713 -mem-write: 0x80011160 <- 0x1f76733 -mem-write: 0x80011164 <- 0x34d513 -mem-write: 0x80011168 <- 0x1479793 -mem-write: 0x8001116c <- 0x7ff00637 -mem-write: 0x80011170 <- 0xc51513 -mem-write: 0x80011174 <- 0x2c12083 -mem-write: 0x80011178 <- 0x2812403 -mem-write: 0x8001117c <- 0xc7f7b3 -mem-write: 0x80011180 <- 0xc55513 -mem-write: 0x80011184 <- 0xa7e533 -mem-write: 0x80011188 <- 0x1f69693 -mem-write: 0x8001118c <- 0xd567b3 -mem-write: 0x80011190 <- 0x2412483 -mem-write: 0x80011194 <- 0x2012903 -mem-write: 0x80011198 <- 0x1c12983 -mem-write: 0x8001119c <- 0x1812a03 -mem-write: 0x800111a0 <- 0x1412a83 -mem-write: 0x800111a4 <- 0x1012b03 -mem-write: 0x800111a8 <- 0xc12b83 -mem-write: 0x800111ac <- 0x812c03 -mem-write: 0x800111b0 <- 0x70513 -mem-write: 0x800111b4 <- 0x78593 -mem-write: 0x800111b8 <- 0x3010113 -mem-write: 0x800111bc <- 0x8067 -mem-write: 0x800111c0 <- 0xfff58593 -mem-write: 0x800111c4 <- 0x793 -mem-write: 0x800111c8 <- 0xcbdff06f -mem-write: 0x800111cc <- 0xa0693 -mem-write: 0x800111d0 <- 0x98493 -mem-write: 0x800111d4 <- 0x40f93 -mem-write: 0x800111d8 <- 0xb8613 -mem-write: 0x800111dc <- 0x300793 -mem-write: 0x800111e0 <- 0xef60863 -mem-write: 0x800111e4 <- 0x100793 -mem-write: 0x800111e8 <- 0xef60e63 -mem-write: 0x800111ec <- 0x200793 -mem-write: 0x800111f0 <- 0xf0f61ee3 -mem-write: 0x800111f4 <- 0x513 -mem-write: 0x800111f8 <- 0x713 -mem-write: 0x800111fc <- 0x7ff00793 -mem-write: 0x80011200 <- 0xf69ff06f -mem-write: 0x80011204 <- 0xc0693 -mem-write: 0x80011208 <- 0xfd5ff06f -mem-write: 0x8001120c <- 0x804b7 -mem-write: 0x80011210 <- 0xf93 -mem-write: 0x80011214 <- 0x693 -mem-write: 0x80011218 <- 0x300613 -mem-write: 0x8001121c <- 0xfc1ff06f -mem-write: 0x80011220 <- 0x100513 -mem-write: 0x80011224 <- 0x40f50533 -mem-write: 0x80011228 <- 0x3800713 -mem-write: 0x8001122c <- 0xaa74c63 -mem-write: 0x80011230 <- 0x1f00713 -mem-write: 0x80011234 <- 0x6a74463 -mem-write: 0x80011238 <- 0x41e58593 -mem-write: 0x8001123c <- 0xb497b3 -mem-write: 0x80011240 <- 0xafd733 -mem-write: 0x80011244 <- 0xbf95b3 -mem-write: 0x80011248 <- 0xe7e7b3 -mem-write: 0x8001124c <- 0xb035b3 -mem-write: 0x80011250 <- 0xb7e7b3 -mem-write: 0x80011254 <- 0xa4d533 -mem-write: 0x80011258 <- 0x77f713 -mem-write: 0x8001125c <- 0x2070063 -mem-write: 0x80011260 <- 0xf7f713 -mem-write: 0x80011264 <- 0x400613 -mem-write: 0x80011268 <- 0xc70a63 -mem-write: 0x8001126c <- 0x478713 -mem-write: 0x80011270 <- 0xf737b3 -mem-write: 0x80011274 <- 0xf50533 -mem-write: 0x80011278 <- 0x70793 -mem-write: 0x8001127c <- 0x851713 -mem-write: 0x80011280 <- 0x6074863 -mem-write: 0x80011284 <- 0x1d51713 -mem-write: 0x80011288 <- 0x37d793 -mem-write: 0x8001128c <- 0xf76733 -mem-write: 0x80011290 <- 0x355513 -mem-write: 0x80011294 <- 0x793 -mem-write: 0x80011298 <- 0xed1ff06f -mem-write: 0x8001129c <- 0xfe100713 -mem-write: 0x800112a0 <- 0x40f707b3 -mem-write: 0x800112a4 <- 0x2000613 -mem-write: 0x800112a8 <- 0xf4d7b3 -mem-write: 0x800112ac <- 0x713 -mem-write: 0x800112b0 <- 0xc50663 -mem-write: 0x800112b4 <- 0x43e58593 -mem-write: 0x800112b8 <- 0xb49733 -mem-write: 0x800112bc <- 0x1f76fb3 -mem-write: 0x800112c0 <- 0x1f03fb3 -mem-write: 0x800112c4 <- 0x1f7e7b3 -mem-write: 0x800112c8 <- 0x513 -mem-write: 0x800112cc <- 0xf8dff06f -mem-write: 0x800112d0 <- 0x80537 -mem-write: 0x800112d4 <- 0x713 -mem-write: 0x800112d8 <- 0x7ff00793 -mem-write: 0x800112dc <- 0x693 -mem-write: 0x800112e0 <- 0xe89ff06f -mem-write: 0x800112e4 <- 0x513 -mem-write: 0x800112e8 <- 0x713 -mem-write: 0x800112ec <- 0xfa9ff06f -mem-write: 0x800112f0 <- 0x513 -mem-write: 0x800112f4 <- 0x713 -mem-write: 0x800112f8 <- 0x100793 -mem-write: 0x800112fc <- 0xe6dff06f -mem-write: 0x80011300 <- 0xf8613 -mem-write: 0x80011304 <- 0x60f93 -mem-write: 0x80011308 <- 0xe01ff06f -mem-write: 0x8001130c <- 0xfd010113 -mem-write: 0x80011310 <- 0x145d793 -mem-write: 0x80011314 <- 0x2812423 -mem-write: 0x80011318 <- 0x2912223 -mem-write: 0x8001131c <- 0x1312e23 -mem-write: 0x80011320 <- 0x1412c23 -mem-write: 0x80011324 <- 0x1512a23 -mem-write: 0x80011328 <- 0xc59493 -mem-write: 0x8001132c <- 0x2112623 -mem-write: 0x80011330 <- 0x3212023 -mem-write: 0x80011334 <- 0x1612823 -mem-write: 0x80011338 <- 0x1712623 -mem-write: 0x8001133c <- 0x1579713 -mem-write: 0x80011340 <- 0x50413 -mem-write: 0x80011344 <- 0x60993 -mem-write: 0x80011348 <- 0x68a93 -mem-write: 0x8001134c <- 0xc4d493 -mem-write: 0x80011350 <- 0x1f5da13 -mem-write: 0x80011354 <- 0xa070663 -mem-write: 0x80011358 <- 0x7ff7fb13 -mem-write: 0x8001135c <- 0x7ff00793 -mem-write: 0x80011360 <- 0x10fb0263 -mem-write: 0x80011364 <- 0x1d55793 -mem-write: 0x80011368 <- 0x349493 -mem-write: 0x8001136c <- 0x97e4b3 -mem-write: 0x80011370 <- 0x8007b7 -mem-write: 0x80011374 <- 0xf4e4b3 -mem-write: 0x80011378 <- 0x351913 -mem-write: 0x8001137c <- 0xc01b0b13 -mem-write: 0x80011380 <- 0xb93 -mem-write: 0x80011384 <- 0x14ad793 -mem-write: 0x80011388 <- 0xca9413 -mem-write: 0x8001138c <- 0x1579713 -mem-write: 0x80011390 <- 0xc45413 -mem-write: 0x80011394 <- 0x7ff7f513 -mem-write: 0x80011398 <- 0x1fada93 -mem-write: 0x8001139c <- 0x10070063 -mem-write: 0x800113a0 <- 0x7ff00793 -mem-write: 0x800113a4 <- 0x16f50063 -mem-write: 0x800113a8 <- 0x1d9d793 -mem-write: 0x800113ac <- 0x341413 -mem-write: 0x800113b0 <- 0x87e433 -mem-write: 0x800113b4 <- 0x8007b7 -mem-write: 0x800113b8 <- 0xf46433 -mem-write: 0x800113bc <- 0xc0150513 -mem-write: 0x800113c0 <- 0x399793 -mem-write: 0x800113c4 <- 0x713 -mem-write: 0x800113c8 <- 0x2b9693 -mem-write: 0x800113cc <- 0xe6e6b3 -mem-write: 0x800113d0 <- 0xab0533 -mem-write: 0x800113d4 <- 0xfff68693 -mem-write: 0x800113d8 <- 0xe00813 -mem-write: 0x800113dc <- 0x15a4633 -mem-write: 0x800113e0 <- 0x150593 -mem-write: 0x800113e4 <- 0x14d86c63 -mem-write: 0x800113e8 <- 0x80015537 -mem-write: 0x800113ec <- 0x269693 -mem-write: 0x800113f0 <- 0x63c50513 -mem-write: 0x800113f4 <- 0xa686b3 -VXDRV: upload 1024 bytes to 0x800113f8 -mem-write: 0x800113f8 <- 0x6a683 -mem-write: 0x800113fc <- 0x68067 -mem-write: 0x80011400 <- 0xa4e933 -mem-write: 0x80011404 <- 0x6090c63 -mem-write: 0x80011408 <- 0x4048063 -mem-write: 0x8001140c <- 0x48513 -mem-write: 0x80011410 <- 0x4dc030ef -mem-write: 0x80011414 <- 0xff550713 -mem-write: 0x80011418 <- 0x1c00793 -mem-write: 0x8001141c <- 0x2e7cc63 -mem-write: 0x80011420 <- 0x1d00793 -mem-write: 0x80011424 <- 0xff850913 -mem-write: 0x80011428 <- 0x40e787b3 -mem-write: 0x8001142c <- 0x12494b3 -mem-write: 0x80011430 <- 0xf457b3 -mem-write: 0x80011434 <- 0x97e4b3 -mem-write: 0x80011438 <- 0x1241933 -mem-write: 0x8001143c <- 0xc0d00b13 -mem-write: 0x80011440 <- 0x40ab0b33 -mem-write: 0x80011444 <- 0xf3dff06f -mem-write: 0x80011448 <- 0x4a4030ef -mem-write: 0x8001144c <- 0x2050513 -mem-write: 0x80011450 <- 0xfc5ff06f -mem-write: 0x80011454 <- 0xfd850493 -mem-write: 0x80011458 <- 0x9414b3 -mem-write: 0x8001145c <- 0x913 -mem-write: 0x80011460 <- 0xfddff06f -mem-write: 0x80011464 <- 0xa4e933 -mem-write: 0x80011468 <- 0x2090263 -mem-write: 0x8001146c <- 0x50913 -mem-write: 0x80011470 <- 0x7ff00b13 -mem-write: 0x80011474 <- 0x300b93 -mem-write: 0x80011478 <- 0xf0dff06f -mem-write: 0x8001147c <- 0x493 -mem-write: 0x80011480 <- 0xb13 -mem-write: 0x80011484 <- 0x100b93 -mem-write: 0x80011488 <- 0xefdff06f -mem-write: 0x8001148c <- 0x493 -mem-write: 0x80011490 <- 0x7ff00b13 -mem-write: 0x80011494 <- 0x200b93 -mem-write: 0x80011498 <- 0xeedff06f -mem-write: 0x8001149c <- 0x13467b3 -mem-write: 0x800114a0 <- 0x6078e63 -mem-write: 0x800114a4 <- 0x4040063 -mem-write: 0x800114a8 <- 0x40513 -mem-write: 0x800114ac <- 0x440030ef -mem-write: 0x800114b0 <- 0xff550693 -mem-write: 0x800114b4 <- 0x1c00793 -mem-write: 0x800114b8 <- 0x2d7ce63 -mem-write: 0x800114bc <- 0x1d00713 -mem-write: 0x800114c0 <- 0xff850793 -mem-write: 0x800114c4 <- 0x40d70733 -mem-write: 0x800114c8 <- 0xf41433 -mem-write: 0x800114cc <- 0xe9d733 -mem-write: 0x800114d0 <- 0x876433 -mem-write: 0x800114d4 <- 0xf997b3 -mem-write: 0x800114d8 <- 0xc0d00713 -mem-write: 0x800114dc <- 0x40a70533 -mem-write: 0x800114e0 <- 0xee5ff06f -mem-write: 0x800114e4 <- 0x98513 -mem-write: 0x800114e8 <- 0x404030ef -mem-write: 0x800114ec <- 0x2050513 -mem-write: 0x800114f0 <- 0xfc1ff06f -mem-write: 0x800114f4 <- 0xfd850413 -mem-write: 0x800114f8 <- 0x899433 -mem-write: 0x800114fc <- 0x793 -mem-write: 0x80011500 <- 0xfd9ff06f -mem-write: 0x80011504 <- 0x13467b3 -mem-write: 0x80011508 <- 0x2078263 -mem-write: 0x8001150c <- 0x98793 -mem-write: 0x80011510 <- 0x7ff00513 -mem-write: 0x80011514 <- 0x300713 -mem-write: 0x80011518 <- 0xeb1ff06f -mem-write: 0x8001151c <- 0x413 -mem-write: 0x80011520 <- 0x513 -mem-write: 0x80011524 <- 0x100713 -mem-write: 0x80011528 <- 0xea1ff06f -mem-write: 0x8001152c <- 0x413 -mem-write: 0x80011530 <- 0x7ff00513 -mem-write: 0x80011534 <- 0x200713 -mem-write: 0x80011538 <- 0xe91ff06f -mem-write: 0x8001153c <- 0x10f37 -mem-write: 0x80011540 <- 0xffff0713 -mem-write: 0x80011544 <- 0x1095693 -mem-write: 0x80011548 <- 0x107d313 -mem-write: 0x8001154c <- 0xe97933 -mem-write: 0x80011550 <- 0xe7f7b3 -mem-write: 0x80011554 <- 0x32308b3 -mem-write: 0x80011558 <- 0x2f90833 -mem-write: 0x8001155c <- 0x2f68fb3 -mem-write: 0x80011560 <- 0x1f88eb3 -mem-write: 0x80011564 <- 0x1085893 -mem-write: 0x80011568 <- 0x1d888b3 -mem-write: 0x8001156c <- 0x2668e33 -mem-write: 0x80011570 <- 0x1f8f463 -mem-write: 0x80011574 <- 0x1ee0e33 -mem-write: 0x80011578 <- 0x108d293 -mem-write: 0x8001157c <- 0xe8f8b3 -mem-write: 0x80011580 <- 0xe87833 -mem-write: 0x80011584 <- 0x1045f13 -mem-write: 0x80011588 <- 0x1089893 -mem-write: 0x8001158c <- 0xe47433 -mem-write: 0x80011590 <- 0x10888b3 -mem-write: 0x80011594 <- 0x2868733 -mem-write: 0x80011598 <- 0x2890833 -mem-write: 0x8001159c <- 0x32f0933 -mem-write: 0x800115a0 <- 0xe90eb3 -mem-write: 0x800115a4 <- 0x1085913 -mem-write: 0x800115a8 <- 0x1d90933 -mem-write: 0x800115ac <- 0x3e686b3 -mem-write: 0x800115b0 <- 0xe97663 -mem-write: 0x800115b4 <- 0x10737 -mem-write: 0x800115b8 <- 0xe686b3 -mem-write: 0x800115bc <- 0x1095e93 -mem-write: 0x800115c0 <- 0xde8eb3 -mem-write: 0x800115c4 <- 0x106b7 -mem-write: 0x800115c8 <- 0xfff68f93 -mem-write: 0x800115cc <- 0x1f97933 -mem-write: 0x800115d0 <- 0x1f87833 -mem-write: 0x800115d4 <- 0x104d713 -mem-write: 0x800115d8 <- 0x1091913 -mem-write: 0x800115dc <- 0x1f4f4b3 -mem-write: 0x800115e0 <- 0x29783b3 -mem-write: 0x800115e4 <- 0x1090933 -mem-write: 0x800115e8 <- 0x12282b3 -mem-write: 0x800115ec <- 0x2930833 -mem-write: 0x800115f0 <- 0x2f707b3 -mem-write: 0x800115f4 <- 0x2e30fb3 -mem-write: 0x800115f8 <- 0xf80333 -mem-write: 0x800115fc <- 0x103d813 -mem-write: 0x80011600 <- 0x680833 -mem-write: 0x80011604 <- 0xf87463 -mem-write: 0x80011608 <- 0xdf8fb3 -mem-write: 0x8001160c <- 0x1085793 -mem-write: 0x80011610 <- 0x106b7 -mem-write: 0x80011614 <- 0x1f78fb3 -mem-write: 0x80011618 <- 0xfff68793 -mem-write: 0x8001161c <- 0xf87833 -mem-write: 0x80011620 <- 0xf3f7b3 -mem-write: 0x80011624 <- 0x29403b3 -mem-write: 0x80011628 <- 0x1081813 -mem-write: 0x8001162c <- 0xf80833 -mem-write: 0x80011630 <- 0x2870433 -mem-write: 0x80011634 <- 0x29f04b3 -mem-write: 0x80011638 <- 0x2ef0333 -mem-write: 0x8001163c <- 0x8484b3 -mem-write: 0x80011640 <- 0x103d713 -mem-write: 0x80011644 <- 0x9704b3 -mem-write: 0x80011648 <- 0x84f463 -mem-write: 0x8001164c <- 0xd30333 -mem-write: 0x80011650 <- 0x107b7 -mem-write: 0x80011654 <- 0xfff78793 -mem-write: 0x80011658 <- 0xf4f6b3 -mem-write: 0x8001165c <- 0x1069693 -mem-write: 0x80011660 <- 0xf3f7b3 -mem-write: 0x80011664 <- 0x5e0e33 -mem-write: 0x80011668 <- 0xf686b3 -mem-write: 0x8001166c <- 0x12e3933 -mem-write: 0x80011670 <- 0x1d686b3 -mem-write: 0x80011674 <- 0x1268733 -mem-write: 0x80011678 <- 0x10e0e33 -mem-write: 0x8001167c <- 0x10e3833 -mem-write: 0x80011680 <- 0x1f70f33 -mem-write: 0x80011684 <- 0x10f02b3 -mem-write: 0x80011688 <- 0x1d6b6b3 -mem-write: 0x8001168c <- 0x1273733 -mem-write: 0x80011690 <- 0xe6e733 -mem-write: 0x80011694 <- 0x102b833 -mem-write: 0x80011698 <- 0x104d493 -mem-write: 0x8001169c <- 0x1ff3fb3 -mem-write: 0x800116a0 <- 0x970733 -mem-write: 0x800116a4 <- 0x10fe833 -mem-write: 0x800116a8 <- 0x9e1793 -mem-write: 0x800116ac <- 0x1070733 -mem-write: 0x800116b0 <- 0x670733 -mem-write: 0x800116b4 <- 0x117e7b3 -mem-write: 0x800116b8 <- 0x971713 -mem-write: 0x800116bc <- 0xf037b3 -mem-write: 0x800116c0 <- 0x17e5e13 -mem-write: 0x800116c4 <- 0x172d413 -mem-write: 0x800116c8 <- 0x1c7e7b3 -mem-write: 0x800116cc <- 0x929293 -mem-write: 0x800116d0 <- 0x771693 -mem-write: 0x800116d4 <- 0x876433 -mem-write: 0x800116d8 <- 0x57e7b3 -mem-write: 0x800116dc <- 0x1006d463 -mem-write: 0x800116e0 <- 0x17d713 -mem-write: 0x800116e4 <- 0x17f793 -mem-write: 0x800116e8 <- 0xf767b3 -mem-write: 0x800116ec <- 0x1f41713 -mem-write: 0x800116f0 <- 0xe7e7b3 -mem-write: 0x800116f4 <- 0x145413 -mem-write: 0x800116f8 <- 0x3ff58693 -mem-write: 0x800116fc <- 0xed05863 -mem-write: 0x80011700 <- 0x77f713 -mem-write: 0x80011704 <- 0x2070063 -mem-write: 0x80011708 <- 0xf7f713 -mem-write: 0x8001170c <- 0x400513 -mem-write: 0x80011710 <- 0xa70a63 -mem-write: 0x80011714 <- 0x478713 -mem-write: 0x80011718 <- 0xf737b3 -mem-write: 0x8001171c <- 0xf40433 -mem-write: 0x80011720 <- 0x70793 -mem-write: 0x80011724 <- 0x741713 -mem-write: 0x80011728 <- 0x75a63 -mem-write: 0x8001172c <- 0xff000737 -mem-write: 0x80011730 <- 0xfff70713 -mem-write: 0x80011734 <- 0xe47433 -mem-write: 0x80011738 <- 0x40058693 -mem-write: 0x8001173c <- 0x7fe00713 -mem-write: 0x80011740 <- 0x16d74863 -mem-write: 0x80011744 <- 0x37d713 -mem-write: 0x80011748 <- 0x1d41793 -mem-write: 0x8001174c <- 0xe7e7b3 -mem-write: 0x80011750 <- 0x345413 -mem-write: 0x80011754 <- 0x1469713 -mem-write: 0x80011758 <- 0xc41413 -mem-write: 0x8001175c <- 0x7ff006b7 -mem-write: 0x80011760 <- 0xd77733 -mem-write: 0x80011764 <- 0xc45413 -mem-write: 0x80011768 <- 0x876433 -mem-write: 0x8001176c <- 0x1f61613 -mem-write: 0x80011770 <- 0x2c12083 -mem-write: 0x80011774 <- 0xc46733 -mem-write: 0x80011778 <- 0x2812403 -mem-write: 0x8001177c <- 0x2412483 -mem-write: 0x80011780 <- 0x2012903 -mem-write: 0x80011784 <- 0x1c12983 -mem-write: 0x80011788 <- 0x1812a03 -mem-write: 0x8001178c <- 0x1412a83 -mem-write: 0x80011790 <- 0x1012b03 -mem-write: 0x80011794 <- 0xc12b83 -mem-write: 0x80011798 <- 0x78513 -mem-write: 0x8001179c <- 0x70593 -mem-write: 0x800117a0 <- 0x3010113 -mem-write: 0x800117a4 <- 0x8067 -mem-write: 0x800117a8 <- 0xa0613 -mem-write: 0x800117ac <- 0x48413 -mem-write: 0x800117b0 <- 0x90793 -mem-write: 0x800117b4 <- 0xb8713 -mem-write: 0x800117b8 <- 0x200693 -mem-write: 0x800117bc <- 0xed70a63 -mem-write: 0x800117c0 <- 0x300693 -mem-write: 0x800117c4 <- 0xcd70c63 -mem-write: 0x800117c8 <- 0x100693 -mem-write: 0x800117cc <- 0xf2d716e3 -mem-write: 0x800117d0 <- 0x413 -mem-write: 0x800117d4 <- 0x793 -mem-write: 0x800117d8 <- 0x880006f -mem-write: 0x800117dc <- 0xa8613 -mem-write: 0x800117e0 <- 0xfd9ff06f -mem-write: 0x800117e4 <- 0x50593 -mem-write: 0x800117e8 <- 0xf11ff06f -mem-write: 0x800117ec <- 0x100513 -mem-write: 0x800117f0 <- 0x40d50533 -mem-write: 0x800117f4 <- 0x3800713 -VXDRV: upload 1024 bytes to 0x800117f8 -mem-write: 0x800117f8 <- 0xfca74ce3 -mem-write: 0x800117fc <- 0x1f00713 -mem-write: 0x80011800 <- 0x6a74463 -mem-write: 0x80011804 <- 0x41e58593 -mem-write: 0x80011808 <- 0xb41733 -mem-write: 0x8001180c <- 0xa7d6b3 -mem-write: 0x80011810 <- 0xb797b3 -mem-write: 0x80011814 <- 0xd76733 -mem-write: 0x80011818 <- 0xf037b3 -mem-write: 0x8001181c <- 0xf767b3 -mem-write: 0x80011820 <- 0xa45433 -mem-write: 0x80011824 <- 0x77f713 -mem-write: 0x80011828 <- 0x2070063 -mem-write: 0x8001182c <- 0xf7f713 -mem-write: 0x80011830 <- 0x400693 -mem-write: 0x80011834 <- 0xd70a63 -mem-write: 0x80011838 <- 0x478713 -mem-write: 0x8001183c <- 0xf737b3 -mem-write: 0x80011840 <- 0xf40433 -mem-write: 0x80011844 <- 0x70793 -mem-write: 0x80011848 <- 0x841713 -mem-write: 0x8001184c <- 0x6074a63 -mem-write: 0x80011850 <- 0x1d41713 -mem-write: 0x80011854 <- 0x37d793 -mem-write: 0x80011858 <- 0xf767b3 -mem-write: 0x8001185c <- 0x345413 -mem-write: 0x80011860 <- 0x693 -mem-write: 0x80011864 <- 0xef1ff06f -mem-write: 0x80011868 <- 0xfe100713 -mem-write: 0x8001186c <- 0x40d70733 -mem-write: 0x80011870 <- 0x2000813 -mem-write: 0x80011874 <- 0xe45733 -mem-write: 0x80011878 <- 0x693 -mem-write: 0x8001187c <- 0x1050663 -mem-write: 0x80011880 <- 0x43e58593 -mem-write: 0x80011884 <- 0xb416b3 -mem-write: 0x80011888 <- 0xf6e7b3 -mem-write: 0x8001188c <- 0xf037b3 -mem-write: 0x80011890 <- 0xf767b3 -mem-write: 0x80011894 <- 0x413 -mem-write: 0x80011898 <- 0xf8dff06f -mem-write: 0x8001189c <- 0x80437 -mem-write: 0x800118a0 <- 0x793 -mem-write: 0x800118a4 <- 0x7ff00693 -mem-write: 0x800118a8 <- 0x613 -mem-write: 0x800118ac <- 0xea9ff06f -mem-write: 0x800118b0 <- 0x413 -mem-write: 0x800118b4 <- 0x793 -mem-write: 0x800118b8 <- 0x7ff00693 -mem-write: 0x800118bc <- 0xe99ff06f -mem-write: 0x800118c0 <- 0x413 -mem-write: 0x800118c4 <- 0x793 -mem-write: 0x800118c8 <- 0x100693 -mem-write: 0x800118cc <- 0xe89ff06f -mem-write: 0x800118d0 <- 0xc52783 -mem-write: 0x800118d4 <- 0x5af03 -mem-write: 0x800118d8 <- 0x45af83 -mem-write: 0x800118dc <- 0x85a283 -mem-write: 0x800118e0 <- 0xc5a583 -mem-write: 0x800118e4 <- 0x8737 -mem-write: 0x800118e8 <- 0x107d693 -mem-write: 0x800118ec <- 0xfff70713 -mem-write: 0x800118f0 <- 0x1079813 -mem-write: 0x800118f4 <- 0x1059e93 -mem-write: 0x800118f8 <- 0x1f7d613 -mem-write: 0x800118fc <- 0xe6f6b3 -mem-write: 0x80011900 <- 0x105d793 -mem-write: 0x80011904 <- 0x52883 -mem-write: 0x80011908 <- 0x452303 -mem-write: 0x8001190c <- 0x852e03 -mem-write: 0x80011910 <- 0xff010113 -mem-write: 0x80011914 <- 0x1085813 -mem-write: 0x80011918 <- 0x10ede93 -mem-write: 0x8001191c <- 0xe7f7b3 -mem-write: 0x80011920 <- 0x1f5d593 -mem-write: 0x80011924 <- 0x2e69063 -mem-write: 0x80011928 <- 0x68e733 -mem-write: 0x8001192c <- 0x1c76733 -mem-write: 0x80011930 <- 0x1076733 -mem-write: 0x80011934 <- 0x100513 -mem-write: 0x80011938 <- 0x4071a63 -mem-write: 0x8001193c <- 0x4d79863 -mem-write: 0x80011940 <- 0x80006f -mem-write: 0x80011944 <- 0xe79c63 -mem-write: 0x80011948 <- 0x1ff6733 -mem-write: 0x8001194c <- 0x576733 -mem-write: 0x80011950 <- 0x1d76733 -mem-write: 0x80011954 <- 0x100513 -mem-write: 0x80011958 <- 0x2071a63 -mem-write: 0x8001195c <- 0x100513 -mem-write: 0x80011960 <- 0x2d79663 -mem-write: 0x80011964 <- 0x3e89463 -mem-write: 0x80011968 <- 0x3f31263 -mem-write: 0x8001196c <- 0x25e1063 -mem-write: 0x80011970 <- 0x1d81e63 -mem-write: 0x80011974 <- 0x2b60063 -mem-write: 0x80011978 <- 0x79a63 -mem-write: 0x8001197c <- 0x68e533 -mem-write: 0x80011980 <- 0x1c56533 -mem-write: 0x80011984 <- 0x1056533 -mem-write: 0x80011988 <- 0xa03533 -mem-write: 0x8001198c <- 0x1010113 -mem-write: 0x80011990 <- 0x8067 -mem-write: 0x80011994 <- 0x513 -mem-write: 0x80011998 <- 0xff5ff06f -mem-write: 0x8001199c <- 0x52f83 -mem-write: 0x800119a0 <- 0x452803 -mem-write: 0x800119a4 <- 0x852e03 -mem-write: 0x800119a8 <- 0xc52503 -mem-write: 0x800119ac <- 0xc5a683 -mem-write: 0x800119b0 <- 0x87b7 -mem-write: 0x800119b4 <- 0x1055613 -mem-write: 0x800119b8 <- 0xfff78793 -mem-write: 0x800119bc <- 0x1069313 -mem-write: 0x800119c0 <- 0x106d713 -mem-write: 0x800119c4 <- 0x5a283 -mem-write: 0x800119c8 <- 0x45a883 -mem-write: 0x800119cc <- 0x85ae83 -mem-write: 0x800119d0 <- 0xf67633 -mem-write: 0x800119d4 <- 0x1051593 -mem-write: 0x800119d8 <- 0xff010113 -mem-write: 0x800119dc <- 0x105d593 -mem-write: 0x800119e0 <- 0x1f55513 -mem-write: 0x800119e4 <- 0x1035313 -mem-write: 0x800119e8 <- 0xf77733 -mem-write: 0x800119ec <- 0x1f6d693 -mem-write: 0x800119f0 <- 0xf61e63 -mem-write: 0x800119f4 <- 0x10fe7b3 -mem-write: 0x800119f8 <- 0x1c7e7b3 -mem-write: 0x800119fc <- 0xb7e7b3 -mem-write: 0x80011a00 <- 0xc078863 -mem-write: 0x80011a04 <- 0xffe00513 -mem-write: 0x80011a08 <- 0x640006f -mem-write: 0x80011a0c <- 0xf71a63 -mem-write: 0x80011a10 <- 0x112e7b3 -mem-write: 0x80011a14 <- 0x1d7e7b3 -mem-write: 0x80011a18 <- 0x67e7b3 -mem-write: 0x80011a1c <- 0xfe0794e3 -mem-write: 0x80011a20 <- 0xa061a63 -mem-write: 0x80011a24 <- 0x10fe7b3 -mem-write: 0x80011a28 <- 0x1c7e7b3 -mem-write: 0x80011a2c <- 0xb7e7b3 -mem-write: 0x80011a30 <- 0x17b793 -mem-write: 0x80011a34 <- 0x71a63 -mem-write: 0x80011a38 <- 0x112ef33 -mem-write: 0x80011a3c <- 0x1df6f33 -mem-write: 0x80011a40 <- 0x6f6f33 -mem-write: 0x80011a44 <- 0x60f0a63 -mem-write: 0x80011a48 <- 0x79c63 -mem-write: 0x80011a4c <- 0xa69463 -mem-write: 0x80011a50 <- 0x2c75263 -mem-write: 0x80011a54 <- 0x4050e63 -mem-write: 0x80011a58 <- 0xfff00513 -mem-write: 0x80011a5c <- 0x100006f -mem-write: 0x80011a60 <- 0xfff00513 -mem-write: 0x80011a64 <- 0x68463 -mem-write: 0x80011a68 <- 0x68513 -mem-write: 0x80011a6c <- 0x1010113 -mem-write: 0x80011a70 <- 0x8067 -mem-write: 0x80011a74 <- 0xe65663 -mem-write: 0x80011a78 <- 0xfe051ae3 -mem-write: 0x80011a7c <- 0xfddff06f -mem-write: 0x80011a80 <- 0xfcb36ae3 -mem-write: 0x80011a84 <- 0x2659e63 -mem-write: 0x80011a88 <- 0xfdcee6e3 -mem-write: 0x80011a8c <- 0x3de1e63 -mem-write: 0x80011a90 <- 0xfd08e2e3 -mem-write: 0x80011a94 <- 0x1181463 -mem-write: 0x80011a98 <- 0xfbf2eee3 -mem-write: 0x80011a9c <- 0xfd186ee3 -mem-write: 0x80011aa0 <- 0x1181463 -mem-write: 0x80011aa4 <- 0xfc5feae3 -mem-write: 0x80011aa8 <- 0x513 -mem-write: 0x80011aac <- 0xfc1ff06f -mem-write: 0x80011ab0 <- 0x100513 -mem-write: 0x80011ab4 <- 0xfb9ff06f -mem-write: 0x80011ab8 <- 0xfe0798e3 -mem-write: 0x80011abc <- 0xf99ff06f -mem-write: 0x80011ac0 <- 0xfa65ece3 -mem-write: 0x80011ac4 <- 0xfe5ff06f -mem-write: 0x80011ac8 <- 0xfbde68e3 -mem-write: 0x80011acc <- 0xfddff06f -mem-write: 0x80011ad0 <- 0xf4c700e3 -mem-write: 0x80011ad4 <- 0xf6071ce3 -mem-write: 0x80011ad8 <- 0x793 -mem-write: 0x80011adc <- 0xf5dff06f -mem-write: 0x80011ae0 <- 0x52f83 -mem-write: 0x80011ae4 <- 0x452803 -mem-write: 0x80011ae8 <- 0x852e03 -mem-write: 0x80011aec <- 0xc52503 -mem-write: 0x80011af0 <- 0xc5a683 -mem-write: 0x80011af4 <- 0x87b7 -mem-write: 0x80011af8 <- 0x1055613 -mem-write: 0x80011afc <- 0xfff78793 -mem-write: 0x80011b00 <- 0x1069313 -mem-write: 0x80011b04 <- 0x106d713 -mem-write: 0x80011b08 <- 0x5a283 -mem-write: 0x80011b0c <- 0x45a883 -mem-write: 0x80011b10 <- 0x85ae83 -mem-write: 0x80011b14 <- 0xf67633 -mem-write: 0x80011b18 <- 0x1051593 -mem-write: 0x80011b1c <- 0xff010113 -mem-write: 0x80011b20 <- 0x105d593 -mem-write: 0x80011b24 <- 0x1f55513 -mem-write: 0x80011b28 <- 0x1035313 -mem-write: 0x80011b2c <- 0xf77733 -mem-write: 0x80011b30 <- 0x1f6d693 -mem-write: 0x80011b34 <- 0xf61e63 -mem-write: 0x80011b38 <- 0x10fe7b3 -mem-write: 0x80011b3c <- 0x1c7e7b3 -mem-write: 0x80011b40 <- 0xb7e7b3 -mem-write: 0x80011b44 <- 0xc078863 -mem-write: 0x80011b48 <- 0x200513 -mem-write: 0x80011b4c <- 0x640006f -mem-write: 0x80011b50 <- 0xf71a63 -mem-write: 0x80011b54 <- 0x112e7b3 -mem-write: 0x80011b58 <- 0x1d7e7b3 -mem-write: 0x80011b5c <- 0x67e7b3 -mem-write: 0x80011b60 <- 0xfe0794e3 -mem-write: 0x80011b64 <- 0xa061a63 -mem-write: 0x80011b68 <- 0x10fe7b3 -mem-write: 0x80011b6c <- 0x1c7e7b3 -mem-write: 0x80011b70 <- 0xb7e7b3 -mem-write: 0x80011b74 <- 0x17b793 -mem-write: 0x80011b78 <- 0x71a63 -mem-write: 0x80011b7c <- 0x112ef33 -mem-write: 0x80011b80 <- 0x1df6f33 -mem-write: 0x80011b84 <- 0x6f6f33 -mem-write: 0x80011b88 <- 0x60f0a63 -mem-write: 0x80011b8c <- 0x79c63 -mem-write: 0x80011b90 <- 0xa69463 -mem-write: 0x80011b94 <- 0x2c75263 -mem-write: 0x80011b98 <- 0x4050e63 -mem-write: 0x80011b9c <- 0xfff00513 -mem-write: 0x80011ba0 <- 0x100006f -mem-write: 0x80011ba4 <- 0xfff00513 -mem-write: 0x80011ba8 <- 0x68463 -mem-write: 0x80011bac <- 0x68513 -mem-write: 0x80011bb0 <- 0x1010113 -mem-write: 0x80011bb4 <- 0x8067 -mem-write: 0x80011bb8 <- 0xe65663 -mem-write: 0x80011bbc <- 0xfe051ae3 -mem-write: 0x80011bc0 <- 0xfddff06f -mem-write: 0x80011bc4 <- 0xfcb36ae3 -mem-write: 0x80011bc8 <- 0x2659e63 -mem-write: 0x80011bcc <- 0xfdcee6e3 -mem-write: 0x80011bd0 <- 0x3de1e63 -mem-write: 0x80011bd4 <- 0xfd08e2e3 -mem-write: 0x80011bd8 <- 0x1181463 -mem-write: 0x80011bdc <- 0xfbf2eee3 -mem-write: 0x80011be0 <- 0xfd186ee3 -mem-write: 0x80011be4 <- 0x1181463 -mem-write: 0x80011be8 <- 0xfc5feae3 -mem-write: 0x80011bec <- 0x513 -mem-write: 0x80011bf0 <- 0xfc1ff06f -mem-write: 0x80011bf4 <- 0x100513 -VXDRV: upload 1023 bytes to 0x80011bf8 -mem-write: 0x80011bf8 <- 0xfb9ff06f -mem-write: 0x80011bfc <- 0xfe0798e3 -mem-write: 0x80011c00 <- 0xf99ff06f -mem-write: 0x80011c04 <- 0xfa65ece3 -mem-write: 0x80011c08 <- 0xfe5ff06f -mem-write: 0x80011c0c <- 0xfbde68e3 -mem-write: 0x80011c10 <- 0xfddff06f -mem-write: 0x80011c14 <- 0xf4c700e3 -mem-write: 0x80011c18 <- 0xf6071ce3 -mem-write: 0x80011c1c <- 0x793 -mem-write: 0x80011c20 <- 0xf5dff06f -mem-write: 0x80011c24 <- 0xf4010113 -mem-write: 0x80011c28 <- 0xa912a23 -mem-write: 0x80011c2c <- 0xc5a483 -mem-write: 0x80011c30 <- 0x5a683 -mem-write: 0x80011c34 <- 0x45a783 -mem-write: 0x80011c38 <- 0xa12423 -mem-write: 0x80011c3c <- 0x85a503 -mem-write: 0x80011c40 <- 0x1049713 -mem-write: 0x80011c44 <- 0xb212823 -mem-write: 0x80011c48 <- 0xb312623 -mem-write: 0x80011c4c <- 0xc62903 -mem-write: 0x80011c50 <- 0x62983 -mem-write: 0x80011c54 <- 0xb412423 -mem-write: 0x80011c58 <- 0xb512223 -mem-write: 0x80011c5c <- 0x862a03 -mem-write: 0x80011c60 <- 0x462a83 -mem-write: 0x80011c64 <- 0x8637 -mem-write: 0x80011c68 <- 0xa812c23 -mem-write: 0x80011c6c <- 0x1075713 -mem-write: 0x80011c70 <- 0x104d413 -mem-write: 0x80011c74 <- 0xfff60613 -mem-write: 0x80011c78 <- 0x6912623 -mem-write: 0x80011c7c <- 0xa112e23 -mem-write: 0x80011c80 <- 0xb612023 -mem-write: 0x80011c84 <- 0x9712e23 -mem-write: 0x80011c88 <- 0x9812c23 -mem-write: 0x80011c8c <- 0x9912a23 -mem-write: 0x80011c90 <- 0x9a12823 -mem-write: 0x80011c94 <- 0x9b12623 -mem-write: 0x80011c98 <- 0x6d12023 -mem-write: 0x80011c9c <- 0x6f12223 -mem-write: 0x80011ca0 <- 0x6a12423 -mem-write: 0x80011ca4 <- 0x2d12823 -mem-write: 0x80011ca8 <- 0x2f12a23 -mem-write: 0x80011cac <- 0x2a12c23 -mem-write: 0x80011cb0 <- 0x2e12e23 -mem-write: 0x80011cb4 <- 0xc47433 -mem-write: 0x80011cb8 <- 0x1f4d493 -mem-write: 0x80011cbc <- 0x12040863 -mem-write: 0x80011cc0 <- 0x24c40663 -mem-write: 0x80011cc4 <- 0x107b7 -mem-write: 0x80011cc8 <- 0xf767b3 -mem-write: 0x80011ccc <- 0x2f12e23 -mem-write: 0x80011cd0 <- 0x3010613 -mem-write: 0x80011cd4 <- 0x3c10793 -mem-write: 0x80011cd8 <- 0x7a703 -mem-write: 0x80011cdc <- 0xffc7a683 -mem-write: 0x80011ce0 <- 0xffc78793 -mem-write: 0x80011ce4 <- 0x371713 -mem-write: 0x80011ce8 <- 0x1d6d693 -mem-write: 0x80011cec <- 0xd76733 -mem-write: 0x80011cf0 <- 0xe7a223 -mem-write: 0x80011cf4 <- 0xfef612e3 -mem-write: 0x80011cf8 <- 0x3012783 -mem-write: 0x80011cfc <- 0xffffc537 -mem-write: 0x80011d00 <- 0x150513 -mem-write: 0x80011d04 <- 0x379793 -mem-write: 0x80011d08 <- 0x2f12823 -mem-write: 0x80011d0c <- 0xa40433 -mem-write: 0x80011d10 <- 0xb13 -mem-write: 0x80011d14 <- 0x1091513 -mem-write: 0x80011d18 <- 0x8737 -mem-write: 0x80011d1c <- 0x1095793 -mem-write: 0x80011d20 <- 0x1055513 -mem-write: 0x80011d24 <- 0xfff70713 -mem-write: 0x80011d28 <- 0x7212623 -mem-write: 0x80011d2c <- 0x7312023 -mem-write: 0x80011d30 <- 0x7512223 -mem-write: 0x80011d34 <- 0x7412423 -mem-write: 0x80011d38 <- 0x5312023 -mem-write: 0x80011d3c <- 0x5512223 -mem-write: 0x80011d40 <- 0x5412423 -mem-write: 0x80011d44 <- 0x4a12623 -mem-write: 0x80011d48 <- 0xe7f7b3 -mem-write: 0x80011d4c <- 0x1f95913 -mem-write: 0x80011d50 <- 0x1e078263 -mem-write: 0x80011d54 <- 0x30e78063 -mem-write: 0x80011d58 <- 0x10a37 -mem-write: 0x80011d5c <- 0x1456a33 -mem-write: 0x80011d60 <- 0x5412623 -mem-write: 0x80011d64 <- 0x4010593 -mem-write: 0x80011d68 <- 0x4c10713 -mem-write: 0x80011d6c <- 0x72683 -mem-write: 0x80011d70 <- 0xffc72603 -mem-write: 0x80011d74 <- 0xffc70713 -mem-write: 0x80011d78 <- 0x369693 -mem-write: 0x80011d7c <- 0x1d65613 -mem-write: 0x80011d80 <- 0xc6e6b3 -mem-write: 0x80011d84 <- 0xd72223 -mem-write: 0x80011d88 <- 0xfee592e3 -mem-write: 0x80011d8c <- 0x4012703 -mem-write: 0x80011d90 <- 0xffffc537 -mem-write: 0x80011d94 <- 0x150513 -mem-write: 0x80011d98 <- 0x371713 -mem-write: 0x80011d9c <- 0x4e12023 -mem-write: 0x80011da0 <- 0xa787b3 -mem-write: 0x80011da4 <- 0x713 -mem-write: 0x80011da8 <- 0x8787b3 -mem-write: 0x80011dac <- 0xf12e23 -mem-write: 0x80011db0 <- 0x178793 -mem-write: 0x80011db4 <- 0xf12c23 -mem-write: 0x80011db8 <- 0x2b1793 -mem-write: 0x80011dbc <- 0x124c6b3 -mem-write: 0x80011dc0 <- 0xe7e7b3 -mem-write: 0x80011dc4 <- 0xd12623 -mem-write: 0x80011dc8 <- 0xfff78793 -mem-write: 0x80011dcc <- 0xe00693 -mem-write: 0x80011dd0 <- 0x2af6e663 -mem-write: 0x80011dd4 <- 0x800156b7 -mem-write: 0x80011dd8 <- 0x279793 -mem-write: 0x80011ddc <- 0x67868693 -mem-write: 0x80011de0 <- 0xd787b3 -mem-write: 0x80011de4 <- 0x7a783 -mem-write: 0x80011de8 <- 0x78067 -mem-write: 0x80011dec <- 0xd7e633 -mem-write: 0x80011df0 <- 0xa66633 -mem-write: 0x80011df4 <- 0xe66633 -mem-write: 0x80011df8 <- 0x12060863 -mem-write: 0x80011dfc <- 0x6070063 -mem-write: 0x80011e00 <- 0x70513 -mem-write: 0x80011e04 <- 0x2e9020ef -mem-write: 0x80011e08 <- 0xff450693 -mem-write: 0x80011e0c <- 0x4056d793 -mem-write: 0x80011e10 <- 0x1f6f693 -mem-write: 0x80011e14 <- 0x6068e63 -mem-write: 0x80011e18 <- 0xffc00713 -mem-write: 0x80011e1c <- 0x2e78733 -mem-write: 0x80011e20 <- 0x3010313 -mem-write: 0x80011e24 <- 0x2000813 -mem-write: 0x80011e28 <- 0x279593 -mem-write: 0x80011e2c <- 0x40d80833 -mem-write: 0x80011e30 <- 0xc70713 -mem-write: 0x80011e34 <- 0xe30733 -mem-write: 0x80011e38 <- 0x8e31463 -mem-write: 0x80011e3c <- 0x8010713 -mem-write: 0x80011e40 <- 0xb705b3 -mem-write: 0x80011e44 <- 0x3012703 -mem-write: 0x80011e48 <- 0xfff78793 -mem-write: 0x80011e4c <- 0xd716b3 -mem-write: 0x80011e50 <- 0xfad5a823 -mem-write: 0x80011e54 <- 0xfff00693 -mem-write: 0x80011e58 <- 0xa00006f -mem-write: 0x80011e5c <- 0x50863 -mem-write: 0x80011e60 <- 0x28d020ef -mem-write: 0x80011e64 <- 0x2050513 -mem-write: 0x80011e68 <- 0xfa1ff06f -mem-write: 0x80011e6c <- 0x78a63 -mem-write: 0x80011e70 <- 0x78513 -mem-write: 0x80011e74 <- 0x279020ef -mem-write: 0x80011e78 <- 0x4050513 -mem-write: 0x80011e7c <- 0xf8dff06f -mem-write: 0x80011e80 <- 0x68513 -mem-write: 0x80011e84 <- 0x269020ef -mem-write: 0x80011e88 <- 0x6050513 -mem-write: 0x80011e8c <- 0xf7dff06f -mem-write: 0x80011e90 <- 0xffc00613 -mem-write: 0x80011e94 <- 0x2c78633 -mem-write: 0x80011e98 <- 0x3c10713 -mem-write: 0x80011e9c <- 0x300693 -mem-write: 0x80011ea0 <- 0xc705b3 -mem-write: 0x80011ea4 <- 0x5a583 -mem-write: 0x80011ea8 <- 0xfff68693 -mem-write: 0x80011eac <- 0xffc70713 -mem-write: 0x80011eb0 <- 0xb72223 -mem-write: 0x80011eb4 <- 0xfef6d6e3 -mem-write: 0x80011eb8 <- 0xfff78793 -mem-write: 0x80011ebc <- 0xf99ff06f -mem-write: 0x80011ec0 <- 0xffc72603 -mem-write: 0x80011ec4 <- 0x72883 -mem-write: 0x80011ec8 <- 0xb70e33 -mem-write: 0x80011ecc <- 0x1065633 -mem-write: 0x80011ed0 <- 0xd898b3 -mem-write: 0x80011ed4 <- 0x1166633 -mem-write: 0x80011ed8 <- 0xce2023 -mem-write: 0x80011edc <- 0xffc70713 -mem-write: 0x80011ee0 <- 0xf59ff06f -mem-write: 0x80011ee4 <- 0x279713 -mem-write: 0x80011ee8 <- 0x3010613 -mem-write: 0x80011eec <- 0xe60733 -mem-write: 0x80011ef0 <- 0x72023 -mem-write: 0x80011ef4 <- 0xfff78793 -mem-write: 0x80011ef8 <- 0xfed796e3 -mem-write: 0x80011efc <- 0xffffc437 -mem-write: 0x80011f00 <- 0x1140413 -mem-write: 0x80011f04 <- 0x40a40433 -mem-write: 0x80011f08 <- 0xe09ff06f -mem-write: 0x80011f0c <- 0xd7e7b3 -mem-write: 0x80011f10 <- 0xa7e7b3 -mem-write: 0x80011f14 <- 0xe7e7b3 -mem-write: 0x80011f18 <- 0x300b13 -mem-write: 0x80011f1c <- 0xde079ce3 -mem-write: 0x80011f20 <- 0x200b13 -mem-write: 0x80011f24 <- 0xdf1ff06f -mem-write: 0x80011f28 <- 0x413 -mem-write: 0x80011f2c <- 0x100b13 -mem-write: 0x80011f30 <- 0xde5ff06f -mem-write: 0x80011f34 <- 0x159e7b3 -mem-write: 0x80011f38 <- 0x147e7b3 -mem-write: 0x80011f3c <- 0xa7e7b3 -mem-write: 0x80011f40 <- 0x12078863 -mem-write: 0x80011f44 <- 0x4050e63 -mem-write: 0x80011f48 <- 0x1a5020ef -mem-write: 0x80011f4c <- 0xff450693 -mem-write: 0x80011f50 <- 0x4056d793 -mem-write: 0x80011f54 <- 0x1f6f693 -mem-write: 0x80011f58 <- 0x8068063 -mem-write: 0x80011f5c <- 0xffc00713 -mem-write: 0x80011f60 <- 0x2e78733 -mem-write: 0x80011f64 <- 0x4010313 -mem-write: 0x80011f68 <- 0x2000813 -mem-write: 0x80011f6c <- 0x279593 -mem-write: 0x80011f70 <- 0x40d80833 -mem-write: 0x80011f74 <- 0xc70713 -mem-write: 0x80011f78 <- 0xe30733 -mem-write: 0x80011f7c <- 0x8e31663 -mem-write: 0x80011f80 <- 0x8010713 -mem-write: 0x80011f84 <- 0xb705b3 -mem-write: 0x80011f88 <- 0x4012703 -mem-write: 0x80011f8c <- 0xfff78793 -mem-write: 0x80011f90 <- 0xd716b3 -mem-write: 0x80011f94 <- 0xfcd5a023 -mem-write: 0x80011f98 <- 0xfff00693 -mem-write: 0x80011f9c <- 0xa40006f -mem-write: 0x80011fa0 <- 0xa0a63 -mem-write: 0x80011fa4 <- 0xa0513 -mem-write: 0x80011fa8 <- 0x145020ef -mem-write: 0x80011fac <- 0x2050513 -mem-write: 0x80011fb0 <- 0xf9dff06f -mem-write: 0x80011fb4 <- 0xa8a63 -mem-write: 0x80011fb8 <- 0xa8513 -mem-write: 0x80011fbc <- 0x131020ef -mem-write: 0x80011fc0 <- 0x4050513 -mem-write: 0x80011fc4 <- 0xf89ff06f -mem-write: 0x80011fc8 <- 0x98513 -mem-write: 0x80011fcc <- 0x121020ef -mem-write: 0x80011fd0 <- 0x6050513 -mem-write: 0x80011fd4 <- 0xf79ff06f -mem-write: 0x80011fd8 <- 0xffc00613 -mem-write: 0x80011fdc <- 0x2c78633 -mem-write: 0x80011fe0 <- 0x4c10713 -mem-write: 0x80011fe4 <- 0x300693 -mem-write: 0x80011fe8 <- 0xc705b3 -mem-write: 0x80011fec <- 0x5a583 -mem-write: 0x80011ff0 <- 0xfff68693 -mem-write: 0x80011ff4 <- 0xc70713 -VXDRV: upload 1024 bytes to 0x80011ff7 -mem-write: 0x80011ff7 <- 0xb72223ff -mem-write: 0x80011ffb <- 0xf6d6e300 -mem-write: 0x80011fff <- 0xf78793fe -mem-write: 0x80012003 <- 0x5ff06fff -mem-write: 0x80012007 <- 0xc72603f9 -mem-write: 0x8001200b <- 0x72883ff -mem-write: 0x8001200f <- 0xb70e3300 -mem-write: 0x80012013 <- 0x6563300 -mem-write: 0x80012017 <- 0xd898b301 -mem-write: 0x8001201b <- 0x16663300 -mem-write: 0x8001201f <- 0xce202301 -mem-write: 0x80012023 <- 0xc7071300 -mem-write: 0x80012027 <- 0x5ff06fff -mem-write: 0x8001202b <- 0x279713f5 -mem-write: 0x8001202f <- 0x1061300 -mem-write: 0x80012033 <- 0xe6073304 -mem-write: 0x80012037 <- 0x7202300 -mem-write: 0x8001203b <- 0xf7879300 -mem-write: 0x8001203f <- 0xd796e3ff -mem-write: 0x80012043 <- 0xffc7b7fe -mem-write: 0x80012047 <- 0x178793ff -mem-write: 0x8001204b <- 0xa787b301 -mem-write: 0x8001204f <- 0x5ff06f40 -mem-write: 0x80012053 <- 0x59e9b3d5 -mem-write: 0x80012057 <- 0x49ea3301 -mem-write: 0x8001205b <- 0xaa6a3301 -mem-write: 0x8001205f <- 0x30071300 -mem-write: 0x80012063 <- 0xa12e300 -mem-write: 0x80012067 <- 0x200713d4 -mem-write: 0x8001206b <- 0xdff06f00 -mem-write: 0x8001206f <- 0x793d3 -mem-write: 0x80012073 <- 0x10071300 -mem-write: 0x80012077 <- 0x1ff06f00 -mem-write: 0x8001207b <- 0x12703d3 -mem-write: 0x8001207f <- 0x12e0303 -mem-write: 0x80012083 <- 0x1053704 -mem-write: 0x80012087 <- 0xf5069300 -mem-write: 0x8001208b <- 0x75f93ff -mem-write: 0x8001208f <- 0xe5a9301 -mem-write: 0x80012093 <- 0xd7773301 -mem-write: 0x80012097 <- 0xde7e3300 -mem-write: 0x8001209b <- 0xea87b300 -mem-write: 0x8001209f <- 0xee063302 -mem-write: 0x800120a3 <- 0xcf883302 -mem-write: 0x800120a7 <- 0x785b303 -mem-write: 0x800120ab <- 0x6579301 -mem-write: 0x800120af <- 0xb787b301 -mem-write: 0x800120b3 <- 0x5f8bb300 -mem-write: 0x800120b7 <- 0x7f46303 -mem-write: 0x800120bb <- 0xab8bb301 -mem-write: 0x800120bf <- 0x412f0300 -mem-write: 0x800120c3 <- 0x7d99304 -mem-write: 0x800120c7 <- 0xd7f7b301 -mem-write: 0x800120cb <- 0xd6763300 -mem-write: 0x800120cf <- 0x7979300 -mem-write: 0x800120d3 <- 0xc787b301 -mem-write: 0x800120d7 <- 0xf549300 -mem-write: 0x800120db <- 0xdf7f3301 -mem-write: 0x800120df <- 0xef06b300 -mem-write: 0x800120e3 <- 0xf1202302 -mem-write: 0x800120e7 <- 0xf1202302 -mem-write: 0x800120eb <- 0xef863306 -mem-write: 0x800120ef <- 0xe487b303 -mem-write: 0x800120f3 <- 0xc7853302 -mem-write: 0x800120f7 <- 0x6d79300 -mem-write: 0x800120fb <- 0xa787b301 -mem-write: 0x800120ff <- 0x9f8b3300 -mem-write: 0x80012103 <- 0xc7f66302 -mem-write: 0x80012107 <- 0x1063700 -mem-write: 0x8001210b <- 0xcb0b3300 -mem-write: 0x8001210f <- 0x1063700 -mem-write: 0x80012113 <- 0xf6059300 -mem-write: 0x80012117 <- 0xb7f533ff -mem-write: 0x8001211b <- 0x7d29300 -mem-write: 0x8001211f <- 0x41278301 -mem-write: 0x80012123 <- 0xb6f6b303 -mem-write: 0x80012127 <- 0x5151300 -mem-write: 0x8001212b <- 0x7d91301 -mem-write: 0x8001212f <- 0xb7f5b301 -mem-write: 0x80012133 <- 0xba87b300 -mem-write: 0x80012137 <- 0xd5053302 -mem-write: 0x8001213b <- 0xa989b300 -mem-write: 0x8001213f <- 0xc586b300 -mem-write: 0x80012143 <- 0xc9033303 -mem-write: 0x80012147 <- 0x67883303 -mem-write: 0x8001214b <- 0x6d79300 -mem-write: 0x8001214f <- 0x787b301 -mem-write: 0x80012153 <- 0x2a88b301 -mem-write: 0x80012157 <- 0x67f46303 -mem-write: 0x8001215b <- 0xc888b300 -mem-write: 0x8001215f <- 0x1033700 -mem-write: 0x80012163 <- 0xf3061300 -mem-write: 0x80012167 <- 0x7da13ff -mem-write: 0x8001216b <- 0xc7f83301 -mem-write: 0x8001216f <- 0xc6f6b300 -mem-write: 0x80012173 <- 0x1a0a3300 -mem-write: 0x80012177 <- 0x8181301 -mem-write: 0x8001217b <- 0xe588b301 -mem-write: 0x8001217f <- 0xd8083303 -mem-write: 0x80012183 <- 0xe9063300 -mem-write: 0x80012187 <- 0x8d69303 -mem-write: 0x8001218b <- 0xb487b301 -mem-write: 0x8001218f <- 0xc787b302 -mem-write: 0x80012193 <- 0xf687b300 -mem-write: 0x80012197 <- 0x248eb300 -mem-write: 0x8001219b <- 0xc7f46303 -mem-write: 0x8001219f <- 0x6e8eb300 -mem-write: 0x800121a3 <- 0x7d69300 -mem-write: 0x800121a7 <- 0xd686b301 -mem-write: 0x800121ab <- 0x1043701 -mem-write: 0x800121af <- 0x812e8300 -mem-write: 0x800121b3 <- 0xf4061304 -mem-write: 0x800121b7 <- 0xd12223ff -mem-write: 0x800121bb <- 0xc7f6b302 -mem-write: 0x800121bf <- 0xc8f8b300 -mem-write: 0x800121c3 <- 0xed39300 -mem-write: 0x800121c7 <- 0x6969301 -mem-write: 0x800121cb <- 0xcefeb301 -mem-write: 0x800121cf <- 0xee833300 -mem-write: 0x800121d3 <- 0x1686b302 -mem-write: 0x800121d7 <- 0xdf8c3301 -mem-write: 0x800121db <- 0xe388b303 -mem-write: 0x800121df <- 0x8887b302 -mem-write: 0x800121e3 <- 0x3589301 -mem-write: 0x800121e7 <- 0xf888b301 -mem-write: 0x800121eb <- 0x7f863300 -mem-write: 0x800121ef <- 0x88f46302 -mem-write: 0x800121f3 <- 0x86063301 -mem-write: 0x800121f7 <- 0x8d79300 -mem-write: 0x800121fb <- 0x10cb701 -mem-write: 0x800121ff <- 0xc787b300 -mem-write: 0x80012203 <- 0xfc861300 -mem-write: 0x80012207 <- 0xf12423ff -mem-write: 0x8001220b <- 0xc8f7b302 -mem-write: 0x8001220f <- 0x81288300 -mem-write: 0x80012213 <- 0xc3733303 -mem-write: 0x80012217 <- 0x7979300 -mem-write: 0x8001221b <- 0x8d41301 -mem-write: 0x8001221f <- 0xc8f63301 -mem-write: 0x80012223 <- 0xc608b300 -mem-write: 0x80012227 <- 0x6787b303 -mem-write: 0x8001222b <- 0xc40d3300 -mem-write: 0x8001222f <- 0x8dd9303 -mem-write: 0x80012233 <- 0xca833301 -mem-write: 0x80012237 <- 0xa3033302 -mem-write: 0x8001223b <- 0x6d833301 -mem-write: 0x8001223f <- 0x8a8c3300 -mem-write: 0x80012243 <- 0xa3746302 -mem-write: 0x80012247 <- 0x9c0c3301 -mem-write: 0x8001224b <- 0x35c9301 -mem-write: 0x8001224f <- 0x8c8c3301 -mem-write: 0x80012253 <- 0x10cb701 -mem-write: 0x80012257 <- 0x3b89b300 -mem-write: 0x8001225b <- 0xfc8d1301 -mem-write: 0x8001225f <- 0xa9b533ff -mem-write: 0x80012263 <- 0xa3733300 -mem-write: 0x80012267 <- 0xa282b301 -mem-write: 0x8001226b <- 0x3131300 -mem-write: 0x8001226f <- 0xa8f8b301 -mem-write: 0x80012273 <- 0x628b3301 -mem-write: 0x80012277 <- 0x1308b301 -mem-write: 0x8001227b <- 0x9833301 -mem-write: 0x8001227f <- 0x3383301 -mem-write: 0x80012283 <- 0x61282301 -mem-write: 0x80012287 <- 0x61222300 -mem-write: 0x8001228b <- 0x4b033306 -mem-write: 0x8001228f <- 0x302b301 -mem-write: 0x80012293 <- 0x433a3301 -mem-write: 0x80012297 <- 0x2b83301 -mem-write: 0x8001229b <- 0xd289b301 -mem-write: 0x8001229f <- 0xa683300 -mem-write: 0x800122a3 <- 0xab353301 -mem-write: 0x800122a7 <- 0xd9b6b300 -mem-write: 0x800122ab <- 0xa8053300 -mem-write: 0x800122af <- 0xf989b300 -mem-write: 0x800122b3 <- 0x41280300 -mem-write: 0x800122b7 <- 0x19833302 -mem-write: 0x800122bb <- 0x1338b301 -mem-write: 0x800122bf <- 0x612a2301 -mem-write: 0x800122c3 <- 0x61242300 -mem-write: 0x800122c7 <- 0x41230306 -mem-write: 0x800122cb <- 0x5053302 -mem-write: 0x800122cf <- 0x81280301 -mem-write: 0x800122d3 <- 0xd50db302 -mem-write: 0x800122d7 <- 0xddb6b300 -mem-write: 0x800122db <- 0x65353300 -mem-write: 0x800122df <- 0xf9b7b300 -mem-write: 0x800122e3 <- 0xd8bb300 -mem-write: 0x800122e7 <- 0xd566b301 -mem-write: 0x800122eb <- 0x81250300 -mem-write: 0x800122ef <- 0xfb883302 -mem-write: 0x800122f3 <- 0xc1230300 -mem-write: 0x800122f7 <- 0x8809b304 -mem-write: 0x800122fb <- 0x198b3301 -mem-write: 0x800122ff <- 0xabbbb301 -mem-write: 0x80012303 <- 0xf837b300 -mem-write: 0x80012307 <- 0xfbe7b300 -mem-write: 0x8001230b <- 0x1b38b300 -mem-write: 0x8001230f <- 0x89bc3301 -mem-write: 0x80012313 <- 0xf686b301 -mem-write: 0x80012317 <- 0x3529300 -mem-write: 0x8001231b <- 0x1c6a3301 -mem-write: 0x8001231f <- 0xa3733301 -mem-write: 0x80012323 <- 0xe307b301 -mem-write: 0x80012327 <- 0x468a3302 -mem-write: 0x8001232b <- 0xe2873301 -mem-write: 0x8001232f <- 0x7d89302 -mem-write: 0x80012333 <- 0x6f86b301 -mem-write: 0x80012337 <- 0xd7073302 -mem-write: 0x8001233b <- 0xe888b300 -mem-write: 0x8001233f <- 0x5f8fb300 -mem-write: 0x80012343 <- 0xd8f46302 -mem-write: 0x80012347 <- 0x9f8fb300 -mem-write: 0x8001234b <- 0xc1298301 -mem-write: 0x8001234f <- 0x106b703 -mem-write: 0x80012353 <- 0xf6851300 -mem-write: 0x80012357 <- 0x8dd13ff -mem-write: 0x8001235b <- 0xa8f8b301 -mem-write: 0x8001235f <- 0xa7f7b300 -mem-write: 0x80012363 <- 0xfd0d3300 -mem-write: 0x80012367 <- 0x8989301 -mem-write: 0x8001236b <- 0x9df9301 -mem-write: 0x8001236f <- 0xa9f9b301 -mem-write: 0x80012373 <- 0xfa8cb300 -mem-write: 0x80012377 <- 0xf888b303 -mem-write: 0x8001237b <- 0x3a8ab300 -mem-write: 0x8001237f <- 0xc987b303 -mem-write: 0x80012383 <- 0xcf8e3303 -mem-write: 0x80012387 <- 0x7d81303 -mem-write: 0x8001238b <- 0xca8ab301 -mem-write: 0x8001238f <- 0x580ab301 -mem-write: 0x80012393 <- 0xcaf46301 -mem-write: 0x80012397 <- 0xdc8cb301 -mem-write: 0x8001239b <- 0x10bb700 -mem-write: 0x8001239f <- 0xfb871300 -mem-write: 0x800123a3 <- 0xad813ff -mem-write: 0x800123a7 <- 0x980cb301 -mem-write: 0x800123ab <- 0xeaf83301 -mem-write: 0x800123af <- 0xe7f7b300 -mem-write: 0x800123b3 <- 0x8181300 -mem-write: 0x800123b7 <- 0xbe86b301 -mem-write: 0x800123bb <- 0xf8083302 -mem-write: 0x800123bf <- 0xd90e3300 -mem-write: 0x800123c3 <- 0x6d51303 -mem-write: 0x800123c7 <- 0xb387b301 -mem-write: 0x800123cb <- 0xc787b302 -mem-write: 0x800123cf <- 0xf507b301 -mem-write: 0x800123d3 <- 0x79073300 -mem-write: 0x800123d7 <- 0xc7f46302 -mem-write: 0x800123db <- 0x77073301 -mem-write: 0x800123df <- 0x7d51301 -mem-write: 0x800123e3 <- 0xe5073301 -mem-write: 0x800123e7 <- 0x10bb700 -mem-write: 0x800123eb <- 0xe1222300 -mem-write: 0x800123ef <- 0xfb871302 -mem-write: 0x800123f3 <- 0xe7f533ff -VXDRV: upload 1024 bytes to 0x800123f7 -mem-write: 0x800123f7 <- 0xe6f6b300 -mem-write: 0x800123fb <- 0xe40e3300 -mem-write: 0x800123ff <- 0x5151303 -mem-write: 0x80012403 <- 0xd5053301 -mem-write: 0x80012407 <- 0xe6073300 -mem-write: 0x8001240b <- 0xc487b303 -mem-write: 0x8001240f <- 0x7569302 -mem-write: 0x80012413 <- 0xc787b301 -mem-write: 0x80012417 <- 0xf687b301 -mem-write: 0x8001241b <- 0x848ab300 -mem-write: 0x8001241f <- 0xc7f46302 -mem-write: 0x80012423 <- 0x7a8ab301 -mem-write: 0x80012427 <- 0x10db701 -mem-write: 0x8001242b <- 0xfd8e1300 -mem-write: 0x8001242f <- 0xc7f6b3ff -mem-write: 0x80012433 <- 0x7db9301 -mem-write: 0x80012437 <- 0x1b07b301 -mem-write: 0x8001243b <- 0xc7773301 -mem-write: 0x8001243f <- 0x17b8b301 -mem-write: 0x80012443 <- 0xaa0a3301 -mem-write: 0x80012447 <- 0x6969301 -mem-write: 0x8001244b <- 0xe686b301 -mem-write: 0x8001244f <- 0x1a073300 -mem-write: 0x80012453 <- 0xe1242301 -mem-write: 0x80012457 <- 0x787b302 -mem-write: 0x8001245b <- 0xaa3a3301 -mem-write: 0x8001245f <- 0x812d0301 -mem-write: 0x80012463 <- 0x7b83302 -mem-write: 0x80012467 <- 0x970b3301 -mem-write: 0x8001246b <- 0xb073301 -mem-write: 0x8001246f <- 0xe1262301 -mem-write: 0x80012473 <- 0x1d38b302 -mem-write: 0x80012477 <- 0x1a6a3301 -mem-write: 0x8001247b <- 0xc1288301 -mem-write: 0x8001247f <- 0x412e0302 -mem-write: 0x80012483 <- 0xa787b302 -mem-write: 0x80012487 <- 0x8b83300 -mem-write: 0x8001248b <- 0x9b3b3301 -mem-write: 0x8001248f <- 0xa7b53301 -mem-write: 0x80012493 <- 0xc7073300 -mem-write: 0x80012497 <- 0xb6b3301 -mem-write: 0x8001249b <- 0x41280301 -mem-write: 0x8001249f <- 0xa70c3302 -mem-write: 0x800124a3 <- 0x5b8bb300 -mem-write: 0x800124a7 <- 0xd787b301 -mem-write: 0x800124ab <- 0xd7b6b300 -mem-write: 0x800124af <- 0x7c0ab300 -mem-write: 0x800124b3 <- 0xda8e3301 -mem-write: 0x800124b7 <- 0x7373300 -mem-write: 0x800124bb <- 0xac353301 -mem-write: 0x800124bf <- 0xa7673300 -mem-write: 0x800124c3 <- 0xde36b300 -mem-write: 0x800124c7 <- 0x6a0a3300 -mem-write: 0x800124cb <- 0x7abab301 -mem-write: 0x800124cf <- 0xea0a3301 -mem-write: 0x800124d3 <- 0xdaeab300 -mem-write: 0x800124d7 <- 0xce883300 -mem-write: 0x800124db <- 0x5a06b302 -mem-write: 0x800124df <- 0xf1262301 -mem-write: 0x800124e3 <- 0xd40a3306 -mem-write: 0x800124e7 <- 0x8551303 -mem-write: 0x800124eb <- 0xc3873301 -mem-write: 0x800124ef <- 0x47073302 -mem-write: 0x800124f3 <- 0xe5073301 -mem-write: 0x800124f7 <- 0x8388b300 -mem-write: 0x800124fb <- 0x47746302 -mem-write: 0x800124ff <- 0xb888b301 -mem-write: 0x80012503 <- 0x10a3701 -mem-write: 0x80012507 <- 0x7551300 -mem-write: 0x8001250b <- 0xfa0a9301 -mem-write: 0x8001250f <- 0x1508b3ff -mem-write: 0x80012513 <- 0x57753301 -mem-write: 0x80012517 <- 0x58783301 -mem-write: 0x8001251b <- 0x5151301 -mem-write: 0x8001251f <- 0x690ab301 -mem-write: 0x80012523 <- 0x5053302 -mem-write: 0x80012527 <- 0xb3083301 -mem-write: 0x8001252b <- 0xb285b302 -mem-write: 0x8001252f <- 0x8571302 -mem-write: 0x80012533 <- 0x5585b301 -mem-write: 0x80012537 <- 0xb7073301 -mem-write: 0x8001253b <- 0x59093300 -mem-write: 0x8001253f <- 0x57746302 -mem-write: 0x80012543 <- 0x49093301 -mem-write: 0x80012547 <- 0x10ab701 -mem-write: 0x8001254b <- 0x7559300 -mem-write: 0x8001254f <- 0xfa8a1301 -mem-write: 0x80012553 <- 0x487833ff -mem-write: 0x80012557 <- 0x25893301 -mem-write: 0x8001255b <- 0x4775b301 -mem-write: 0x8001255f <- 0x5959301 -mem-write: 0x80012563 <- 0xe9873301 -mem-write: 0x80012567 <- 0x585b303 -mem-write: 0x8001256b <- 0xef8f3301 -mem-write: 0x8001256f <- 0x7581303 -mem-write: 0x80012573 <- 0xf48a3301 -mem-write: 0x80012577 <- 0x3484b303 -mem-write: 0x8001257b <- 0xe484b303 -mem-write: 0x8001257f <- 0x9804b301 -mem-write: 0x80012583 <- 0xe4f46300 -mem-write: 0x80012587 <- 0x5a0a3301 -mem-write: 0x8001258b <- 0x4db1301 -mem-write: 0x8001258f <- 0x4b0b3301 -mem-write: 0x80012593 <- 0x10a3701 -mem-write: 0x80012597 <- 0xfa0f1300 -mem-write: 0x8001259b <- 0xe4f833ff -mem-write: 0x8001259f <- 0xe7773301 -mem-write: 0x800125a3 <- 0x6404b301 -mem-write: 0x800125a7 <- 0x8181302 -mem-write: 0x800125ab <- 0xe8083301 -mem-write: 0x800125af <- 0x660f3300 -mem-write: 0x800125b3 <- 0xc2863302 -mem-write: 0x800125b7 <- 0xf571302 -mem-write: 0x800125bb <- 0x96063301 -mem-write: 0x800125bf <- 0xc7063300 -mem-write: 0x800125c3 <- 0x54043300 -mem-write: 0x800125c7 <- 0x96746302 -mem-write: 0x800125cb <- 0x44043300 -mem-write: 0x800125cf <- 0x10a3701 -mem-write: 0x800125d3 <- 0x6571300 -mem-write: 0x800125d7 <- 0xfa049301 -mem-write: 0x800125db <- 0x870433ff -mem-write: 0x800125df <- 0x96773300 -mem-write: 0x800125e3 <- 0x9f7f3300 -mem-write: 0x800125e7 <- 0x7171300 -mem-write: 0x800125eb <- 0xf384b301 -mem-write: 0x800125ef <- 0xe7073303 -mem-write: 0x800125f3 <- 0x3383b301 -mem-write: 0x800125f7 <- 0xd98f3303 -mem-write: 0x800125fb <- 0xdf8eb303 -mem-write: 0x800125ff <- 0xf561303 -mem-write: 0x80012603 <- 0xd383b301 -mem-write: 0x80012607 <- 0x76063301 -mem-write: 0x8001260b <- 0xd6746300 -mem-write: 0x8001260f <- 0x4484b301 -mem-write: 0x80012613 <- 0x65c1301 -mem-write: 0x80012617 <- 0x10cb701 -mem-write: 0x8001261b <- 0x9c0c3300 -mem-write: 0x8001261f <- 0xae0e3300 -mem-write: 0x80012623 <- 0xfc849300 -mem-write: 0x80012627 <- 0xae3533ff -mem-write: 0x8001262b <- 0x1686b300 -mem-write: 0x8001262f <- 0x96763301 -mem-write: 0x80012633 <- 0xa68d3300 -mem-write: 0x80012637 <- 0x9f7f3300 -mem-write: 0x8001263b <- 0xbe0e3300 -mem-write: 0x8001263f <- 0x6161300 -mem-write: 0x80012643 <- 0xe6063301 -mem-write: 0x80012647 <- 0xbe35b301 -mem-write: 0x8001264b <- 0x2d0f3300 -mem-write: 0x8001264f <- 0xe0e3301 -mem-write: 0x80012653 <- 0xbf03b301 -mem-write: 0x80012657 <- 0x638eb300 -mem-write: 0x8001265b <- 0xc1282301 -mem-write: 0x8001265f <- 0xe3e3307 -mem-write: 0x80012663 <- 0xce8db301 -mem-write: 0x80012667 <- 0x16b6b301 -mem-write: 0x8001266b <- 0xb3b5b301 -mem-write: 0x8001266f <- 0xad353300 -mem-write: 0x80012673 <- 0x2f393300 -mem-write: 0x80012677 <- 0xa6e53301 -mem-write: 0x8001267b <- 0xb9693300 -mem-write: 0x8001267f <- 0x6ebeb300 -mem-write: 0x80012683 <- 0xcdbe3301 -mem-write: 0x80012687 <- 0x25053301 -mem-write: 0x8001268b <- 0xceeeb301 -mem-write: 0x8001268f <- 0xed883301 -mem-write: 0x80012693 <- 0xd5053300 -mem-write: 0x80012697 <- 0xe8373301 -mem-write: 0x8001269b <- 0x85053300 -mem-write: 0x8001269f <- 0xe506b300 -mem-write: 0x800126a3 <- 0x85343300 -mem-write: 0x800126a7 <- 0x69853300 -mem-write: 0x800126ab <- 0xc8083302 -mem-write: 0x800126af <- 0xe6b73300 -mem-write: 0x800126b3 <- 0xc8363300 -mem-write: 0x800126b7 <- 0x8686b300 -mem-write: 0x800126bb <- 0xc685b301 -mem-write: 0x800126bf <- 0x86bc3300 -mem-write: 0x800126c3 <- 0xc5b63301 -mem-write: 0x800126c7 <- 0x12a2300 -mem-write: 0x800126cb <- 0xe4673307 -mem-write: 0x800126cf <- 0x6f833300 -mem-write: 0x800126d3 <- 0x5569302 -mem-write: 0x800126d7 <- 0xcc663301 -mem-write: 0x800126db <- 0x3289b300 -mem-write: 0x800126df <- 0x6989b303 -mem-write: 0x800126e3 <- 0xf28fb300 -mem-write: 0x800126e7 <- 0x3682b303 -mem-write: 0x800126eb <- 0x62f46301 -mem-write: 0x800126ef <- 0x9f8fb300 -mem-write: 0x800126f3 <- 0x92f6b301 -mem-write: 0x800126f7 <- 0x6969300 -mem-write: 0x800126fb <- 0x9574b301 -mem-write: 0x800126ff <- 0x2d29300 -mem-write: 0x80012703 <- 0x9684b301 -mem-write: 0x80012707 <- 0xe282b300 -mem-write: 0x8001270b <- 0x1268300 -mem-write: 0x8001270f <- 0x1270301 -mem-write: 0x80012713 <- 0x9585b302 -mem-write: 0x80012717 <- 0x95b4b300 -mem-write: 0x8001271b <- 0xd769b300 -mem-write: 0x8001271f <- 0x41270300 -mem-write: 0x80012723 <- 0xc282b301 -mem-write: 0x80012727 <- 0x9282b300 -mem-write: 0x8001272b <- 0x3769b300 -mem-write: 0x8001272f <- 0xf28fb301 -mem-write: 0x80012733 <- 0xd7979301 -mem-write: 0x80012737 <- 0xb12c2300 -mem-write: 0x8001273b <- 0xf12e2306 -mem-write: 0x8001273f <- 0x37e7b307 -mem-write: 0x80012743 <- 0x1071301 -mem-write: 0x80012747 <- 0x1059306 -mem-write: 0x8001274b <- 0xc7268307 -mem-write: 0x8001274f <- 0x7260300 -mem-write: 0x80012753 <- 0x47071301 -mem-write: 0x80012757 <- 0x36d69300 -mem-write: 0x8001275b <- 0xd6161301 -mem-write: 0x8001275f <- 0xc6e6b300 -mem-write: 0x80012763 <- 0xd72e2300 -mem-write: 0x80012767 <- 0xe592e3fe -mem-write: 0x8001276b <- 0x12703fe -mem-write: 0x8001276f <- 0x81268306 -mem-write: 0x80012773 <- 0xf037b306 -mem-write: 0x80012777 <- 0xe7e7b300 -mem-write: 0x8001277b <- 0xd12c2300 -mem-write: 0x8001277f <- 0xc1270304 -mem-write: 0x80012783 <- 0x41268306 -mem-write: 0x80012787 <- 0xf1282306 -mem-write: 0x8001278b <- 0xe12e2304 -mem-write: 0x8001278f <- 0xd12a2304 -mem-write: 0x80012793 <- 0xb7169304 -mem-write: 0x80012797 <- 0x6dc6300 -mem-write: 0x8001279b <- 0xf7979320 -mem-write: 0x8001279f <- 0x1071301 -mem-write: 0x800127a3 <- 0xc1059305 -mem-write: 0x800127a7 <- 0x7268305 -mem-write: 0x800127ab <- 0x47260300 -mem-write: 0x800127af <- 0x47071300 -mem-write: 0x800127b3 <- 0x16d69300 -mem-write: 0x800127b7 <- 0xf6161300 -mem-write: 0x800127bb <- 0xc6e6b301 -mem-write: 0x800127bf <- 0xd72e2300 -mem-write: 0x800127c3 <- 0xe592e3fe -mem-write: 0x800127c7 <- 0xc12703fe -mem-write: 0x800127cb <- 0xf037b305 -mem-write: 0x800127cf <- 0x17571300 -mem-write: 0x800127d3 <- 0xe12e2300 -mem-write: 0x800127d7 <- 0x1270304 -mem-write: 0x800127db <- 0xf767b305 -mem-write: 0x800127df <- 0xf1282300 -mem-write: 0x800127e3 <- 0x81270304 -mem-write: 0x800127e7 <- 0x47b701 -mem-write: 0x800127eb <- 0xf7879300 -mem-write: 0x800127ef <- 0xf707b3ff -mem-write: 0x800127f3 <- 0xf0506300 -VXDRV: upload 1024 bytes to 0x800127f7 -mem-write: 0x800127f7 <- 0x127031e -mem-write: 0x800127fb <- 0x77769305 -mem-write: 0x800127ff <- 0x6846300 -mem-write: 0x80012803 <- 0xf7769304 -mem-write: 0x80012807 <- 0x40061300 -mem-write: 0x8001280b <- 0xc68e6300 -mem-write: 0x8001280f <- 0x41268302 -mem-write: 0x80012813 <- 0x47071305 -mem-write: 0x80012817 <- 0xe1282300 -mem-write: 0x8001281b <- 0x47371304 -mem-write: 0x8001281f <- 0xd706b300 -mem-write: 0x80012823 <- 0xe6b73300 -mem-write: 0x80012827 <- 0xd12a2300 -mem-write: 0x8001282b <- 0x81268304 -mem-write: 0x8001282f <- 0xd706b305 -mem-write: 0x80012833 <- 0xd12c2300 -mem-write: 0x80012837 <- 0xe6b6b304 -mem-write: 0x8001283b <- 0xc1270300 -mem-write: 0x8001283f <- 0xe686b305 -mem-write: 0x80012843 <- 0xd12e2300 -mem-write: 0x80012847 <- 0xc1270304 -mem-write: 0x8001284b <- 0xb7169305 -mem-write: 0x8001284f <- 0x6d06300 -mem-write: 0x80012853 <- 0xf007b702 -mem-write: 0x80012857 <- 0xf78793ff -mem-write: 0x8001285b <- 0xf77733ff -mem-write: 0x8001285f <- 0xe12e2300 -mem-write: 0x80012863 <- 0x81270304 -mem-write: 0x80012867 <- 0x47b701 -mem-write: 0x8001286b <- 0xf707b300 -mem-write: 0x8001286f <- 0x1071300 -mem-write: 0x80012873 <- 0xc1059305 -mem-write: 0x80012877 <- 0x7268305 -mem-write: 0x8001287b <- 0x47260300 -mem-write: 0x8001287f <- 0x47071300 -mem-write: 0x80012883 <- 0x36d69300 -mem-write: 0x80012887 <- 0xd6161300 -mem-write: 0x8001288b <- 0xc6e6b301 -mem-write: 0x8001288f <- 0xd72e2300 -mem-write: 0x80012893 <- 0xb712e3fe -mem-write: 0x80012897 <- 0x8737fe -mem-write: 0x8001289b <- 0xe7069300 -mem-write: 0x8001289f <- 0xf6ce63ff -mem-write: 0x800128a3 <- 0xc1270310 -mem-write: 0x800128a7 <- 0x37571305 -mem-write: 0x800128ab <- 0xe12e2300 -mem-write: 0x800128af <- 0xc1270304 -mem-write: 0x800128b3 <- 0x17979305 -mem-write: 0x800128b7 <- 0x17d79301 -mem-write: 0x800128bb <- 0xe1162301 -mem-write: 0x800128bf <- 0xc1270306 -mem-write: 0x800128c3 <- 0xc1208300 -mem-write: 0x800128c7 <- 0x8124030b -mem-write: 0x800128cb <- 0xf717130b -mem-write: 0x800128cf <- 0xf767b300 -mem-write: 0x800128d3 <- 0xf1172300 -mem-write: 0x800128d7 <- 0x81270306 -mem-write: 0x800128db <- 0x1278300 -mem-write: 0x800128df <- 0x41248305 -mem-write: 0x800128e3 <- 0x129030b -mem-write: 0x800128e7 <- 0xf720230b -mem-write: 0x800128eb <- 0x41278300 -mem-write: 0x800128ef <- 0xc1298305 -mem-write: 0x800128f3 <- 0x812a030a -mem-write: 0x800128f7 <- 0xf722230a -mem-write: 0x800128fb <- 0x81278300 -mem-write: 0x800128ff <- 0x412a8305 -mem-write: 0x80012903 <- 0x12b030a -mem-write: 0x80012907 <- 0xf724230a -mem-write: 0x8001290b <- 0xc1278300 -mem-write: 0x8001290f <- 0xc12b8306 -mem-write: 0x80012913 <- 0x812c0309 -mem-write: 0x80012917 <- 0xf7262309 -mem-write: 0x8001291b <- 0x412c8300 -mem-write: 0x8001291f <- 0x12d0309 -mem-write: 0x80012923 <- 0xc12d8309 -mem-write: 0x80012927 <- 0x7051308 -mem-write: 0x8001292b <- 0x1011300 -mem-write: 0x8001292f <- 0x80670c -mem-write: 0x80012933 <- 0x91262300 -mem-write: 0x80012937 <- 0x1278300 -mem-write: 0x8001293b <- 0xf1282303 -mem-write: 0x8001293f <- 0x41278304 -mem-write: 0x80012943 <- 0xf12a2303 -mem-write: 0x80012947 <- 0x81278304 -mem-write: 0x8001294b <- 0xf12c2303 -mem-write: 0x8001294f <- 0xc1278304 -mem-write: 0x80012953 <- 0xf12e2303 -mem-write: 0x80012957 <- 0x20079304 -mem-write: 0x8001295b <- 0xfb086300 -mem-write: 0x8001295f <- 0x30079328 -mem-write: 0x80012963 <- 0xfb026300 -mem-write: 0x80012967 <- 0x1007932a -mem-write: 0x8001296b <- 0xfb1ce300 -mem-write: 0x8001296f <- 0x12e23e6 -mem-write: 0x80012973 <- 0x12c2304 -mem-write: 0x80012977 <- 0x12a2304 -mem-write: 0x8001297b <- 0x1282304 -mem-write: 0x8001297f <- 0xc0006f04 -mem-write: 0x80012983 <- 0x21262322 -mem-write: 0x80012987 <- 0x1278301 -mem-write: 0x8001298b <- 0x70b1304 -mem-write: 0x8001298f <- 0xf1282300 -mem-write: 0x80012993 <- 0x41278304 -mem-write: 0x80012997 <- 0xf12a2304 -mem-write: 0x8001299b <- 0x81278304 -mem-write: 0x8001299f <- 0xf12c2304 -mem-write: 0x800129a3 <- 0xc1278304 -mem-write: 0x800129a7 <- 0xf12e2304 -mem-write: 0x800129ab <- 0xdff06f04 -mem-write: 0x800129af <- 0xc12783fa -mem-write: 0x800129b3 <- 0xf12c2301 -mem-write: 0x800129b7 <- 0xdff06f00 -mem-write: 0x800129bb <- 0x12e23e2 -mem-write: 0x800129bf <- 0x12c2304 -mem-write: 0x800129c3 <- 0x12a2304 -mem-write: 0x800129c7 <- 0x1282304 -mem-write: 0x800129cb <- 0xf7079304 -mem-write: 0x800129cf <- 0x1ff06fff -mem-write: 0x800129d3 <- 0x100693ee -mem-write: 0x800129d7 <- 0xf686b300 -mem-write: 0x800129db <- 0x40079340 -mem-write: 0x800129df <- 0xd7ca6307 -mem-write: 0x800129e3 <- 0x56d5131c -mem-write: 0x800129e7 <- 0x79340 -mem-write: 0x800129eb <- 0x71300 -mem-write: 0x800129ef <- 0xa7166300 -mem-write: 0x800129f3 <- 0xf6f69304 -mem-write: 0x800129f7 <- 0x25159301 -mem-write: 0x800129fb <- 0x69e6300 -mem-write: 0x800129ff <- 0x30061304 -mem-write: 0x80012a03 <- 0x1071300 -mem-write: 0x80012a07 <- 0xa6063305 -mem-write: 0x80012a0b <- 0xb7083340 -mem-write: 0x80012a0f <- 0x8280300 -mem-write: 0x80012a13 <- 0x16869300 -mem-write: 0x80012a17 <- 0x47071300 -mem-write: 0x80012a1b <- 0x72e2300 -mem-write: 0x80012a1f <- 0xd656e3ff -mem-write: 0x80012a23 <- 0x400713fe -mem-write: 0x80012a27 <- 0xa7053300 -mem-write: 0x80012a2b <- 0x10071340 -mem-write: 0x80012a2f <- 0xa0506300 -mem-write: 0x80012a33 <- 0x5071308 -mem-write: 0x80012a37 <- 0x80006f00 -mem-write: 0x80012a3b <- 0x27161307 -mem-write: 0x80012a3f <- 0x1059300 -mem-write: 0x80012a43 <- 0xc5863305 -mem-write: 0x80012a47 <- 0x6260300 -mem-write: 0x80012a4b <- 0x17071300 -mem-write: 0x80012a4f <- 0xc7e7b300 -mem-write: 0x80012a53 <- 0xdff06f00 -mem-write: 0x80012a57 <- 0x10713f9 -mem-write: 0x80012a5b <- 0xb7073308 -mem-write: 0x80012a5f <- 0x7270300 -mem-write: 0x80012a63 <- 0x893fd -mem-write: 0x80012a67 <- 0xd888b302 -mem-write: 0x80012a6b <- 0x17173340 -mem-write: 0x80012a6f <- 0xe7e7b301 -mem-write: 0x80012a73 <- 0x30061300 -mem-write: 0x80012a77 <- 0x1071300 -mem-write: 0x80012a7b <- 0xb705b305 -mem-write: 0x80012a7f <- 0x81300 -mem-write: 0x80012a83 <- 0xa6063300 -mem-write: 0x80012a87 <- 0x45859340 -mem-write: 0x80012a8b <- 0xc8466300 -mem-write: 0x80012a8f <- 0x1059302 -mem-write: 0x80012a93 <- 0x26161308 -mem-write: 0x80012a97 <- 0xc5863300 -mem-write: 0x80012a9b <- 0xc1258300 -mem-write: 0x80012a9f <- 0x40071305 -mem-write: 0x80012aa3 <- 0xa7073300 -mem-write: 0x80012aa7 <- 0xd5d6b340 -mem-write: 0x80012aab <- 0xd6282300 -mem-write: 0x80012aaf <- 0x400613fc -mem-write: 0x80012ab3 <- 0x40006f00 -mem-write: 0x80012ab7 <- 0x28131304 -mem-write: 0x80012abb <- 0x1071300 -mem-write: 0x80012abf <- 0x5ae0305 -mem-write: 0x80012ac3 <- 0x67033300 -mem-write: 0x80012ac7 <- 0xc5a70300 -mem-write: 0x80012acb <- 0x1e1e33ff -mem-write: 0x80012acf <- 0x18081301 -mem-write: 0x80012ad3 <- 0xd7573300 -mem-write: 0x80012ad7 <- 0xc7673300 -mem-write: 0x80012adb <- 0xe3202301 -mem-write: 0x80012adf <- 0x9ff06f00 -mem-write: 0x80012ae3 <- 0x271693fa -mem-write: 0x80012ae7 <- 0x1059300 -mem-write: 0x80012aeb <- 0xd586b305 -mem-write: 0x80012aef <- 0x6a02300 -mem-write: 0x80012af3 <- 0x17071300 -mem-write: 0x80012af7 <- 0xc716e300 -mem-write: 0x80012afb <- 0x12683fe -mem-write: 0x80012aff <- 0xf037b305 -mem-write: 0x80012b03 <- 0xd7e7b300 -mem-write: 0x80012b07 <- 0xf1282300 -mem-write: 0x80012b0b <- 0x77f69304 -mem-write: 0x80012b0f <- 0x6826300 -mem-write: 0x80012b13 <- 0xf7f69304 -mem-write: 0x80012b17 <- 0xe68e6300 -mem-write: 0x80012b1b <- 0x41270302 -mem-write: 0x80012b1f <- 0x47879305 -mem-write: 0x80012b23 <- 0xf1282300 -mem-write: 0x80012b27 <- 0x47b79304 -mem-write: 0x80012b2b <- 0xe7873300 -mem-write: 0x80012b2f <- 0xf737b300 -mem-write: 0x80012b33 <- 0xe12a2300 -mem-write: 0x80012b37 <- 0x81270304 -mem-write: 0x80012b3b <- 0xe7873305 -mem-write: 0x80012b3f <- 0xe12c2300 -mem-write: 0x80012b43 <- 0xf7373304 -mem-write: 0x80012b47 <- 0xc1278300 -mem-write: 0x80012b4b <- 0xf7073305 -mem-write: 0x80012b4f <- 0xe12e2300 -mem-write: 0x80012b53 <- 0xc1278304 -mem-write: 0x80012b57 <- 0xc7971305 -mem-write: 0x80012b5b <- 0x75e6300 -mem-write: 0x80012b5f <- 0x12e2300 -mem-write: 0x80012b63 <- 0x12c2304 -mem-write: 0x80012b67 <- 0x12a2304 -mem-write: 0x80012b6b <- 0x1282304 -mem-write: 0x80012b6f <- 0x10079304 -mem-write: 0x80012b73 <- 0xdff06f00 -mem-write: 0x80012b77 <- 0x10793d3 -mem-write: 0x80012b7b <- 0xc1061305 -mem-write: 0x80012b7f <- 0x7a70305 -mem-write: 0x80012b83 <- 0x47a68300 -mem-write: 0x80012b87 <- 0x47879300 -mem-write: 0x80012b8b <- 0x37571300 -mem-write: 0x80012b8f <- 0xd6969300 -mem-write: 0x80012b93 <- 0xd7673301 -mem-write: 0x80012b97 <- 0xe7ae2300 -mem-write: 0x80012b9b <- 0xf612e3fe -mem-write: 0x80012b9f <- 0xc12783fe -mem-write: 0x80012ba3 <- 0x37d79305 -mem-write: 0x80012ba7 <- 0xf12e2300 -mem-write: 0x80012bab <- 0x79304 -mem-write: 0x80012baf <- 0x1ff06f00 -mem-write: 0x80012bb3 <- 0x412783d0 -mem-write: 0x80012bb7 <- 0x1270305 -mem-write: 0x80012bbb <- 0xf7673305 -mem-write: 0x80012bbf <- 0x81278300 -mem-write: 0x80012bc3 <- 0xf7673305 -mem-write: 0x80012bc7 <- 0xc1278300 -mem-write: 0x80012bcb <- 0xf7673305 -mem-write: 0x80012bcf <- 0x79300 -mem-write: 0x80012bd3 <- 0x70ee300 -mem-write: 0x80012bd7 <- 0x12e23cc -mem-write: 0x80012bdb <- 0x12c2304 -mem-write: 0x80012bdf <- 0x12a2304 -mem-write: 0x80012be3 <- 0x1282304 -mem-write: 0x80012be7 <- 0x9ff06f04 -mem-write: 0x80012beb <- 0x87b7cc -mem-write: 0x80012bef <- 0x12e2300 -mem-write: 0x80012bf3 <- 0x12c2304 -VXDRV: upload 1024 bytes to 0x80012bf7 -mem-write: 0x80012bf7 <- 0x12a2304 -mem-write: 0x80012bfb <- 0x1282304 -mem-write: 0x80012bff <- 0xf7879304 -mem-write: 0x80012c03 <- 0xdff06fff -mem-write: 0x80012c07 <- 0x87b7ca -mem-write: 0x80012c0b <- 0xf12e2300 -mem-write: 0x80012c0f <- 0x12c2304 -mem-write: 0x80012c13 <- 0x12a2304 -mem-write: 0x80012c17 <- 0x1282304 -mem-write: 0x80012c1b <- 0xf7879304 -mem-write: 0x80012c1f <- 0x12623ff -mem-write: 0x80012c23 <- 0xdff06f00 -mem-write: 0x80012c27 <- 0x10113c8 -mem-write: 0x80012c2b <- 0x85a783fa -mem-write: 0x80012c2f <- 0x21282300 -mem-write: 0x80012c33 <- 0xc5a90305 -mem-write: 0x80012c37 <- 0x5a88300 -mem-write: 0x80012c3b <- 0x45a70300 -mem-write: 0x80012c3f <- 0x912a2300 -mem-write: 0x80012c43 <- 0xf12c2304 -mem-write: 0x80012c47 <- 0x5049302 -mem-write: 0x80012c4b <- 0xf12c2300 -mem-write: 0x80012c4f <- 0x6280300 -mem-write: 0x80012c53 <- 0x9179300 -mem-write: 0x80012c57 <- 0x46250301 -mem-write: 0x80012c5b <- 0x86268300 -mem-write: 0x80012c5f <- 0xc62e0300 -mem-write: 0x80012c63 <- 0x812c2300 -mem-write: 0x80012c67 <- 0x7d79304 -mem-write: 0x80012c6b <- 0x19141301 -mem-write: 0x80012c6f <- 0x212e2300 -mem-write: 0x80012c73 <- 0x112e2303 -mem-write: 0x80012c77 <- 0x31262304 -mem-write: 0x80012c7b <- 0x41242305 -mem-write: 0x80012c7f <- 0x51222305 -mem-write: 0x80012c83 <- 0x61202305 -mem-write: 0x80012c87 <- 0x11282305 -mem-write: 0x80012c8b <- 0xe12a2303 -mem-write: 0x80012c8f <- 0x11282302 -mem-write: 0x80012c93 <- 0xe12a2301 -mem-write: 0x80012c97 <- 0xf12e2300 -mem-write: 0x80012c9b <- 0x14541300 -mem-write: 0x80012c9f <- 0xf9591301 -mem-write: 0x80012ca3 <- 0x10f1301 -mem-write: 0x80012ca7 <- 0xc1059301 -mem-write: 0x80012cab <- 0x5a78301 -mem-write: 0x80012caf <- 0xc5a70300 -mem-write: 0x80012cb3 <- 0xc58593ff -mem-write: 0x80012cb7 <- 0x379793ff -mem-write: 0x80012cbb <- 0xd7571300 -mem-write: 0x80012cbf <- 0xe7e7b301 -mem-write: 0x80012cc3 <- 0xf5a22300 -mem-write: 0x80012cc7 <- 0xbf12e300 -mem-write: 0x80012ccb <- 0x12703fe -mem-write: 0x80012ccf <- 0xe179301 -mem-write: 0x80012cd3 <- 0x1e1e9301 -mem-write: 0x80012cd7 <- 0x37171300 -mem-write: 0x80012cdb <- 0x7d79300 -mem-write: 0x80012cdf <- 0x1282301 -mem-write: 0x80012ce3 <- 0xd12c2303 -mem-write: 0x80012ce7 <- 0xc12e2302 -mem-write: 0x80012ceb <- 0x1202303 -mem-write: 0x80012cef <- 0xd1242303 -mem-write: 0x80012cf3 <- 0xe1282302 -mem-write: 0x80012cf7 <- 0xa12a2300 -mem-write: 0x80012cfb <- 0xa1222302 -mem-write: 0x80012cff <- 0xf1262302 -mem-write: 0x80012d03 <- 0x1ede9302 -mem-write: 0x80012d07 <- 0xfe5e1301 -mem-write: 0x80012d0b <- 0x1081301 -mem-write: 0x80012d0f <- 0xc1069302 -mem-write: 0x80012d13 <- 0x6a78302 -mem-write: 0x80012d17 <- 0xc6a60300 -mem-write: 0x80012d1b <- 0xc68693ff -mem-write: 0x80012d1f <- 0x379793ff -mem-write: 0x80012d23 <- 0xd6561300 -mem-write: 0x80012d27 <- 0xc7e7b301 -mem-write: 0x80012d2b <- 0xf6a22300 -mem-write: 0x80012d2f <- 0xd812e300 -mem-write: 0x80012d33 <- 0x12783fe -mem-write: 0x80012d37 <- 0x863702 -mem-write: 0x80012d3b <- 0xf6061300 -mem-write: 0x80012d3f <- 0x379793ff -mem-write: 0x80012d43 <- 0xf1202300 -mem-write: 0x80012d47 <- 0xce906302 -mem-write: 0x80012d4b <- 0x81250302 -mem-write: 0x80012d4f <- 0x41260302 -mem-write: 0x80012d53 <- 0xa6663302 -mem-write: 0x80012d57 <- 0xc1250300 -mem-write: 0x80012d5b <- 0xa6663302 -mem-write: 0x80012d5f <- 0xf6663300 -mem-write: 0x80012d63 <- 0x6146300 -mem-write: 0x80012d67 <- 0x1e4e1300 -mem-write: 0x80012d6b <- 0xd4033300 -mem-write: 0x80012d6f <- 0x2e1ee341 -mem-write: 0x80012d73 <- 0x605a630f -mem-write: 0x80012d77 <- 0x412f0344 -mem-write: 0x80012d7b <- 0x812e0301 -mem-write: 0x80012d7f <- 0xc1288301 -mem-write: 0x80012d83 <- 0xe9c6301 -mem-write: 0x80012d87 <- 0x4125030a -mem-write: 0x80012d8b <- 0x81260302 -mem-write: 0x80012d8f <- 0xc12e8302 -mem-write: 0x80012d93 <- 0xc565b302 -mem-write: 0x80012d97 <- 0xd5e5b300 -mem-write: 0x80012d9b <- 0xf5e5b301 -mem-write: 0x80012d9f <- 0x59e6300 -mem-write: 0x80012da3 <- 0xe1282300 -mem-write: 0x80012da7 <- 0xe12a2302 -mem-write: 0x80012dab <- 0xc12c2303 -mem-write: 0x80012daf <- 0x112e2303 -mem-write: 0x80012db3 <- 0x3041303 -mem-write: 0x80012db7 <- 0x6f00 -mem-write: 0x80012dbb <- 0xf305930a -mem-write: 0x80012dbf <- 0x59a63ff -mem-write: 0x80012dc3 <- 0xf707b304 -mem-write: 0x80012dc7 <- 0xe7b73300 -mem-write: 0x80012dcb <- 0xe505b300 -mem-write: 0x80012dcf <- 0xf1282301 -mem-write: 0x80012dd3 <- 0xe587b302 -mem-write: 0x80012dd7 <- 0xe7b73300 -mem-write: 0x80012ddb <- 0xe5b5b300 -mem-write: 0x80012ddf <- 0xe5e73301 -mem-write: 0x80012de3 <- 0xf12a2300 -mem-write: 0x80012de7 <- 0xc607b302 -mem-write: 0x80012deb <- 0xe786b301 -mem-write: 0x80012def <- 0xe6b73300 -mem-write: 0x80012df3 <- 0xc7b7b300 -mem-write: 0x80012df7 <- 0xe7e7b301 -mem-write: 0x80012dfb <- 0x1e88b300 -mem-write: 0x80012dff <- 0x1787b301 -mem-write: 0x80012e03 <- 0xd12c2301 -mem-write: 0x80012e07 <- 0xf12e2302 -mem-write: 0x80012e0b <- 0x10041302 -mem-write: 0x80012e0f <- 0xc0006f00 -mem-write: 0x80012e13 <- 0x87b732 -mem-write: 0x80012e17 <- 0xf7879300 -mem-write: 0x80012e1b <- 0xf304e3ff -mem-write: 0x80012e1f <- 0x400793f8 -mem-write: 0x80012e23 <- 0xb7d46307 -mem-write: 0x80012e27 <- 0x126231a -mem-write: 0x80012e2b <- 0x1242302 -mem-write: 0x80012e2f <- 0x1222302 -mem-write: 0x80012e33 <- 0x10079302 -mem-write: 0x80012e37 <- 0x80006f00 -mem-write: 0x80012e3b <- 0x87b72a -mem-write: 0x80012e3f <- 0xf7879300 -mem-write: 0x80012e43 <- 0xf41663ff -mem-write: 0x80012e47 <- 0xe1282316 -mem-write: 0x80012e4b <- 0xe12a2302 -mem-write: 0x80012e4f <- 0xc12c2303 -mem-write: 0x80012e53 <- 0x112e2303 -mem-write: 0x80012e57 <- 0x1278303 -mem-write: 0x80012e5b <- 0x77f71303 -mem-write: 0x80012e5f <- 0x7046300 -mem-write: 0x80012e63 <- 0xf7f71304 -mem-write: 0x80012e67 <- 0x40069300 -mem-write: 0x80012e6b <- 0xd70e6300 -mem-write: 0x80012e6f <- 0x41270302 -mem-write: 0x80012e73 <- 0x47879303 -mem-write: 0x80012e77 <- 0xf1282300 -mem-write: 0x80012e7b <- 0x47b79302 -mem-write: 0x80012e7f <- 0xe7873300 -mem-write: 0x80012e83 <- 0xf737b300 -mem-write: 0x80012e87 <- 0xe12a2300 -mem-write: 0x80012e8b <- 0x81270302 -mem-write: 0x80012e8f <- 0xe7873303 -mem-write: 0x80012e93 <- 0xe12c2300 -mem-write: 0x80012e97 <- 0xf7373302 -mem-write: 0x80012e9b <- 0xc1278300 -mem-write: 0x80012e9f <- 0xf7073303 -mem-write: 0x80012ea3 <- 0xe12e2300 -mem-write: 0x80012ea7 <- 0xc1278302 -mem-write: 0x80012eab <- 0xc7971303 -mem-write: 0x80012eaf <- 0x7546300 -mem-write: 0x80012eb3 <- 0x873702 -mem-write: 0x80012eb7 <- 0x14041300 -mem-write: 0x80012ebb <- 0xf7071300 -mem-write: 0x80012ebf <- 0xe41463ff -mem-write: 0x80012ec3 <- 0x106f00 -mem-write: 0x80012ec7 <- 0xf8073727 -mem-write: 0x80012ecb <- 0xf70713ff -mem-write: 0x80012ecf <- 0xe7f7b3ff -mem-write: 0x80012ed3 <- 0xf12e2300 -mem-write: 0x80012ed7 <- 0x1079302 -mem-write: 0x80012edb <- 0xc1061303 -mem-write: 0x80012edf <- 0x7a70303 -mem-write: 0x80012ee3 <- 0x47a68300 -mem-write: 0x80012ee7 <- 0x47879300 -mem-write: 0x80012eeb <- 0x37571300 -mem-write: 0x80012eef <- 0xd6969300 -mem-write: 0x80012ef3 <- 0xd7673301 -mem-write: 0x80012ef7 <- 0xe7ae2300 -mem-write: 0x80012efb <- 0xf612e3fe -mem-write: 0x80012eff <- 0xc12783fe -mem-write: 0x80012f03 <- 0x86b703 -mem-write: 0x80012f07 <- 0x37d71300 -mem-write: 0x80012f0b <- 0xe12e2300 -mem-write: 0x80012f0f <- 0xf6879302 -mem-write: 0x80012f13 <- 0xf41a63ff -mem-write: 0x80012f17 <- 0x41260302 -mem-write: 0x80012f1b <- 0x1278303 -mem-write: 0x80012f1f <- 0xc7e7b303 -mem-write: 0x80012f23 <- 0x81260300 -mem-write: 0x80012f27 <- 0xc7e7b303 -mem-write: 0x80012f2b <- 0xe7e7b300 -mem-write: 0x80012f2f <- 0x78c6300 -mem-write: 0x80012f33 <- 0xd12e2300 -mem-write: 0x80012f37 <- 0x12c2302 -mem-write: 0x80012f3b <- 0x12a2302 -mem-write: 0x80012f3f <- 0x1282302 -mem-write: 0x80012f43 <- 0x91302 -mem-write: 0x80012f47 <- 0xc1278300 -mem-write: 0x80012f4b <- 0x14141303 -mem-write: 0x80012f4f <- 0x14541301 -mem-write: 0x80012f53 <- 0xf1162301 -mem-write: 0x80012f57 <- 0x1278300 -mem-write: 0x80012f5b <- 0xf9191303 -mem-write: 0x80012f5f <- 0x89693300 -mem-write: 0x80012f63 <- 0xf4a02300 -mem-write: 0x80012f67 <- 0x41278300 -mem-write: 0x80012f6b <- 0x21172303 -mem-write: 0x80012f6f <- 0xc1208301 -mem-write: 0x80012f73 <- 0xf4a22305 -mem-write: 0x80012f77 <- 0x81278300 -mem-write: 0x80012f7b <- 0x81240303 -mem-write: 0x80012f7f <- 0x1290305 -mem-write: 0x80012f83 <- 0xf4a42305 -mem-write: 0x80012f87 <- 0xc1278300 -mem-write: 0x80012f8b <- 0xc1298300 -mem-write: 0x80012f8f <- 0x812a0304 -mem-write: 0x80012f93 <- 0xf4a62304 -mem-write: 0x80012f97 <- 0x412a8300 -mem-write: 0x80012f9b <- 0x12b0304 -mem-write: 0x80012f9f <- 0x4851304 -mem-write: 0x80012fa3 <- 0x41248300 -mem-write: 0x80012fa7 <- 0x1011305 -mem-write: 0x80012fab <- 0x806706 -mem-write: 0x80012faf <- 0xc1278300 -mem-write: 0x80012fb3 <- 0x8063702 -mem-write: 0x80012fb7 <- 0xc7e7b300 -mem-write: 0x80012fbb <- 0xf1262300 -mem-write: 0x80012fbf <- 0x40079302 -mem-write: 0x80012fc3 <- 0x67c2e307 -mem-write: 0x80012fc7 <- 0x30593e6 -mem-write: 0x80012fcb <- 0x55de9300 -mem-write: 0x80012fcf <- 0x79340 -mem-write: 0x80012fd3 <- 0x61300 -mem-write: 0x80012fd7 <- 0xd6166300 -mem-write: 0x80012fdb <- 0xf5f59305 -mem-write: 0x80012fdf <- 0x2e931301 -mem-write: 0x80012fe3 <- 0x59c6300 -mem-write: 0x80012fe7 <- 0x30059304 -mem-write: 0x80012feb <- 0x61300 -mem-write: 0x80012fef <- 0xd585b300 -mem-write: 0x80012ff3 <- 0x66853341 -VXDRV: upload 1024 bytes to 0x80012ff7 -mem-write: 0x80012ff7 <- 0x5250300 -mem-write: 0x80012ffb <- 0x16061300 -mem-write: 0x80012fff <- 0x46869300 -mem-write: 0x80013003 <- 0xa6ae2300 -mem-write: 0x80013007 <- 0xc5d6e3fe -mem-write: 0x8001300b <- 0x400613fe -mem-write: 0x8001300f <- 0xd60eb300 -mem-write: 0x80013013 <- 0x10061341 -mem-write: 0x80013017 <- 0xd05c6300 -mem-write: 0x8001301b <- 0xe861307 -mem-write: 0x8001301f <- 0x6f00 -mem-write: 0x80013023 <- 0x26151307 -mem-write: 0x80013027 <- 0xa8053300 -mem-write: 0x8001302b <- 0x5250300 -mem-write: 0x8001302f <- 0x16061300 -mem-write: 0x80013033 <- 0xa7e7b300 -mem-write: 0x80013037 <- 0x1ff06f00 -mem-write: 0x8001303b <- 0x10693fa -mem-write: 0x8001303f <- 0x6686b304 -mem-write: 0x80013043 <- 0x6a68300 -mem-write: 0x80013047 <- 0xf93fe -mem-write: 0x8001304b <- 0xbf8fb302 -mem-write: 0x8001304f <- 0xf696b340 -mem-write: 0x80013053 <- 0x30051301 -mem-write: 0x80013057 <- 0xd7e7b300 -mem-write: 0x8001305b <- 0x68033300 -mem-write: 0x8001305f <- 0x61300 -mem-write: 0x80013063 <- 0xd5053300 -mem-write: 0x80013067 <- 0x43031341 -mem-write: 0x8001306b <- 0xa6466300 -mem-write: 0x8001306f <- 0x1069302 -mem-write: 0x80013073 <- 0x25151304 -mem-write: 0x80013077 <- 0xa6853300 -mem-write: 0x8001307b <- 0xc1268300 -mem-write: 0x8001307f <- 0x40061302 -mem-write: 0x80013083 <- 0xd6063300 -mem-write: 0x80013087 <- 0xb6d5b341 -mem-write: 0x8001308b <- 0xb5202300 -mem-write: 0x8001308f <- 0x400593fe -mem-write: 0x80013093 <- 0xc0006f00 -mem-write: 0x80013097 <- 0xc3268303 -mem-write: 0x8001309b <- 0x32383ff -mem-write: 0x8001309f <- 0x26129300 -mem-write: 0x800130a3 <- 0xb6d6b300 -mem-write: 0x800130a7 <- 0xf393b300 -mem-write: 0x800130ab <- 0x5802b301 -mem-write: 0x800130af <- 0x76e6b300 -mem-write: 0x800130b3 <- 0xd2a02300 -mem-write: 0x800130b7 <- 0x16061300 -mem-write: 0x800130bb <- 0xdff06f00 -mem-write: 0x800130bf <- 0x261693fa -mem-write: 0x800130c3 <- 0xd806b300 -mem-write: 0x800130c7 <- 0x6a02300 -mem-write: 0x800130cb <- 0x16061300 -mem-write: 0x800130cf <- 0xb618e300 -mem-write: 0x800130d3 <- 0x12683fe -mem-write: 0x800130d7 <- 0xf037b302 -mem-write: 0x800130db <- 0xf6e7b300 -mem-write: 0x800130df <- 0xf1202300 -mem-write: 0x800130e3 <- 0x1258302 -mem-write: 0x800130e7 <- 0x41260302 -mem-write: 0x800130eb <- 0xb705b302 -mem-write: 0x800130ef <- 0xe5b73300 -mem-write: 0x800130f3 <- 0xcf063300 -mem-write: 0x800130f7 <- 0xe606b300 -mem-write: 0x800130fb <- 0xb1282300 -mem-write: 0x800130ff <- 0xe635b302 -mem-write: 0x80013103 <- 0x81260301 -mem-write: 0x80013107 <- 0xe6b73302 -mem-write: 0x8001310b <- 0xe5e5b300 -mem-write: 0x8001310f <- 0xd12a2300 -mem-write: 0x80013113 <- 0xce06b302 -mem-write: 0x80013117 <- 0xb687b300 -mem-write: 0x8001311b <- 0xb7b5b300 -mem-write: 0x8001311f <- 0xf12c2300 -mem-write: 0x80013123 <- 0xc1278302 -mem-write: 0x80013127 <- 0xc6b6b302 -mem-write: 0x8001312b <- 0xb6e6b301 -mem-write: 0x8001312f <- 0xf888b300 -mem-write: 0x80013133 <- 0x1686b300 -mem-write: 0x80013137 <- 0xd12e2301 -mem-write: 0x8001313b <- 0xc1278302 -mem-write: 0x8001313f <- 0xc7971303 -mem-write: 0x80013143 <- 0x75ae300 -mem-write: 0x80013147 <- 0xf80737d0 -mem-write: 0x8001314b <- 0xf70713ff -mem-write: 0x8001314f <- 0xe7f7b3ff -mem-write: 0x80013153 <- 0xf12e2300 -mem-write: 0x80013157 <- 0x1278302 -mem-write: 0x8001315b <- 0x14041303 -mem-write: 0x8001315f <- 0xc1059300 -mem-write: 0x80013163 <- 0xf7971303 -mem-write: 0x80013167 <- 0x1079301 -mem-write: 0x8001316b <- 0x7a68303 -mem-write: 0x8001316f <- 0x47a60300 -mem-write: 0x80013173 <- 0x47879300 -mem-write: 0x80013177 <- 0x16d69300 -mem-write: 0x8001317b <- 0xf6161300 -mem-write: 0x8001317f <- 0xc6e6b301 -mem-write: 0x80013183 <- 0xd7ae2300 -mem-write: 0x80013187 <- 0xf592e3fe -mem-write: 0x8001318b <- 0xc12783fe -mem-write: 0x8001318f <- 0x17d79303 -mem-write: 0x80013193 <- 0xf12e2300 -mem-write: 0x80013197 <- 0xe037b302 -mem-write: 0x8001319b <- 0x1270300 -mem-write: 0x8001319f <- 0xf767b303 -mem-write: 0x800131a3 <- 0xf1282300 -mem-write: 0x800131a7 <- 0x87b702 -mem-write: 0x800131ab <- 0xf7879300 -mem-write: 0x800131af <- 0xf414e3ff -mem-write: 0x800131b3 <- 0x12e23ca -mem-write: 0x800131b7 <- 0x12c2302 -mem-write: 0x800131bb <- 0x12a2302 -mem-write: 0x800131bf <- 0x1282302 -mem-write: 0x800131c3 <- 0x5ff06f02 -mem-write: 0x800131c7 <- 0x412683c9 -mem-write: 0x800131cb <- 0x81260302 -mem-write: 0x800131cf <- 0xc1250302 -mem-write: 0x800131d3 <- 0x3046302 -mem-write: 0x800131d7 <- 0x8e8e3328 -mem-write: 0x800131db <- 0x41a6340 -mem-write: 0x800131df <- 0x4128830a -mem-write: 0x800131e3 <- 0x81280301 -mem-write: 0x800131e7 <- 0xc12f8301 -mem-write: 0x800131eb <- 0x8e33301 -mem-write: 0x800131ef <- 0xf3633301 -mem-write: 0x800131f3 <- 0xe3633301 -mem-write: 0x800131f7 <- 0x31e6300 -mem-write: 0x800131fb <- 0xf1282300 -mem-write: 0x800131ff <- 0xd12a2302 -mem-write: 0x80013203 <- 0xc12c2302 -mem-write: 0x80013207 <- 0xa12e2302 -mem-write: 0x8001320b <- 0xe041302 -mem-write: 0x8001320f <- 0x9ff06f00 -mem-write: 0x80013213 <- 0xfe0313c4 -mem-write: 0x80013217 <- 0x31863ff -mem-write: 0x8001321b <- 0xf7073304 -mem-write: 0x8001321f <- 0xf737b300 -mem-write: 0x80013223 <- 0xd885b300 -mem-write: 0x80013227 <- 0xe1282300 -mem-write: 0x8001322b <- 0xf5873302 -mem-write: 0x8001322f <- 0xf737b300 -mem-write: 0x80013233 <- 0xd5b6b300 -mem-write: 0x80013237 <- 0xf6e6b300 -mem-write: 0x8001323b <- 0xe12a2300 -mem-write: 0x8001323f <- 0xc8073302 -mem-write: 0x80013243 <- 0xd707b300 -mem-write: 0x80013247 <- 0xd7b6b300 -mem-write: 0x8001324b <- 0xc7373300 -mem-write: 0x8001324f <- 0xd7673300 -mem-write: 0x80013253 <- 0xaf853300 -mem-write: 0x80013257 <- 0xa7053300 -mem-write: 0x8001325b <- 0xf12c2300 -mem-write: 0x8001325f <- 0xa12e2302 -mem-write: 0x80013263 <- 0x9ff06f02 -mem-write: 0x80013267 <- 0x8737ba -mem-write: 0x8001326b <- 0xf7071300 -mem-write: 0x8001326f <- 0xee06e3ff -mem-write: 0x80013273 <- 0x400713f8 -mem-write: 0x80013277 <- 0x675c6307 -mem-write: 0x8001327b <- 0x12e2304 -mem-write: 0x8001327f <- 0x12c2300 -mem-write: 0x80013283 <- 0x12a2300 -mem-write: 0x80013287 <- 0x10071300 -mem-write: 0x8001328b <- 0xc0006f00 -mem-write: 0x8001328f <- 0x873716 -mem-write: 0x80013293 <- 0xf7071300 -mem-write: 0x80013297 <- 0xee9e63ff -mem-write: 0x8001329b <- 0xf1282300 -mem-write: 0x8001329f <- 0xd12a2302 -mem-write: 0x800132a3 <- 0xc12c2302 -mem-write: 0x800132a7 <- 0xa12e2302 -mem-write: 0x800132ab <- 0xe841302 -mem-write: 0x800132af <- 0x9ff06f00 -mem-write: 0x800132b3 <- 0xc12703ba -mem-write: 0x800132b7 <- 0x8083701 -mem-write: 0x800132bb <- 0x7673300 -mem-write: 0x800132bf <- 0xe12e2301 -mem-write: 0x800132c3 <- 0x40071300 -mem-write: 0x800132c7 <- 0xc74ae307 -mem-write: 0x800132cb <- 0xe0313fb -mem-write: 0x800132cf <- 0x71300 -mem-write: 0x800132d3 <- 0xe34e3302 -mem-write: 0x800132d7 <- 0xf9302 -mem-write: 0x800132db <- 0x71300 -mem-write: 0x800132df <- 0xc74a6300 -mem-write: 0x800132e3 <- 0xe089305 -mem-write: 0x800132e7 <- 0xe546300 -mem-write: 0x800132eb <- 0x89300 -mem-write: 0x800132ef <- 0xf3771300 -mem-write: 0x800132f3 <- 0x2e181301 -mem-write: 0x800132f7 <- 0x71a6300 -mem-write: 0x800132fb <- 0x30089304 -mem-write: 0x800132ff <- 0xc888b300 -mem-write: 0x80013303 <- 0x5833341 -mem-write: 0x80013307 <- 0x3230301 -mem-write: 0x8001330b <- 0x17071300 -mem-write: 0x8001330f <- 0x45859300 -mem-write: 0x80013313 <- 0x65ae2300 -mem-write: 0x80013317 <- 0xe8d6e3fe -mem-write: 0x8001331b <- 0x400713fe -mem-write: 0x8001331f <- 0xc70e3300 -mem-write: 0x80013323 <- 0x10071341 -mem-write: 0x80013327 <- 0xc0506300 -mem-write: 0x8001332b <- 0xe071309 -mem-write: 0x8001332f <- 0x80006f00 -mem-write: 0x80013333 <- 0x27181307 -mem-write: 0x80013337 <- 0xf083300 -mem-write: 0x8001333b <- 0x8280301 -mem-write: 0x8001333f <- 0x17071300 -mem-write: 0x80013343 <- 0xfefb300 -mem-write: 0x80013347 <- 0x9ff06f01 -mem-write: 0x8001334b <- 0x713f9 -mem-write: 0x8001334f <- 0xe3633302 -mem-write: 0x80013353 <- 0x1059302 -mem-write: 0x80013357 <- 0x28989304 -mem-write: 0x8001335b <- 0x1588b300 -mem-write: 0x8001335f <- 0x8a58301 -mem-write: 0x80013363 <- 0xf0833fd -mem-write: 0x80013367 <- 0x29301 -mem-write: 0x8001336b <- 0x67073300 -mem-write: 0x8001336f <- 0xe595b340 -mem-write: 0x80013373 <- 0xbfefb300 -mem-write: 0x80013377 <- 0x30059300 -mem-write: 0x8001337b <- 0xc585b300 -mem-write: 0x8001337f <- 0x48081341 -mem-write: 0x80013383 <- 0xb2c66300 -mem-write: 0x80013387 <- 0x1081302 -mem-write: 0x8001338b <- 0x25959304 -mem-write: 0x8001338f <- 0xb805b300 -mem-write: 0x80013393 <- 0xc1280300 -mem-write: 0x80013397 <- 0x40071301 -mem-write: 0x8001339b <- 0xc7073300 -mem-write: 0x8001339f <- 0x68533341 -mem-write: 0x800133a3 <- 0x65a82300 -mem-write: 0x800133a7 <- 0x300813fc -mem-write: 0x800133ab <- 0xc0006f00 -mem-write: 0x800133af <- 0xc8288303 -mem-write: 0x800133b3 <- 0x82403ff -mem-write: 0x800133b7 <- 0x22939300 -mem-write: 0x800133bb <- 0x68d8b300 -mem-write: 0x800133bf <- 0xe4143300 -mem-write: 0x800133c3 <- 0x7f03b300 -mem-write: 0x800133c7 <- 0x88e8b300 -mem-write: 0x800133cb <- 0x13a02300 -mem-write: 0x800133cf <- 0x12829301 -mem-write: 0x800133d3 <- 0xdff06f00 -mem-write: 0x800133d7 <- 0x271593fa -mem-write: 0x800133db <- 0xbf05b300 -mem-write: 0x800133df <- 0x5a02300 -mem-write: 0x800133e3 <- 0x17071300 -mem-write: 0x800133e7 <- 0xe858e300 -mem-write: 0x800133eb <- 0x12583fe -mem-write: 0x800133ef <- 0xf0373301 -mem-write: 0x800133f3 <- 0xe5e73301 -VXDRV: upload 1024 bytes to 0x800133f7 -mem-write: 0x800133f7 <- 0xe1282300 -mem-write: 0x800133fb <- 0x1270300 -mem-write: 0x800133ff <- 0x41258301 -mem-write: 0x80013403 <- 0xe841301 -mem-write: 0x80013407 <- 0xe7873300 -mem-write: 0x8001340b <- 0xf737b300 -mem-write: 0x8001340f <- 0xb685b300 -mem-write: 0x80013413 <- 0xe1282300 -mem-write: 0x80013417 <- 0xf5873302 -mem-write: 0x8001341b <- 0xf737b300 -mem-write: 0x8001341f <- 0xe12a2300 -mem-write: 0x80013423 <- 0x81270302 -mem-write: 0x80013427 <- 0xd5b6b301 -mem-write: 0x8001342b <- 0xf6e6b300 -mem-write: 0x8001342f <- 0xe6073300 -mem-write: 0x80013433 <- 0xd707b300 -mem-write: 0x80013437 <- 0xc7373300 -mem-write: 0x8001343b <- 0xc1260300 -mem-write: 0x8001343f <- 0xd7b6b301 -mem-write: 0x80013443 <- 0xd7673300 -mem-write: 0x80013447 <- 0xc5053300 -mem-write: 0x8001344b <- 0xa7053300 -mem-write: 0x8001344f <- 0xf12c2300 -mem-write: 0x80013453 <- 0xa12e2302 -mem-write: 0x80013457 <- 0x5ff06f02 -mem-write: 0x8001345b <- 0x8fb7ce -mem-write: 0x8001345f <- 0x14059300 -mem-write: 0x80013463 <- 0xef881300 -mem-write: 0x80013467 <- 0x5f833ff -mem-write: 0x8001346b <- 0x412f0301 -mem-write: 0x8001346f <- 0x812e8301 -mem-write: 0x80013473 <- 0xc12e0301 -mem-write: 0x80013477 <- 0x1089301 -mem-write: 0x8001347b <- 0xc1031303 -mem-write: 0x8001347f <- 0x8166303 -mem-write: 0x80013483 <- 0xdf683314 -mem-write: 0x80013487 <- 0xc8683301 -mem-write: 0x8001348b <- 0xe8683301 -mem-write: 0x8001348f <- 0x4166300 -mem-write: 0x80013493 <- 0x81c630a -mem-write: 0x80013497 <- 0xf1282300 -mem-write: 0x8001349b <- 0xd12a2302 -mem-write: 0x8001349f <- 0xc12c2302 -mem-write: 0x800134a3 <- 0xa12e2302 -mem-write: 0x800134a7 <- 0x1ff06f02 -mem-write: 0x800134ab <- 0xc6e5b39b -mem-write: 0x800134af <- 0xa5e5b300 -mem-write: 0x800134b3 <- 0xf5e5b300 -mem-write: 0x800134b7 <- 0x59c6300 -mem-write: 0x800134bb <- 0xe1282300 -mem-write: 0x800134bf <- 0xe12a2302 -mem-write: 0x800134c3 <- 0xd12c2303 -mem-write: 0x800134c7 <- 0xc12e2303 -mem-write: 0x800134cb <- 0xdff06f03 -mem-write: 0x800134cf <- 0xf707b398 -mem-write: 0x800134d3 <- 0xe7b73300 -mem-write: 0x800134d7 <- 0xdf05b300 -mem-write: 0x800134db <- 0xf1282300 -mem-write: 0x800134df <- 0xe587b302 -mem-write: 0x800134e3 <- 0xe5b6b300 -mem-write: 0x800134e7 <- 0xe7b73301 -mem-write: 0x800134eb <- 0xe6e73300 -mem-write: 0x800134ef <- 0xce863300 -mem-write: 0x800134f3 <- 0xe606b300 -mem-write: 0x800134f7 <- 0xe6b73300 -mem-write: 0x800134fb <- 0xd6363300 -mem-write: 0x800134ff <- 0xe6663301 -mem-write: 0x80013503 <- 0xae053300 -mem-write: 0x80013507 <- 0xa6063300 -mem-write: 0x8001350b <- 0xf12a2300 -mem-write: 0x8001350f <- 0xd12c2302 -mem-write: 0x80013513 <- 0xc6179302 -mem-write: 0x80013517 <- 0x7c66300 -mem-write: 0x8001351b <- 0xc12e2300 -mem-write: 0x8001351f <- 0x9ff06f02 -mem-write: 0x80013523 <- 0xf807b793 -mem-write: 0x80013527 <- 0xf78793ff -mem-write: 0x8001352b <- 0xf67633ff -mem-write: 0x8001352f <- 0xc12e2300 -mem-write: 0x80013533 <- 0x10041302 -mem-write: 0x80013537 <- 0x1ff06f00 -mem-write: 0x8001353b <- 0x81e6392 -mem-write: 0x8001353f <- 0xf1282300 -mem-write: 0x80013543 <- 0xd12a2302 -mem-write: 0x80013547 <- 0xc12c2302 -mem-write: 0x8001354b <- 0xa12e2302 -mem-write: 0x8001354f <- 0xff841302 -mem-write: 0x80013553 <- 0x5ff06fff -mem-write: 0x80013557 <- 0xc6e6b390 -mem-write: 0x8001355b <- 0xa6e53300 -mem-write: 0x8001355f <- 0xf567b300 -mem-write: 0x80013563 <- 0x79c6300 -mem-write: 0x80013567 <- 0xe1282300 -mem-write: 0x8001356b <- 0xe12a2302 -mem-write: 0x8001356f <- 0xd12c2303 -mem-write: 0x80013573 <- 0xc12e2303 -mem-write: 0x80013577 <- 0x9ff06f03 -mem-write: 0x8001357b <- 0xf12e23fd -mem-write: 0x8001357f <- 0x12c2303 -mem-write: 0x80013583 <- 0x12a2302 -mem-write: 0x80013587 <- 0x1282302 -mem-write: 0x8001358b <- 0x3071302 -mem-write: 0x8001358f <- 0x7278300 -mem-write: 0x80013593 <- 0xc7268300 -mem-write: 0x80013597 <- 0xc70713ff -mem-write: 0x8001359b <- 0x379793ff -mem-write: 0x8001359f <- 0xd6d69300 -mem-write: 0x800135a3 <- 0xd7e7b301 -mem-write: 0x800135a7 <- 0xf7222300 -mem-write: 0x800135ab <- 0xe892e300 -mem-write: 0x800135af <- 0x12783fe -mem-write: 0x800135b3 <- 0x843703 -mem-write: 0x800135b7 <- 0x91300 -mem-write: 0x800135bb <- 0x37979300 -mem-write: 0x800135bf <- 0xf1282300 -mem-write: 0x800135c3 <- 0xf4041302 -mem-write: 0x800135c7 <- 0x1ff06fff -mem-write: 0x800135cb <- 0xf707b389 -mem-write: 0x800135cf <- 0xe7b73300 -mem-write: 0x800135d3 <- 0xdf06b300 -mem-write: 0x800135d7 <- 0xf1282300 -mem-write: 0x800135db <- 0xe687b302 -mem-write: 0x800135df <- 0xe7b73300 -mem-write: 0x800135e3 <- 0xe6b6b300 -mem-write: 0x800135e7 <- 0xe6e73301 -mem-write: 0x800135eb <- 0xce86b300 -mem-write: 0x800135ef <- 0xf12a2300 -mem-write: 0x800135f3 <- 0xe687b302 -mem-write: 0x800135f7 <- 0xd6b63300 -mem-write: 0x800135fb <- 0xe7b6b301 -mem-write: 0x800135ff <- 0xd666b300 -mem-write: 0x80013603 <- 0xae053300 -mem-write: 0x80013607 <- 0xa6853300 -mem-write: 0x8001360b <- 0xf12c2300 -mem-write: 0x8001360f <- 0xa12e2302 -mem-write: 0x80013613 <- 0x8879302 -mem-write: 0x80013617 <- 0x7a70300 -mem-write: 0x8001361b <- 0x47a68300 -mem-write: 0x8001361f <- 0x47879300 -mem-write: 0x80013623 <- 0x17571300 -mem-write: 0x80013627 <- 0xf6969300 -mem-write: 0x8001362b <- 0xd7673301 -mem-write: 0x8001362f <- 0xe7ae2300 -mem-write: 0x80013633 <- 0xf312e3fe -mem-write: 0x80013637 <- 0x87b7fe -mem-write: 0x8001363b <- 0xf7879300 -mem-write: 0x8001363f <- 0xf58c63ff -mem-write: 0x80013643 <- 0xc1278300 -mem-write: 0x80013647 <- 0x17d79303 -mem-write: 0x8001364b <- 0xf12e2300 -mem-write: 0x8001364f <- 0x5841302 -mem-write: 0x80013653 <- 0x5ff06f00 -mem-write: 0x80013657 <- 0x12e2380 -mem-write: 0x8001365b <- 0x12c2302 -mem-write: 0x8001365f <- 0x12a2302 -mem-write: 0x80013663 <- 0x1282302 -mem-write: 0x80013667 <- 0x9ff06f02 -mem-write: 0x8001366b <- 0x605e63fe -mem-write: 0x8001366f <- 0x4128832a -mem-write: 0x80013673 <- 0x812e0301 -mem-write: 0x80013677 <- 0xc12f0301 -mem-write: 0x8001367b <- 0xe946301 -mem-write: 0x8001367f <- 0x412e830c -mem-write: 0x80013683 <- 0x81250302 -mem-write: 0x80013687 <- 0xc1258302 -mem-write: 0x8001368b <- 0xaee63302 -mem-write: 0x8001368f <- 0xb6663300 -mem-write: 0x80013693 <- 0xf6663300 -mem-write: 0x80013697 <- 0x61c6300 -mem-write: 0x8001369b <- 0xe1282300 -mem-write: 0x8001369f <- 0x112a2302 -mem-write: 0x800136a3 <- 0xc12c2303 -mem-write: 0x800136a7 <- 0xe12e2303 -mem-write: 0x800136ab <- 0x8ff06f03 -mem-write: 0x800136af <- 0xf30613f0 -mem-write: 0x800136b3 <- 0x61463ff -mem-write: 0x800136b7 <- 0xf707b306 -mem-write: 0x800136bb <- 0xd886b340 -mem-write: 0x800136bf <- 0xf7383341 -mem-write: 0x800136c3 <- 0xd8b33300 -mem-write: 0x800136c7 <- 0x6883300 -mem-write: 0x800136cb <- 0x69341 -mem-write: 0x800136cf <- 0xf7766300 -mem-write: 0x800136d3 <- 0x1e88b300 -mem-write: 0x800136d7 <- 0x18b69341 -mem-write: 0x800136db <- 0x66e8b300 -mem-write: 0x800136df <- 0xae073300 -mem-write: 0x800136e3 <- 0xee36b340 -mem-write: 0x800136e7 <- 0x17073300 -mem-write: 0x800136eb <- 0x8866341 -mem-write: 0x800136ef <- 0xc50e3300 -mem-write: 0x800136f3 <- 0x1e361341 -mem-write: 0x800136f7 <- 0xbf05b300 -mem-write: 0x800136fb <- 0xd6663340 -mem-write: 0x800136ff <- 0xc585b300 -mem-write: 0x80013703 <- 0xb12e2340 -mem-write: 0x80013707 <- 0xe12c2302 -mem-write: 0x8001370b <- 0x12a2302 -mem-write: 0x8001370f <- 0xf1282303 -mem-write: 0x80013713 <- 0x10041302 -mem-write: 0x80013717 <- 0x6f00 -mem-write: 0x8001371b <- 0x87b71f -mem-write: 0x8001371f <- 0xf7879300 -mem-write: 0x80013723 <- 0xf30ce3ff -mem-write: 0x80013727 <- 0x400793f6 -mem-write: 0x8001372b <- 0xc7da6307 -mem-write: 0x8001372f <- 0x1262304 -mem-write: 0x80013733 <- 0x1242302 -mem-write: 0x80013737 <- 0x1222302 -mem-write: 0x8001373b <- 0x10079302 -mem-write: 0x8001373f <- 0x40006f00 -mem-write: 0x80013743 <- 0x87b715 -mem-write: 0x80013747 <- 0xf7879300 -mem-write: 0x8001374b <- 0xf41c63ff -mem-write: 0x8001374f <- 0xe1282300 -mem-write: 0x80013753 <- 0x112a2302 -mem-write: 0x80013757 <- 0xc12c2303 -mem-write: 0x8001375b <- 0xe12e2303 -mem-write: 0x8001375f <- 0x8ff06f03 -mem-write: 0x80013763 <- 0xc12783ef -mem-write: 0x80013767 <- 0x8063702 -mem-write: 0x8001376b <- 0xc7e7b300 -mem-write: 0x8001376f <- 0xf1262300 -mem-write: 0x80013773 <- 0x40079302 -mem-write: 0x80013777 <- 0x67cce307 -mem-write: 0x8001377b <- 0x30613fa -mem-write: 0x8001377f <- 0x56551300 -mem-write: 0x80013783 <- 0x31340 -mem-write: 0x80013787 <- 0x79300 -mem-write: 0x8001378b <- 0xa7966300 -mem-write: 0x8001378f <- 0xf6759304 -mem-write: 0x80013793 <- 0x25161301 -mem-write: 0x80013797 <- 0x59c6300 -mem-write: 0x8001379b <- 0x30059304 -mem-write: 0x8001379f <- 0x79300 -mem-write: 0x800137a3 <- 0xa585b300 -mem-write: 0x800137a7 <- 0xc68eb340 -mem-write: 0x800137ab <- 0xeae8300 -mem-write: 0x800137af <- 0x17879300 -mem-write: 0x800137b3 <- 0x46869300 -mem-write: 0x800137b7 <- 0xd6ae2300 -mem-write: 0x800137bb <- 0xf5d6e3ff -mem-write: 0x800137bf <- 0x400793fe -mem-write: 0x800137c3 <- 0xa7853300 -mem-write: 0x800137c7 <- 0x10079340 -mem-write: 0x800137cb <- 0xa05c6300 -mem-write: 0x800137cf <- 0x5079306 -mem-write: 0x800137d3 <- 0x6f00 -mem-write: 0x800137d7 <- 0x27959307 -mem-write: 0x800137db <- 0xb805b300 -mem-write: 0x800137df <- 0x5a58300 -mem-write: 0x800137e3 <- 0x17879300 -mem-write: 0x800137e7 <- 0xb3633300 -mem-write: 0x800137eb <- 0x1ff06f00 -mem-write: 0x800137ef <- 0x10793fa -mem-write: 0x800137f3 <- 0xc787b304 -VXDRV: upload 1024 bytes to 0x800137f7 -mem-write: 0x800137f7 <- 0x7a78300 -mem-write: 0x800137fb <- 0xf93fe -mem-write: 0x800137ff <- 0xbf8fb302 -mem-write: 0x80013803 <- 0xf797b340 -mem-write: 0x80013807 <- 0x30069301 -mem-write: 0x8001380b <- 0xf3633300 -mem-write: 0x8001380f <- 0xc8063300 -mem-write: 0x80013813 <- 0xe9300 -mem-write: 0x80013817 <- 0xa686b300 -mem-write: 0x8001381b <- 0x46061340 -mem-write: 0x8001381f <- 0xdec66300 -mem-write: 0x80013823 <- 0x1061302 -mem-write: 0x80013827 <- 0x26969304 -mem-write: 0x8001382b <- 0xd606b300 -mem-write: 0x8001382f <- 0xc1260300 -mem-write: 0x80013833 <- 0x40079302 -mem-write: 0x80013837 <- 0xa787b300 -mem-write: 0x8001383b <- 0xb6563340 -mem-write: 0x8001383f <- 0xc6a02300 -mem-write: 0x80013843 <- 0x400613fe -mem-write: 0x80013847 <- 0xc0006f00 -mem-write: 0x8001384b <- 0xc6278303 -mem-write: 0x8001384f <- 0x62383ff -mem-write: 0x80013853 <- 0x2e929300 -mem-write: 0x80013857 <- 0xb7d7b300 -mem-write: 0x8001385b <- 0xf393b300 -mem-write: 0x8001385f <- 0x5802b301 -mem-write: 0x80013863 <- 0x77e7b300 -mem-write: 0x80013867 <- 0xf2a02300 -mem-write: 0x8001386b <- 0x1e8e9300 -mem-write: 0x8001386f <- 0xdff06f00 -mem-write: 0x80013873 <- 0x279693fa -mem-write: 0x80013877 <- 0xd806b300 -mem-write: 0x8001387b <- 0x6a02300 -mem-write: 0x8001387f <- 0x17879300 -mem-write: 0x80013883 <- 0xc798e300 -mem-write: 0x80013887 <- 0x12683fe -mem-write: 0x8001388b <- 0x6037b302 -mem-write: 0x8001388f <- 0xf6e7b300 -mem-write: 0x80013893 <- 0xf1202300 -mem-write: 0x80013897 <- 0x1278302 -mem-write: 0x8001389b <- 0x41258302 -mem-write: 0x8001389f <- 0xf707b302 -mem-write: 0x800138a3 <- 0xb8863340 -mem-write: 0x800138a7 <- 0xf736b340 -mem-write: 0x800138ab <- 0xc8b53300 -mem-write: 0x800138af <- 0xd6063300 -mem-write: 0x800138b3 <- 0x69340 -mem-write: 0x800138b7 <- 0xf7766300 -mem-write: 0x800138bb <- 0x1588b300 -mem-write: 0x800138bf <- 0x18b69341 -mem-write: 0x800138c3 <- 0xa6e8b300 -mem-write: 0x800138c7 <- 0x81250300 -mem-write: 0x800138cb <- 0x69302 -mem-write: 0x800138cf <- 0xae073300 -mem-write: 0x800138d3 <- 0xee383340 -mem-write: 0x800138d7 <- 0x17073300 -mem-write: 0x800138db <- 0x8866341 -mem-write: 0x800138df <- 0xc50e3300 -mem-write: 0x800138e3 <- 0x1e369341 -mem-write: 0x800138e7 <- 0xc1258300 -mem-write: 0x800138eb <- 0x6e6b302 -mem-write: 0x800138ef <- 0xe12c2301 -mem-write: 0x800138f3 <- 0xbf05b302 -mem-write: 0x800138f7 <- 0xd585b340 -mem-write: 0x800138fb <- 0xb12e2340 -mem-write: 0x800138ff <- 0xc12a2302 -mem-write: 0x80013903 <- 0xf1282302 -mem-write: 0x80013907 <- 0xc1278302 -mem-write: 0x8001390b <- 0xc7971303 -mem-write: 0x8001390f <- 0x7546300 -mem-write: 0x80013913 <- 0x80737d4 -mem-write: 0x80013917 <- 0xf7071300 -mem-write: 0x8001391b <- 0xe7f7b3ff -mem-write: 0x8001391f <- 0xf12e2300 -mem-write: 0x80013923 <- 0x6f02 -mem-write: 0x80013927 <- 0x41280358 -mem-write: 0x8001392b <- 0x81288302 -mem-write: 0x8001392f <- 0xc1268302 -mem-write: 0x80013933 <- 0x3026302 -mem-write: 0x80013937 <- 0x8e83332c -mem-write: 0x8001393b <- 0x4126340 -mem-write: 0x8001393f <- 0x4122830c -mem-write: 0x80013943 <- 0x812f8301 -mem-write: 0x80013947 <- 0xc1250301 -mem-write: 0x8001394b <- 0xf2e63301 -mem-write: 0x8001394f <- 0xa6663301 -mem-write: 0x80013953 <- 0xe6663300 -mem-write: 0x80013957 <- 0x6106300 -mem-write: 0x8001395b <- 0xf1282302 -mem-write: 0x8001395f <- 0x12a2302 -mem-write: 0x80013963 <- 0x112c2303 -mem-write: 0x80013967 <- 0xd12e2303 -mem-write: 0x8001396b <- 0x3041302 -mem-write: 0x8001396f <- 0xe091300 -mem-write: 0x80013973 <- 0x4ff06f00 -mem-write: 0x80013977 <- 0xf30613ce -mem-write: 0x8001397b <- 0x61463ff -mem-write: 0x8001397f <- 0xe7873306 -mem-write: 0x80013983 <- 0x5805b340 -mem-write: 0x80013987 <- 0xe7b33340 -mem-write: 0x8001398b <- 0xb83eb300 -mem-write: 0x8001398f <- 0x65833300 -mem-write: 0x80013993 <- 0x59340 -mem-write: 0x80013997 <- 0xe7f66300 -mem-write: 0x8001399b <- 0x2883300 -mem-write: 0x8001399f <- 0x18359341 -mem-write: 0x800139a3 <- 0xd5e83300 -mem-write: 0x800139a7 <- 0xf885b301 -mem-write: 0x800139ab <- 0xb8b7b341 -mem-write: 0x800139af <- 0x585b300 -mem-write: 0x800139b3 <- 0x8066341 -mem-write: 0x800139b7 <- 0x1f88b300 -mem-write: 0x800139bb <- 0x18b61341 -mem-write: 0x800139bf <- 0xa6853300 -mem-write: 0x800139c3 <- 0xf6663340 -mem-write: 0x800139c7 <- 0xc5053300 -mem-write: 0x800139cb <- 0xa12e2340 -mem-write: 0x800139cf <- 0xb12c2302 -mem-write: 0x800139d3 <- 0x612a2302 -mem-write: 0x800139d7 <- 0xe1282302 -mem-write: 0x800139db <- 0xe091302 -mem-write: 0x800139df <- 0x5ff06f00 -mem-write: 0x800139e3 <- 0x8737d3 -mem-write: 0x800139e7 <- 0xf7071300 -mem-write: 0x800139eb <- 0xe308e3ff -mem-write: 0x800139ef <- 0x400713f6 -mem-write: 0x800139f3 <- 0xc7486307 -mem-write: 0x800139f7 <- 0x603131e -mem-write: 0x800139fb <- 0x6f00 -mem-write: 0x800139ff <- 0x873704 -mem-write: 0x80013a03 <- 0xf7071300 -mem-write: 0x80013a07 <- 0xee9e63ff -mem-write: 0x80013a0b <- 0xf1282300 -mem-write: 0x80013a0f <- 0x12a2302 -mem-write: 0x80013a13 <- 0x112c2303 -mem-write: 0x80013a17 <- 0xd12e2303 -mem-write: 0x80013a1b <- 0xe841302 -mem-write: 0x80013a1f <- 0x1ff06f00 -mem-write: 0x80013a23 <- 0xc12703f5 -mem-write: 0x80013a27 <- 0x8063701 -mem-write: 0x80013a2b <- 0xc7673300 -mem-write: 0x80013a2f <- 0xe12e2300 -mem-write: 0x80013a33 <- 0x40071300 -mem-write: 0x80013a37 <- 0x67466307 -mem-write: 0x80013a3b <- 0x7131a -mem-write: 0x80013a3f <- 0xe34fb302 -mem-write: 0x80013a43 <- 0x29302 -mem-write: 0x80013a47 <- 0x71300 -mem-write: 0x80013a4b <- 0xf74a6300 -mem-write: 0x80013a4f <- 0xf851305 -mem-write: 0x80013a53 <- 0xfd46300 -mem-write: 0x80013a57 <- 0x51300 -mem-write: 0x80013a5b <- 0xf3771300 -mem-write: 0x80013a5f <- 0x2f961301 -mem-write: 0x80013a63 <- 0x71a6300 -mem-write: 0x80013a67 <- 0x30051304 -mem-write: 0x80013a6b <- 0xf5053300 -mem-write: 0x80013a6f <- 0xc5833341 -mem-write: 0x80013a73 <- 0x3230300 -mem-write: 0x80013a77 <- 0x17071300 -mem-write: 0x80013a7b <- 0x45859300 -mem-write: 0x80013a7f <- 0x65ae2300 -mem-write: 0x80013a83 <- 0xe556e3fe -mem-write: 0x80013a87 <- 0x400713fe -mem-write: 0x80013a8b <- 0xf70fb300 -mem-write: 0x80013a8f <- 0x10071341 -mem-write: 0x80013a93 <- 0xf0506300 -mem-write: 0x80013a97 <- 0xf871309 -mem-write: 0x80013a9b <- 0x80006f00 -mem-write: 0x80013a9f <- 0x27161307 -mem-write: 0x80013aa3 <- 0xcf063300 -mem-write: 0x80013aa7 <- 0x6260300 -mem-write: 0x80013aab <- 0x17071300 -mem-write: 0x80013aaf <- 0xc2e2b300 -mem-write: 0x80013ab3 <- 0x9ff06f00 -mem-write: 0x80013ab7 <- 0x713f9 -mem-write: 0x80013abb <- 0xe3633302 -mem-write: 0x80013abf <- 0x1059302 -mem-write: 0x80013ac3 <- 0x25151304 -mem-write: 0x80013ac7 <- 0xa5853300 -mem-write: 0x80013acb <- 0x5258300 -mem-write: 0x80013acf <- 0x393fd -mem-write: 0x80013ad3 <- 0x67073300 -mem-write: 0x80013ad7 <- 0xe595b340 -mem-write: 0x80013adb <- 0xb2e2b300 -mem-write: 0x80013adf <- 0xcf05b300 -mem-write: 0x80013ae3 <- 0x30061300 -mem-write: 0x80013ae7 <- 0xf6063300 -mem-write: 0x80013aeb <- 0x45859341 -mem-write: 0x80013aef <- 0xc3c66300 -mem-write: 0x80013af3 <- 0x1059302 -mem-write: 0x80013af7 <- 0x26161304 -mem-write: 0x80013afb <- 0xc5863300 -mem-write: 0x80013aff <- 0xc1258300 -mem-write: 0x80013b03 <- 0x40071301 -mem-write: 0x80013b07 <- 0xf7073300 -mem-write: 0x80013b0b <- 0x65d33341 -mem-write: 0x80013b0f <- 0x66282300 -mem-write: 0x80013b13 <- 0x300593fc -mem-write: 0x80013b17 <- 0xc0006f00 -mem-write: 0x80013b1b <- 0xc5a50303 -mem-write: 0x80013b1f <- 0x5a903ff -mem-write: 0x80013b23 <- 0x23941300 -mem-write: 0x80013b27 <- 0x65553300 -mem-write: 0x80013b2b <- 0xe9193300 -mem-write: 0x80013b2f <- 0x8f043300 -mem-write: 0x80013b33 <- 0x25653300 -mem-write: 0x80013b37 <- 0xa4202301 -mem-write: 0x80013b3b <- 0x13839300 -mem-write: 0x80013b3f <- 0xdff06f00 -mem-write: 0x80013b43 <- 0x271613fa -mem-write: 0x80013b47 <- 0xcf063300 -mem-write: 0x80013b4b <- 0x6202300 -mem-write: 0x80013b4f <- 0x17071300 -mem-write: 0x80013b53 <- 0xe5d8e300 -mem-write: 0x80013b57 <- 0x12603fe -mem-write: 0x80013b5b <- 0x50373301 -mem-write: 0x80013b5f <- 0xe6673300 -mem-write: 0x80013b63 <- 0xe1282300 -mem-write: 0x80013b67 <- 0x1270300 -mem-write: 0x80013b6b <- 0x41250301 -mem-write: 0x80013b6f <- 0xe7873301 -mem-write: 0x80013b73 <- 0xa805b340 -mem-write: 0x80013b77 <- 0xe7b63340 -mem-write: 0x80013b7b <- 0xb8333300 -mem-write: 0x80013b7f <- 0xc585b300 -mem-write: 0x80013b83 <- 0x61340 -mem-write: 0x80013b87 <- 0xe7f66300 -mem-write: 0x80013b8b <- 0x5083300 -mem-write: 0x80013b8f <- 0x18361341 -mem-write: 0x80013b93 <- 0x81250300 -mem-write: 0x80013b97 <- 0x66683301 -mem-write: 0x80013b9b <- 0x61300 -mem-write: 0x80013b9f <- 0xa887b300 -mem-write: 0x80013ba3 <- 0xf8b33340 -mem-write: 0x80013ba7 <- 0x787b300 -mem-write: 0x80013bab <- 0x8066341 -mem-write: 0x80013baf <- 0x1508b300 -mem-write: 0x80013bb3 <- 0x18b61341 -mem-write: 0x80013bb7 <- 0xc1250300 -mem-write: 0x80013bbb <- 0x66663301 -mem-write: 0x80013bbf <- 0xf12c2300 -mem-write: 0x80013bc3 <- 0xa686b302 -mem-write: 0x80013bc7 <- 0xc686b340 -mem-write: 0x80013bcb <- 0xd12e2340 -mem-write: 0x80013bcf <- 0xb12a2302 -mem-write: 0x80013bd3 <- 0xe1282302 -mem-write: 0x80013bd7 <- 0xe841302 -mem-write: 0x80013bdb <- 0xe091300 -mem-write: 0x80013bdf <- 0x9ff06f00 -mem-write: 0x80013be3 <- 0x12e23d2 -mem-write: 0x80013be7 <- 0x12c2300 -mem-write: 0x80013beb <- 0x12a2300 -mem-write: 0x80013bef <- 0x10071300 -mem-write: 0x80013bf3 <- 0x1ff06f00 -VXDRV: upload 1023 bytes to 0x80013bf7 -mem-write: 0x80013bf7 <- 0x8f37f7 -mem-write: 0x80013bfb <- 0xef061300 -mem-write: 0x80013bff <- 0x140e93ff -mem-write: 0x80013c03 <- 0xcefeb300 -mem-write: 0x80013c07 <- 0x81258300 -mem-write: 0x80013c0b <- 0x41260301 -mem-write: 0x80013c0f <- 0xc1250301 -mem-write: 0x80013c13 <- 0xe9c6301 -mem-write: 0x80013c17 <- 0x1863331c -mem-write: 0x80013c1b <- 0xb66eb301 -mem-write: 0x80013c1f <- 0xd3633300 -mem-write: 0x80013c23 <- 0xaeeeb300 -mem-write: 0x80013c27 <- 0xf3633300 -mem-write: 0x80013c2b <- 0xeeeeb300 -mem-write: 0x80013c2f <- 0x4166300 -mem-write: 0x80013c33 <- 0xe946310 -mem-write: 0x80013c37 <- 0xf1282302 -mem-write: 0x80013c3b <- 0x12a2302 -mem-write: 0x80013c3f <- 0x112c2303 -mem-write: 0x80013c43 <- 0xd12e2303 -mem-write: 0x80013c47 <- 0xe091302 -mem-write: 0x80013c4b <- 0x3166300 -mem-write: 0x80013c4f <- 0x413a0 -mem-write: 0x80013c53 <- 0x91300 -mem-write: 0x80013c57 <- 0xff06f00 -mem-write: 0x80013c5b <- 0x31a63a0 -mem-write: 0x80013c5f <- 0xe1282300 -mem-write: 0x80013c63 <- 0xc12a2302 -mem-write: 0x80013c67 <- 0xb12c2302 -mem-write: 0x80013c6b <- 0x9ff06f02 -mem-write: 0x80013c6f <- 0xf7033383 -mem-write: 0x80013c73 <- 0x603b340 -mem-write: 0x80013c77 <- 0x673fb341 -mem-write: 0x80013c7b <- 0x763eb300 -mem-write: 0x80013c7f <- 0xf38fb300 -mem-write: 0x80013c83 <- 0xf1341 -mem-write: 0x80013c87 <- 0x67746300 -mem-write: 0x80013c8b <- 0x13bf1300 -mem-write: 0x80013c8f <- 0x1582b300 -mem-write: 0x80013c93 <- 0xdf6f3341 -mem-write: 0x80013c97 <- 0x55bab301 -mem-write: 0x80013c9b <- 0xe28a3300 -mem-write: 0x80013c9f <- 0x99341 -mem-write: 0x80013ca3 <- 0xf046300 -mem-write: 0x80013ca7 <- 0x12b99300 -mem-write: 0x80013cab <- 0xd50eb300 -mem-write: 0x80013caf <- 0x59e9b340 -mem-write: 0x80013cb3 <- 0x3e8eb301 -mem-write: 0x80013cb7 <- 0xd12e2341 -mem-write: 0x80013cbb <- 0x412c2303 -mem-write: 0x80013cbf <- 0xf12a2303 -mem-write: 0x80013cc3 <- 0x61282303 -mem-write: 0x80013cc7 <- 0xce9f1302 -mem-write: 0x80013ccb <- 0xf506300 -mem-write: 0x80013ccf <- 0xc8063306 -mem-write: 0x80013cd3 <- 0xe7873340 -mem-write: 0x80013cd7 <- 0xc8333340 -mem-write: 0x80013cdb <- 0xe7b83300 -mem-write: 0x80013cdf <- 0x6063300 -mem-write: 0x80013ce3 <- 0x81341 -mem-write: 0x80013ce7 <- 0xe7f46300 -mem-write: 0x80013ceb <- 0x13b81300 -mem-write: 0x80013cef <- 0x68683300 -mem-write: 0x80013cf3 <- 0xb885b300 -mem-write: 0x80013cf7 <- 0xb8b8b340 -mem-write: 0x80013cfb <- 0x31300 -mem-write: 0x80013cff <- 0x585b300 -mem-write: 0x80013d03 <- 0x8046341 -mem-write: 0x80013d07 <- 0x12b31300 -mem-write: 0x80013d0b <- 0xa6853300 -mem-write: 0x80013d0f <- 0x13633340 -mem-write: 0x80013d13 <- 0x65033301 -mem-write: 0x80013d17 <- 0x612e2340 -mem-write: 0x80013d1b <- 0xb12c2302 -mem-write: 0x80013d1f <- 0xc12a2302 -mem-write: 0x80013d23 <- 0xe1282302 -mem-write: 0x80013d27 <- 0x9ff06f02 -mem-write: 0x80013d2b <- 0xf36333c4 -mem-write: 0x80013d2f <- 0x43633301 -mem-write: 0x80013d33 <- 0xd3633301 -mem-write: 0x80013d37 <- 0x5ff06f01 -mem-write: 0x80013d3b <- 0x10f93f1 -mem-write: 0x80013d3f <- 0xe9e6303 -mem-write: 0x80013d43 <- 0x31e6304 -mem-write: 0x80013d47 <- 0xe12e2302 -mem-write: 0x80013d4b <- 0x12c2303 -mem-write: 0x80013d4f <- 0x12a2302 -mem-write: 0x80013d53 <- 0x1282302 -mem-write: 0x80013d57 <- 0xc1079302 -mem-write: 0x80013d5b <- 0x7a70303 -mem-write: 0x80013d5f <- 0xc7a68300 -mem-write: 0x80013d63 <- 0xc78793ff -mem-write: 0x80013d67 <- 0x371713ff -mem-write: 0x80013d6b <- 0xd6d69300 -mem-write: 0x80013d6f <- 0xd7673301 -mem-write: 0x80013d73 <- 0xe7a22300 -mem-write: 0x80013d77 <- 0xff92e300 -mem-write: 0x80013d7b <- 0x5ff06ffe -mem-write: 0x80013d7f <- 0xf1282383 -mem-write: 0x80013d83 <- 0x12a2302 -mem-write: 0x80013d87 <- 0x112c2303 -mem-write: 0x80013d8b <- 0xd12e2303 -mem-write: 0x80013d8f <- 0xe091302 -mem-write: 0x80013d93 <- 0xff041300 -mem-write: 0x80013d97 <- 0xff06fff -mem-write: 0x80013d9b <- 0x31c638c -mem-write: 0x80013d9f <- 0xe1282300 -mem-write: 0x80013da3 <- 0xc12a2302 -mem-write: 0x80013da7 <- 0xb12c2302 -mem-write: 0x80013dab <- 0xa12e2302 -mem-write: 0x80013daf <- 0x5ff06f02 -mem-write: 0x80013db3 <- 0xe12e23fe -mem-write: 0x80013db7 <- 0x12c2303 -mem-write: 0x80013dbb <- 0x12a2302 -mem-write: 0x80013dbf <- 0x1282302 -mem-write: 0x80013dc3 <- 0xc1079302 -mem-write: 0x80013dc7 <- 0x7a70303 -mem-write: 0x80013dcb <- 0xc7a68300 -mem-write: 0x80013dcf <- 0xc78793ff -mem-write: 0x80013dd3 <- 0x371713ff -mem-write: 0x80013dd7 <- 0xd6d69300 -mem-write: 0x80013ddb <- 0xd7673301 -mem-write: 0x80013ddf <- 0xe7a22300 -mem-write: 0x80013de3 <- 0xff92e300 -mem-write: 0x80013de7 <- 0x8ff06ffe -mem-write: 0x80013deb <- 0xf70eb3fc -mem-write: 0x80013def <- 0x609b340 -mem-write: 0x80013df3 <- 0xd732b341 -mem-write: 0x80013df7 <- 0x363f3301 -mem-write: 0x80013dfb <- 0x5982b301 -mem-write: 0x80013dff <- 0xf9340 -mem-write: 0x80013e03 <- 0xd7746300 -mem-write: 0x80013e07 <- 0x19bf9301 -mem-write: 0x80013e0b <- 0x1583b300 -mem-write: 0x80013e0f <- 0xefefb341 -mem-write: 0x80013e13 <- 0x75bb3301 -mem-write: 0x80013e17 <- 0xf38ab300 -mem-write: 0x80013e1b <- 0xa1341 -mem-write: 0x80013e1f <- 0xf846300 -mem-write: 0x80013e23 <- 0x13ba1300 -mem-write: 0x80013e27 <- 0xd50f3300 -mem-write: 0x80013e2b <- 0x6a6a3340 -mem-write: 0x80013e2f <- 0x4f0f3301 -mem-write: 0x80013e33 <- 0xe12e2341 -mem-write: 0x80013e37 <- 0x512c2303 -mem-write: 0x80013e3b <- 0x512a2303 -mem-write: 0x80013e3f <- 0xd1282302 -mem-write: 0x80013e43 <- 0xcf1f9303 -mem-write: 0x80013e47 <- 0xfd06300 -mem-write: 0x80013e4b <- 0xc806330c -mem-write: 0x80013e4f <- 0xe7873340 -mem-write: 0x80013e53 <- 0xc83eb340 -mem-write: 0x80013e57 <- 0xe7b83300 -mem-write: 0x80013e5b <- 0x6063300 -mem-write: 0x80013e5f <- 0x81341 -mem-write: 0x80013e63 <- 0xe7f46300 -mem-write: 0x80013e67 <- 0x19b81300 -mem-write: 0x80013e6b <- 0xb885b300 -mem-write: 0x80013e6f <- 0xd8683340 -mem-write: 0x80013e73 <- 0xb8b8b301 -mem-write: 0x80013e77 <- 0x585b300 -mem-write: 0x80013e7b <- 0x8046341 -mem-write: 0x80013e7f <- 0x13b31300 -mem-write: 0x80013e83 <- 0xa6853300 -mem-write: 0x80013e87 <- 0x1366b340 -mem-write: 0x80013e8b <- 0xd506b301 -mem-write: 0x80013e8f <- 0xd12e2340 -mem-write: 0x80013e93 <- 0xb12c2302 -mem-write: 0x80013e97 <- 0xc12a2302 -mem-write: 0x80013e9b <- 0xe1282302 -mem-write: 0x80013e9f <- 0xe091302 -mem-write: 0x80013ea3 <- 0xc1250300 -mem-write: 0x80013ea7 <- 0x50a6303 -mem-write: 0x80013eab <- 0x1000ef06 -mem-write: 0x80013eaf <- 0x45079324 -mem-write: 0x80013eb3 <- 0x613ff -mem-write: 0x80013eb7 <- 0xf7f69302 -mem-write: 0x80013ebb <- 0xc7c73301 -mem-write: 0x80013ebf <- 0x68a6302 -mem-write: 0x80013ec3 <- 0xc0069308 -mem-write: 0x80013ec7 <- 0x10313ff -mem-write: 0x80013ecb <- 0x27151303 -mem-write: 0x80013ecf <- 0xc7e83300 -mem-write: 0x80013ed3 <- 0xd706b302 -mem-write: 0x80013ed7 <- 0x6063302 -mem-write: 0x80013edb <- 0xc6869341 -mem-write: 0x80013edf <- 0xd306b300 -mem-write: 0x80013ee3 <- 0xd3106300 -mem-write: 0x80013ee7 <- 0x106930a -mem-write: 0x80013eeb <- 0xa6853304 -mem-write: 0x80013eef <- 0x1268300 -mem-write: 0x80013ef3 <- 0xf7071303 -mem-write: 0x80013ef7 <- 0x696b3ff -mem-write: 0x80013efb <- 0xd5282301 -mem-write: 0x80013eff <- 0xf00613fe -mem-write: 0x80013f03 <- 0x80006fff -mem-write: 0x80013f07 <- 0x5eeeb30b -mem-write: 0x80013f0b <- 0x5eeeb300 -mem-write: 0x80013f0f <- 0xeeeeb301 -mem-write: 0x80013f13 <- 0xe8ee301 -mem-write: 0x80013f17 <- 0xdff06fd2 -mem-write: 0x80013f1b <- 0x812503f8 -mem-write: 0x80013f1f <- 0x5086303 -mem-write: 0x80013f23 <- 0x9000ef00 -mem-write: 0x80013f27 <- 0x505131c -mem-write: 0x80013f2b <- 0x5ff06f02 -mem-write: 0x80013f2f <- 0x412503f8 -mem-write: 0x80013f33 <- 0x5086303 -mem-write: 0x80013f37 <- 0x5000ef00 -mem-write: 0x80013f3b <- 0x505131b -mem-write: 0x80013f3f <- 0x1ff06f04 -mem-write: 0x80013f43 <- 0x12503f7 -mem-write: 0x80013f47 <- 0x5000ef03 -mem-write: 0x80013f4b <- 0x505131a -mem-write: 0x80013f4f <- 0x1ff06f06 -mem-write: 0x80013f53 <- 0xc00593f6 -mem-write: 0x80013f57 <- 0xb705b3ff -mem-write: 0x80013f5b <- 0xc1069302 -mem-write: 0x80013f5f <- 0x30061303 -mem-write: 0x80013f63 <- 0xb6853300 -mem-write: 0x80013f67 <- 0x5250300 -mem-write: 0x80013f6b <- 0xf6061300 -mem-write: 0x80013f6f <- 0xc68693ff -mem-write: 0x80013f73 <- 0xa6a223ff -mem-write: 0x80013f77 <- 0xe656e300 -mem-write: 0x80013f7b <- 0xf70713fe -mem-write: 0x80013f7f <- 0x1ff06fff -mem-write: 0x80013f83 <- 0xc6a583f8 -mem-write: 0x80013f87 <- 0x6a883ff -mem-write: 0x80013f8b <- 0xa68e3300 -mem-write: 0x80013f8f <- 0xc5d5b300 -mem-write: 0x80013f93 <- 0x898b300 -mem-write: 0x80013f97 <- 0x15e5b301 -mem-write: 0x80013f9b <- 0xbe202301 -mem-write: 0x80013f9f <- 0xc6869300 -mem-write: 0x80013fa3 <- 0x1ff06fff -mem-write: 0x80013fa7 <- 0x271693f4 -mem-write: 0x80013fab <- 0x1059300 -mem-write: 0x80013faf <- 0xd586b303 -mem-write: 0x80013fb3 <- 0x6a02300 -mem-write: 0x80013fb7 <- 0xf7071300 -mem-write: 0x80013fbb <- 0xc716e3ff -mem-write: 0x80013fbf <- 0x87cc63fe -mem-write: 0x80013fc3 <- 0x87843314 -mem-write: 0x80013fc7 <- 0x14041340 -mem-write: 0x80013fcb <- 0x71300 -mem-write: 0x80013fcf <- 0xe4453302 -mem-write: 0x80013fd3 <- 0x81302 -mem-write: 0x80013fd7 <- 0x79300 -mem-write: 0x80013fdb <- 0xa7ce6300 -mem-write: 0x80013fdf <- 0x5061304 -mem-write: 0x80013fe3 <- 0x5546300 -mem-write: 0x80013fe7 <- 0x61300 -mem-write: 0x80013feb <- 0xf4779300 -mem-write: 0x80013fef <- 0x25169301 -mem-write: 0x80013ff3 <- 0x1f906300 -VXDRV: upload 1024 bytes to 0x80013ff6 -mem-write: 0x80013ff6 <- 0x6130607 -mem-write: 0x80013ffa <- 0x7930030 -mem-write: 0x80013ffe <- 0x7130301 -mem-write: 0x80014002 <- 0x6330000 -mem-write: 0x80014006 <- 0x85b340a6 -mem-write: 0x8001400a <- 0xa58300d7 -mem-write: 0x8001400e <- 0x7130005 -mem-write: 0x80014012 <- 0x87930017 -mem-write: 0x80014016 <- 0xae230047 -mem-write: 0x8001401a <- 0x56e3feb7 -mem-write: 0x8001401e <- 0x713fee6 -mem-write: 0x80014022 <- 0x5330040 -mem-write: 0x80014026 <- 0x71340a7 -mem-write: 0x8001402a <- 0x54630010 -mem-write: 0x8001402e <- 0x71308a0 -mem-write: 0x80014032 <- 0x6f0005 -mem-write: 0x80014036 <- 0x97130800 -mem-write: 0x8001403a <- 0x6930027 -mem-write: 0x8001403e <- 0x87330301 -mem-write: 0x80014042 <- 0x270300e6 -mem-write: 0x80014046 <- 0x87930007 -mem-write: 0x8001404a <- 0x68330017 -mem-write: 0x8001404e <- 0xf06f00e8 -mem-write: 0x80014052 <- 0x593f8df -mem-write: 0x80014056 <- 0x64330200 -mem-write: 0x8001405a <- 0x79302b4 -mem-write: 0x8001405e <- 0x16130401 -mem-write: 0x80014062 <- 0x86330026 -mem-write: 0x80014066 <- 0x278300c7 -mem-write: 0x8001406a <- 0x713ff06 -mem-write: 0x8001406e <- 0x85b30000 -mem-write: 0x80014072 <- 0x97b34085 -mem-write: 0x80014076 <- 0x683300b7 -mem-write: 0x8001407a <- 0x79300f8 -mem-write: 0x8001407e <- 0x86b30301 -mem-write: 0x80014082 <- 0x79300d7 -mem-write: 0x80014086 <- 0x87b30030 -mem-write: 0x8001408a <- 0x869340a7 -mem-write: 0x8001408e <- 0x46630046 -mem-write: 0x80014092 <- 0x69302f7 -mem-write: 0x80014096 <- 0x97930401 -mem-write: 0x8001409a <- 0x87b30027 -mem-write: 0x8001409e <- 0x268300f6 -mem-write: 0x800140a2 <- 0x71303c1 -mem-write: 0x800140a6 <- 0x7330040 -mem-write: 0x800140aa <- 0xd43340a7 -mem-write: 0x800140ae <- 0xa8230086 -mem-write: 0x800140b2 <- 0x693fe87 -mem-write: 0x800140b6 <- 0x6f0030 -mem-write: 0x800140ba <- 0x18930440 -mem-write: 0x800140be <- 0x6130027 -mem-write: 0x800140c2 <- 0xa3030301 -mem-write: 0x800140c6 <- 0x8b30006 -mem-write: 0x800140ca <- 0xa6030116 -mem-write: 0x800140ce <- 0x1333ffc6 -mem-write: 0x800140d2 <- 0x71300b3 -mem-write: 0x800140d6 <- 0x56330017 -mem-write: 0x800140da <- 0x66330086 -mem-write: 0x800140de <- 0xa0230066 -mem-write: 0x800140e2 <- 0xf06f00c8 -mem-write: 0x800140e6 <- 0x1793fa9f -mem-write: 0x800140ea <- 0x6130027 -mem-write: 0x800140ee <- 0x7b30301 -mem-write: 0x800140f2 <- 0xa02300f6 -mem-write: 0x800140f6 <- 0x7130007 -mem-write: 0x800140fa <- 0xd6e30017 -mem-write: 0x800140fe <- 0x2703fee6 -mem-write: 0x80014102 <- 0x37b30301 -mem-write: 0x80014106 <- 0x4130100 -mem-write: 0x8001410a <- 0x67b30000 -mem-write: 0x8001410e <- 0x282300f7 -mem-write: 0x80014112 <- 0xe06f02f1 -mem-write: 0x80014116 <- 0x433d45f -mem-write: 0x8001411a <- 0x278340f4 -mem-write: 0x8001411e <- 0x73703c1 -mem-write: 0x80014122 <- 0x713fff8 -mem-write: 0x80014126 <- 0xf7b3fff7 -mem-write: 0x8001412a <- 0x2e2300e7 -mem-write: 0x8001412e <- 0xe06f02f1 -mem-write: 0x80014132 <- 0x2e23d29f -mem-write: 0x80014136 <- 0x2c230201 -mem-write: 0x8001413a <- 0x2a230201 -mem-write: 0x8001413e <- 0x28230201 -mem-write: 0x80014142 <- 0xe06f0201 -mem-write: 0x80014146 <- 0x2783d95f -mem-write: 0x8001414a <- 0x27030085 -mem-write: 0x8001414e <- 0x26830045 -mem-write: 0x80014152 <- 0x260300c5 -mem-write: 0x80014156 <- 0x1130005 -mem-write: 0x8001415a <- 0x2223fe01 -mem-write: 0x8001415e <- 0x242300e1 -mem-write: 0x80014162 <- 0x2c2300f1 -mem-write: 0x80014166 <- 0x473700f1 -mem-write: 0x8001416a <- 0x97930000 -mem-write: 0x8001416e <- 0xd5930016 -mem-write: 0x80014172 <- 0x20230117 -mem-write: 0x80014176 <- 0x262300c1 -mem-write: 0x8001417a <- 0x282300d1 -mem-write: 0x8001417e <- 0x79300c1 -mem-write: 0x80014182 <- 0x513ffe7 -mem-write: 0x80014186 <- 0xde630000 -mem-write: 0x8001418a <- 0x79300b7 -mem-write: 0x8001418e <- 0xd81301d7 -mem-write: 0x80014192 <- 0xdc6301f6 -mem-write: 0x80014196 <- 0x53700b7 -mem-write: 0x8001419a <- 0x45138000 -mem-write: 0x8001419e <- 0x533fff5 -mem-write: 0x800141a2 <- 0x11300a8 -mem-write: 0x800141a6 <- 0x80670201 -mem-write: 0x800141aa <- 0x96930000 -mem-write: 0x800141ae <- 0x7b70106 -mem-write: 0x800141b2 <- 0xd6930001 -mem-write: 0x800141b6 <- 0xe6b30106 -mem-write: 0x800141ba <- 0x79300f6 -mem-write: 0x800141be <- 0x87b306f7 -mem-write: 0x800141c2 <- 0xd71340b7 -mem-write: 0x800141c6 <- 0x2e234057 -mem-write: 0x800141ca <- 0xf79300d1 -mem-write: 0x800141ce <- 0x886301f7 -mem-write: 0x800141d2 <- 0x5130407 -mem-write: 0x800141d6 <- 0x8930200 -mem-write: 0x800141da <- 0x533ffe7 -mem-write: 0x800141de <- 0x171340f5 -mem-write: 0x800141e2 <- 0xe130027 -mem-write: 0x800141e6 <- 0x95330201 -mem-write: 0x800141ea <- 0x31300a6 -mem-write: 0x800141ee <- 0x5930000 -mem-write: 0x800141f2 <- 0xb8930000 -mem-write: 0x800141f6 <- 0x7330018 -mem-write: 0x800141fa <- 0xc46300ee -mem-write: 0x800141fe <- 0x4630515 -mem-write: 0x80014202 <- 0x28230003 -mem-write: 0x80014206 <- 0x959300c1 -mem-write: 0x8001420a <- 0x7130025 -mem-write: 0x8001420e <- 0x5b30201 -mem-write: 0x80014212 <- 0xd6b300b7 -mem-write: 0x80014216 <- 0xa82300f6 -mem-write: 0x8001421a <- 0x6ffed5 -mem-write: 0x8001421e <- 0x7930180 -mem-write: 0x80014222 <- 0x17130201 -mem-write: 0x80014226 <- 0x87330027 -mem-write: 0x8001422a <- 0x278300e7 -mem-write: 0x8001422e <- 0x2823ff07 -mem-write: 0x80014232 <- 0x250300f1 -mem-write: 0x80014236 <- 0x6e30101 -mem-write: 0x8001423a <- 0x533f608 -mem-write: 0x8001423e <- 0xf06f40a0 -mem-write: 0x80014242 <- 0x2603f65f -mem-write: 0x80014246 <- 0x313ff07 -mem-write: 0x8001424a <- 0x5930010 -mem-write: 0x8001424e <- 0x56330010 -mem-write: 0x80014252 <- 0x663300f6 -mem-write: 0x80014256 <- 0xf06f00a6 -mem-write: 0x8001425a <- 0x113fa5f -mem-write: 0x8001425e <- 0x2223fd01 -mem-write: 0x80014262 <- 0x26230291 -mem-write: 0x80014266 <- 0x24230211 -mem-write: 0x8001426a <- 0x20230281 -mem-write: 0x8001426e <- 0x4930321 -mem-write: 0x80014272 <- 0x80630005 -mem-write: 0x80014276 <- 0xd7931205 -mem-write: 0x8001427a <- 0xc43341f5 -mem-write: 0x8001427e <- 0x43300b7 -mem-write: 0x80014282 <- 0x51340f4 -mem-write: 0x80014286 <- 0xd9130004 -mem-write: 0x8001428a <- 0xef01f5 -mem-write: 0x8001428e <- 0x47376600 -mem-write: 0x80014292 <- 0x7130000 -mem-write: 0x80014296 <- 0x79301e7 -mem-write: 0x8001429a <- 0x5b30515 -mem-write: 0x8001429e <- 0x282340a7 -mem-write: 0x800142a2 <- 0xd7130081 -mem-write: 0x800142a6 <- 0x2a234057 -mem-write: 0x800142aa <- 0x2c230001 -mem-write: 0x800142ae <- 0x2e230001 -mem-write: 0x800142b2 <- 0xf7930001 -mem-write: 0x800142b6 <- 0x8c6301f7 -mem-write: 0x800142ba <- 0x6930207 -mem-write: 0x800142be <- 0x16630020 -mem-write: 0x800142c2 <- 0x6930cd7 -mem-write: 0x800142c6 <- 0x86b30200 -mem-write: 0x800142ca <- 0x56b340f6 -mem-write: 0x800142ce <- 0x2e2300d4 -mem-write: 0x800142d2 <- 0x69300d1 -mem-write: 0x800142d6 <- 0x613fff7 -mem-write: 0x800142da <- 0x17130201 -mem-write: 0x800142de <- 0x7330027 -mem-write: 0x800142e2 <- 0x17b300e6 -mem-write: 0x800142e6 <- 0x282300f4 -mem-write: 0x800142ea <- 0x6ffef7 -mem-write: 0x800142ee <- 0x7930340 -mem-write: 0x800142f2 <- 0x87b30030 -mem-write: 0x800142f6 <- 0x69340e7 -mem-write: 0x800142fa <- 0x97930201 -mem-write: 0x800142fe <- 0x87b30027 -mem-write: 0x80014302 <- 0xa78300f6 -mem-write: 0x80014306 <- 0x693ff07 -mem-write: 0x8001430a <- 0x2e230020 -mem-write: 0x8001430e <- 0x79300f1 -mem-write: 0x80014312 <- 0x16630020 -mem-write: 0x80014316 <- 0x2c2300f7 -mem-write: 0x8001431a <- 0x6930081 -mem-write: 0x8001431e <- 0x7930010 -mem-write: 0x80014322 <- 0x9713fff0 -mem-write: 0x80014326 <- 0x6130026 -mem-write: 0x8001432a <- 0x7330101 -mem-write: 0x8001432e <- 0x202300e6 -mem-write: 0x80014332 <- 0x86930007 -mem-write: 0x80014336 <- 0x96e3fff6 -mem-write: 0x8001433a <- 0x2783fef6 -mem-write: 0x8001433e <- 0x208301c1 -mem-write: 0x80014342 <- 0x240302c1 -mem-write: 0x80014346 <- 0x16230281 -mem-write: 0x8001434a <- 0x179300f1 -mem-write: 0x8001434e <- 0xe5b300f9 -mem-write: 0x80014352 <- 0x278300b7 -mem-write: 0x80014356 <- 0x17230101 -mem-write: 0x8001435a <- 0x290300b1 -mem-write: 0x8001435e <- 0xa0230201 -mem-write: 0x80014362 <- 0x278300f4 -mem-write: 0x80014366 <- 0x85130141 -mem-write: 0x8001436a <- 0xa2230004 -mem-write: 0x8001436e <- 0x278300f4 -mem-write: 0x80014372 <- 0xa4230181 -mem-write: 0x80014376 <- 0x278300f4 -mem-write: 0x8001437a <- 0xa62300c1 -mem-write: 0x8001437e <- 0x248300f4 -mem-write: 0x80014382 <- 0x1130241 -mem-write: 0x80014386 <- 0x80670301 -mem-write: 0x8001438a <- 0x7130000 -mem-write: 0x8001438e <- 0xf06f0030 -mem-write: 0x80014392 <- 0x2e23f45f -mem-write: 0x80014396 <- 0x2c230001 -mem-write: 0x8001439a <- 0x2a230001 -mem-write: 0x8001439e <- 0x28230001 -mem-write: 0x800143a2 <- 0x9130001 -mem-write: 0x800143a6 <- 0xf06f0000 -mem-write: 0x800143aa <- 0x5793f95f -mem-write: 0x800143ae <- 0x17130146 -mem-write: 0x800143b2 <- 0xf79300c6 -mem-write: 0x800143b6 <- 0x1137ff7 -mem-write: 0x800143ba <- 0x5713fd01 -mem-write: 0x800143be <- 0x869300c7 -mem-write: 0x800143c2 <- 0x24230017 -mem-write: 0x800143c6 <- 0x22230281 -mem-write: 0x800143ca <- 0x20230291 -mem-write: 0x800143ce <- 0x26230321 -mem-write: 0x800143d2 <- 0x28230211 -mem-write: 0x800143d6 <- 0x2a2300b1 -mem-write: 0x800143da <- 0x2e2300e1 -mem-write: 0x800143de <- 0x2c230001 -mem-write: 0x800143e2 <- 0xf6930001 -mem-write: 0x800143e6 <- 0x9137fe6 -mem-write: 0x800143ea <- 0x84130005 -mem-write: 0x800143ee <- 0x54930005 -mem-write: 0x800143f2 <- 0x826301f6 -VXDRV: upload 1024 bytes to 0x800143f6 -mem-write: 0x800143f6 <- 0x46b70806 -mem-write: 0x800143fa <- 0x86930000 -mem-write: 0x800143fe <- 0x87b3c006 -mem-write: 0x80014402 <- 0xd51300d7 -mem-write: 0x80014406 <- 0x56930045 -mem-write: 0x8001440a <- 0x17130047 -mem-write: 0x8001440e <- 0x673301c7 -mem-write: 0x80014412 <- 0x941300a7 -mem-write: 0x80014416 <- 0x2e2301c5 -mem-write: 0x8001441a <- 0x2c2300d1 -mem-write: 0x8001441e <- 0x2a2300e1 -mem-write: 0x80014422 <- 0x28230081 -mem-write: 0x80014426 <- 0x94930001 -mem-write: 0x8001442a <- 0xe7b300f4 -mem-write: 0x8001442e <- 0x172300f4 -mem-write: 0x80014432 <- 0x278300f1 -mem-write: 0x80014436 <- 0x27030101 -mem-write: 0x8001443a <- 0x208301c1 -mem-write: 0x8001443e <- 0x202302c1 -mem-write: 0x80014442 <- 0x278300f9 -mem-write: 0x80014446 <- 0x16230141 -mem-write: 0x8001444a <- 0x240300e1 -mem-write: 0x8001444e <- 0x22230281 -mem-write: 0x80014452 <- 0x278300f9 -mem-write: 0x80014456 <- 0x24830181 -mem-write: 0x8001445a <- 0x5130241 -mem-write: 0x8001445e <- 0x24230009 -mem-write: 0x80014462 <- 0x278300f9 -mem-write: 0x80014466 <- 0x262300c1 -mem-write: 0x8001446a <- 0x290300f9 -mem-write: 0x8001446e <- 0x1130201 -mem-write: 0x80014472 <- 0x80670301 -mem-write: 0x80014476 <- 0x65330000 -mem-write: 0x8001447a <- 0x946300b7 -mem-write: 0x8001447e <- 0x4e30e07 -mem-write: 0x80014482 <- 0xc63fa05 -mem-write: 0x80014486 <- 0x5130407 -mem-write: 0x8001448a <- 0xef0007 -mem-write: 0x8001448e <- 0x5934600 -mem-write: 0x80014492 <- 0xd7130315 -mem-write: 0x80014496 <- 0xf5934055 -mem-write: 0x8001449a <- 0x866301f5 -mem-write: 0x8001449e <- 0x6930405 -mem-write: 0x800144a2 <- 0x6b3ffc0 -mem-write: 0x800144a6 <- 0x31302d7 -mem-write: 0x800144aa <- 0x8130101 -mem-write: 0x800144ae <- 0x16130200 -mem-write: 0x800144b2 <- 0x8330027 -mem-write: 0x800144b6 <- 0x869340b8 -mem-write: 0x800144ba <- 0x6b300c6 -mem-write: 0x800144be <- 0x106300d3 -mem-write: 0x800144c2 <- 0x79308d3 -mem-write: 0x800144c6 <- 0x86330201 -mem-write: 0x800144ca <- 0x15b300c7 -mem-write: 0x800144ce <- 0x71300b4 -mem-write: 0x800144d2 <- 0x2823fff7 -mem-write: 0x800144d6 <- 0x6ffeb6 -mem-write: 0x800144da <- 0xef03c0 -mem-write: 0x800144de <- 0x5134100 -mem-write: 0x800144e2 <- 0xf06f0205 -mem-write: 0x800144e6 <- 0x613fadf -mem-write: 0x800144ea <- 0x633ffc0 -mem-write: 0x800144ee <- 0x79302c7 -mem-write: 0x800144f2 <- 0x69301c1 -mem-write: 0x800144f6 <- 0x85b30030 -mem-write: 0x800144fa <- 0xa58300c7 -mem-write: 0x800144fe <- 0x86930005 -mem-write: 0x80014502 <- 0x8793fff6 -mem-write: 0x80014506 <- 0xa223ffc7 -mem-write: 0x8001450a <- 0xd6e300b7 -mem-write: 0x8001450e <- 0x713fee6 -mem-write: 0x80014512 <- 0x693fff7 -mem-write: 0x80014516 <- 0x1793fff0 -mem-write: 0x8001451a <- 0x6130027 -mem-write: 0x8001451e <- 0x7b30101 -mem-write: 0x80014522 <- 0xa02300f6 -mem-write: 0x80014526 <- 0x7130007 -mem-write: 0x8001452a <- 0x16e3fff7 -mem-write: 0x8001452e <- 0x47b7fed7 -mem-write: 0x80014532 <- 0x87930000 -mem-write: 0x80014536 <- 0x87b3c0c7 -mem-write: 0x8001453a <- 0xf06f40a7 -mem-write: 0x8001453e <- 0xa783eedf -mem-write: 0x80014542 <- 0xa883ffc6 -mem-write: 0x80014546 <- 0x8e330006 -mem-write: 0x8001454a <- 0xd7b300c6 -mem-write: 0x8001454e <- 0x98b30107 -mem-write: 0x80014552 <- 0xe7b300b8 -mem-write: 0x80014556 <- 0x20230117 -mem-write: 0x8001455a <- 0x869300fe -mem-write: 0x8001455e <- 0xf06fffc6 -mem-write: 0x80014562 <- 0x87b7f61f -mem-write: 0x80014566 <- 0x8630000 -mem-write: 0x8001456a <- 0x17930205 -mem-write: 0x8001456e <- 0xd69301c7 -mem-write: 0x80014572 <- 0xe7b30045 -mem-write: 0x80014576 <- 0x2c2300d7 -mem-write: 0x8001457a <- 0x571300f1 -mem-write: 0x8001457e <- 0x87b70047 -mem-write: 0x80014582 <- 0x94130000 -mem-write: 0x80014586 <- 0x673301c5 -mem-write: 0x8001458a <- 0x2a2300f7 -mem-write: 0x8001458e <- 0x28230081 -mem-write: 0x80014592 <- 0x2e230001 -mem-write: 0x80014596 <- 0x879300e1 -mem-write: 0x8001459a <- 0xf06ffff7 -mem-write: 0x8001459e <- 0x2583e8df -mem-write: 0x800145a2 <- 0x278300c5 -mem-write: 0x800145a6 <- 0x27030085 -mem-write: 0x800145aa <- 0x1130045 -mem-write: 0x800145ae <- 0x2683fe01 -mem-write: 0x800145b2 <- 0x24230005 -mem-write: 0x800145b6 <- 0x2c2300f1 -mem-write: 0x800145ba <- 0x979300f1 -mem-write: 0x800145be <- 0x22230105 -mem-write: 0x800145c2 <- 0x2a2300e1 -mem-write: 0x800145c6 <- 0xd79300e1 -mem-write: 0x800145ca <- 0x97130107 -mem-write: 0x800145ce <- 0x26230015 -mem-write: 0x800145d2 <- 0x202300b1 -mem-write: 0x800145d6 <- 0x282300d1 -mem-write: 0x800145da <- 0x2e2300d1 -mem-write: 0x800145de <- 0x571300f1 -mem-write: 0x800145e2 <- 0xd5930117 -mem-write: 0x800145e6 <- 0x81301f5 -mem-write: 0x800145ea <- 0x6130101 -mem-write: 0x800145ee <- 0x278301c1 -mem-write: 0x800145f2 <- 0x26830006 -mem-write: 0x800145f6 <- 0x613ffc6 -mem-write: 0x800145fa <- 0x9793ffc6 -mem-write: 0x800145fe <- 0xd6930037 -mem-write: 0x80014602 <- 0xe7b301d6 -mem-write: 0x80014606 <- 0x222300d7 -mem-write: 0x8001460a <- 0x12e300f6 -mem-write: 0x8001460e <- 0x2683fec8 -mem-write: 0x80014612 <- 0x7930101 -mem-write: 0x80014616 <- 0x95130017 -mem-write: 0x8001461a <- 0x86b70036 -mem-write: 0x8001461e <- 0x86930000 -mem-write: 0x80014622 <- 0x2823ffe6 -mem-write: 0x80014626 <- 0xf7b300a1 -mem-write: 0x8001462a <- 0x846300d7 -mem-write: 0x8001462e <- 0xc7b71c07 -mem-write: 0x80014632 <- 0x8793ffff -mem-write: 0x80014636 <- 0x7334007 -mem-write: 0x8001463a <- 0x79300f7 -mem-write: 0x8001463e <- 0xc6637fe0 -mem-write: 0x80014642 <- 0x586320e7 -mem-write: 0x80014646 <- 0x280306e0 -mem-write: 0x8001464a <- 0x26030181 -mem-write: 0x8001464e <- 0x278301c1 -mem-write: 0x80014652 <- 0x56930141 -mem-write: 0x80014656 <- 0x161301c8 -mem-write: 0x8001465a <- 0x66330046 -mem-write: 0x8001465e <- 0x969300d6 -mem-write: 0x80014662 <- 0xe6b30047 -mem-write: 0x80014666 <- 0xd79300a6 -mem-write: 0x8001466a <- 0x181301c7 -mem-write: 0x8001466e <- 0x36b30048 -mem-write: 0x80014672 <- 0xe7b300d0 -mem-write: 0x80014676 <- 0xe6b30107 -mem-write: 0x8001467a <- 0x2a2300f6 -mem-write: 0x8001467e <- 0x282300c1 -mem-write: 0x80014682 <- 0x268300d1 -mem-write: 0x80014686 <- 0x27830101 -mem-write: 0x8001468a <- 0xf6130141 -mem-write: 0x8001468e <- 0x4630076 -mem-write: 0x80014692 <- 0xf6131c06 -mem-write: 0x80014696 <- 0x51300f6 -mem-write: 0x8001469a <- 0xe630040 -mem-write: 0x8001469e <- 0x86131aa6 -mem-write: 0x800146a2 <- 0x36b30046 -mem-write: 0x800146a6 <- 0x87b300d6 -mem-write: 0x800146aa <- 0x69300d7 -mem-write: 0x800146ae <- 0x6f0006 -mem-write: 0x800146b2 <- 0x7931a80 -mem-write: 0x800146b6 <- 0x5c63fcc0 -mem-write: 0x800146ba <- 0x2a2300f7 -mem-write: 0x800146be <- 0x7930001 -mem-write: 0x800146c2 <- 0x28230010 -mem-write: 0x800146c6 <- 0x71300f1 -mem-write: 0x800146ca <- 0xf06f0000 -mem-write: 0x800146ce <- 0x2783fb9f -mem-write: 0x800146d2 <- 0xf3701c1 -mem-write: 0x800146d6 <- 0x6930008 -mem-write: 0x800146da <- 0x6f3303d0 -mem-write: 0x800146de <- 0x86b300ff -mem-write: 0x800146e2 <- 0x2e2340e6 -mem-write: 0x800146e6 <- 0xde9301e1 -mem-write: 0x800146ea <- 0x7134056 -mem-write: 0x800146ee <- 0x7930008 -mem-write: 0x800146f2 <- 0xe130000 -mem-write: 0x800146f6 <- 0x25030000 -mem-write: 0x800146fa <- 0x87930007 -mem-write: 0x800146fe <- 0x7130017 -mem-write: 0x80014702 <- 0x6e330047 -mem-write: 0x80014706 <- 0x98e300ae -mem-write: 0x8001470a <- 0xf713fefe -mem-write: 0x8001470e <- 0x969301f6 -mem-write: 0x80014712 <- 0x1063002e -mem-write: 0x80014716 <- 0x7130407 -mem-write: 0x8001471a <- 0x7930030 -mem-write: 0x8001471e <- 0x7330000 -mem-write: 0x80014722 <- 0x53341d7 -mem-write: 0x80014726 <- 0x250300d6 -mem-write: 0x8001472a <- 0x87930005 -mem-write: 0x8001472e <- 0x6130017 -mem-write: 0x80014732 <- 0x2e230046 -mem-write: 0x80014736 <- 0x56e3fea6 -mem-write: 0x8001473a <- 0x713fef7 -mem-write: 0x8001473e <- 0x7330040 -mem-write: 0x80014742 <- 0x79341d7 -mem-write: 0x80014746 <- 0x5e630010 -mem-write: 0x8001474a <- 0x79304e0 -mem-write: 0x8001474e <- 0x6f0007 -mem-write: 0x80014752 <- 0x7930540 -mem-write: 0x80014756 <- 0x87b30201 -mem-write: 0x8001475a <- 0xa78300d7 -mem-write: 0x8001475e <- 0x313ff07 -mem-write: 0x80014762 <- 0x3330200 -mem-write: 0x80014766 <- 0x97b340e3 -mem-write: 0x8001476a <- 0x6330067 -mem-write: 0x8001476e <- 0x69300d8 -mem-write: 0x80014772 <- 0x6e330030 -mem-write: 0x80014776 <- 0x89300fe -mem-write: 0x8001477a <- 0x86b30000 -mem-write: 0x8001477e <- 0x61341d6 -mem-write: 0x80014782 <- 0xc4630046 -mem-write: 0x80014786 <- 0x969304d8 -mem-write: 0x8001478a <- 0x6130026 -mem-write: 0x8001478e <- 0x7930201 -mem-write: 0x80014792 <- 0x6b30040 -mem-write: 0x80014796 <- 0x573300d6 -mem-write: 0x8001479a <- 0x87b300ef -mem-write: 0x8001479e <- 0xa82341d7 -mem-write: 0x800147a2 <- 0x693fee6 -mem-write: 0x800147a6 <- 0x97130040 -mem-write: 0x800147aa <- 0x7330027 -mem-write: 0x800147ae <- 0x202300e8 -mem-write: 0x800147b2 <- 0x87930007 -mem-write: 0x800147b6 <- 0x98e30017 -mem-write: 0x800147ba <- 0x2703fed7 -mem-write: 0x800147be <- 0x37b30101 -mem-write: 0x800147c2 <- 0x67b301c0 -mem-write: 0x800147c6 <- 0xf06f00f7 -mem-write: 0x800147ca <- 0x2503efdf -mem-write: 0x800147ce <- 0x2f83ffc6 -mem-write: 0x800147d2 <- 0x97930006 -mem-write: 0x800147d6 <- 0x55330028 -mem-write: 0x800147da <- 0x9fb300e5 -mem-write: 0x800147de <- 0x7b3006f -mem-write: 0x800147e2 <- 0x653300f8 -mem-write: 0x800147e6 <- 0xa02301f5 -mem-write: 0x800147ea <- 0x889300a7 -mem-write: 0x800147ee <- 0xf06f0018 -mem-write: 0x800147f2 <- 0x2603f91f -VXDRV: upload 1024 bytes to 0x800147f6 -mem-write: 0x800147f6 <- 0x27830141 -mem-write: 0x800147fa <- 0x28030181 -mem-write: 0x800147fe <- 0x66b301c1 -mem-write: 0x80014802 <- 0xe6b300f6 -mem-write: 0x80014806 <- 0xe6b30106 -mem-write: 0x8001480a <- 0x186300a6 -mem-write: 0x8001480e <- 0x36b30007 -mem-write: 0x80014812 <- 0x79300d0 -mem-write: 0x80014816 <- 0xf06f0000 -mem-write: 0x8001481a <- 0x8e63e75f -mem-write: 0x8001481e <- 0x56930a06 -mem-write: 0x80014822 <- 0x181301c6 -mem-write: 0x80014826 <- 0x96130048 -mem-write: 0x8001482a <- 0xd7930047 -mem-write: 0x8001482e <- 0x73701c7 -mem-write: 0x80014832 <- 0xe6b30040 -mem-write: 0x80014836 <- 0xe7b300c6 -mem-write: 0x8001483a <- 0xe7b30107 -mem-write: 0x8001483e <- 0xf69300e7 -mem-write: 0x80014842 <- 0x713ff86 -mem-write: 0x80014846 <- 0xf06f7ff0 -mem-write: 0x8001484a <- 0x793e45f -mem-write: 0x8001484e <- 0x6930000 -mem-write: 0x80014852 <- 0x7130000 -mem-write: 0x80014856 <- 0x96137ff0 -mem-write: 0x8001485a <- 0x5e630087 -mem-write: 0x8001485e <- 0x7130006 -mem-write: 0x80014862 <- 0x6130017 -mem-write: 0x80014866 <- 0xc637ff0 -mem-write: 0x8001486a <- 0x63706c7 -mem-write: 0x8001486e <- 0x613ff80 -mem-write: 0x80014872 <- 0xf7b3fff6 -mem-write: 0x80014876 <- 0x961300c7 -mem-write: 0x8001487a <- 0xd69301d7 -mem-write: 0x8001487e <- 0x66b30036 -mem-write: 0x80014882 <- 0x61300d6 -mem-write: 0x80014886 <- 0xd7937ff0 -mem-write: 0x8001488a <- 0x1e630037 -mem-write: 0x8001488e <- 0xe6b300c7 -mem-write: 0x80014892 <- 0x79300f6 -mem-write: 0x80014896 <- 0x88630000 -mem-write: 0x8001489a <- 0x7b70006 -mem-write: 0x8001489e <- 0x6930008 -mem-write: 0x800148a2 <- 0x5930000 -mem-write: 0x800148a6 <- 0x17130000 -mem-write: 0x800148aa <- 0x6370147 -mem-write: 0x800148ae <- 0x97937ff0 -mem-write: 0x800148b2 <- 0x773300c7 -mem-write: 0x800148b6 <- 0xd79300c7 -mem-write: 0x800148ba <- 0x959300c7 -mem-write: 0x800148be <- 0x67b301f5 -mem-write: 0x800148c2 <- 0xe73300f7 -mem-write: 0x800148c6 <- 0x851300b7 -mem-write: 0x800148ca <- 0x5930006 -mem-write: 0x800148ce <- 0x1130007 -mem-write: 0x800148d2 <- 0x80670201 -mem-write: 0x800148d6 <- 0x7930000 -mem-write: 0x800148da <- 0xf06f0000 -mem-write: 0x800148de <- 0x793f79f -mem-write: 0x800148e2 <- 0x6930000 -mem-write: 0x800148e6 <- 0xf06f0000 -mem-write: 0x800148ea <- 0x7b7f91f -mem-write: 0x800148ee <- 0x7a630001 -mem-write: 0x800148f2 <- 0x79302f5 -mem-write: 0x800148f6 <- 0xb7b30ff0 -mem-write: 0x800148fa <- 0x979300a7 -mem-write: 0x800148fe <- 0x57370037 -mem-write: 0x80014902 <- 0x6938001 -mem-write: 0x80014906 <- 0x86b30200 -mem-write: 0x8001490a <- 0x553340f6 -mem-write: 0x8001490e <- 0x79300f5 -mem-write: 0x80014912 <- 0x85336b47 -mem-write: 0x80014916 <- 0x450300a7 -mem-write: 0x8001491a <- 0x85330005 -mem-write: 0x8001491e <- 0x806740a6 -mem-write: 0x80014922 <- 0x7370000 -mem-write: 0x80014926 <- 0x7930100 -mem-write: 0x8001492a <- 0x6ae30100 -mem-write: 0x8001492e <- 0x793fce5 -mem-write: 0x80014932 <- 0xf06f0180 -mem-write: 0x80014936 <- 0x5245fcdf -mem-write: 0x8001493a <- 0x3a524f52 -mem-write: 0x8001493e <- 0x6e755f20 -mem-write: 0x80014942 <- 0x6b6e696c -mem-write: 0x80014946 <- 0x746f6e20 -mem-write: 0x8001494a <- 0x74657920 -mem-write: 0x8001494e <- 0x706d6920 -mem-write: 0x80014952 <- 0x656d656c -mem-write: 0x80014956 <- 0x6465746e -mem-write: 0x8001495a <- 0x5245000a -mem-write: 0x8001495e <- 0x3a524f52 -mem-write: 0x80014962 <- 0x696c5f20 -mem-write: 0x80014966 <- 0x6e206b6e -mem-write: 0x8001496a <- 0x7920746f -mem-write: 0x8001496e <- 0x69207465 -mem-write: 0x80014972 <- 0x656c706d -mem-write: 0x80014976 <- 0x746e656d -mem-write: 0x8001497a <- 0xa6465 -mem-write: 0x8001497e <- 0x300000 -mem-write: 0x80014982 <- 0x310000 -mem-write: 0x80014986 <- 0x320000 -mem-write: 0x8001498a <- 0x330000 -mem-write: 0x8001498e <- 0x340000 -mem-write: 0x80014992 <- 0x350000 -mem-write: 0x80014996 <- 0x360000 -mem-write: 0x8001499a <- 0x370000 -mem-write: 0x8001499e <- 0x380000 -mem-write: 0x800149a2 <- 0x390000 -mem-write: 0x800149a6 <- 0x610000 -mem-write: 0x800149aa <- 0x620000 -mem-write: 0x800149ae <- 0x630000 -mem-write: 0x800149b2 <- 0x640000 -mem-write: 0x800149b6 <- 0x650000 -mem-write: 0x800149ba <- 0x660000 -mem-write: 0x800149be <- 0x49800000 -mem-write: 0x800149c2 <- 0x49848001 -mem-write: 0x800149c6 <- 0x49888001 -mem-write: 0x800149ca <- 0x498c8001 -mem-write: 0x800149ce <- 0x49908001 -mem-write: 0x800149d2 <- 0x49948001 -mem-write: 0x800149d6 <- 0x49988001 -mem-write: 0x800149da <- 0x499c8001 -mem-write: 0x800149de <- 0x49a08001 -mem-write: 0x800149e2 <- 0x49a48001 -mem-write: 0x800149e6 <- 0x49a88001 -mem-write: 0x800149ea <- 0x49ac8001 -mem-write: 0x800149ee <- 0x49b08001 -mem-write: 0x800149f2 <- 0x49b48001 -mem-write: 0x800149f6 <- 0x49b88001 -mem-write: 0x800149fa <- 0x49bc8001 -mem-write: 0x800149fe <- 0x64258001 -mem-write: 0x80014a02 <- 0x656b000a -mem-write: 0x80014a06 <- 0x6c656e72 -mem-write: 0x80014a0a <- 0x65786520 -mem-write: 0x80014a0e <- 0x69747563 -mem-write: 0x80014a12 <- 0x2e2e676e -mem-write: 0x80014a16 <- 0xa2e -mem-write: 0x80014a1a <- 0x656b0000 -mem-write: 0x80014a1e <- 0x6c656e72 -mem-write: 0x80014a22 <- 0x6e6f6420 -mem-write: 0x80014a26 <- 0xa2e65 -mem-write: 0x80014a2a <- 0x4e490000 -mem-write: 0x80014a2e <- 0x6e690046 -mem-write: 0x80014a32 <- 0x414e0066 -mem-write: 0x80014a36 <- 0x616e004e -mem-write: 0x80014a3a <- 0x3130006e -mem-write: 0x80014a3e <- 0x35343332 -mem-write: 0x80014a42 <- 0x39383736 -mem-write: 0x80014a46 <- 0x64636261 -mem-write: 0x80014a4a <- 0x6665 -mem-write: 0x80014a4e <- 0x31300000 -mem-write: 0x80014a52 <- 0x35343332 -mem-write: 0x80014a56 <- 0x39383736 -mem-write: 0x80014a5a <- 0x44434241 -mem-write: 0x80014a5e <- 0x4645 -mem-write: 0x80014a62 <- 0x6e280000 -mem-write: 0x80014a66 <- 0x296c6c75 -mem-write: 0x80014a6a <- 0x1b080000 -mem-write: 0x80014a6e <- 0x11888000 -mem-write: 0x80014a72 <- 0x11888000 -mem-write: 0x80014a76 <- 0x1afc8000 -mem-write: 0x80014a7a <- 0x11888000 -mem-write: 0x80014a7e <- 0x11888000 -mem-write: 0x80014a82 <- 0x11888000 -mem-write: 0x80014a86 <- 0x137c8000 -mem-write: 0x80014a8a <- 0x11888000 -mem-write: 0x80014a8e <- 0x11888000 -mem-write: 0x80014a92 <- 0x1ad88000 -mem-write: 0x80014a96 <- 0x1a788000 -mem-write: 0x80014a9a <- 0x11888000 -mem-write: 0x80014a9e <- 0x19648000 -mem-write: 0x80014aa2 <- 0x1a948000 -mem-write: 0x80014aa6 <- 0x11888000 -mem-write: 0x80014aaa <- 0x1a888000 -mem-write: 0x80014aae <- 0x11588000 -mem-write: 0x80014ab2 <- 0x11588000 -mem-write: 0x80014ab6 <- 0x11588000 -mem-write: 0x80014aba <- 0x11588000 -mem-write: 0x80014abe <- 0x11588000 -mem-write: 0x80014ac2 <- 0x11588000 -mem-write: 0x80014ac6 <- 0x11588000 -mem-write: 0x80014aca <- 0x11588000 -mem-write: 0x80014ace <- 0x11588000 -mem-write: 0x80014ad2 <- 0x11888000 -mem-write: 0x80014ad6 <- 0x11888000 -mem-write: 0x80014ada <- 0x11888000 -mem-write: 0x80014ade <- 0x11888000 -mem-write: 0x80014ae2 <- 0x11888000 -mem-write: 0x80014ae6 <- 0x11888000 -mem-write: 0x80014aea <- 0x11888000 -mem-write: 0x80014aee <- 0x13f88000 -mem-write: 0x80014af2 <- 0x11888000 -mem-write: 0x80014af6 <- 0x18b48000 -mem-write: 0x80014afa <- 0x1b988000 -mem-write: 0x80014afe <- 0x13f88000 -mem-write: 0x80014b02 <- 0x13f88000 -mem-write: 0x80014b06 <- 0x13f88000 -mem-write: 0x80014b0a <- 0x11888000 -mem-write: 0x80014b0e <- 0x11888000 -mem-write: 0x80014b12 <- 0x11888000 -mem-write: 0x80014b16 <- 0x11888000 -mem-write: 0x80014b1a <- 0x1b8c8000 -mem-write: 0x80014b1e <- 0x11888000 -mem-write: 0x80014b22 <- 0x11888000 -mem-write: 0x80014b26 <- 0x1b208000 -mem-write: 0x80014b2a <- 0x11888000 -mem-write: 0x80014b2e <- 0x11888000 -mem-write: 0x80014b32 <- 0x11888000 -mem-write: 0x80014b36 <- 0x18e08000 -mem-write: 0x80014b3a <- 0x11888000 -mem-write: 0x80014b3e <- 0x1b588000 -mem-write: 0x80014b42 <- 0x11888000 -mem-write: 0x80014b46 <- 0x11888000 -mem-write: 0x80014b4a <- 0x26548000 -mem-write: 0x80014b4e <- 0x11888000 -mem-write: 0x80014b52 <- 0x11888000 -mem-write: 0x80014b56 <- 0x11888000 -mem-write: 0x80014b5a <- 0x11888000 -mem-write: 0x80014b5e <- 0x11888000 -mem-write: 0x80014b62 <- 0x11888000 -mem-write: 0x80014b66 <- 0x11888000 -mem-write: 0x80014b6a <- 0x11888000 -mem-write: 0x80014b6e <- 0x13f88000 -mem-write: 0x80014b72 <- 0x11888000 -mem-write: 0x80014b76 <- 0x18b48000 -mem-write: 0x80014b7a <- 0x24c88000 -mem-write: 0x80014b7e <- 0x13f88000 -mem-write: 0x80014b82 <- 0x13f88000 -mem-write: 0x80014b86 <- 0x13f88000 -mem-write: 0x80014b8a <- 0x1a648000 -mem-write: 0x80014b8e <- 0x24c88000 -mem-write: 0x80014b92 <- 0x13c08000 -mem-write: 0x80014b96 <- 0x11888000 -mem-write: 0x80014b9a <- 0x19c08000 -mem-write: 0x80014b9e <- 0x11888000 -mem-write: 0x80014ba2 <- 0x19708000 -mem-write: 0x80014ba6 <- 0x26688000 -mem-write: 0x80014baa <- 0x19d48000 -mem-write: 0x80014bae <- 0x13c08000 -mem-write: 0x80014bb2 <- 0x11888000 -mem-write: 0x80014bb6 <- 0x18e08000 -mem-write: 0x80014bba <- 0x13b88000 -mem-write: 0x80014bbe <- 0x25e88000 -mem-write: 0x80014bc2 <- 0x11888000 -mem-write: 0x80014bc6 <- 0x11888000 -mem-write: 0x80014bca <- 0x25f48000 -mem-write: 0x80014bce <- 0x11888000 -mem-write: 0x80014bd2 <- 0x13b88000 -mem-write: 0x80014bd6 <- 0x20208000 -mem-write: 0x80014bda <- 0x20202020 -mem-write: 0x80014bde <- 0x20202020 -mem-write: 0x80014be2 <- 0x20202020 -mem-write: 0x80014be6 <- 0x30302020 -mem-write: 0x80014bea <- 0x30303030 -mem-write: 0x80014bee <- 0x30303030 -mem-write: 0x80014bf2 <- 0x30303030 -VXDRV: upload 1024 bytes to 0x80014bf6 -mem-write: 0x80014bf6 <- 0x4e203030 -mem-write: 0x80014bfa <- 0x204e61 -mem-write: 0x80014bfe <- 0x2d200000 -mem-write: 0x80014c02 <- 0x69666e49 -mem-write: 0x80014c06 <- 0x7974696e -mem-write: 0x80014c0a <- 0x49200020 -mem-write: 0x80014c0e <- 0x6e69666e -mem-write: 0x80014c12 <- 0x20797469 -mem-write: 0x80014c16 <- 0x614e0000 -mem-write: 0x80014c1a <- 0x2545004e -mem-write: 0x80014c1e <- 0x64 -mem-write: 0x80014c22 <- 0x0 -mem-write: 0x80014c26 <- 0x0 -mem-write: 0x80014c2a <- 0x0 -mem-write: 0x80014c2e <- 0x0 -mem-write: 0x80014c32 <- 0x0 -mem-write: 0x80014c36 <- 0x0 -mem-write: 0x80014c3a <- 0x0 -mem-write: 0x80014c3e <- 0x0 -mem-write: 0x80014c42 <- 0x80000000 -mem-write: 0x80014c46 <- 0x65763fff -mem-write: 0x80014c4a <- 0x804a4a92 -mem-write: 0x80014c4e <- 0xc94c153f -mem-write: 0x80014c52 <- 0x8a20979a -mem-write: 0x80014c56 <- 0xc4605202 -mem-write: 0x80014c5a <- 0x6a327525 -mem-write: 0x80014c5e <- 0x329ace52 -mem-write: 0x80014c62 <- 0xa74d28ce -mem-write: 0x80014c66 <- 0xc53d5de4 -mem-write: 0x80014c6a <- 0x9e8b3b5d -mem-write: 0x80014c6e <- 0x526c5a92 -mem-write: 0x80014c72 <- 0xf18b50ce -mem-write: 0x80014c76 <- 0x650d3d28 -mem-write: 0x80014c7a <- 0x81750c17 -mem-write: 0x80014c7e <- 0xc9767586 -mem-write: 0x80014c82 <- 0x9c664d48 -mem-write: 0x80014c86 <- 0xbc5058f8 -mem-write: 0x80014c8a <- 0xcc655c54 -mem-write: 0x80014c8e <- 0xa60e91c6 -mem-write: 0x80014c92 <- 0xe319a0ae -mem-write: 0x80014c96 <- 0x851e46a3 -mem-write: 0x80014c9a <- 0x98feeab7 -mem-write: 0x80014c9e <- 0xddbb901b -mem-write: 0x80014ca2 <- 0x9df9de8d -mem-write: 0x80014ca6 <- 0xaa7eebfb -mem-write: 0x80014caa <- 0x2354351 -mem-write: 0x80014cae <- 0x36b10137 -mem-write: 0x80014cb2 <- 0xc66f336c -mem-write: 0x80014cb6 <- 0x80e98cdf -mem-write: 0x80014cba <- 0x93ba47c9 -mem-write: 0x80014cbe <- 0x50f841a8 -mem-write: 0x80014cc2 <- 0xc76b25fb -mem-write: 0x80014cc6 <- 0x3cbf6b71 -mem-write: 0x80014cca <- 0xffcfa6d5 -mem-write: 0x80014cce <- 0xc2781f49 -mem-write: 0x80014cd2 <- 0x40d3 -mem-write: 0x80014cd6 <- 0x0 -mem-write: 0x80014cda <- 0xf0200000 -mem-write: 0x80014cde <- 0x2b70b59d -mem-write: 0x80014ce2 <- 0x9dc5ada8 -mem-write: 0x80014ce6 <- 0x4069 -mem-write: 0x80014cea <- 0x0 -mem-write: 0x80014cee <- 0x0 -mem-write: 0x80014cf2 <- 0x4000000 -mem-write: 0x80014cf6 <- 0x8e1bc9bf -mem-write: 0x80014cfa <- 0x4034 -mem-write: 0x80014cfe <- 0x0 -mem-write: 0x80014d02 <- 0x0 -mem-write: 0x80014d06 <- 0x0 -mem-write: 0x80014d0a <- 0xbebc2000 -mem-write: 0x80014d0e <- 0x4019 -mem-write: 0x80014d12 <- 0x0 -mem-write: 0x80014d16 <- 0x0 -mem-write: 0x80014d1a <- 0x0 -mem-write: 0x80014d1e <- 0x9c400000 -mem-write: 0x80014d22 <- 0x400c -mem-write: 0x80014d26 <- 0x0 -mem-write: 0x80014d2a <- 0x0 -mem-write: 0x80014d2e <- 0x0 -mem-write: 0x80014d32 <- 0xc8000000 -mem-write: 0x80014d36 <- 0x4005 -mem-write: 0x80014d3a <- 0x0 -mem-write: 0x80014d3e <- 0x0 -mem-write: 0x80014d42 <- 0x0 -mem-write: 0x80014d46 <- 0xa0000000 -mem-write: 0x80014d4a <- 0x20304002 -mem-write: 0x80014d4e <- 0xa1c3cffc -mem-write: 0x80014d52 <- 0x2de38123 -mem-write: 0x80014d56 <- 0xd2ce9fde -mem-write: 0x80014d5a <- 0xa6dd04c8 -mem-write: 0x80014d5e <- 0x82640ad8 -mem-write: 0x80014d62 <- 0xf2ead2cb -mem-write: 0x80014d66 <- 0x492512d4 -mem-write: 0x80014d6a <- 0x34362de4 -mem-write: 0x80014d6e <- 0xceae534f -mem-write: 0x80014d72 <- 0xf53f256b -mem-write: 0x80014d76 <- 0x6bd3f698 -mem-write: 0x80014d7a <- 0x87a60158 -mem-write: 0x80014d7e <- 0xda57c0bd -mem-write: 0x80014d82 <- 0xa2a682a5 -mem-write: 0x80014d86 <- 0xe73132b5 -mem-write: 0x80014d8a <- 0xe3f204d4 -mem-write: 0x80014d8e <- 0x7132d332 -mem-write: 0x80014d92 <- 0xdb23d21c -mem-write: 0x80014d96 <- 0x9049ee32 -mem-write: 0x80014d9a <- 0xa23e395a -mem-write: 0x80014d9e <- 0xfefb5308 -mem-write: 0x80014da2 <- 0xfa911155 -mem-write: 0x80014da6 <- 0x637a1939 -mem-write: 0x80014daa <- 0xc0314325 -mem-write: 0x80014dae <- 0xe26d3cac -mem-write: 0x80014db2 <- 0xd05ddbde -mem-write: 0x80014db6 <- 0xac7cb3f6 -mem-write: 0x80014dba <- 0x64bce4a0 -mem-write: 0x80014dbe <- 0xddd0467c -mem-write: 0x80014dc2 <- 0x2a203e55 -mem-write: 0x80014dc6 <- 0x47b36224 -mem-write: 0x80014dca <- 0x3f2398d7 -mem-write: 0x80014dce <- 0xa539e9a5 -mem-write: 0x80014dd2 <- 0xa87fea27 -mem-write: 0x80014dd6 <- 0xb5b3f2a -mem-write: 0x80014dda <- 0xa5814af2 -mem-write: 0x80014dde <- 0x67de18ed -mem-write: 0x80014de2 <- 0x453994ba -mem-write: 0x80014de6 <- 0xcfb11ead -mem-write: 0x80014dea <- 0xbf713f94 -mem-write: 0x80014dee <- 0x7989a9b3 -mem-write: 0x80014df2 <- 0x4c2ebe68 -mem-write: 0x80014df6 <- 0xc44de15b -mem-write: 0x80014dfa <- 0xe69594be -mem-write: 0x80014dfe <- 0x3d4d3fc9 -mem-write: 0x80014e02 <- 0x36ba7c3d -mem-write: 0x80014e06 <- 0xfdc20d2b -mem-write: 0x80014e0a <- 0x8461cefc -mem-write: 0x80014e0e <- 0xabcc7711 -mem-write: 0x80014e12 <- 0xc1553fe4 -mem-write: 0x80014e16 <- 0x404ea4a8 -mem-write: 0x80014e1a <- 0xd3c36113 -mem-write: 0x80014e1e <- 0xe219652b -mem-write: 0x80014e22 <- 0xd1b71758 -mem-write: 0x80014e26 <- 0xd70a3ff1 -mem-write: 0x80014e2a <- 0xa3d70a3 -mem-write: 0x80014e2e <- 0x3d70a3d7 -mem-write: 0x80014e32 <- 0x70a3d70a -mem-write: 0x80014e36 <- 0xa3d70a3d -mem-write: 0x80014e3a <- 0xcccd3ff8 -mem-write: 0x80014e3e <- 0xcccccccc -mem-write: 0x80014e42 <- 0xcccccccc -mem-write: 0x80014e46 <- 0xcccccccc -mem-write: 0x80014e4a <- 0xcccccccc -mem-write: 0x80014e4e <- 0xffff3ffb -mem-write: 0x80014e52 <- 0xfffcfffe -mem-write: 0x80014e56 <- 0xfff0fff8 -mem-write: 0x80014e5a <- 0xffc0ffe0 -mem-write: 0x80014e5e <- 0xff00ff80 -mem-write: 0x80014e62 <- 0xfc00fe00 -mem-write: 0x80014e66 <- 0xf000f800 -mem-write: 0x80014e6a <- 0xc000e000 -mem-write: 0x80014e6e <- 0x8000 -mem-write: 0x80014e72 <- 0x61420000 -mem-write: 0x80014e76 <- 0x636f6c6c -mem-write: 0x80014e7a <- 0x63757320 -mem-write: 0x80014e7e <- 0x64656563 -mem-write: 0x80014e82 <- 0x6465 -mem-write: 0x80014e86 <- 0x682f0000 -mem-write: 0x80014e8a <- 0x2f656d6f -mem-write: 0x80014e8e <- 0x69616c62 -mem-write: 0x80014e92 <- 0x642f6573 -mem-write: 0x80014e96 <- 0x722f7665 -mem-write: 0x80014e9a <- 0x76637369 -mem-write: 0x80014e9e <- 0x756e672d -mem-write: 0x80014ea2 <- 0x6f6f742d -mem-write: 0x80014ea6 <- 0x6168636c -mem-write: 0x80014eaa <- 0x2f326e69 -mem-write: 0x80014eae <- 0x6c697562 -mem-write: 0x80014eb2 <- 0x2e2e2f64 -mem-write: 0x80014eb6 <- 0x7369722f -mem-write: 0x80014eba <- 0x6e2d7663 -mem-write: 0x80014ebe <- 0x696c7765 -mem-write: 0x80014ec2 <- 0x656e2f62 -mem-write: 0x80014ec6 <- 0x62696c77 -mem-write: 0x80014eca <- 0x62696c2f -mem-write: 0x80014ece <- 0x74732f63 -mem-write: 0x80014ed2 <- 0x62696c64 -mem-write: 0x80014ed6 <- 0x72706d2f -mem-write: 0x80014eda <- 0x632e6365 -mem-write: 0x80014ede <- 0x50000 -mem-write: 0x80014ee2 <- 0x190000 -mem-write: 0x80014ee6 <- 0x7d0000 -mem-write: 0x80014eea <- 0x0 -mem-write: 0x80014eee <- 0x0 -mem-write: 0x80014ef2 <- 0x0 -mem-write: 0x80014ef6 <- 0x3ff0 -mem-write: 0x80014efa <- 0x0 -mem-write: 0x80014efe <- 0x4024 -mem-write: 0x80014f02 <- 0x0 -mem-write: 0x80014f06 <- 0x4059 -mem-write: 0x80014f0a <- 0x40000000 -mem-write: 0x80014f0e <- 0x408f -mem-write: 0x80014f12 <- 0x88000000 -mem-write: 0x80014f16 <- 0x40c3 -mem-write: 0x80014f1a <- 0x6a000000 -mem-write: 0x80014f1e <- 0x40f8 -mem-write: 0x80014f22 <- 0x84800000 -mem-write: 0x80014f26 <- 0x412e -mem-write: 0x80014f2a <- 0x12d00000 -mem-write: 0x80014f2e <- 0x4163 -mem-write: 0x80014f32 <- 0xd7840000 -mem-write: 0x80014f36 <- 0x4197 -mem-write: 0x80014f3a <- 0xcd650000 -mem-write: 0x80014f3e <- 0x41cd -mem-write: 0x80014f42 <- 0xa05f2000 -mem-write: 0x80014f46 <- 0x4202 -mem-write: 0x80014f4a <- 0x4876e800 -mem-write: 0x80014f4e <- 0x4237 -mem-write: 0x80014f52 <- 0x1a94a200 -mem-write: 0x80014f56 <- 0x426d -mem-write: 0x80014f5a <- 0x309ce540 -mem-write: 0x80014f5e <- 0x42a2 -mem-write: 0x80014f62 <- 0xbcc41e90 -mem-write: 0x80014f66 <- 0x42d6 -mem-write: 0x80014f6a <- 0x6bf52634 -mem-write: 0x80014f6e <- 0x8000430c -mem-write: 0x80014f72 <- 0xc37937e0 -mem-write: 0x80014f76 <- 0xa0004341 -mem-write: 0x80014f7a <- 0x345785d8 -mem-write: 0x80014f7e <- 0xc8004376 -mem-write: 0x80014f82 <- 0xc16d674e -mem-write: 0x80014f86 <- 0x3d0043ab -mem-write: 0x80014f8a <- 0x58e46091 -mem-write: 0x80014f8e <- 0x8c4043e1 -mem-write: 0x80014f92 <- 0xaf1d78b5 -mem-write: 0x80014f96 <- 0xef504415 -mem-write: 0x80014f9a <- 0x1ae4d6e2 -mem-write: 0x80014f9e <- 0xd592444b -mem-write: 0x80014fa2 <- 0xf0cf064d -mem-write: 0x80014fa6 <- 0x4af64480 -mem-write: 0x80014faa <- 0x2d02c7e1 -mem-write: 0x80014fae <- 0x9db444b5 -mem-write: 0x80014fb2 <- 0x784379d9 -mem-write: 0x80014fb6 <- 0x89bc44ea -mem-write: 0x80014fba <- 0xd2b297d8 -mem-write: 0x80014fbe <- 0xa7333c9c -mem-write: 0x80014fc2 <- 0xf623d5a8 -mem-write: 0x80014fc6 <- 0xa73d3949 -mem-write: 0x80014fca <- 0xffd44f4 -mem-write: 0x80014fce <- 0x979d32a5 -mem-write: 0x80014fd2 <- 0xba08cf8c -mem-write: 0x80014fd6 <- 0x6f43255b -mem-write: 0x80014fda <- 0x62864ac -mem-write: 0x80014fde <- 0x80000ac8 -mem-write: 0x80014fe2 <- 0xc37937e0 -mem-write: 0x80014fe6 <- 0x6e174341 -mem-write: 0x80014fea <- 0xb8b5b505 -mem-write: 0x80014fee <- 0xf9f54693 -mem-write: 0x80014ff2 <- 0x4f03e93f -VXDRV: upload 1024 bytes to 0x80014ff6 -mem-write: 0x80014ff6 <- 0x1d324d38 -mem-write: 0x80014ffa <- 0x7748f930 -mem-write: 0x80014ffe <- 0xbf3c5a82 -mem-write: 0x80015002 <- 0x4fdd7f73 -mem-write: 0x80015006 <- 0xa1ac7515 -mem-write: 0x8001500a <- 0x97d48000 -mem-write: 0x8001500e <- 0x97d48000 -mem-write: 0x80015012 <- 0xa1a08000 -mem-write: 0x80015016 <- 0x97d48000 -mem-write: 0x8001501a <- 0x97d48000 -mem-write: 0x8001501e <- 0x97d48000 -mem-write: 0x80015022 <- 0x997c8000 -mem-write: 0x80015026 <- 0x97d48000 -mem-write: 0x8001502a <- 0x97d48000 -mem-write: 0x8001502e <- 0xa17c8000 -mem-write: 0x80015032 <- 0xa2148000 -mem-write: 0x80015036 <- 0x97d48000 -mem-write: 0x8001503a <- 0x9ff08000 -mem-write: 0x8001503e <- 0xa1d08000 -mem-write: 0x80015042 <- 0x97d48000 -mem-write: 0x80015046 <- 0xa1c48000 -mem-write: 0x8001504a <- 0x97a48000 -mem-write: 0x8001504e <- 0x97a48000 -mem-write: 0x80015052 <- 0x97a48000 -mem-write: 0x80015056 <- 0x97a48000 -mem-write: 0x8001505a <- 0x97a48000 -mem-write: 0x8001505e <- 0x97a48000 -mem-write: 0x80015062 <- 0x97a48000 -mem-write: 0x80015066 <- 0x97a48000 -mem-write: 0x8001506a <- 0x97a48000 -mem-write: 0x8001506e <- 0x97d48000 -mem-write: 0x80015072 <- 0x97d48000 -mem-write: 0x80015076 <- 0x97d48000 -mem-write: 0x8001507a <- 0x97d48000 -mem-write: 0x8001507e <- 0x97d48000 -mem-write: 0x80015082 <- 0x97d48000 -mem-write: 0x80015086 <- 0x97d48000 -mem-write: 0x8001508a <- 0x99f88000 -mem-write: 0x8001508e <- 0x97d48000 -mem-write: 0x80015092 <- 0x9fc48000 -mem-write: 0x80015096 <- 0xa2248000 -mem-write: 0x8001509a <- 0x99f88000 -mem-write: 0x8001509e <- 0x99f88000 -mem-write: 0x800150a2 <- 0x99f88000 -mem-write: 0x800150a6 <- 0x97d48000 -mem-write: 0x800150aa <- 0x97d48000 -mem-write: 0x800150ae <- 0x97d48000 -mem-write: 0x800150b2 <- 0x97d48000 -mem-write: 0x800150b6 <- 0xa1708000 -mem-write: 0x800150ba <- 0x97d48000 -mem-write: 0x800150be <- 0x97d48000 -mem-write: 0x800150c2 <- 0xa0f08000 -mem-write: 0x800150c6 <- 0x97d48000 -mem-write: 0x800150ca <- 0x97d48000 -mem-write: 0x800150ce <- 0x97d48000 -mem-write: 0x800150d2 <- 0x9f408000 -mem-write: 0x800150d6 <- 0x97d48000 -mem-write: 0x800150da <- 0xa13c8000 -mem-write: 0x800150de <- 0x97d48000 -mem-write: 0x800150e2 <- 0x97d48000 -mem-write: 0x800150e6 <- 0xabd48000 -mem-write: 0x800150ea <- 0x97d48000 -mem-write: 0x800150ee <- 0x97d48000 -mem-write: 0x800150f2 <- 0x97d48000 -mem-write: 0x800150f6 <- 0x97d48000 -mem-write: 0x800150fa <- 0x97d48000 -mem-write: 0x800150fe <- 0x97d48000 -mem-write: 0x80015102 <- 0x97d48000 -mem-write: 0x80015106 <- 0x97d48000 -mem-write: 0x8001510a <- 0x99f88000 -mem-write: 0x8001510e <- 0x97d48000 -mem-write: 0x80015112 <- 0x9fc48000 -mem-write: 0x80015116 <- 0xaa7c8000 -mem-write: 0x8001511a <- 0x99f88000 -mem-write: 0x8001511e <- 0x99f88000 -mem-write: 0x80015122 <- 0x99f88000 -mem-write: 0x80015126 <- 0xa1288000 -mem-write: 0x8001512a <- 0xaa7c8000 -mem-write: 0x8001512e <- 0x99c08000 -mem-write: 0x80015132 <- 0x97d48000 -mem-write: 0x80015136 <- 0xa04c8000 -mem-write: 0x8001513a <- 0x97d48000 -mem-write: 0x8001513e <- 0x9ffc8000 -mem-write: 0x80015142 <- 0xabe88000 -mem-write: 0x80015146 <- 0xa0608000 -mem-write: 0x8001514a <- 0x99c08000 -mem-write: 0x8001514e <- 0x97d48000 -mem-write: 0x80015152 <- 0x9f408000 -mem-write: 0x80015156 <- 0x99b88000 -mem-write: 0x8001515a <- 0xab488000 -mem-write: 0x8001515e <- 0x97d48000 -mem-write: 0x80015162 <- 0x97d48000 -mem-write: 0x80015166 <- 0xab548000 -mem-write: 0x8001516a <- 0x97d48000 -mem-write: 0x8001516e <- 0x99b88000 -mem-write: 0x80015172 <- 0x20208000 -mem-write: 0x80015176 <- 0x20202020 -mem-write: 0x8001517a <- 0x20202020 -mem-write: 0x8001517e <- 0x20202020 -mem-write: 0x80015182 <- 0x30302020 -mem-write: 0x80015186 <- 0x30303030 -mem-write: 0x8001518a <- 0x30303030 -mem-write: 0x8001518e <- 0x30303030 -mem-write: 0x80015192 <- 0xc8cc3030 -mem-write: 0x80015196 <- 0xc33c8000 -mem-write: 0x8001519a <- 0xc33c8000 -mem-write: 0x8001519e <- 0xc8c08000 -mem-write: 0x800151a2 <- 0xc33c8000 -mem-write: 0x800151a6 <- 0xc33c8000 -mem-write: 0x800151aa <- 0xc33c8000 -mem-write: 0x800151ae <- 0xc5048000 -mem-write: 0x800151b2 <- 0xc33c8000 -mem-write: 0x800151b6 <- 0xc33c8000 -mem-write: 0x800151ba <- 0xc8948000 -mem-write: 0x800151be <- 0xc8f08000 -mem-write: 0x800151c2 <- 0xc33c8000 -mem-write: 0x800151c6 <- 0xc8e48000 -mem-write: 0x800151ca <- 0xc9008000 -mem-write: 0x800151ce <- 0xc33c8000 -mem-write: 0x800151d2 <- 0xc8888000 -mem-write: 0x800151d6 <- 0xc3048000 -mem-write: 0x800151da <- 0xc3048000 -mem-write: 0x800151de <- 0xc3048000 -mem-write: 0x800151e2 <- 0xc3048000 -mem-write: 0x800151e6 <- 0xc3048000 -mem-write: 0x800151ea <- 0xc3048000 -mem-write: 0x800151ee <- 0xc3048000 -mem-write: 0x800151f2 <- 0xc3048000 -mem-write: 0x800151f6 <- 0xc3048000 -mem-write: 0x800151fa <- 0xc33c8000 -mem-write: 0x800151fe <- 0xc33c8000 -mem-write: 0x80015202 <- 0xc33c8000 -mem-write: 0x80015206 <- 0xc33c8000 -mem-write: 0x8001520a <- 0xc33c8000 -mem-write: 0x8001520e <- 0xc33c8000 -mem-write: 0x80015212 <- 0xc33c8000 -mem-write: 0x80015216 <- 0xc33c8000 -mem-write: 0x8001521a <- 0xc33c8000 -mem-write: 0x8001521e <- 0xc7d08000 -mem-write: 0x80015222 <- 0xc5548000 -mem-write: 0x80015226 <- 0xc33c8000 -mem-write: 0x8001522a <- 0xc33c8000 -mem-write: 0x8001522e <- 0xc33c8000 -mem-write: 0x80015232 <- 0xc33c8000 -mem-write: 0x80015236 <- 0xc33c8000 -mem-write: 0x8001523a <- 0xc33c8000 -mem-write: 0x8001523e <- 0xc33c8000 -mem-write: 0x80015242 <- 0xc33c8000 -mem-write: 0x80015246 <- 0xc33c8000 -mem-write: 0x8001524a <- 0xc33c8000 -mem-write: 0x8001524e <- 0xc61c8000 -mem-write: 0x80015252 <- 0xc33c8000 -mem-write: 0x80015256 <- 0xc33c8000 -mem-write: 0x8001525a <- 0xc33c8000 -mem-write: 0x8001525e <- 0xc7908000 -mem-write: 0x80015262 <- 0xc33c8000 -mem-write: 0x80015266 <- 0xc8588000 -mem-write: 0x8001526a <- 0xc33c8000 -mem-write: 0x8001526e <- 0xc33c8000 -mem-write: 0x80015272 <- 0xd0488000 -mem-write: 0x80015276 <- 0xc33c8000 -mem-write: 0x8001527a <- 0xc33c8000 -mem-write: 0x8001527e <- 0xc33c8000 -mem-write: 0x80015282 <- 0xc33c8000 -mem-write: 0x80015286 <- 0xc33c8000 -mem-write: 0x8001528a <- 0xc33c8000 -mem-write: 0x8001528e <- 0xc33c8000 -mem-write: 0x80015292 <- 0xc33c8000 -mem-write: 0x80015296 <- 0xc33c8000 -mem-write: 0x8001529a <- 0xc33c8000 -mem-write: 0x8001529e <- 0xc7d08000 -mem-write: 0x800152a2 <- 0xc5588000 -mem-write: 0x800152a6 <- 0xc33c8000 -mem-write: 0x800152aa <- 0xc33c8000 -mem-write: 0x800152ae <- 0xc33c8000 -mem-write: 0x800152b2 <- 0xc8448000 -mem-write: 0x800152b6 <- 0xc5588000 -mem-write: 0x800152ba <- 0xc5488000 -mem-write: 0x800152be <- 0xc33c8000 -mem-write: 0x800152c2 <- 0xc8308000 -mem-write: 0x800152c6 <- 0xc33c8000 -mem-write: 0x800152ca <- 0xc9408000 -mem-write: 0x800152ce <- 0xc6208000 -mem-write: 0x800152d2 <- 0xc7f88000 -mem-write: 0x800152d6 <- 0xc5488000 -mem-write: 0x800152da <- 0xc33c8000 -mem-write: 0x800152de <- 0xc7908000 -mem-write: 0x800152e2 <- 0xc5408000 -mem-write: 0x800152e6 <- 0xd0408000 -mem-write: 0x800152ea <- 0xc33c8000 -mem-write: 0x800152ee <- 0xc33c8000 -mem-write: 0x800152f2 <- 0xd0a48000 -mem-write: 0x800152f6 <- 0xc33c8000 -mem-write: 0x800152fa <- 0xc5408000 -mem-write: 0x800152fe <- 0x20208000 -mem-write: 0x80015302 <- 0x20202020 -mem-write: 0x80015306 <- 0x20202020 -mem-write: 0x8001530a <- 0x20202020 -mem-write: 0x8001530e <- 0x30302020 -mem-write: 0x80015312 <- 0x30303030 -mem-write: 0x80015316 <- 0x30303030 -mem-write: 0x8001531a <- 0x30303030 -mem-write: 0x8001531e <- 0x202c3030 -mem-write: 0x80015322 <- 0x636e7566 -mem-write: 0x80015326 <- 0x6e6f6974 -mem-write: 0x8001532a <- 0x203a -mem-write: 0x8001532e <- 0x73610000 -mem-write: 0x80015332 <- 0x74726573 -mem-write: 0x80015336 <- 0x206e6f69 -mem-write: 0x8001533a <- 0x22732522 -mem-write: 0x8001533e <- 0x69616620 -mem-write: 0x80015342 <- 0x3a64656c -mem-write: 0x80015346 <- 0x6c696620 -mem-write: 0x8001534a <- 0x25222065 -mem-write: 0x8001534e <- 0x202c2273 -mem-write: 0x80015352 <- 0x656e696c -mem-write: 0x80015356 <- 0x25642520 -mem-write: 0x8001535a <- 0xa732573 -mem-write: 0x8001535e <- 0x430000 -mem-write: 0x80015362 <- 0x4f500000 -mem-write: 0x80015366 <- 0x584953 -mem-write: 0x8001536a <- 0x2e0000 -mem-write: 0x8001536e <- 0xf3f40000 -mem-write: 0x80015372 <- 0xeea48000 -mem-write: 0x80015376 <- 0xeea48000 -mem-write: 0x8001537a <- 0xf3e88000 -mem-write: 0x8001537e <- 0xeea48000 -mem-write: 0x80015382 <- 0xeea48000 -mem-write: 0x80015386 <- 0xeea48000 -mem-write: 0x8001538a <- 0xf02c8000 -mem-write: 0x8001538e <- 0xeea48000 -mem-write: 0x80015392 <- 0xeea48000 -mem-write: 0x80015396 <- 0xf3bc8000 -mem-write: 0x8001539a <- 0xf3ac8000 -mem-write: 0x8001539e <- 0xeea48000 -mem-write: 0x800153a2 <- 0xf3a08000 -mem-write: 0x800153a6 <- 0xf3608000 -mem-write: 0x800153aa <- 0xeea48000 -mem-write: 0x800153ae <- 0xf3548000 -mem-write: 0x800153b2 <- 0xee6c8000 -mem-write: 0x800153b6 <- 0xee6c8000 -mem-write: 0x800153ba <- 0xee6c8000 -mem-write: 0x800153be <- 0xee6c8000 -mem-write: 0x800153c2 <- 0xee6c8000 -mem-write: 0x800153c6 <- 0xee6c8000 -mem-write: 0x800153ca <- 0xee6c8000 -mem-write: 0x800153ce <- 0xee6c8000 -mem-write: 0x800153d2 <- 0xee6c8000 -mem-write: 0x800153d6 <- 0xeea48000 -mem-write: 0x800153da <- 0xeea48000 -mem-write: 0x800153de <- 0xeea48000 -mem-write: 0x800153e2 <- 0xeea48000 -mem-write: 0x800153e6 <- 0xeea48000 -mem-write: 0x800153ea <- 0xeea48000 -mem-write: 0x800153ee <- 0xeea48000 -mem-write: 0x800153f2 <- 0xeea48000 -VXDRV: upload 1024 bytes to 0x800153f6 -mem-write: 0x800153f6 <- 0xeea48000 -mem-write: 0x800153fa <- 0xf0f48000 -mem-write: 0x800153fe <- 0xf2108000 -mem-write: 0x80015402 <- 0xeea48000 -mem-write: 0x80015406 <- 0xeea48000 -mem-write: 0x8001540a <- 0xeea48000 -mem-write: 0x8001540e <- 0xeea48000 -mem-write: 0x80015412 <- 0xeea48000 -mem-write: 0x80015416 <- 0xeea48000 -mem-write: 0x8001541a <- 0xeea48000 -mem-write: 0x8001541e <- 0xeea48000 -mem-write: 0x80015422 <- 0xeea48000 -mem-write: 0x80015426 <- 0xeea48000 -mem-write: 0x8001542a <- 0xf1a08000 -mem-write: 0x8001542e <- 0xeea48000 -mem-write: 0x80015432 <- 0xeea48000 -mem-write: 0x80015436 <- 0xeea48000 -mem-write: 0x8001543a <- 0xf0a88000 -mem-write: 0x8001543e <- 0xeea48000 -mem-write: 0x80015442 <- 0xf2e48000 -mem-write: 0x80015446 <- 0xeea48000 -mem-write: 0x8001544a <- 0xeea48000 -mem-write: 0x8001544e <- 0xfa948000 -mem-write: 0x80015452 <- 0xeea48000 -mem-write: 0x80015456 <- 0xeea48000 -mem-write: 0x8001545a <- 0xeea48000 -mem-write: 0x8001545e <- 0xeea48000 -mem-write: 0x80015462 <- 0xeea48000 -mem-write: 0x80015466 <- 0xeea48000 -mem-write: 0x8001546a <- 0xeea48000 -mem-write: 0x8001546e <- 0xeea48000 -mem-write: 0x80015472 <- 0xeea48000 -mem-write: 0x80015476 <- 0xeea48000 -mem-write: 0x8001547a <- 0xf0f48000 -mem-write: 0x8001547e <- 0xf11c8000 -mem-write: 0x80015482 <- 0xeea48000 -mem-write: 0x80015486 <- 0xeea48000 -mem-write: 0x8001548a <- 0xeea48000 -mem-write: 0x8001548e <- 0xf40c8000 -mem-write: 0x80015492 <- 0xf11c8000 -mem-write: 0x80015496 <- 0xf0708000 -mem-write: 0x8001549a <- 0xeea48000 -mem-write: 0x8001549e <- 0xf45c8000 -mem-write: 0x800154a2 <- 0xeea48000 -mem-write: 0x800154a6 <- 0xf4208000 -mem-write: 0x800154aa <- 0xfb008000 -mem-write: 0x800154ae <- 0xf3188000 -mem-write: 0x800154b2 <- 0xf0708000 -mem-write: 0x800154b6 <- 0xeea48000 -mem-write: 0x800154ba <- 0xf0a88000 -mem-write: 0x800154be <- 0xf0688000 -mem-write: 0x800154c2 <- 0xfaf48000 -mem-write: 0x800154c6 <- 0xeea48000 -mem-write: 0x800154ca <- 0xeea48000 -mem-write: 0x800154ce <- 0xfb088000 -mem-write: 0x800154d2 <- 0xeea48000 -mem-write: 0x800154d6 <- 0xf0688000 -mem-write: 0x800154da <- 0x20208000 -mem-write: 0x800154de <- 0x20202020 -mem-write: 0x800154e2 <- 0x20202020 -mem-write: 0x800154e6 <- 0x20202020 -mem-write: 0x800154ea <- 0x30302020 -mem-write: 0x800154ee <- 0x30303030 -mem-write: 0x800154f2 <- 0x30303030 -mem-write: 0x800154f6 <- 0x30303030 -mem-write: 0x800154fa <- 0x20003030 -mem-write: 0x800154fe <- 0x20202020 -mem-write: 0x80015502 <- 0x20202020 -mem-write: 0x80015506 <- 0x28282828 -mem-write: 0x8001550a <- 0x20202028 -mem-write: 0x8001550e <- 0x20202020 -mem-write: 0x80015512 <- 0x20202020 -mem-write: 0x80015516 <- 0x20202020 -mem-write: 0x8001551a <- 0x88202020 -mem-write: 0x8001551e <- 0x10101010 -mem-write: 0x80015522 <- 0x10101010 -mem-write: 0x80015526 <- 0x10101010 -mem-write: 0x8001552a <- 0x4101010 -mem-write: 0x8001552e <- 0x4040404 -mem-write: 0x80015532 <- 0x4040404 -mem-write: 0x80015536 <- 0x10101004 -mem-write: 0x8001553a <- 0x10101010 -mem-write: 0x8001553e <- 0x41414141 -mem-write: 0x80015542 <- 0x1014141 -mem-write: 0x80015546 <- 0x1010101 -mem-write: 0x8001554a <- 0x1010101 -mem-write: 0x8001554e <- 0x1010101 -mem-write: 0x80015552 <- 0x1010101 -mem-write: 0x80015556 <- 0x10100101 -mem-write: 0x8001555a <- 0x10101010 -mem-write: 0x8001555e <- 0x42424242 -mem-write: 0x80015562 <- 0x2024242 -mem-write: 0x80015566 <- 0x2020202 -mem-write: 0x8001556a <- 0x2020202 -mem-write: 0x8001556e <- 0x2020202 -mem-write: 0x80015572 <- 0x2020202 -mem-write: 0x80015576 <- 0x10100202 -mem-write: 0x8001557a <- 0x201010 -mem-write: 0x8001557e <- 0x0 -mem-write: 0x80015582 <- 0x0 -mem-write: 0x80015586 <- 0x0 -mem-write: 0x8001558a <- 0x0 -mem-write: 0x8001558e <- 0x0 -mem-write: 0x80015592 <- 0x0 -mem-write: 0x80015596 <- 0x0 -mem-write: 0x8001559a <- 0x0 -mem-write: 0x8001559e <- 0x0 -mem-write: 0x800155a2 <- 0x0 -mem-write: 0x800155a6 <- 0x0 -mem-write: 0x800155aa <- 0x0 -mem-write: 0x800155ae <- 0x0 -mem-write: 0x800155b2 <- 0x0 -mem-write: 0x800155b6 <- 0x0 -mem-write: 0x800155ba <- 0x0 -mem-write: 0x800155be <- 0x0 -mem-write: 0x800155c2 <- 0x0 -mem-write: 0x800155c6 <- 0x0 -mem-write: 0x800155ca <- 0x0 -mem-write: 0x800155ce <- 0x0 -mem-write: 0x800155d2 <- 0x0 -mem-write: 0x800155d6 <- 0x0 -mem-write: 0x800155da <- 0x0 -mem-write: 0x800155de <- 0x0 -mem-write: 0x800155e2 <- 0x0 -mem-write: 0x800155e6 <- 0x0 -mem-write: 0x800155ea <- 0x0 -mem-write: 0x800155ee <- 0x0 -mem-write: 0x800155f2 <- 0x0 -mem-write: 0x800155f6 <- 0x0 -mem-write: 0x800155fa <- 0x0 -mem-write: 0x800155fe <- 0x11f40000 -mem-write: 0x80015602 <- 0x12e48001 -mem-write: 0x80015606 <- 0x12048001 -mem-write: 0x8001560a <- 0x12e48001 -mem-write: 0x8001560e <- 0x12d08001 -mem-write: 0x80015612 <- 0x12e48001 -mem-write: 0x80015616 <- 0x12048001 -mem-write: 0x8001561a <- 0x11f48001 -mem-write: 0x8001561e <- 0x11f48001 -mem-write: 0x80015622 <- 0x12d08001 -mem-write: 0x80015626 <- 0x12048001 -mem-write: 0x8001562a <- 0x11cc8001 -mem-write: 0x8001562e <- 0x11cc8001 -mem-write: 0x80015632 <- 0x11cc8001 -mem-write: 0x80015636 <- 0x120c8001 -mem-write: 0x8001563a <- 0x17b88001 -mem-write: 0x8001563e <- 0x17b88001 -mem-write: 0x80015642 <- 0x17dc8001 -mem-write: 0x80015646 <- 0x17ac8001 -mem-write: 0x8001564a <- 0x17ac8001 -mem-write: 0x8001564e <- 0x189c8001 -mem-write: 0x80015652 <- 0x17dc8001 -mem-write: 0x80015656 <- 0x17ac8001 -mem-write: 0x8001565a <- 0x189c8001 -mem-write: 0x8001565e <- 0x17ac8001 -mem-write: 0x80015662 <- 0x17dc8001 -mem-write: 0x80015666 <- 0x17a88001 -mem-write: 0x8001566a <- 0x17a88001 -mem-write: 0x8001566e <- 0x17a88001 -mem-write: 0x80015672 <- 0x189c8001 -mem-write: 0x80015676 <- 0x29888001 -mem-write: 0x8001567a <- 0x29888001 -mem-write: 0x8001567e <- 0x29848001 -mem-write: 0x80015682 <- 0x29388001 -mem-write: 0x80015686 <- 0x29388001 -mem-write: 0x8001568a <- 0x2c088001 -mem-write: 0x8001568e <- 0x29848001 -mem-write: 0x80015692 <- 0x29388001 -mem-write: 0x80015696 <- 0x2c088001 -mem-write: 0x8001569a <- 0x29388001 -mem-write: 0x8001569e <- 0x29848001 -mem-write: 0x800156a2 <- 0x29348001 -mem-write: 0x800156a6 <- 0x29348001 -mem-write: 0x800156aa <- 0x29348001 -mem-write: 0x800156ae <- 0x2c088001 -mem-write: 0x800156b2 <- 0x1008001 -mem-write: 0x800156b6 <- 0x3030202 -mem-write: 0x800156ba <- 0x4040303 -mem-write: 0x800156be <- 0x4040404 -mem-write: 0x800156c2 <- 0x5050404 -mem-write: 0x800156c6 <- 0x5050505 -mem-write: 0x800156ca <- 0x5050505 -mem-write: 0x800156ce <- 0x5050505 -mem-write: 0x800156d2 <- 0x6060505 -mem-write: 0x800156d6 <- 0x6060606 -mem-write: 0x800156da <- 0x6060606 -mem-write: 0x800156de <- 0x6060606 -mem-write: 0x800156e2 <- 0x6060606 -mem-write: 0x800156e6 <- 0x6060606 -mem-write: 0x800156ea <- 0x6060606 -mem-write: 0x800156ee <- 0x6060606 -mem-write: 0x800156f2 <- 0x7070606 -mem-write: 0x800156f6 <- 0x7070707 -mem-write: 0x800156fa <- 0x7070707 -mem-write: 0x800156fe <- 0x7070707 -mem-write: 0x80015702 <- 0x7070707 -mem-write: 0x80015706 <- 0x7070707 -mem-write: 0x8001570a <- 0x7070707 -mem-write: 0x8001570e <- 0x7070707 -mem-write: 0x80015712 <- 0x7070707 -mem-write: 0x80015716 <- 0x7070707 -mem-write: 0x8001571a <- 0x7070707 -mem-write: 0x8001571e <- 0x7070707 -mem-write: 0x80015722 <- 0x7070707 -mem-write: 0x80015726 <- 0x7070707 -mem-write: 0x8001572a <- 0x7070707 -mem-write: 0x8001572e <- 0x7070707 -mem-write: 0x80015732 <- 0x8080707 -mem-write: 0x80015736 <- 0x8080808 -mem-write: 0x8001573a <- 0x8080808 -mem-write: 0x8001573e <- 0x8080808 -mem-write: 0x80015742 <- 0x8080808 -mem-write: 0x80015746 <- 0x8080808 -mem-write: 0x8001574a <- 0x8080808 -mem-write: 0x8001574e <- 0x8080808 -mem-write: 0x80015752 <- 0x8080808 -mem-write: 0x80015756 <- 0x8080808 -mem-write: 0x8001575a <- 0x8080808 -mem-write: 0x8001575e <- 0x8080808 -mem-write: 0x80015762 <- 0x8080808 -mem-write: 0x80015766 <- 0x8080808 -mem-write: 0x8001576a <- 0x8080808 -mem-write: 0x8001576e <- 0x8080808 -mem-write: 0x80015772 <- 0x8080808 -mem-write: 0x80015776 <- 0x8080808 -mem-write: 0x8001577a <- 0x8080808 -mem-write: 0x8001577e <- 0x8080808 -mem-write: 0x80015782 <- 0x8080808 -mem-write: 0x80015786 <- 0x8080808 -mem-write: 0x8001578a <- 0x8080808 -mem-write: 0x8001578e <- 0x8080808 -mem-write: 0x80015792 <- 0x8080808 -mem-write: 0x80015796 <- 0x8080808 -mem-write: 0x8001579a <- 0x8080808 -mem-write: 0x8001579e <- 0x8080808 -mem-write: 0x800157a2 <- 0x8080808 -mem-write: 0x800157a6 <- 0x8080808 -mem-write: 0x800157aa <- 0x8080808 -mem-write: 0x800157ae <- 0x8080808 -mem-write: 0x800157b2 <- 0x100808 -mem-write: 0x800157b6 <- 0x0 -mem-write: 0x800157ba <- 0x7a030000 -mem-write: 0x800157be <- 0x7c010052 -mem-write: 0x800157c2 <- 0xd1b0101 -mem-write: 0x800157c6 <- 0x100002 -mem-write: 0x800157ca <- 0x180000 -mem-write: 0x800157ce <- 0xac180000 -mem-write: 0x800157d2 <- 0x434ffff -mem-write: 0x800157d6 <- 0x0 -mem-write: 0x800157da <- 0x100000 -mem-write: 0x800157de <- 0x2c0000 -mem-write: 0x800157e2 <- 0xb0380000 -mem-write: 0x800157e6 <- 0x410ffff -mem-write: 0x800157ea <- 0x0 -mem-write: 0x800157ee <- 0x0 -mem-write: 0x800157f2 <- 0x0 -VXDRV: upload 1024 bytes to 0x800157f6 -mem-write: 0x800157f6 <- 0x0 -mem-write: 0x800157fa <- 0x0 -mem-write: 0x800157fe <- 0x0 -mem-write: 0x80015802 <- 0x0 -mem-write: 0x80015806 <- 0x0 -mem-write: 0x8001580a <- 0x0 -mem-write: 0x8001580e <- 0x0 -mem-write: 0x80015812 <- 0x0 -mem-write: 0x80015816 <- 0x0 -mem-write: 0x8001581a <- 0x0 -mem-write: 0x8001581e <- 0x0 -mem-write: 0x80015822 <- 0x0 -mem-write: 0x80015826 <- 0x0 -mem-write: 0x8001582a <- 0x0 -mem-write: 0x8001582e <- 0x0 -mem-write: 0x80015832 <- 0x0 -mem-write: 0x80015836 <- 0x0 -mem-write: 0x8001583a <- 0x0 -mem-write: 0x8001583e <- 0x0 -mem-write: 0x80015842 <- 0x0 -mem-write: 0x80015846 <- 0x0 -mem-write: 0x8001584a <- 0x0 -mem-write: 0x8001584e <- 0x0 -mem-write: 0x80015852 <- 0x0 -mem-write: 0x80015856 <- 0x0 -mem-write: 0x8001585a <- 0x0 -mem-write: 0x8001585e <- 0x0 -mem-write: 0x80015862 <- 0x0 -mem-write: 0x80015866 <- 0x0 -mem-write: 0x8001586a <- 0x0 -mem-write: 0x8001586e <- 0x0 -mem-write: 0x80015872 <- 0x0 -mem-write: 0x80015876 <- 0x0 -mem-write: 0x8001587a <- 0x0 -mem-write: 0x8001587e <- 0x0 -mem-write: 0x80015882 <- 0x0 -mem-write: 0x80015886 <- 0x0 -mem-write: 0x8001588a <- 0x0 -mem-write: 0x8001588e <- 0x0 -mem-write: 0x80015892 <- 0x0 -mem-write: 0x80015896 <- 0x0 -mem-write: 0x8001589a <- 0x0 -mem-write: 0x8001589e <- 0x0 -mem-write: 0x800158a2 <- 0x0 -mem-write: 0x800158a6 <- 0x0 -mem-write: 0x800158aa <- 0x0 -mem-write: 0x800158ae <- 0x0 -mem-write: 0x800158b2 <- 0x0 -mem-write: 0x800158b6 <- 0x0 -mem-write: 0x800158ba <- 0x0 -mem-write: 0x800158be <- 0x0 -mem-write: 0x800158c2 <- 0x0 -mem-write: 0x800158c6 <- 0x0 -mem-write: 0x800158ca <- 0x0 -mem-write: 0x800158ce <- 0x0 -mem-write: 0x800158d2 <- 0x0 -mem-write: 0x800158d6 <- 0x0 -mem-write: 0x800158da <- 0x0 -mem-write: 0x800158de <- 0x0 -mem-write: 0x800158e2 <- 0x0 -mem-write: 0x800158e6 <- 0x0 -mem-write: 0x800158ea <- 0x0 -mem-write: 0x800158ee <- 0x0 -mem-write: 0x800158f2 <- 0x0 -mem-write: 0x800158f6 <- 0x0 -mem-write: 0x800158fa <- 0x0 -mem-write: 0x800158fe <- 0x0 -mem-write: 0x80015902 <- 0x0 -mem-write: 0x80015906 <- 0x0 -mem-write: 0x8001590a <- 0x0 -mem-write: 0x8001590e <- 0x0 -mem-write: 0x80015912 <- 0x0 -mem-write: 0x80015916 <- 0x0 -mem-write: 0x8001591a <- 0x0 -mem-write: 0x8001591e <- 0x0 -mem-write: 0x80015922 <- 0x0 -mem-write: 0x80015926 <- 0x0 -mem-write: 0x8001592a <- 0x0 -mem-write: 0x8001592e <- 0x0 -mem-write: 0x80015932 <- 0x0 -mem-write: 0x80015936 <- 0x0 -mem-write: 0x8001593a <- 0x0 -mem-write: 0x8001593e <- 0x0 -mem-write: 0x80015942 <- 0x0 -mem-write: 0x80015946 <- 0x0 -mem-write: 0x8001594a <- 0x0 -mem-write: 0x8001594e <- 0x0 -mem-write: 0x80015952 <- 0x0 -mem-write: 0x80015956 <- 0x0 -mem-write: 0x8001595a <- 0x0 -mem-write: 0x8001595e <- 0x0 -mem-write: 0x80015962 <- 0x0 -mem-write: 0x80015966 <- 0x0 -mem-write: 0x8001596a <- 0x0 -mem-write: 0x8001596e <- 0x0 -mem-write: 0x80015972 <- 0x0 -mem-write: 0x80015976 <- 0x0 -mem-write: 0x8001597a <- 0x0 -mem-write: 0x8001597e <- 0x0 -mem-write: 0x80015982 <- 0x0 -mem-write: 0x80015986 <- 0x0 -mem-write: 0x8001598a <- 0x0 -mem-write: 0x8001598e <- 0x0 -mem-write: 0x80015992 <- 0x0 -mem-write: 0x80015996 <- 0x0 -mem-write: 0x8001599a <- 0x0 -mem-write: 0x8001599e <- 0x0 -mem-write: 0x800159a2 <- 0x0 -mem-write: 0x800159a6 <- 0x0 -mem-write: 0x800159aa <- 0x0 -mem-write: 0x800159ae <- 0x0 -mem-write: 0x800159b2 <- 0x0 -mem-write: 0x800159b6 <- 0x0 -mem-write: 0x800159ba <- 0x0 -mem-write: 0x800159be <- 0x0 -mem-write: 0x800159c2 <- 0x0 -mem-write: 0x800159c6 <- 0x0 -mem-write: 0x800159ca <- 0x0 -mem-write: 0x800159ce <- 0x0 -mem-write: 0x800159d2 <- 0x0 -mem-write: 0x800159d6 <- 0x0 -mem-write: 0x800159da <- 0x0 -mem-write: 0x800159de <- 0x0 -mem-write: 0x800159e2 <- 0x0 -mem-write: 0x800159e6 <- 0x0 -mem-write: 0x800159ea <- 0x0 -mem-write: 0x800159ee <- 0x0 -mem-write: 0x800159f2 <- 0x0 -mem-write: 0x800159f6 <- 0x0 -mem-write: 0x800159fa <- 0x0 -mem-write: 0x800159fe <- 0x0 -mem-write: 0x80015a02 <- 0x0 -mem-write: 0x80015a06 <- 0x0 -mem-write: 0x80015a0a <- 0x0 -mem-write: 0x80015a0e <- 0x0 -mem-write: 0x80015a12 <- 0x0 -mem-write: 0x80015a16 <- 0x0 -mem-write: 0x80015a1a <- 0x0 -mem-write: 0x80015a1e <- 0x0 -mem-write: 0x80015a22 <- 0x0 -mem-write: 0x80015a26 <- 0x0 -mem-write: 0x80015a2a <- 0x0 -mem-write: 0x80015a2e <- 0x0 -mem-write: 0x80015a32 <- 0x0 -mem-write: 0x80015a36 <- 0x0 -mem-write: 0x80015a3a <- 0x0 -mem-write: 0x80015a3e <- 0x0 -mem-write: 0x80015a42 <- 0x0 -mem-write: 0x80015a46 <- 0x0 -mem-write: 0x80015a4a <- 0x0 -mem-write: 0x80015a4e <- 0x0 -mem-write: 0x80015a52 <- 0x0 -mem-write: 0x80015a56 <- 0x0 -mem-write: 0x80015a5a <- 0x0 -mem-write: 0x80015a5e <- 0x0 -mem-write: 0x80015a62 <- 0x0 -mem-write: 0x80015a66 <- 0x0 -mem-write: 0x80015a6a <- 0x0 -mem-write: 0x80015a6e <- 0x0 -mem-write: 0x80015a72 <- 0x0 -mem-write: 0x80015a76 <- 0x0 -mem-write: 0x80015a7a <- 0x0 -mem-write: 0x80015a7e <- 0x0 -mem-write: 0x80015a82 <- 0x0 -mem-write: 0x80015a86 <- 0x0 -mem-write: 0x80015a8a <- 0x0 -mem-write: 0x80015a8e <- 0x0 -mem-write: 0x80015a92 <- 0x0 -mem-write: 0x80015a96 <- 0x0 -mem-write: 0x80015a9a <- 0x0 -mem-write: 0x80015a9e <- 0x0 -mem-write: 0x80015aa2 <- 0x0 -mem-write: 0x80015aa6 <- 0x0 -mem-write: 0x80015aaa <- 0x0 -mem-write: 0x80015aae <- 0x0 -mem-write: 0x80015ab2 <- 0x0 -mem-write: 0x80015ab6 <- 0x0 -mem-write: 0x80015aba <- 0x0 -mem-write: 0x80015abe <- 0x0 -mem-write: 0x80015ac2 <- 0x0 -mem-write: 0x80015ac6 <- 0x0 -mem-write: 0x80015aca <- 0x0 -mem-write: 0x80015ace <- 0x0 -mem-write: 0x80015ad2 <- 0x0 -mem-write: 0x80015ad6 <- 0x0 -mem-write: 0x80015ada <- 0x0 -mem-write: 0x80015ade <- 0x0 -mem-write: 0x80015ae2 <- 0x0 -mem-write: 0x80015ae6 <- 0x0 -mem-write: 0x80015aea <- 0x0 -mem-write: 0x80015aee <- 0x0 -mem-write: 0x80015af2 <- 0x0 -mem-write: 0x80015af6 <- 0x0 -mem-write: 0x80015afa <- 0x0 -mem-write: 0x80015afe <- 0x0 -mem-write: 0x80015b02 <- 0x0 -mem-write: 0x80015b06 <- 0x0 -mem-write: 0x80015b0a <- 0x0 -mem-write: 0x80015b0e <- 0x0 -mem-write: 0x80015b12 <- 0x0 -mem-write: 0x80015b16 <- 0x0 -mem-write: 0x80015b1a <- 0x0 -mem-write: 0x80015b1e <- 0x0 -mem-write: 0x80015b22 <- 0x0 -mem-write: 0x80015b26 <- 0x0 -mem-write: 0x80015b2a <- 0x0 -mem-write: 0x80015b2e <- 0x0 -mem-write: 0x80015b32 <- 0x0 -mem-write: 0x80015b36 <- 0x0 -mem-write: 0x80015b3a <- 0x0 -mem-write: 0x80015b3e <- 0x0 -mem-write: 0x80015b42 <- 0x0 -mem-write: 0x80015b46 <- 0x0 -mem-write: 0x80015b4a <- 0x0 -mem-write: 0x80015b4e <- 0x0 -mem-write: 0x80015b52 <- 0x0 -mem-write: 0x80015b56 <- 0x0 -mem-write: 0x80015b5a <- 0x0 -mem-write: 0x80015b5e <- 0x0 -mem-write: 0x80015b62 <- 0x0 -mem-write: 0x80015b66 <- 0x0 -mem-write: 0x80015b6a <- 0x0 -mem-write: 0x80015b6e <- 0x0 -mem-write: 0x80015b72 <- 0x0 -mem-write: 0x80015b76 <- 0x0 -mem-write: 0x80015b7a <- 0x0 -mem-write: 0x80015b7e <- 0x0 -mem-write: 0x80015b82 <- 0x0 -mem-write: 0x80015b86 <- 0x0 -mem-write: 0x80015b8a <- 0x0 -mem-write: 0x80015b8e <- 0x0 -mem-write: 0x80015b92 <- 0x0 -mem-write: 0x80015b96 <- 0x0 -mem-write: 0x80015b9a <- 0x0 -mem-write: 0x80015b9e <- 0x0 -mem-write: 0x80015ba2 <- 0x0 -mem-write: 0x80015ba6 <- 0x0 -mem-write: 0x80015baa <- 0x0 -mem-write: 0x80015bae <- 0x0 -mem-write: 0x80015bb2 <- 0x0 -mem-write: 0x80015bb6 <- 0x0 -mem-write: 0x80015bba <- 0x0 -mem-write: 0x80015bbe <- 0x0 -mem-write: 0x80015bc2 <- 0x0 -mem-write: 0x80015bc6 <- 0x0 -mem-write: 0x80015bca <- 0x0 -mem-write: 0x80015bce <- 0x0 -mem-write: 0x80015bd2 <- 0x0 -mem-write: 0x80015bd6 <- 0x0 -mem-write: 0x80015bda <- 0x0 -mem-write: 0x80015bde <- 0x0 -mem-write: 0x80015be2 <- 0x0 -mem-write: 0x80015be6 <- 0x0 -mem-write: 0x80015bea <- 0x0 -mem-write: 0x80015bee <- 0x0 -mem-write: 0x80015bf2 <- 0x0 -VXDRV: upload 1023 bytes to 0x80015bf6 -mem-write: 0x80015bf6 <- 0x0 -mem-write: 0x80015bfa <- 0x0 -mem-write: 0x80015bfe <- 0x0 -mem-write: 0x80015c02 <- 0x0 -mem-write: 0x80015c06 <- 0x0 -mem-write: 0x80015c0a <- 0x0 -mem-write: 0x80015c0e <- 0x0 -mem-write: 0x80015c12 <- 0x0 -mem-write: 0x80015c16 <- 0x0 -mem-write: 0x80015c1a <- 0x0 -mem-write: 0x80015c1e <- 0x0 -mem-write: 0x80015c22 <- 0x0 -mem-write: 0x80015c26 <- 0x0 -mem-write: 0x80015c2a <- 0x0 -mem-write: 0x80015c2e <- 0x0 -mem-write: 0x80015c32 <- 0x0 -mem-write: 0x80015c36 <- 0x0 -mem-write: 0x80015c3a <- 0x0 -mem-write: 0x80015c3e <- 0x0 -mem-write: 0x80015c42 <- 0x0 -mem-write: 0x80015c46 <- 0x0 -mem-write: 0x80015c4a <- 0x0 -mem-write: 0x80015c4e <- 0x0 -mem-write: 0x80015c52 <- 0x0 -mem-write: 0x80015c56 <- 0x0 -mem-write: 0x80015c5a <- 0x0 -mem-write: 0x80015c5e <- 0x0 -mem-write: 0x80015c62 <- 0x0 -mem-write: 0x80015c66 <- 0x0 -mem-write: 0x80015c6a <- 0x0 -mem-write: 0x80015c6e <- 0x0 -mem-write: 0x80015c72 <- 0x0 -mem-write: 0x80015c76 <- 0x0 -mem-write: 0x80015c7a <- 0x0 -mem-write: 0x80015c7e <- 0x0 -mem-write: 0x80015c82 <- 0x0 -mem-write: 0x80015c86 <- 0x0 -mem-write: 0x80015c8a <- 0x0 -mem-write: 0x80015c8e <- 0x0 -mem-write: 0x80015c92 <- 0x0 -mem-write: 0x80015c96 <- 0x0 -mem-write: 0x80015c9a <- 0x0 -mem-write: 0x80015c9e <- 0x0 -mem-write: 0x80015ca2 <- 0x0 -mem-write: 0x80015ca6 <- 0x0 -mem-write: 0x80015caa <- 0x0 -mem-write: 0x80015cae <- 0x0 -mem-write: 0x80015cb2 <- 0x0 -mem-write: 0x80015cb6 <- 0x0 -mem-write: 0x80015cba <- 0x0 -mem-write: 0x80015cbe <- 0x0 -mem-write: 0x80015cc2 <- 0x0 -mem-write: 0x80015cc6 <- 0x0 -mem-write: 0x80015cca <- 0x0 -mem-write: 0x80015cce <- 0x0 -mem-write: 0x80015cd2 <- 0x0 -mem-write: 0x80015cd6 <- 0x0 -mem-write: 0x80015cda <- 0x0 -mem-write: 0x80015cde <- 0x0 -mem-write: 0x80015ce2 <- 0x0 -mem-write: 0x80015ce6 <- 0x0 -mem-write: 0x80015cea <- 0x0 -mem-write: 0x80015cee <- 0x0 -mem-write: 0x80015cf2 <- 0x0 -mem-write: 0x80015cf6 <- 0x0 -mem-write: 0x80015cfa <- 0x0 -mem-write: 0x80015cfe <- 0x0 -mem-write: 0x80015d02 <- 0x0 -mem-write: 0x80015d06 <- 0x0 -mem-write: 0x80015d0a <- 0x0 -mem-write: 0x80015d0e <- 0x0 -mem-write: 0x80015d12 <- 0x0 -mem-write: 0x80015d16 <- 0x0 -mem-write: 0x80015d1a <- 0x0 -mem-write: 0x80015d1e <- 0x0 -mem-write: 0x80015d22 <- 0x0 -mem-write: 0x80015d26 <- 0x0 -mem-write: 0x80015d2a <- 0x0 -mem-write: 0x80015d2e <- 0x0 -mem-write: 0x80015d32 <- 0x0 -mem-write: 0x80015d36 <- 0x0 -mem-write: 0x80015d3a <- 0x0 -mem-write: 0x80015d3e <- 0x0 -mem-write: 0x80015d42 <- 0x0 -mem-write: 0x80015d46 <- 0x0 -mem-write: 0x80015d4a <- 0x0 -mem-write: 0x80015d4e <- 0x0 -mem-write: 0x80015d52 <- 0x0 -mem-write: 0x80015d56 <- 0x0 -mem-write: 0x80015d5a <- 0x0 -mem-write: 0x80015d5e <- 0x0 -mem-write: 0x80015d62 <- 0x0 -mem-write: 0x80015d66 <- 0x0 -mem-write: 0x80015d6a <- 0x0 -mem-write: 0x80015d6e <- 0x0 -mem-write: 0x80015d72 <- 0x0 -mem-write: 0x80015d76 <- 0x0 -mem-write: 0x80015d7a <- 0x0 -mem-write: 0x80015d7e <- 0x0 -mem-write: 0x80015d82 <- 0x0 -mem-write: 0x80015d86 <- 0x0 -mem-write: 0x80015d8a <- 0x0 -mem-write: 0x80015d8e <- 0x0 -mem-write: 0x80015d92 <- 0x0 -mem-write: 0x80015d96 <- 0x0 -mem-write: 0x80015d9a <- 0x0 -mem-write: 0x80015d9e <- 0x0 -mem-write: 0x80015da2 <- 0x0 -mem-write: 0x80015da6 <- 0x0 -mem-write: 0x80015daa <- 0x0 -mem-write: 0x80015dae <- 0x0 -mem-write: 0x80015db2 <- 0x0 -mem-write: 0x80015db6 <- 0x0 -mem-write: 0x80015dba <- 0x0 -mem-write: 0x80015dbe <- 0x0 -mem-write: 0x80015dc2 <- 0x0 -mem-write: 0x80015dc6 <- 0x0 -mem-write: 0x80015dca <- 0x0 -mem-write: 0x80015dce <- 0x0 -mem-write: 0x80015dd2 <- 0x0 -mem-write: 0x80015dd6 <- 0x0 -mem-write: 0x80015dda <- 0x0 -mem-write: 0x80015dde <- 0x0 -mem-write: 0x80015de2 <- 0x0 -mem-write: 0x80015de6 <- 0x0 -mem-write: 0x80015dea <- 0x0 -mem-write: 0x80015dee <- 0x0 -mem-write: 0x80015df2 <- 0x0 -mem-write: 0x80015df6 <- 0x0 -mem-write: 0x80015dfa <- 0x0 -mem-write: 0x80015dfe <- 0x0 -mem-write: 0x80015e02 <- 0x0 -mem-write: 0x80015e06 <- 0x0 -mem-write: 0x80015e0a <- 0x0 -mem-write: 0x80015e0e <- 0x0 -mem-write: 0x80015e12 <- 0x0 -mem-write: 0x80015e16 <- 0x0 -mem-write: 0x80015e1a <- 0x0 -mem-write: 0x80015e1e <- 0x0 -mem-write: 0x80015e22 <- 0x0 -mem-write: 0x80015e26 <- 0x0 -mem-write: 0x80015e2a <- 0x0 -mem-write: 0x80015e2e <- 0x0 -mem-write: 0x80015e32 <- 0x0 -mem-write: 0x80015e36 <- 0x0 -mem-write: 0x80015e3a <- 0x0 -mem-write: 0x80015e3e <- 0x0 -mem-write: 0x80015e42 <- 0x0 -mem-write: 0x80015e46 <- 0x0 -mem-write: 0x80015e4a <- 0x0 -mem-write: 0x80015e4e <- 0x0 -mem-write: 0x80015e52 <- 0x0 -mem-write: 0x80015e56 <- 0x0 -mem-write: 0x80015e5a <- 0x0 -mem-write: 0x80015e5e <- 0x0 -mem-write: 0x80015e62 <- 0x0 -mem-write: 0x80015e66 <- 0x0 -mem-write: 0x80015e6a <- 0x0 -mem-write: 0x80015e6e <- 0x0 -mem-write: 0x80015e72 <- 0x0 -mem-write: 0x80015e76 <- 0x0 -mem-write: 0x80015e7a <- 0x0 -mem-write: 0x80015e7e <- 0x0 -mem-write: 0x80015e82 <- 0x0 -mem-write: 0x80015e86 <- 0x0 -mem-write: 0x80015e8a <- 0x0 -mem-write: 0x80015e8e <- 0x0 -mem-write: 0x80015e92 <- 0x0 -mem-write: 0x80015e96 <- 0x0 -mem-write: 0x80015e9a <- 0x0 -mem-write: 0x80015e9e <- 0x0 -mem-write: 0x80015ea2 <- 0x0 -mem-write: 0x80015ea6 <- 0x0 -mem-write: 0x80015eaa <- 0x0 -mem-write: 0x80015eae <- 0x0 -mem-write: 0x80015eb2 <- 0x0 -mem-write: 0x80015eb6 <- 0x0 -mem-write: 0x80015eba <- 0x0 -mem-write: 0x80015ebe <- 0x0 -mem-write: 0x80015ec2 <- 0x0 -mem-write: 0x80015ec6 <- 0x0 -mem-write: 0x80015eca <- 0x0 -mem-write: 0x80015ece <- 0x0 -mem-write: 0x80015ed2 <- 0x0 -mem-write: 0x80015ed6 <- 0x0 -mem-write: 0x80015eda <- 0x0 -mem-write: 0x80015ede <- 0x0 -mem-write: 0x80015ee2 <- 0x0 -mem-write: 0x80015ee6 <- 0x0 -mem-write: 0x80015eea <- 0x0 -mem-write: 0x80015eee <- 0x0 -mem-write: 0x80015ef2 <- 0x0 -mem-write: 0x80015ef6 <- 0x0 -mem-write: 0x80015efa <- 0x0 -mem-write: 0x80015efe <- 0x0 -mem-write: 0x80015f02 <- 0x0 -mem-write: 0x80015f06 <- 0x0 -mem-write: 0x80015f0a <- 0x0 -mem-write: 0x80015f0e <- 0x0 -mem-write: 0x80015f12 <- 0x0 -mem-write: 0x80015f16 <- 0x0 -mem-write: 0x80015f1a <- 0x0 -mem-write: 0x80015f1e <- 0x0 -mem-write: 0x80015f22 <- 0x0 -mem-write: 0x80015f26 <- 0x0 -mem-write: 0x80015f2a <- 0x0 -mem-write: 0x80015f2e <- 0x0 -mem-write: 0x80015f32 <- 0x0 -mem-write: 0x80015f36 <- 0x0 -mem-write: 0x80015f3a <- 0x0 -mem-write: 0x80015f3e <- 0x0 -mem-write: 0x80015f42 <- 0x0 -mem-write: 0x80015f46 <- 0x0 -mem-write: 0x80015f4a <- 0x0 -mem-write: 0x80015f4e <- 0x0 -mem-write: 0x80015f52 <- 0x0 -mem-write: 0x80015f56 <- 0x0 -mem-write: 0x80015f5a <- 0x0 -mem-write: 0x80015f5e <- 0x0 -mem-write: 0x80015f62 <- 0x0 -mem-write: 0x80015f66 <- 0x0 -mem-write: 0x80015f6a <- 0x0 -mem-write: 0x80015f6e <- 0x0 -mem-write: 0x80015f72 <- 0x0 -mem-write: 0x80015f76 <- 0x0 -mem-write: 0x80015f7a <- 0x0 -mem-write: 0x80015f7e <- 0x0 -mem-write: 0x80015f82 <- 0x0 -mem-write: 0x80015f86 <- 0x0 -mem-write: 0x80015f8a <- 0x0 -mem-write: 0x80015f8e <- 0x0 -mem-write: 0x80015f92 <- 0x0 -mem-write: 0x80015f96 <- 0x0 -mem-write: 0x80015f9a <- 0x0 -mem-write: 0x80015f9e <- 0x0 -mem-write: 0x80015fa2 <- 0x0 -mem-write: 0x80015fa6 <- 0x0 -mem-write: 0x80015faa <- 0x0 -mem-write: 0x80015fae <- 0x0 -mem-write: 0x80015fb2 <- 0x0 -mem-write: 0x80015fb6 <- 0x0 -mem-write: 0x80015fba <- 0x0 -mem-write: 0x80015fbe <- 0x0 -mem-write: 0x80015fc2 <- 0x0 -mem-write: 0x80015fc6 <- 0x0 -mem-write: 0x80015fca <- 0x0 -mem-write: 0x80015fce <- 0x0 -mem-write: 0x80015fd2 <- 0x0 -mem-write: 0x80015fd6 <- 0x0 -mem-write: 0x80015fda <- 0x0 -mem-write: 0x80015fde <- 0x0 -mem-write: 0x80015fe2 <- 0x0 -mem-write: 0x80015fe6 <- 0x0 -mem-write: 0x80015fea <- 0x0 -mem-write: 0x80015fee <- 0x0 -mem-write: 0x80015ff2 <- 0x0 -VXDRV: upload 1024 bytes to 0x80015ff5 -mem-write: 0x80015ff5 <- 0x0 -mem-write: 0x80015ff9 <- 0x0 -mem-write: 0x80015ffd <- 0xbc000000 -mem-write: 0x80016001 <- 0x800000 -mem-write: 0x80016005 <- 0x0 -mem-write: 0x80016009 <- 0x0 -mem-write: 0x8001600d <- 0x100 -mem-write: 0x80016011 <- 0xfc000000 -mem-write: 0x80016015 <- 0x64800162 -mem-write: 0x80016019 <- 0xcc800163 -mem-write: 0x8001601d <- 0x800163 -mem-write: 0x80016021 <- 0x0 -mem-write: 0x80016025 <- 0x0 -mem-write: 0x80016029 <- 0x0 -mem-write: 0x8001602d <- 0x0 -mem-write: 0x80016031 <- 0x0 -mem-write: 0x80016035 <- 0x0 -mem-write: 0x80016039 <- 0x0 -mem-write: 0x8001603d <- 0x0 -mem-write: 0x80016041 <- 0x0 -mem-write: 0x80016045 <- 0x0 -mem-write: 0x80016049 <- 0x0 -mem-write: 0x8001604d <- 0x0 -mem-write: 0x80016051 <- 0x0 -mem-write: 0x80016055 <- 0x0 -mem-write: 0x80016059 <- 0x0 -mem-write: 0x8001605d <- 0x0 -mem-write: 0x80016061 <- 0x0 -mem-write: 0x80016065 <- 0x0 -mem-write: 0x80016069 <- 0x0 -mem-write: 0x8001606d <- 0x0 -mem-write: 0x80016071 <- 0x0 -mem-write: 0x80016075 <- 0x0 -mem-write: 0x80016079 <- 0x0 -mem-write: 0x8001607d <- 0x0 -mem-write: 0x80016081 <- 0x0 -mem-write: 0x80016085 <- 0x0 -mem-write: 0x80016089 <- 0x0 -mem-write: 0x8001608d <- 0x0 -mem-write: 0x80016091 <- 0x0 -mem-write: 0x80016095 <- 0x0 -mem-write: 0x80016099 <- 0x0 -mem-write: 0x8001609d <- 0x0 -mem-write: 0x800160a1 <- 0x0 -mem-write: 0x800160a5 <- 0x0 -mem-write: 0x800160a9 <- 0x0 -mem-write: 0x800160ad <- 0x0 -mem-write: 0x800160b1 <- 0x0 -mem-write: 0x800160b5 <- 0x1000000 -mem-write: 0x800160b9 <- 0x0 -mem-write: 0x800160bd <- 0xe000000 -mem-write: 0x800160c1 <- 0x34abcd33 -mem-write: 0x800160c5 <- 0xece66d12 -mem-write: 0x800160c9 <- 0xb0005de -mem-write: 0x800160cd <- 0x0 -mem-write: 0x800160d1 <- 0x0 -mem-write: 0x800160d5 <- 0x0 -mem-write: 0x800160d9 <- 0x0 -mem-write: 0x800160dd <- 0x0 -mem-write: 0x800160e1 <- 0x0 -mem-write: 0x800160e5 <- 0x0 -mem-write: 0x800160e9 <- 0x0 -mem-write: 0x800160ed <- 0x0 -mem-write: 0x800160f1 <- 0x0 -mem-write: 0x800160f5 <- 0x0 -mem-write: 0x800160f9 <- 0x0 -mem-write: 0x800160fd <- 0x0 -mem-write: 0x80016101 <- 0x0 -mem-write: 0x80016105 <- 0x0 -mem-write: 0x80016109 <- 0x0 -mem-write: 0x8001610d <- 0x0 -mem-write: 0x80016111 <- 0x0 -mem-write: 0x80016115 <- 0x0 -mem-write: 0x80016119 <- 0x0 -mem-write: 0x8001611d <- 0x0 -mem-write: 0x80016121 <- 0x0 -mem-write: 0x80016125 <- 0x0 -mem-write: 0x80016129 <- 0x0 -mem-write: 0x8001612d <- 0x0 -mem-write: 0x80016131 <- 0x0 -mem-write: 0x80016135 <- 0x0 -mem-write: 0x80016139 <- 0x0 -mem-write: 0x8001613d <- 0x0 -mem-write: 0x80016141 <- 0x0 -mem-write: 0x80016145 <- 0x0 -mem-write: 0x80016149 <- 0x0 -mem-write: 0x8001614d <- 0x0 -mem-write: 0x80016151 <- 0x0 -mem-write: 0x80016155 <- 0x0 -mem-write: 0x80016159 <- 0x0 -mem-write: 0x8001615d <- 0x0 -mem-write: 0x80016161 <- 0x0 -mem-write: 0x80016165 <- 0x0 -mem-write: 0x80016169 <- 0x0 -mem-write: 0x8001616d <- 0x0 -mem-write: 0x80016171 <- 0x0 -mem-write: 0x80016175 <- 0x0 -mem-write: 0x80016179 <- 0x0 -mem-write: 0x8001617d <- 0x0 -mem-write: 0x80016181 <- 0x0 -mem-write: 0x80016185 <- 0x0 -mem-write: 0x80016189 <- 0x0 -mem-write: 0x8001618d <- 0x0 -mem-write: 0x80016191 <- 0x0 -mem-write: 0x80016195 <- 0x0 -mem-write: 0x80016199 <- 0x0 -mem-write: 0x8001619d <- 0x0 -mem-write: 0x800161a1 <- 0x0 -mem-write: 0x800161a5 <- 0x0 -mem-write: 0x800161a9 <- 0x0 -mem-write: 0x800161ad <- 0x0 -mem-write: 0x800161b1 <- 0x0 -mem-write: 0x800161b5 <- 0x0 -mem-write: 0x800161b9 <- 0x0 -mem-write: 0x800161bd <- 0x0 -mem-write: 0x800161c1 <- 0x0 -mem-write: 0x800161c5 <- 0x0 -mem-write: 0x800161c9 <- 0x0 -mem-write: 0x800161cd <- 0x0 -mem-write: 0x800161d1 <- 0x0 -mem-write: 0x800161d5 <- 0x0 -mem-write: 0x800161d9 <- 0x0 -mem-write: 0x800161dd <- 0x0 -mem-write: 0x800161e1 <- 0x0 -mem-write: 0x800161e5 <- 0x0 -mem-write: 0x800161e9 <- 0x0 -mem-write: 0x800161ed <- 0x0 -mem-write: 0x800161f1 <- 0x0 -mem-write: 0x800161f5 <- 0x0 -mem-write: 0x800161f9 <- 0x0 -mem-write: 0x800161fd <- 0x0 -mem-write: 0x80016201 <- 0x0 -mem-write: 0x80016205 <- 0x0 -mem-write: 0x80016209 <- 0x0 -mem-write: 0x8001620d <- 0x0 -mem-write: 0x80016211 <- 0x0 -mem-write: 0x80016215 <- 0x0 -mem-write: 0x80016219 <- 0x0 -mem-write: 0x8001621d <- 0x0 -mem-write: 0x80016221 <- 0x0 -mem-write: 0x80016225 <- 0x0 -mem-write: 0x80016229 <- 0x0 -mem-write: 0x8001622d <- 0x0 -mem-write: 0x80016231 <- 0x0 -mem-write: 0x80016235 <- 0x0 -mem-write: 0x80016239 <- 0x0 -mem-write: 0x8001623d <- 0x0 -mem-write: 0x80016241 <- 0x0 -mem-write: 0x80016245 <- 0x0 -mem-write: 0x80016249 <- 0x0 -mem-write: 0x8001624d <- 0x0 -mem-write: 0x80016251 <- 0x0 -mem-write: 0x80016255 <- 0x0 -mem-write: 0x80016259 <- 0x0 -mem-write: 0x8001625d <- 0x0 -mem-write: 0x80016261 <- 0x0 -mem-write: 0x80016265 <- 0x0 -mem-write: 0x80016269 <- 0x0 -mem-write: 0x8001626d <- 0x0 -mem-write: 0x80016271 <- 0x0 -mem-write: 0x80016275 <- 0x0 -mem-write: 0x80016279 <- 0x0 -mem-write: 0x8001627d <- 0x0 -mem-write: 0x80016281 <- 0x0 -mem-write: 0x80016285 <- 0x0 -mem-write: 0x80016289 <- 0x0 -mem-write: 0x8001628d <- 0x0 -mem-write: 0x80016291 <- 0x0 -mem-write: 0x80016295 <- 0x0 -mem-write: 0x80016299 <- 0x0 -mem-write: 0x8001629d <- 0x0 -mem-write: 0x800162a1 <- 0x0 -mem-write: 0x800162a5 <- 0x0 -mem-write: 0x800162a9 <- 0x0 -mem-write: 0x800162ad <- 0x0 -mem-write: 0x800162b1 <- 0x0 -mem-write: 0x800162b5 <- 0x0 -mem-write: 0x800162b9 <- 0x0 -mem-write: 0x800162bd <- 0x0 -mem-write: 0x800162c1 <- 0x0 -mem-write: 0x800162c5 <- 0x0 -mem-write: 0x800162c9 <- 0x0 -mem-write: 0x800162cd <- 0x0 -mem-write: 0x800162d1 <- 0x0 -mem-write: 0x800162d5 <- 0x0 -mem-write: 0x800162d9 <- 0x0 -mem-write: 0x800162dd <- 0x0 -mem-write: 0x800162e1 <- 0x0 -mem-write: 0x800162e5 <- 0x0 -mem-write: 0x800162e9 <- 0x0 -mem-write: 0x800162ed <- 0x0 -mem-write: 0x800162f1 <- 0x0 -mem-write: 0x800162f5 <- 0x0 -mem-write: 0x800162f9 <- 0x0 -mem-write: 0x800162fd <- 0x0 -mem-write: 0x80016301 <- 0x0 -mem-write: 0x80016305 <- 0x0 -mem-write: 0x80016309 <- 0x0 -mem-write: 0x8001630d <- 0x0 -mem-write: 0x80016311 <- 0x0 -mem-write: 0x80016315 <- 0x0 -mem-write: 0x80016319 <- 0x0 -mem-write: 0x8001631d <- 0x0 -mem-write: 0x80016321 <- 0x0 -mem-write: 0x80016325 <- 0x0 -mem-write: 0x80016329 <- 0x0 -mem-write: 0x8001632d <- 0x0 -mem-write: 0x80016331 <- 0x0 -mem-write: 0x80016335 <- 0x0 -mem-write: 0x80016339 <- 0x0 -mem-write: 0x8001633d <- 0x0 -mem-write: 0x80016341 <- 0x0 -mem-write: 0x80016345 <- 0x0 -mem-write: 0x80016349 <- 0x0 -mem-write: 0x8001634d <- 0x0 -mem-write: 0x80016351 <- 0x0 -mem-write: 0x80016355 <- 0x0 -mem-write: 0x80016359 <- 0x0 -mem-write: 0x8001635d <- 0x0 -mem-write: 0x80016361 <- 0x0 -mem-write: 0x80016365 <- 0x0 -mem-write: 0x80016369 <- 0x0 -mem-write: 0x8001636d <- 0x0 -mem-write: 0x80016371 <- 0x0 -mem-write: 0x80016375 <- 0x0 -mem-write: 0x80016379 <- 0x0 -mem-write: 0x8001637d <- 0x0 -mem-write: 0x80016381 <- 0x0 -mem-write: 0x80016385 <- 0x0 -mem-write: 0x80016389 <- 0x0 -mem-write: 0x8001638d <- 0x0 -mem-write: 0x80016391 <- 0x0 -mem-write: 0x80016395 <- 0x0 -mem-write: 0x80016399 <- 0x0 -mem-write: 0x8001639d <- 0x0 -mem-write: 0x800163a1 <- 0x0 -mem-write: 0x800163a5 <- 0x0 -mem-write: 0x800163a9 <- 0x0 -mem-write: 0x800163ad <- 0x0 -mem-write: 0x800163b1 <- 0x0 -mem-write: 0x800163b5 <- 0x0 -mem-write: 0x800163b9 <- 0x0 -mem-write: 0x800163bd <- 0x0 -mem-write: 0x800163c1 <- 0x0 -mem-write: 0x800163c5 <- 0x0 -mem-write: 0x800163c9 <- 0x0 -mem-write: 0x800163cd <- 0x0 -mem-write: 0x800163d1 <- 0x0 -mem-write: 0x800163d5 <- 0x0 -mem-write: 0x800163d9 <- 0x0 -mem-write: 0x800163dd <- 0x0 -mem-write: 0x800163e1 <- 0x0 -mem-write: 0x800163e5 <- 0x0 -mem-write: 0x800163e9 <- 0x0 -mem-write: 0x800163ed <- 0x0 -mem-write: 0x800163f1 <- 0x0 -VXDRV: upload 1024 bytes to 0x800163f5 -mem-write: 0x800163f5 <- 0x0 -mem-write: 0x800163f9 <- 0x0 -mem-write: 0x800163fd <- 0x0 -mem-write: 0x80016401 <- 0x0 -mem-write: 0x80016405 <- 0x0 -mem-write: 0x80016409 <- 0x0 -mem-write: 0x8001640d <- 0x0 -mem-write: 0x80016411 <- 0x0 -mem-write: 0x80016415 <- 0x0 -mem-write: 0x80016419 <- 0x0 -mem-write: 0x8001641d <- 0x0 -mem-write: 0x80016421 <- 0x0 -mem-write: 0x80016425 <- 0x0 -mem-write: 0x80016429 <- 0x0 -mem-write: 0x8001642d <- 0x0 -mem-write: 0x80016431 <- 0x0 -mem-write: 0x80016435 <- 0x0 -mem-write: 0x80016439 <- 0x0 -mem-write: 0x8001643d <- 0x38000000 -mem-write: 0x80016441 <- 0x38800164 -mem-write: 0x80016445 <- 0x40800164 -mem-write: 0x80016449 <- 0x40800164 -mem-write: 0x8001644d <- 0x48800164 -mem-write: 0x80016451 <- 0x48800164 -mem-write: 0x80016455 <- 0x50800164 -mem-write: 0x80016459 <- 0x50800164 -mem-write: 0x8001645d <- 0x58800164 -mem-write: 0x80016461 <- 0x58800164 -mem-write: 0x80016465 <- 0x60800164 -mem-write: 0x80016469 <- 0x60800164 -mem-write: 0x8001646d <- 0x68800164 -mem-write: 0x80016471 <- 0x68800164 -mem-write: 0x80016475 <- 0x70800164 -mem-write: 0x80016479 <- 0x70800164 -mem-write: 0x8001647d <- 0x78800164 -mem-write: 0x80016481 <- 0x78800164 -mem-write: 0x80016485 <- 0x80800164 -mem-write: 0x80016489 <- 0x80800164 -mem-write: 0x8001648d <- 0x88800164 -mem-write: 0x80016491 <- 0x88800164 -mem-write: 0x80016495 <- 0x90800164 -mem-write: 0x80016499 <- 0x90800164 -mem-write: 0x8001649d <- 0x98800164 -mem-write: 0x800164a1 <- 0x98800164 -mem-write: 0x800164a5 <- 0xa0800164 -mem-write: 0x800164a9 <- 0xa0800164 -mem-write: 0x800164ad <- 0xa8800164 -mem-write: 0x800164b1 <- 0xa8800164 -mem-write: 0x800164b5 <- 0xb0800164 -mem-write: 0x800164b9 <- 0xb0800164 -mem-write: 0x800164bd <- 0xb8800164 -mem-write: 0x800164c1 <- 0xb8800164 -mem-write: 0x800164c5 <- 0xc0800164 -mem-write: 0x800164c9 <- 0xc0800164 -mem-write: 0x800164cd <- 0xc8800164 -mem-write: 0x800164d1 <- 0xc8800164 -mem-write: 0x800164d5 <- 0xd0800164 -mem-write: 0x800164d9 <- 0xd0800164 -mem-write: 0x800164dd <- 0xd8800164 -mem-write: 0x800164e1 <- 0xd8800164 -mem-write: 0x800164e5 <- 0xe0800164 -mem-write: 0x800164e9 <- 0xe0800164 -mem-write: 0x800164ed <- 0xe8800164 -mem-write: 0x800164f1 <- 0xe8800164 -mem-write: 0x800164f5 <- 0xf0800164 -mem-write: 0x800164f9 <- 0xf0800164 -mem-write: 0x800164fd <- 0xf8800164 -mem-write: 0x80016501 <- 0xf8800164 -mem-write: 0x80016505 <- 0x800164 -mem-write: 0x80016509 <- 0x800165 -mem-write: 0x8001650d <- 0x8800165 -mem-write: 0x80016511 <- 0x8800165 -mem-write: 0x80016515 <- 0x10800165 -mem-write: 0x80016519 <- 0x10800165 -mem-write: 0x8001651d <- 0x18800165 -mem-write: 0x80016521 <- 0x18800165 -mem-write: 0x80016525 <- 0x20800165 -mem-write: 0x80016529 <- 0x20800165 -mem-write: 0x8001652d <- 0x28800165 -mem-write: 0x80016531 <- 0x28800165 -mem-write: 0x80016535 <- 0x30800165 -mem-write: 0x80016539 <- 0x30800165 -mem-write: 0x8001653d <- 0x38800165 -mem-write: 0x80016541 <- 0x38800165 -mem-write: 0x80016545 <- 0x40800165 -mem-write: 0x80016549 <- 0x40800165 -mem-write: 0x8001654d <- 0x48800165 -mem-write: 0x80016551 <- 0x48800165 -mem-write: 0x80016555 <- 0x50800165 -mem-write: 0x80016559 <- 0x50800165 -mem-write: 0x8001655d <- 0x58800165 -mem-write: 0x80016561 <- 0x58800165 -mem-write: 0x80016565 <- 0x60800165 -mem-write: 0x80016569 <- 0x60800165 -mem-write: 0x8001656d <- 0x68800165 -mem-write: 0x80016571 <- 0x68800165 -mem-write: 0x80016575 <- 0x70800165 -mem-write: 0x80016579 <- 0x70800165 -mem-write: 0x8001657d <- 0x78800165 -mem-write: 0x80016581 <- 0x78800165 -mem-write: 0x80016585 <- 0x80800165 -mem-write: 0x80016589 <- 0x80800165 -mem-write: 0x8001658d <- 0x88800165 -mem-write: 0x80016591 <- 0x88800165 -mem-write: 0x80016595 <- 0x90800165 -mem-write: 0x80016599 <- 0x90800165 -mem-write: 0x8001659d <- 0x98800165 -mem-write: 0x800165a1 <- 0x98800165 -mem-write: 0x800165a5 <- 0xa0800165 -mem-write: 0x800165a9 <- 0xa0800165 -mem-write: 0x800165ad <- 0xa8800165 -mem-write: 0x800165b1 <- 0xa8800165 -mem-write: 0x800165b5 <- 0xb0800165 -mem-write: 0x800165b9 <- 0xb0800165 -mem-write: 0x800165bd <- 0xb8800165 -mem-write: 0x800165c1 <- 0xb8800165 -mem-write: 0x800165c5 <- 0xc0800165 -mem-write: 0x800165c9 <- 0xc0800165 -mem-write: 0x800165cd <- 0xc8800165 -mem-write: 0x800165d1 <- 0xc8800165 -mem-write: 0x800165d5 <- 0xd0800165 -mem-write: 0x800165d9 <- 0xd0800165 -mem-write: 0x800165dd <- 0xd8800165 -mem-write: 0x800165e1 <- 0xd8800165 -mem-write: 0x800165e5 <- 0xe0800165 -mem-write: 0x800165e9 <- 0xe0800165 -mem-write: 0x800165ed <- 0xe8800165 -mem-write: 0x800165f1 <- 0xe8800165 -mem-write: 0x800165f5 <- 0xf0800165 -mem-write: 0x800165f9 <- 0xf0800165 -mem-write: 0x800165fd <- 0xf8800165 -mem-write: 0x80016601 <- 0xf8800165 -mem-write: 0x80016605 <- 0x800165 -mem-write: 0x80016609 <- 0x800166 -mem-write: 0x8001660d <- 0x8800166 -mem-write: 0x80016611 <- 0x8800166 -mem-write: 0x80016615 <- 0x10800166 -mem-write: 0x80016619 <- 0x10800166 -mem-write: 0x8001661d <- 0x18800166 -mem-write: 0x80016621 <- 0x18800166 -mem-write: 0x80016625 <- 0x20800166 -mem-write: 0x80016629 <- 0x20800166 -mem-write: 0x8001662d <- 0x28800166 -mem-write: 0x80016631 <- 0x28800166 -mem-write: 0x80016635 <- 0x30800166 -mem-write: 0x80016639 <- 0x30800166 -mem-write: 0x8001663d <- 0x38800166 -mem-write: 0x80016641 <- 0x38800166 -mem-write: 0x80016645 <- 0x40800166 -mem-write: 0x80016649 <- 0x40800166 -mem-write: 0x8001664d <- 0x48800166 -mem-write: 0x80016651 <- 0x48800166 -mem-write: 0x80016655 <- 0x50800166 -mem-write: 0x80016659 <- 0x50800166 -mem-write: 0x8001665d <- 0x58800166 -mem-write: 0x80016661 <- 0x58800166 -mem-write: 0x80016665 <- 0x60800166 -mem-write: 0x80016669 <- 0x60800166 -mem-write: 0x8001666d <- 0x68800166 -mem-write: 0x80016671 <- 0x68800166 -mem-write: 0x80016675 <- 0x70800166 -mem-write: 0x80016679 <- 0x70800166 -mem-write: 0x8001667d <- 0x78800166 -mem-write: 0x80016681 <- 0x78800166 -mem-write: 0x80016685 <- 0x80800166 -mem-write: 0x80016689 <- 0x80800166 -mem-write: 0x8001668d <- 0x88800166 -mem-write: 0x80016691 <- 0x88800166 -mem-write: 0x80016695 <- 0x90800166 -mem-write: 0x80016699 <- 0x90800166 -mem-write: 0x8001669d <- 0x98800166 -mem-write: 0x800166a1 <- 0x98800166 -mem-write: 0x800166a5 <- 0xa0800166 -mem-write: 0x800166a9 <- 0xa0800166 -mem-write: 0x800166ad <- 0xa8800166 -mem-write: 0x800166b1 <- 0xa8800166 -mem-write: 0x800166b5 <- 0xb0800166 -mem-write: 0x800166b9 <- 0xb0800166 -mem-write: 0x800166bd <- 0xb8800166 -mem-write: 0x800166c1 <- 0xb8800166 -mem-write: 0x800166c5 <- 0xc0800166 -mem-write: 0x800166c9 <- 0xc0800166 -mem-write: 0x800166cd <- 0xc8800166 -mem-write: 0x800166d1 <- 0xc8800166 -mem-write: 0x800166d5 <- 0xd0800166 -mem-write: 0x800166d9 <- 0xd0800166 -mem-write: 0x800166dd <- 0xd8800166 -mem-write: 0x800166e1 <- 0xd8800166 -mem-write: 0x800166e5 <- 0xe0800166 -mem-write: 0x800166e9 <- 0xe0800166 -mem-write: 0x800166ed <- 0xe8800166 -mem-write: 0x800166f1 <- 0xe8800166 -mem-write: 0x800166f5 <- 0xf0800166 -mem-write: 0x800166f9 <- 0xf0800166 -mem-write: 0x800166fd <- 0xf8800166 -mem-write: 0x80016701 <- 0xf8800166 -mem-write: 0x80016705 <- 0x800166 -mem-write: 0x80016709 <- 0x800167 -mem-write: 0x8001670d <- 0x8800167 -mem-write: 0x80016711 <- 0x8800167 -mem-write: 0x80016715 <- 0x10800167 -mem-write: 0x80016719 <- 0x10800167 -mem-write: 0x8001671d <- 0x18800167 -mem-write: 0x80016721 <- 0x18800167 -mem-write: 0x80016725 <- 0x20800167 -mem-write: 0x80016729 <- 0x20800167 -mem-write: 0x8001672d <- 0x28800167 -mem-write: 0x80016731 <- 0x28800167 -mem-write: 0x80016735 <- 0x30800167 -mem-write: 0x80016739 <- 0x30800167 -mem-write: 0x8001673d <- 0x38800167 -mem-write: 0x80016741 <- 0x38800167 -mem-write: 0x80016745 <- 0x40800167 -mem-write: 0x80016749 <- 0x40800167 -mem-write: 0x8001674d <- 0x48800167 -mem-write: 0x80016751 <- 0x48800167 -mem-write: 0x80016755 <- 0x50800167 -mem-write: 0x80016759 <- 0x50800167 -mem-write: 0x8001675d <- 0x58800167 -mem-write: 0x80016761 <- 0x58800167 -mem-write: 0x80016765 <- 0x60800167 -mem-write: 0x80016769 <- 0x60800167 -mem-write: 0x8001676d <- 0x68800167 -mem-write: 0x80016771 <- 0x68800167 -mem-write: 0x80016775 <- 0x70800167 -mem-write: 0x80016779 <- 0x70800167 -mem-write: 0x8001677d <- 0x78800167 -mem-write: 0x80016781 <- 0x78800167 -mem-write: 0x80016785 <- 0x80800167 -mem-write: 0x80016789 <- 0x80800167 -mem-write: 0x8001678d <- 0x88800167 -mem-write: 0x80016791 <- 0x88800167 -mem-write: 0x80016795 <- 0x90800167 -mem-write: 0x80016799 <- 0x90800167 -mem-write: 0x8001679d <- 0x98800167 -mem-write: 0x800167a1 <- 0x98800167 -mem-write: 0x800167a5 <- 0xa0800167 -mem-write: 0x800167a9 <- 0xa0800167 -mem-write: 0x800167ad <- 0xa8800167 -mem-write: 0x800167b1 <- 0xa8800167 -mem-write: 0x800167b5 <- 0xb0800167 -mem-write: 0x800167b9 <- 0xb0800167 -mem-write: 0x800167bd <- 0xb8800167 -mem-write: 0x800167c1 <- 0xb8800167 -mem-write: 0x800167c5 <- 0xc0800167 -mem-write: 0x800167c9 <- 0xc0800167 -mem-write: 0x800167cd <- 0xc8800167 -mem-write: 0x800167d1 <- 0xc8800167 -mem-write: 0x800167d5 <- 0xd0800167 -mem-write: 0x800167d9 <- 0xd0800167 -mem-write: 0x800167dd <- 0xd8800167 -mem-write: 0x800167e1 <- 0xd8800167 -mem-write: 0x800167e5 <- 0xe0800167 -mem-write: 0x800167e9 <- 0xe0800167 -mem-write: 0x800167ed <- 0xe8800167 -mem-write: 0x800167f1 <- 0xe8800167 -VXDRV: upload 503 bytes to 0x800167f5 -mem-write: 0x800167f5 <- 0xf0800167 -mem-write: 0x800167f9 <- 0xf0800167 -mem-write: 0x800167fd <- 0xf8800167 -mem-write: 0x80016801 <- 0xf8800167 -mem-write: 0x80016805 <- 0x800167 -mem-write: 0x80016809 <- 0x800168 -mem-write: 0x8001680d <- 0x8800168 -mem-write: 0x80016811 <- 0x8800168 -mem-write: 0x80016815 <- 0x10800168 -mem-write: 0x80016819 <- 0x10800168 -mem-write: 0x8001681d <- 0x18800168 -mem-write: 0x80016821 <- 0x18800168 -mem-write: 0x80016825 <- 0x20800168 -mem-write: 0x80016829 <- 0x20800168 -mem-write: 0x8001682d <- 0x28800168 -mem-write: 0x80016831 <- 0x28800168 -mem-write: 0x80016835 <- 0x30800168 -mem-write: 0x80016839 <- 0x30800168 -mem-write: 0x8001683d <- 0x43800168 -mem-write: 0x80016841 <- 0x0 -mem-write: 0x80016845 <- 0x0 -mem-write: 0x80016849 <- 0x0 -mem-write: 0x8001684d <- 0x0 -mem-write: 0x80016851 <- 0x0 -mem-write: 0x80016855 <- 0x0 -mem-write: 0x80016859 <- 0x0 -mem-write: 0x8001685d <- 0x43000000 -mem-write: 0x80016861 <- 0x0 -mem-write: 0x80016865 <- 0x0 -mem-write: 0x80016869 <- 0x0 -mem-write: 0x8001686d <- 0x0 -mem-write: 0x80016871 <- 0x0 -mem-write: 0x80016875 <- 0x0 -mem-write: 0x80016879 <- 0x0 -mem-write: 0x8001687d <- 0x43000000 -mem-write: 0x80016881 <- 0x0 -mem-write: 0x80016885 <- 0x0 -mem-write: 0x80016889 <- 0x0 -mem-write: 0x8001688d <- 0x0 -mem-write: 0x80016891 <- 0x0 -mem-write: 0x80016895 <- 0x0 -mem-write: 0x80016899 <- 0x0 -mem-write: 0x8001689d <- 0x43000000 -mem-write: 0x800168a1 <- 0x0 -mem-write: 0x800168a5 <- 0x0 -mem-write: 0x800168a9 <- 0x0 -mem-write: 0x800168ad <- 0x0 -mem-write: 0x800168b1 <- 0x0 -mem-write: 0x800168b5 <- 0x0 -mem-write: 0x800168b9 <- 0x0 -mem-write: 0x800168bd <- 0x43000000 -mem-write: 0x800168c1 <- 0x0 -mem-write: 0x800168c5 <- 0x0 -mem-write: 0x800168c9 <- 0x0 -mem-write: 0x800168cd <- 0x0 -mem-write: 0x800168d1 <- 0x0 -mem-write: 0x800168d5 <- 0x0 -mem-write: 0x800168d9 <- 0x0 -mem-write: 0x800168dd <- 0x43000000 -mem-write: 0x800168e1 <- 0x0 -mem-write: 0x800168e5 <- 0x0 -mem-write: 0x800168e9 <- 0x0 -mem-write: 0x800168ed <- 0x0 -mem-write: 0x800168f1 <- 0x0 -mem-write: 0x800168f5 <- 0x0 -mem-write: 0x800168f9 <- 0x0 -mem-write: 0x800168fd <- 0x43000000 -mem-write: 0x80016901 <- 0x0 -mem-write: 0x80016905 <- 0x0 -mem-write: 0x80016909 <- 0x0 -mem-write: 0x8001690d <- 0x0 -mem-write: 0x80016911 <- 0x0 -mem-write: 0x80016915 <- 0x0 -mem-write: 0x80016919 <- 0x0 -mem-write: 0x8001691d <- 0x74000000 -mem-write: 0x80016921 <- 0x18800100 -mem-write: 0x80016925 <- 0x8000e0 -mem-write: 0x80016929 <- 0xfc000000 -mem-write: 0x8001692d <- 0x6c800154 -mem-write: 0x80016931 <- 0x18800153 -mem-write: 0x80016935 <- 0x1880014a -mem-write: 0x80016939 <- 0x1880014a -mem-write: 0x8001693d <- 0x1880014a -mem-write: 0x80016941 <- 0x1880014a -mem-write: 0x80016945 <- 0x1880014a -mem-write: 0x80016949 <- 0x1880014a -mem-write: 0x8001694d <- 0x1880014a -mem-write: 0x80016951 <- 0x1880014a -mem-write: 0x80016955 <- 0xff80014a -mem-write: 0x80016959 <- 0xffffffff -mem-write: 0x8001695d <- 0xffffffff -mem-write: 0x80016961 <- 0xffffffff -mem-write: 0x80016965 <- 0x10000ff -mem-write: 0x80016969 <- 0x43534100 -mem-write: 0x8001696d <- 0x4949 -mem-write: 0x80016971 <- 0x0 -mem-write: 0x80016975 <- 0x0 -mem-write: 0x80016979 <- 0x0 -mem-write: 0x8001697d <- 0x0 -mem-write: 0x80016981 <- 0x0 -mem-write: 0x80016985 <- 0x0 -mem-write: 0x80016989 <- 0x43534100 -mem-write: 0x8001698d <- 0x4949 -mem-write: 0x80016991 <- 0x0 -mem-write: 0x80016995 <- 0x0 -mem-write: 0x80016999 <- 0x0 -mem-write: 0x8001699d <- 0x0 -mem-write: 0x800169a1 <- 0x0 -mem-write: 0x800169a5 <- 0x0 -mem-write: 0x800169a9 <- 0x0 -mem-write: 0x800169ad <- 0x0 -mem-write: 0x800169b1 <- 0x0 -mem-write: 0x800169b5 <- 0x3ff000 -mem-write: 0x800169b9 <- 0x0 -mem-write: 0x800169bd <- 0x402400 -mem-write: 0x800169c1 <- 0x0 -mem-write: 0x800169c5 <- 0x10435000 -mem-write: 0x800169c9 <- 0x800160 -mem-write: 0x800169cd <- 0x100000 -mem-write: 0x800169d1 <- 0x700000 -mem-write: 0x800169d5 <- 0x100200 -mem-write: 0x800169d9 <- 0x100100 -mem-write: 0x800169dd <- 0x10100000 -mem-write: 0x800169e1 <- 0xff800160 -mem-write: 0x800169e5 <- 0xffffff -mem-write: 0x800169e9 <- 0xe0000200 +allocate device memory +allocate shared memory +populate source buffer values +upload source buffers +upload kernel argument +start device +wait for completion Device running... -DEBUG ../../../simX/core.cpp:732: Creating a new thread with PC: 80000000 +DEBUG ../../../../simX/core.cpp:712: Creating a new thread with PC: 80000000 -DEBUG ../../../simX/core.cpp:732: Creating a new thread with PC: 80000000 +DEBUG ../../../../simX/core.cpp:712: Creating a new thread with PC: 80000000 -DEBUG ../../../simX/core.cpp:732: Creating a new thread with PC: 80000000 +DEBUG ../../../../simX/core.cpp:712: Creating a new thread with PC: 80000000 -DEBUG ../../../simX/core.cpp:732: Creating a new thread with PC: 80000000 +DEBUG ../../../../simX/core.cpp:712: Creating a new thread with PC: 80000000 -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000000 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 597 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x597 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000000: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000000 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x597 into: auipc +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r11 <- imm=0x0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 00000000 (0) @@ -23328,138 +57,71 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000004 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d458593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd458593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000004: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000000 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 2 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000000 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 3 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000000 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 4 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000000 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 5 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000004 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7c58593 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r11 <- r11, imm=124 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 00000000 (0) @@ -23471,7 +133,7 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 800000d4 (0) + %r11: 8000007c (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000000 (0) @@ -23492,54 +154,26 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000004 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000008 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2000513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2000513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000008: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000004 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=11, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 6 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000008 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x800513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 00000000 (0) @@ -23550,8 +184,8 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000020 (0) - %r11: 800000d4 (0) + %r10: 00000008 (0) + %r11: 8000007c (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000000 (0) @@ -23572,56 +206,27 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000008 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 7 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000000c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b5106b -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb5106b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000000c: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:961: WSPAWN -DEBUG ../../../simX/instruction.cpp:969: Spawning 4 new warps at PC: 800000d4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000008 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 7 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000000c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb5106b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:885: WSPAWN: r10, r11 +DEBUG ../../../../simX/instruction.cpp:890: Spawning 4 new warps at PC: 8000007c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 00000000 (0) @@ -23632,8 +237,8 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000020 (0) - %r11: 800000d4 (0) + %r10: 00000008 (0) + %r11: 8000007c (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000000 (0) @@ -23654,83 +259,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000000c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 1 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 8 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000000c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 1 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 9 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2000513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2000513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000d4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000000c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=1 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 8 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000000c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=1 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 9 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000007c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x400513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 00000000 (0) @@ -23741,7 +305,7 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000020 (0) + %r10: 00000004 (0) %r11: 00000000 (0) %r12: 00000000 (0) %r13: 00000000 (0) @@ -23763,139 +327,72 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 10 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 11 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 12 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 13 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2000513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2000513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000d4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000007c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 10 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000007c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 11 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000007c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 12 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000007c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 13 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000007c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x400513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 00000000 (0) @@ -23906,7 +403,7 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000020 (0) + %r10: 00000004 (0) %r11: 00000000 (0) %r12: 00000000 (0) %r13: 00000000 (0) @@ -23928,54 +425,26 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 14 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2000513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2000513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000d4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000007c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 14 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000007c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x400513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 00000000 (0) @@ -23986,7 +455,7 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000020 (0) + %r10: 00000004 (0) %r11: 00000000 (0) %r12: 00000000 (0) %r13: 00000000 (0) @@ -24008,56 +477,27 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 15 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000010 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c4000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc4000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000010: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800000d4 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000007c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 15 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000010 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x6c000ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=108 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 8000007c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000014 (0) %r 2: 00000000 (0) @@ -24068,8 +508,8 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000020 (0) - %r11: 800000d4 (0) + %r10: 00000008 (0) + %r11: 8000007c (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000000 (0) @@ -24090,55 +530,26 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000010 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 16 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000d8: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000010 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 16 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000080 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) @@ -24149,7 +560,7 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -24171,55 +582,72 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 17 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000d8: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #1 active threads changed from 1 to 4 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000080 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 17 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000080 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 18 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000080 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 19 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000080 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 20 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000080 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) @@ -24230,7 +658,7 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -24252,55 +680,27 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 18 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000d8: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #2 active threads changed from 1 to 4 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000080 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 21 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000080 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) @@ -24311,7 +711,7 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -24333,116 +733,27 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 19 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 20 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 21 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2000513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2000513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000d4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #3 active threads changed from 1 to 4 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000080 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 22 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000007c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x400513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000014 (0) %r 2: 00000000 (0) @@ -24453,8 +764,8 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000020 (0) - %r11: 800000d4 (0) + %r10: 00000004 (0) + %r11: 8000007c (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000000 (0) @@ -24475,307 +786,26 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 22 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 16197 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x16197 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000dc: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 00000000 00000000 00000000 00000000 (0) - %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 800160dc 800160dc 800160dc 800160dc (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) - %r11: 00000000 00000000 00000000 00000000 (0) - %r12: 00000000 00000000 00000000 00000000 (0) - %r13: 00000000 00000000 00000000 00000000 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000000 00000000 00000000 00000000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000dc -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 3 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 23 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 16197 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x16197 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000dc: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 00000000 00000000 00000000 00000000 (0) - %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 800160dc 800160dc 800160dc 800160dc (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) - %r11: 00000000 00000000 00000000 00000000 (0) - %r12: 00000000 00000000 00000000 00000000 (0) - %r13: 00000000 00000000 00000000 00000000 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000000 00000000 00000000 00000000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000dc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 3 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 24 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 16197 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x16197 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000dc: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 00000000 00000000 00000000 00000000 (0) - %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 800160dc 800160dc 800160dc 800160dc (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) - %r11: 00000000 00000000 00000000 00000000 (0) - %r12: 00000000 00000000 00000000 00000000 (0) - %r13: 00000000 00000000 00000000 00000000 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000000 00000000 00000000 00000000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000dc -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 3 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 25 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000d8: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000007c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 23 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000080 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) @@ -24786,8 +816,8 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) - %r11: 800000d4 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 8000007c 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000000 00000000 00000000 00000000 (0) %r14: 00000000 00000000 00000000 00000000 (0) @@ -24808,65 +838,56 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 26 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72c18193 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72c18193 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #0 active threads changed from 1 to 4 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000080 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 24 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 25 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000084 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x17197 into: auipc +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80017084 80017084 80017084 80017084 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -24888,65 +909,56 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 3 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 27 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72c18193 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72c18193 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000084 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=3, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 26 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000084 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=3, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 27 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000084 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x17197 into: auipc +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80017084 80017084 80017084 80017084 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -24968,65 +980,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 3 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 28 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72c18193 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72c18193 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000084 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=3, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 28 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000084 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x17197 into: auipc +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80017084 80017084 80017084 80017084 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -25048,69 +1035,264 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 3 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 29 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 21026f3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x21026f3 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e4: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000084 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=3, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 29 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000088 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb2418193 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 00000000 00000000 00000000 00000000 (0) + %r12: 00000000 00000000 00000000 00000000 (0) + %r13: 00000000 00000000 00000000 00000000 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000000 00000000 00000000 00000000 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000088 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=3, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 30 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000088 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb2418193 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 00000000 00000000 00000000 00000000 (0) + %r 2: 00000000 00000000 00000000 00000000 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 00000000 00000000 00000000 00000000 (0) + %r12: 00000000 00000000 00000000 00000000 (0) + %r13: 00000000 00000000 00000000 00000000 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000000 00000000 00000000 00000000 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000088 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=3, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 31 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000088 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb2418193 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 00000000 00000000 00000000 00000000 (0) + %r 2: 00000000 00000000 00000000 00000000 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 00000000 00000000 00000000 00000000 (0) + %r12: 00000000 00000000 00000000 00000000 (0) + %r13: 00000000 00000000 00000000 00000000 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000000 00000000 00000000 00000000 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000088 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=3, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 32 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000084 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x17197 into: auipc +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r3 <- imm=0x17 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 80000014 00000000 00000000 00000000 (0) + %r 2: 00000000 00000000 00000000 00000000 (0) + %r 3: 80017084 80017084 80017084 80017084 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 8000007c 00000000 00000000 00000000 (0) + %r12: 00000000 00000000 00000000 00000000 (0) + %r13: 00000000 00000000 00000000 00000000 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000000 00000000 00000000 00000000 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000084 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=3, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 33 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000008c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x22026f3 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=1 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 00000000 00000000 00000000 00000000 (0) + %r 2: 00000000 00000000 00000000 00000000 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000001 00000001 00000001 00000001 (0) @@ -25132,69 +1314,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 30 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 21026f3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x21026f3 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e4: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000008c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 34 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000008c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x22026f3 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000002 00000002 00000002 00000002 (0) @@ -25216,69 +1373,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 31 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 21026f3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x21026f3 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e4: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000008c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 35 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000008c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x22026f3 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000003 00000003 00000003 00000003 (0) @@ -25300,70 +1432,41 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 32 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 16197 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x16197 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000dc: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000008c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 36 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000088 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb2418193 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r3 <- r3, imm=4294966052 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 800160dc 800160dc 800160dc 800160dc (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) - %r11: 800000d4 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 8000007c 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000000 00000000 00000000 00000000 (0) %r14: 00000000 00000000 00000000 00000000 (0) @@ -25384,65 +1487,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 3 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 33 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a69693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a69693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000088 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=3, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 37 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000090 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1a69693 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 04000000 04000000 04000000 04000000 (0) @@ -25464,65 +1542,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 34 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a69693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a69693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000090 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 38 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000090 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1a69693 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 08000000 08000000 08000000 08000000 (0) @@ -25544,65 +1597,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 35 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a69693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a69693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000090 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 39 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000090 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1a69693 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 0c000000 0c000000 0c000000 0c000000 (0) @@ -25624,66 +1652,45 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 36 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72c18193 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72c18193 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000090 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 40 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000008c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x22026f3 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r13=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) - %r11: 800000d4 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 8000007c 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000000 00000000 00000000 00000000 (0) %r14: 00000000 00000000 00000000 00000000 (0) @@ -25704,69 +1711,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 3 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 37 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2002673 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2002673 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000ec: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 0 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 1 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 2 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000008c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 41 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000094 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2002673 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000001 00000002 00000003 (0) %r13: 04000000 04000000 04000000 04000000 (0) @@ -25788,69 +1770,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000ec -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 38 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2002673 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2002673 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000ec: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 0 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 1 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 2 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000094 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 42 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000094 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2002673 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000001 00000002 00000003 (0) %r13: 08000000 08000000 08000000 08000000 (0) @@ -25872,69 +1829,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000ec -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 39 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2002673 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2002673 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000ec: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 0 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 1 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 2 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000094 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 43 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000094 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2002673 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000000 00000000 00000000 (0) %r12: 00000000 00000001 00000002 00000003 (0) %r13: 0c000000 0c000000 0c000000 0c000000 (0) @@ -25956,70 +1888,41 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000ec -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 40 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 21026f3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x21026f3 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e4: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000094 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 44 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000090 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1a69693 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x1a +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) - %r11: 800000d4 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 8000007c 00000000 00000000 00000000 (0) %r12: 00000000 00000000 00000000 00000000 (0) %r13: 00000000 00000000 00000000 00000000 (0) %r14: 00000000 00000000 00000000 00000000 (0) @@ -26040,65 +1943,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 41 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a61593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa61593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000090 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 45 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000098 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa61593 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000001 00000002 00000003 (0) %r13: 04000000 04000000 04000000 04000000 (0) @@ -26120,65 +1998,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 42 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a61593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa61593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000098 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 46 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000098 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa61593 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000001 00000002 00000003 (0) %r13: 08000000 08000000 08000000 08000000 (0) @@ -26200,65 +2053,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 43 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a61593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa61593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000098 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 47 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000098 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa61593 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000001 00000002 00000003 (0) %r13: 0c000000 0c000000 0c000000 0c000000 (0) @@ -26280,67 +2108,46 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 44 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a69693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a69693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000098 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 48 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000094 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2002673 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r12 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r12=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) - %r11: 800000d4 00000000 00000000 00000000 (0) - %r12: 00000000 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 8000007c 00000000 00000000 00000000 (0) + %r12: 00000000 00000001 00000002 00000003 (0) %r13: 00000000 00000000 00000000 00000000 (0) %r14: 00000000 00000000 00000000 00000000 (0) %r15: 00000000 00000000 00000000 00000000 (0) @@ -26360,65 +2167,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 45 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 261613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x261613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000094 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 49 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000009c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x261613 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 04000000 04000000 04000000 04000000 (0) @@ -26440,65 +2222,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 46 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 261613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x261613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000009c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 50 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000009c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x261613 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 08000000 08000000 08000000 08000000 (0) @@ -26520,65 +2277,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 47 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 261613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x261613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000009c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 51 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000009c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x261613 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 0c000000 0c000000 0c000000 0c000000 (0) @@ -26600,70 +2332,41 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 48 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2002673 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2002673 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000ec: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 0 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 1 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 2 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000009c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 52 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000098 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa61593 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r11 <- r12, imm=0xa +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) - %r11: 800000d4 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000001 00000002 00000003 (0) %r13: 00000000 00000000 00000000 00000000 (0) %r14: 00000000 00000000 00000000 00000000 (0) @@ -26684,69 +2387,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 49 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6ffff137 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6ffff137 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f8: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000098 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 53 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x6ffff137 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6ffff000 6ffff000 6ffff000 6ffff000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 04000000 04000000 04000000 04000000 (0) @@ -26768,69 +2442,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 50 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6ffff137 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6ffff137 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f8: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 54 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x6ffff137 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6ffff000 6ffff000 6ffff000 6ffff000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 08000000 08000000 08000000 08000000 (0) @@ -26852,69 +2497,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 51 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6ffff137 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6ffff137 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f8: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 55 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x6ffff137 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6ffff000 6ffff000 6ffff000 6ffff000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 0c000000 0c000000 0c000000 0c000000 (0) @@ -26936,67 +2552,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 52 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a61593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa61593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 56 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000009c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x261613 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r12 <- r12, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000001 00000002 00000003 (0) + %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000000 00000000 00000000 00000000 (0) %r14: 00000000 00000000 00000000 00000000 (0) %r15: 00000000 00000000 00000000 00000000 (0) @@ -27016,65 +2607,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 53 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40b10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40b10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000fc: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000009c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 57 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40b10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6ffff000 6fffec00 6fffe800 6fffe400 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 04000000 04000000 04000000 04000000 (0) @@ -27096,65 +2662,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000fc -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 54 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40b10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40b10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000fc: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 58 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40b10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6ffff000 6fffec00 6fffe800 6fffe400 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 08000000 08000000 08000000 08000000 (0) @@ -27176,65 +2717,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000fc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 55 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40b10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40b10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000fc: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 59 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40b10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6ffff000 6fffec00 6fffe800 6fffe400 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 0c000000 0c000000 0c000000 0c000000 (0) @@ -27256,65 +2772,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000fc -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 56 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 261613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x261613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 60 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x6ffff137 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/instruction.cpp:749: LUI: r2 <- imm=0x6ffff +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) - %r 2: 00000000 00000000 00000000 00000000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 2: 6ffff000 6ffff000 6ffff000 6ffff000 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -27336,65 +2827,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 57 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000100 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40d10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40d10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000100: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 61 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40d10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6bfff000 6bffec00 6bffe800 6bffe400 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 04000000 04000000 04000000 04000000 (0) @@ -27416,149 +2882,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000100 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 58 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000100 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 59 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000100 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 60 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000100 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 61 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000100 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40d10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40d10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000100: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 62 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40d10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 67fff000 67ffec00 67ffe800 67ffe400 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 08000000 08000000 08000000 08000000 (0) @@ -27580,65 +2937,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000100 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 62 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000100 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40d10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40d10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000100: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 63 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40d10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 63fff000 63ffec00 63ffe800 63ffe400 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 0c000000 0c000000 0c000000 0c000000 (0) @@ -27660,69 +2992,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000100 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 63 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6ffff137 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6ffff137 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000f8: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 64 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40b10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) - %r 2: 6ffff000 6ffff000 6ffff000 6ffff000 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 2: 6ffff000 6fffec00 6fffe800 6fffe400 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -27744,65 +3047,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 64 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000104 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000104: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 65 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000ac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6bfff000 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 04000000 04000000 04000000 04000000 (0) @@ -27824,65 +3102,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000104 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 65 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000104 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000104: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000ac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=12 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 66 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000ac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 67fff000 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 08000000 08000000 08000000 08000000 (0) @@ -27904,65 +3157,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000104 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 66 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000104 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000104: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000ac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=12 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 67 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000ac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 63fff000 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 0c000000 0c000000 0c000000 0c000000 (0) @@ -27984,65 +3212,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000104 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 67 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40b10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40b10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000fc: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000ac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=12 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 68 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000a8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40d10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r2 <- r2, r13 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 6ffff000 6fffec00 6fffe800 6fffe400 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -28064,69 +3267,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 68 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000108 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 21026f3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x21026f3 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000108: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 69 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x21026f3 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6bfff000 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) @@ -28148,69 +3326,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000108 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 69 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000108 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 21026f3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x21026f3 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000108: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 70 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x21026f3 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 67fff000 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) @@ -28232,69 +3385,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000108 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 70 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000108 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 21026f3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x21026f3 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000108: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 71 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x21026f3 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 63fff000 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) @@ -28316,65 +3444,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000108 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 71 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000100 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40d10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40d10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000100: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 72 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000ac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc10133 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r2 <- r2, r12 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) - %r 2: 6ffff000 6fffec00 6fffe800 6fffe400 (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 2: 6ffff000 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -28396,73 +3499,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000100 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 72 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000010c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000010c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000ac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=12 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 73 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x68663 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6bfff000 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) @@ -28484,73 +3554,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000010c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 73 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000010c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000010c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 74 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x68663 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 67fff000 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) @@ -28572,73 +3609,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000010c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 74 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000010c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000010c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 75 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x68663 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 63fff000 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) @@ -28660,65 +3664,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000010c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 75 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000104 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c10133 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc10133 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000104: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 76 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x21026f3 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r13 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r13=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 6ffff000 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -28740,69 +3723,41 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000104 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 76 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000108 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 21026f3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x21026f3 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000108: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 77 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x68663 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=12 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800000c0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 6ffff000 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -28824,147 +3779,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000108 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 77 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000010c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000010c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000118 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000014 00000000 00000000 00000000 (0) - %r 2: 6ffff000 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000000 00000000 00000000 00000000 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000000 00000000 00000000 00000000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000010c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 78 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000110 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000110: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 78 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 79 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 6bfff000 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -28993,58 +3849,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000110 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 79 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000110 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000110: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 80 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 81 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 67fff000 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -29073,87 +3920,33 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000110 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 80 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000110 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 81 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000110 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000110: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 82 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000b8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 00000000 00000000 00000000 (0) %r 2: 63fff000 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -29182,55 +3975,26 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000110 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 82 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000114 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000114: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 83 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000bc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0:(0) %r 1:(0) %r 2:(0) @@ -29263,55 +4027,27 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29:(0) %r30:(0) %r31:(0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 0 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 0 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000114 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 83 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000114 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000114: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #1 active threads changed from 4 to 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 84 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000bc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0:(0) %r 1:(0) %r 2:(0) @@ -29344,55 +4080,27 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29:(0) %r30:(0) %r31:(0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 0 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 0 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000114 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 84 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000114 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000114: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #2 active threads changed from 4 to 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 85 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000bc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0:(0) %r 1:(0) %r 2:(0) @@ -29425,70 +4133,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29:(0) %r30:(0) %r31:(0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 0 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 0 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000114 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 85 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000118 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000118: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000014, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000014 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #3 active threads changed from 4 to 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 86 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800000c0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000014 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 6ffff000 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000020 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000000 00000000 00000000 00000000 (0) @@ -29510,214 +4190,153 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000118 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 86 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 87 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 88 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 89 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 90 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 91 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000014 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000014: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 87 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 88 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 89 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800000c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 90 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 91 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 92 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 93 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 94 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 95 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000014 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x100513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=1 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=1 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=1 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 80000014 00000000 00000000 00000000 (0) %r 2: 6ffff000 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -29746,59 +4365,30 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000014 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 92 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000018 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000018: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000014 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 96 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000018 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000014 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -29827,250 +4417,129 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000018 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 93 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 94 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 95 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 96 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 97 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 98 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 99 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000001c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e418513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e418513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000001c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #0 active threads changed from 4 to 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000018 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 97 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 98 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 99 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 100 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 101 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 102 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 103 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000001c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1d818513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r3, imm=472 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000014 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) %r12: 00000000 (0) %r13: 00000000 (0) @@ -30092,67 +4561,39 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000001c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 100 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000020 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 24c18613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x24c18613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000020: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000001c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 104 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000020 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x23018613 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r12 <- r3, imm=560 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000014 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 80016a54 (0) + %r12: 80016dd8 (0) %r13: 00000000 (0) %r14: 00000000 (0) %r15: 00000000 (0) @@ -30172,67 +4613,39 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000020 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 101 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000024 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40a60633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40a60633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000024: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000020 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 105 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000024 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40a60633 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r12 <- r12, r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000014 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) + %r12: 00000058 (0) %r13: 00000000 (0) %r14: 00000000 (0) %r15: 00000000 (0) @@ -30252,67 +4665,39 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000024 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 102 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000028 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000028: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000024 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=12, trs2=10 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 106 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000028 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x593 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r11 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000014 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) + %r12: 00000058 (0) %r13: 00000000 (0) %r14: 00000000 (0) %r15: 00000000 (0) @@ -30332,69 +4717,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000028 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 103 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000002c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5ed000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5ed000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000002c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e18 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000028 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 107 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000002c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x351000ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=2896 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000b7c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) + %r12: 00000058 (0) %r13: 00000000 (0) %r14: 00000000 (0) %r15: 00000000 (0) @@ -30414,252 +4770,130 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000002c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 104 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000002c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 105 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 106 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 107 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 108 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 109 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 110 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f00313 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf00313 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000002c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 108 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000002c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 109 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 110 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 111 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 112 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 113 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 114 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b7c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf00313 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r6 <- r0, imm=15 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) + %r12: 00000058 (0) %r13: 00000000 (0) %r14: 00000000 (0) %r15: 00000000 (0) @@ -30679,153 +4913,86 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 111 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 112 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 113 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 114 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b7c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=6, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 115 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b7c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=6, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 116 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b7c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=6, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 117 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b7c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=6, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 118 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b80 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50713 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r14 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) + %r12: 00000058 (0) %r13: 00000000 (0) - %r14: 800169ec (0) + %r14: 80016d80 (0) %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) @@ -30843,71 +5010,86 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 115 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c37e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c37e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e20: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 119 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 120 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 121 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 122 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b84 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2c37e63 into: branch +DEBUG ../../../../simX/instruction.cpp:739: BGEU: r6, r12, imm=60 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) + %r12: 00000058 (0) %r13: 00000000 (0) - %r14: 800169ec (0) + %r14: 80016d80 (0) %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) @@ -30925,226 +5107,117 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 116 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 117 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 118 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 119 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 120 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 121 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f77793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf77793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e24: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b84 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=6, trs2=12 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 123 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 124 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 125 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 126 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 127 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 128 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b88 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf77793 into: i_type +DEBUG ../../../../simX/instruction.cpp:621: ANDI: r15 <- r14, imm=0xf +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) + %r12: 00000058 (0) %r13: 00000000 (0) - %r14: 800169ec (0) - %r15: 0000000c (0) + %r14: 80016d80 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -31161,75 +5234,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 122 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a079063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa079063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e28: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 12 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000ec8 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b88 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 129 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b8c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa079063 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r15, r0, imm=160 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) + %r12: 00000058 (0) %r13: 00000000 (0) - %r14: 800169ec (0) - %r15: 0000000c (0) + %r14: 80016d80 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -31246,255 +5286,133 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 123 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 124 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 125 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 126 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 127 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 128 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 129 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ec8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 279693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x279693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ec8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b8c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=15, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 130 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 131 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 132 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 133 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 134 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 135 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 136 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b90 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8059263 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r11, r0, imm=132 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 00000030 (0) - %r14: 800169ec (0) - %r15: 0000000c (0) + %r12: 00000058 (0) + %r13: 00000000 (0) + %r14: 80016d80 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -31511,155 +5429,117 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ec8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 130 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ec8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 131 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ec8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 132 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ec8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 133 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ecc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 297 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x297 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ecc: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b90 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=11, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 137 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 138 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 139 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 140 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 141 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 142 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b94 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xff067693 into: i_type +DEBUG ../../../../simX/instruction.cpp:621: ANDI: r13 <- r12, imm=0xfffffff0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000ecc (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 00000030 (0) - %r14: 800169ec (0) - %r15: 0000000c (0) + %r12: 00000058 (0) + %r13: 00000050 (0) + %r14: 80016d80 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -31676,70 +5556,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ecc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 5 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 134 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ed0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ed0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b94 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 143 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b98 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf67613 into: i_type +DEBUG ../../../../simX/instruction.cpp:621: ANDI: r12 <- r12, imm=0xf +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000ecc (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169ec (0) - %r15: 0000000c (0) + %r12: 00000008 (0) + %r13: 00000050 (0) + %r14: 80016d80 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -31756,70 +5608,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ed0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 5 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 135 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ed4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8293 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8293 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ed4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b98 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 144 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b9c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe686b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r14 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169ec (0) - %r15: 0000000c (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d80 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -31836,987 +5660,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ed4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 5 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 136 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ed8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fa0680e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfa0680e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ed8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r13=80000efc, imm=4294967200 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e9c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000edc (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000030 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169ec (0) - %r15: 0000000c (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ed8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 137 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ed8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 138 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 139 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 140 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 141 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 142 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 143 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b701a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb701a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e9c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800169ec, rb=0, imm=3 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169ef -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000edc (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000030 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169ec (0) - %r15: 0000000c (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 144 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 145 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 146 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 147 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70123 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70123 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800169ec, rb=0, imm=2 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169ee -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000edc (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000030 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169ec (0) - %r15: 0000000c (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 148 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b700a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb700a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800169ec, rb=0, imm=1 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169ed -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000edc (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000030 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169ec (0) - %r15: 0000000c (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 149 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800169ec, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169ec -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000edc (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000030 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169ec (0) - %r15: 0000000c (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 150 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000eac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000eac: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000edc, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000edc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000edc (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000030 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169ec (0) - %r15: 0000000c (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000eac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 151 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 152 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 153 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 154 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 155 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 156 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000edc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 28093 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x28093 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000edc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b9c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 145 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016d80 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169ec (0) - %r15: 0000000c (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d80 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -32833,70 +5713,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000edc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 5 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 157 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ee0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff078793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff078793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ee0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 146 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016d84 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169ec (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d80 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -32913,70 +5766,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ee0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 158 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ee4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40f70733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40f70733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ee4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 147 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016d88 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000068 (0) - %r13: 80000efc (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d80 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -32993,70 +5819,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ee4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 159 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ee8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f60633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf60633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ee8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 148 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016d8c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000064 (0) - %r13: 80000efc (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d80 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -33073,72 +5872,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ee8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 160 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000eec -DEBUG ../../../simX/enc.cpp:105: Curr Code: f6c378e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf6c378e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000eec: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 149 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1070713 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r14 <- r14, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000064 (0) - %r13: 80000efc (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d90 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -33155,286 +5924,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000eec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 161 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000eec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 162 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 163 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 164 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 165 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 166 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 167 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 168 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ef0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f3dff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf3dff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ef0: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e2c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 150 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfed766e3 into: branch +DEBUG ../../../../simX/instruction.cpp:730: BLTU: r14, r13, imm=-20 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000ba0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000064 (0) - %r13: 80000efc (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d90 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -33451,230 +5977,134 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ef0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 169 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 170 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 171 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 172 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 173 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 174 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8059263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8059263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e2c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 151 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 152 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 153 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 154 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 155 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 156 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 157 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016d90 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000064 (0) - %r13: 80000efc (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d90 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -33691,226 +6121,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 175 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 176 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 177 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 178 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 179 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 180 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff067693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff067693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 158 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016d94 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000064 (0) - %r13: 00000060 (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d90 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -33927,70 +6174,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 181 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f67613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf67613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e34: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 159 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016d98 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 00000060 (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d90 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -34007,70 +6227,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 182 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e38: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 160 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016d9c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016d90 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -34087,72 +6280,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 183 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800169f0, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169f0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 161 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1070713 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r14 <- r14, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016da0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -34169,72 +6332,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 184 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800169f0, rb=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169f4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 162 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfed766e3 into: branch +DEBUG ../../../../simX/instruction.cpp:730: BLTU: r14, r13, imm=-20 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000ba0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016da0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -34251,156 +6385,134 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 185 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 186 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 187 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 188 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800169f0, rb=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169f8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 163 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 164 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 165 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 166 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 167 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 168 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 169 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016da0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016da0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -34417,72 +6529,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 189 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e48: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800169f0, rb=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 170 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016da4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 800169f0 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016da0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -34499,70 +6582,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 190 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 171 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016da8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a00 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016da0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -34579,73 +6635,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 191 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed766e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed766e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e50: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e3c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 172 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dac +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a00 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016da0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -34662,257 +6688,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 192 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 193 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 194 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 195 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 196 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 197 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 198 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a00, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a00 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 173 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1070713 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r14 <- r14, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a00 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016db0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -34929,72 +6740,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 199 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a00, rb=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a04 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 174 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfed766e3 into: branch +DEBUG ../../../../simX/instruction.cpp:730: BLTU: r14, r13, imm=-20 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000ba0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a00 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016db0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -35011,72 +6793,134 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 200 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a00, rb=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a08 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 175 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 176 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 177 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 178 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 179 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 180 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 181 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016db0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a00 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016db0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -35093,72 +6937,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 201 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e48: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a00, rb=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a0c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 182 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016db4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a00 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016db0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -35175,70 +6990,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 202 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 183 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016db8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a10 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016db0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -35255,73 +7043,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 203 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed766e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed766e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e50: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e3c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 184 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a10 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016db0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -35338,257 +7096,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 204 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 205 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 206 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 207 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 208 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 209 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 210 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a10, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a10 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 185 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1070713 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r14 <- r14, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a10 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016dc0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -35605,72 +7148,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 211 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a10, rb=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 186 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfed766e3 into: branch +DEBUG ../../../../simX/instruction.cpp:730: BLTU: r14, r13, imm=-20 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000ba0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a10 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016dc0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -35687,72 +7201,134 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 212 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a10, rb=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a18 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 187 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 188 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 189 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 190 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 191 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 192 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 193 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a10 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016dc0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -35769,72 +7345,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 213 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e48: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a10, rb=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a1c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 194 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dc4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a10 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016dc0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -35851,70 +7398,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 214 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 195 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ba8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dc8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a20 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016dc0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -35931,73 +7451,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 215 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed766e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed766e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e50: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e3c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ba8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 196 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb72623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r14, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dcc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a20 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016dc0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -36014,257 +7504,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 216 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 217 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 218 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 219 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 220 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 221 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 222 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a20, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a20 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 197 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1070713 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r14 <- r14, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a20 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -36281,72 +7556,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 223 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a20, rb=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a24 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 198 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfed766e3 into: branch +DEBUG ../../../../simX/instruction.cpp:730: BLTU: r14, r13, imm=-20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a20 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -36363,72 +7608,134 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 224 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a20, rb=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a28 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 199 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 200 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 201 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 202 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 203 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 204 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 205 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bb8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x61463 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r12, r0, imm=8 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000bc0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a20 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80016dd0 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -36445,72 +7752,117 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 225 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e48: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a20, rb=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bb8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 206 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 207 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 208 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 209 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 210 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 211 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bc0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40c306b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r13 <- r6, r12 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a20 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 00000007 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -36527,70 +7879,87 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 226 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bc0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=6, trs2=12 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 212 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bc0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=6, trs2=12 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 213 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bc0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=6, trs2=12 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 214 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bc0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=6, trs2=12 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 215 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bc4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x269693 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 00000000 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a30 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 0000001c (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -36607,73 +7976,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 227 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed766e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed766e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e50: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e3c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bc4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 216 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bc8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x297 into: auipc +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r5 <- imm=0x0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a30 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 0000001c (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -36690,257 +8028,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 228 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 229 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 230 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 231 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 232 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 233 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 234 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a30, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a30 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bc8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=5, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 217 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bcc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5686b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r5 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a30 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -36957,72 +8080,59 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 235 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a30, rb=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bcc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=5 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 218 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bcc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=5 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 219 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bd0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc68067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r13, imm=12 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000bf0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a30 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -37039,72 +8149,150 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 236 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a30, rb=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bd0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 220 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 221 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 222 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 223 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 224 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 225 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 226 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 227 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bf0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb703a3 into: store +DEBUG ../../../../simX/instruction.cpp:666: SB: r11 <- r14, imm=7 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dd7 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a30 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -37121,72 +8309,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 237 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e48: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a30, rb=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a3c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bf0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 228 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bf4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb70323 into: store +DEBUG ../../../../simX/instruction.cpp:666: SB: r11 <- r14, imm=6 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dd6 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a30 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -37203,70 +8362,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 238 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bf4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 229 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bf8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb702a3 into: store +DEBUG ../../../../simX/instruction.cpp:666: SB: r11 <- r14, imm=5 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dd5 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a40 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -37283,73 +8415,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 239 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed766e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed766e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e50: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e3c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bf8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 230 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000bfc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb70223 into: store +DEBUG ../../../../simX/instruction.cpp:666: SB: r11 <- r14, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dd4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a40 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -37366,257 +8468,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 240 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 241 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 242 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 243 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 244 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 245 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 246 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a40, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a40 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000bfc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 231 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000c00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb701a3 into: store +DEBUG ../../../../simX/instruction.cpp:666: SB: r11 <- r14, imm=3 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dd3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a40 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -37633,72 +8521,88 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 247 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a40, rb=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a44 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000c00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 232 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000c00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 233 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000c00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 234 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000c00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 235 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000c04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb70123 into: store +DEBUG ../../../../simX/instruction.cpp:666: SB: r11 <- r14, imm=2 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dd2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a40 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -37715,72 +8619,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 248 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a40, rb=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a48 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000c04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 236 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000c08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb700a3 into: store +DEBUG ../../../../simX/instruction.cpp:666: SB: r11 <- r14, imm=1 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dd1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a40 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -37797,72 +8672,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 249 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b72623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb72623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e48: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a40, rb=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a4c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000c08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 237 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000c0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb70023 into: store +DEBUG ../../../../simX/instruction.cpp:666: SB: r11 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dd0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a40 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -37879,70 +8725,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 250 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000c0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 238 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000c10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000030 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 800169ec (0) + %r10: 80016d80 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -37959,1791 +8778,117 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 251 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed766e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed766e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e50: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000c10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 239 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 240 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 241 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 242 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 243 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 244 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000030 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1517 into: auipc +DEBUG ../../../../simX/instruction.cpp:753: AUIPC: r10 <- imm=0x1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000030 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 252 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 253 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 254 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 255 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 256 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 257 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 258 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 61463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x61463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e54: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 4 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e5c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000030 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80016a50 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 12 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 259 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 260 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 261 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 262 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 263 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 264 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40c306b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40c306b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e5c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000030 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 0000000b (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 6 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 265 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 269693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x269693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e60: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000030 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 0000002c (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 266 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 297 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x297 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e64: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 0000002c (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 5 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 267 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e68: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 5 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 268 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 5 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 269 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c68067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc68067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e6c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r13=80000e90, imm=12 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e9c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 270 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 271 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 272 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 273 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 274 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 275 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 276 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 277 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b701a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb701a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e9c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a50, rb=0, imm=3 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a53 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 278 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70123 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70123 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a50, rb=0, imm=2 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a52 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 279 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b700a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb700a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a50, rb=0, imm=1 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a51 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 280 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016a50, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 281 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000eac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000eac: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000030, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000030 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 800169ec (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000eac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 282 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 283 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 284 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 285 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 286 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 287 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000030 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1517 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1517 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000030: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000030 (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 80001030 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -39760,1228 +8905,41 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000030 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 288 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000034 -DEBUG ../../../simX/enc.cpp:105: Curr Code: cf050513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcf050513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000034: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000030 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 245 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000034 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa5450513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r10, imm=4294965844 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000030 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 80000d20 (0) + %r10: 80000a84 (0) %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000034 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 289 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000038 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4a5000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4a5000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000038: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000cdc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000003c (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80000d20 (0) - %r11: 00000000 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000038 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 290 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 291 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 292 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 293 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 294 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 295 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 296 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cdc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cdc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000003c (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80000d20 (0) - %r11: 80000d20 (0) - %r12: 00000004 (0) - %r13: 80000e90 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 297 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 298 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 299 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 300 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ce0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ce0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000003c (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80000d20 (0) - %r11: 80000d20 (0) - %r12: 00000004 (0) - %r13: 00000000 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ce0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 301 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ce4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ce4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000003c (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80000d20 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ce4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 302 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ce8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ce8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000003c (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ce8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 303 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7590206f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7590206f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cec: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003c44 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000003c (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 80016a50 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 304 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 305 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 306 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 307 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 308 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 309 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c01a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c01a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c44: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=448 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169c8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000003c (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 80016010 (0) - %r15: fffffffc (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 310 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 311 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 312 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 313 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 14872783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x14872783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c48: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80016010, imm=328 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016158 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000003c (0) - %r 2: 6ffff000 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 80016010 (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) @@ -40999,72 +8957,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 314 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4078c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4078c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c4c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003ca4 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000034 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 246 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000038 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x209000ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=2568 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a40 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 80016010 (0) + %r10: 80000a84 (0) + %r11: 00000000 (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) @@ -41082,341 +9010,133 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 315 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 316 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 317 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 318 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 319 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 320 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 321 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 322 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 323 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 324 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003ca4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 14c70793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x14c70793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003ca4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000038 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 247 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 248 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 249 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 250 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 251 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 252 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 253 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a40 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50593 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r11 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 80016010 (0) - %r15: 8001615c (0) + %r10: 80000a84 (0) + %r11: 80000a84 (0) + %r12: 00000008 (0) + %r13: 80000be4 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -41433,156 +9153,87 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 325 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 326 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 327 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 328 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003ca8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 14f72423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x14f72423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003ca8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016010, rf=8001615c, imm=328 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016158 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a40 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 254 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a40 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 255 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a40 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 256 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a40 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 257 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a44 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x693 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r13 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) + %r10: 80000a84 (0) + %r11: 80000a84 (0) + %r12: 00000008 (0) %r13: 00000000 (0) - %r14: 80016010 (0) - %r15: 8001615c (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -41599,72 +9250,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 329 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003cac -DEBUG ../../../simX/enc.cpp:105: Curr Code: fa5ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfa5ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003cac: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003c50 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a44 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 258 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a48 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x613 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r12 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) + %r10: 80000a84 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) - %r14: 80016010 (0) - %r15: 8001615c (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -41681,257 +9302,891 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003cac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 330 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 331 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 332 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 333 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 334 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 335 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 336 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 47a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x47a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c50: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r15=8001615c, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016160 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a48 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 259 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a4c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a4c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 260 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a50 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7590206f into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=12120 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800039a8 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 8000003c (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 80016dd0 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a50 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 261 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 262 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 263 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 264 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 265 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 266 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039a8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1c01a703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r3, imm=448 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016d68 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 800163b0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 8000003c (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 800163b0 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 267 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 268 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 269 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 270 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039ac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14872783 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r14, imm=328 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 800164f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 8000003c (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 800163b0 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039ac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 271 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039b0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x4078c63 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r15, r0, imm=88 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80003a08 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 8000003c (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 800163b0 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039b0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=15, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 272 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 273 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 274 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 275 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 276 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 277 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 278 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 279 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 280 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 281 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 282 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 283 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14c70793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r14, imm=332 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 8000003c (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 800163b0 (0) + %r15: 800164fc (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 284 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 285 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 286 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 287 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14f72423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r15 <- r14, imm=328 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 800164f8 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 8000003c (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 800163b0 (0) + %r15: 800164fc (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 288 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfa5ff06f into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-92 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800039b4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 8000003c (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 800163b0 (0) + %r15: 800164fc (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 289 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 290 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 291 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 292 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 293 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 294 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 295 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039b4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x47a703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016500 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 8000003c (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000000 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -41948,70 +10203,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 337 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1f00813 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1f00813 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c54: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 296 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039b8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1f00813 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r16 <- r0, imm=31 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000000 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 0000001f (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -42028,72 +10255,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 338 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6e84e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6e84e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c58: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=16, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 297 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039bc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x6e84e63 into: branch +DEBUG ../../../../simX/instruction.cpp:712: BLT: r16, r14, imm=124 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000000 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 0000001f (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -42110,255 +10307,149 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 16 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 339 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 340 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 341 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 342 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 343 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 344 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 345 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 271813 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x271813 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=16, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 298 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 299 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 300 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 301 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 302 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 303 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 304 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 305 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039c0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x271813 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r16 <- r14, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000000 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -42375,73 +10466,88 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 346 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2050663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2050663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c60: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003c8c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=16, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 306 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=16, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 307 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=16, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 308 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=16, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 309 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039c4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2050663 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r10, r0, imm=44 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800039f0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000000 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -42458,226 +10564,117 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 347 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 348 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 349 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 350 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 351 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 352 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 170713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x170713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c8c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039c4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 310 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 311 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 312 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 313 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 314 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 315 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039f0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x170713 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r14 <- r14, imm=1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -42694,72 +10691,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 353 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e7a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe7a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c90: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=8001615c, re=1, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016160 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 316 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039f4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe7a223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016500 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -42776,70 +10744,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 354 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c94: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039f4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=15, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 317 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039f8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x10787b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -42856,72 +10796,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 355 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b7a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb7a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c98: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=8001615c, rb=80000d20, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016164 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039f8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=16 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 318 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800039fc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb7a423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r15, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016504 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -42938,98 +10849,57 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 356 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 357 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003c9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003c9c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039fc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=15, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 319 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800039fc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=15, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 320 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -43046,72 +10916,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003c9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 358 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003ca0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003ca0: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000003c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000003c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 321 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 8000003c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 8000003c (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -43128,256 +10969,133 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ca0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 359 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ca0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 360 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 361 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 362 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 363 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 364 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 365 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000003c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 541000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x541000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000003c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000d7c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 322 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 323 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 324 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 325 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 326 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 327 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 328 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000003c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2a5000ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=2724 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000ae0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -43394,226 +11112,117 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000003c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 366 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 367 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 368 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 369 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 370 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 371 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d7c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000003c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 329 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 330 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 331 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 332 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 333 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 334 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ae0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xff010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967280 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -43630,156 +11239,88 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 372 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 373 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 374 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 375 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d80: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeff0, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeff8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ae0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 335 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ae0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 336 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ae0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 337 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ae0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 338 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ae4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffeff8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -43796,156 +11337,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 376 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 377 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 378 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 379 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d84: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeff0, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeff0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ae4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 339 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ae8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1212023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffeff0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -43962,71 +11390,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 380 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80016437 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80016437 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d88: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ae8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 340 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000aec +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x80016437 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r8 <- imm=0xfff80016 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 80016000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) @@ -44043,71 +11442,57 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 381 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80016937 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80016937 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d8c: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000aec +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 341 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000aec +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 342 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000af0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x80016937 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r18 <- imm=0xfff80016 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 80016000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 8001615c (0) + %r15: 800164fc (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 80016000 (0) @@ -44124,70 +11509,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 382 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d90: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000af0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 343 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000af4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x3a040793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r8, imm=928 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 80016000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 80016000 (0) + %r15: 800163a0 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 80016000 (0) @@ -44204,70 +11561,546 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 383 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 90913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x90913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000af4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 344 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000af8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x3a090913 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r18 <- r18, imm=928 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 80016000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 80016000 (0) + %r15: 800163a0 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 800163a0 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000af8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 345 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000afc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40f90933 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 80000040 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 80016000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 00000001 (0) + %r15: 800163a0 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000afc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 346 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffeffc +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 80000040 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 80016000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 00000001 (0) + %r15: 800163a0 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 347 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 348 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 349 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 350 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x912223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffeff4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 80000040 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 80016000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 00000001 (0) + %r15: 800163a0 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=9 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 351 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40295913 into: i_type +DEBUG ../../../../simX/instruction.cpp:640: SRAI: r18 <- r18, imm=2 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 80000040 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 80016000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 00000001 (0) + %r15: 800163a0 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 352 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2090063 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r18, r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000b2c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 80000040 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 80016000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 00000001 (0) + %r15: 800163a0 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=18, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 353 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 354 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 355 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 356 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 357 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 358 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 359 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b2c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x80016437 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r8 <- imm=0xfff80016 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 80000040 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 80016000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 00000001 (0) + %r15: 800163a0 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 360 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b30 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x80016937 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r18 <- imm=0xfff80016 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 80000040 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 80016000 (0) + %r 9: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 00000000 (0) + %r13: 00000000 (0) + %r14: 00000001 (0) + %r15: 800163a0 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 80016000 (0) @@ -44284,857 +12117,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 384 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40f90933 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40f90933 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d98: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 361 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b34 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x3a040793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r8, imm=928 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 80016000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 80016000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 18 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 385 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d9c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeff0, r1=80000040, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeffc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000040 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 80016000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 386 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000da0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000da0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeff0, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeff4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000040 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 80016000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000da0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 387 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000da0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 388 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000da4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40295913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40295913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000da4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000040 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 80016000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000da4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 389 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000da8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2090063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2090063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000da8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000dc8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000040 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 80016000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000da8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 390 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 391 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 392 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 393 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 394 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 395 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 396 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000dc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80016437 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80016437 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000dc8: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000040 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 80016000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000dc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 397 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000dc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 398 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000dc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 399 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000dc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 400 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000dcc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80016937 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80016937 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000dcc: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000040 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 80016000 (0) + %r15: 800163a0 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 80016000 (0) @@ -45151,73 +12169,45 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000dcc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 401 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000dd0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000dd0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 362 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b38 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x3a490913 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r18 <- r18, imm=932 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 80016000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 80016000 (0) + %r15: 800163a0 (0) %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 80016000 (0) + %r18: 800163a4 (0) %r19: 00000000 (0) %r20: 00000000 (0) %r21: 00000000 (0) @@ -45231,150 +12221,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000dd0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 402 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000dd4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 490913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x490913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000dd4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 363 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b3c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40f90933 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 80016000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 80016000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016004 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000dd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 403 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000dd8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40f90933 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40f90933 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000dd8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000040 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 80016000 (0) + %r15: 800163a0 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000004 (0) @@ -45391,70 +12273,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000dd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 18 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 404 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ddc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40295913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40295913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ddc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b3c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 364 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b40 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40295913 into: i_type +DEBUG ../../../../simX/instruction.cpp:640: SRAI: r18 <- r18, imm=2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 80016000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 80016000 (0) + %r15: 800163a0 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000001 (0) @@ -45471,72 +12325,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ddc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 405 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000de0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2090063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2090063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000de0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b40 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 365 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b44 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2090063 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r18, r0, imm=32 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 80016000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 80016000 (0) + %r15: 800163a0 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000001 (0) @@ -45553,313 +12377,165 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000de0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 406 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000de0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 407 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 408 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 409 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 410 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 411 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 412 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 413 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 414 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000de4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000de4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b44 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=18, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 366 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b44 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=18, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 367 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 368 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 369 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 370 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 371 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 372 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 373 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 374 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b48 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x3a040413 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r8, imm=928 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016000 (0) + %r 8: 800163a0 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 80016000 (0) + %r15: 800163a0 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000001 (0) @@ -45876,70 +12552,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000de4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 415 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000de8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000de8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b48 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 375 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b4c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x493 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r9 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016000 (0) + %r 8: 800163a0 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 80016000 (0) + %r15: 800163a0 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000001 (0) @@ -45956,73 +12604,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000de8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 416 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000dec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000dec: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016000, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016000 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800000bc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b4c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 376 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b50 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x42783 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r8, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 800163a0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000064 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016000 (0) + %r 8: 800163a0 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 800000bc (0) + %r15: 80000064 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000001 (0) @@ -46039,70 +12658,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000dec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 417 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000df0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 148493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x148493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000df0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b50 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 377 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b54 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x148493 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r9 <- r9, imm=1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016000 (0) + %r 8: 800163a0 (0) %r 9: 00000001 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 800000bc (0) + %r15: 80000064 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000001 (0) @@ -46119,70 +12710,42 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000df0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 418 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000df4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 440413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x440413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000df4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b54 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=9, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 378 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b58 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x440413 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r8, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) + %r 8: 800163a4 (0) %r 9: 00000001 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 800000bc (0) + %r15: 80000064 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000001 (0) @@ -46199,72 +12762,43 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000df4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 419 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000df8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000df8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=800000bc, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800000bc -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b58 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 379 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b5c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x780e7 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000064 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000dfc (0) + %r 1: 80000b60 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) + %r 8: 800163a4 (0) %r 9: 00000001 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) - %r15: 800000bc (0) + %r15: 80000064 (0) %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000001 (0) @@ -46281,281 +12815,146 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000df8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 420 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 421 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 422 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 423 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 424 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 425 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 426 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 427 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000bc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b5c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 380 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 381 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 382 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 383 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 384 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 385 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 386 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 387 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000064 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000dfc (0) + %r 1: 80000b60 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) + %r 8: 800163a4 (0) %r 9: 00000001 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -46576,153 +12975,39 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 428 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 429 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 430 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 431 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000c0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800000d0 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000064 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 388 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000068 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x78863 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r15, r0, imm=16 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000078 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000dfc (0) + %r 1: 80000b60 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) + %r 8: 800163a4 (0) %r 9: 00000001 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -46743,253 +13028,130 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 432 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 433 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 434 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 435 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 436 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 437 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 438 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000d0: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000dfc, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000dfc -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000068 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=15, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 389 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 390 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 391 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 392 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 393 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 394 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 395 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000078 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000b60 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000dfc (0) + %r 1: 80000b60 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) + %r 8: 800163a4 (0) %r 9: 00000001 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -47010,226 +13172,113 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 439 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 440 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 441 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 442 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 443 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 444 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000dfc -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe9918e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe9918e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000dfc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 1 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000078 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 396 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 397 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 398 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 399 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 400 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 401 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b60 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfe9918e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r18, r9, imm=-16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000dfc (0) + %r 1: 80000b60 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) + %r 8: 800163a4 (0) %r 9: 00000001 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -47250,225 +13299,115 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000dfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 445 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 446 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 447 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 448 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 449 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 450 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e00: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeff0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffeffc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000040 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b60 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=18, trs2=9 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 402 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 403 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 404 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 405 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 406 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 407 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b64 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffeffc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000040 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) + %r 8: 800163a4 (0) %r 9: 00000001 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -47489,69 +13428,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 451 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e04: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeff0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffeff8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b64 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 408 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b68 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812403 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffeff8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000001 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -47572,69 +13482,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 452 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e08: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeff0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffeff4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b68 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 409 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b6c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x412483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffeff4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -47655,69 +13536,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 453 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e0c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeff0, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffeff0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b6c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 410 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b70 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x12903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffeff0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -47738,66 +13590,38 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 454 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e10: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b70 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 411 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b74 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -47818,68 +13642,39 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 455 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e14: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000040, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000040 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b74 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 412 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000b78 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000040 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000040 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -47900,224 +13695,114 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 456 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 457 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 458 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 459 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 460 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 461 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000040 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000040: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000048 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000b78 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 413 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 414 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 415 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 416 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 417 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 418 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000040 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8000ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=8 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000048 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) %r13: 00000000 (0) %r14: 00000001 (0) @@ -48138,308 +13823,115 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 462 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 463 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 464 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 465 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 466 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 467 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 468 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 469 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 470 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000048 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000048: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000040 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 419 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 420 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 421 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 422 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 423 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 424 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000048 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x800006b7 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r13 <- imm=0xfff80000 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) %r10: 00000000 (0) - %r11: 80000d20 (0) + %r11: 80000a84 (0) %r12: 00000000 (0) - %r13: 00000000 (0) + %r13: 80000000 (0) %r14: 00000001 (0) %r15: 00000000 (0) %r16: 00000000 (0) @@ -48458,68 +13950,40 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000048 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 471 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000004c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000004c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000048 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 425 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000004c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x80001637 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r12 <- imm=0xfff80001 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 80001000 (0) + %r13: 80000000 (0) %r14: 00000001 (0) %r15: 00000000 (0) %r16: 00000000 (0) @@ -48538,149496 +14002,44 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000004c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 472 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000050 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000050: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefd0, r1=80000044, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeffc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000004c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 426 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000050 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf006c693 into: i_type +DEBUG ../../../../simX/instruction.cpp:611: XORI: r13 <- r13, imm=0xffffff00 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) + %r 5: 80000bc8 (0) %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000050 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 473 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000054 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72c000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72c000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000054: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000780 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000058 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000054 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 474 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 475 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 476 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 477 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 478 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 479 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000780: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000058 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 480 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 481 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 482 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 483 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 484 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 485 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 486 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 487 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 488 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000784 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000784: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000058, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000058 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000058 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000784 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 489 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 490 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 491 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 492 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 493 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 494 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000058 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80015537 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80015537 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000058: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000058 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80015000 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000058 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 495 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000005c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a0450513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa0450513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000005c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000058 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000005c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 496 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000060 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6d5000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6d5000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000060: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000f34 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000060 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 497 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 498 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 499 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 500 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 501 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 502 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 503 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d81a303 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d81a303 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f34: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=472 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169e0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 504 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 505 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 506 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 507 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fc010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfc010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f38: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 508 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c12423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c12423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, rc=0, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 509 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2d12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2d12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, rd=0, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 510 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 511 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 512 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 513 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2b12223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2b12223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, rb=80000d20, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 514 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2e12823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2e12823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f48: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, re=1, imm=48 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefc0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 515 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f12a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f12a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f4c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, rf=0, imm=52 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefc4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 516 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3012c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3012c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f50: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r10=0, imm=56 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefc8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 517 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f54: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r11=0, imm=60 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefcc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80000d20 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 17 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 518 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 832583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x832583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f58: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r6=80016010, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016018 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 6 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 519 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2410693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2410693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 520 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f60: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a04 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 521 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f64: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 6 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 522 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f68: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r1=80000064, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 523 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f6c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, rd=6fffefb4, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 524 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f70: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000f80 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 525 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 526 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 527 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 528 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 529 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 530 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 531 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 532 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 533 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 534 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f84: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r1=80000f74, imm=492 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 535 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1f212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1f212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f88: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r12=0, imm=480 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef80 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 536 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f8c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r18=0, imm=456 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef68 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 537 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 538 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1da12023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1da12023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f90: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r1a=0, imm=448 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef60 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 26 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 539 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58c13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58c13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 540 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f98: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 541 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d12a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd12a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f9c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rd=6fffefb4, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedb4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 542 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fa0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fa0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r8=0, imm=488 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fa0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 543 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fa4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fa4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r9=0, imm=484 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef84 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fa4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 544 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fa8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d312e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d312e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fa8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r13=0, imm=476 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef7c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fa8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 545 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d412c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d412c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fac: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r14=0, imm=472 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef78 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 546 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fb0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d512a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d512a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fb0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r15=0, imm=468 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef74 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fb0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 547 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fb4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d612823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d612823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fb4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r16=0, imm=464 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef70 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 548 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fb8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d712623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d712623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fb8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r17=0, imm=460 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef6c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fb8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 549 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fbc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fbc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r19=0, imm=452 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef64 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 25 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 550 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fc0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1bb12e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1bb12e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fc0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r1b=0, imm=444 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef5c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 27 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 551 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 27 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 552 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 27 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 553 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 27 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 554 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fc4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50d13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50d13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fc4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fc4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 26 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 555 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 570060ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x570060ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fc8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007538 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 556 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 557 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 558 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 559 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 560 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 561 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007538 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12818513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12818513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007538: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016930 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007538 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 562 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007538 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 563 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007538 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 564 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007538 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 565 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000753c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000753c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000fcc, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000fcc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016930 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000753c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 566 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 567 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 568 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 569 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 570 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 571 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fcc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 52783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x52783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fcc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80016930, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016930 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8001536c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016930 (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 8001536c (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fcc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 572 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fd0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fd0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 8001536c (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fd0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 573 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fd4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f12823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f12823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fd4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rf=8001536c, imm=48 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedd0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 8001536c (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 574 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fd8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 514080ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x514080ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fd8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800094ec -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 8001536c (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 575 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 576 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 577 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 578 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 579 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 580 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 581 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 582 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 583 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800094ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 357793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x357793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800094ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 584 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 585 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 586 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 587 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800094f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800094f0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 588 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800094f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4079c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4079c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800094f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 6fffefb4 (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 589 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 590 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 591 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 592 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 593 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 594 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800094f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7f7f86b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7f7f86b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800094f8: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 7f7f8000 (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 595 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800094fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f7f68693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf7f68693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800094fc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a04 (0) - %r13: 7f7f7f7f (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 596 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009500 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009500: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 80014a04 (0) - %r13: 7f7f7f7f (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 597 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 598 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 599 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 600 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009504 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009504: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=8001536c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001536c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009504 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 601 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009508 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 470713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x470713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009508: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009508 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 602 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000950c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d677b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd677b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000950c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000950c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 603 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009510 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009510: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 7f7f7fad (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009510 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 604 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009514 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c7e7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc7e7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009514: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 7f7f7faf (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009514 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 605 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009514 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 606 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009514 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 607 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009518 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d7e7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd7e7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009518: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 7f7f7fff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009518 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 608 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009518 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 609 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000951c -DEBUG ../../../simX/enc.cpp:105: Curr Code: feb784e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfeb784e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000951c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 7f7f7fff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000951c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 610 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000951c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 611 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 612 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 613 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 614 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 615 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 616 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 617 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 618 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009520 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc74683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc74683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009520: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80015370, imm=4294967292 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001536c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 0000002e (0) - %r14: 80015370 (0) - %r15: 7f7f7fff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009520 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 619 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009524 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffd74603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffd74603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009524: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80015370, imm=4294967293 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001536c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 80015370 (0) - %r15: 7f7f7fff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009524 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 620 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009528 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffe74783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffe74783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009528: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80015370, imm=4294967294 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001536c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 80015370 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009528 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 621 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000952c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40a70733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40a70733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000952c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000952c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 622 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009530 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4068063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4068063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009530: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009530 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 623 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 624 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 625 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 626 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 627 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 628 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009534 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2060a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2060a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009534: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80009568 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009534 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 12 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 629 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 630 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 631 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 632 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 633 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 634 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009568 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffd70513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffd70513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009568: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 635 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 636 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 637 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 638 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000956c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000956c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000fdc, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000fdc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000956c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 639 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 640 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 641 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 642 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 643 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 644 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fdc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2a12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2a12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fdc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, ra=1, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedcc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 645 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fe0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fe0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=240 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee90 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fe0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 646 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fe4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fe4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=244 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee94 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fe4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 647 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fe8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fe8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=248 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee98 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fe8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 648 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fec -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fec: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=252 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 649 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ff0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d0663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd0663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ff0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ff0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 26 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 650 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 651 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 652 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 653 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 654 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 655 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ff4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 38d2703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x38d2703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ff4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r26=80016010, imm=56 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016048 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ff4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 26 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 656 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ff8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a0708e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa0708e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ff8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800018a8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ff8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 657 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 658 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 659 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 660 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 661 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 662 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 663 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 664 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 665 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800018a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d0513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd0513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800018a8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800018a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 26 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 666 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800018a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 26 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 667 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800018a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 26 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 668 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800018a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 26 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 669 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800018ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 349020ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x349020ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800018ac: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800043f4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800018ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 670 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 671 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 672 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 673 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 674 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 675 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800043f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3852783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3852783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800043f4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80016010, imm=56 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016048 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800043f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 676 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800043f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 677 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800043f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 678 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800043f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 679 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800043f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800043f8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004400 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800043f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 680 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 681 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 682 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 683 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 684 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 685 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 686 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004400 -DEBUG ../../../simX/enc.cpp:105: Curr Code: cedff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcedff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004400: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800040ec -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004400 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 687 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004400 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 688 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004400 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 689 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004400 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 690 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 691 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 692 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 693 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 694 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 695 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 696 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 697 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 698 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 699 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 800047b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x800047b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040f0: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 80004000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 700 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040f4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed80, r1=800018b0, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 80004000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 701 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040f8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed80, r8=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed98 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 80004000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 702 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040fc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed80, r9=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed94 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 80004000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 703 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004100 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004100: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed80, r12=80014a04, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed90 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 80004000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004100 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 704 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004100 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 705 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004100 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 706 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004100 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 707 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004104 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004104: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed80, r13=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 80004000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004104 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 708 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004108 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004108: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed80, r14=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 80004000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004108 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 709 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000410c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1512223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1512223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000410c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed80, r15=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed84 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 80004000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000410c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 710 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004110 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1612023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1612023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004110: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed80, r16=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed80 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 80004000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004110 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 711 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004114 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 452403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x452403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004114: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80016010, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016014 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800162fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 80004000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004114 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 712 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004118 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e078793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe078793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004118: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004118 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 713 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000411c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f52e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f52e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000411c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r10=80016010, rf=800040e0, imm=60 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001604c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000411c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 714 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004120 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2ec50713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2ec50713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004120: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 800040e0 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004120 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 715 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004124 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 300793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x300793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004124: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000003 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004124 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 716 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004124 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 717 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004128 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2ee52423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2ee52423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004128: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r10=80016010, re=800162fc, imm=744 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800162f8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000003 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004128 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 718 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000412c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2ef52223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2ef52223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000412c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r10=80016010, rf=3, imm=740 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800162f4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000003 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000412c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 719 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004130 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2e052023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2e052023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004130: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r10=80016010, r0=0, imm=736 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800162f0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000003 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004130 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 720 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004134 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 400793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x400793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004134: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004134 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 721 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004138 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004138: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004138 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 722 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000413c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000413c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, rf=4, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016308 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000413c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 723 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004140 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 800613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x800613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004140: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: ffffffff (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004140 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 724 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004140 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 725 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004140 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 726 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004140 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 727 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004144 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004144: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004144 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 728 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004148 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6042223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6042223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004148: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r0=0, imm=100 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016360 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004148 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 729 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000414c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000414c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r0=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800162fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000414c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 730 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004150 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004150: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r0=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016300 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004150 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 731 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004154 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004154: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r0=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016304 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004154 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 732 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004158 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004158: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r0=0, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001630c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004158 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 733 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000415c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000415c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r0=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016310 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000415c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 734 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004160 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004160: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r0=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016314 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004160 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 735 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004164 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c40513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c40513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004164: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004164 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 736 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004168 -DEBUG ../../../simX/enc.cpp:105: Curr Code: cb1fc0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcb1fc0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004168: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e18 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004168 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 737 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 738 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 739 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 740 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 741 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 742 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f00313 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf00313 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 800162fc (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 743 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 744 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c37e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c37e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e20: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e5c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000002e (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 745 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 746 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 747 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 748 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 749 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 750 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40c306b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40c306b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e5c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 00000007 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 6 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 751 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 269693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x269693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e60: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000001c (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 752 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 297 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x297 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e64: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000001c (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 5 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 753 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e68: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 5 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 754 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 5 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 755 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c68067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc68067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e6c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r13=80000e80, imm=12 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e8c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 756 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 757 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 758 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 759 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 760 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 761 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 762 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 763 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b703a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb703a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e8c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016358, rb=0, imm=7 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001635f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 764 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70323 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70323 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e90: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016358, rb=0, imm=6 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001635e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 765 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b702a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb702a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e94: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016358, rb=0, imm=5 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001635d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 766 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e98: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016358, rb=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001635c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 767 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b701a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb701a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e9c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016358, rb=0, imm=3 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001635b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 768 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70123 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70123 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016358, rb=0, imm=2 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001635a -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 769 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b700a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb700a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016358, rb=0, imm=1 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016359 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 770 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016358, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016358 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 771 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000eac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000eac: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000416c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000416c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000eac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 772 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 773 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 774 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 775 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 776 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 777 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000416c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80009b37 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80009b37 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000416c: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000000 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80009000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000416c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 778 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004170 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 892483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x892483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004170: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r18=80016010, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016018 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80009000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004170 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 779 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004174 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80009ab7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80009ab7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004174: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 80009000 (0) - %r22: 80009000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004174 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 780 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004178 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80009a37 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80009a37 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004178: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 00000000 (0) - %r20: 80009000 (0) - %r21: 80009000 (0) - %r22: 80009000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004178 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 781 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000417c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 800099b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x800099b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000417c: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009000 (0) - %r20: 80009000 (0) - %r21: 80009000 (0) - %r22: 80009000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000417c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 782 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004180 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2e0b0b13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2e0b0b13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004180: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009000 (0) - %r20: 80009000 (0) - %r21: 80009000 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004180 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 783 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004180 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 784 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004180 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 785 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004180 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 786 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004184 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 344a8a93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x344a8a93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004184: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009000 (0) - %r20: 80009000 (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004184 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 787 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004188 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3cca0a13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3cca0a13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004188: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009000 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004188 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 788 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000418c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 43498993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x43498993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000418c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00000004 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000418c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 789 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004190 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 107b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x107b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004190: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004190 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 790 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004194 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3642023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3642023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004194: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r16=800092e0, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001631c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004194 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 791 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004198 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3542223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3542223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004198: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r15=80009344, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016320 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004198 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 792 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000419c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3442423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3442423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000419c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r14=800093cc, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016324 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000419c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 793 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3342623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3342623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041a0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r13=80009434, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016328 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 794 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 842e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x842e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041a4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r8=800162fc, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016318 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 795 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 978793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x978793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041a8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 796 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: f4a623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf4a623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041ac: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, rf=10009, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 797 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 800613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x800613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041b0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 798 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041b4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 799 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 800 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 604a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x604a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041b8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r0=0, imm=100 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163c8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 801 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041bc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r0=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 802 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041c0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r0=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016368 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 803 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 804 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 805 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 806 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041c4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r0=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001636c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 807 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4a823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4a823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041c8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r0=0, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 808 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4aa23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4aa23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041cc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r0=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016378 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 809 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4ac23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4ac23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041d0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r0=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001637c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 80016358 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 810 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041d4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000416c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 811 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c41fc0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc41fc0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041d8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e18 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 812 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 813 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 814 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 815 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 816 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 817 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f00313 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf00313 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016358 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 818 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 819 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c37e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c37e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e20: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e5c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 820 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 821 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 822 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 823 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 824 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 825 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40c306b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40c306b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e5c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 00000007 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 6 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 826 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 269693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x269693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e60: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000001c (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 827 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 297 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x297 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e64: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000001c (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 5 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 828 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e68: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 5 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 829 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 5 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 830 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c68067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc68067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e6c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r13=80000e80, imm=12 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e8c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 831 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 832 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 833 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 834 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 835 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 836 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 837 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 838 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b703a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb703a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e8c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800163c0, rb=0, imm=7 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163c7 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 839 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70323 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70323 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e90: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800163c0, rb=0, imm=6 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163c6 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 840 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b702a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb702a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e94: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800163c0, rb=0, imm=5 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163c5 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 841 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e98: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800163c0, rb=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163c4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 842 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b701a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb701a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e9c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800163c0, rb=0, imm=3 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163c3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 843 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70123 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70123 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800163c0, rb=0, imm=2 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163c2 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 844 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b700a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb700a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800163c0, rb=0, imm=1 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163c1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 845 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=800163c0, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163c0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 846 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000eac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000eac: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=800041dc, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800041dc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000eac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 847 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 848 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 849 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 850 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 851 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 852 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c92403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc92403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041dc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r18=80016010, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001601c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800163cc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00010009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 853 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 207b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x207b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041e0: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 854 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 364a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x364a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041e4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r16=800092e0, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016384 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 855 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 354a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x354a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041e8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r15=80009344, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016388 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 856 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 344a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x344a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041ec: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r14=800093cc, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001638c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 857 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 334a623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x334a623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r13=80009434, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016390 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 858 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 94ae23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x94ae23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041f4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016364, r9=80016364, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016380 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 859 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1278793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1278793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041f8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 860 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800041fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800041fc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, rf=20012, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163d8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800041fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 861 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004200 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6042223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6042223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004200: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r0=0, imm=100 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016430 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004200 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 862 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004200 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 863 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004200 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 864 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004200 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 865 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004204 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004204: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r0=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163cc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004204 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 866 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004208 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004208: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r0=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163d0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004208 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 867 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000420c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000420c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r0=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163d4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000420c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 868 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004210 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004210: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r0=0, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163dc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004210 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 869 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004214 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004214: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r0=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163e0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004214 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 870 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004218 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004218: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r0=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163e4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 800163c0 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004218 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 871 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000421c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c40513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c40513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000421c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000421c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 872 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004220 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 800613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x800613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004220: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004220 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 873 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004224 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004224: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800041dc (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004224 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 874 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004228 -DEBUG ../../../simX/enc.cpp:105: Curr Code: bf1fc0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xbf1fc0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004228: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e18 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004228 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 875 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 876 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 877 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 878 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 879 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 880 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f00313 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf00313 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 800163c0 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 881 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 882 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c37e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c37e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e20: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e5c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 883 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 884 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 885 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 886 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 887 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 888 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40c306b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40c306b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e5c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 00000007 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 6 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 889 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 269693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x269693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e60: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000001c (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 890 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 297 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x297 into: auipc - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e64: auipc -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:814: AUIPC_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 0000001c (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 5 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 891 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e68: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 5 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 892 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 5 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 893 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c68067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc68067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e6c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r13=80000e80, imm=12 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000e8c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 894 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 895 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 896 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 897 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 898 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 899 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 900 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 901 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b703a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb703a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e8c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016428, rb=0, imm=7 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001642f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 902 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70323 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70323 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e90: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016428, rb=0, imm=6 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001642e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 903 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b702a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb702a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e94: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016428, rb=0, imm=5 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001642d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 904 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e98: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016428, rb=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001642c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 905 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000e9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b701a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb701a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000e9c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016428, rb=0, imm=3 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001642b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000e9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 906 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70123 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70123 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016428, rb=0, imm=2 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001642a -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 907 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b700a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb700a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016428, rb=0, imm=1 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016429 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 908 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ea8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b70023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb70023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ea8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=80016428, rb=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016428 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ea8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 909 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000eac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000eac: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000422c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000422c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000422c (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000eac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 910 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 911 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 912 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 913 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 914 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 915 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000422c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000422c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed80, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed9c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800018b0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000422c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 916 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004230 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3642023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3642023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004230: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r16=800092e0, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163ec -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004230 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 917 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004234 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3542223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3542223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004234: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r15=80009344, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163f0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004234 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 918 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004238 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3442423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3442423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004238: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r14=800093cc, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163f4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004238 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 919 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000423c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3342623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3342623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000423c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r13=80009434, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163f8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000423c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 920 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004240 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 842e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x842e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004240: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r8=800163cc, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163e8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004240 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 921 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004240 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 922 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004240 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 923 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004240 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 924 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004244 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004244: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed80, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed98 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00020012 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004244 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 925 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004248 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004248: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004248 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 926 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000424c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f92c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f92c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000424c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r18=80016010, rf=1, imm=56 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016048 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 80016364 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000424c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 927 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004250 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004250: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed80, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed94 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016010 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004250 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 928 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004254 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004254: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed80, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed90 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a04 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 80009434 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004254 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 929 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004254 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 930 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004258 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004258: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed80, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 800093cc (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004258 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 931 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000425c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812a03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812a03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000425c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed80, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed88 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 80009344 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000425c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 932 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004260 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004260: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed80, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed84 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 800092e0 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004260 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 933 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004264 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004264: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed80, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed80 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffed80 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004264 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 934 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004268 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004268: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004268 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 935 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000426c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000426c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=800018b0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800018b0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000426c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 936 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 937 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 938 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 939 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 940 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 941 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800018b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f4cff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf4cff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800018b0: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000ffc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 80000e80 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800018b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 942 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 943 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 944 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 945 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 946 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 947 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ffc -DEBUG ../../../simX/enc.cpp:105: Curr Code: cc1683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcc1683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ffc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r24=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10009 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 00000009 (0) - %r14: 80016428 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ffc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 948 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001000 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1069713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1069713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001000: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 00000009 (0) - %r14: 00090000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 949 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 950 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 951 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 952 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001004 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1269793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1269793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001004: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 00000009 (0) - %r14: 00090000 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001004 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 953 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001008 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1075713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1075713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001008: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 00000009 (0) - %r14: 00000009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001008 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 954 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000100c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 207ca63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x207ca63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000100c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 00000009 (0) - %r14: 00000009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000100c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 955 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 956 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 957 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 958 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 959 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 960 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001010 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001010: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000008 (0) - %r13: 00000009 (0) - %r14: 00002000 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001010 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 961 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001014 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 64c2603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x64c2603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001014: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r24=80016364, imm=100 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163c8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000009 (0) - %r14: 00002000 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001014 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 962 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001018 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e6e733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe6e733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001018: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000009 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001018 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 13 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 963 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000101c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1071713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1071713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000101c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000009 (0) - %r14: 20090000 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000101c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 964 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001020 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffffe6b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffffe6b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001020: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: ffffe000 (0) - %r14: 20090000 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001020 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 965 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001024 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41075713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41075713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001024: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: ffffe000 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001024 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 966 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001024 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 967 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001028 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff68693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff68693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001028: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: ffffdfff (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001028 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 968 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000102c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d676b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd676b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000102c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000102c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 12 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 969 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001030 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ec1623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xec1623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001030: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r24=80016364, re=2009, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001030 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 24 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 970 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001034 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1071713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1071713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001034: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 20090000 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001034 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 971 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001034 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 972 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001038 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6dc2223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6dc2223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001038: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r24=80016364, rd=0, imm=100 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163c8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 20090000 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001038 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 24 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 973 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000103c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1075713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1075713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000103c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000103c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 974 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001040 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 877693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x877693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001040: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000008 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 975 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 976 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 977 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 978 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001044 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2e068863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2e068863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001044: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000008 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001044 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 979 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 980 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 981 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 982 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 983 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 984 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 985 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001048 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10c2683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10c2683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001048: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r24=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001048 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 986 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000104c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2e068463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2e068463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000104c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80001334 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 00000000 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000104c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 987 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 988 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 989 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 990 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 991 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 992 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 993 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001334 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c0593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc0593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001334: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016428 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001334 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 994 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001334 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 995 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001334 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 996 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001334 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 997 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001338 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d0513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd0513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001338: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800018b0 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001338 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 26 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 998 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000133c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7ac020ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7ac020ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000133c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003ae8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00240000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000133c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 999 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1000 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1001 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1002 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1003 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1004 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003ae8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d81a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d81a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003ae8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=472 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169e0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ae8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1005 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ae8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1006 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ae8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1007 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ae8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1008 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003aec -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003aec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003aec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1009 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003af0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003af0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed90, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed98 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003af0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1010 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003af4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003af4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed90, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed94 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003af4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1011 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003af8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003af8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed90, r1=80001340, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003af8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1012 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003af8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1013 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003afc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003afc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003afc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1014 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b00: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1015 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1016 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1017 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1018 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b04: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1019 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1020 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1021 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1022 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1023 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1024 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 387a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x387a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b08: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r15=80016010, imm=56 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016048 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1025 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: e070063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe070063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b0c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000001 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1026 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1027 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1028 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1029 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1030 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1031 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1032 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c41703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc41703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b10: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12009 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 80016010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1033 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1071793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1071793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b14: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 20090000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1034 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 877693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x877693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000008 (0) - %r14: 00002009 (0) - %r15: 20090000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1035 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 107d793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x107d793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000008 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1036 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1037 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4068063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4068063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b20: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000008 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1038 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1039 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1040 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1041 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1042 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1043 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1042683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1042683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b24: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1044 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6068063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6068063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b28: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003b88 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1045 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1046 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1047 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1048 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1049 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1050 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1051 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2807f613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2807f613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b88: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1052 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1053 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1054 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1055 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 20000593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x20000593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b8c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000200 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1056 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f8b60ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf8b60ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b90: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000200 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 12 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1057 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1058 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1059 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1060 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1061 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1062 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1063 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1064 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b98: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1065 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 27d030ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x27d030ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b9c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007618 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1066 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1067 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1068 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1069 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1070 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1071 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007618 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c5d783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc5d783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007618: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12009 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007618 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1072 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007618 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1073 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007618 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1074 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007618 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1075 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000761c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000761c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000761c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1076 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007620 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007620: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r8=80016364, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007620 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1077 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007624 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007624: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r1=80003ba0, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007624 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1078 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007628 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007628: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r9=80016010, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed84 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007628 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1079 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007628 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1080 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000762c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000762c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r12=80014a04, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed80 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000762c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1081 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007630 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 27f793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x27f793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007630: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007630 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1082 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007634 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007634: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1083 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007638 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2078863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2078863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007638: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007668 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007638 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1084 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1085 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1086 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1087 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1088 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1089 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007668 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c10693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc10693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007668: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 00000000 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007668 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1090 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007668 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1091 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007668 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1092 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007668 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1093 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000766c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 810613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x810613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000766c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000766c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1094 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007670 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007670: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007670 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1095 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007674 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ed5ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xed5ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007674: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007548 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007674 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1096 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1097 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1098 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1099 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1100 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1101 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007548 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f9010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf9010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007548: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007548 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1102 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007548 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1103 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007548 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1104 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007548 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1105 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000754c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000754c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r8=80016364, imm=104 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed68 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000754c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1106 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007550 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007550: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007550 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1107 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007554 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e59583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe59583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007554: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=14 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12009 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007554 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1108 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007554 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1109 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007558 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007558: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r9=80016010, imm=100 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed64 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007558 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1110 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000755c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000755c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r12=80014a04, imm=96 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed60 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000755c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1111 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007560 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007560: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r1=80007678, imm=108 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed6c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007560 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1112 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007564 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007564: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007564 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1113 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007568 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007568: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1114 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000756c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 405ca63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x405ca63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000756c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed78 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000756c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1115 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1116 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1117 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1118 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1119 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1120 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007570 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 810613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x810613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007570: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007570 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1121 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007574 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 434060ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x434060ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007574: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d9a8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007574 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1122 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1123 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1124 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1125 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1126 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1127 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9a8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00002009 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1128 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1129 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1130 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1131 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9ac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1132 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9b0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffecf0, r8=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffecf8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1133 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9b4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffecf0, r9=6fffed78, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffecf4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1134 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9b8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1135 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9bc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 80016010 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1136 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 70513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x70513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000001 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1137 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1138 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1139 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1140 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9c4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffecf0, r1=80007578, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffecfc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000001 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1141 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2401a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2401a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9c8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, r0=0, imm=584 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000001 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1142 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 95df20ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x95df20ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9cc: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000328 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d9d0 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000001 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1143 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1144 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1145 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1146 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1147 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1148 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000328 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 27b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x27b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000328: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d9d0 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000001 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00002000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000328 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1149 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000328 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1150 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000328 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1151 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000328 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1152 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000032c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f5a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf5a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000032c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r11=6fffed08, rf=2000, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed0c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d9d0 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000001 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00002000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000032c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1153 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000330 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000330: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d9d0 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00002000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000330 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1154 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000334 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000334: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d9d0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d9d0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d9d0 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: 00002000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000334 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1155 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000334 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1156 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1157 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1158 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1159 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1160 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1161 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9d0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d9d0 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1162 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f50c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf50c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9d4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d9d0 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1163 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1164 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1165 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1166 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1167 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1168 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1169 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9d8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffecf0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffecfc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80007578 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1170 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9dc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffecf0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffecf8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1171 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9e0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffecf0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffecf4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffed78 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffecf0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1172 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9e4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1173 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d9e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d9e8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80007578, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007578 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d9e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1174 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1175 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1176 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1177 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1178 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1179 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007578 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4054463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4054463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007578: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007578 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1180 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1181 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1182 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1183 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1184 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1185 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000757c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000757c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00002000 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000757c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1186 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007580 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f7b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf7b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007580: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007578 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00002000 (0) - %r15: 0000f000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1187 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1188 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1189 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1190 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007584 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007584: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=108 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed6c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80007678 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00002000 (0) - %r15: 0000f000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007584 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1191 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007588 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e7f7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe7f7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007588: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00002000 (0) - %r15: 00002000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007588 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1192 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000758c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffffe737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffffe737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000758c: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00002000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000758c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1193 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007590 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007590: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007590 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1194 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007594 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007594: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=104 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed68 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007594 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1195 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007598 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 17b793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x17b793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007598: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007598 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1196 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007598 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1197 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000759c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f92023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf92023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000759c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r18=6fffed7c, rf=1, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed7c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000759c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1198 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800075a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40000793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40000793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800075a0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800075a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1199 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800075a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f4a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf4a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800075a4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=6fffed78, rf=400, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed78 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00000000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800075a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1200 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800075a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1201 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800075a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1537 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1537 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800075a8: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffed78 (0) - %r10: 00001000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800075a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1202 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800075ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800075ac: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=100 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed64 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00001000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 6fffed7c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800075ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1203 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800075ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1204 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800075b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800075b0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=96 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed60 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a04 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00001000 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800075b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1205 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800075b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80050513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80050513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800075b4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000800 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800075b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1206 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800075b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800075b8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000800 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800075b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1207 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800075bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800075bc: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80007678, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007678 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000800 (0) - %r11: 6fffed08 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800075bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1208 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1209 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1210 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1211 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1212 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1213 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007678 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007678: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed78 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000800 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007678 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1214 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000767c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000767c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000800 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000767c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1215 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007680 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007680: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007678 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007680 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1216 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007680 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1217 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007680 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1218 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007680 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1219 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007684 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b4000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb4000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007684: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007738 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007684 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1220 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1221 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1222 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1223 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1224 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1225 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007738 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007738: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007738 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1226 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007738 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1227 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007738 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1228 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007738 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1229 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000773c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000773c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r13=0, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed5c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000773c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1230 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007740 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007740: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r1=80007688, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed6c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007740 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1231 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007740 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1232 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007740 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1233 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007740 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1234 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007744 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007744: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r8=80016364, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed68 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007744 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1235 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007748 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007748: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r9=80016010, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed64 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007748 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1236 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000774c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000774c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r12=800, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed60 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000774c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1237 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007750 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007750: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r14=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed58 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007750 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1238 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007754 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1512a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1512a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007754: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r15=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed54 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007754 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1239 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007758 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1612823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1612823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007758: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r16=0, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007758 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1240 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000775c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1712623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1712623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000775c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r17=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed4c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000775c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1241 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007760 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007760: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r18=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed48 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007760 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1242 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007764 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007764: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r19=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed44 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 00000400 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007764 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 25 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1243 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007768 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b58793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb58793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007768: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: ffffe000 (0) - %r15: 0000040b (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007768 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1244 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000776c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1600713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1600713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000776c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 0000040b (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000776c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1245 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007770 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007770: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 0000040b (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007770 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1246 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007774 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6f76463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6f76463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007774: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800077dc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 0000040b (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007774 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1247 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1248 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1249 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1250 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1251 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1252 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800077dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff87f493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff87f493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800077dc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 0000040b (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1253 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1254 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1255 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1256 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800077e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1807c063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1807c063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800077e0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 0000040b (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1257 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1258 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1259 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1260 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1261 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1262 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800077e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 16b4ee63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x16b4ee63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800077e4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 0000040b (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1263 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1264 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1265 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1266 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1267 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1268 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800077e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7bc000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7bc000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800077e8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007fa4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 0000040b (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1269 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1270 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1271 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1272 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1273 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1274 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007fa4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007fa4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=800077ec, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800077ec -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 0000040b (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1275 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1276 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1277 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1278 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1279 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1280 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1281 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1282 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1283 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800077ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1f700793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1f700793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800077ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 000001f7 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1284 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800077f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4497fa63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4497fa63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800077f0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 000001f7 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1285 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1286 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1287 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1288 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1289 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1290 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1291 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800077f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 94d793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x94d793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800077f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 00000002 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1292 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800077f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a078463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a078463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800077f8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000016 (0) - %r15: 00000002 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1293 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1294 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1295 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1296 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1297 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1298 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1299 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800077fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 400713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x400713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800077fc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000004 (0) - %r15: 00000002 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800077fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1300 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007800 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3cf76063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3cf76063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007800: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000004 (0) - %r15: 00000002 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007800 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1301 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007800 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1302 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007800 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1303 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007800 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1304 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1305 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1306 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1307 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1308 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1309 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007804 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 64d793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x64d793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007804: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 6fffed08 (0) - %r13: 6fffed7c (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007804 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1310 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007808 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3978613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3978613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007808: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 6fffed7c (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007808 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1311 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000780c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3878513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3878513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000780c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 6fffed7c (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000780c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1312 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007810 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 361693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x361693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007810: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 00000248 (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007810 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1313 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007810 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1314 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007814 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c3018913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc3018913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007814: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 00000248 (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007814 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1315 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007818 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d906b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd906b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007818: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 80016680 (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007818 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 18 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1316 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000781c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 46a403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x46a403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000781c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=80016680, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016684 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016678 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016678 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 80016680 (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000781c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1317 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007820 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff868693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff868693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007820: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016678 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007820 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1318 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007820 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1319 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007824 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2868663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2868663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007824: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007850 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016678 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007824 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1320 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007824 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1321 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1322 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1323 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1324 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1325 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1326 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1327 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1328 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007850 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1092403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1092403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007850: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r18=80016438, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016448 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016440 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016440 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 00000000 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007850 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1329 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007850 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1330 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007850 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1331 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007850 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1332 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007854 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 890893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x890893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007854: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016440 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007854 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1333 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007858 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 17140863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x17140863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007858: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800079c8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016440 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000004 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007858 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 17 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1334 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1335 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1336 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1337 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1338 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1339 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1340 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1341 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 492703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x492703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079c8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r18=80016438, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001643c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016440 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000000 (0) - %r15: 00000010 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1342 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1343 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1344 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1345 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40265793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40265793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079cc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016440 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000400 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000000 (0) - %r15: 00000012 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1346 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079d0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016440 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000000 (0) - %r15: 00000012 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1347 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f595b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf595b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079d4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016440 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000000 (0) - %r15: 00000012 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1348 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: eeb77ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xeeb77ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079d8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016440 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000000 (0) - %r15: 00000012 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1349 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1350 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1351 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1352 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1353 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1354 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1355 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1356 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 892403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x892403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079dc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r18=80016438, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016440 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016438 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000000 (0) - %r15: 00000012 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1357 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 442a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x442a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079e0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016438, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001643c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000000 (0) - %r15: 00000012 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1358 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffcafb13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffcafb13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079e4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000000 (0) - %r15: 00000012 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1359 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 9b6863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x9b6863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079e8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800079f8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000000 (0) - %r15: 00000012 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 22 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1360 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 22 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1361 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1362 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1363 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1364 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1365 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1366 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1367 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1368 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1f01aa83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1f01aa83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079f8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=496 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169f8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: 00000000 (0) - %r15: 00000012 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1369 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800079fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1dc1a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1dc1a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800079fc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=476 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169e4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ffffffff -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: 00000012 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800079fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1370 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a00: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1371 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1372 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1373 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1374 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1640a33 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1640a33 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a04: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 8 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1375 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1548ab3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1548ab3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a08: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000408 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 9 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1376 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 34f70463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x34f70463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a0c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007d54 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000408 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1377 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1378 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1379 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1380 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1381 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1382 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10a8a93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10a8a93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d54: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1383 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1384 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1385 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1386 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ccdff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xccdff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d58: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007a24 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00040000 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1387 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1388 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1389 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1390 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1391 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1392 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a8593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa8593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a24: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000048 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1393 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a28: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800077ec (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1394 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 774010ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x774010ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a2c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800091a0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1395 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1396 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1397 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1398 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1399 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1400 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091a0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1401 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1402 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1403 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1404 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091a4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed30, r8=80016438, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1405 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091a8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed30, r9=408, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed34 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1406 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091ac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1407 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1408 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091b0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1409 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091b4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed30, r1=80007a30, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1410 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2401a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2401a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091b8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, r0=0, imm=584 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1411 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c54f70ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc54f70ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091bc: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000610 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1412 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1413 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1414 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1415 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1416 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1417 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000610 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000610: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000610 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1418 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000610 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1419 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000610 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1420 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000610 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1421 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000614 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c41a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c41a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000614: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=452 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169cc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 80016678 (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000614 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1422 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000618 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41f7d693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41f7d693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000618: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000618 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1423 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000061c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f6c7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf6c7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000061c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000061c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 13 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1424 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000620 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40d787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40d787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000620: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000620 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1425 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000624 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000624: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 10000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000624 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1426 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000624 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1427 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000628 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1cf1a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1cf1a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000628: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, rf=10000418, imm=452 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169cc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 10000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000628 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1428 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000628 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1429 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000062c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000062c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=800091c0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800091c0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 10000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000062c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1430 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000062c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1431 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1432 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1433 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1434 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1435 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1436 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1437 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1438 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1439 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1440 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1441 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f50c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf50c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1442 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1443 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1444 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1445 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1446 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1447 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1448 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091c8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed30, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80007a30 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1449 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091cc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed30, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016438 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1450 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091d0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed30, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 408 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1451 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091d4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1452 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091d8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80007a30, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007a30 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1453 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1454 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1455 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1456 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1457 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1458 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1459 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50b93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50b93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a34: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1460 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 28f50663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x28f50663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a38: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1461 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1462 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1463 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1464 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1465 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1466 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 29456263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x29456263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a3c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007cc0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1467 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1468 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1469 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1470 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1471 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1472 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007cc0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 11240e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x11240e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007cc0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007ddc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007cc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1473 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007cc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1474 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007cc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1475 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007cc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1476 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1477 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1478 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1479 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1480 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1481 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ddc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1f818c13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1f818c13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ddc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ddc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1482 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ddc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1483 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ddc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1484 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ddc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1485 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007de0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c2783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc2783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007de0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r24=80016a00, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a00 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007de0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1486 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007de4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fa87b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfa87b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007de4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007de4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 21 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1487 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007de8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fc2023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfc2023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007de8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r24=80016a00, rf=418, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a00 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007de8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 24 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1488 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007de8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 24 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1489 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007dec -DEBUG ../../../simX/enc.cpp:105: Curr Code: c6dff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc6dff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007dec: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007a58 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007dec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1490 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007dec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1491 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1492 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1493 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1494 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1495 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1496 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1497 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1dc1a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1dc1a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a58: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=476 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169e4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ffffffff -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1498 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1499 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1500 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1501 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1502 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3ae68663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3ae68663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a60: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007e0c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1503 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1504 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1505 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1506 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1507 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1508 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1509 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007e0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d71ae23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d71ae23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007e0c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, r17=10000000, imm=476 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169e4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1510 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1511 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1512 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1513 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007e10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c61ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc61ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007e10: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007a70 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007e10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1514 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1515 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1516 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1517 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1518 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1519 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7bfc93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7bfc93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a70: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1520 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007a74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 300c8263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x300c8263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007a74: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007d78 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007a74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 25 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1521 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1522 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1523 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1524 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1525 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1526 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1527 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 15b85b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x15b85b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d78: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 10000418 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 23 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1528 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40b005b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40b005b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d7c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: effffbe8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1529 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1459593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1459593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: be800000 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 80016438 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1530 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1531 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1532 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1533 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 145da13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x145da13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d84: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: be800000 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1534 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a0593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa0593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d88: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000000 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1535 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d8c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007a30 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1536 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1537 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 410010ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x410010ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d90: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800091a0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1538 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1539 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1540 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1541 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1542 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1543 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1544 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091a0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1545 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091a4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed30, r8=80016438, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1546 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091a8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed30, r9=408, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed34 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1547 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091ac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 80016010 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1548 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1549 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091b0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 00000be8 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1550 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091b4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed30, r1=80007d94, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 00000be8 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1551 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2401a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2401a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091b8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, r0=0, imm=584 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 00000be8 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1552 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c54f70ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc54f70ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091bc: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000610 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 00000be8 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000418 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1553 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1554 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1555 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1556 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1557 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1558 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000610 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000610: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 00000be8 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000be8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000610 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1559 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000614 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c41a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c41a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000614: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=452 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169cc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000418 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: ffffffff (0) - %r14: ffffffff (0) - %r15: 00000be8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000614 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1560 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000618 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41f7d693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41f7d693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000618: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 00000be8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000618 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1561 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000061c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f6c7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf6c7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000061c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 00000be8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000061c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 13 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1562 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000620 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40d787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40d787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000620: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 00000be8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000620 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1563 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000624 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000624: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 10001000 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000624 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1564 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000624 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1565 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000628 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1cf1a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1cf1a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000628: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, rf=10001000, imm=452 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169cc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 10001000 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000628 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1566 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000628 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1567 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000062c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000062c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=800091c0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800091c0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: 10001000 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000062c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1568 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000062c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1569 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1570 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1571 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1572 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1573 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1574 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1575 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1576 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f50c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf50c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800091c0 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1577 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1578 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1579 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1580 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1581 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1582 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1583 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091c8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed30, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80007d94 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1584 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091cc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed30, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016438 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1585 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091d0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed30, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 408 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed30 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1586 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091d4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1587 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800091d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800091d8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80007d94, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007d94 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800091d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1588 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1589 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1590 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1591 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1592 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1593 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1594 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007d98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d0f51ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd0f51ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007d98: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268436504 rsrc1 : 4294967295 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007ab0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 10000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007d98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1595 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1596 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1597 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1598 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1599 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1600 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1601 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ab0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41750533 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41750533 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ab0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00000418 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ab0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1602 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ab0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1603 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ab0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1604 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ab0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1605 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ab4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1450ab3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1450ab3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ab4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00000be8 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ab4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 10 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1606 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ab8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c2583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc2583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ab8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r24=80016a00, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a00 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 418 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ab8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1607 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007abc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1792423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1792423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007abc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r18=80016438, r17=10000000, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016440 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007abc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1608 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007abc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1609 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ac0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1aea93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1aea93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ac0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00000418 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ac0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1610 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ac0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1611 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ac0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1612 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ac0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1613 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ac4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ba05b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xba05b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ac4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ac4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 20 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1614 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ac8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: bc2023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xbc2023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ac8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r24=80016a00, rb=1000, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a00 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ac8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 24 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1615 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007acc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 15ba223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x15ba223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007acc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r23=10000000, r15=1001, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000004 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007acc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 23 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1616 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ad0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 35240263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x35240263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ad0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007e14 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016438 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ad0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1617 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ad0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1618 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1619 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1620 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1621 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1622 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1623 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007e14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b8413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb8413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007e14: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1624 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007e18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: cf9ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcf9ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007e18: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007b10 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: ffffffff (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1625 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1626 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1627 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1628 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1629 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1630 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1ec1a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1ec1a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b10: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=492 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169f4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1631 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1632 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1633 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1634 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b77463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb77463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b14: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1635 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1636 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1637 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1638 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1639 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1640 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1641 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1eb1a623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1eb1a623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b18: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, rb=1000, imm=492 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169f4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1642 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e81a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e81a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b1c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=488 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169f0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1643 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1ab77663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1ab77663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b20: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1644 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1645 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1646 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1647 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1648 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1649 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1650 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1eb1a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1eb1a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b24: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, rb=1000, imm=488 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800169f0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1651 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a40006f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a40006f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b28: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007ccc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001001 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1652 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1653 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1654 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1655 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1656 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1657 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ccc -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffcafa93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffcafa93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ccc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ccc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1658 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007cd0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 409a87b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x409a87b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007cd0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000bf8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007cd0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 21 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1659 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007cd4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 9ae663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x9ae663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007cd4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000bf8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 21 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1660 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1661 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1662 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1663 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1664 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1665 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1666 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007cd8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f00713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf00713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007cd8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 0000000f (0) - %r15: 00000bf8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007cd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1667 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007cdc -DEBUG ../../../simX/enc.cpp:105: Curr Code: e4f748e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe4f748e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007cdc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007b2c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 0000000f (0) - %r15: 00000bf8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007cdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1668 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1669 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1670 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1671 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1672 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1673 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1674 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 14e713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x14e713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1675 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e42223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe42223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b30: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10000000, re=409, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000004 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 00000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1676 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 9404b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x9404b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b34: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 10000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 8 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1677 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 992423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x992423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b38: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r18=80016438, r9=10000408, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016440 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 10000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf8 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1678 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1679 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 17e793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x17e793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b3c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 10000408 (0) - %r10: 00000418 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1680 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b40: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 10000408 (0) - %r10: 80016010 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1681 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1682 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1683 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1684 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f4a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf4a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=10000408, rf=bf9, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1000040c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007d94 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 10000408 (0) - %r10: 80016010 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1685 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 460000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x460000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b48: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007fa8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007b4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 10000408 (0) - %r10: 80016010 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1686 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1687 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1688 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1689 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1690 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1691 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007fa8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007fa8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80007b4c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007b4c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007b4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 10000408 (0) - %r10: 80016010 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1692 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1693 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1694 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1695 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1696 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1697 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 840513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x840513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007b4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 10000408 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1698 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007b50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e1dff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe1dff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007b50: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000796c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007b4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 10000408 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007b50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1699 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1700 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1701 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1702 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1703 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1704 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000796c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000796c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed6c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80007688 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 10000000 (0) - %r 9: 10000408 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000796c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1705 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000796c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1706 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000796c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1707 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000796c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1708 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007970 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007970: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=40 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed68 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000408 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007970 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1709 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007974 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007974: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=36 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed64 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80016438 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007974 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1710 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007978 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007978: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=32 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed60 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 80016010 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007978 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1711 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000797c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000797c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed5c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000be8 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000797c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1712 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007980 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812a03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812a03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007980: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed58 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00001000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007980 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1713 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007980 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1714 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007980 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1715 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007980 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1716 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007984 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007984: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed54 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007984 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1717 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007988 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007988: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed50 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 10000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007988 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1718 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000798c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12b83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12b83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000798c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed4c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016a00 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000798c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1719 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007990 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007990: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed48 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007990 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1720 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007994 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412c83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412c83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007994: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed44 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007994 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1721 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007998 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007998: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007998 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1722 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000799c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000799c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80007688, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007688 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00000bf9 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000799c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1723 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1724 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1725 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1726 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1727 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1728 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007688 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c41783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc41783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007688: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12009 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007688 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1729 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000768c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4050863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4050863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000768c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000409 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000768c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1730 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1731 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1732 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1733 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1734 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1735 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007690 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80004737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80004737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007690: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 80004000 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007690 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1736 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007694 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e070713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe070713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007694: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 800040e0 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007694 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1737 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007698 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2e4ae23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2e4ae23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007698: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r9=80016010, re=800040e0, imm=60 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001604c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 800040e0 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007698 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1738 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000769c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000769c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed78 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000000 (0) - %r14: 00000400 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000769c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1739 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000769c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1740 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed7c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002009 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1741 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1742 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 807e793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x807e793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1743 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f41623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf41623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076a8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rf=2089, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1744 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: a42023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa42023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076ac: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, ra=10000008, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1745 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a42823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa42823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076b0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, ra=10000008, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1746 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1747 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e42a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe42a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076b4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, re=400, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016378 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1748 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4069863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4069863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007708 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00001000 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1749 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1750 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1751 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1752 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1753 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1754 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007708 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e41583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe41583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007708: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=14 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12089 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000008 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007708 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1755 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000770c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000770c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007688 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000770c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1756 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007710 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7a4060ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7a4060ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007710: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000deb4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007710 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1757 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1758 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1759 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1760 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1761 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1762 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000deb4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000deb4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000deb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1763 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000deb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1764 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000deb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1765 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000deb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1766 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000deb8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000deb8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed60, r8=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed68 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000deb8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1767 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000debc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000debc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed60, r9=80016010, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed64 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000debc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1768 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dec0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dec0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dec0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1769 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dec0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1770 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dec0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1771 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dec0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1772 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dec4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dec4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dec4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1773 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dec8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dec8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed60, r1=80007714, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed6c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dec8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1774 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000decc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2401a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2401a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000decc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, r0=0, imm=584 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000decc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1775 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000ded0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c68f20ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc68f20ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000ded0: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000338 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000ded4 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000ded0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1776 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1777 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1778 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1779 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1780 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1781 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000338 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000338: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000ded4 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000338 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1782 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000338 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1783 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000338 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1784 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000338 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1785 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000033c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000033c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000ded4, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000ded4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000ded4 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000033c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1786 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1787 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1788 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1789 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1790 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1791 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000ded4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000ded4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000ded4 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000ded4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1792 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000ded8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f50c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf50c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000ded8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000ded4 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000ded8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1793 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1794 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1795 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1796 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1797 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1798 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1799 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dedc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dedc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed60, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed6c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80007714 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dedc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1800 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dee0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dee0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed60, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed68 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dee0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1801 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dee4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dee4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed60, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed64 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed60 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dee4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1802 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dee8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dee8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dee8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1803 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000deec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000deec: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80007714, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007714 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000deec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1804 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1805 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1806 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1807 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1808 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1809 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007714 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 51663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x51663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007714: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007720 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00000400 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007714 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1810 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1811 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1812 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1813 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1814 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1815 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007720 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c45703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc45703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007720: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12089 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007720 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1816 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007724 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc77713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc77713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007724: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002088 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007724 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1817 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007728 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 176713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x176713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007728: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: ffffffff (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007728 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1818 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000772c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1071793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1071793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000772c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 20890000 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000772c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1819 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000772c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1820 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007730 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4107d793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4107d793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007730: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007730 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1821 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007730 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1822 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007734 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f89ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf89ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007734: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800076bc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 00002089 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007734 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1823 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007734 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1824 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1825 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1826 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1827 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1828 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1829 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1830 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 127e7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x127e7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076bc: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80007714 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1831 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1832 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1833 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1834 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076c0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80003ba0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1835 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1836 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1837 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1838 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f41623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf41623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076c4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rf=2889, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1839 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076c8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed88 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1840 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076cc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed84 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 00000800 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1841 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076d0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed80 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a04 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1842 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076d4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1843 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800076d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800076d8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80003ba0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003ba0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002089 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800076d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1844 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1845 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1846 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1847 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1848 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1849 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003ba0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c41703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc41703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003ba0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 00000001 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ba0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1850 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003ba4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1042683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1042683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003ba4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ba4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1851 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003ba8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1071793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1071793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003ba8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 28890000 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ba8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1852 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003bac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 107d793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x107d793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003bac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000049 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003bac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1853 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003bb0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 17f613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x17f613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003bb0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000001 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003bb0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1854 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003bb4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f80610e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf80610e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003bb4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003b34 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000001 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003bb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 12 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1855 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003bb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 12 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1856 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1857 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1858 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1859 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1860 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1861 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1862 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1863 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1442603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1442603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b34: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016378 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000400 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1864 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b38: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, r0=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001636c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 00000400 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1865 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b3c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: 00000400 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1866 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40c00633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40c00633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b40: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1867 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1868 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1869 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 0 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1870 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c42c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc42c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rc=fffffc00, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001637c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1871 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8068663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8068663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b48: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003ba0 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1872 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1873 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1874 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1875 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1876 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1877 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1878 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b4c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed90, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed9c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80001340 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1879 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b50: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed90, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed98 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1880 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b54: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed90, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed94 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffed90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1881 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1882 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003b5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003b5c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80001340, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80001340 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003b5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1883 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1884 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1885 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1886 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1887 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1888 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001340 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001340: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80001348 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001340 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1889 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001340 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1890 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001340 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1891 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001340 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1892 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1893 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1894 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1895 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1896 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1897 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001348 -DEBUG ../../../simX/enc.cpp:105: Curr Code: cc5703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcc5703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001348: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r24=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001348 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1898 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000134c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a00693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa00693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000134c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000134c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1899 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001350 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a77713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a77713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001350: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001350 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1900 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001354 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d0d714e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd0d714e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001354: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 8 rsrc1 : 10 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000105c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001354 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1901 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1902 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1903 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1904 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1905 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1906 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1907 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000105c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10c10793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10c10793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000105c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 00000008 (0) - %r15: 6fffeeac (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000105c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1908 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000105c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1909 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000105c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1910 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000105c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1911 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001060 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80015737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80015737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001060: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 6fffeeac (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001060 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1912 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001064 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ef12223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xef12223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001064: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rf=6fffeeac, imm=228 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee84 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 6fffeeac (0) - %r16: 00000000 (0) - %r17: 80016440 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1913 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001068 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001068: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 6fffeeac (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001068 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1914 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000106c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a6c70793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa6c70793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000106c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014a6c (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000106c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1915 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001070 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80015737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80015737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001070: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014a6c (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001070 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1916 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001074 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f12c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf12c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001074: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rf=80014a6c, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedb8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014a6c (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001074 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1917 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001078 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 90b13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x90b13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001078: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014a6c (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001078 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1918 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000107c -DEBUG ../../../simX/enc.cpp:105: Curr Code: be870793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xbe870793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000107c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014be8 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000107c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1919 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001080 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f12423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf12423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001080: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rf=80014be8, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeda8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014be8 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1920 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1921 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1922 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1923 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001084 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b4783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb4783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001084: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r22=80014a04, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a04 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001084 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1924 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001088 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001088: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=236 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001088 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1925 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000108c -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000108c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=232 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000108c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1926 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001090 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001090: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedc0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001090 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1927 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001090 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1928 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001090 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1929 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001094 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001094: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=52 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedd4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001094 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1930 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001098 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001098: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=56 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedd8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001098 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1931 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000109c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000109c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=60 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeddc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000109c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1932 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4012423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4012423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010a0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=72 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffede8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1933 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4012623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4012623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010a4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=76 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedec -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1934 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010a8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1935 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 22078663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x22078663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010ac: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1936 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1937 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1938 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1939 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1940 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1941 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b0413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb0413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a04 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1942 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2500693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2500693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a04 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1943 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a04 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1944 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1945 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1946 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1947 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1948 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1949 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1950 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a04, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a04 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a04 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1951 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a05 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1952 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1953 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1954 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1955 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 101 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a05 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1956 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1957 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1958 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1959 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1960 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1961 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a05 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1962 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1963 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1964 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1965 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1966 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1967 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a05, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a04 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a05 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000072 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1968 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a06 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000072 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1969 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 114 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a06 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000072 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1970 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1971 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1972 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1973 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1974 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1975 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a06 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000072 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1976 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1977 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1978 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1979 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1980 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1981 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a06, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a04 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a06 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1982 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a07 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1983 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 110 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a07 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1984 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1985 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1986 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1987 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1988 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1989 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a07 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1990 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1991 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1992 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1993 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1994 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1995 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a07, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a08 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 65206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a07 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1996 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a08 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1997 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 101 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a08 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1998 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 1999 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2000 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2001 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2002 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2003 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a08 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2004 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2005 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2006 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2007 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2008 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2009 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a08, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a08 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 65206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a08 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006c (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2010 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a09 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006c (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2011 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 108 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a09 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006c (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2012 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2013 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2014 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2015 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2016 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2017 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a09 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006c (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2018 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2019 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2020 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2021 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2022 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2023 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a09, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a08 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 65206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a09 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000020 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2024 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0a (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000020 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2025 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 32 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0a (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000020 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2026 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2027 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2028 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2029 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2030 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2031 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0a (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000020 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2032 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2033 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2034 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2035 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2036 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2037 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a0a, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a08 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 65206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0a (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2038 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0b (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2039 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 101 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0b (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2040 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2041 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2042 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2043 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2044 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2045 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0b (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2046 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2047 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2048 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2049 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2050 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2051 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a0b, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 75636578 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0b (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000078 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2052 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0c (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000078 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2053 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 120 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0c (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000078 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2054 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2055 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2056 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2057 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2058 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2059 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0c (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000078 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2060 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2061 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2062 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2063 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2064 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2065 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a0c, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 75636578 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0c (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2066 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0d (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2067 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 101 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0d (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2068 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2069 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2070 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2071 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2072 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2073 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0d (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2074 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2075 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2076 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2077 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2078 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2079 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a0d, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 75636578 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0d (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000063 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2080 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0e (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000063 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2081 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 99 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0e (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000063 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2082 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2083 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2084 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2085 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2086 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2087 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0e (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000063 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2088 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2089 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2090 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2091 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2092 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2093 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a0e, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 75636578 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0e (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000075 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2094 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0f (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000075 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2095 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 117 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0f (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000075 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2096 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2097 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2098 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2099 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2100 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2101 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0f (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000075 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2102 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2103 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2104 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2105 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2106 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2107 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a0f, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 676e6974 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a0f (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000074 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2108 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a10 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000074 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2109 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 116 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a10 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000074 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2110 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2111 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2112 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2113 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2114 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2115 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a10 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000074 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2116 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2117 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2118 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2119 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2120 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2121 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a10, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 676e6974 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a10 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000069 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2122 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a11 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000069 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2123 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 105 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a11 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000069 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2124 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2125 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2126 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2127 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2128 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2129 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a11 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000069 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2130 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2131 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2132 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2133 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2134 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2135 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a11, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 676e6974 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a11 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2136 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a12 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2137 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 110 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a12 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2138 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2139 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2140 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2141 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2142 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2143 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a12 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2144 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2145 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2146 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2147 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2148 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2149 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a12, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 676e6974 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a12 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000067 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2150 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a13 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000067 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2151 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 103 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a13 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000067 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2152 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2153 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2154 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2155 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2156 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2157 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a13 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000067 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2158 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2159 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2160 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2161 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2162 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2163 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a13, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a13 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2164 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a14 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2165 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 46 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a14 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2166 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2167 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2168 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2169 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2170 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2171 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a14 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2172 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2173 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2174 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2175 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2176 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2177 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a14, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a14 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2178 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a15 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2179 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 46 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a15 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2180 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2181 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2182 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2183 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2184 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2185 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a15 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2186 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2187 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2188 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2189 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2190 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2191 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a15, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a15 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2192 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a16 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2193 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 46 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a16 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2194 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2195 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2196 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2197 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2198 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2199 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a16 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2200 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2201 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2202 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2203 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2204 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2205 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a16, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a16 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000000a (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2206 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a17 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000000a (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2207 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 10 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a17 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000000a (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2208 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2209 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2210 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2211 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2212 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2213 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a17 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000000a (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2214 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2215 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2216 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2217 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2218 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2219 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a17, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a18 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a17 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2220 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2221 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2222 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2223 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2224 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2225 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2226 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2227 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 416404b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x416404b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 8 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2228 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 21640663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x21640663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010cc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2229 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2230 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2231 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2232 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2233 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2234 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ec12683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xec12683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010d0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=236 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000000 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2235 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e812783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe812783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010d4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=232 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee88 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000000 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2236 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 168a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x168a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010d8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r17=6fffeeac, r16=80014a04, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeeac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000000 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 17 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2237 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 9686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x9686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010dc: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000014 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2238 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010e0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000014 (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2239 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010e4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r17=6fffeeac, r9=14, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeeb0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000014 (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 17 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2240 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ed12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xed12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010e8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rd=14, imm=236 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000014 (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2241 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: ef12423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xef12423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010ec: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rf=1, imm=232 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000014 (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2242 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 700693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x700693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010f0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 6fffeeac (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2243 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 888893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x888893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2244 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2ef6c263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2ef6c263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010f8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2245 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2246 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2247 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2248 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2249 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2250 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010fc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffedac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2251 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001100 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 44783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x44783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001100: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a18, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a18 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001100 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2252 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001100 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2253 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001100 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2254 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001100 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2255 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001104 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 970733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x970733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001104: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001104 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2256 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001108 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001108: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, re=14, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001108 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2257 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000110c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c078663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c078663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000110c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800012d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000110c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2258 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2259 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2260 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2261 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2262 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2263 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2264 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ec12783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xec12783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012d8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=236 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2265 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2266 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2267 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2268 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012dc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2269 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2270 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2271 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2272 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2273 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2274 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2275 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3250106f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3250106f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012e0: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80002e04 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: fffffc00 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2276 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2277 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2278 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2279 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2280 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2281 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80002e04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e410613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe410613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80002e04: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 00000001 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2282 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2283 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2284 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2285 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80002e08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c0593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc0593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80002e08: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2286 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80002e0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d0513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd0513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80002e0c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80001340 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 26 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2287 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80002e10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 314090ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x314090ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80002e10: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000c124 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2288 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2289 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2290 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2291 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2292 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2293 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c124 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 862703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x862703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c124: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r12=6fffee84, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c124 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2294 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c124 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2295 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c124 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2296 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c124 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2297 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c128 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 70463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x70463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c128: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c128 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2298 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2299 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2300 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2301 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2302 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2303 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2304 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c12c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f09ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf09ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c12c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000c034 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c12c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2305 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2306 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2307 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2308 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2309 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2310 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c034 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 645a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x645a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c034: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=100 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163c8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c034 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2311 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c034 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2312 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c034 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2313 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c034 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2314 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c038 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c038: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c038 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2315 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c03c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1612823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1612823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c03c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r16=80014a04, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed80 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c03c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2316 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c040 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c040: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r1=80002e14, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2317 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2318 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2319 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2320 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c044 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c044: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r8=80014a18, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed98 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c044 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2321 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c048 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c048: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r9=14, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed94 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c048 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2322 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c04c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c04c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r12=80014a04, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed90 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c04c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2323 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c050 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c050: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r13=0, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c050 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2324 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c054 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c054: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r14=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c054 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2325 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c058 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1512a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1512a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c058: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r15=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed84 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c058 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2326 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c05c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1712623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1712623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c05c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r17=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed7c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c05c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2327 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c060 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c060: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r18=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed78 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000014 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c060 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2328 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c064 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1279713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1279713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c064: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2329 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c068 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60b13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60b13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c068: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c068 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2330 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c06c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a075863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa075863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c06c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:5 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000c11c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c06c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2331 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2332 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2333 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2334 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2335 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2336 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c11c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f1010ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf1010ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c11c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000da0c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c11c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2337 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2338 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2339 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2340 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2341 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2342 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 862783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x862783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da0c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r12=6fffee84, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2343 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2344 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2345 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2346 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 32078e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x32078e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da10: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2347 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2348 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2349 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2350 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2351 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2352 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2353 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c5d783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc5d783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da14: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2354 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2355 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da1c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r8=80014a18, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed68 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2356 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da20: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r14=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed58 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2357 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1512a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1512a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da24: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r15=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed54 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2358 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2359 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da28: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r1=8000c120, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed6c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2360 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da2c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r9=14, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed64 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2361 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da30: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r12=80014a04, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed60 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2362 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da34: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r13=0, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed5c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2363 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1612823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1612823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da38: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r16=6fffee84, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2364 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1712623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1712623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r17=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed4c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2365 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r18=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed48 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2366 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2367 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2368 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2369 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r19=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed44 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 25 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2370 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a12023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a12023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da48: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r1a=80016010, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed40 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 26 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2371 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 87f713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x87f713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2372 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60a13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60a13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da50: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2373 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50a93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50a93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da54: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2374 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2375 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8070663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8070663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da5c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2376 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2377 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2378 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2379 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2380 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2381 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 105a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x105a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da60: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 10000008 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2382 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8070263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8070263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da64: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 10000008 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2383 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2384 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2385 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2386 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2387 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2388 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2389 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 27f713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x27f713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da68: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2390 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a2483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa2483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da6c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r20=6fffee84, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee84 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffeeac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2391 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8070c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8070c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da70: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000db08 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2392 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2393 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2394 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2395 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2396 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2397 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000db08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 17f713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x17f713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000db08: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000db08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2398 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000db08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2399 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000db08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2400 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000db08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2401 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000db0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 24071463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x24071463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000db0c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dd54 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000db0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2402 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2403 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2404 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2405 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2406 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2407 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2408 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd54: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2409 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2410 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2411 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2412 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2413 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2414 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd60: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2415 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ec098ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xec098ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd64: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dc38 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 19 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2416 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2417 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2418 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2419 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2420 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2421 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2422 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 44a983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x44a983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc38: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffeeac, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffeeb0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2423 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2424 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2425 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2426 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4ac03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4ac03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc3c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffeeac, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffeeac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a04 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2427 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 848493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x848493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc40: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2428 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2429 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2430 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2431 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe098ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe098ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc44: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 19 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2432 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2433 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2434 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2435 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2436 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2437 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 00000014 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2438 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a00593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa00593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2439 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c0513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc0513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc50: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2440 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a7cfa0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa7cfa0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc54: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007ed0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2441 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2442 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2443 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2444 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2445 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2446 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ed0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 357793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x357793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ed0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ed0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2447 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ed0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2448 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ed0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2449 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ed0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2450 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ed4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff5f693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff5f693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ed4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ed4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2451 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ed8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2078a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2078a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ed8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f0c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ed8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2452 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2453 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2454 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2455 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2456 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2457 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f0c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 00000001 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2458 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2459 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2460 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2461 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 300713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x300713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f10: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 00000003 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2462 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f76663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f76663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f14: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f40 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 00000003 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2463 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2464 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2465 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2466 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2467 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2468 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2469 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f40: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 00010000 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2470 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2471 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2472 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2473 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 859893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x859893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f44: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 00010000 (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 00000a00 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2474 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff70713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff70713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 00000a00 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2475 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: e8f8b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe8f8b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f4c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 00000a00 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2476 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff5f593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff5f593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f50: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 0000000a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 00000a00 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2477 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b8e5b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb8e5b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f54: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 00000a0a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 00000a00 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 17 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2478 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 17 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2479 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1059893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1059893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 00000a0a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 0a0a0000 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2480 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b8e8b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb8e8b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f5c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 00000a0a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: 00000000 (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2481 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2482 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: feff0837 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfeff0837 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f60: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 00000a0a (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: feff0000 (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2483 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2484 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 808085b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x808085b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f64: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808000 (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: feff0000 (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2485 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2486 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: eff80813 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xeff80813 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f68: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808000 (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 16 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2487 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8058593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8058593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f6c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0000000f (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808080 (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2488 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 300313 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x300313 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f70: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808080 (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2489 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 52703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x52703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a04, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a04 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808080 (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 6e72656b (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2490 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e8c733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe8c733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f78: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808080 (0) - %r12: 00000014 (0) - %r13: 0000000a (0) - %r14: 64786f61 (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 17 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2491 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f7c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 64786f61 (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2492 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff74713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff74713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 9b87909e (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2493 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2494 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e67733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe67733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f84: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 03070000 (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2495 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2496 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b77733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb77733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f88: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2497 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f8071ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf8071ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f8c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2498 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2499 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2500 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2501 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2502 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2503 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2504 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2505 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2506 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc78793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc78793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f90: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a04 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2507 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 450513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x450513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a08 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2508 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fcf36ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfcf36ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f98: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f74 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a08 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2509 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2510 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2511 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2512 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2513 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2514 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 52703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x52703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a08, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a08 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 65206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a08 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 65206c65 (0) - %r15: 00000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2515 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e8c733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe8c733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f78: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a08 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 6f2a666f (0) - %r15: 00000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 17 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2516 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f7c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a08 (0) - %r11: 80808080 (0) - %r12: 6e29656e (0) - %r13: 0000000a (0) - %r14: 6f2a666f (0) - %r15: 00000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2517 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff74713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff74713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a08 (0) - %r11: 80808080 (0) - %r12: 6e29656e (0) - %r13: 0000000a (0) - %r14: 90d59990 (0) - %r15: 00000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2518 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2519 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e67733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe67733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f84: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a08 (0) - %r11: 80808080 (0) - %r12: 6e29656e (0) - %r13: 0000000a (0) - %r14: 00010100 (0) - %r15: 00000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2520 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2521 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b77733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb77733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f88: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a08 (0) - %r11: 80808080 (0) - %r12: 6e29656e (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2522 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f8071ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf8071ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f8c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a08 (0) - %r11: 80808080 (0) - %r12: 6e29656e (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2523 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2524 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2525 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2526 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2527 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2528 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2529 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2530 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2531 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc78793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc78793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f90: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a08 (0) - %r11: 80808080 (0) - %r12: 6e29656e (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 0000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2532 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 450513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x450513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a0c (0) - %r11: 80808080 (0) - %r12: 6e29656e (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 0000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2533 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fcf36ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfcf36ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f98: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f74 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a0c (0) - %r11: 80808080 (0) - %r12: 6e29656e (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 0000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2534 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2535 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2536 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2537 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2538 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2539 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 52703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x52703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a0c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 75636578 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a0c (0) - %r11: 80808080 (0) - %r12: 6e29656e (0) - %r13: 0000000a (0) - %r14: 75636578 (0) - %r15: 0000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2540 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e8c733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe8c733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f78: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a0c (0) - %r11: 80808080 (0) - %r12: 6e29656e (0) - %r13: 0000000a (0) - %r14: 7f696f72 (0) - %r15: 0000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 17 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2541 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f7c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a0c (0) - %r11: 80808080 (0) - %r12: 7e686e71 (0) - %r13: 0000000a (0) - %r14: 7f696f72 (0) - %r15: 0000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2542 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff74713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff74713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a0c (0) - %r11: 80808080 (0) - %r12: 7e686e71 (0) - %r13: 0000000a (0) - %r14: 8096908d (0) - %r15: 0000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2543 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2544 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e67733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe67733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f84: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a0c (0) - %r11: 80808080 (0) - %r12: 7e686e71 (0) - %r13: 0000000a (0) - %r14: 00000001 (0) - %r15: 0000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2545 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2546 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b77733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb77733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f88: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a0c (0) - %r11: 80808080 (0) - %r12: 7e686e71 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 0000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2547 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f8071ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf8071ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f8c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a0c (0) - %r11: 80808080 (0) - %r12: 7e686e71 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 0000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2548 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2549 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2550 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2551 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2552 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2553 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2554 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2555 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2556 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc78793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc78793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f90: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a0c (0) - %r11: 80808080 (0) - %r12: 7e686e71 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2557 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 450513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x450513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a10 (0) - %r11: 80808080 (0) - %r12: 7e686e71 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2558 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fcf36ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfcf36ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f98: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f74 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a10 (0) - %r11: 80808080 (0) - %r12: 7e686e71 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2559 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2560 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2561 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2562 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2563 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2564 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 52703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x52703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a10, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 676e6974 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a10 (0) - %r11: 80808080 (0) - %r12: 7e686e71 (0) - %r13: 0000000a (0) - %r14: 676e6974 (0) - %r15: 00000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2565 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e8c733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe8c733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f78: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a10 (0) - %r11: 80808080 (0) - %r12: 7e686e71 (0) - %r13: 0000000a (0) - %r14: 6d64637e (0) - %r15: 00000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 17 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2566 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f7c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a10 (0) - %r11: 80808080 (0) - %r12: 6c63627d (0) - %r13: 0000000a (0) - %r14: 6d64637e (0) - %r15: 00000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2567 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff74713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff74713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a10 (0) - %r11: 80808080 (0) - %r12: 6c63627d (0) - %r13: 0000000a (0) - %r14: 929b9c81 (0) - %r15: 00000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2568 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2569 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e67733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe67733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f84: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a10 (0) - %r11: 80808080 (0) - %r12: 6c63627d (0) - %r13: 0000000a (0) - %r14: 00030001 (0) - %r15: 00000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2570 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2571 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b77733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb77733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f88: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a10 (0) - %r11: 80808080 (0) - %r12: 6c63627d (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2572 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f8071ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf8071ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f8c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a10 (0) - %r11: 80808080 (0) - %r12: 6c63627d (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2573 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2574 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2575 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2576 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2577 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2578 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2579 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2580 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2581 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc78793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc78793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f90: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a10 (0) - %r11: 80808080 (0) - %r12: 6c63627d (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2582 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 450513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x450513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: 6c63627d (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2583 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fcf36ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfcf36ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f98: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f74 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: 6c63627d (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2584 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2585 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2586 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2587 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2588 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2589 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 52703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x52703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a14, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: 6c63627d (0) - %r13: 0000000a (0) - %r14: 0a2e2e2e (0) - %r15: 00000004 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2590 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e8c733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe8c733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f78: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: 6c63627d (0) - %r13: 0000000a (0) - %r14: 00242424 (0) - %r15: 00000004 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 17 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2591 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f7c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 00242424 (0) - %r15: 00000004 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2592 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff74713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff74713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: ffdbdbdb (0) - %r15: 00000004 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2593 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2594 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e67733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe67733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f84: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: ff030303 (0) - %r15: 00000004 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2595 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2596 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b77733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb77733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f88: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 80000000 (0) - %r15: 00000004 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2597 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f8071ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf8071ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f8c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 2147483648 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f24 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 80000000 (0) - %r15: 00000004 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2598 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2599 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2600 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2601 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2602 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2603 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2604 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2605 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2606 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f507b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf507b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f24: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 80000000 (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2607 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c0006f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc0006f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f28: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f34 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 80000000 (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2608 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2609 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2610 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2611 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2612 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2613 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 54703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x54703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f34: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a14, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2614 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed71ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed71ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f38: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 46 rsrc1 : 10 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f2c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a14 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2615 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2616 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2617 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2618 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2619 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2620 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2621 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 150513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x150513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a15 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2622 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fea786e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfea786e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f30: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a15 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2623 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2624 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2625 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2626 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2627 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2628 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2629 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 54703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x54703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f34: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a15, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a15 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2630 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed71ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed71ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f38: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 46 rsrc1 : 10 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f2c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a15 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2631 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2632 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2633 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2634 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2635 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2636 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2637 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 150513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x150513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a16 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2638 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fea786e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfea786e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f30: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a16 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2639 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2640 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2641 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2642 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2643 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2644 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2645 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 54703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x54703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f34: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a16, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a16 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2646 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed71ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed71ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f38: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 46 rsrc1 : 10 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f2c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a16 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2647 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2648 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2649 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2650 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2651 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2652 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2653 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 150513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x150513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a17 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2654 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fea786e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfea786e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f30: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a17 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000002e (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2655 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2656 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2657 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2658 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2659 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2660 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2661 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 54703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x54703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f34: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a17, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a17 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2662 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed71ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed71ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f38: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 10 rsrc1 : 10 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a17 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2663 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2664 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2665 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2666 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2667 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2668 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2669 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f3c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000dc58, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dc58 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a17 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2670 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2671 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2672 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2673 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2674 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2675 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12050463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12050463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc58: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a17 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2676 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2677 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2678 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2679 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2680 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2681 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 150513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x150513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a18 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2682 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41850b33 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41850b33 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc60: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a18 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a18 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 10 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2683 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b0793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb0793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc64: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a18 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000000 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2684 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98b93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98b93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc68: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a18 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2685 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2686 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 137f463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x137f463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc6c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dc74 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a18 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2687 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2688 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2689 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2690 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2691 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2692 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2693 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 00000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2694 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1042783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1042783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc78: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2695 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1442683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1442683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc7c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016378 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2696 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a7f863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa7f863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc80: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dc90 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2697 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2698 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2699 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2700 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2701 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2702 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2703 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2704 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2705 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1adbc863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1adbc863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc90: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000de40 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: ff232323 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 23 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2706 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2707 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2708 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2709 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2710 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2711 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b8613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb8613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de40: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2712 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2713 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2714 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2715 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c0593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc0593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de44: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2716 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 354000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x354000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de48: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e19c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2717 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2718 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2719 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2720 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2721 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2722 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e19c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2a5f663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2a5f663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e19c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1c8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e19c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2723 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e19c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2724 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e19c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2725 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e19c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2726 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2727 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2728 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2729 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2730 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2731 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1c8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 0000000f (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2732 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2733 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2734 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2735 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c7e863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c7e863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1cc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1fc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 0000000f (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2736 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2737 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2738 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2739 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2740 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2741 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2742 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: a5e7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa5e7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1fc: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 90014a0c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2743 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e200 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 37f793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x37f793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e200: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e200 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2744 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e200 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2745 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e200 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2746 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e200 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2747 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e204 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a079063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa079063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e204: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e204 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2748 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2749 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2750 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2751 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2752 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2753 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2754 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e208 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff060893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff060893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e208: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 00000004 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e208 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2755 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e20c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff08f893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff08f893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e20c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e20c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2756 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e210 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1088893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1088893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e210: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e210 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2757 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e214 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1150833 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1150833 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e214: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 00000000 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e214 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 10 rs2: 17 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2758 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e214 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 10 rs2: 17 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2759 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e218 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e218: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 80014a04 (0) - %r15: 00000000 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e218 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2760 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e218 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2761 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e21c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e21c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 00000400 (0) - %r14: 80014a04 (0) - %r15: 10000008 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e21c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2762 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e21c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2763 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e220 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e220: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80014a04, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a04 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 6e72656b (0) - %r14: 80014a04 (0) - %r15: 10000008 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e220 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2764 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e224 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e224: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 6e72656b (0) - %r14: 80014a14 (0) - %r15: 10000008 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e224 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2765 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e228 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1078793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1078793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e228: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 6e72656b (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e228 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2766 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e22c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed7a823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed7a823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e22c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000018, rd=6e72656b, imm=4294967280 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 6e72656b (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e22c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2767 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e230 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff472683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff472683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e230: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80014a14, imm=4294967284 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a08 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 65206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 65206c65 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e230 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2768 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e234 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed7aa23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed7aa23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e234: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000018, rd=65206c65, imm=4294967284 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1000000c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 65206c65 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e234 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2769 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e234 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2770 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e238 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff872683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff872683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e238: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80014a14, imm=4294967288 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 75636578 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 75636578 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e238 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2771 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e23c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed7ac23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed7ac23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e23c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000018, rd=75636578, imm=4294967288 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 75636578 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e23c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2772 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e23c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2773 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e240 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc72683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc72683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e240: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80014a14, imm=4294967292 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 676e6974 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e240 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2774 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e240 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2775 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e240 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2776 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e240 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2777 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e244 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed7ae23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed7ae23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e244: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000018, rd=676e6974, imm=4294967292 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000014 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e244 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2778 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e248 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fcf81ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfcf81ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e248: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435480 rsrc1 : 268435480 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e248 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2779 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2780 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2781 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2782 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2783 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2784 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2785 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e24c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c67713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc67713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e24c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a04 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 00000004 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e24c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2786 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e250 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 11585b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x11585b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e250: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 00000004 (0) - %r15: 10000018 (0) - %r16: 10000018 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e250 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: 17 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2787 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e254 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f67813 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf67813 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e254: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 00000004 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e254 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2788 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e258 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4070e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4070e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e258: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 00000004 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e258 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2789 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2790 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2791 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2792 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2793 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2794 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e25c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e25c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 00000010 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e25c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2795 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e260 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e260: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 10000018 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000000 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e260 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2796 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e264 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 300e13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x300e13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e264: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 10000018 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e264 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 28 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2797 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e268 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72303 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72303 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e268: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80014a14, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 80014a14 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 10000018 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e268 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2798 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e26c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 470713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x470713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e26c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 676e6974 (0) - %r14: 80014a18 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 10000018 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e26c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2799 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e270 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40e806b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40e806b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e270: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 7ffeb5ec (0) - %r14: 80014a18 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 10000018 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e270 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 16 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2800 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e274 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e274: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r17=10000018, r6=a2e2e2e, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000018 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 7ffeb5ec (0) - %r14: 80014a18 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 10000018 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e274 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 17 rs2: 6 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2801 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e278 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d586b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd586b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e278: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 00000000 (0) - %r14: 80014a18 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 10000018 (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e278 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 11 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2802 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e278 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 11 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2803 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e27c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 488893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x488893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e27c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 00000000 (0) - %r14: 80014a18 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e27c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2804 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e280 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fede64e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfede64e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e280: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 00000000 (0) - %r14: 80014a18 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e280 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 28 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2805 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e280 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 28 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2806 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e280 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 28 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2807 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e280 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 28 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2808 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2809 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2810 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2811 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2812 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2813 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e284 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc80713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc80713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e284: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e284 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2814 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e288 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc77713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc77713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e288: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e288 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2815 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e28c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 470713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x470713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e28c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000014 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e28c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2816 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e290 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 367613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x367613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e290: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 10000018 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e290 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2817 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e290 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2818 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e294 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e294: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a14 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 1000001c (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e294 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2819 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e294 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2820 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e298 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e585b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe585b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e298: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 1000001c (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e298 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2821 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e29c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f39ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf39ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e29c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1d4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 1000001c (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e29c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2822 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2823 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2824 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2825 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2826 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2827 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff60693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff60693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1d4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 00000000 (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 1000001c (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2828 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c060c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc060c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1d8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e2b0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 00000000 (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 1000001c (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 12 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2829 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2830 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2831 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2832 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2833 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2834 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e2b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e2b0: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000de4c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000de4c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 00000000 (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 1000001c (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e2b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2835 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2836 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2837 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2838 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2839 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2840 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 842783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x842783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de4c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001636c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 00000000 (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2841 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de50: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 10000008 (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 80014a04 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2842 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b8913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb8913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de54: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 10000008 (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2843 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 417787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x417787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de58: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 10000008 (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2844 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1760633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1760633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de5c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2845 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de60: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rf=ffffffec, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001636c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2846 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c42023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc42023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de64: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rc=1000001c, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2847 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e49ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe49ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de68: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dcb0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000014 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2848 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2849 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2850 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2851 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2852 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2853 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcb0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412b0b33 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412b0b33 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcb0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a18 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcb0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 22 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2854 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcb4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcb4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000001 (0) - %r11: 80014a18 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2855 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcb8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 160b0a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x160b0a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcb8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000de2c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000001 (0) - %r11: 80014a18 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcb8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 22 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2856 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2857 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2858 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2859 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2860 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2861 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000001 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2862 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2863 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2864 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2865 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a8513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa8513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2866 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a24f60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa24f60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de34: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004058 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2867 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2868 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2869 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2870 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2871 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2872 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004058 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004058: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004058 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2873 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004058 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2874 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004058 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2875 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004058 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2876 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000405c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000405c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r8=80016364, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000405c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2877 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004060 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004060: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r1=8000de38, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004060 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2878 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004064 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004064: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2879 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2880 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004068 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004068: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: ffffffec (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004068 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2881 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2882 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2883 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2884 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2885 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2886 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000406c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3852783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3852783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000406c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80016010, imm=56 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016048 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00000001 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000406c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2887 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004070 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2078063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2078063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004070: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00000001 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004070 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2888 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2889 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2890 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2891 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2892 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2893 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2894 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004074 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c59783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc59783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004074: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004074 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2895 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004078 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2079663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2079663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004078: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 10377 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800040a4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004078 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2896 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2897 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2898 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2899 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2900 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2901 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2902 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2903 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2904 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2905 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2906 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040a8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2907 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040ac: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000de38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2908 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040b0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2909 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d49ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd49ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040b4: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003dfc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2910 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2911 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2912 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2913 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2914 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2915 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003dfc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c59783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc59783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003dfc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2916 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2917 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2918 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2919 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e00: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2920 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2921 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2922 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2923 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e04: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r8=80016364, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2924 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e08: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r13=14, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed2c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2925 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e0c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r1=8000de38, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2926 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2927 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e10: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r9=6fffeeb4, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed34 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2928 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e14: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r12=14, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed30 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: ffffffff (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2929 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 87f693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x87f693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2930 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2931 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e20: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2932 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10069a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10069a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e24: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 8 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f38 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 00000014 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2933 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2934 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2935 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2936 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2937 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2938 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 105a903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x105a903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f38: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2939 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2940 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2941 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2942 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fc090ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfc090ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f3c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2943 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2944 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2945 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2946 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2947 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2948 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2949 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5a483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5a483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f40: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1000001c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 1000001c (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000004 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2950 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2951 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2952 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2953 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1079713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1079713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f44: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 1000001c (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 28890000 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2954 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1075713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1075713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 1000001c (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2955 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 377713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x377713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 1000001c (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2956 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 125a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x125a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f50: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r11=80016364, r12=10000008, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 1000001c (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2957 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2958 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412484b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412484b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f54: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2959 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2960 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2961 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 71463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x71463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f5c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f64 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2962 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2963 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2964 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2965 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2966 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2967 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f64: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rf=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001636c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2968 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 904863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x904863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f68: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f78 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2969 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2970 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2971 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2972 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2973 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2974 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2442783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2442783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f78: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=36 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016388 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80009344 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2975 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c42583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c42583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f7c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016380 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2976 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 1000001c (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2977 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2978 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2979 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2980 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 90613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x90613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f84: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2981 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f88: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2982 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f8c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80009344, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80009344 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2983 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2984 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2985 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2986 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2987 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2988 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009344 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c59783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc59783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009344: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009344 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2989 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009344 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2990 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009344 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2991 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009344 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2992 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009348 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009348: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009348 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2993 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000934c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000934c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r8=80016364, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed18 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000934c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2994 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009350 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009350: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r9=14, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009350 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2995 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009354 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009354: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r12=10000008, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed10 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009354 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2996 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009354 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2997 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009358 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009358: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r13=80016010, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed0c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009358 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2998 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000935c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000935c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r1=80003f90, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed1c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000935c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 2999 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009360 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1007f713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1007f713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009360: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009360 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3000 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009364 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009364: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009364 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3001 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009368 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009368: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009368 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3002 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000936c -DEBUG ../../../simX/enc.cpp:105: Curr Code: e59583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe59583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000936c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=14 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000936c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3003 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009370 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009370: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009370 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3004 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009374 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009374: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009374 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3005 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009378 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2071e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2071e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009378: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009378 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3006 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3007 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3008 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3009 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3010 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3011 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000937c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fffff737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfffff737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000937c: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: fffff000 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000937c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3012 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009380 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff70713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff70713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009380: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009380 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3013 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009380 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3014 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009380 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3015 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009380 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3016 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009384 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e7f7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe7f7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009384: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009384 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3017 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009388 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f41623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf41623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009388: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rf=2889, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009388 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3018 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000938c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000938c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed18 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000938c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3019 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000938c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3020 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009390 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009390: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80003f90 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009390 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3021 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009390 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3022 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009394 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009394: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009394 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3023 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009398 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 90613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x90613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009398: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009398 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3024 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000939c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000939c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000939c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3025 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800093a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800093a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800093a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3026 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800093a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800093a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800093a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3027 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800093a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800093a8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800093a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3028 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800093ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800093ac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800093ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3029 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800093b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a80406f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa80406f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800093b0: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d458 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800093b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3030 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3031 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3032 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3033 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3034 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3035 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d458 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d458: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d458 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3036 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d458 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3037 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d458 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3038 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d458 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3039 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d45c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d45c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d45c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3040 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d460 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d460: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed10, r8=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed18 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d460 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3041 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d464 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d464: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed10, r9=14, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d464 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3042 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d468 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d468: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d468 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3043 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d46c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d46c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 10000008 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d46c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3044 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d470 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d470: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d470 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3045 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d474 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 70513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x70513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d474: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d474 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3046 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d478 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d478: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed10, r1=80003f90, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed1c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d478 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3047 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d47c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2401a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2401a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d47c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, r0=0, imm=584 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d47c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3048 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d480 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 858f30ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x858f30ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d480: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800004d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d480 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3049 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d480 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3050 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d480 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3051 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d480 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3052 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3053 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3054 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3055 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3056 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3057 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004d8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3058 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3059 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3060 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3061 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004dc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r8=80016010, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed08 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3062 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 710007b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x710007b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004e0: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 71000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3063 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004e4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r1=8000d484, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed0c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 71000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3064 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3065 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000001 (0) - %r15: 71000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3066 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 400713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x400713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 0a2e2e2e (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3067 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 500313 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x500313 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004f0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 00000004 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3068 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1078813 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1078813 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3069 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e7a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe7a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004f8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, re=4, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3070 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 678223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x678223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004fc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, r6=5, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000004 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 6 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3071 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000500 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 782a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x782a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000500: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, r0=0, imm=5 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000005 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3072 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3073 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3074 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3075 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000504 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 878823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x878823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000504: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, r8=14, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 1000001c (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000504 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3076 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000508 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 865893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x865893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000508: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000014 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000508 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3077 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000050c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1845693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1845693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000050c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000050c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3078 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000510 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1065613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1065613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000510: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000510 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3079 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000514 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 11800a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x11800a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000514: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r16=71000010, r11=0, imm=1 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000011 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000514 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 16 rs2: 17 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3080 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000518 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c80123 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc80123 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000518: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r16=71000010, rc=0, imm=2 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000012 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000518 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 16 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3081 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000051c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d801a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd801a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000051c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r16=71000010, rd=0, imm=3 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000013 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000051c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 16 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3082 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000520 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 79323 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x79323 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000520: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, r0=0, imm=6 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000006 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000520 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3083 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000524 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e7a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe7a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000524: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, re=4, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000524 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3084 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000528 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a7a623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa7a623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000528: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, ra=1, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 7100000c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000528 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3085 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000052c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a805263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa805263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000052c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:5 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000052c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3086 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3087 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3088 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3089 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3090 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3091 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000530 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1478693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1478693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000530: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000530 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3092 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000534 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1878793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1878793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000534: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000004 (0) - %r15: 71000018 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000534 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3093 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000538 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f5b7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf5b7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000538: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000004 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000538 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3094 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000053c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b83533 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb83533 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000053c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000004 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000053c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 16 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3095 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000540 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff40613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff40613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000540: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000013 (0) - %r13: 71000014 (0) - %r14: 00000004 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000540 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3096 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000540 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3097 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000540 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3098 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000540 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3099 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000544 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 17c713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x17c713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000544: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000013 (0) - %r13: 71000014 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000544 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3100 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000548 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 963613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x963613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000548: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000548 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3101 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000054c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 154793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x154793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000054c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000054c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3102 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000550 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f767b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf767b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000550: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000550 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3103 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000554 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 164713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x164713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000554: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000554 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3104 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000558 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f777b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf777b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000558: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000558 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3105 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000558 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3106 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000055c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8078863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8078863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000055c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000055c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3107 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3108 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3109 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3110 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3111 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3112 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3113 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3114 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000560 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b6e7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb6e7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000560: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 7100001c (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000560 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 13 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3115 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000564 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 37f793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x37f793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000564: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000564 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3116 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000568 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8079263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8079263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000568: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3117 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3118 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3119 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3120 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3121 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3122 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3123 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3124 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000056c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc47513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc47513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000056c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000056c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3125 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000570 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b50533 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb50533 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000570: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000570 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3126 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000574 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000574: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 10000008 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000574 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3127 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000578 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40b68833 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40b68833 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000578: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 10000008 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000578 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 13 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3128 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000578 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 13 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3129 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000057c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7a603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7a603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000057c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r15=10000008, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000008 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 6e72656b (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 10000008 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000057c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3130 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000580 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f80733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf80733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000580: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 6e72656b (0) - %r13: 71000014 (0) - %r14: 71000014 (0) - %r15: 10000008 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3131 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3132 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3133 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3134 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000584 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 478793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x478793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000584: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 6e72656b (0) - %r13: 71000014 (0) - %r14: 71000014 (0) - %r15: 1000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000584 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3135 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000588 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000588: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=71000014, rc=6e72656b, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000014 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 6e72656b (0) - %r13: 71000014 (0) - %r14: 71000014 (0) - %r15: 1000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000588 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3136 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000058c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fef518e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfef518e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000058c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435484 rsrc1 : 268435468 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000057c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 6e72656b (0) - %r13: 71000014 (0) - %r14: 71000014 (0) - %r15: 1000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000058c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3137 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3138 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3139 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3140 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3141 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3142 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000057c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7a603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7a603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000057c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r15=1000000c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1000000c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 65206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 65206c65 (0) - %r13: 71000014 (0) - %r14: 71000014 (0) - %r15: 1000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000057c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3143 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000580 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f80733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf80733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000580: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 65206c65 (0) - %r13: 71000014 (0) - %r14: 71000018 (0) - %r15: 1000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3144 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000584 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 478793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x478793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000584: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 65206c65 (0) - %r13: 71000014 (0) - %r14: 71000018 (0) - %r15: 10000010 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000584 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3145 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000588 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000588: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=71000018, rc=65206c65, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000018 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 65206c65 (0) - %r13: 71000014 (0) - %r14: 71000018 (0) - %r15: 10000010 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000588 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3146 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000058c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fef518e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfef518e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000058c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435484 rsrc1 : 268435472 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000057c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 65206c65 (0) - %r13: 71000014 (0) - %r14: 71000018 (0) - %r15: 10000010 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000058c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3147 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3148 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3149 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3150 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3151 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3152 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000057c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7a603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7a603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000057c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r15=10000010, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000010 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 75636578 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 75636578 (0) - %r13: 71000014 (0) - %r14: 71000018 (0) - %r15: 10000010 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000057c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3153 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000580 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f80733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf80733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000580: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 75636578 (0) - %r13: 71000014 (0) - %r14: 7100001c (0) - %r15: 10000010 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3154 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000584 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 478793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x478793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000584: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 75636578 (0) - %r13: 71000014 (0) - %r14: 7100001c (0) - %r15: 10000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000584 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3155 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000588 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000588: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=7100001c, rc=75636578, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 7100001c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 75636578 (0) - %r13: 71000014 (0) - %r14: 7100001c (0) - %r15: 10000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000588 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3156 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000058c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fef518e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfef518e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000058c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435484 rsrc1 : 268435476 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000057c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 75636578 (0) - %r13: 71000014 (0) - %r14: 7100001c (0) - %r15: 10000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000058c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3157 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3158 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3159 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3160 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3161 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3162 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000057c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7a603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7a603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000057c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r15=10000014, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000014 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 676e6974 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 676e6974 (0) - %r13: 71000014 (0) - %r14: 7100001c (0) - %r15: 10000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000057c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3163 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000580 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f80733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf80733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000580: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 676e6974 (0) - %r13: 71000014 (0) - %r14: 71000020 (0) - %r15: 10000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3164 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000584 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 478793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x478793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000584: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 676e6974 (0) - %r13: 71000014 (0) - %r14: 71000020 (0) - %r15: 10000018 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000584 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3165 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000588 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000588: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=71000020, rc=676e6974, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000020 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 676e6974 (0) - %r13: 71000014 (0) - %r14: 71000020 (0) - %r15: 10000018 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000588 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3166 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000058c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fef518e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfef518e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000058c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435484 rsrc1 : 268435480 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000057c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 676e6974 (0) - %r13: 71000014 (0) - %r14: 71000020 (0) - %r15: 10000018 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000058c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3167 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3168 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3169 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3170 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3171 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3172 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000057c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7a603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7a603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000057c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r15=10000018, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000018 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a2e2e2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000014 (0) - %r14: 71000020 (0) - %r15: 10000018 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000057c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3173 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000580 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f80733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf80733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000580: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000014 (0) - %r14: 71000024 (0) - %r15: 10000018 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3174 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000584 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 478793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x478793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000584: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000014 (0) - %r14: 71000024 (0) - %r15: 1000001c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000584 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3175 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000588 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000588: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=71000024, rc=a2e2e2e, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000024 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000014 (0) - %r14: 71000024 (0) - %r15: 1000001c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000588 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3176 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000058c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fef518e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfef518e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000058c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435484 rsrc1 : 268435484 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000014 (0) - %r14: 71000024 (0) - %r15: 1000001c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000058c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3177 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3178 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3179 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3180 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3181 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3182 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000590 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc47793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc47793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000590: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000014 (0) - %r14: 71000024 (0) - %r15: 00000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000590 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3183 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000594 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000594: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000594 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3184 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000598 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f40c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f40c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000598: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800005d0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000598 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3185 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3186 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3187 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3188 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3189 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3190 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3191 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c81a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c81a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005d0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=456 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169d0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 70000000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3192 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3193 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3194 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3195 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005d4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=70000000, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 70000000 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800005d8 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3196 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3197 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3198 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3199 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3200 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3201 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3202 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x70000000 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x70000000: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -kernel executing... -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=800005d8, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800005d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800005d8 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 70000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3203 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 70000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3204 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 70000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3205 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 70000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3206 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3207 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3208 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3209 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3210 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3211 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005d8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000d484 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 1000001c (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3212 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005dc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000014 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3213 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005e0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed08 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3214 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005e4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3215 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005e8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d484, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d484 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3216 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3217 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3218 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3219 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3220 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3221 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d484 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d484: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d484 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3222 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d488 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f50c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf50c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d488: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d488 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3223 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3224 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3225 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3226 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3227 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3228 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3229 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d48c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d48c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed10, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80003f90 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d48c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3230 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d490 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d490: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed10, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed18 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d490 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3231 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d494 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d494: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed10, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d494 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3232 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d498 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d498: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d498 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3233 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d49c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d49c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80003f90, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f90 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d49c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3234 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3235 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3236 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3237 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3238 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3239 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40a484b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40a484b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f90: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3240 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fca04ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfca04ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f94: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f70 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3241 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3242 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3243 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3244 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3245 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3246 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a90933 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa90933 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f70: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 1000001c (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 18 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3247 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fa9052e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfa9052e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f74: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:5 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f18 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 1000001c (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3248 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3249 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3250 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3251 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3252 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3253 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 1000001c (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3254 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f1c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000de38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 1000001c (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3255 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f20: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 1000001c (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3256 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f24: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffeeb4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 1000001c (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3257 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f28: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed30 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000014 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3258 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f2c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3259 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3260 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f34: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000de38, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000de38 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3261 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3262 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3263 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3264 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3265 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3266 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e80502e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe80502e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de38: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dcbc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0a2e2e2e (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3267 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3268 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3269 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3270 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3271 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3272 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3273 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3274 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3275 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcbc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8a2603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8a2603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcbc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r20=6fffee84, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a04 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3276 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3277 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3278 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3279 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcc0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12c0c33 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12c0c33 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcc0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000014 (0) - %r19: 00000014 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 24 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3280 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 24 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3281 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 24 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3282 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 24 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3283 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcc4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412989b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412989b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcc4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000014 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 19 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3284 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41260933 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41260933 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcc8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 12 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3285 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dccc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12a2423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12a2423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dccc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r20=6fffee84, r12=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dccc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 20 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3286 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcd0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8091a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8091a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcd0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcd0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3287 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3288 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3289 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3290 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3291 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3292 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3293 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcd4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcd4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3294 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcd8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcd8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed6c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000c120 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3295 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcdc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcdc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=40 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed68 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a18 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3296 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dce0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dce0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=36 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed64 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dce0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3297 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dce4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dce4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=32 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed60 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a04 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dce4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3298 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dce8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dce8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed5c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dce8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3299 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812a03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812a03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcec: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed58 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3300 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcf0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcf0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed54 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcf0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3301 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcf4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcf4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed50 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffee84 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000014 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcf4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3302 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcf8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12b83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12b83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcf8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed4c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80014a18 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcf8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3303 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcfc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcfc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed48 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3304 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412c83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412c83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd00: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed44 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3305 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3306 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3307 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3308 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12d03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12d03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd04: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed40 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 26 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3309 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd08: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3310 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd0c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000c120, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000c120 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3311 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3312 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3313 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3314 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3315 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3316 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c120 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fa5ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfa5ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c120: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000c0c4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c120 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3317 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3318 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3319 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3320 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3321 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3322 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0c4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed9c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80002e14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3323 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3324 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3325 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3326 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0c8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=40 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed98 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a18 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3327 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: b2423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb2423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0cc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r22=6fffee84, r0=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 22 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3328 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b2223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb2223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0d0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r22=6fffee84, r0=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 22 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3329 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0d4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=36 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed94 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3330 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0d8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=32 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed90 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a04 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3331 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0dc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3332 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812a03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812a03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0e0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed88 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3333 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed84 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3334 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0e8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed80 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a04 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3335 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12b83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12b83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0ec: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed7c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3336 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0f0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed78 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3337 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3338 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0f8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80002e14, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80002e14 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3339 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3340 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3341 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3342 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3343 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3344 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80002e14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: cd0fe06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcd0fe06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80002e14: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800012e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3345 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3346 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3347 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3348 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3349 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3350 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3351 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3352 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3353 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: cc5783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcc5783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r24=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3354 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 407f793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x407f793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3355 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012ec: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800012f4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3356 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3357 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3358 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3359 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3360 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3361 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3362 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3363 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1ec12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1ec12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012f4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=492 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000f74 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a18 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3364 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012f8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=488 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef88 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000014 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3365 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012fc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffedac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000014 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3366 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001300 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001300: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=484 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef84 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a04 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001300 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3367 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001300 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3368 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001300 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3369 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001300 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3370 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001304 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001304: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=480 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef80 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001304 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3371 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001308 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1dc12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1dc12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001308: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=476 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef7c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001308 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3372 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000130c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d812a03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d812a03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000130c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=472 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef78 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000130c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3373 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001310 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d412a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d412a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001310: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=468 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef74 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a04 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001310 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3374 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001314 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d012b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d012b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001314: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=464 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef70 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001314 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3375 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001318 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1cc12b83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1cc12b83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001318: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=460 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef6c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001318 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3376 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000131c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c812c03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c812c03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000131c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=456 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef68 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000131c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3377 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001320 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c412c83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c412c83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001320: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=452 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef64 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001320 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3378 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001324 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c012d03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c012d03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001324: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=448 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef60 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001324 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 26 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3379 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001328 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1bc12d83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1bc12d83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001328: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=444 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef5c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001328 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 27 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3380 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000132c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1f010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1f010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000132c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000132c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3381 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001330 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001330: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000f74, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000f74 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001330 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3382 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3383 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3384 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3385 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3386 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3387 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000064 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3388 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3389 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3390 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3391 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f78: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3392 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f7c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000064, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000064 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3393 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3394 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3395 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3396 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3397 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3398 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000064 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d41a883 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d41a883 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000064: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=468 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169dc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3399 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3400 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3401 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3402 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000068 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d01a803 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d01a803 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000068: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=464 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169d8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 71000024 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000068 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3403 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000006c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1cc1a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1cc1a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000006c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=460 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169d4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 00000014 (0) - %r13: 71000028 (0) - %r14: 10020000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000006c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3404 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000070 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80001637 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80001637 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000070: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) + %r11: 80000a84 (0) %r12: 80001000 (0) - %r13: 71000028 (0) - %r14: 10020000 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -198038,76 +14050,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000070 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3405 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000074 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40000793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40000793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000074: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000050 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 427 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000054 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x99860613 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r12 <- r12, imm=4294965656 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 80001000 (0) - %r13: 71000028 (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r10: 00000000 (0) + %r11: 80000a84 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -198118,236 +14102,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000074 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3406 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000078 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c10693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc10693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000078: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000054 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=12, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 428 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000058 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x400593 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r11 <- r0, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 80001000 (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000078 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3407 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000007c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c2c60613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc2c60613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000007c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) - %r11: 10000008 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000007c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3408 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000080 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 400593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x400593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000080: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000014 (0) + %r10: 00000000 (0) %r11: 00000004 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -198358,160 +14154,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3409 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3410 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3411 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3412 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000084 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 400513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x400513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000084: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000058 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 429 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000005c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x800513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) + %r10: 00000008 (0) %r11: 00000004 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -198522,78 +14206,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000084 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3413 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000088 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000088: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefd0, r11=10000000, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000005c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 430 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000060 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x150006f into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=2068 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000874 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6ffff000 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) + %r10: 00000008 (0) %r11: 00000004 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -198604,78 +14259,123 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000088 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 17 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3414 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000008c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000008c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefd0, r10=10010000, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000060 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 431 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 432 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 433 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 434 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 435 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 436 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000874 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xff010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967280 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) + %r10: 00000008 (0) %r11: 00000004 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -198686,78 +14386,94 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000008c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3415 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000090 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e12a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe12a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000090: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefd0, re=10020000, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000874 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 437 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000874 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 438 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000874 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 439 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000874 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 440 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000878 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffeff8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) + %r10: 00000008 (0) %r11: 00000004 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -198768,78 +14484,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000090 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3416 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000094 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f12c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf12c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000094: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefd0, rf=400, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000878 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 441 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000087c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x912223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffeff4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) + %r10: 00000008 (0) %r11: 00000004 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -198850,78 +14537,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000094 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3417 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000098 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f12e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf12e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000098: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefd0, rf=400, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000087c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=9 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 442 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000880 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1212023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffeff0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000064 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) + %r10: 00000008 (0) %r11: 00000004 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -198932,78 +14590,94 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000098 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3418 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000009c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 245000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x245000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000009c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000ae0 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000880 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 443 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000880 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 444 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000880 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 445 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000880 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 446 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000884 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffeffc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) + %r10: 00000008 (0) %r11: 00000004 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -199014,232 +14688,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000009c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3419 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3420 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3421 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3422 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3423 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3424 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ae0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ae0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000884 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 447 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000888 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x20c1ac23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r12 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) + %r10: 00000008 (0) %r11: 00000004 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000400 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -199250,160 +14741,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ae0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3425 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ae0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3426 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ae0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3427 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ae0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3428 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ae4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ae4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000888 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=3, trs2=12 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 448 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000088c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x20d1aa23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r13 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) + %r10: 00000008 (0) %r11: 00000004 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -199414,77 +14794,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ae4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3429 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ae8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 800015b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x800015b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ae8: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000088c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=3, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 449 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000890 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x22b1a423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r11 <- r3, imm=552 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016dd0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 80001000 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r10: 00000008 (0) + %r11: 00000004 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000000 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -199495,78 +14847,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ae8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3430 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000aec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000aec: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefc8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000890 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=3, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 450 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000894 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x100793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r0, imm=1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 80001000 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r10: 00000008 (0) + %r11: 00000004 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000001 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -199577,78 +14899,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000aec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3431 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000af0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000af0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefc4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000894 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 451 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000898 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa7fa63 into: branch +DEBUG ../../../../simX/instruction.cpp:739: BGEU: r15, r10, imm=20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 80001000 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r10: 00000008 (0) + %r11: 00000004 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000001 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -199659,78 +14951,139 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000af0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3432 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000af4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000af4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefc0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000898 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=15, trs2=10 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 452 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 453 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 454 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 455 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 456 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 457 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 458 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000089c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x800005b7 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r11 <- imm=0xfff80000 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 80001000 (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r10: 00000008 (0) + %r11: 80000000 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000001 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -199741,76 +15094,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000af4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3433 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000af8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 97c58593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x97c58593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000af8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000089c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 459 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008a0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7f058593 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r11 <- r11, imm=2032 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 80000044 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r10: 00000008 (0) + %r11: 800007f0 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000001 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -199821,78 +15146,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000af8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3434 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000afc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000afc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r1=800000a0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefcc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008a0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=11, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 460 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008a4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe7dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-388 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000720 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 800008a8 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r10: 00000008 (0) + %r11: 800007f0 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000001 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -199903,78 +15199,140 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000afc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3435 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 22c1a623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x22c1a623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b00: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, rc=80000c2c, imm=556 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008a4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 461 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 462 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 463 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 464 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 465 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 466 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 467 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000720 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb5106b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:885: WSPAWN: r10, r11 +DEBUG ../../../../simX/instruction.cpp:890: Spawning 4 new warps at PC: 800007f0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 800008a8 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r10: 00000008 (0) + %r11: 800007f0 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000001 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -199985,717 +15343,81 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3436 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3437 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3438 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3439 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 22d1a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x22d1a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b04: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, rd=6fffefdc, imm=548 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3440 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 24f1a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x24f1a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b08: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, rf=4, imm=580 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a4c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3441 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c6dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc6dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b0c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000778 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000b10 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3442 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3443 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3444 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3445 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3446 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3447 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000778 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b5106b -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb5106b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000778: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:961: WSPAWN -DEBUG ../../../simX/instruction.cpp:969: Spawning 4 new warps at PC: 8000097c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000b10 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000778 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 1 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3448 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000778 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 1 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3449 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000778 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 1 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3450 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000778 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 1 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3451 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000097c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2441a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2441a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000097c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=580 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a4c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000720 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=1 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 468 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000720 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=1 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 469 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000720 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=1 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 470 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000720 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=1 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 471 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007f0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2281a503 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=552 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dd0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 6bfff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -200724,145 +15446,77 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000097c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3452 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000097c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3453 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000097c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3454 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000097c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3455 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000097c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2441a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2441a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000097c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=580 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a4c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 472 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 473 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 474 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 475 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007f0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2281a503 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=552 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dd0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 67fff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -200891,61 +15545,32 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000097c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3456 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000097c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2441a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2441a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000097c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=580 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a4c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 476 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007f0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2281a503 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=552 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dd0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 63fff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -200974,74 +15599,45 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000097c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3457 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000077c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000077c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000b10, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000b10 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 477 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000724 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800008a8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000b10 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 800008a8 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r10: 00000008 (0) + %r11: 800007f0 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000001 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -201052,62 +15648,34 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000077c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3458 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000980 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000980: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000724 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 478 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007f4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xff010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967280 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 6bffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -201136,142 +15704,30 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000980 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3459 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000980 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3460 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000980 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3461 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000980 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3462 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000980 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000980: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 479 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007f4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xff010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967280 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 67ffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -201300,58 +15756,30 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000980 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3463 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000980 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000980: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 480 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007f4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xff010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967280 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 63ffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -201380,143 +15808,31 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000980 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3464 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2441a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2441a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b10: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=580 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a4c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000b10 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3465 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000984 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000984: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffeff0, r1=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffeffc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 481 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007f8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffeffc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 6bffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -201545,60 +15861,31 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000984 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3466 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000984 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000984: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffeff0, r1=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffeffc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 482 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007f8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffeffc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 67ffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -201627,60 +15914,31 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000984 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3467 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000984 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000984: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffeff0, r1=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffeffc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 483 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007f8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffeffc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 00000000 (0) %r 2: 63ffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -201709,74 +15967,46 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000984 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3468 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c6dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc6dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b14: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000780 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007f8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 484 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008a8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2281a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r3, imm=552 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dd0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000b18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 1: 800008a8 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000004 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: 6fffefdc (0) - %r14: 10020000 (0) - %r15: 00000004 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) + %r10: 00000008 (0) + %r11: 00000004 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000001 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) @@ -201787,64 +16017,35 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3469 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000988 -DEBUG ../../../simX/enc.cpp:105: Curr Code: df9ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xdf9ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000988: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000780 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 485 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007fc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf2dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-212 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000728 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 8000098c (0) + %r 1: 80000800 (0) %r 2: 6bffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -201873,60 +16074,31 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000988 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3470 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000988 -DEBUG ../../../simX/enc.cpp:105: Curr Code: df9ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xdf9ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000988: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000780 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007fc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 486 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007fc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf2dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-212 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000728 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 8000098c (0) + %r 1: 80000800 (0) %r 2: 67ffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -201955,60 +16127,31 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000988 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3471 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000988 -DEBUG ../../../simX/enc.cpp:105: Curr Code: df9ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xdf9ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000988: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000780 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007fc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 487 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800007fc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf2dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-212 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000728 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 8000098c (0) + %r 1: 80000800 (0) %r 2: 63ffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) %r 5: 00000000 (0) %r 6: 00000000 (0) @@ -202037,135 +16180,338 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000988 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3472 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3473 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3474 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000780: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800007fc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 488 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008ac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x58513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r11, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 800008a8 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000000 (0) + %r 9: 00000000 (0) + %r10: 00000004 (0) + %r11: 00000004 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000001 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008ac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=11, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 489 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008b0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe79ff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-392 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000728 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 800008b4 (0) + %r 2: 6fffeff0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000000 (0) + %r 9: 00000000 (0) + %r10: 00000004 (0) + %r11: 00000004 (0) + %r12: 80000998 (0) + %r13: 7fffff00 (0) + %r14: 00000001 (0) + %r15: 00000001 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000000 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008b0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 490 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 491 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000728 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b18 00000000 00000000 00000000 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) + %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000001 00000001 00000001 00000001 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000000 00000000 00000000 00000000 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #1 active threads changed from 1 to 4 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000728 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 492 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000728 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) + %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000002 00000002 00000002 00000002 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000000 00000000 00000000 00000000 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #2 active threads changed from 1 to 4 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000728 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 493 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000728 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) + %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000004 00000000 00000000 00000000 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000003 00000003 00000003 00000003 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000000 00000000 00000000 00000000 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #3 active threads changed from 1 to 4 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000728 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 494 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 495 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000728 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008b4 00000000 00000000 00000000 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000004 00000001 00000001 00000001 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000004 00000000 00000000 00000000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 00000001 00000000 00000000 00000000 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -202176,147 +16522,54 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3475 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3476 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3477 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3478 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000780: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #0 active threads changed from 1 to 4 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000728 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 496 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 497 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000072c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000800 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -202345,59 +16598,34 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3479 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000780: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000072c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 498 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000072c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000800 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -202426,59 +16654,34 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3480 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000780: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000072c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 499 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000072c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000800 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -202507,139 +16710,63 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3481 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3482 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3483 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000784 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000784: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000b18, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000b18 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000072c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 500 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 501 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000072c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800008b4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b18 00000000 00000000 00000000 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008b4 00000000 00000000 00000000 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000004 00000001 00000001 00000001 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000004 00000000 00000000 00000000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 00000001 00000000 00000000 00000000 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -202650,74 +16777,67 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000784 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3484 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000784 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000784: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000098c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000098c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000072c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 502 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 503 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000800 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2141a503 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000004 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) @@ -202739,70 +16859,93 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000784 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3485 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000784 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000784: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000098c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000098c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000800 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 504 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000800 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 505 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000800 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 506 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000800 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 507 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000800 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2141a503 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000004 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) @@ -202824,70 +16967,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000784 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3486 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000784 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000784: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000098c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000098c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000800 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 508 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000800 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2141a503 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000004 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) @@ -202909,146 +17030,55 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000784 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3487 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3488 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3489 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2241a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2241a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b18: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000800 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 509 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008b4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2141a503 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=532 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7fffff00 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b18 00000000 00000000 00000000 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008b4 00000000 00000000 00000000 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000004 00000000 00000000 00000000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 00000001 00000000 00000000 00000000 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -203059,86 +17089,87 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3490 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000098c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2241a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2241a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000098c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 510 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 511 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 512 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000804 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2181a783 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -203155,82 +17186,83 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000098c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3491 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000098c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2241a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2241a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000098c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000804 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 513 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000804 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 514 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000804 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 515 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000804 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2181a783 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -203247,82 +17279,83 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000098c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3492 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000098c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2241a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2241a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000098c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=548 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffefdc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000804 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 516 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000804 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 517 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000804 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 518 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000804 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2181a783 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 80000800 00000000 00000000 00000000 (0) %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -203339,140 +17372,85 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000098c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3493 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000098c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3494 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000098c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3495 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 22c1a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x22c1a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b1c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000804 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 519 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000804 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 520 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000804 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 521 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008b8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2181a783 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r3, imm=536 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016dc0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000998 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b18 00000000 00000000 00000000 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008b4 00000000 00000000 00000000 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -203483,142 +17461,80 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3496 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3497 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3498 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000990 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 22c1a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x22c1a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000990: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 522 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 523 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 524 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000808 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x780e7 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000998 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -203635,138 +17551,76 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000990 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3499 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000990 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3500 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000990 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3501 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000990 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 22c1a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x22c1a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000990: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000808 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 525 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000808 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 526 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000808 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 527 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000808 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x780e7 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000998 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -203783,138 +17637,76 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000990 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3502 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000990 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3503 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000990 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3504 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000990 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 22c1a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x22c1a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000990: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=556 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016a34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000c2c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000808 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 528 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000808 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 529 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000808 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 530 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000808 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x780e7 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000998 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000098c 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -203931,133 +17723,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000990 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3505 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000990 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3506 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000990 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3507 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b20: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c2c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000808 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 531 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008bc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x780e7 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000998 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -204068,135 +17775,113 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3508 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3509 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3510 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000994 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000994: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c2c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 532 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 533 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 534 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 535 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 536 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000998 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfe010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -204213,131 +17898,90 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000994 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3511 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000994 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3512 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000994 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3513 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000994 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000994: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c2c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000998 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 537 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000998 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 538 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000998 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 539 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000998 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 540 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000998 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfe010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -204354,75 +17998,45 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000994 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3514 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000994 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000994: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80000c2c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c2c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000998 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 541 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000998 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfe010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -204439,194 +18053,47 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000994 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3515 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3516 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3517 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3518 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3519 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000998 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 542 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000998 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfe010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967264 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -204637,158 +18104,53 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3520 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3521 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3522 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3523 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000998 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 543 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000099c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112e23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffefec +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffec00 +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe804 +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe408 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -204805,70 +18167,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c2c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3524 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000099c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 544 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000099c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112e23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffefec +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffec00 +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe804 +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe408 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -204885,70 +18226,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c2c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3525 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000099c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=9 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 545 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000099c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112e23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffefec +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffec00 +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe804 +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe408 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -204965,80 +18285,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c2c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3526 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c30: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r1=80000b24, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffebf4, r1=80000b24, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffec00 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffe7f8, r1=80000b24, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffe804 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffe3fc, r1=80000b24, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffe408 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000099c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 546 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000099c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112e23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefec +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffec00 +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe804 +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe408 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -205049,82 +18340,53 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3527 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c30: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffefe0, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffefec -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffebf4, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffec00 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffe7f8, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffe804 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffe3fc, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffe408 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000099c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 547 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812c23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffefe8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffebfc +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe800 +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe404 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -205141,78 +18403,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c30 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3528 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c30: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffefe0, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffefec -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffebf4, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffec00 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffe7f8, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffe804 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffe3fc, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffe408 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=9 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 548 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812c23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffefe8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffebfc +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe800 +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe404 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -205229,78 +18462,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c30 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3529 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c30: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffefe0, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffefec -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffebf4, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffec00 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffe7f8, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffe804 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffe3fc, r1=80000998, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffe408 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 549 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812c23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffefe8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffebfc +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe800 +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe404 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -205317,80 +18521,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c30 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3530 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c34: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffebf4, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffebfc -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffe7f8, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffe800 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffe3fc, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffe404 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 550 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812c23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefe8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffebfc +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe800 +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe404 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -205401,82 +18576,53 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3531 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c34: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffefe0, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffefe8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffebf4, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffebfc -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffe7f8, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffe800 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffe3fc, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffe404 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 551 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x912a23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffefe4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffebf8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe7fc +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe400 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -205493,78 +18639,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c34 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3532 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c34: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffefe0, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffefe8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffebf4, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffebfc -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffe7f8, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffe800 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffe3fc, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffe404 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=9 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 552 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x912a23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffefe4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffebf8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe7fc +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe400 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -205581,78 +18698,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c34 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3533 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c34: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffefe0, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffefe8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffebf4, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffebfc -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffe7f8, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffe800 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffe3fc, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffe404 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=9 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 553 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x912a23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffefe4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffebf8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe7fc +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe400 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -205669,80 +18757,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c34 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 6 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3534 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c38: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffebf4, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffebf8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffe7f8, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffe7fc -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffe3fc, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffe400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=9 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 554 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x912a23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefe4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffebf8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe7fc +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe400 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -205753,82 +18812,53 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3535 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c38: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffefe0, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffefe4 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffebf4, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffebf8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffe7f8, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffe7fc -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffe3fc, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffe400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=9 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 555 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1212823 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffefe0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffebf4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe7f8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe3fc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -205845,78 +18875,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c38 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 6 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3536 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c38: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffefe0, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffefe4 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffebf4, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffebf8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffe7f8, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffe7fc -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffe3fc, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffe400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 556 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1212823 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffefe0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffebf4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe7f8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe3fc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -205933,78 +18934,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c38 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3537 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c38: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffefe0, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffefe4 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffebf4, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffebf8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffe7f8, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffe7fc -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffe3fc, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffe400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 557 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1212823 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffefe0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffebf4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe7f8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe3fc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -206021,80 +18993,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c38 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3538 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb0 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffebf4, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffebf4 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffe7f8, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffe7f8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffe3fc, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffe3fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 558 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009a8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1212823 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefe0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffebf4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe7f8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe3fc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -206105,82 +19048,53 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3539 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffefe0, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffefe0 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffebf4, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffebf4 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffe7f8, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffe7f8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6bffe3fc, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6bffe3fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009a8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 559 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009ac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1312623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffefdc +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffebf0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe7f4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe3f8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -206197,78 +19111,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c3c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 6 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3540 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffefe0, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffefe0 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffebf4, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffebf4 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffe7f8, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffe7f8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=67ffe3fc, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 67ffe3fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009ac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=19 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 560 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009ac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1312623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffefdc +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffebf0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe7f4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe3f8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -206285,78 +19170,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c3c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3541 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffefe0, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffefe0 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffebf4, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffebf4 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffe7f8, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffe7f8 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=63ffe3fc, r12=0, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 63ffe3fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009ac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=19 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 561 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009ac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1312623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffefdc +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffebf0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe7f4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe3f8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -206373,72 +19229,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c3c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3542 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c40: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009ac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=19 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 562 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009ac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1312623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefdc +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffebf0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe7f4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe3f8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -206449,158 +19284,53 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3543 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3544 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3545 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3546 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c40: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009ac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=19 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 563 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1412423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffefd8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffebec +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe7f0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6bffe3f4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -206617,70 +19347,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c40 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3547 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c40: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 564 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1412423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffefd8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffebec +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe7f0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 67ffe3f4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -206697,70 +19406,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c40 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3548 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c40: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 565 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1412423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffefd8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffebec +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe7f0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 63ffe3f4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -206777,77 +19465,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c40 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3549 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b5dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb5dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c44: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a0 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 566 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1412423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefd8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffebec +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe7f0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffe3f4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -206858,83 +19520,53 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3550 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b5dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb5dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c44: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a0 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 567 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50993 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r20: 00000000 00000000 00000000 00000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) @@ -206947,79 +19579,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c44 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3551 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b5dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb5dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c44: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a0 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 568 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50993 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r20: 00000000 00000000 00000000 00000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) @@ -207032,79 +19634,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c44 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3552 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b5dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb5dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c44: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a0 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 569 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50993 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r20: 00000000 00000000 00000000 00000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) @@ -207117,140 +19689,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c44 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3553 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3554 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3555 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2102573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2102573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a0: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 570 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50993 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) %r20: 00000000 00000000 00000000 00000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) @@ -207259,83 +19740,1445 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3556 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2102573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2102573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a0: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 571 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x52a03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000001 00000001 00000001 00000001 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 572 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x52a03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000002 00000002 00000002 00000002 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 573 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x52a03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000003 00000003 00000003 00000003 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 574 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009b8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x52a03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000000 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 575 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 576 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 577 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 578 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 579 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009b8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 580 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009bc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x452483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000001 00000001 00000001 00000001 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 581 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 582 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 583 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009bc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x452483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000002 00000002 00000002 00000002 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 584 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 585 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 586 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009bc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x452483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000003 00000003 00000003 00000003 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 587 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 588 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 589 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009bc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x452483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r10, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000200 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 590 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 591 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009bc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 592 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x852903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000001 00000001 00000001 00000001 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 593 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 594 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 595 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 596 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 597 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 598 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x852903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000002 00000002 00000002 00000002 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 599 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x852903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000003 00000003 00000003 00000003 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 600 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 601 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x852903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r10, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10000400 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 602 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 603 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 604 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xd8dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000750 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000001 00000001 00000001 00000001 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 605 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 606 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 607 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xd8dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000750 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000002 00000002 00000002 00000002 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 608 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 609 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 610 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xd8dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000750 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000003 00000003 00000003 00000003 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 611 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xd8dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000750 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 612 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 613 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 614 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000750 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2202573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=1 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000001 00000001 00000001 00000001 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -207347,79 +21190,100 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3557 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2102573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2102573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a0: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000750 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 615 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000750 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 616 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000750 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 617 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000750 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 618 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000750 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2202573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000002 00000002 00000002 00000002 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -207431,79 +21295,54 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3558 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2102573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2102573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a0: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000750 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 619 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000750 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2202573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000003 00000003 00000003 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -207515,80 +21354,54 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3559 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c48 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000750 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 620 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000750 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2202573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=34 +DEBUG ../../../../simX/instruction.cpp:796: vx_warpNum: r10=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -207596,84 +21409,55 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3560 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c48 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000750 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 621 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000754 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800009c8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000001 00000001 00000001 00000001 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -207685,80 +21469,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3561 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c48 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000754 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 622 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000754 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800009c8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000002 00000002 00000002 00000002 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -207770,80 +21525,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3562 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c48, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c48 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000754 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 623 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000754 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800009c8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000003 00000003 00000003 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -207855,137 +21581,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3563 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3564 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3565 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000754 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 624 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000754 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800009c8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -207993,79 +21633,84 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3566 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000754 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 625 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 626 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 627 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50413 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000001 00000001 00000001 00000001 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208077,75 +21722,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c48 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3567 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 628 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50413 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000002 00000002 00000002 00000002 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208157,75 +21777,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c48 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3568 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 629 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50413 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c48 80000c48 80000c48 80000c48 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000003 00000003 00000003 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208237,80 +21832,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c48 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3569 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b5dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb5dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c4c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a8 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 630 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009c8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50413 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009c8 800009c8 800009c8 800009c8 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208318,84 +21883,55 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3570 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b5dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb5dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c4c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a8 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009c8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 631 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009cc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xd8dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000758 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000001 00000001 00000001 00000001 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208407,80 +21943,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c4c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3571 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b5dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb5dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c4c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a8 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009cc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 632 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009cc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xd8dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000758 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000002 00000002 00000002 00000002 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208492,80 +21999,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c4c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3572 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b5dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb5dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c4c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a8 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009cc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 633 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009cc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xd8dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000758 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000003 00000003 00000003 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208577,141 +22055,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c4c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3573 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3574 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3575 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2002573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2002573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a8: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 0 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 1 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 2 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009cc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 634 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009cc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xd8dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-628 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000758 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000000 00000000 00000000 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208719,83 +22107,88 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3576 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2002573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2002573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a8: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 0 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 1 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 2 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009cc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 635 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 636 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 637 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000758 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2002573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208807,79 +22200,54 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3577 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2002573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2002573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a8: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 0 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 1 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 2 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000758 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 638 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000758 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2002573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208891,79 +22259,54 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3578 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2002573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2002573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a8: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 0 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 1 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 2 -DEBUG ../../../simX/instruction.cpp:850: CSR Reading tid 20 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000758 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 639 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000758 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2002573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -208975,80 +22318,54 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3579 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007ac: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c50 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000758 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 640 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000758 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2002573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:788: vx_threadID: r10=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -209056,84 +22373,55 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3580 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007ac: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c50 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000758 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 641 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000075c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800009d0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000001 00000001 00000001 00000001 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -209145,80 +22433,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007ac -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3581 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007ac: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c50 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000075c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 642 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000075c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800009d0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000002 00000002 00000002 00000002 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -209230,80 +22489,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007ac -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3582 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007ac: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c50, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c50 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000075c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 643 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000075c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800009d0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) %r13: 00000003 00000003 00000003 00000003 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 80000c2c 80000c2c 80000c2c 80000c2c (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -209315,149 +22545,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007ac -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3583 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3584 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3585 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 104a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x104a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c50: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000075c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 644 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000075c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800009d0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 7fffff00 00000000 00000000 00000000 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -209465,91 +22597,92 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 6 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3586 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 104a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x104a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c50: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000075c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 645 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 646 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 647 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc9a683 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) + %r13: 00000004 00000004 00000004 00000004 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -209561,87 +22694,58 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c50 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3587 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 104a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x104a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c50: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=19, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 648 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc9a683 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) + %r13: 00000004 00000004 00000004 00000004 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -209653,87 +22757,58 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c50 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3588 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 104a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x104a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c50: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=19, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 649 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc9a683 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) + %r13: 00000004 00000004 00000004 00000004 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -209745,367 +22820,58 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c50 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3589 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c50 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3590 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c50 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3591 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c50 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3592 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c50 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3593 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c50 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3594 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f47863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf47863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c54: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=19, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 650 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc9a683 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r19, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 7fffff0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3595 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3596 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3597 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f47863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf47863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c54: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -210117,139 +22883,80 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c54 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3598 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c54 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3599 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c54 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3600 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f47863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf47863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c54: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=19, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 651 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=19, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 652 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=19, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 653 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x241413 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 8: 00000004 00000004 00000004 00000004 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) + %r13: 00000004 00000004 00000004 00000004 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -210261,83 +22968,80 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c54 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3601 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f47863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf47863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c54: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 654 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 655 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 656 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x241413 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 8: 00000008 00000008 00000008 00000008 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) + %r13: 00000004 00000004 00000004 00000004 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -210349,209 +23053,135 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c54 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3602 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3603 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3604 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3605 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3606 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c4a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc4a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c58: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 657 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 658 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 659 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x241413 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000c 0000000c 0000000c (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 660 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x241413 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r8 <- r8, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -210559,91 +23189,54 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3607 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c4a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc4a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c58: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 661 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa40433 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) + %r13: 00000004 00000004 00000004 00000004 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -210655,87 +23248,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c58 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3608 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c4a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc4a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c58: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=10 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 662 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa40433 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) + %r13: 00000004 00000004 00000004 00000004 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -210747,87 +23304,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c58 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3609 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c4a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc4a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c58: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=10 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 663 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa40433 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 10000200 10000200 10000200 10000200 (0) %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) + %r13: 00000004 00000004 00000004 00000004 (0) %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -210839,7566 +23360,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c58 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3610 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c58 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3611 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c58 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3612 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=10 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 664 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009d8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xa40433 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r8 <- r8, r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3613 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3614 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3615 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c5c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3616 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c5c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3617 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c5c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3618 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c5c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3619 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c5c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3620 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f56263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f56263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c60: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c84 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3621 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f56263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f56263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c60: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c84 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c60 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3622 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f56263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f56263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c60: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c84 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c60 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3623 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f56263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f56263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c60: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c84 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000000 00000001 00000002 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c60 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3624 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3625 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3626 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3627 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3628 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c84: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3629 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3630 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3631 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3632 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c84: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c84 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3633 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c84: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c84 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3634 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c84: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c50 80000c50 80000c50 80000c50 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c84 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3635 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b09ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb09ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c88: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000790 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3636 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b09ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb09ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c88: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000790 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c88 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3637 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b09ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb09ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c88: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000790 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c88 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3638 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b09ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb09ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c88: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000790 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c88 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3639 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3640 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3641 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000790 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5206b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5206b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000790: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1009: Unanimous pred: 10 val: 1 - -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000790 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3642 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000790 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5206b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5206b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000790: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1009: Unanimous pred: 10 val: 1 - -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000790 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3643 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000790 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5206b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5206b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000790: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1009: Unanimous pred: 10 val: 1 - -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000790 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3644 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000790 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5206b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5206b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000790: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1009: Unanimous pred: 10 val: 1 - -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:1003: SPLIT -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000790 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3645 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3646 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3647 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000794 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000794: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c8c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000794 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3648 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000794 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000794: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c8c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000794 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3649 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000794 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000794: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c8c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000794 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3650 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000794 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000794: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000c8c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000c8c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000794 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3651 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3652 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3653 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c4a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc4a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c8c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10020000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3654 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c4a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc4a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c8c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c8c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3655 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c4a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc4a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c8c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c8c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3656 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c4a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc4a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c8c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) - %r14: 00000000 00000000 00000000 00000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c8c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3657 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c8c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3658 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c8c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3659 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c90: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 6fffefdc 00000000 00000000 00000000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3660 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3661 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3662 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c90: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000001 00000001 00000001 00000001 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3663 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3664 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3665 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c90: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000002 00000002 00000002 00000002 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3666 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3667 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3668 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c90: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 00000003 00000003 00000003 00000003 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3669 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3670 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c90 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3671 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 44a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x44a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c94: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3672 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3673 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3674 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 44a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x44a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c94: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000001 00000001 00000001 00000001 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3675 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3676 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3677 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 44a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x44a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c94: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000002 00000002 00000002 00000002 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3678 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3679 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3680 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 44a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x44a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c94: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10010000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000003 00000003 00000003 00000003 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3681 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3682 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c94 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3683 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2a40433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2a40433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c98: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3684 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3685 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3686 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2a40433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2a40433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c98: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000400 00000400 00000400 00000400 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c98 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3687 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c98 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3688 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c98 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3689 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2a40433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2a40433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c98: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000800 00000800 00000800 00000800 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c98 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3690 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2a40433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2a40433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c98: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000c00 00000c00 00000c00 00000c00 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 00000400 00000400 00000400 00000400 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c98 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3691 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 84a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x84a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c9c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3692 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 84a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x84a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c9c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000400 00000400 00000400 00000400 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c9c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3693 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 84a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x84a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c9c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000800 00000800 00000800 00000800 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c9c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3694 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c9c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3695 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000c9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 84a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x84a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000c9c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffefdc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10020000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000c8c 80000c8c 80000c8c 80000c8c (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000c00 00000c00 00000c00 00000c00 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c9c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3696 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c9c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3697 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000c9c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3698 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000b24 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffebf4, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffec00 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000b24 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe7f8, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe804 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000b24 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe3fc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe408 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000b24 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 6 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3699 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 6 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3700 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 6 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3701 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffefe0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffebf4, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffec00 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffe7f8, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffe804 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffe3fc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffe408 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000400 00000400 00000400 00000400 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3702 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3703 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3704 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffefe0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffebf4, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffec00 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffe7f8, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffe804 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffe3fc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffe408 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000800 00000800 00000800 00000800 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3705 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3706 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3707 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffefe0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffebf4, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffec00 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffe7f8, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffe804 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffe3fc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffe408 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000998 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000c00 00000c00 00000c00 00000c00 (0) - %r 9: 6fffefdc 6fffefdc 6fffefdc 6fffefdc (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3708 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3709 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3710 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3711 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3712 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3713 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffebf4, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffebf8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe7f8, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe7fc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe3fc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe400 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3714 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3715 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3716 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3717 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3718 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3719 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3720 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3721 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3722 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffefe0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffebf4, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffebf8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffe7f8, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffe7fc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffe3fc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffe400 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000400 00000400 00000400 00000400 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3723 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3724 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3725 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3726 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3727 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3728 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3729 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3730 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3731 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffefe0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffebf4, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffebf8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffe7f8, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffe7fc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffe3fc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffe400 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000800 00000800 00000800 00000800 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3732 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3733 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3734 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3735 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3736 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3737 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3738 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3739 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3740 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3741 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3742 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3743 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffefe0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffebf4, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffebf8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffe7f8, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffe7fc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffe3fc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffe400 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000c00 00000c00 00000c00 00000c00 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3744 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3745 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3746 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3747 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3748 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3749 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3750 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3751 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3752 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1240433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1240433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000001 00000002 00000003 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3753 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3754 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3755 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3756 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3757 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3758 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3759 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3760 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3761 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3762 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3763 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3764 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1240433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1240433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000400 00000401 00000402 00000403 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 80000998 80000998 80000998 80000998 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -218410,383 +23416,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3765 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3766 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3767 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3768 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3769 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3770 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3771 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3772 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3773 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3774 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3775 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3776 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1240433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1240433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009d8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=10 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 665 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009dc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2d407b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000800 00000801 00000802 00000803 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000010 00000014 00000018 0000001c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -218798,75 +23472,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3777 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ca8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1240433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1240433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ca8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009dc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=8, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 666 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009dc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2d407b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000c00 00000c01 00000c02 00000c03 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000020 00000024 00000028 0000002c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -218878,155 +23528,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ca8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3778 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 241413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x241413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009dc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=8, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 667 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009dc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2d407b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000004 00000008 0000000c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3779 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 241413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x241413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00001000 00001004 00001008 0000100c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000030 00000034 00000038 0000003c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -219038,75 +23584,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cac -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3780 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 241413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x241413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009dc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=8, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 668 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009dc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2d407b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r15 <- r8, r13 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00002000 00002004 00002008 0000200c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 00000000 00000004 00000008 0000000c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -219118,75 +23640,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cac -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3781 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 241413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x241413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009dc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=8, trs2=13 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 669 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x4068063 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00003000 00003004 00003008 0000300c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000000 10000000 10000000 (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000010 00000014 00000018 0000001c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -219198,155 +23696,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cac -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3782 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 870733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x870733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 670 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x4068063 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000004 00000008 0000000c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10000000 10000004 10000008 1000000c (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3783 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 870733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x870733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00001000 00001004 00001008 0000100c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10001000 10001004 10001008 1000100c (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000020 00000024 00000028 0000002c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -219358,75 +23752,83 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3784 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 870733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x870733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 671 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 672 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 673 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x4068063 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00002000 00002004 00002008 0000200c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10002000 10002004 10002008 1000200c (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000030 00000034 00000038 0000003c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -219438,76 +23840,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3785 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 870733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x870733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 674 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x4068063 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=64 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00003000 00003004 00003008 0000300c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10010000 10010000 10010000 10010000 (0) - %r14: 10003000 10003004 10003008 1000300c (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 00000004 00000004 00000004 00000004 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 00000000 00000004 00000008 0000000c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -219519,157 +23895,80 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3786 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 675 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 676 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 677 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf686b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000004 00000008 0000000c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 10010000 10010004 10010008 1001000c (0) - %r14: 10000000 10000004 10000008 1000000c (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3787 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00001000 00001004 00001008 0000100c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10011000 10011004 10011008 1001100c (0) - %r14: 10001000 10001004 10001008 1000100c (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000014 00000018 0000001c 00000020 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000010 00000014 00000018 0000001c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -219681,76 +23980,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3788 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 678 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf686b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00002000 00002004 00002008 0000200c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10012000 10012004 10012008 1001200c (0) - %r14: 10002000 10002004 10002008 1000200c (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000024 00000028 0000002c 00000030 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000020 00000024 00000028 0000002c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -219762,76 +24035,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3789 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 679 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf686b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00003000 00003004 00003008 0000300c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10013000 10013004 10013008 1001300c (0) - %r14: 10003000 10003004 10003008 1000300c (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000034 00000038 0000003c 00000040 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000030 00000034 00000038 0000003c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -219843,181 +24090,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3790 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10000000, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000000 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10000004, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000004 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 409 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10000008, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000008 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=1000000c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1000000c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 65206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 680 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf686b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000004 00000008 0000000c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: 10010000 10010004 10010008 1001000c (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3791 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10001000, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10001000 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10001004, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10001004 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10001008, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10001008 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=1000100c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1000100c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00001000 00001004 00001008 0000100c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10011000 10011004 10011008 1001100c (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 00000004 00000008 0000000c 00000010 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 00000000 00000004 00000008 0000000c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -220029,88 +24145,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3792 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10002000, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10002000 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10002004, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10002004 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10002008, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10002008 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=1000200c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1000200c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 681 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x269693 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00002000 00002004 00002008 0000200c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10012000 10012004 10012008 1001200c (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000050 00000060 00000070 00000080 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000010 00000014 00000018 0000001c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -220122,116 +24200,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3793 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3794 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cb8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cb8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10003000, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10003000 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10003004, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10003004 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10003008, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10003008 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=1000300c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1000300c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 682 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x269693 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00003000 00003004 00003008 0000300c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: 10013000 10013004 10013008 1001300c (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000090 000000a0 000000b0 000000c0 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000020 00000024 00000028 0000002c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -220243,291 +24255,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3795 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3796 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cb8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3797 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cbc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cbc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10010000, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10010000 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10010004, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10010004 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10010008, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10010008 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=1001000c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1001000c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 683 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x269693 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000004 00000008 0000000c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3798 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3799 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3800 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cbc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cbc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10011000, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10011000 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10011004, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10011004 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10011008, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10011008 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=1001100c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1001100c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00001000 00001004 00001008 0000100c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 000000d0 000000e0 000000f0 00000100 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000030 00000034 00000038 0000003c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -220539,143 +24310,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3801 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3802 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3803 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cbc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cbc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10012000, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10012000 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10012004, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10012004 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10012008, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10012008 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=1001200c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1001200c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 684 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009e8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x269693 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r13 <- r13, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00002000 00002004 00002008 0000200c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 00000010 00000020 00000030 00000040 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 00000000 00000004 00000008 0000000c (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -220687,143 +24365,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3804 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3805 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3806 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cbc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cbc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10013000, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10013000 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10013004, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10013004 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=10013008, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10013008 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r13=1001300c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1001300c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009e8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 685 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009ec +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x279793 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00003000 00003004 00003008 0000300c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000050 00000060 00000070 00000080 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000040 00000050 00000060 00000070 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -220835,351 +24420,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3807 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3808 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cbc -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3809 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 878433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x878433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009ec +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 686 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009ec +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x279793 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10020000 10020004 10020008 1002000c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3810 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3811 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3812 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3813 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3814 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3815 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 878433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x878433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10021000 10021004 10021008 1002100c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000090 000000a0 000000b0 000000c0 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 00000080 00000090 000000a0 000000b0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -221191,75 +24475,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3816 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 878433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x878433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009ec +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 687 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009ec +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x279793 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10022000 10022004 10022008 1002200c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 000000d0 000000e0 000000f0 00000100 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 000000c0 000000d0 000000e0 000000f0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -221271,75 +24530,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3817 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 878433 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x878433 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009ec +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 688 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009ec +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x279793 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r15 <- r15, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10023000 10023004 10023008 1002300c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 00000010 00000020 00000030 00000040 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 00000000 00000010 00000020 00000030 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000001 00000002 00000003 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -221351,181 +24585,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3818 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffebf4, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffebf4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe7f8, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe7f8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe3fc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe3fc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009ec +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 689 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14787b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10020000 10020004 10020008 1002000c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: 10020000 10020000 10020000 10020000 (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3819 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffefe0, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffebf4, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffebf4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffe7f8, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffe7f8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffe3fc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffe3fc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10021000 10021004 10021008 1002100c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000050 00000060 00000070 00000080 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 10000040 10000050 10000060 10000070 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -221537,88 +24640,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3820 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffefe0, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffebf4, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffebf4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffe7f8, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffe7f8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffe3fc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffe3fc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 690 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14787b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10022000 10022004 10022008 1002200c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 00000090 000000a0 000000b0 000000c0 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 10000080 10000090 100000a0 100000b0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -221630,116 +24695,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 6 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3821 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 6 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3822 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffefe0, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffebf4, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffebf4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffe7f8, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffe7f8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffe3fc, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffe3fc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 691 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14787b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10023000 10023004 10023008 1002300c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: 10020000 10020000 10020000 10020000 (0) + %r13: 000000d0 000000e0 000000f0 00000100 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 100000c0 100000d0 100000e0 100000f0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -221751,687 +24750,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3823 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3824 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3825 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3826 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3827 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3828 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3829 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3830 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3831 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d707b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd707b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 692 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14787b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r15 <- r15, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10020000 10020004 10020008 1002000c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3832 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3833 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3834 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3835 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3836 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3837 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3838 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3839 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3840 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3841 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3842 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3843 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d707b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd707b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10021000 10021004 10021008 1002100c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 00000010 00000020 00000030 00000040 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 10000000 10000010 10000020 10000030 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -222443,215 +24805,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3844 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3845 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3846 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3847 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3848 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3849 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d707b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd707b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 693 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14686b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10022000 10022004 10022008 1002200c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 10000040 10000050 10000060 10000070 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -222663,75 +24860,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3850 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d707b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd707b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cc8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 694 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14686b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10023000 10023004 10023008 1002300c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 10000080 10000090 100000a0 100000b0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -222743,171 +24915,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cc8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3851 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ccc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ccc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10020000, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10020000 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10020004, rf=ddccbfb3, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10020004 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10020008, rf=4c3f2115, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10020008 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=1002000c, rf=42ed280f, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1002000c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 695 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14686b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10020000 10020004 10020008 1002000c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3852 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ccc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ccc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10021000, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10021000 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10021004, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10021004 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10021008, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10021008 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=1002100c, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1002100c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10021000 10021004 10021008 1002100c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 100000c0 100000d0 100000e0 100000f0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -222919,83 +24970,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3853 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ccc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ccc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10022000, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10022000 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10022004, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10022004 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10022008, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10022008 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=1002200c, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1002200c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 696 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14686b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r13 <- r13, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10022000 10022004 10022008 1002200c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 10000000 10000010 10000020 10000030 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 10000400 10000400 10000400 10000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -223007,279 +25025,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3854 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3855 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3856 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3857 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3858 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3859 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3860 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3861 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ccc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ccc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10023000, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10023000 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10023004, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10023004 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=10023008, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10023008 -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=1002300c, rf=bb997754, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1002300c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=13, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 697 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x41490933 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 10023000 10023004 10023008 1002300c (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) %r11: 00000000 00000400 00000800 00000c00 (0) %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 10000040 10000050 10000060 10000070 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -223291,87 +25080,9717 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ccc -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3862 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffebf4, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffebfc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe7f8, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe800 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe3fc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe404 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=18, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 698 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x41490933 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefb0 6fffebf4 6fffe7f8 6fffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 10000080 10000090 100000a0 100000b0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=18, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 699 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x41490933 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 100000c0 100000d0 100000e0 100000f0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=18, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 700 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009f8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x41490933 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r18 <- r18, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 10000200 10000200 10000200 10000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 10000000 10000010 10000020 10000030 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009f8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=18, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 701 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009fc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x414484b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 10000040 10000050 10000060 10000070 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009fc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=9, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 702 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009fc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x414484b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 10000080 10000090 100000a0 100000b0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009fc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=9, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 703 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009fc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x414484b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000000 00000000 00000000 00000000 (0) + %r15: 100000c0 100000d0 100000e0 100000f0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009fc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=9, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 704 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800009fc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x414484b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r9 <- r9, r20 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000001 00000000 00000000 00000000 (0) + %r15: 10000000 10000010 10000020 10000030 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800009fc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=9, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 705 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 10000240 10000250 10000260 10000270 (0) + %r15: 10000040 10000050 10000060 10000070 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 706 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 707 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 708 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 709 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 10000280 10000290 100002a0 100002b0 (0) + %r15: 10000080 10000090 100000a0 100000b0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 710 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000400 00000800 00000c00 (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 100002c0 100002d0 100002e0 100002f0 (0) + %r15: 100000c0 100000d0 100000e0 100000f0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 711 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000004 00000400 00000800 00000c00 (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 10000200 10000210 10000220 10000230 (0) + %r15: 10000000 10000010 10000020 10000030 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 712 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000040 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000050 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 14 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000060 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 18 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000070 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000010 00000014 00000018 0000001c (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 10000240 10000250 10000260 10000270 (0) + %r15: 10000040 10000050 10000060 10000070 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 713 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000080 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 20 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000090 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 24 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000a0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 28 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000b0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000020 00000024 00000028 0000002c (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 10000280 10000290 100002a0 100002b0 (0) + %r15: 10000080 10000090 100000a0 100000b0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 714 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000c0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 30 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000d0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 34 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000e0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 38 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000f0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000030 00000034 00000038 0000003c (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 100002c0 100002d0 100002e0 100002f0 (0) + %r15: 100000c0 100000d0 100000e0 100000f0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 715 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000000 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000010 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000020 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000030 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000004 00000008 0000000c (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 10000200 10000210 10000220 10000230 (0) + %r15: 10000000 10000010 10000020 10000030 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 716 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 717 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 718 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 719 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 720 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 721 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000240 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 10 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000250 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 14 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000260 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 18 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000270 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000010 00000014 00000018 0000001c (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000010 00000014 00000018 0000001c (0) + %r15: 10000040 10000050 10000060 10000070 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 722 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 723 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 724 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 725 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 726 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 727 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000280 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 20 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000290 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 24 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002a0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 28 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002b0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000020 00000024 00000028 0000002c (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000020 00000024 00000028 0000002c (0) + %r15: 10000080 10000090 100000a0 100000b0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 728 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 729 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 730 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 731 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 732 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 733 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002c0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 30 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002d0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 34 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002e0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 38 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002f0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000030 00000034 00000038 0000003c (0) + %r12: 00000000 00000004 00000008 0000000c (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000030 00000034 00000038 0000003c (0) + %r15: 100000c0 100000d0 100000e0 100000f0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 734 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 735 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 736 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 737 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 738 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 739 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000200 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000210 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 4 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000220 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000230 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000004 00000008 0000000c (0) + %r12: 80000998 00000004 00000008 0000000c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000000 00000004 00000008 0000000c (0) + %r15: 10000000 10000010 10000020 10000030 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 740 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 741 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 742 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 743 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 744 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 745 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000010 00000014 00000018 0000001c (0) + %r12: 10000440 10000450 10000460 10000470 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000010 00000014 00000018 0000001c (0) + %r15: 10000040 10000050 10000060 10000070 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 746 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 747 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 748 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 749 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 750 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 751 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000020 00000024 00000028 0000002c (0) + %r12: 10000480 10000490 100004a0 100004b0 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000020 00000024 00000028 0000002c (0) + %r15: 10000080 10000090 100000a0 100000b0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 752 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 753 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 754 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 755 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 756 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 757 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000030 00000034 00000038 0000003c (0) + %r12: 100004c0 100004d0 100004e0 100004f0 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000030 00000034 00000038 0000003c (0) + %r15: 100000c0 100000d0 100000e0 100000f0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 758 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000004 00000008 0000000c (0) + %r12: 10000400 10000410 10000420 10000430 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000000 00000004 00000008 0000000c (0) + %r15: 10000000 10000010 10000020 10000030 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 759 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000010 00000014 00000018 0000001c (0) + %r12: 10000440 10000450 10000460 10000470 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000010 00000014 00000018 0000001c (0) + %r15: 10000044 10000054 10000064 10000074 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 760 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000020 00000024 00000028 0000002c (0) + %r12: 10000480 10000490 100004a0 100004b0 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000020 00000024 00000028 0000002c (0) + %r15: 10000084 10000094 100000a4 100000b4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 761 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000030 00000034 00000038 0000003c (0) + %r12: 100004c0 100004d0 100004e0 100004f0 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000030 00000034 00000038 0000003c (0) + %r15: 100000c4 100000d4 100000e4 100000f4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 762 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000004 00000008 0000000c (0) + %r12: 10000400 10000410 10000420 10000430 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000000 00000004 00000008 0000000c (0) + %r15: 10000004 10000014 10000024 10000034 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 763 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000010 00000014 00000018 0000001c (0) + %r12: 10000440 10000450 10000460 10000470 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000100 00000190 00000240 00000310 (0) + %r15: 10000044 10000054 10000064 10000074 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 764 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000020 00000024 00000028 0000002c (0) + %r12: 10000480 10000490 100004a0 100004b0 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000400 00000510 00000640 00000790 (0) + %r15: 10000084 10000094 100000a4 100000b4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 765 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000030 00000034 00000038 0000003c (0) + %r12: 100004c0 100004d0 100004e0 100004f0 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000900 00000a90 00000c40 00000e10 (0) + %r15: 100000c4 100000d4 100000e4 100000f4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 766 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000004 00000008 0000000c (0) + %r12: 10000400 10000410 10000420 10000430 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000000 00000010 00000040 00000090 (0) + %r15: 10000004 10000014 10000024 10000034 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 767 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000440 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000450 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000460 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000470 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000010 00000014 00000018 0000001c (0) + %r12: 10000440 10000450 10000460 10000470 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000100 00000190 00000240 00000310 (0) + %r15: 10000044 10000054 10000064 10000074 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 768 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000480 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000490 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004a0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004b0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000020 00000024 00000028 0000002c (0) + %r12: 10000480 10000490 100004a0 100004b0 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000400 00000510 00000640 00000790 (0) + %r15: 10000084 10000094 100000a4 100000b4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 769 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 770 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 771 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004c0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004d0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004e0 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004f0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000030 00000034 00000038 0000003c (0) + %r12: 100004c0 100004d0 100004e0 100004f0 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000900 00000a90 00000c40 00000e10 (0) + %r15: 100000c4 100000d4 100000e4 100000f4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 772 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000400 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000410 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000420 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000430 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000004 00000008 0000000c (0) + %r12: 10000400 10000410 10000420 10000430 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000000 00000010 00000040 00000090 (0) + %r15: 10000004 10000014 10000024 10000034 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 773 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000010 00000014 00000018 0000001c (0) + %r12: 10000440 10000450 10000460 10000470 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000100 00000190 00000240 00000310 (0) + %r15: 10000044 10000054 10000064 10000074 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 774 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000020 00000024 00000028 0000002c (0) + %r12: 10000480 10000490 100004a0 100004b0 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000400 00000510 00000640 00000790 (0) + %r15: 10000084 10000094 100000a4 100000b4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 775 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000030 00000034 00000038 0000003c (0) + %r12: 100004c0 100004d0 100004e0 100004f0 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000900 00000a90 00000c40 00000e10 (0) + %r15: 100000c4 100000d4 100000e4 100000f4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 776 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000004 00000008 0000000c (0) + %r12: 10000400 10000410 10000420 10000430 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000000 00000010 00000040 00000090 (0) + %r15: 10000004 10000014 10000024 10000034 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 777 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 778 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 779 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000010 00000014 00000018 0000001c (0) + %r12: 10000440 10000450 10000460 10000470 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 10000244 10000254 10000264 10000274 (0) + %r15: 10000044 10000054 10000064 10000074 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 780 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000020 00000024 00000028 0000002c (0) + %r12: 10000480 10000490 100004a0 100004b0 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 10000284 10000294 100002a4 100002b4 (0) + %r15: 10000084 10000094 100000a4 100000b4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 781 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000030 00000034 00000038 0000003c (0) + %r12: 100004c0 100004d0 100004e0 100004f0 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 100002c4 100002d4 100002e4 100002f4 (0) + %r15: 100000c4 100000d4 100000e4 100000f4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 782 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000000 00000004 00000008 0000000c (0) + %r12: 10000400 10000410 10000420 10000430 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 10000204 10000214 10000224 10000234 (0) + %r15: 10000004 10000014 10000024 10000034 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 783 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000044 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 11 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000054 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 15 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000064 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 19 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000074 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1d +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000011 00000015 00000019 0000001d (0) + %r12: 10000440 10000450 10000460 10000470 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 10000244 10000254 10000264 10000274 (0) + %r15: 10000044 10000054 10000064 10000074 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 784 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000084 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 21 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000094 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 25 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000a4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 29 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000b4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2d +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000021 00000025 00000029 0000002d (0) + %r12: 10000480 10000490 100004a0 100004b0 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 10000284 10000294 100002a4 100002b4 (0) + %r15: 10000084 10000094 100000a4 100000b4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 785 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000c4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 31 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000d4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 35 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000e4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 39 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000f4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3d +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000031 00000035 00000039 0000003d (0) + %r12: 100004c0 100004d0 100004e0 100004f0 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 100002c4 100002d4 100002e4 100002f4 (0) + %r15: 100000c4 100000d4 100000e4 100000f4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 786 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000004 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000014 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 5 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000024 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 9 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000034 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: d +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000001 00000005 00000009 0000000d (0) + %r12: 10000400 10000410 10000420 10000430 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 10000204 10000214 10000224 10000234 (0) + %r15: 10000004 10000014 10000024 10000034 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 787 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 788 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 789 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000244 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 11 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000254 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 15 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000264 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 19 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000274 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1d +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000011 00000015 00000019 0000001d (0) + %r12: 10000440 10000450 10000460 10000470 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000011 00000015 00000019 0000001d (0) + %r15: 10000044 10000054 10000064 10000074 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 790 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 791 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 792 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000284 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 21 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000294 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 25 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002a4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 29 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002b4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2d +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000021 00000025 00000029 0000002d (0) + %r12: 10000480 10000490 100004a0 100004b0 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000021 00000025 00000029 0000002d (0) + %r15: 10000084 10000094 100000a4 100000b4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 793 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 794 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 795 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002c4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 31 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002d4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 35 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002e4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 39 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002f4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3d +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000031 00000035 00000039 0000003d (0) + %r12: 100004c0 100004d0 100004e0 100004f0 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000031 00000035 00000039 0000003d (0) + %r15: 100000c4 100000d4 100000e4 100000f4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 796 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 797 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 798 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000204 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000214 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 5 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000224 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 9 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000234 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: d +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000001 00000005 00000009 0000000d (0) + %r12: 10000400 10000410 10000420 10000430 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000001 00000005 00000009 0000000d (0) + %r15: 10000004 10000014 10000024 10000034 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 799 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 800 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 801 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000011 00000015 00000019 0000001d (0) + %r12: 10000444 10000454 10000464 10000474 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000011 00000015 00000019 0000001d (0) + %r15: 10000044 10000054 10000064 10000074 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 802 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 803 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 804 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000021 00000025 00000029 0000002d (0) + %r12: 10000484 10000494 100004a4 100004b4 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000021 00000025 00000029 0000002d (0) + %r15: 10000084 10000094 100000a4 100000b4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 805 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 806 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 807 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000031 00000035 00000039 0000003d (0) + %r12: 100004c4 100004d4 100004e4 100004f4 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000031 00000035 00000039 0000003d (0) + %r15: 100000c4 100000d4 100000e4 100000f4 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 808 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000001 00000005 00000009 0000000d (0) + %r12: 10000404 10000414 10000424 10000434 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000001 00000005 00000009 0000000d (0) + %r15: 10000004 10000014 10000024 10000034 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 809 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000011 00000015 00000019 0000001d (0) + %r12: 10000444 10000454 10000464 10000474 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000011 00000015 00000019 0000001d (0) + %r15: 10000048 10000058 10000068 10000078 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 810 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000021 00000025 00000029 0000002d (0) + %r12: 10000484 10000494 100004a4 100004b4 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000021 00000025 00000029 0000002d (0) + %r15: 10000088 10000098 100000a8 100000b8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 811 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000031 00000035 00000039 0000003d (0) + %r12: 100004c4 100004d4 100004e4 100004f4 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000031 00000035 00000039 0000003d (0) + %r15: 100000c8 100000d8 100000e8 100000f8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 812 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000001 00000005 00000009 0000000d (0) + %r12: 10000404 10000414 10000424 10000434 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000001 00000005 00000009 0000000d (0) + %r15: 10000008 10000018 10000028 10000038 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 813 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000011 00000015 00000019 0000001d (0) + %r12: 10000444 10000454 10000464 10000474 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000121 000001b9 00000271 00000349 (0) + %r15: 10000048 10000058 10000068 10000078 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 814 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000021 00000025 00000029 0000002d (0) + %r12: 10000484 10000494 100004a4 100004b4 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000441 00000559 00000691 000007e9 (0) + %r15: 10000088 10000098 100000a8 100000b8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 815 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000031 00000035 00000039 0000003d (0) + %r12: 100004c4 100004d4 100004e4 100004f4 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000961 00000af9 00000cb1 00000e89 (0) + %r15: 100000c8 100000d8 100000e8 100000f8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 816 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000001 00000005 00000009 0000000d (0) + %r12: 10000404 10000414 10000424 10000434 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000001 00000019 00000051 000000a9 (0) + %r15: 10000008 10000018 10000028 10000038 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 817 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000444 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000454 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000464 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000474 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000011 00000015 00000019 0000001d (0) + %r12: 10000444 10000454 10000464 10000474 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000121 000001b9 00000271 00000349 (0) + %r15: 10000048 10000058 10000068 10000078 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 818 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000484 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000494 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004a4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004b4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000021 00000025 00000029 0000002d (0) + %r12: 10000484 10000494 100004a4 100004b4 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000441 00000559 00000691 000007e9 (0) + %r15: 10000088 10000098 100000a8 100000b8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 819 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 820 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 821 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004c4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004d4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004e4 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004f4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000031 00000035 00000039 0000003d (0) + %r12: 100004c4 100004d4 100004e4 100004f4 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000961 00000af9 00000cb1 00000e89 (0) + %r15: 100000c8 100000d8 100000e8 100000f8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 822 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000404 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000414 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000424 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000434 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000001 00000005 00000009 0000000d (0) + %r12: 10000404 10000414 10000424 10000434 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000001 00000019 00000051 000000a9 (0) + %r15: 10000008 10000018 10000028 10000038 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 823 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000011 00000015 00000019 0000001d (0) + %r12: 10000444 10000454 10000464 10000474 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000121 000001b9 00000271 00000349 (0) + %r15: 10000048 10000058 10000068 10000078 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 824 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000021 00000025 00000029 0000002d (0) + %r12: 10000484 10000494 100004a4 100004b4 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000441 00000559 00000691 000007e9 (0) + %r15: 10000088 10000098 100000a8 100000b8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 825 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000031 00000035 00000039 0000003d (0) + %r12: 100004c4 100004d4 100004e4 100004f4 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000961 00000af9 00000cb1 00000e89 (0) + %r15: 100000c8 100000d8 100000e8 100000f8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 826 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000001 00000005 00000009 0000000d (0) + %r12: 10000404 10000414 10000424 10000434 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000001 00000019 00000051 000000a9 (0) + %r15: 10000008 10000018 10000028 10000038 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 827 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 828 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 829 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000011 00000015 00000019 0000001d (0) + %r12: 10000444 10000454 10000464 10000474 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 10000248 10000258 10000268 10000278 (0) + %r15: 10000048 10000058 10000068 10000078 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 830 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000021 00000025 00000029 0000002d (0) + %r12: 10000484 10000494 100004a4 100004b4 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 10000288 10000298 100002a8 100002b8 (0) + %r15: 10000088 10000098 100000a8 100000b8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 831 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000031 00000035 00000039 0000003d (0) + %r12: 100004c4 100004d4 100004e4 100004f4 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 100002c8 100002d8 100002e8 100002f8 (0) + %r15: 100000c8 100000d8 100000e8 100000f8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 832 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000001 00000005 00000009 0000000d (0) + %r12: 10000404 10000414 10000424 10000434 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 10000208 10000218 10000228 10000238 (0) + %r15: 10000008 10000018 10000028 10000038 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 833 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000048 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 12 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000058 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 16 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000068 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1a +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000078 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1e +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000012 00000016 0000001a 0000001e (0) + %r12: 10000444 10000454 10000464 10000474 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 10000248 10000258 10000268 10000278 (0) + %r15: 10000048 10000058 10000068 10000078 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 834 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000088 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 22 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000098 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 26 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000a8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2a +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000b8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2e +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000022 00000026 0000002a 0000002e (0) + %r12: 10000484 10000494 100004a4 100004b4 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 10000288 10000298 100002a8 100002b8 (0) + %r15: 10000088 10000098 100000a8 100000b8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 835 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000c8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 32 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000d8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 36 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000e8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3a +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3e +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000032 00000036 0000003a 0000003e (0) + %r12: 100004c4 100004d4 100004e4 100004f4 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 100002c8 100002d8 100002e8 100002f8 (0) + %r15: 100000c8 100000d8 100000e8 100000f8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 836 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000008 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000018 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 6 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000028 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: a +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000038 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: e +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000002 00000006 0000000a 0000000e (0) + %r12: 10000404 10000414 10000424 10000434 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 10000208 10000218 10000228 10000238 (0) + %r15: 10000008 10000018 10000028 10000038 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 837 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 838 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 839 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000248 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 12 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000258 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 16 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000268 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1a +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000278 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1e +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000012 00000016 0000001a 0000001e (0) + %r12: 10000444 10000454 10000464 10000474 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000012 00000016 0000001a 0000001e (0) + %r15: 10000048 10000058 10000068 10000078 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 840 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 841 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 842 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000288 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 22 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000298 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 26 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002a8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2a +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002b8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2e +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000022 00000026 0000002a 0000002e (0) + %r12: 10000484 10000494 100004a4 100004b4 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000022 00000026 0000002a 0000002e (0) + %r15: 10000088 10000098 100000a8 100000b8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 843 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 844 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 845 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002c8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 32 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002d8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 36 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002e8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3a +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3e +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000032 00000036 0000003a 0000003e (0) + %r12: 100004c4 100004d4 100004e4 100004f4 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000032 00000036 0000003a 0000003e (0) + %r15: 100000c8 100000d8 100000e8 100000f8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 846 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 847 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 848 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000208 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000218 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 6 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000228 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: a +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 10000238 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: e +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000002 00000006 0000000a 0000000e (0) + %r12: 10000404 10000414 10000424 10000434 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000002 00000006 0000000a 0000000e (0) + %r15: 10000008 10000018 10000028 10000038 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 849 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 850 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 851 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000012 00000016 0000001a 0000001e (0) + %r12: 10000448 10000458 10000468 10000478 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000012 00000016 0000001a 0000001e (0) + %r15: 10000048 10000058 10000068 10000078 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 852 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 853 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 854 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000022 00000026 0000002a 0000002e (0) + %r12: 10000488 10000498 100004a8 100004b8 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000022 00000026 0000002a 0000002e (0) + %r15: 10000088 10000098 100000a8 100000b8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 855 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 856 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 857 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000032 00000036 0000003a 0000003e (0) + %r12: 100004c8 100004d8 100004e8 100004f8 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000032 00000036 0000003a 0000003e (0) + %r15: 100000c8 100000d8 100000e8 100000f8 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 858 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000002 00000006 0000000a 0000000e (0) + %r12: 10000408 10000418 10000428 10000438 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000002 00000006 0000000a 0000000e (0) + %r15: 10000008 10000018 10000028 10000038 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 859 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000012 00000016 0000001a 0000001e (0) + %r12: 10000448 10000458 10000468 10000478 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000012 00000016 0000001a 0000001e (0) + %r15: 1000004c 1000005c 1000006c 1000007c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 860 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000022 00000026 0000002a 0000002e (0) + %r12: 10000488 10000498 100004a8 100004b8 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000022 00000026 0000002a 0000002e (0) + %r15: 1000008c 1000009c 100000ac 100000bc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 861 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000032 00000036 0000003a 0000003e (0) + %r12: 100004c8 100004d8 100004e8 100004f8 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000032 00000036 0000003a 0000003e (0) + %r15: 100000cc 100000dc 100000ec 100000fc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 862 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000002 00000006 0000000a 0000000e (0) + %r12: 10000408 10000418 10000428 10000438 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000002 00000006 0000000a 0000000e (0) + %r15: 1000000c 1000001c 1000002c 1000003c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 863 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000012 00000016 0000001a 0000001e (0) + %r12: 10000448 10000458 10000468 10000478 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000144 000001e4 000002a4 00000384 (0) + %r15: 1000004c 1000005c 1000006c 1000007c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 864 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000022 00000026 0000002a 0000002e (0) + %r12: 10000488 10000498 100004a8 100004b8 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000484 000005a4 000006e4 00000844 (0) + %r15: 1000008c 1000009c 100000ac 100000bc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 865 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000032 00000036 0000003a 0000003e (0) + %r12: 100004c8 100004d8 100004e8 100004f8 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 000009c4 00000b64 00000d24 00000f04 (0) + %r15: 100000cc 100000dc 100000ec 100000fc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 866 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000002 00000006 0000000a 0000000e (0) + %r12: 10000408 10000418 10000428 10000438 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000004 00000024 00000064 000000c4 (0) + %r15: 1000000c 1000001c 1000002c 1000003c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 867 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000448 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000458 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000468 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000478 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000012 00000016 0000001a 0000001e (0) + %r12: 10000448 10000458 10000468 10000478 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000144 000001e4 000002a4 00000384 (0) + %r15: 1000004c 1000005c 1000006c 1000007c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 868 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000488 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000498 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004a8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004b8 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000022 00000026 0000002a 0000002e (0) + %r12: 10000488 10000498 100004a8 100004b8 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000484 000005a4 000006e4 00000844 (0) + %r15: 1000008c 1000009c 100000ac 100000bc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 869 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 870 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 871 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004c8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004d8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004e8 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004f8 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000032 00000036 0000003a 0000003e (0) + %r12: 100004c8 100004d8 100004e8 100004f8 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 000009c4 00000b64 00000d24 00000f04 (0) + %r15: 100000cc 100000dc 100000ec 100000fc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 872 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000408 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000418 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000428 +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 10000438 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000002 00000006 0000000a 0000000e (0) + %r12: 10000408 10000418 10000428 10000438 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000004 00000024 00000064 000000c4 (0) + %r15: 1000000c 1000001c 1000002c 1000003c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 873 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000012 00000016 0000001a 0000001e (0) + %r12: 10000448 10000458 10000468 10000478 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000144 000001e4 000002a4 00000384 (0) + %r15: 1000004c 1000005c 1000006c 1000007c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 874 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000022 00000026 0000002a 0000002e (0) + %r12: 10000488 10000498 100004a8 100004b8 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000484 000005a4 000006e4 00000844 (0) + %r15: 1000008c 1000009c 100000ac 100000bc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 875 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000032 00000036 0000003a 0000003e (0) + %r12: 100004c8 100004d8 100004e8 100004f8 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 000009c4 00000b64 00000d24 00000f04 (0) + %r15: 100000cc 100000dc 100000ec 100000fc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 876 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a00 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000002 00000006 0000000a 0000000e (0) + %r12: 10000408 10000418 10000428 10000438 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000004 00000024 00000064 000000c4 (0) + %r15: 1000000c 1000001c 1000002c 1000003c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 877 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 878 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 879 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000012 00000016 0000001a 0000001e (0) + %r12: 10000448 10000458 10000468 10000478 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 1000024c 1000025c 1000026c 1000027c (0) + %r15: 1000004c 1000005c 1000006c 1000007c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 880 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000022 00000026 0000002a 0000002e (0) + %r12: 10000488 10000498 100004a8 100004b8 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 1000028c 1000029c 100002ac 100002bc (0) + %r15: 1000008c 1000009c 100000ac 100000bc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 881 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000032 00000036 0000003a 0000003e (0) + %r12: 100004c8 100004d8 100004e8 100004f8 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 100002cc 100002dc 100002ec 100002fc (0) + %r15: 100000cc 100000dc 100000ec 100000fc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 882 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf48733 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r14 <- r9, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000002 00000006 0000000a 0000000e (0) + %r12: 10000408 10000418 10000428 10000438 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 1000020c 1000021c 1000022c 1000023c (0) + %r15: 1000000c 1000001c 1000002c 1000003c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=9, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 883 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000004c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 13 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000005c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 17 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000006c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1b +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000007c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1f +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 10000448 10000458 10000468 10000478 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 1000024c 1000025c 1000026c 1000027c (0) + %r15: 1000004c 1000005c 1000006c 1000007c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 884 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000008c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 23 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000009c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 27 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000ac +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2b +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000bc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2f +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 10000488 10000498 100004a8 100004b8 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 1000028c 1000029c 100002ac 100002bc (0) + %r15: 1000008c 1000009c 100000ac 100000bc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 885 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000cc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 33 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000dc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 37 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000ec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3b +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100000fc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3f +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004c8 100004d8 100004e8 100004f8 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 100002cc 100002dc 100002ec 100002fc (0) + %r15: 100000cc 100000dc 100000ec 100000fc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 886 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7a583 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000000c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000001c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000002c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: b +DEBUG ../../../../simX/instruction.cpp:560: LDI: r11 <- r15, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000003c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: f +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 10000408 10000418 10000428 10000438 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 1000020c 1000021c 1000022c 1000023c (0) + %r15: 1000000c 1000001c 1000002c 1000003c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 887 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 888 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 889 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000024c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 13 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000025c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 17 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000026c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1b +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000027c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1f +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 10000448 10000458 10000468 10000478 (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000013 00000017 0000001b 0000001f (0) + %r15: 1000004c 1000005c 1000006c 1000007c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 890 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 891 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 892 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000028c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 23 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000029c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 27 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002ac +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2b +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002bc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 2f +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 10000488 10000498 100004a8 100004b8 (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000023 00000027 0000002b 0000002f (0) + %r15: 1000008c 1000009c 100000ac 100000bc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 893 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 894 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 895 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002cc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 33 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002dc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 37 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002ec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3b +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 100002fc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3f +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004c8 100004d8 100004e8 100004f8 (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000033 00000037 0000003b 0000003f (0) + %r15: 100000cc 100000dc 100000ec 100000fc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 896 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 897 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 898 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x72703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000020c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 3 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000021c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 7 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000022c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: b +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r14, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 1000023c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: f +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 10000408 10000418 10000428 10000438 (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000003 00000007 0000000b 0000000f (0) + %r15: 1000000c 1000001c 1000002c 1000003c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 899 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 900 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 901 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000013 00000017 0000001b 0000001f (0) + %r15: 1000004c 1000005c 1000006c 1000007c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 902 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 903 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 904 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000023 00000027 0000002b 0000002f (0) + %r15: 1000008c 1000009c 100000ac 100000bc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 905 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 906 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 907 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000033 00000037 0000003b 0000003f (0) + %r15: 100000cc 100000dc 100000ec 100000fc (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 908 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf90633 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r12 <- r18, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000003 00000007 0000000b 0000000f (0) + %r15: 1000000c 1000001c 1000002c 1000003c (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=12, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 909 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000013 00000017 0000001b 0000001f (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 910 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 00000023 00000027 0000002b 0000002f (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 911 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000033 00000037 0000003b 0000003f (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 912 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000003 00000007 0000000b 0000000f (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 913 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 914 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 915 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 916 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2b70733 into: r_type +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/instruction.cpp:392: MUL: r14 <- r14, r11 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=14, trs2=11 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 917 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 1000044c +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 1000045c +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 1000046c +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 1000047c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 918 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 1000048c +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 1000049c +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004ac +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004bc +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 919 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 920 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 921 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004cc +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004dc +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004ec +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 100004fc +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 922 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe62023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 1000040c +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 1000041c +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 1000042c +DEBUG ../../../../simX/instruction.cpp:676: SD: r14 <- r12, imm=0 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 1000043c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=12, trs2=14 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 923 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 924 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 925 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 926 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfef692e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/instruction.cpp:703: BNE: r13, r15, imm=-28 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800009d0 800009d0 800009d0 800009d0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 927 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 928 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 929 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a20 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1c12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffefec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffec00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe804 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe408 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000004 00000005 00000006 00000007 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 930 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a20 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1c12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffefec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffec00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe804 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe408 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000008 00000009 0000000a 0000000b (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 931 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a20 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1c12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffefec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffec00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe804 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe408 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 8000080c +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 0000000c 0000000d 0000000e 0000000f (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 932 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a20 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1c12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 800008c0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffec00 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 800008c0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe804 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 800008c0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe408 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 800008c0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000001 00000002 00000003 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 933 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 934 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 935 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 936 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 937 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 938 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 939 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 940 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 941 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 942 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 943 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 944 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a24 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1812403 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffefe8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffebfc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe800 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe404 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -223379,91 +34798,821 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 6 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3863 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffefe0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffebf4, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffebfc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffe7f8, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffe800 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffe3fc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffe404 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 945 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 946 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 947 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 948 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 949 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 950 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 951 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 952 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 953 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 954 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 955 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 956 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a24 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1812403 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffefe8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffebfc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe800 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe404 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffefe0 6bffebf4 6bffe7f8 6bffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 957 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 958 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 959 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 960 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 961 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 962 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 963 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 964 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 965 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 966 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 967 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 968 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a24 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1812403 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffefe8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffebfc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe800 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe404 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 969 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 970 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 971 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 972 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 973 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 974 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a24 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1812403 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefe8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffebfc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe800 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe404 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000200 00000200 00000200 00000200 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 975 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 976 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 977 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 978 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 979 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 980 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 981 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 982 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 983 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 984 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 985 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a24 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 986 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a28 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1412483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffefe4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffebf8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe7fc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe400 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -223475,87 +35624,223 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3864 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffefe0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffebf4, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffebfc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffe7f8, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffe800 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffe3fc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffe404 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 987 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 988 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 989 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 990 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 991 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 992 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 993 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 994 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 995 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 996 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 997 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 998 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a28 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1412483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffefe4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffebf8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe7fc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe400 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 67ffefe0 67ffebf4 67ffe7f8 67ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) %r22: 00000000 00000000 00000000 00000000 (0) %r23: 00000000 00000000 00000000 00000000 (0) @@ -223567,82 +35852,2138 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3865 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffefe0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffebf4, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffebfc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffe7f8, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffe800 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffe3fc, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffe404 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 999 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1000 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1001 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a28 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1412483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffefe4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffebf8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe7fc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe400 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffefe0 63ffebf4 63ffe7f8 63ffe3fc (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1002 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1003 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1004 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1005 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1006 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1007 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1008 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1009 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1010 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1011 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1012 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1013 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a28 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1412483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefe4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffebf8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe7fc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe400 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000400 00000400 00000400 00000400 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1014 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1015 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1016 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1017 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1018 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1019 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1020 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1021 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1022 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1023 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1024 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a28 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1025 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a2c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1012903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffefe0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffebf4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe7f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe3fc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1026 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1027 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1028 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1029 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1030 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1031 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1032 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1033 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1034 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1035 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1036 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1037 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a2c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1012903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffefe0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffebf4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe7f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe3fc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1038 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1039 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1040 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1041 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1042 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1043 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1044 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1045 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1046 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1047 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1048 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1049 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a2c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1012903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffefe0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffebf4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe7f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe3fc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1050 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1051 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1052 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a2c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1012903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefe0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffebf4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe7f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe3fc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 7fffff00 7fffff00 7fffff00 7fffff00 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1053 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1054 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1055 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1056 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1057 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1058 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1059 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1060 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1061 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1062 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1063 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a2c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1064 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a30 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12983 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffefdc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffebf0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe7f4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe3f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1065 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1066 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1067 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1068 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1069 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1070 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1071 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1072 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1073 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1074 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1075 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1076 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a30 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12983 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffefdc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffebf0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe7f4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe3f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1077 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1078 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1079 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1080 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1081 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1082 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1083 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1084 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1085 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1086 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1087 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1088 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a30 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12983 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffefdc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffebf0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe7f4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe3f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1089 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1090 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1091 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1092 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1093 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1094 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a30 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12983 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefdc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffebf0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe7f4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe3f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 10000000 10000000 10000000 10000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1095 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1096 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1097 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1098 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1099 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1100 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1101 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1102 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1103 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1104 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1105 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a30 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1106 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a34 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812a03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffefd8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffebec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe7f0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe3f4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 6bffefd0 6bffebe4 6bffe7e8 6bffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -223659,212 +38000,220 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3866 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3867 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3868 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3869 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3870 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 9 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3871 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1107 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1108 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1109 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1110 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1111 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1112 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1113 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1114 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1115 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1116 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1117 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1118 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a34 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812a03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffefd8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffebec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe7f0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe3f4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 67ffefd0 67ffebe4 67ffe7e8 67ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -223875,382 +38224,580 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3872 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3873 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3874 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3875 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3876 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3877 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3878 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3879 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3880 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3881 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3882 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3883 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1119 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1120 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1121 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1122 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1123 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1124 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1125 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1126 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1127 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1128 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1129 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1130 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a34 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812a03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffefd8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffebec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe7f0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe3f4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) + %r 2: 63ffefd0 63ffebe4 63ffe7e8 63ffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1131 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1132 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1133 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1134 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1135 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1136 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a34 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812a03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefd8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffebec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe7f0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe3f4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffefd0 6fffebe4 6fffe7e8 6fffe3ec (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1137 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1138 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1139 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1140 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1141 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1142 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1143 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1144 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1145 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1146 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1147 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a34 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1148 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a38 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -224267,294 +38814,210 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3884 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3885 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3886 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3887 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3888 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3889 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3890 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3891 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3892 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1149 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1150 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1151 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1152 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1153 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1154 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1155 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1156 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1157 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1158 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1159 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1160 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a38 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -224571,70 +39034,210 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3893 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1161 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1162 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1163 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1164 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1165 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1166 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1167 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1168 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1169 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1170 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1171 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1172 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a38 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -224651,77 +39254,47 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3894 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ac1ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xac1ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000798 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1173 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a38 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=32 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -224732,79 +39305,50 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3895 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ac1ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xac1ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000798 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a38 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1174 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a3c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 8000080c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -224821,75 +39365,46 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3896 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ac1ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xac1ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000798 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a3c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1175 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a3c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 8000080c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -224906,75 +39421,46 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3897 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cd8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ac1ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xac1ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cd8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000798 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a3c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1176 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a3c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 8000080c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) + %r 1: 8000080c 8000080c 8000080c 8000080c (0) %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -224991,140 +39477,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cd8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3898 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3899 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3900 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000798 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 306b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x306b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000798: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1041: Uni branch at join -NEW DOMESTACK: -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a3c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1177 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a3c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800008c0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c0 800008c0 800008c0 800008c0 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -225135,81 +39529,83 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000798 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 0 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3901 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000798 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 306b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x306b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000798: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1041: Uni branch at join -NEW DOMESTACK: -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a3c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1178 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1179 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1180 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000080c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf3dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000748 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) + %r 1: 80000810 80000810 80000810 80000810 (0) %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -225226,76 +39622,47 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000798 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 0 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3902 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000798 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 306b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x306b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000798: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1041: Uni branch at join -NEW DOMESTACK: -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000080c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1181 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000080c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf3dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000748 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) + %r 1: 80000810 80000810 80000810 80000810 (0) %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -225312,76 +39679,46 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000798 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 0 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3903 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000798 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 306b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x306b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000798: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1041: Uni branch at join -NEW DOMESTACK: -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:1036: JOIN -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000080c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1182 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000080c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf3dff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-196 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000748 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) + %r 1: 80000810 80000810 80000810 80000810 (0) %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -225398,160 +39735,46 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000798 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 0 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3904 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000079c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000079c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000b24, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000b24, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000b24, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000b24, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000b24 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000080c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1183 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008c0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe89ff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-376 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-376 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-376 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-376 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000748 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b24 80000b24 80000b24 80000b24 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c4 800008c4 800008c4 800008c4 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000079c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3905 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000079c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000079c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000998 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r10: 00000000 00000001 00000002 00000003 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -225568,864 +39791,97 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000079c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3906 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000079c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000079c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000998 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1184 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1185 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1186 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008c0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1187 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1188 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000748 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2102573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=2 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) + %r 1: 80000810 80000810 80000810 80000810 (0) %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000079c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3907 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000079c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000079c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000998, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000998 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000998 80000998 80000998 80000998 (0) - %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000079c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3908 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3909 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3910 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c7dff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc7dff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b24: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b28 80000b28 80000b28 80000b28 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3911 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000998 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e09ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe09ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000998: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) - %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000998 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3912 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000998 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e09ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe09ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000998: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) - %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000998 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3913 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000998 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e09ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe09ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000998: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800007a0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) - %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000400 00000400 00000400 00000400 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000998 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3914 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3915 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3916 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2102573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2102573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a0: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b28 80000b28 80000b28 80000b28 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3917 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2102573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2102573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a0: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) - %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3918 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2102573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2102573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a0: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 2 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) - %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -226433,11 +39889,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000002 00000002 00000002 00000002 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -226454,62 +39910,37 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3919 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2102573 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2102573 into: SYS - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a0: SYS -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:855: CSR Reading wid 21 and returning 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000748 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1189 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000748 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2102573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=3 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=3 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) + %r 1: 80000810 80000810 80000810 80000810 (0) %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -226517,11 +39948,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000003 00000003 00000003 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -226538,148 +39969,37 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3920 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000b28, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000b28, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000b28, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000b28, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000b28 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000748 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1190 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000748 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2102573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=1 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b28 80000b28 80000b28 80000b28 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3921 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000099c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) + %r 1: 80000810 80000810 80000810 80000810 (0) %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -226687,11 +40007,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -226708,63 +40028,34 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3922 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000099c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000748 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1191 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000074c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000810 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) + %r 1: 80000810 80000810 80000810 80000810 (0) %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -226772,11 +40063,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000002 00000002 00000002 00000002 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -226793,63 +40084,34 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3923 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800007a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800007a4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000099c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000099c -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000074c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1192 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000074c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000810 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) + %r 1: 80000810 80000810 80000810 80000810 (0) %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -226857,11 +40119,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000003 00000003 00000003 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -226878,143 +40140,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800007a4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3924 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3925 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3926 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2050063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2050063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b28: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000b48 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000074c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1193 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000748 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2102573 into: SYS +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=0 +DEBUG ../../../../simX/instruction.cpp:781: SYS_INST: r10 <- r0, imm=33 +DEBUG ../../../../simX/instruction.cpp:792: vx_warpID: r10=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b28 80000b28 80000b28 80000b28 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 800008c4 800008c4 800008c4 800008c4 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -227025,70 +40195,38 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3927 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000099c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000099c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000748 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1194 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000074c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000810 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) + %r 1: 80000810 80000810 80000810 80000810 (0) %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -227096,11 +40234,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -227117,66 +40255,112 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000099c -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3928 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000099c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000099c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000074c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1195 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000074c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800008c4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) + %r 1: 800008c4 800008c4 800008c4 800008c4 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000000 00000000 00000000 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000074c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1196 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 1 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1197 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000810 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffeffc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffec10 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe814 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 67ffe418 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -227184,11 +40368,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000002 00000002 00000002 00000002 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -227205,66 +40389,41 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000099c -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3929 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000099c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000099c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000810 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=9 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1198 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000810 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffeffc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffec10 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe814 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 63ffe418 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 8000099c 8000099c 8000099c 8000099c (0) + %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -227272,11 +40431,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000003 00000003 00000003 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -227293,146 +40452,285 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000099c -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3930 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3931 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3932 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b48: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefc8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffec04, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffec0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe808, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe810 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe40c, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe414 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000810 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1199 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000814 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x153513 into: i_type +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 80000b28 80000b28 80000b28 80000b28 (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000000 00000000 00000000 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1200 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000814 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x153513 into: i_type +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000000 00000000 00000000 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1201 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1202 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1203 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1204 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1205 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1206 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1207 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1208 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1209 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008c4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812403 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffeff8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffec0c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe810 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe414 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 800008c4 800008c4 800008c4 800008c4 (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -227443,158 +40741,45 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3933 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3934 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3935 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3936 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffeff0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffeffc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffec04, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffec10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffe808, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffe814 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6bffe40c, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6bffe418 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008c4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=6 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1210 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000810 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffeffc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffec10 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe814 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6bffe418 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -227602,11 +40787,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -227623,1979 +40808,33 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3937 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffeff0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffeffc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffec04, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffec10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffe808, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffe814 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=67ffe40c, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 67ffe418 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000002 00000002 00000002 00000002 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3938 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffeff0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffeffc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffec04, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffec10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffe808, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffe814 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=63ffe40c, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 63ffe418 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000003 00000003 00000003 00000003 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3939 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3940 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3941 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3942 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3943 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3944 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3945 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3946 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3947 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3948 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3949 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 12 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3950 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b4c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefcc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800000a0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffec04, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffec10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe808, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe814 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe40c, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe418 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 800000a0 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3951 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3952 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3953 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3954 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3955 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3956 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3957 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3958 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3959 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3960 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3961 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3962 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3963 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3964 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3965 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3966 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3967 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3968 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3969 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3970 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3971 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3972 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3973 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3974 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 67ffeff0 67ffec04 67ffe808 67ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3975 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3976 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3977 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3978 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3979 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3980 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3981 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3982 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3983 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3984 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3985 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3986 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 63ffeff0 63ffec04 63ffe808 63ffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a4 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3987 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b50: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefc4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffec04, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffec08 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe808, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe80c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe40c, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe410 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 800000a0 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 9: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3988 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009a8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 6bfff000 6bffec14 6bffe818 6bffe41c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) - %r 9: 00000000 00000000 00000000 00000000 (0) - %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) - %r16: 00000000 00000000 00000000 00000000 (0) - %r17: 00000000 00000000 00000000 00000000 (0) - %r18: 00000000 00000000 00000000 00000000 (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000000 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a8 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3989 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009a8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000810 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=12 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1211 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000818 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) %r 2: 67fff000 67ffec14 67ffe818 67ffe41c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -229603,11 +40842,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -229624,87 +40863,168 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3990 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a8 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3991 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009a8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1212 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1213 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1214 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1215 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1216 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1217 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1218 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1219 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1220 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1221 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000818 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) %r 2: 63fff000 63ffec14 63ffe818 63ffe41c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -229712,11 +41032,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -229733,167 +41053,128 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009a8 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3992 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b54: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefc0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffec04, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffec04 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe808, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe808 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffe40c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffe40c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ddccbbaa -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1222 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1223 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1224 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1225 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1226 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1227 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008c8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffeffc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000044 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffec10 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe814 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe418 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 800000a0 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 80000044 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 9: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3993 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: dd5ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xdd5ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009ac: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000780 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 6bfff000 6bffec14 6bffe818 6bffe41c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 00000000 00000000 00000000 00000000 (0) - %r 6: 00000000 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -229910,63 +41191,89 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009ac -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3994 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: dd5ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xdd5ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009ac: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000780 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008c8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1228 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000814 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x153513 into: i_type +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 6bffeff0 6bffec04 6bffe808 6bffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000000 00000000 00000000 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000814 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1229 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000081c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf0dff06f into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000728 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) %r 2: 67fff000 67ffec14 67ffe818 67ffe41c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -229974,11 +41281,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000023 00000027 0000002b 0000002f (0) + %r12: 1000048c 1000049c 100004ac 100004bc (0) + %r13: 10000090 100000a0 100000b0 100000c0 (0) + %r14: 000004c9 000005f1 00000739 000008a1 (0) + %r15: 10000090 100000a0 100000b0 100000c0 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -229995,63 +41302,169 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009ac -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3995 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800009ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: dd5ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xdd5ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800009ac: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000780 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1230 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1231 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1232 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1233 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1234 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1235 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1236 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1237 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1238 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1239 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000081c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf0dff06f into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000728 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) %r 2: 63fff000 63ffec14 63ffe818 63ffe41c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) %r 5: 00000000 00000000 00000000 00000000 (0) %r 6: 00000000 00000000 00000000 00000000 (0) @@ -230059,11 +41472,11 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r 8: 00000000 00000000 00000000 00000000 (0) %r 9: 00000000 00000000 00000000 00000000 (0) %r10: 00000000 00000000 00000000 00000000 (0) - %r11: 00000000 00000400 00000800 00000c00 (0) - %r12: 00000000 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r15: bb997754 bb997754 bb997754 bb997754 (0) + %r11: 00000033 00000037 0000003b 0000003f (0) + %r12: 100004cc 100004dc 100004ec 100004fc (0) + %r13: 100000d0 100000e0 100000f0 10000100 (0) + %r14: 00000a29 00000bd1 00000d99 00000f81 (0) + %r15: 100000d0 100000e0 100000f0 10000100 (0) %r16: 00000000 00000000 00000000 00000000 (0) %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 00000000 00000000 00000000 (0) @@ -230080,72 +41493,174 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800009ac -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3996 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1240 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008cc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x412483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffeff4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffec08 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe80c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe410 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 800000a0 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 6fffefc0 6fffec04 6fffe808 6fffe40c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 80000044 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) %r 9: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000000 00000000 00000000 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008cc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1241 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000818 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 6bfff000 6bffec14 6bffe818 6bffe41c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000000 00000000 00000000 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000818 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1242 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008d0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x12903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffeff0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffec04 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe808 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=0 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffe40c +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: ddccbbaa +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 80000044 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r 9: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r10: 00000000 00000000 00000000 00000000 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) %r18: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) @@ -230156,77 +41671,69 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3997 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008d0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1243 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 1 1 +DEBUG ../../../../simX/core.cpp:645: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008d0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1244 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000081c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf0dff06f into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-244 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000728 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 800000a0 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 6fffefd0 6fffec14 6fffe818 6fffe41c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) + %r 1: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 6bfff000 6bffec14 6bffe818 6bffe41c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) + %r 5: 00000000 00000000 00000000 00000000 (0) + %r 6: 00000000 00000000 00000000 00000000 (0) %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 9: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r 8: 00000000 00000000 00000000 00000000 (0) + %r 9: 00000000 00000000 00000000 00000000 (0) + %r10: 00000000 00000000 00000000 00000000 (0) + %r11: 00000013 00000017 0000001b 0000001f (0) + %r12: 1000044c 1000045c 1000046c 1000047c (0) + %r13: 10000050 10000060 10000070 10000080 (0) + %r14: 00000169 00000211 000002d9 000003c1 (0) + %r15: 10000050 10000060 10000070 10000080 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 00000000 00000000 00000000 (0) %r19: 00000000 00000000 00000000 00000000 (0) %r20: 00000000 00000000 00000000 00000000 (0) %r21: 00000000 00000000 00000000 00000000 (0) @@ -230236,144 +41743,30 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 00000000 00000000 00000000 (0) %r26: 00000000 00000000 00000000 00000000 (0) %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) %r29: 00000000 00000000 00000000 00000000 (0) %r30: 00000000 00000000 00000000 00000000 (0) %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3998 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000b60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c21ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc21ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000b60: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000780 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 00000000 00000000 00000000 (0) - %r 1: 800000a0 ddccbbaa ddccbbaa ddccbbaa (0) - %r 2: 6fffefd0 6fffec14 6fffe818 6fffe41c (0) - %r 3: 80016808 80016808 80016808 80016808 (0) - %r 4: 00000000 00000000 00000000 00000000 (0) - %r 5: 80000e64 00000000 00000000 00000000 (0) - %r 6: 00000005 00000000 00000000 00000000 (0) - %r 7: 00000000 00000000 00000000 00000000 (0) - %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r 9: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r10: 00000001 00000001 00000001 00000001 (0) - %r11: 8000097c 00000400 00000800 00000c00 (0) - %r12: 80000c2c 00000004 00000008 0000000c (0) - %r13: ddccbbaa ddccbbaa ddccbbaa ddccbbaa (0) - %r14: ddccbbaa 00000409 6e72656b 65206c65 (0) - %r15: bb997754 ddccbfb3 4c3f2115 42ed280f (0) - %r16: 10010000 00000000 00000000 00000000 (0) - %r17: 10000000 00000000 00000000 00000000 (0) - %r18: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) - %r19: 00000000 00000000 00000000 00000000 (0) - %r20: 00000000 00000000 00000000 00000000 (0) - %r21: 00000000 00000000 00000000 00000000 (0) - %r22: 00000000 00000000 00000000 00000000 (0) - %r23: 00000000 00000000 00000000 00000000 (0) - %r24: 00000000 00000000 00000000 00000000 (0) - %r25: 00000000 00000000 00000000 00000000 (0) - %r26: 00000000 00000000 00000000 00000000 (0) - %r27: 00000000 00000000 00000000 00000000 (0) - %r28: 00000003 00000000 00000000 00000000 (0) - %r29: 00000000 00000000 00000000 00000000 (0) - %r30: 00000000 00000000 00000000 00000000 (0) - %r31: 00000000 00000000 00000000 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 1 1 1 - - -DEBUG ../../../simX/core.cpp:421: Now 4 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000b60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 3999 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 1[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000780: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000081c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1245 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000728 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0:(0) %r 1:(0) %r 2:(0) @@ -230406,55 +41799,27 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29:(0) %r30:(0) %r31:(0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 0 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 0 active threads in 1 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4000 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 2[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000780: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #2 active threads changed from 4 to 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000728 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1246 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000728 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0:(0) %r 1:(0) %r 2:(0) @@ -230487,55 +41852,193 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29:(0) %r30:(0) %r31:(0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 0 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 0 active threads in 2 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4001 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 3[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000780: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #3 active threads changed from 4 to 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000728 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1247 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008d4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x153513 into: i_type +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/instruction.cpp:601: SLTIU: r10 <- r10, imm=1 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 80000044 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 6fffeff0 6fffec04 6fffe808 6fffe40c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r 9: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r10: 00000001 00000001 00000001 00000001 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008d4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1248 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008d8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 80000044 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 6ffff000 6fffec14 6fffe818 6fffe41c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r 9: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r10: 00000001 00000001 00000001 00000001 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008d8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1249 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800008dc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xe4dff06f into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-436 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-436 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-436 +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-436 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000728 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 00000000 00000000 00000000 (0) + %r 1: 80000044 ddccbbaa ddccbbaa ddccbbaa (0) + %r 2: 6ffff000 6fffec14 6fffe818 6fffe41c (0) + %r 3: 80016ba8 80016ba8 80016ba8 80016ba8 (0) + %r 4: 00000000 00000000 00000000 00000000 (0) + %r 5: 80000bc8 00000000 00000000 00000000 (0) + %r 6: 0000000f 00000000 00000000 00000000 (0) + %r 7: 00000000 00000000 00000000 00000000 (0) + %r 8: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r 9: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r10: 00000001 00000001 00000001 00000001 (0) + %r11: 00000003 00000007 0000000b 0000000f (0) + %r12: 1000040c 1000041c 1000042c 1000043c (0) + %r13: 10000010 10000020 10000030 10000040 (0) + %r14: 00000009 00000031 00000079 000000e1 (0) + %r15: 10000010 10000020 10000030 10000040 (0) + %r16: 00000000 00000000 00000000 00000000 (0) + %r17: 00000000 00000000 00000000 00000000 (0) + %r18: 00000000 ddccbbaa ddccbbaa ddccbbaa (0) + %r19: 00000000 00000000 00000000 00000000 (0) + %r20: 00000000 00000000 00000000 00000000 (0) + %r21: 00000000 00000000 00000000 00000000 (0) + %r22: 00000000 00000000 00000000 00000000 (0) + %r23: 00000000 00000000 00000000 00000000 (0) + %r24: 00000000 00000000 00000000 00000000 (0) + %r25: 00000000 00000000 00000000 00000000 (0) + %r26: 00000000 00000000 00000000 00000000 (0) + %r27: 00000000 00000000 00000000 00000000 (0) + %r28: 00000000 00000000 00000000 00000000 (0) + %r29: 00000000 00000000 00000000 00000000 (0) + %r30: 00000000 00000000 00000000 00000000 (0) + %r31: 00000000 00000000 00000000 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800008dc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1250 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 1 1 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000728 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0:(0) %r 1:(0) %r 2:(0) @@ -230568,78360 +42071,104 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29:(0) %r30:(0) %r31:(0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 0 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 0 active threads in 3 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4002 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4003 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 1, 1, 1, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4004 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 1 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[4] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000780: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4005 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 1 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4006 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 1 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4007 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4008 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4009 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4010 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000784 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000784: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=800000a0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800000a0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000784 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4011 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4012 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4013 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4014 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4015 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4016 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80015537 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80015537 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000a0: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80015000 (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4017 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a1c50513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa1c50513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000a0 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4018 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68d000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68d000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000a8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000f34 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4019 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4020 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4021 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4022 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4023 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4024 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4025 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d81a303 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d81a303 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f34: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=472 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169e0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4026 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4027 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4028 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4029 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fc010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfc010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f38: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4030 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c12423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c12423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, rc=80000c2c, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4031 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2d12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2d12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, rd=ddccbbaa, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4032 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2b12223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2b12223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, rb=8000097c, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4033 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4034 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2e12823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2e12823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f48: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, re=ddccbbaa, imm=48 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefc0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4035 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f12a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f12a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f4c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, rf=bb997754, imm=52 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefc4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4036 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3012c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3012c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f50: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r10=10010000, imm=56 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefc8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4037 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f54: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r11=10000000, imm=60 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefcc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 8000097c (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 17 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4038 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 832583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x832583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f58: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r6=80016010, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016018 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 80016364 (0) - %r12: 80000c2c (0) - %r13: ddccbbaa (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 6 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4039 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2410693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2410693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 80016364 (0) - %r12: 80000c2c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4040 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f60: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80014a1c (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4041 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f64: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 6 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4042 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f68: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r1=800000ac, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4043 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f6c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, rd=6fffefb4, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4044 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f70: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000f80 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4045 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:663: $$$$$$$$$$$$$$$$$$$$ Stalling LSU because EXE is being used -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4046 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4047 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4048 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4049 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4050 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4051 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4052 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4053 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4054 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4055 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f84: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r1=80000f74, imm=492 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4056 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1f212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1f212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f88: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r12=0, imm=480 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef80 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4057 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f8c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r18=0, imm=456 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef68 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4058 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4059 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1da12023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1da12023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f90: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r1a=0, imm=448 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef60 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 26 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4060 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58c13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58c13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4061 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f98: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4062 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d12a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd12a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f9c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rd=6fffefb4, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedb4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4063 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fa0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fa0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r8=0, imm=488 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fa0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4064 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fa4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fa4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r9=0, imm=484 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef84 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fa4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4065 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fa8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d312e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d312e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fa8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r13=0, imm=476 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef7c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fa8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4066 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d412c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d412c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fac: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r14=0, imm=472 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef78 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4067 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fb0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d512a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d512a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fb0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r15=0, imm=468 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef74 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fb0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4068 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fb4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d612823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d612823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fb4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r16=0, imm=464 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef70 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4069 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fb8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d712623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d712623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fb8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r17=0, imm=460 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef6c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fb8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4070 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fbc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fbc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r19=0, imm=452 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef64 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 25 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4071 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fc0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1bb12e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1bb12e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fc0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r1b=0, imm=444 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef5c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 27 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4072 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fc4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50d13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50d13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fc4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fc4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 26 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4073 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 570060ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x570060ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fc8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007538 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4074 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4075 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4076 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4077 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4078 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4079 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007538 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12818513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12818513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007538: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016930 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007538 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4080 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007538 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4081 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007538 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4082 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007538 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4083 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000753c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000753c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000fcc, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000fcc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016930 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: bb997754 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000753c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4084 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4085 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4086 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4087 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4088 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4089 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fcc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 52783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x52783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fcc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80016930, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016930 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8001536c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016930 (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: 8001536c (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fcc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4090 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fd0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fd0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: 8001536c (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fd0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4091 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fd4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f12823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f12823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fd4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rf=8001536c, imm=48 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedd0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fcc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: 8001536c (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4092 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fd8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 514080ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x514080ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fd8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800094ec -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: 8001536c (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4093 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4094 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4095 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4096 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4097 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4098 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4099 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800094ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 357793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x357793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800094ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: ddccbbaa (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4100 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4101 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4102 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4103 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800094f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800094f0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4104 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800094f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4079c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4079c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800094f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 6fffefb4 (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4105 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4106 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4107 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4108 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4109 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4110 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800094f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7f7f86b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7f7f86b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800094f8: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 7f7f8000 (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4111 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800094fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f7f68693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf7f68693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800094fc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: 80016364 (0) - %r12: 80014a1c (0) - %r13: 7f7f7f7f (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800094fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4112 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009500 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009500: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 80014a1c (0) - %r13: 7f7f7f7f (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4113 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4114 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4115 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4116 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009504 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 72603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x72603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009504: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=8001536c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001536c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 8001536c (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009504 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4117 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009508 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 470713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x470713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009508: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009508 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4118 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000950c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d677b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd677b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000950c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 0000002e (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000950c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4119 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009510 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009510: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 7f7f7fad (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009510 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4120 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009514 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c7e7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc7e7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009514: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 7f7f7faf (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009514 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4121 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009518 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d7e7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd7e7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009518: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 7f7f7fff (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009518 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4122 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009518 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4123 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000951c -DEBUG ../../../simX/enc.cpp:105: Curr Code: feb784e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfeb784e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000951c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 7f7f7f7f (0) - %r14: 80015370 (0) - %r15: 7f7f7fff (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000951c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4124 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000951c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4125 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4126 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4127 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4128 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4129 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4130 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4131 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4132 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009520 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc74683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc74683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009520: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80015370, imm=4294967292 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001536c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 0000002e (0) - %r13: 0000002e (0) - %r14: 80015370 (0) - %r15: 7f7f7fff (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009520 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4133 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009524 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffd74603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffd74603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009524: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80015370, imm=4294967293 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001536c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 80015370 (0) - %r15: 7f7f7fff (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009524 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4134 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009528 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffe74783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffe74783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009528: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=80015370, imm=4294967294 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001536c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 80015370 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009528 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4135 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000952c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40a70733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40a70733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000952c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000952c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4136 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009530 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4068063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4068063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009530: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009530 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4137 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4138 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4139 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4140 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4141 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4142 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009534 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2060a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2060a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009534: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80009568 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 8001536c (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009534 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 12 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4143 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4144 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4145 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4146 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4147 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4148 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009568 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffd70513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffd70513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009568: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4149 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4150 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4151 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4152 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000956c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000956c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000fdc, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000fdc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000956c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4153 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4154 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4155 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4156 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4157 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4158 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fdc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2a12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2a12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fdc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, ra=1, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedcc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4159 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fe0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fe0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=240 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee90 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fe0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4160 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fe4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fe4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=244 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee94 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fe4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4161 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fe8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fe8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=248 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee98 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fe8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4162 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000fec -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000fec: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=252 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000fec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4163 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ff0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d0663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd0663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ff0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000004 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ff0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 26 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4164 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4165 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4166 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4167 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4168 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4169 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ff4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 38d2703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x38d2703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ff4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r26=80016010, imm=56 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016048 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ff4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 26 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4170 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ff8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a0708e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa0708e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ff8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000002e (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ff8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4171 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4172 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4173 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4174 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4175 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4176 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4177 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000ffc -DEBUG ../../../simX/enc.cpp:105: Curr Code: cc1683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcc1683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000ffc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r24=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00002889 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000ffc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4178 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001000 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1069713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1069713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001000: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00002889 (0) - %r14: 28890000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4179 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4180 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4181 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4182 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001004 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1269793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1269793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001004: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00002889 (0) - %r14: 28890000 (0) - %r15: a2240000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001004 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4183 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001008 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1075713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1075713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001008: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00002889 (0) - %r14: 00002889 (0) - %r15: a2240000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001008 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4184 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000100c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 207ca63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x207ca63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000100c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80001040 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00002889 (0) - %r14: 00002889 (0) - %r15: a2240000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000100c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4185 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4186 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4187 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4188 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4189 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4190 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001040 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 877693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x877693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001040: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000008 (0) - %r14: 00002889 (0) - %r15: a2240000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4191 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4192 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4193 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4194 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001044 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2e068863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2e068863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001044: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000008 (0) - %r14: 00002889 (0) - %r15: a2240000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001044 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4195 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4196 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4197 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4198 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4199 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4200 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4201 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001048 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10c2683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10c2683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001048: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r24=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: a2240000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001048 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4202 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000104c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2e068463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2e068463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000104c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 10000008 (0) - %r14: 00002889 (0) - %r15: a2240000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000104c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4203 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4204 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4205 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4206 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4207 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4208 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4209 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001050 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a77713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a77713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001050: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 10000008 (0) - %r14: 00000008 (0) - %r15: a2240000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001050 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4210 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001054 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a00693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa00693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001054: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 00000008 (0) - %r15: a2240000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001054 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4211 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001058 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d70063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d70063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001058: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 00000008 (0) - %r15: a2240000 (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001058 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4212 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4213 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4214 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4215 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4216 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4217 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4218 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000105c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10c10793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10c10793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000105c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 00000008 (0) - %r15: 6fffeeac (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000105c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4219 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001060 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80015737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80015737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001060: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 6fffeeac (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001060 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4220 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001064 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ef12223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xef12223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001064: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rf=6fffeeac, imm=228 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee84 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 6fffeeac (0) - %r16: 10010000 (0) - %r17: 10000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4221 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001068 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001068: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 6fffeeac (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001068 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4222 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000106c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a6c70793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa6c70793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000106c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014a6c (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000106c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4223 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001070 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80015737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80015737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001070: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014a6c (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001070 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4224 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001074 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f12c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf12c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001074: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rf=80014a6c, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedb8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014a6c (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001074 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4225 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001078 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 90b13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x90b13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001078: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014a6c (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001078 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4226 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000107c -DEBUG ../../../simX/enc.cpp:105: Curr Code: be870793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xbe870793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000107c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014be8 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000107c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4227 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001080 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f12423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf12423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001080: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rf=80014be8, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeda8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 80014be8 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4228 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4229 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4230 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001080 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4231 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001084 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b4783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb4783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001084: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r22=80014a1c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001084 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4232 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001088 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001088: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=236 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001088 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4233 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000108c -DEBUG ../../../simX/enc.cpp:105: Curr Code: e012423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe012423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000108c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=232 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000108c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4234 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001090 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001090: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedc0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001090 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4235 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001090 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4236 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001090 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4237 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001094 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001094: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=52 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedd4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001094 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4238 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001098 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001098: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=56 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedd8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001098 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4239 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000109c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000109c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=60 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeddc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000109c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4240 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4012423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4012423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010a0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=72 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffede8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4241 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4012623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4012623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010a4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=76 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedec -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4242 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010a8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, r0=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4243 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 22078663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x22078663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010ac: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4244 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4245 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4246 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4247 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4248 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4249 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b0413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb0413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1c (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000a (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4250 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2500693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2500693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1c (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4251 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1c (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006b (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4252 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4253 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4254 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4255 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4256 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4257 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4258 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a1c, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1c (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4259 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1d (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4260 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 101 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1d (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4261 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4262 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4263 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4264 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4265 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4266 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1d (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4267 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4268 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4269 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4270 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4271 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4272 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a1d, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1d (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000072 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4273 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1e (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000072 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4274 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 114 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1e (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000072 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4275 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4276 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4277 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4278 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4279 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4280 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1e (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000072 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4281 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4282 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4283 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4284 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4285 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4286 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a1e, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1e (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4287 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1f (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4288 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 110 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1f (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4289 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4290 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4291 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4292 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4293 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4294 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1f (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4295 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4296 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4297 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4298 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4299 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4300 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a1f, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a20 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 64206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a1f (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4301 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a20 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4302 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 101 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a20 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4303 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4304 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4305 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4306 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4307 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4308 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a20 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4309 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4310 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4311 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4312 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4313 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4314 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a20, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a20 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 64206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a20 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006c (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4315 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a21 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006c (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4316 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 108 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a21 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006c (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4317 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4318 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4319 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4320 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4321 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4322 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a21 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006c (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4323 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4324 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4325 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4326 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4327 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4328 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a21, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a20 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 64206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a21 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000020 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4329 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a22 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000020 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4330 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 32 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a22 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000020 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4331 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4332 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4333 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4334 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4335 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4336 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a22 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000020 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4337 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4338 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4339 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4340 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4341 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4342 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a22, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a20 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 64206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a22 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000064 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4343 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a23 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000064 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4344 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 100 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a23 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000064 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4345 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4346 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4347 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4348 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4349 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4350 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a23 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000064 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4351 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4352 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4353 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4354 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4355 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4356 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a23, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a24 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e656e6f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a23 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006f (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4357 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a24 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006f (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4358 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 111 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a24 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006f (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4359 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4360 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4361 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4362 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4363 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4364 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a24 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006f (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4365 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4366 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4367 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4368 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4369 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4370 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a24, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a24 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e656e6f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a24 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4371 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a25 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4372 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 110 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a25 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4373 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4374 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4375 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4376 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4377 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4378 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a25 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000006e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4379 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4380 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4381 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4382 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4383 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4384 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a25, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a24 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e656e6f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a25 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4385 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a26 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4386 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 101 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a26 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4387 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4388 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4389 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4390 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4391 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4392 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a26 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000065 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4393 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4394 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4395 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4396 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4397 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4398 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a26, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a24 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e656e6f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a26 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4399 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a27 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4400 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 46 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a27 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4401 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4402 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4403 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4404 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4405 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4406 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a27 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000002e (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4407 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4408 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4409 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4410 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4411 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4412 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a27, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a28 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a27 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000000a (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4413 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a28 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000000a (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4414 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 10 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800010b8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a28 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000000a (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4415 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4416 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4417 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4418 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4419 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4420 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 30d78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x30d78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a28 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 0000000a (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4421 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4422 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4423 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4424 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4425 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4426 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 144783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x144783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a28, imm=1 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a28 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a28 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4427 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 140413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x140413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4428 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe079ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe079ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 00000000 (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4429 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4430 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4431 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4432 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4433 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4434 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 416404b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x416404b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010c8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 8 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4435 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 21640663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x21640663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010cc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000025 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4436 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4437 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4438 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4439 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4440 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4441 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ec12683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xec12683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010d0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=236 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4442 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e812783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe812783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010d4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=232 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee88 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4443 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 168a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x168a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010d8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r17=6fffeeac, r16=80014a1c, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeeac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 17 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4444 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 9686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x9686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010dc: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000d (0) - %r14: 80015000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4445 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010e0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000d (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4446 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98a223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98a223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010e4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r17=6fffeeac, r9=d, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeeb0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000d (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 17 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4447 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ed12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xed12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010e8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rd=d, imm=236 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000d (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4448 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: ef12423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xef12423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010ec: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, rf=1, imm=232 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 0000000d (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4449 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 700693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x700693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010f0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 10010000 (0) - %r17: 6fffeeac (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4450 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 888893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x888893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4451 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2ef6c263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2ef6c263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010f8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 80015000 (0) - %r15: 00000001 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4452 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4453 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4454 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4455 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4456 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4457 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800010fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800010fc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffedac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800010fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4458 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001100 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 44783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x44783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001100: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80014a29, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a28 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001100 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4459 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001104 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 970733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x970733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001104: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001104 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4460 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001108 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e12623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe12623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001108: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeda0, re=d, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffedac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001108 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4461 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000110c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c078663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c078663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000110c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800012d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000110c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4462 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4463 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4464 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4465 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4466 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4467 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4468 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ec12783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xec12783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012d8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=236 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4469 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012dc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4470 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4471 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4472 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4473 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4474 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4475 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4476 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3250106f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3250106f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012e0: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80002e04 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 00000000 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4477 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4478 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4479 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4480 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4481 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4482 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80002e04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e410613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe410613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80002e04: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: ffffffff (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4483 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80002e08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c0593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc0593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80002e08: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4484 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80002e0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d0513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd0513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80002e0c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000fdc (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 26 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4485 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80002e10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 314090ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x314090ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80002e10: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000c124 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4486 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4487 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4488 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4489 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4490 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4491 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c124 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 862703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x862703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c124: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r12=6fffee84, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c124 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4492 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c128 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 70463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x70463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c128: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c128 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4493 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4494 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4495 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4496 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4497 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4498 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4499 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c12c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f09ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf09ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c12c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000c034 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c12c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4500 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4501 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4502 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4503 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4504 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4505 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c034 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 645a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x645a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c034: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=100 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163c8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c034 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4506 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c038 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c038: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c038 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4507 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c03c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1612823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1612823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c03c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r16=80014a1c, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed80 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c03c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4508 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c040 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c040: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r1=80002e14, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4509 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4510 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4511 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c040 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4512 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c044 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c044: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r8=80014a29, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed98 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c044 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4513 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c048 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c048: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r9=d, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed94 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c048 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4514 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c04c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c04c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r12=80014a1c, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed90 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c04c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4515 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c050 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c050: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r13=0, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c050 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4516 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c054 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c054: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r14=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c054 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4517 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c058 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1512a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1512a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c058: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r15=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed84 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c058 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4518 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c05c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1712623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1712623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c05c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r17=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed7c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c05c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4519 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c060 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c060: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed70, r18=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed78 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c060 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4520 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c064 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1279713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1279713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c064: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4521 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c068 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60b13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60b13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c068: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c068 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4522 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c06c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a075863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa075863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c06c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:5 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000c11c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c06c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4523 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4524 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4525 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4526 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4527 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4528 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c11c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f1010ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf1010ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c11c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000da0c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c11c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4529 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4530 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4531 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4532 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4533 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4534 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 862783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x862783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da0c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r12=6fffee84, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4535 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 32078e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x32078e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da10: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4536 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4537 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4538 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4539 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4540 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4541 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4542 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c5d783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc5d783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da14: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4543 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4544 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da1c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r8=80014a29, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed68 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4545 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da20: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r14=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed58 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4546 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1512a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1512a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da24: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r15=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed54 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4547 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4548 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da28: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r1=8000c120, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed6c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4549 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da2c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r9=d, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed64 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4550 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da30: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r12=80014a1c, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed60 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4551 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da34: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r13=0, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed5c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4552 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1612823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1612823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da38: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r16=6fffee84, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4553 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1712623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1712623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r17=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed4c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4554 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r18=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed48 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4555 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da44: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r19=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed44 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 25 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4556 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a12023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a12023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da48: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed40, r1a=80016010, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed40 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 26 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4557 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 87f713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x87f713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4558 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60a13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60a13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da50: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4559 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50a93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50a93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da54: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4560 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4561 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8070663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8070663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da5c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000008 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4562 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4563 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4564 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4565 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4566 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4567 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 105a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x105a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da60: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 10000008 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4568 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8070263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8070263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da64: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 10000008 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4569 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4570 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4571 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4572 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4573 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4574 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4575 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 27f713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x27f713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da68: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4576 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a2483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa2483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da6c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r20=6fffee84, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee84 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffeeac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4577 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000da70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8070c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8070c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000da70: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000db08 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000da70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4578 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4579 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4580 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4581 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4582 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4583 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000db08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 17f713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x17f713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000db08: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000db08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4584 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000db08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4585 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000db08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4586 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000db08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4587 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000db0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 24071463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x24071463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000db0c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dd54 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000db0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4588 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4589 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4590 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4591 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4592 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4593 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4594 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd54: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4595 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4596 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4597 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd60: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4598 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ec098ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xec098ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd64: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dc38 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 19 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4599 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4600 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4601 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4602 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4603 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4604 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4605 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 44a983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x44a983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc38: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffeeac, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffeeb0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4606 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4607 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4608 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4609 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4ac03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4ac03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc3c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=6fffeeac, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffeeac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a1c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeac (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4610 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 848493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x848493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc40: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4611 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4612 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4613 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4614 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe098ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe098ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc44: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 6fffee84 (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 19 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4615 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4616 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4617 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4618 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4619 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4620 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4621 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a00593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa00593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4622 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c0513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc0513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc50: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4623 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a7cfa0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa7cfa0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc54: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007ed0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4624 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4625 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4626 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4627 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4628 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4629 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ed0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 357793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x357793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ed0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 00000007 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ed0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4630 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ed4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff5f693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff5f693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ed4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ed4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4631 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007ed8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2078a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2078a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007ed8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f0c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007ed8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4632 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4633 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4634 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4635 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4636 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4637 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f0c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 00000001 (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4638 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4639 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4640 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4641 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 300713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x300713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f10: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 00000003 (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4642 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f76663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f76663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f14: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f40 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 00000003 (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4643 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4644 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4645 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4646 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4647 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4648 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4649 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f40: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 00010000 (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 6fffeeb4 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4650 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4651 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4652 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4653 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 859893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x859893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f44: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 00010000 (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 00000a00 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4654 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff70713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff70713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 00000a00 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4655 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: e8f8b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe8f8b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f4c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 00000a00 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4656 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff5f593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff5f593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f50: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 0000000a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 00000a00 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4657 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b8e5b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb8e5b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f54: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 00000a0a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 00000a00 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 17 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4658 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 17 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4659 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1059893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1059893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 00000a0a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 0a0a0000 (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4660 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b8e8b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb8e8b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f5c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 00000a0a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: 10010000 (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4661 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 17 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4662 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: feff0837 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfeff0837 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f60: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 00000a0a (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: feff0000 (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4663 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4664 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 808085b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x808085b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f64: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808000 (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: feff0000 (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4665 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4666 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: eff80813 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xeff80813 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f68: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808000 (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 16 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4667 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8058593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8058593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f6c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 80016010 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808080 (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4668 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 300313 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x300313 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f70: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808080 (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 0000ffff (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4669 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 52703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x52703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a1c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808080 (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 6e72656b (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4670 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e8c733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe8c733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f78: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808080 (0) - %r12: 0000000d (0) - %r13: 0000000a (0) - %r14: 64786f61 (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 17 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4671 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f7c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 64786f61 (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4672 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff74713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff74713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 9b87909e (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4673 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4674 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4675 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4676 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e67733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe67733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f84: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 03070000 (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4677 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b77733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb77733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f88: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4678 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f8071ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf8071ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f8c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4679 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4680 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4681 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4682 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4683 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4684 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4685 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4686 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4687 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc78793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc78793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f90: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a1c (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4688 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 450513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x450513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a20 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4689 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fcf36ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfcf36ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f98: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f74 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a20 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4690 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4691 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4692 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4693 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4694 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4695 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 52703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x52703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a20, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a20 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 64206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a20 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 64206c65 (0) - %r15: 00000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4696 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e8c733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe8c733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f78: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a20 (0) - %r11: 80808080 (0) - %r12: 63776e60 (0) - %r13: 0000000a (0) - %r14: 6e2a666f (0) - %r15: 00000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 17 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4697 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f7c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a20 (0) - %r11: 80808080 (0) - %r12: 6d29656e (0) - %r13: 0000000a (0) - %r14: 6e2a666f (0) - %r15: 00000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4698 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff74713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff74713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a20 (0) - %r11: 80808080 (0) - %r12: 6d29656e (0) - %r13: 0000000a (0) - %r14: 91d59990 (0) - %r15: 00000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4699 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4700 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e67733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe67733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f84: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a20 (0) - %r11: 80808080 (0) - %r12: 6d29656e (0) - %r13: 0000000a (0) - %r14: 01010100 (0) - %r15: 00000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4701 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4702 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b77733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb77733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f88: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a20 (0) - %r11: 80808080 (0) - %r12: 6d29656e (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4703 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f8071ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf8071ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f8c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a20 (0) - %r11: 80808080 (0) - %r12: 6d29656e (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4704 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4705 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4706 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4707 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4708 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4709 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4710 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4711 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4712 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc78793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc78793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f90: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a20 (0) - %r11: 80808080 (0) - %r12: 6d29656e (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000005 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4713 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 450513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x450513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a24 (0) - %r11: 80808080 (0) - %r12: 6d29656e (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000005 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4714 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fcf36ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfcf36ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f98: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f74 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a24 (0) - %r11: 80808080 (0) - %r12: 6d29656e (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000005 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4715 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4716 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4717 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4718 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4719 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4720 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 52703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x52703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a24, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a24 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e656e6f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a24 (0) - %r11: 80808080 (0) - %r12: 6d29656e (0) - %r13: 0000000a (0) - %r14: 2e656e6f (0) - %r15: 00000005 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4721 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e8c733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe8c733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f78: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a24 (0) - %r11: 80808080 (0) - %r12: 6d29656e (0) - %r13: 0000000a (0) - %r14: 246f6465 (0) - %r15: 00000005 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 17 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4722 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1070633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1070633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f7c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a24 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 246f6465 (0) - %r15: 00000005 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: 16 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4723 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff74713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff74713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a24 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: db909b9a (0) - %r15: 00000005 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4724 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4725 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e67733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe67733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f84: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a24 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 03000300 (0) - %r15: 00000005 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4726 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4727 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b77733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb77733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f88: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a24 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000005 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4728 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f8071ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf8071ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f8c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a24 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000005 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4729 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4730 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4731 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4732 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4733 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4734 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4735 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4736 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4737 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc78793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc78793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f90: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a24 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4738 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 450513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x450513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f94: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a28 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4739 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fcf36ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfcf36ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f98: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a28 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 6 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4740 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4741 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4742 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4743 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4744 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4745 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f80794e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf80794e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f9c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f24 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a28 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4746 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4747 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4748 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4749 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4750 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4751 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f507b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf507b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f24: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a28 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 80014a29 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4752 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c0006f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc0006f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f28: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007f34 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a28 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 00000000 (0) - %r15: 80014a29 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4753 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4754 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4755 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4756 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4757 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4758 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 54703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x54703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f34: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80014a28, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a28 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a28 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a29 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4759 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed71ae3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed71ae3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f38: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 10 rsrc1 : 10 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a28 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a29 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4760 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4761 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4762 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4763 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4764 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4765 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4766 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007f3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007f3c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000dc58, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dc58 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a28 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a29 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007f3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4767 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4768 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4769 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4770 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4771 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4772 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12050463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12050463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc58: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a28 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a29 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4773 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4774 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4775 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4776 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4777 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4778 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 150513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x150513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc5c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a29 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a29 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4779 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41850b33 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41850b33 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc60: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a29 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 80014a29 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 10 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4780 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b0793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb0793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc64: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a29 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 00000000 (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4781 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98b93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98b93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc68: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a29 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4782 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4783 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 137f463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x137f463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc6c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dc74 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80014a29 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4784 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4785 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4786 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4787 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4788 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4789 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4790 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 0000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4791 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1042783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1042783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc78: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 0000000a (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4792 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1442683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1442683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc7c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016378 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 400 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4793 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a7f863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa7f863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc80: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dc90 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4794 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4795 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4796 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4797 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4798 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4799 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dc90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1adbc863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1adbc863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dc90: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000de40 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: 236e6364 (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dc90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 23 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4800 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4801 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4802 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4803 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4804 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4805 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b8613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb8613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de40: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80808080 (0) - %r12: 0000000d (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4806 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c0593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc0593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de44: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000dc58 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4807 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 354000ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x354000ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de48: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e19c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4808 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4809 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4810 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4811 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4812 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4813 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e19c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2a5f663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2a5f663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e19c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1c8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e19c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4814 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4815 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4816 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4817 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4818 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4819 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1c8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 0000000f (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4820 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c7e863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c7e863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1cc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 0000000f (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4821 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4822 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4823 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4824 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4825 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4826 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4827 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1d0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 00000400 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4828 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff60693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff60693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1d4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 0000000c (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4829 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c060c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc060c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1d8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 0000000c (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 12 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4830 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4831 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4832 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4833 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4834 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4835 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 168693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x168693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1dc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4836 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d786b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd786b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4837 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a1c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006b (0) - %r15: 10000008 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4838 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1c (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006b (0) - %r15: 10000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4839 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4840 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1d (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006b (0) - %r15: 10000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4841 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000009, re=6b, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1d (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006b (0) - %r15: 10000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4842 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435465 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1d (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006b (0) - %r15: 10000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4843 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4844 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4845 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4846 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4847 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4848 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a1d, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1d (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 10000009 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4849 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1d (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 1000000a (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4850 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1e (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 1000000a (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4851 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=1000000a, re=65, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000009 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1e (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 1000000a (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4852 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435466 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1e (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 1000000a (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4853 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4854 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4855 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4856 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4857 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4858 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a1e, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1e (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000072 (0) - %r15: 1000000a (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4859 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1e (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000072 (0) - %r15: 1000000b (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4860 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1f (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000072 (0) - %r15: 1000000b (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4861 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=1000000b, re=72, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1000000a -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1f (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000072 (0) - %r15: 1000000b (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4862 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435467 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1f (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000072 (0) - %r15: 1000000b (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4863 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4864 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4865 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4866 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4867 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4868 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a1f, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1f (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006e (0) - %r15: 1000000b (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4869 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a1f (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006e (0) - %r15: 1000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4870 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a20 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006e (0) - %r15: 1000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4871 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=1000000c, re=6e, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1000000b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a20 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006e (0) - %r15: 1000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4872 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435468 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a20 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006e (0) - %r15: 1000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4873 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4874 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4875 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4876 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4877 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4878 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a20, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a20 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 64206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a20 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 1000000c (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4879 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a20 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 1000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4880 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a21 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 1000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4881 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=1000000d, re=65, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1000000c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a21 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 1000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4882 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435469 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a21 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 1000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4883 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4884 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4885 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4886 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4887 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4888 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a21, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a20 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 64206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a21 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006c (0) - %r15: 1000000d (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4889 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a21 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006c (0) - %r15: 1000000e (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4890 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a22 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006c (0) - %r15: 1000000e (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4891 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=1000000e, re=6c, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1000000d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a22 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006c (0) - %r15: 1000000e (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4892 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435470 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a22 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006c (0) - %r15: 1000000e (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4893 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4894 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4895 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4896 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4897 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4898 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a22, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a20 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 64206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a22 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000020 (0) - %r15: 1000000e (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4899 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a22 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000020 (0) - %r15: 1000000f (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4900 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a23 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000020 (0) - %r15: 1000000f (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4901 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=1000000f, re=20, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1000000e -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a23 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000020 (0) - %r15: 1000000f (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4902 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435471 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a23 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000020 (0) - %r15: 1000000f (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4903 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4904 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4905 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4906 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4907 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4908 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a23, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a20 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 64206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a23 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000064 (0) - %r15: 1000000f (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4909 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a23 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000064 (0) - %r15: 10000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4910 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a24 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000064 (0) - %r15: 10000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4911 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000010, re=64, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 1000000f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a24 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000064 (0) - %r15: 10000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4912 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435472 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a24 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000064 (0) - %r15: 10000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4913 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4914 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4915 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4916 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4917 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4918 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a24, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a24 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e656e6f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a24 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006f (0) - %r15: 10000010 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4919 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a24 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006f (0) - %r15: 10000011 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4920 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a25 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006f (0) - %r15: 10000011 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4921 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000011, re=6f, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a25 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006f (0) - %r15: 10000011 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4922 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435473 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a25 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006f (0) - %r15: 10000011 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4923 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4924 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4925 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4926 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4927 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4928 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a25, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a24 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e656e6f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a25 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006e (0) - %r15: 10000011 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4929 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a25 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006e (0) - %r15: 10000012 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4930 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a26 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006e (0) - %r15: 10000012 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4931 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000012, re=6e, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000011 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a26 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006e (0) - %r15: 10000012 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4932 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435474 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a26 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000006e (0) - %r15: 10000012 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4933 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4934 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4935 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4936 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4937 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4938 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a26, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a24 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e656e6f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a26 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 10000012 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4939 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a26 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 10000013 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4940 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a27 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 10000013 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4941 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000013, re=65, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000012 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a27 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 10000013 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4942 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435475 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a27 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 00000065 (0) - %r15: 10000013 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4943 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4944 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4945 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4946 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4947 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4948 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a27, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a24 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e656e6f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a27 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000002e (0) - %r15: 10000013 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4949 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a27 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000002e (0) - %r15: 10000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4950 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a28 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000002e (0) - %r15: 10000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4951 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000014, re=2e, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000013 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a28 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000002e (0) - %r15: 10000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4952 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435476 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a28 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000002e (0) - %r15: 10000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4953 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4954 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4955 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4956 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4957 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4958 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5c703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5c703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80014a28, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80014a28 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: a -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a28 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 10000014 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4959 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a28 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 10000015 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4960 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 158593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x158593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 10000015 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4961 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fee78fa3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfee78fa3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=10000015, re=a, imm=4294967295 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000014 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 10000015 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4962 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fed798e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfed798e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435477 rsrc1 : 268435477 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 10000015 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4963 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4964 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4965 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4966 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4967 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4968 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000e1f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000e1f8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000de4c, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000de4c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 10000015 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000e1f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4969 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4970 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4971 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4972 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4973 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4974 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 842783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x842783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de4c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001636c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 0000000d (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4975 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 42603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x42603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de50: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 10000008 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 80014a1c (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4976 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b8913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb8913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de54: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 10000008 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4977 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 417787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x417787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de58: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 10000008 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4978 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1760633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1760633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de5c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4979 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de60: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rf=fffffff3, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001636c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4980 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c42023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc42023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de64: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rc=10000015, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4981 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e49ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe49ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de68: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dcb0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 0000000d (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4982 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4983 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4984 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4985 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4986 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4987 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcb0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412b0b33 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412b0b33 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcb0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 10000008 (0) - %r11: 80014a29 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcb0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 22 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4988 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcb4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcb4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000001 (0) - %r11: 80014a29 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcb4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4989 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcb8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 160b0a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x160b0a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcb8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000de2c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000001 (0) - %r11: 80014a29 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcb8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 22 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4990 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4991 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4992 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4993 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4994 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4995 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000001 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4996 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a8513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa8513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de4c (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4997 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a24f60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa24f60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de34: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004058 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4998 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 4999 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5000 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5001 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5002 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5003 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004058 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004058: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004058 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5004 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000405c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000405c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r8=80016364, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000405c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5005 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004060 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004060: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r1=8000de38, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004060 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5006 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004064 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004064: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5007 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004064 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5008 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004068 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004068: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: fffffff3 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004068 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5009 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5010 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5011 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5012 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5013 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5014 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000406c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3852783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3852783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000406c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80016010, imm=56 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016048 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00000001 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000406c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5015 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004070 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2078063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2078063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004070: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00000001 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004070 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5016 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5017 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5018 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5019 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5020 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5021 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5022 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004074 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c59783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc59783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004074: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004074 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5023 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004078 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2079663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2079663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004078: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 10377 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800040a4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004078 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5024 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5025 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5026 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5027 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5028 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5029 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5030 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5031 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040a8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5032 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040ac: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000de38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5033 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040b0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5034 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d49ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd49ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040b4: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003dfc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5035 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5036 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5037 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5038 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5039 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5040 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003dfc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c59783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc59783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003dfc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5041 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e00: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5042 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5043 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5044 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5045 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e04: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r8=80016364, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5046 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e08: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r13=d, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed2c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5047 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e0c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r1=8000de38, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5048 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5049 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e10: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r9=6fffeeb4, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed34 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5050 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e14: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed20, r12=d, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed30 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 10000015 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5051 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 87f693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x87f693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5052 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5053 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e20: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5054 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10069a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10069a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e24: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 8 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f38 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 0000000d (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5055 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5056 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5057 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5058 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5059 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5060 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 105a903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x105a903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f38: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5061 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5062 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5063 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5064 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fc090ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfc090ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f3c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5065 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5066 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5067 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5068 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5069 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5070 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5071 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5a483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5a483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f40: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000015 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000015 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 0000000a (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5072 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5073 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5074 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5075 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1079713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1079713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f44: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000015 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 28890000 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5076 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1075713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1075713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000015 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5077 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 377713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x377713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000015 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5078 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 125a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x125a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f50: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r11=80016364, r12=10000008, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000015 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5079 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5080 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412484b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412484b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f54: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5081 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5082 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5083 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 71463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x71463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f5c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f64 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5084 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5085 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5086 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5087 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5088 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5089 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f64: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rf=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001636c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5090 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 904863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x904863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f68: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f78 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5091 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5092 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5093 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5094 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5095 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5096 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2442783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2442783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f78: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=36 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016388 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80009344 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5097 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c42583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c42583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f7c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016380 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5098 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f80: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000015 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5099 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5100 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5101 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5102 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 90613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x90613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f84: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5103 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f88: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5104 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f8c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80009344, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80009344 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 80009344 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5105 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5106 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5107 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5108 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5109 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5110 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009344 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c59783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc59783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009344: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009344 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5111 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009344 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5112 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009344 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5113 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009344 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5114 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009348 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009348: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009348 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5115 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000934c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000934c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r8=80016364, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed18 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000934c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5116 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009350 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009350: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r9=d, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009350 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5117 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009354 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009354: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r12=10000008, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed10 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009354 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5118 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009354 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5119 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009358 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009358: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r13=80016010, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed0c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009358 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5120 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000935c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000935c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r1=80003f90, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed1c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000935c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5121 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009360 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1007f713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1007f713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009360: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009360 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5122 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009364 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009364: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009364 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5123 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009368 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009368: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009368 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5124 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000936c -DEBUG ../../../simX/enc.cpp:105: Curr Code: e59583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe59583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000936c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=14 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000936c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5125 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009370 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009370: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009370 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5126 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009374 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009374: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009374 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5127 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009378 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2071e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2071e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009378: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009378 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5128 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5129 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5130 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5131 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5132 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5133 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000937c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fffff737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfffff737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000937c: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: fffff000 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000937c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5134 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009380 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff70713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff70713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009380: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009380 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5135 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009384 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e7f7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe7f7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009384: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009384 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5136 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009388 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f41623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf41623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009388: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rf=2889, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009388 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5137 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009388 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5138 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000938c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000938c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed18 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000938c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5139 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000938c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5140 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009390 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009390: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80003f90 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009390 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5141 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009390 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5142 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009394 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 98693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x98693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009394: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009394 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 19 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5143 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009398 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 90613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x90613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009398: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009398 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5144 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000939c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000939c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000939c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5145 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800093a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800093a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed10 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800093a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5146 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800093a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800093a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800093a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5147 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800093a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800093a8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800093a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5148 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800093ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800093ac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800093ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5149 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800093b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a80406f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa80406f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800093b0: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d458 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800093b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5150 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5151 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5152 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5153 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5154 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5155 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d458 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d458: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: ffffefff (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d458 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5156 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d45c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d45c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d45c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5157 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d460 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d460: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed10, r8=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed18 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d460 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5158 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d464 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d464: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed10, r9=d, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d464 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5159 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d468 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d468: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d468 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5160 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d46c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d46c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 10000008 (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d46c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5161 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d470 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 68613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x68613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d470: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d470 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5162 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d474 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 70513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x70513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d474: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d474 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5163 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d478 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d478: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed10, r1=80003f90, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed1c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d478 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5164 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d47c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2401a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2401a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d47c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, r0=0, imm=584 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d47c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5165 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d480 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 858f30ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x858f30ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d480: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800004d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d480 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5166 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d480 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5167 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d480 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5168 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d480 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5169 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5170 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5171 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5172 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5173 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5174 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004d8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5175 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5176 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5177 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5178 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004dc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r8=80016010, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed08 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5179 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 710007b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x710007b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004e0: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 71000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5180 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004e4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffed00, r1=8000d484, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffed0c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 71000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5181 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5182 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 60413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x60413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000001 (0) - %r15: 71000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5183 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 400713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x400713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004ec: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000003 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5184 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 500313 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x500313 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004f0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: fefefeff (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 6 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5185 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1078813 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1078813 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5186 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e7a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe7a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004f8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, re=4, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5187 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800004fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 678223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x678223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800004fc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, r6=5, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000004 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800004fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 6 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5188 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000500 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 782a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x782a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000500: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, r0=0, imm=5 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000005 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5189 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5190 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5191 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000500 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5192 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000504 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 878823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x878823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000504: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, r8=d, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 0a0a0a0a (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000504 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5193 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000508 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 865893 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x865893 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000508: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 0000000d (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000508 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 17 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5194 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000050c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1845693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1845693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000050c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000050c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5195 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000510 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1065613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1065613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000510: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000510 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5196 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000514 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 11800a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x11800a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000514: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r16=71000010, r11=0, imm=1 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000011 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000514 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 16 rs2: 17 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5197 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000518 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c80123 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc80123 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000518: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r16=71000010, rc=0, imm=2 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000012 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000518 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 16 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5198 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000051c -DEBUG ../../../simX/enc.cpp:105: Curr Code: d801a3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd801a3 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000051c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r16=71000010, rd=0, imm=3 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000013 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000051c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 16 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5199 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000520 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 79323 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x79323 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000520: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, r0=0, imm=6 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000006 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000520 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5200 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000524 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e7a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe7a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000524: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, re=4, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000524 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5201 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000528 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a7a623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa7a623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000528: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r15=71000000, ra=1, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 7100000c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000528 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5202 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000052c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a805263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa805263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000052c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:5 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 00000000 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000052c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5203 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5204 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5205 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5206 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5207 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5208 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000530 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1478693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1478693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000530: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000004 (0) - %r15: 71000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000530 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5209 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000534 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1878793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1878793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000534: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000004 (0) - %r15: 71000018 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000534 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5210 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000538 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f5b7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf5b7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000538: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000004 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000538 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5211 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000053c -DEBUG ../../../simX/enc.cpp:105: Curr Code: b83533 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb83533 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000053c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000004 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000053c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 16 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5212 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000540 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff40613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff40613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000540: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000c (0) - %r13: 71000014 (0) - %r14: 00000004 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000540 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5213 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000540 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5214 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000540 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5215 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000540 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5216 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000544 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 17c713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x17c713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000544: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000c (0) - %r13: 71000014 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000544 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5217 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000548 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 963613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x963613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000548: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000548 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5218 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000054c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 154793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x154793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000054c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000054c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5219 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000550 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f767b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf767b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000550: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000550 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5220 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000554 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 164713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x164713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000554: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000554 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5221 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000558 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f777b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf777b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000558: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000558 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5222 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000558 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5223 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000055c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8078863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8078863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000055c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000001 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000055c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5224 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5225 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5226 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5227 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5228 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5229 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5230 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5231 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000560 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b6e7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb6e7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000560: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 7100001c (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000560 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 13 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5232 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000564 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 37f793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x37f793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000564: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000564 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5233 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000568 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8079263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8079263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000568: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5234 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5235 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5236 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5237 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5238 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5239 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5240 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5241 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000056c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc47513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc47513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000056c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 0000000c (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000056c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5242 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000570 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b50533 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb50533 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000570: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000570 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 10 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5243 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000574 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000574: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 10000008 (0) - %r16: 71000010 (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000574 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5244 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000578 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40b68833 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40b68833 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000578: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 00000000 (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 10000008 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000578 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 13 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5245 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000578 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 13 rs2: 11 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5246 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000057c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7a603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7a603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000057c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r15=10000008, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000008 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6e72656b -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 6e72656b (0) - %r13: 71000014 (0) - %r14: 00000001 (0) - %r15: 10000008 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000057c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5247 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000580 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f80733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf80733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000580: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 6e72656b (0) - %r13: 71000014 (0) - %r14: 71000014 (0) - %r15: 10000008 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5248 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000584 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 478793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x478793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000584: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 6e72656b (0) - %r13: 71000014 (0) - %r14: 71000014 (0) - %r15: 1000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000584 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5249 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000588 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000588: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=71000014, rc=6e72656b, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000014 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 6e72656b (0) - %r13: 71000014 (0) - %r14: 71000014 (0) - %r15: 1000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000588 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5250 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000058c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fef518e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfef518e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000058c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435476 rsrc1 : 268435468 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000057c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 6e72656b (0) - %r13: 71000014 (0) - %r14: 71000014 (0) - %r15: 1000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000058c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5251 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5252 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5253 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5254 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5255 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5256 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000057c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7a603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7a603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000057c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r15=1000000c, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1000000c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 64206c65 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 64206c65 (0) - %r13: 71000014 (0) - %r14: 71000014 (0) - %r15: 1000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000057c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5257 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000580 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f80733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf80733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000580: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 64206c65 (0) - %r13: 71000014 (0) - %r14: 71000018 (0) - %r15: 1000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5258 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000584 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 478793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x478793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000584: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 64206c65 (0) - %r13: 71000014 (0) - %r14: 71000018 (0) - %r15: 10000010 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000584 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5259 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000588 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000588: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=71000018, rc=64206c65, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000018 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 64206c65 (0) - %r13: 71000014 (0) - %r14: 71000018 (0) - %r15: 10000010 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000588 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5260 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000058c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fef518e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfef518e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000058c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435476 rsrc1 : 268435472 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000057c -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 64206c65 (0) - %r13: 71000014 (0) - %r14: 71000018 (0) - %r15: 10000010 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000058c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5261 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5262 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5263 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5264 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5265 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5266 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000057c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7a603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7a603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000057c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r15=10000010, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000010 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 2e656e6f -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 2e656e6f (0) - %r13: 71000014 (0) - %r14: 71000018 (0) - %r15: 10000010 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000057c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5267 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000580 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f80733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf80733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000580: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 2e656e6f (0) - %r13: 71000014 (0) - %r14: 7100001c (0) - %r15: 10000010 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 16 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5268 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000584 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 478793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x478793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000584: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 2e656e6f (0) - %r13: 71000014 (0) - %r14: 7100001c (0) - %r15: 10000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000584 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5269 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000588 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c72023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc72023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000588: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=7100001c, rc=2e656e6f, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 7100001c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 2e656e6f (0) - %r13: 71000014 (0) - %r14: 7100001c (0) - %r15: 10000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000588 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5270 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000058c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fef518e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfef518e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000058c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 268435476 rsrc1 : 268435476 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 2e656e6f (0) - %r13: 71000014 (0) - %r14: 7100001c (0) - %r15: 10000014 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000058c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5271 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5272 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5273 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5274 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5275 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5276 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000590 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc47793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc47793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000590: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 2e656e6f (0) - %r13: 71000014 (0) - %r14: 7100001c (0) - %r15: 0000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000590 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5277 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000594 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f686b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf686b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000594: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 2e656e6f (0) - %r13: 71000020 (0) - %r14: 7100001c (0) - %r15: 0000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000594 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5278 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000598 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2f40c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2f40c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000598: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 2e656e6f (0) - %r13: 71000020 (0) - %r14: 7100001c (0) - %r15: 0000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000598 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5279 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5280 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5281 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5282 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5283 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5284 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5285 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000059c -DEBUG ../../../simX/enc.cpp:105: Curr Code: f58733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf58733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000059c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 2e656e6f (0) - %r13: 71000020 (0) - %r14: 10000014 (0) - %r15: 0000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000059c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5286 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 74603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x74603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r14=10000014, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000014 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 676e690a -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 10000014 (0) - %r15: 0000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5287 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 178713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x178713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 0000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5288 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c68023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc68023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005a8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r13=71000020, rc=a, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 71000020 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 0000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5289 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5290 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2875263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2875263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005ac: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:5 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800005d0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 0000000c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5291 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5292 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5293 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5294 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5295 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5296 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c81a783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c81a783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005d0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=456 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169d0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 70000000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5297 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005d4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=70000000, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 70000000 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800005d8 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5298 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5299 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5300 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5301 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5302 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5303 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5304 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x70000000 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x70000000: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -kernel done. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=800005d8, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800005d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800005d8 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 70000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5305 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 70000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5306 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 70000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5307 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 70000000 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5308 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5309 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5310 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5311 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5312 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5313 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005d8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed0c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000d484 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 10000014 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5314 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005dc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 0000000d (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5315 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005e0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed00, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed08 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed00 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5316 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005e4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5317 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800005e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800005e8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d484, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d484 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 70000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800005e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5318 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5319 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5320 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5321 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5322 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5323 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d484 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d484: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d484 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5324 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d488 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f50c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf50c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d488: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d484 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d488 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5325 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5326 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5327 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5328 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5329 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5330 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5331 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d48c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d48c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed10, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed1c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80003f90 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d48c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5332 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d490 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d490: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed10, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed18 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d490 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5333 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d494 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d494: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed10, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed14 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed10 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d494 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5334 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d498 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d498: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d498 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5335 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d49c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d49c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80003f90, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f90 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d49c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5336 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5337 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5338 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5339 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5340 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5341 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f90 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40a484b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40a484b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f90: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f90 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5342 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fca04ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfca04ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f94: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f70 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5343 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5344 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5345 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5346 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5347 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5348 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: a90933 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa90933 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f70: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000015 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 18 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5349 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fa9052e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfa9052e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f74: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:5 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f18 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000015 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5350 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5351 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5352 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5353 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5354 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5355 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80003f90 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000015 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5356 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f1c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed3c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000de38 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000015 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5357 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f20: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed38 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000015 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5358 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f24: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed34 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffeeb4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000015 (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5359 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f28: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed30 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 0000000d (0) - %r19: 80016010 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5360 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f2c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed20, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed2c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed20 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5361 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5362 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f34: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000de38, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000de38 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5363 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5364 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5365 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5366 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5367 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5368 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000de38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e80502e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe80502e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000de38: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000dcbc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000a (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000de38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5369 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5370 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5371 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5372 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5373 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5374 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcbc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8a2603 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8a2603 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcbc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r20=6fffee84, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a1c (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5375 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcc0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12c0c33 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12c0c33 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcc0: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 0000000d (0) - %r19: 0000000d (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 24 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5376 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 24 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5377 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 24 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5378 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 24 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5379 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcc4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412989b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412989b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcc4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 0000000d (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 19 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5380 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41260933 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41260933 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcc8: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 12 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5381 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dccc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12a2423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12a2423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dccc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r20=6fffee84, r12=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dccc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 20 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5382 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcd0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8091a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8091a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcd0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcd0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5383 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5384 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5385 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5386 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5387 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5388 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5389 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcd4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcd4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000de38 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcd4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5390 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcd8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcd8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed6c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000c120 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcd8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5391 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcdc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcdc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=40 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed68 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a29 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 6fffeeb4 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5392 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dce0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dce0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=36 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed64 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dce0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5393 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dce4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dce4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=32 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed60 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a1c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dce4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5394 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dce8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dce8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed5c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 6fffee84 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dce8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5395 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812a03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812a03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcec: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed58 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5396 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcf0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcf0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed54 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcf0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5397 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcf4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcf4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed50 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 6fffee84 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 0000000d (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcf4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5398 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcf8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12b83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12b83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcf8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed4c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80014a29 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcf8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5399 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dcfc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dcfc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed48 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dcfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5400 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412c83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412c83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd00: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed44 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5401 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5402 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5403 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5404 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12d03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12d03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd04: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed40, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed40 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed40 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 26 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5405 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd08: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5406 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000dd0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000dd0c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000c120, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000c120 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000dd0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5407 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5408 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5409 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5410 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5411 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5412 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c120 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fa5ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfa5ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c120: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000c0c4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000c120 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c120 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5413 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5414 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5415 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5416 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5417 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5418 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0c4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0c4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed9c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80002e14 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0c4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5419 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0c8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0c8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=40 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed98 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a29 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0c8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5420 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0cc -DEBUG ../../../simX/enc.cpp:105: Curr Code: b2423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb2423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0cc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r22=6fffee84, r0=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee8c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0cc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 22 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5421 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0d0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b2223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb2223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0d0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r22=6fffee84, r0=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffee88 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0d0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 22 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5422 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0d4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0d4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=36 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed94 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0d4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5423 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0d8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=32 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed90 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a1c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5424 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0dc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5425 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812a03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812a03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0e0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed88 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5426 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed84 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 6fffee84 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5427 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0e8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed80 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80014a1c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5428 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12b83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12b83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0ec: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed7c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5429 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0f0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffed70, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffed78 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffed70 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5430 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0f4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5431 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000c0f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000c0f8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80002e14, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80002e14 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000c0f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5432 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5433 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5434 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5435 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5436 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5437 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80002e14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: cd0fe06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcd0fe06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80002e14: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800012e4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5438 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5439 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5440 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80002e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5441 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5442 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5443 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5444 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5445 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5446 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: cc5783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xcc5783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012e4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r24=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 24 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5447 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 407f793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x407f793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5448 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012ec: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800012f4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80002e14 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5449 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5450 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5451 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5452 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5453 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5454 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5455 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5456 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1ec12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1ec12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012f4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=492 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef8c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000f74 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80014a29 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5457 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012f8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=488 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef88 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 0000000d (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5458 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800012fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800012fc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffedac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: d -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 0000000d (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800012fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5459 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001300 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001300: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=484 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef84 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 80014a1c (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001300 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5460 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001304 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001304: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=480 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef80 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001304 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5461 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001308 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1dc12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1dc12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001308: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=476 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef7c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001308 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5462 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000130c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d812a03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d812a03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000130c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=472 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef78 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000130c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5463 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001310 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d412a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d412a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001310: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=468 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef74 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 80014a1c (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001310 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5464 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001314 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1d012b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1d012b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001314: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=464 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef70 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001314 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5465 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001318 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1cc12b83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1cc12b83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001318: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=460 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef6c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 80016364 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001318 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5466 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000131c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c812c03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c812c03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000131c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=456 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef68 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000131c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5467 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001320 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c412c83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c412c83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001320: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=452 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef64 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 80016010 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001320 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 25 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5468 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001324 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c012d03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c012d03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001324: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=448 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef60 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001324 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 26 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5469 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001328 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1bc12d83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1bc12d83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001328: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffeda0, imm=444 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef5c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffeda0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001328 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 27 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5470 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000132c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1f010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1f010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000132c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000132c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5471 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80001330 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80001330: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000f74, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000f74 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000f74 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80001330 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5472 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5473 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5474 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5475 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5476 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5477 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800000ac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5478 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5479 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5480 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5481 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f78: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5482 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000f7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000f7c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=800000ac, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800000ac -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 800000ac (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000f7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5483 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5484 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5485 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5486 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5487 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5488 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000ac: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefd0, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffeffc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000044 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000044 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 0000000d (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5489 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5490 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5491 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5492 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000b0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000044 (0) - %r 2: 6fffefd0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5493 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000b4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #1 active threads changed from 4 to 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000728 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1251 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1252 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1253 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1254 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 1 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 1 1 1 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1255 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 1 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000728 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r10: 00000001 (0) + %r11: 00000003 (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -308933,77 +42180,124 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5494 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800000b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800000b8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000044, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000044 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #0 active threads changed from 4 to 1 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000728 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1256 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1257 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1258 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1259 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1260 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1261 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x8000072c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000044 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r10: 00000001 (0) + %r11: 00000003 (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -309015,233 +42309,123 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800000b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5495 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5496 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5497 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5498 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5499 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5500 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000044 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4ad0006f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4ad0006f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000044: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000cf0 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=8000072c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1262 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1263 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1264 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1265 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1266 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1267 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000044 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2110006f into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=2576 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a54 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) %r 2: 6ffff000 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r10: 00000001 (0) + %r11: 00000003 (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -309253,315 +42437,122 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000044 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5501 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000044 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5502 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000044 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5503 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000044 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5504 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5505 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5506 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5507 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5508 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5509 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cf0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cf0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000044 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1268 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1269 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1270 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1271 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1272 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1273 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a54 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xff010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967280 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r10: 00000001 (0) + %r11: 00000003 (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -309573,159 +42564,47 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cf0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5510 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cf0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5511 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cf0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5512 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cf0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5513 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cf4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cf4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a54 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1274 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a58 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x593 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r11 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -309737,77 +42616,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cf4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5514 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cf8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cf8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeff0, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeff8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a58 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=11, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1275 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a5c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffeff8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -309819,77 +42669,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cf8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5515 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000cfc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000cfc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffeff0, r1=80000044, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffeffc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a5c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1276 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a60 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffeffc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -309901,75 +42722,47 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000cfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5516 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d00: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a60 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1277 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a64 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50413 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) %r 1: 80000044 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -309981,161 +42774,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5517 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5518 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5519 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5520 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 7d9020ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x7d9020ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d04: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003cdc -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a64 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1278 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a68 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x7d9020ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=12248 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80003a40 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -310147,231 +42827,122 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5521 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5522 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5523 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5524 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5525 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5526 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003cdc -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003cdc: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a68 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1279 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1280 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1281 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1282 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1283 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1284 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a40 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfd010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967248 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -310383,161 +42954,93 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003cdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5527 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003cdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5528 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003cdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5529 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003cdc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5530 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003ce0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003ce0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r14=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefd8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a40 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1285 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a40 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1286 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a40 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1287 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a40 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1288 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a44 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1412c23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r20 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefd8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -310549,82 +43052,53 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ce0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5531 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003ce4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c01aa03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c01aa03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003ce4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=448 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169c8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a44 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=20 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1289 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a48 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1c01aa03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r3, imm=448 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016d68 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 800163b0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -310632,81 +43106,52 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ce4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5532 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003ce8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003ce8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r12=0, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a48 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1290 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a4c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x3212023 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r18 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefe0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -310714,109 +43159,67 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ce8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5533 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003ce8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5534 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003cec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003cec: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r1=80000d08, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a4c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1291 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a4c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=18 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1292 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a50 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2112623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=44 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefec +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -310824,82 +43227,53 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003cec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5535 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003cf0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 148a2903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x148a2903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003cf0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r20=80016010, imm=328 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016158 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8001615c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a50 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1293 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a54 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x148a2903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r20, imm=328 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 800164f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 800164fc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -310907,81 +43281,52 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003cf0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5536 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003cf4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003cf4: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r8=0, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a54 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=20, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1294 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a58 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2812423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=40 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefe8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -310989,81 +43334,52 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003cf4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5537 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003cf8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003cf8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r9=0, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a58 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1295 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a5c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2912223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=36 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefe4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -311071,81 +43387,52 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003cf8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5538 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003cfc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003cfc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r13=0, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a5c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=9 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1296 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a60 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1312e23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r19 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefdc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -311153,81 +43440,52 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003cfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5539 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1512a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1512a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d00: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r15=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefd4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a60 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=19 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1297 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a64 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1512a23 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r21 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefd4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -311235,165 +43493,52 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5540 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5541 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5542 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5543 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1612823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1612823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d04: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r16=0, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefd0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a64 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=21 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1298 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a68 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1612823 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r22 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefd0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -311401,81 +43546,52 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5544 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1712623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1712623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d08: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r17=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefcc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a68 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=22 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1299 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a6c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1712623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r23 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefcc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -311483,81 +43599,52 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5545 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d0c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r18=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefc8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a6c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=23 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1300 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a70 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1812423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r24 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefc8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -311565,81 +43652,51 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5546 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4090063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4090063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d10: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a70 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=24 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1301 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a74 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x4090063 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r18, r0, imm=64 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) %r22: 00000000 (0) %r23: 00000000 (0) @@ -311647,6926 +43704,4328 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5547 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5548 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5549 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5550 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5551 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5552 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50b13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50b13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d14: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a74 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=18, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1302 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1303 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1304 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1305 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1306 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1307 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a78 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x50b13 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r22 <- r10, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5553 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58b93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58b93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a78 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=22, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1308 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a7c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x58b93 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r23 <- r11, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000000 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5554 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100a93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100a93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a7c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=23, rs1=11, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1309 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a80 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x100a93 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r21 <- r0, imm=1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5555 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d20: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=21, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1310 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=21, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1311 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=21, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1312 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=21, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1313 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a84 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfff00993 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r19 <- r0, imm=4294967295 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5556 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 492483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x492483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d24: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r18=8001615c, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016160 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a84 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1314 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a88 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x492483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r18, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016500 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000001 (0) + %r 9: 00000001 (0) + %r10: 00000001 (0) + %r11: 00000000 (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 800164fc (0) + %r19: ffffffff (0) + %r20: 800163b0 (0) + %r21: 00000001 (0) + %r22: 00000001 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a88 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1315 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a8c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfff48413 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r9, imm=4294967295 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 80000a6c (0) + %r 2: 6fffefc0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000001 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5557 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff48413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff48413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d28: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a8c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=9, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1316 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a90 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2044263 into: branch +DEBUG ../../../../simX/instruction.cpp:712: BLT: r8, r0, imm=36 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000001 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5558 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2044263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2044263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d2c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a90 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=8, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1317 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1318 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1319 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1320 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1321 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1322 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1323 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1324 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a94 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x249493 into: i_type +DEBUG ../../../../simX/instruction.cpp:626: SLLI: r9 <- r9, imm=0x2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000001 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 8001615c (0) - %r19: ffffffff (0) - %r20: 80016010 (0) - %r21: 00000001 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5559 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5560 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5561 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5562 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5563 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5564 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5565 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5566 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 249493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x249493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d08 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000004 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5567 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 9904b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x9904b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d34: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a94 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=9, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1325 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a98 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x9904b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:486: ADDI: r9 <- r18, r9 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 18 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5568 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40b8463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40b8463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d38: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003d80 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a98 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=18, trs2=9 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1326 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003a9c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40b8463 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r23, r0, imm=72 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80003ae4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) - %r15: 00000000 (0) - %r16: 6100000c (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) + %r15: 10000010 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 23 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5569 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5570 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5571 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5572 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5573 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5574 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5575 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d80 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 492783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x492783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d80: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r18=8001615c, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016160 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003a9c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=23, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1327 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1328 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1329 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1330 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1331 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1332 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1333 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ae4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x492783 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r18, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016500 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 71000020 (0) - %r14: 0000000d (0) + %r12: 1000040c (0) + %r13: 10000010 (0) + %r14: 00000009 (0) %r15: 00000001 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5576 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5577 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5578 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d80 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5579 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d84 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 44a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x44a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d84: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r9=80016160, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016164 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000d20 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ae4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1334 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ae4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1335 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ae4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1336 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ae4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1337 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ae8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x44a683 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r13 <- r9, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016504 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000a84 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 0000000d (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) + %r14: 00000009 (0) %r15: 00000001 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d84 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5580 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d88 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff78793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff78793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d88: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ae8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=13, rs1=9, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1338 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003aec +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfff78793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=4294967295 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 0000000d (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) + %r14: 00000009 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d88 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5581 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d8c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4878e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4878e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d8c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003de8 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003aec +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1339 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003af0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x4878e63 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r15, r8, imm=92 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80003b4c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 0000000d (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) + %r14: 00000009 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d8c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5582 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5583 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5584 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5585 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5586 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5587 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5588 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003de8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 892223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x892223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003de8: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r18=8001615c, r8=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016160 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003af0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=15, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1340 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1341 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1342 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1343 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1344 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1345 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1346 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b4c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x892223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r18, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 80016500 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 0000000d (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) + %r14: 00000009 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003de8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5589 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003dec -DEBUG ../../../simX/enc.cpp:105: Curr Code: fa9ff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfa9ff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003dec: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003d94 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b4c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=18, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1347 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b4c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=18, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1348 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b4c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=18, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1349 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b4c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=18, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1350 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b50 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfa9ff06f into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=-88 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80003af8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 0000000d (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) + %r14: 00000009 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5590 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5591 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5592 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5593 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5594 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5595 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d94 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fa0688e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfa0688e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d94: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b50 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1351 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1352 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1353 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1354 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1355 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1356 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003af8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfa0688e3 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r13, r0, imm=-80 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 0000000d (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) + %r14: 00000009 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d94 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5596 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5597 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5598 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5599 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5600 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5601 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d98 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 18892783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x18892783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d98: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r18=8001615c, imm=392 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800162e4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003af8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=13, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1357 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1358 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1359 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1360 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1361 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1362 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003afc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x18892783 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r18, imm=392 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016684 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 0000000d (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) + %r14: 00000009 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d98 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5602 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d9c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8a9733 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8a9733 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d9c: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003afc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1363 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b00 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8a9733 into: r_type +DEBUG ../../../../simX/instruction.cpp:492: SLLI: r14 <- r21, r8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d9c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 21 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5603 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003da0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 492c03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x492c03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003da0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r18=8001615c, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016160 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=21, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1364 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=21, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1365 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=21, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1366 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b00 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=21, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1367 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b04 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x492c03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r24 <- r18, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016500 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003da0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5604 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003da4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f777b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf777b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003da4: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b04 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=24, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1368 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b08 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf777b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:532: ANDI: r15 <- r14, r15 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003da4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5605 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003da8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2079263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2079263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003da8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b08 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=14, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1369 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b0c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2079263 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r15, r0, imm=36 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003da8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5606 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5607 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5608 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5609 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5610 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5611 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5612 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003dac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 680e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x680e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003dac: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r13=80000d20, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000d20 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b0c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=15, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1370 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1371 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1372 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1373 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1374 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1375 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1376 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b10 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x680e7 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r1 <- r13, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a84 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5613 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5614 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5615 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5616 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5617 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5618 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d20: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b10 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=13, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1377 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1378 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1379 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1380 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1381 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1382 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a84 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xff010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=4294967280 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5619 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5620 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5621 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5622 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d24: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r8=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a84 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1383 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a84 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1384 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a84 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1385 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a84 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1386 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a88 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812423 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r8 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefb8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5623 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 800167b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x800167b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d28: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a88 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1387 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a8c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x800167b7 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r15 <- imm=0xfff80016 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 80016000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5624 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80016437 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80016437 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d2c: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a8c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1388 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a90 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x80016437 into: lui +DEBUG ../../../../simX/instruction.cpp:749: LUI: r8 <- imm=0xfff80016 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 80016000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 80016000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5625 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5626 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 440413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x440413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a90 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1389 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a90 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1390 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a94 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x3a440413 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r8, imm=932 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 8: 800163a4 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 80016000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5627 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 478793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x478793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d34: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a94 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1391 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a98 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x3a478793 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r15 <- r15, imm=932 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 8: 800163a4 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) - %r15: 80016004 (0) - %r16: 6100000c (0) + %r15: 800163a4 (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5628 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 408787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x408787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d38: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a98 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1392 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a9c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x408787b3 into: r_type +DEBUG ../../../../simX/instruction.cpp:482: SUBI: r15 <- r15, r8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 8: 800163a4 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5629 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5630 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d3c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r9=80016160, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a9c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1393 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a9c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=15, trs2=8 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1394 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000aa0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x912223 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r9 <- r2, imm=4 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefb4 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 8: 800163a4 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5631 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d40: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r1=80003db0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000aa0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=9 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1395 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000aa4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x112623 into: store +DEBUG ../../../../simX/instruction.cpp:676: SD: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:683: STORE MEM ADDRESS: 6fffefbc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 8: 800163a4 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5632 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5633 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5634 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5635 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4027d493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4027d493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d44: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000aa4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1396 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000aa4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=2, trs2=1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=1 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1397 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000aa8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x4027d493 into: i_type +DEBUG ../../../../simX/instruction.cpp:640: SRAI: r9 <- r15, imm=2 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) + %r 8: 800163a4 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5636 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2048063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2048063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d48: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000d68 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000aa8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=15, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1398 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000aac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2048063 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r9, r0, imm=32 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000acc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) + %r 8: 800163a4 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5637 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5638 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5639 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5640 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5641 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5642 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5643 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d68: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80003db0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000aac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=9, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1399 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1400 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1401 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1402 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1403 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1404 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1405 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000acc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefbc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80003b14 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 80016004 (0) + %r 8: 800163a4 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5644 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d6c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000acc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1406 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000acc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1407 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000acc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1408 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000acc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1409 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ad0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812403 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefb8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5645 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d70: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016160 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ad0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1410 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ad4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x412483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefb4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80016500 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5646 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d74: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ad4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1411 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000ad8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=16 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5647 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d78: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80003db0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003db0 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000ad8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1412 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000adc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80003b14 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000001 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5648 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5649 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5650 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5651 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5652 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5653 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003db0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 492703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x492703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003db0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r18=8001615c, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016160 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000adc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1413 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1414 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1415 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1416 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1417 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1418 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b14 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x492703 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r14 <- r18, imm=4 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016500 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) %r15: 00000000 (0) - %r16: 6100000c (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003db0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5654 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003db4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 148a2783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x148a2783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003db4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r20=80016010, imm=328 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016158 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8001615c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b14 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=14, rs1=18, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1419 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b18 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x148a2783 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r20, imm=328 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 800164f8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 800164fc +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003db4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5655 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003db8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1871463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1871463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003db8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b18 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=20, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1420 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b1c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1871463 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r14, r24, imm=8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003db8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 24 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5656 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5657 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5658 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5659 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5660 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5661 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003dbc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f8f904e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf8f904e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003dbc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003d44 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b1c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=14, trs2=24 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1421 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1422 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1423 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1424 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1425 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1426 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003b20 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xf8f904e3 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r18, r15, imm=-120 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80003aa8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: 00000000 (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dbc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5662 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5663 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5664 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5665 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5666 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5667 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff40413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff40413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d44: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003b20 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=18, trs2=15 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1427 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1428 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1429 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1430 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1431 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1432 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003aa8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xfff40413 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r8 <- r8, imm=4294967295 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: ffffffff (0) - %r 9: 80016160 (0) - %r10: 00000000 (0) + %r 9: 80016500 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5668 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5669 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5670 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5671 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc48493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc48493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003aa8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1433 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003aa8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1434 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003aa8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1435 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003aa8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1436 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003aac +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xffc48493 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r9 <- r9, imm=4294967292 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: ffffffff (0) - %r 9: 8001615c (0) - %r10: 00000000 (0) + %r 9: 800164fc (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5672 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff3416e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff3416e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d4c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 4294967295 rsrc1 : 4294967295 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003aac +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=9, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1437 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ab0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xff3416e3 into: branch +DEBUG ../../../../simX/instruction.cpp:703: BNE: r8, r19, imm=-20 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80003db0 (0) + %r 1: 80003b14 (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: ffffffff (0) - %r 9: 8001615c (0) - %r10: 00000000 (0) + %r 9: 800164fc (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5673 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5674 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5675 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5676 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5677 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5678 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d50: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000d08 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ab0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=8, trs2=19 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1438 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1439 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1440 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1441 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1442 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1443 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ab4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2c12083 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r1 <- r2, imm=44 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 80000a6c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) %r 8: ffffffff (0) - %r 9: 8001615c (0) - %r10: 00000000 (0) + %r 9: 800164fc (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5679 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d54: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=40 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ab4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1444 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ab8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2812403 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r8 <- r2, imm=40 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefe8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 1 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 8001615c (0) - %r10: 00000000 (0) + %r 8: 00000001 (0) + %r 9: 800164fc (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5680 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d58: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=36 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ab8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=8, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1445 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003abc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2412483 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r9 <- r2, imm=36 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefe4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) - %r18: 8001615c (0) + %r18: 800164fc (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5681 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d5c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=32 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003abc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=9, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1446 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ac0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x2012903 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r18 <- r2, imm=32 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefe0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: ffffffff (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5682 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d60 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d60: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ac0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1447 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ac0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1448 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ac0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1449 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ac0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=18, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1450 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ac4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1c12983 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r19 <- r2, imm=28 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefdc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) - %r20: 80016010 (0) + %r20: 800163b0 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d60 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5683 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812a03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812a03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d64: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefd8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ac4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=19, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1451 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ac8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1812a03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r20 <- r2, imm=24 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefd8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) %r20: 00000000 (0) %r21: 00000001 (0) - %r22: 00000000 (0) + %r22: 00000001 (0) %r23: 00000000 (0) %r24: 00000000 (0) %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5684 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d68: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefd4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ac8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=20, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1452 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003acc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1412a83 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r21 <- r2, imm=20 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefd4 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) + %r17: 00000000 (0) + %r18: 00000000 (0) + %r19: 00000000 (0) + %r20: 00000000 (0) + %r21: 00000000 (0) + %r22: 00000001 (0) + %r23: 00000000 (0) + %r24: 00000000 (0) + %r25: 00000000 (0) + %r26: 00000000 (0) + %r27: 00000000 (0) + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003acc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=21, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1453 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ad0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1012b03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r22 <- r2, imm=16 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefd0 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: + %r 0: 00000000 (0) + %r 1: 80000a6c (0) + %r 2: 6fffefc0 (0) + %r 3: 80016ba8 (0) + %r 4: 00000000 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) + %r 7: 00000000 (0) + %r 8: 00000001 (0) + %r 9: 00000000 (0) + %r10: 00000001 (0) + %r11: 00000000 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) + %r14: 00000000 (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -318578,78 +48037,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5685 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d6c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefd0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ad0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=22, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1454 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ad4 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xc12b83 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r23 <- r2, imm=12 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefcc +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -318661,78 +48091,49 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5686 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d70 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12b83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12b83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d70: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefcc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ad4 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=23, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1455 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ad8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x812c03 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r24 <- r2, imm=8 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 6fffefc8 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -318744,158 +48145,47 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d70 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5687 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d74 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d74: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefc8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ad8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=24, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1456 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003adc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x3010113 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r2 <- r2, imm=48 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d74 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 24 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5688 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d78 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d78: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -318907,77 +48197,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d78 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5689 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003d7c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003d7c: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000d08, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000d08 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003adc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=2, rs1=2, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1457 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80003ae0 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x8067 into: jalr +DEBUG ../../../../simX/instruction.cpp:769: JALR: r0 <- r1, imm=0 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a6c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 00000000 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -318989,234 +48250,124 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003d7c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5690 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5691 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5692 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5693 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5694 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5695 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c01a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c01a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d08: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=448 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169c8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80003ae0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1458 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1459 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1460 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1461 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1462 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1463 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a6c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x1c01a503 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r10 <- r3, imm=448 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 80016d68 +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 800163b0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 80016010 (0) + %r10: 800163b0 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 8001615c (0) - %r16: 6100000c (0) + %r15: 800164fc (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -319228,78 +48379,94 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5696 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3c52783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3c52783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d0c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80016010, imm=60 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001604c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800040e0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a6c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1464 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a6c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1465 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a6c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1466 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a6c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=3, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1467 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a70 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x3c52783 into: load +DEBUG ../../../../simX/instruction.cpp:560: LDI: r15 <- r10, imm=60 +DEBUG ../../../../simX/instruction.cpp:578: LOAD MEM ADDRESS: 800163ec +DEBUG ../../../../simX/instruction.cpp:579: LOAD MEM DATA: 0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 80016010 (0) + %r10: 800163b0 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) + %r15: 00000000 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -319311,77 +48478,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5697 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d10: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a70 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=15, rs1=10, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=1 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1468 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a74 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x78463 into: branch +DEBUG ../../../../simX/instruction.cpp:694: BEQ: r15, r0, imm=8 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000a7c +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d08 (0) + %r 1: 80000a6c (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 80016010 (0) + %r10: 800163b0 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) + %r15: 00000000 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -319393,290 +48531,185 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5698 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5699 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5700 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5701 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5702 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5703 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5704 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5705 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d14: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=800040e0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 800040e0 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a74 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=15, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1469 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1470 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1471 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1472 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1473 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1474 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:593: Execute: srcs not ready! +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1475 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1476 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1477 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1478 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a7c +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x40513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r8, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d18 (0) + %r 1: 80000a6c (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 80016010 (0) + %r10: 00000001 (0) %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) + %r15: 00000000 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -319688,232 +48721,48 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5706 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5707 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5708 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5709 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5710 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5711 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8000d5b7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8000d5b7 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040e0: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a7c +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=8, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1479 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000a80 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0xb59ff0ef into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r1 <- imm=-1192 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 800005d8 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d18 (0) + %r 1: 80000a84 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d000 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r10: 00000001 (0) + %r11: 00000000 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) + %r15: 00000000 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -319925,159 +48774,167 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5712 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5713 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5714 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5715 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 63458593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x63458593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040e4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1480 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1481 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1482 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000a80 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1483 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1484 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1485 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1486 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1487 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1488 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800005d8 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x513 into: i_type +DEBUG ../../../../simX/instruction.cpp:586: ADDI: r10 <- r0, imm=0 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d18 (0) + %r 1: 80000a84 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r10: 00000000 (0) + %r11: 00000000 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) + %r15: 00000000 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -320089,77 +48946,93 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) + %r28: 00000000 (0) %r29: 00000000 (0) %r30: 00000000 (0) %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5716 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800040e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 210006f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x210006f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800040e8: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004908 -DEBUG ../../../simX/core.cpp:803: Register state: +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800005d8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=3 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1489 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800005d8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=2 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1490 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800005d8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=1 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1491 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800005d8 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=10, rs1=0, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1492 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x800005dc +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x14c0006f into: jal +DEBUG ../../../../simX/instruction.cpp:757: JAL: r0 <- imm=332 +DEBUG ../../../../simX/instruction.cpp:2278: Next PC: 80000728 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0: 00000000 (0) - %r 1: 80000d18 (0) + %r 1: 80000a84 (0) %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) + %r 3: 80016ba8 (0) %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) + %r 5: 80000bc8 (0) + %r 6: 0000000f (0) %r 7: 00000000 (0) - %r 8: 00000000 (0) + %r 8: 00000001 (0) %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) + %r10: 00000000 (0) + %r11: 00000000 (0) + %r12: 1000040c (0) + %r13: 80000a84 (0) %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) + %r15: 00000000 (0) + %r16: 00000000 (0) %r17: 00000000 (0) %r18: 00000000 (0) %r19: 00000000 (0) @@ -320171,51676 +49044,105 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r25: 00000000 (0) %r26: 00000000 (0) %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800040e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5717 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5718 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5719 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5720 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5721 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5722 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5723 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004908 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004908: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004908 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5724 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004908 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5725 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004908 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5726 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004908 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5727 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000490c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000490c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r12=0, imm=32 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000490c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5728 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004910 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004910: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r13=0, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004910 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5729 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004914 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004914: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r14=0, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefd8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004914 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5730 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004914 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 20 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5731 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004918 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1512a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1512a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004918: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r15=0, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefd4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004918 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 21 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5732 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000491c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1612823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1612823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000491c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r16=0, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefd0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000491c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 22 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5733 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004920 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1712623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1712623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004920: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r17=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefcc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004920 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 23 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5734 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004924 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004924: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r1=80000d18, imm=44 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004924 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5735 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004928 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004928: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r8=0, imm=40 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004928 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5736 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000492c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000492c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefc0, r9=0, imm=36 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000492c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5737 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004930 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50a93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50a93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004930: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004930 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5738 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004934 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58b93 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58b93 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004934: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004934 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5739 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004938 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2e050b13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2e050b13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004938: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004938 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5740 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000493c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a13 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa13 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000493c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000493c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5741 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004940 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 100993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x100993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004940: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004940 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5742 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004940 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5743 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004940 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5744 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004940 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5745 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004944 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004944: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004944 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5746 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004948 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4b2483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4b2483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004948: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r22=800162f0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800162f4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 3 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000003 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004948 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5747 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000494c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8b2403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8b2403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000494c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r22=800162f0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800162f8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800162fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000003 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000494c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5748 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004950 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff48493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff48493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004950: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000002 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004950 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5749 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004954 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 204c863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x204c863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004954: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000002 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 800040e0 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004954 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5750 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5751 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5752 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5753 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5754 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5755 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5756 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004958 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c45783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc45783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004958: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800162fc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016308 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000002 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004958 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5757 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000495c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff48493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff48493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000495c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000495c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5758 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004960 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f9fe63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf9fe63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004960: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004960 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 19 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5759 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5760 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5761 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5762 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5763 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5764 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004964 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e41783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe41783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004964: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800162fc, imm=14 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016308 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 8000d634 (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004964 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5765 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004968 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004968: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004968 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5766 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000496c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a8513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa8513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000496c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000496c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5767 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004970 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1278663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1278663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004970: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004970 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5768 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5769 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5770 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5771 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5772 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5773 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004974 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b80e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb80e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004974: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r23=8000d634, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d634 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004974 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5774 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5775 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5776 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5777 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5778 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5779 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d634 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d634: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5780 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5781 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5782 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5783 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d638 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d638: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r1=80004978, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d638 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5784 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d63c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d63c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r8=800162fc, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d63c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5785 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d640 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d640: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r9=1, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5786 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5787 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5788 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5789 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d644 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d644: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r12=ffffffff, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d644 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5790 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d648 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2058063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2058063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d648: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d648 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5791 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5792 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5793 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5794 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5795 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5796 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d64c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d64c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d64c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5797 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d650 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d650: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d650 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5798 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d654 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d654: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d654 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5799 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5800 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5801 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5802 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5803 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5804 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d658 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3852783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3852783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d658: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80016010, imm=56 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016048 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d658 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5805 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d65c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a078c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa078c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d65c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d65c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5806 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5807 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5808 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5809 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5810 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5811 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5812 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d660 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c41783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc41783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d660: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800162fc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016308 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d660 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5813 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d664 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2079263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2079263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d664: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 4 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d688 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d664 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5814 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5815 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5816 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5817 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5818 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5819 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5820 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d688 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d688: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d688 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5821 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d688 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5822 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d688 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5823 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d688 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5824 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d68c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d68c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d68c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5825 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d690 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f6cf60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf6cf60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d690: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003dfc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d690 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5826 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5827 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5828 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5829 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5830 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5831 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003dfc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c59783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc59783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003dfc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=800162fc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016308 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5832 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e00: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5833 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5834 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5835 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5836 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e04: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r8=800162fc, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5837 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e08: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r13=1, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5838 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e0c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r1=8000d694, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5839 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5840 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e10: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r9=80016010, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5841 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e14: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r12=ffffffff, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 80000d20 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5842 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 87f693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x87f693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5843 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5844 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e20: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5845 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10069a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10069a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e24: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5846 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5847 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5848 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5849 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5850 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5851 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e28: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00001000 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5852 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80070713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80070713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000800 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5853 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 45a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x45a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e30: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=800162fc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016300 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000800 (0) - %r15: 00000004 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5854 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e7e7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe7e7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e34: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000800 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5855 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5856 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f59623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf59623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e38: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r11=800162fc, rf=804, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016308 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000800 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5857 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 18d05463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x18d05463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e3c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:5 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003fc4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000800 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5858 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5859 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5860 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5861 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5862 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5863 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5864 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003fc4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3c5a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3c5a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003fc4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=800162fc, imm=60 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016338 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003fc4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5865 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003fc4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5866 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003fc4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5867 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003fc4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5868 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003fc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e6e04ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe6e04ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003fc8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003fc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5869 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5870 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5871 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5872 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5873 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5874 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5875 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003fcc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f4dff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf4dff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003fcc: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f18 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003fcc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5876 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5877 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5878 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5879 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5880 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5881 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5882 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f1c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000d694 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5883 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f20: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800162fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5884 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f24: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5885 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f28: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ffffffff -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5886 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f2c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef9c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5887 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5888 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f34: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d694, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d694 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5889 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5890 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5891 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5892 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5893 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5894 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d694 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c42783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c42783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d694: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800162fc, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016328 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80009434 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d694 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5895 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d698 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d698: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d698 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5896 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d69c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d69c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d69c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5897 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5898 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5899 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5900 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5901 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5902 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c42583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c42583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800162fc, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016318 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800162fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5903 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5904 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6a8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80009434, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80009434 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800162fc (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5905 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5906 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5907 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5908 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5909 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5910 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009434 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e59583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe59583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009434: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=800162fc, imm=14 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016308 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 804 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009434 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5911 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009434 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5912 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009434 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5913 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009434 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5914 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009438 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a00406f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a00406f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009438: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d5d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009438 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5915 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5916 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5917 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5918 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5919 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5920 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5d8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5921 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5922 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5923 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5924 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5dc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r8=800162fc, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5925 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5e0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r9=80016010, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5926 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5e4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5927 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5928 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5929 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5ec: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r1=8000d6ac, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5930 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2401a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2401a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, r0=0, imm=584 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5931 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d31f20ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd31f20ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5f4: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000324 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5932 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5933 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5934 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5935 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5936 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5937 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000324 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000324: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d5f8, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d5f8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000324 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5938 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000324 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5939 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000324 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5940 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000324 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5941 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5942 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5943 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5944 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5945 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5946 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5f8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5947 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f50c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf50c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5fc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5948 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5949 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5950 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5951 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5952 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5953 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5954 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d600 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d600: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000d6ac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d600 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5955 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d604 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d604: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800162fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d604 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5956 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d608 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d608: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d608 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5957 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d60c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d60c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d60c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5958 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d610 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d610: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d6ac, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6ac -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d610 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5959 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5960 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5961 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5962 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5963 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5964 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6054c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6054c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6ac: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5965 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5966 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5967 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5968 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5969 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5970 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c45783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc45783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6b0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800162fc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016308 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 804 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000804 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5971 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 807f793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x807f793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6b4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5972 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6079e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6079e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5973 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5974 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5975 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5976 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5977 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5978 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5979 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5980 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3042583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3042583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800162fc, imm=48 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 8001632c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5981 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6c0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5982 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5983 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5984 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5985 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5986 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5987 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5988 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5989 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5990 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4442583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4442583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6d8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800162fc, imm=68 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016340 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5991 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6dc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6ec -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5992 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5993 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5994 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5995 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5996 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5997 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5998 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: d19f60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd19f60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6ec: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004404 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f0 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 5999 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6000 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6001 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6002 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6003 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6004 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004404 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004404: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d6f0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6f0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f0 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004404 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6005 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004404 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6006 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004404 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6007 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004404 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6008 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6009 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6010 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6011 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6012 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6013 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800162fc, r0=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016308 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f0 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6014 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d15f60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd15f60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6f4: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004408 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f8 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6015 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6016 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6017 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6018 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6019 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6020 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004408 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004408: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d6f8, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6f8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f8 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004408 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6021 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6022 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6023 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6024 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6025 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6026 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6f8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80004978 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6027 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6fc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800162fc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6028 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d700 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d700: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d700 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6029 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d700 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6030 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d700 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6031 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d700 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6032 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d704 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 90513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x90513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d704: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d704 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6033 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d708 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d708: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ffffffff -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d708 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6034 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d70c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d70c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d70c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6035 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d710 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d710: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80004978, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004978 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d710 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6036 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6037 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6038 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6039 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6040 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6041 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004978 -DEBUG ../../../simX/enc.cpp:105: Curr Code: aa6a33 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xaa6a33 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004978: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800162fc (0) - %r 9: 00000001 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004978 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 20 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6042 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000497c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6840413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6840413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000497c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000001 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000497c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6043 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004980 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd249ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd249ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004980: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 4294967295 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004958 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000001 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004980 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6044 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004980 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6045 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004980 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6046 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004980 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6047 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6048 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6049 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6050 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6051 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6052 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004958 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c45783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc45783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004958: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000001 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004958 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6053 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000495c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff48493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff48493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000495c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000495c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6054 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004960 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f9fe63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf9fe63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004960: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004960 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 19 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6055 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6056 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6057 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6058 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6059 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6060 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004964 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e41783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe41783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004964: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=14 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004964 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6061 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004968 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004968: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004968 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6062 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000496c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a8513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa8513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000496c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000496c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6063 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004970 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1278663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1278663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004970: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004970 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6064 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6065 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6066 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6067 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6068 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6069 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004974 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b80e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb80e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004974: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r23=8000d634, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d634 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004974 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6070 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6071 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6072 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6073 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6074 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6075 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d634 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d634: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6076 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d638 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d638: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r1=80004978, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d638 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6077 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d63c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d63c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r8=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d63c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6078 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d640 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d640: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r9=0, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6079 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6080 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d644 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d644: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r12=ffffffff, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d644 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6081 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d648 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2058063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2058063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d648: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d648 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6082 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6083 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6084 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6085 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6086 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6087 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d64c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d64c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d64c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6088 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d650 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d650: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d650 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6089 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d654 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d654: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d654 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6090 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6091 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6092 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6093 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6094 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6095 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d658 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3852783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3852783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d658: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80016010, imm=56 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016048 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d658 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6096 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d65c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a078c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa078c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d65c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000001 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d65c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6097 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6098 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6099 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6100 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6101 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6102 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6103 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d660 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c41783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc41783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d660: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d660 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6104 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d664 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2079263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2079263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d664: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 10377 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d688 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d664 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6105 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6106 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6107 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6108 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6109 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6110 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6111 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d688 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d688: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d688 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6112 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d68c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d68c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d68c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6113 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d690 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f6cf60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf6cf60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d690: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003dfc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d690 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6114 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6115 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6116 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6117 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6118 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6119 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003dfc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c59783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc59783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003dfc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6120 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e00: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6121 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e04: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r8=80016364, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6122 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e08: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r13=1, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6123 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e0c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r1=8000d694, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6124 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6125 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e10: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r9=80016010, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6126 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e14: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r12=ffffffff, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6127 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 87f693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x87f693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6128 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6129 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e20: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6130 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10069a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10069a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e24: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 8 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f38 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6131 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6132 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6133 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6134 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6135 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6136 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 105a903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x105a903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f38: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6137 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6138 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6139 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6140 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fc090ee3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfc090ee3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f3c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 18 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6141 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6142 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6143 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6144 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6145 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6146 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6147 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f40 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5a483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5a483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f40: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000008 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f40 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6148 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f44 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1079713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1079713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f44: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000008 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 28890000 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f44 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6149 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f48 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1075713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1075713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f48: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000008 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00002889 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f48 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6150 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f4c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 377713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x377713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f4c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000008 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f4c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6151 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f50 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 125a023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x125a023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f50: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r11=80016364, r12=10000008, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 10000008 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6152 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f50 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6153 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f54 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412484b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412484b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f54: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6154 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f54 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6155 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f58 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f58: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f58 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6156 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f5c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 71463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x71463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f5c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f64 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f5c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6157 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6158 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6159 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6160 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6161 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6162 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f64 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f42423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf42423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f64: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, rf=0, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 8001636c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f64 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6163 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f68 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 904863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x904863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f68: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f68 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6164 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6165 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6166 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6167 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6168 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6169 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f6c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fadff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfadff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f6c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f18 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f6c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6170 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6171 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6172 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6173 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6174 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6175 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6176 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f1c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000d694 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6177 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f20: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6178 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f24: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 10000008 (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6179 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f28: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ffffffff -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6180 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f2c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef9c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6181 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6182 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f34: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d694, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d694 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000000 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6183 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6184 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6185 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6186 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6187 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6188 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d694 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c42783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c42783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d694: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016390 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80009434 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d694 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6189 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d698 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d698: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d698 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6190 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d69c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d69c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d69c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6191 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6192 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6193 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6194 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6195 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6196 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c42583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c42583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016380 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6197 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6198 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6a8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80009434, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80009434 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016364 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6199 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6200 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6201 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6202 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6203 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6204 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009434 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e59583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe59583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009434: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016364, imm=14 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009434 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6205 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009434 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6206 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009434 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6207 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009434 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6208 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009438 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a00406f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a00406f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009438: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d5d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009438 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6209 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6210 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6211 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6212 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6213 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6214 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5d8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6215 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5dc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r8=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6216 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5e0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r9=80016010, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6217 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5e4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6218 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6219 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6220 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5ec: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r1=8000d6ac, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6221 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2401a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2401a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, r0=0, imm=584 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6222 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d31f20ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd31f20ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5f4: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000324 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6223 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6224 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6225 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6226 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6227 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6228 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000324 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000324: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d5f8, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d5f8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 80009434 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000324 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6229 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6230 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6231 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6232 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6233 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6234 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5f8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6235 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f50c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf50c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5fc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6236 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6237 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6238 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6239 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6240 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6241 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6242 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d600 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d600: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000d6ac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d600 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6243 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d604 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d604: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d604 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6244 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d608 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d608: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d608 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6245 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d60c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d60c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d60c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6246 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d610 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d610: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d6ac, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6ac -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d610 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6247 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6248 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6249 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6250 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6251 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6252 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6054c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6054c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6ac: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: ffffffff (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6253 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6254 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6255 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6256 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6257 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6258 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c45783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc45783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6b0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 12889 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00002889 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6259 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 807f793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x807f793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6b4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6260 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6079e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6079e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 128 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d734 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 00000001 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6261 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6262 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6263 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6264 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6265 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6266 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6267 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6268 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d734 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1042583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1042583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d734: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016374 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000008 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 00000001 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d734 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6269 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d734 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6270 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d734 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6271 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d734 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6272 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d738 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d738: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d738 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6273 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d73c -DEBUG ../../../simX/enc.cpp:105: Curr Code: e29f60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe29f60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d73c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004564 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d73c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6274 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6275 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6276 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6277 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6278 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6279 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004564 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12058463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12058463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004564: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004564 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6280 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004564 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6281 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004564 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6282 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004564 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6283 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6284 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6285 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6286 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6287 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6288 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004568 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004568: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004568 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6289 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000456c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000456c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r8=80016364, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000456c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6290 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004570 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004570: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r9=80016010, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004570 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6291 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004574 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004574: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004574 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6292 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004574 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6293 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004578 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004578: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004578 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6294 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000457c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000457c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r1=8000d740, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000457c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6295 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004580 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 225030ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x225030ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004580: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007fa4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6296 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6297 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6298 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004580 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6299 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6300 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6301 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6302 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6303 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6304 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007fa4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007fa4: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80004584, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004584 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 6100000c (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6305 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6306 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6307 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6308 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6309 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6310 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6311 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6312 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6313 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004584 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc42803 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc42803 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004584: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=10000008, imm=4294967292 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 10000004 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 409 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 00000001 (0) - %r15: 00000080 (0) - %r16: 00000409 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004584 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6314 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004588 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff840713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff840713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004588: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 10000000 (0) - %r15: 00000080 (0) - %r16: 00000409 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004588 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6315 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000458c -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffe87793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffe87793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000458c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 0000000d (0) - %r13: 00000008 (0) - %r14: 10000000 (0) - %r15: 00000408 (0) - %r16: 00000409 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000458c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 16 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6316 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004590 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f70633 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf70633 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004590: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 10000008 (0) - %r12: 10000408 (0) - %r13: 00000008 (0) - %r14: 10000000 (0) - %r15: 00000408 (0) - %r16: 00000409 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004590 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 14 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6317 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004594 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c3018593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc3018593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004594: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016438 (0) - %r12: 10000408 (0) - %r13: 00000008 (0) - %r14: 10000000 (0) - %r15: 00000408 (0) - %r16: 00000409 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004594 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6318 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004598 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 462683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x462683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004598: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r12=10000408, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 1000040c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: bf9 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016438 (0) - %r12: 10000408 (0) - %r13: 00000bf9 (0) - %r14: 10000000 (0) - %r15: 00000408 (0) - %r16: 00000409 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004598 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6319 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004598 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 12 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6320 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000459c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 85a503 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x85a503 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000459c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=80016438, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016440 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 10000408 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 10000408 (0) - %r13: 00000bf9 (0) - %r14: 10000000 (0) - %r15: 00000408 (0) - %r16: 00000409 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000459c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6321 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800045a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ffc6f693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xffc6f693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800045a0: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 10000408 (0) - %r13: 00000bf8 (0) - %r14: 10000000 (0) - %r15: 00000408 (0) - %r16: 00000409 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800045a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 13 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6322 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800045a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1ac50663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1ac50663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800045a4: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004750 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 10000408 (0) - %r13: 00000bf8 (0) - %r14: 10000000 (0) - %r15: 00000408 (0) - %r16: 00000409 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800045a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6323 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800045a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6324 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800045a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6325 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6326 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6327 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6328 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6329 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6330 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004750 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 187813 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x187813 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004750: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 10000408 (0) - %r13: 00000bf8 (0) - %r14: 10000000 (0) - %r15: 00000408 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004750 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 16 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6331 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004750 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 16 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6332 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004750 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 16 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6333 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004750 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 16 rs1: 16 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6334 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004754 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d787b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd787b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004754: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 10000408 (0) - %r13: 00000bf8 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004754 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6335 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004758 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2081063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2081063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004758: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 1 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004778 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 10000408 (0) - %r13: 00000bf8 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004758 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 16 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6336 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6337 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6338 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6339 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6340 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6341 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004778 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 17e613 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x17e613 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004778: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00000bf8 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004778 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 12 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6342 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000477c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1e01a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1e01a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000477c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r3=80016808, imm=480 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800169e8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 20000 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000477c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 3 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6343 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c72223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc72223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004780: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r14=10000000, rc=1001, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 10000004 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6344 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6345 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6346 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 14 rs2: 12 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6347 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004784 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e5a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe5a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004784: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r11=80016438, re=10000000, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016440 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004784 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6348 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004788 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ead7e8e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xead7e8e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004788: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:6 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004638 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 10000008 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004788 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6349 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6350 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6351 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6352 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6353 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6354 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004638 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004638: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004584 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004638 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6355 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004638 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6356 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004638 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6357 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004638 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6358 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000463c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000463c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000d740 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 10000408 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000463c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6359 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004640 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004640: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6360 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6361 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6362 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6363 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004644 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004644: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004644 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6364 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004648 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004648: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004648 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6365 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000464c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 15d0306f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x15d0306f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000464c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80007fa8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000464c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6366 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6367 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6368 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6369 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6370 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6371 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80007fa8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80007fa8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d740, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d740 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6372 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6373 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6374 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80007fa8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6375 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6376 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6377 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6378 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6379 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6380 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d740 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f7dff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf7dff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d740: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6bc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 80016438 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d740 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6381 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d740 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6382 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d740 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6383 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d740 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6384 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6385 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6386 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6387 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6388 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6389 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3042583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3042583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=48 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016394 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6390 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6c0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6391 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6392 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6393 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6394 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6395 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6396 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6397 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4442583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4442583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6d8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=80016364, imm=68 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163a8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6398 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6dc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6ec -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d740 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6399 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6400 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6401 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6402 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6403 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6404 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6405 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: d19f60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd19f60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6ec: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004404 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f0 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6406 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6407 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6408 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6409 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6410 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6411 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004404 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004404: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d6f0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6f0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f0 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004404 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6412 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004404 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6413 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004404 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6414 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004404 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6415 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6416 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6417 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6418 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6419 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6420 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=80016364, r0=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016370 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f0 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6421 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d15f60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd15f60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6f4: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004408 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f8 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6422 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6423 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6424 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6425 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6426 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6427 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004408 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004408: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d6f8, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6f8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f8 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004408 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6428 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6429 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6430 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6431 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6432 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6433 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6f8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80004978 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6434 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6fc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016364 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6435 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d700 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d700: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 80016010 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d700 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6436 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d704 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 90513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x90513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d704: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d704 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6437 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d708 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d708: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ffffffff -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d708 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6438 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d70c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d70c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d70c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6439 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d710 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d710: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80004978, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004978 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d710 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6440 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6441 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6442 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6443 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6444 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6445 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004978 -DEBUG ../../../simX/enc.cpp:105: Curr Code: aa6a33 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xaa6a33 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004978: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016364 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004978 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 20 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6446 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000497c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6840413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6840413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000497c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000497c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6447 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004980 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd249ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd249ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004980: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 4294967295 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004958 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00001000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004980 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6448 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6449 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6450 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6451 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6452 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6453 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004958 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c45783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc45783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004958: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800163cc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163d8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 20012 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004958 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6454 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000495c -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff48493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff48493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000495c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000495c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6455 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004960 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f9fe63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf9fe63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004960: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:7 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004960 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 19 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6456 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6457 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6458 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6459 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6460 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6461 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004964 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e41783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe41783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004964: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800163cc, imm=14 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163d8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 20012 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004964 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6462 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004968 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004968: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004968 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6463 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000496c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a8513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa8513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000496c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000496c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 21 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6464 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004970 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1278663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1278663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004970: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004970 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6465 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6466 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6467 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6468 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6469 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6470 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004974 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b80e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb80e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004974: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r23=8000d634, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d634 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004974 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 23 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6471 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6472 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6473 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6474 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6475 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6476 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d634 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d634: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6477 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6478 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6479 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6480 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d638 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d638: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r1=80004978, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d638 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6481 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d63c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d63c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r8=800163cc, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d63c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6482 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d640 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d640: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r9=ffffffff, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6483 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6484 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6485 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d640 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6486 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d644 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212023 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212023 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d644: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefb0, r12=ffffffff, imm=0 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefb0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d644 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6487 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d648 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2058063 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2058063 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d648: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d648 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6488 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6489 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6490 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6491 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6492 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6493 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d64c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d64c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d64c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6494 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d650 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50493 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50493 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d650: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d650 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6495 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d654 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50663 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50663 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d654: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000002 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d654 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6496 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6497 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6498 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6499 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6500 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6501 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d658 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3852783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3852783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d658: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r10=80016010, imm=56 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016048 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000001 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d658 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6502 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d65c -DEBUG ../../../simX/enc.cpp:105: Curr Code: a078c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa078c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d65c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000001 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d65c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6503 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6504 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6505 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6506 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6507 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6508 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6509 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d660 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c41783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc41783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d660: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800163cc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163d8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 20012 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d660 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6510 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d664 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2079263 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2079263 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d664: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 18 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d688 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d664 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6511 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6512 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6513 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6514 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6515 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6516 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6517 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d688 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40593 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40593 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d688: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d688 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6518 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d68c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d68c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d68c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6519 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d690 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f6cf60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf6cf60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d690: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003dfc -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d690 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6520 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6521 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6522 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6523 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6524 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6525 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003dfc -DEBUG ../../../simX/enc.cpp:105: Curr Code: c59783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc59783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003dfc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=800163cc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163d8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 20012 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003dfc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6526 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e00 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fe010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfe010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e00: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6527 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6528 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6529 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e00 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6530 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e04 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812c23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812c23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e04: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r8=800163cc, imm=24 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e04 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6531 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e08 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1312623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1312623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e08: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r13=1, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffef9c -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e08 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 19 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6532 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e0c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112e23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112e23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e0c: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r1=8000d694, imm=28 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6533 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e0c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6534 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e10 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912a23 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912a23 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e10: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r9=80016010, imm=20 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e10 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6535 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e14 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1212823 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1212823 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e14: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffef90, r12=ffffffff, imm=16 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00020000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e14 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6536 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 87f693 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x87f693 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6537 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e1c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6538 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50993 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50993 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e20: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6539 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 10069a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x10069a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e24: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 10000000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 13 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6540 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6541 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6542 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6543 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6544 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6545 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1737 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1737 into: lui - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e28: lui -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:810: LUI_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00001000 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6546 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 80070713 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x80070713 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e2c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000800 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 14 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6547 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 45a683 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x45a683 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e30: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=800163cc, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163d0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000800 (0) - %r15: 00000012 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 13 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6548 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e7e7b3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe7e7b3 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e34: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000800 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6549 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6550 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e38 -DEBUG ../../../simX/enc.cpp:105: Curr Code: f59623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf59623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e38: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r11=800163cc, rf=812, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163d8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000800 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e38 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6551 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003e3c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 18d05463 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x18d05463 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003e3c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:5 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003fc4 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000800 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003e3c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 13 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6552 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6553 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6554 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6555 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6556 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6557 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6558 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003fc4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3c5a703 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3c5a703 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003fc4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=800163cc, imm=60 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016408 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003fc4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 14 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6559 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003fc8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e6e04ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe6e04ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003fc8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003fc8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 0 rs2: 14 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6560 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6561 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6562 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6563 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6564 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6565 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6566 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6567 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6568 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003fcc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f4dff06f -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf4dff06f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003fcc: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80003f18 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003fcc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6569 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6570 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6571 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6572 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6573 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6574 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6575 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6576 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6577 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6578 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f1c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000d694 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6579 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f20 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f20: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800163cc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f20 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6580 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f24 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f24: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f24 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6581 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f28 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f28: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ffffffff -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 80016010 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f28 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6582 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f2c -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f2c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffef90, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffef9c -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 1 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffef90 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f2c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6583 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f30 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f30: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f30 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6584 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80003f34 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80003f34: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d694, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d694 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80003f34 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6585 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6586 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6587 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6588 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6589 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6590 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d694 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c42783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c42783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d694: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800163cc, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163f8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80009434 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d694 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6591 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d698 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50913 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50913 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d698: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d698 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6592 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d69c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 78a63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x78a63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d69c: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d69c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6593 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6594 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6595 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6596 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6597 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6598 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c42583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c42583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800163cc, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163e8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800163cc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000000 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6599 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 48513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x48513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6a4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d694 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 9 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6600 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 780e7 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x780e7 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6a8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r15=80009434, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80009434 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 800163cc (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6601 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6602 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6603 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6604 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6605 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6606 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009434 -DEBUG ../../../simX/enc.cpp:105: Curr Code: e59583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xe59583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009434: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r11=800163cc, imm=14 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163d8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 20812 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009434 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6607 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80009438 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1a00406f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1a00406f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80009438: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d5d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80009438 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6608 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6609 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6610 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6611 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6612 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6613 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: ff010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xff010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5d8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6614 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5dc: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r8=800163cc, imm=8 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 8 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6615 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5e0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 912223 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x912223 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5e0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r9=80016010, imm=4 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 9 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6616 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5e4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 50413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x50413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5e4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 80016010 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6617 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 10 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6618 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5e8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5e8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5e8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 11 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6619 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: 112623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x112623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5ec: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r2=6fffefa0, r1=8000d6ac, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 2 rs2: 1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6620 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2401a423 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2401a423 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r3=80016808, r0=0, imm=584 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 80016a50 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 3 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6621 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d31f20ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd31f20ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5f4: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000324 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6622 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6623 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6624 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6625 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6626 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6627 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000324 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000324: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d5f8, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d5f8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 80009434 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000324 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6628 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6629 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6630 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6631 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6632 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6633 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fff00793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfff00793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5f8: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6634 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d5fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: f50c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xf50c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d5fc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d5f8 (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d5fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 15 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6635 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6636 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6637 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6638 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6639 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6640 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6641 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d600 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d600: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefac -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 8000d6ac -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016010 (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d600 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6642 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d600 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6643 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d600 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6644 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d600 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6645 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d604 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d604: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800163cc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d604 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6646 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d608 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d608: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefa0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefa4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80016010 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefa0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d608 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6647 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d60c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d60c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d60c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6648 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d610 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d610: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d6ac, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6ac -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d610 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6649 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6650 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6651 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6652 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6653 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6654 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6054c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6054c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6ac: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:4 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: ffffffff (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6655 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6656 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6657 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6658 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6659 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6660 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c45783 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc45783 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6b0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800163cc, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163d8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 20812 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000812 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6661 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 807f793 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x807f793 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6b4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 15 rs1: 15 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6662 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6079e63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6079e63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6b8: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000002 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 15 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6663 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6664 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6665 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6666 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6667 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6668 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6669 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6670 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6bc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3042583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3042583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6bc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800163cc, imm=48 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800163fc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6bc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6671 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6c0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58c63 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58c63 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6c0: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6d8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6c0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6672 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6673 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6674 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6675 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6676 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6677 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6678 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6d8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 4442583 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x4442583 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6d8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r8=800163cc, imm=68 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 80016410 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6d8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 11 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6679 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6dc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 58863 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x58863 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6dc: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6ec -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6ac (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6dc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 11 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6680 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6681 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6682 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6683 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6684 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6685 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6686 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6ec -DEBUG ../../../simX/enc.cpp:105: Curr Code: d19f60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd19f60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6ec: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004404 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f0 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6ec -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6687 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6688 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6689 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6690 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6691 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6692 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004404 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004404: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d6f0, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6f0 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f0 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004404 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6693 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6694 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6695 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6696 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6697 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6698 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6f0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 41623 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x41623 into: store - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6f0: store -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:715: S_INST: r8=800163cc, r0=0, imm=12 -DEBUG ../../../simX/instruction.cpp:718: STORE MEM ADDRESS: 800163d8 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f0 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6f0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 8 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 1 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6699 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6f4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: d15f60ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0xd15f60ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6f4: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004408 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f8 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6f4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6700 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6701 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6702 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6703 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6704 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6705 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004408 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004408: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=8000d6f8, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 8000d6f8 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 8000d6f8 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004408 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6706 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6707 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6708 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6709 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6710 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6711 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6f8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6f8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefbc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80004978 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6f8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6712 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d6fc -DEBUG ../../../simX/enc.cpp:105: Curr Code: 812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d6fc: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=8 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 800163cc -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: 80016010 (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d6fc -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6713 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d700 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d700: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=4 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ffffffff -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 00000002 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d700 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6714 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d700 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6715 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d700 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6716 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d700 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6717 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d704 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 90513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x90513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d704: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d704 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 18 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6718 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d708 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 12903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x12903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d708: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefb0, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefb0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: ffffffff -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefb0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d708 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6719 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d70c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d70c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d70c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6720 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000d710 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000d710: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80004978, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80004978 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000d710 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6721 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6722 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6723 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6724 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6725 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6726 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004978 -DEBUG ../../../simX/enc.cpp:105: Curr Code: aa6a33 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xaa6a33 into: r_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004978: r_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 800163cc (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004978 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 20 rs2: 10 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6727 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000497c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 6840413 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x6840413 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000497c: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016434 (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000497c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6728 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004980 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fd249ce3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfd249ce3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004980: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 4294967295 rsrc1 : 4294967295 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016434 (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 800162f0 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004980 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 9 rs2: 18 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6729 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6730 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6731 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6732 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6733 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6734 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004984 -DEBUG ../../../simX/enc.cpp:105: Curr Code: b2b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xb2b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004984: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r22=800162f0, imm=0 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 800162f0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016434 (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004984 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 22 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6735 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004988 -DEBUG ../../../simX/enc.cpp:105: Curr Code: fc0b10e3 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xfc0b10e3 into: branch - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004988: branch -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:755: func3:1 - -DEBUG ../../../simX/instruction.cpp:768: rsrc0: 0 rsrc1 : 0 - -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80004978 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016434 (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004988 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: 22 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6736 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6737 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6738 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:610: &&&&&&&&&&&&&&&&&&&&&&&& EXECUTE SRCS NOT READY -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6739 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6740 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6741 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6742 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000498c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2c12083 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2c12083 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000498c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=44 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefec -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 80000d18 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 80016434 (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000498c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6743 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004990 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2812403 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2812403 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004990: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=40 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: ffffffff (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004990 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 8 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6744 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004994 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2412483 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2412483 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004994: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=36 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: ffffffff (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004994 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 9 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6745 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80004998 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 2012903 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x2012903 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80004998: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=32 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefe0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000001 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80004998 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 18 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6746 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x8000499c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1c12983 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1c12983 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x8000499c: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=28 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefdc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 80016010 (0) - %r22: 00000000 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 8000499c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 19 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6747 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800049a0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1412a83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1412a83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800049a0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=20 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefd4 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800049a0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 21 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6748 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800049a4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1012b03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1012b03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800049a4: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=16 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefd0 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 8000d634 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800049a4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 22 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6749 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800049a8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: c12b83 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xc12b83 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800049a8: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=12 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefcc -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800049a8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 23 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6750 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800049ac -DEBUG ../../../simX/enc.cpp:105: Curr Code: a0513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0xa0513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800049ac: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800049ac -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 20 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6751 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800049b0 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 1812a03 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x1812a03 into: load - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800049b0: load -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:589: L_INST: r2=6fffefc0, imm=24 -DEBUG ../../../simX/instruction.cpp:597: LOAD MEM ADDRESS: 6fffefd8 -DEBUG ../../../simX/instruction.cpp:598: LOAD MEM DATA: 0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffefc0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800049b0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 20 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 1 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6752 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800049b4 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 3010113 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x3010113 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800049b4: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800049b4 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 2 rs1: 2 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6753 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x800049b8 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 8067 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x8067 into: jalr - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x800049b8: jalr -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:829: JALR_INST: r1=80000d18, imm=0 -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000d18 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 800049b8 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6754 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6755 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6756 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6757 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6758 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6759 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d18 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 40513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x40513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d18: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d18 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d18 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 8 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6760 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000d1c -DEBUG ../../../simX/enc.cpp:105: Curr Code: 915ff0ef -DEBUG ../../../simX/enc.cpp:327: Decoded 0x915ff0ef into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000d1c: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000630 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d20 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000d1c -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6761 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6762 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6763 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6764 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6765 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6766 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000630 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 513 -DEBUG ../../../simX/enc.cpp:327: Decoded 0x513 into: i_type - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000630: i_type -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d20 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000630 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6767 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000630 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6768 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000630 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6769 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000630 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 10 rs1: 0 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6770 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000634 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 14c0006f -DEBUG ../../../simX/enc.cpp:327: Decoded 0x14c0006f into: jal - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000634: jal -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:818: JAL_INST -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/instruction.cpp:2449: Next PC: 80000780 -DEBUG ../../../simX/core.cpp:803: Register state: - %r 0: 00000000 (0) - %r 1: 80000d20 (0) - %r 2: 6fffeff0 (0) - %r 3: 80016808 (0) - %r 4: 00000000 (0) - %r 5: 80000e64 (0) - %r 6: 00000005 (0) - %r 7: 00000000 (0) - %r 8: 00000000 (0) - %r 9: 00000000 (0) - %r10: 00000000 (0) - %r11: 00000000 (0) - %r12: 00001001 (0) - %r13: 00000000 (0) - %r14: 00000000 (0) - %r15: 00000000 (0) - %r16: 00000001 (0) - %r17: 00000000 (0) - %r18: 00000000 (0) - %r19: 00000000 (0) - %r20: 00000000 (0) - %r21: 00000000 (0) - %r22: 00000000 (0) - %r23: 00000000 (0) - %r24: 00000000 (0) - %r25: 00000000 (0) - %r26: 00000000 (0) - %r27: 00000000 (0) - %r28: 00000003 (0) - %r29: 00000000 (0) - %r30: 00000000 (0) - %r31: 00000000 (0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 1 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 1 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000634 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6771 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6772 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6773 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6774 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6775 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 1, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:692: Warp ID 0 is running -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6776 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 0 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:417: Core step stepping warp 0[1] -DEBUG ../../../simX/core.cpp:770: in step pc=0x80000780 -DEBUG ../../../simX/enc.cpp:105: Curr Code: 5006b -DEBUG ../../../simX/enc.cpp:327: Decoded 0x5006b into: gpgpu - -DEBUG ../../../simX/core.cpp:790: Fetched at 0x80000780: gpgpu -DEBUG ../../../simX/instruction.cpp:350: Begin instruction execute. -DEBUG ../../../simX/instruction.cpp:1072: TMC -DEBUG ../../../simX/instruction.cpp:2428: End instruction execute. -DEBUG ../../../simX/core.cpp:803: Register state: + %r28: 00000000 (0) + %r29: 00000000 (0) + %r30: 00000000 (0) + %r31: 00000000 (0) +DEBUG ../../../../simX/core.cpp:790: Thread mask: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=800005dc +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1493 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1494 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1495 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1496 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1497 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 1 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1498 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 0 0 0 0 +DEBUG ../../../../simX/core.cpp:750: current PC=0x80000728 +DEBUG ../../../../simX/enc.cpp:324: Decoded instr 0x5006b into: gpgpu +DEBUG ../../../../simX/instruction.cpp:982: TMC: r10 +DEBUG ../../../../simX/core.cpp:781: Register state: %r 0:(0) %r 1:(0) %r 2:(0) @@ -371873,272 +49175,100 @@ DEBUG ../../../simX/core.cpp:803: Register state: %r29:(0) %r30:(0) %r31:(0) -DEBUG ../../../simX/core.cpp:812: Thread mask: - 0 0 0 0 - - -DEBUG ../../../simX/core.cpp:421: Now 0 active threads in 0 -DEBUG ../../../simX/core.cpp:424: Got cache delays -DEBUG ../../../simX/core.cpp:429: staled warps - -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 3 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6777 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 2 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6778 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 1 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6779 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 1 -DEBUG ../../../simX/core.cpp:85: PC: 80000780 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: 0 rs1: 10 rs2: 0 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 1 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6780 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6781 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 2 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0 -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6782 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 3 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6783 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 0 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step -DEBUG ../../../simX/core.cpp:172: - - ------------------------------------------------------- -DEBUG ../../../simX/core.cpp:174: Started core::step -DEBUG ../../../simX/core.cpp:178: CYCLE: 6784 -DEBUG ../../../simX/core.cpp:180: Stalled Warps: 1 0 0 0 -DEBUG ../../../simX/core.cpp:557: $$$$$$$$$$$$$$$$$$$ EXE START - -DEBUG ../../../simX/core.cpp:624: EXECUTE END -DEBUG ../../../simX/core.cpp:402: Threads: -DEBUG ../../../simX/core.cpp:431: About to schedule warp - -DEBUG ../../../simX/core.cpp:433: Scheduled warp -DEBUG ../../../simX/core.cpp:442: Printing trace -DEBUG ../../../simX/core.cpp:83: ********************************** Fetch ********************************* -DEBUG ../../../simX/core.cpp:84: valid: 0 -DEBUG ../../../simX/core.cpp:85: PC: 0 -DEBUG ../../../simX/core.cpp:86: wid: 1 -DEBUG ../../../simX/core.cpp:87: rd: -1 rs1: -1 rs2: -1 -DEBUG ../../../simX/core.cpp:88: is_lw: 0 -DEBUG ../../../simX/core.cpp:89: is_sw: 0 -DEBUG ../../../simX/core.cpp:90: fetch_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:91: mem_stall_cycles: 0 -DEBUG ../../../simX/core.cpp:93: stall_warp: 0 -DEBUG ../../../simX/core.cpp:94: wspawn: 0 -DEBUG ../../../simX/core.cpp:95: stalled: 0 -DEBUG ../../../simX/core.cpp:444: printed trace -DEBUG ../../../simX/core.cpp:447: active threads: 0, 0, 0, 0, -DEBUG ../../../simX/core.cpp:214: released warp -DEBUG ../../../simX/core.cpp:215: Finished core::step +DEBUG ../../../../simX/core.cpp:790: Thread mask: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:416: ** warp #0 active threads changed from 1 to 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=1 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=80000728 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=0, rs1=10, trs2=0 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=1 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1499 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1500 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=2 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1501 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=3 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1502 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=0 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 +DEBUG ../../../../simX/core.cpp:170: ########################################################### +DEBUG ../../../../simX/core.cpp:174: cycle: 1503 +DEBUG ../../../../simX/core.cpp:176: stalled warps: 1 0 0 0 +DEBUG ../../../../simX/core.cpp:83: Fetch: valid=0 +DEBUG ../../../../simX/core.cpp:84: Fetch: PC=0 +DEBUG ../../../../simX/core.cpp:85: Fetch: wid=1 +DEBUG ../../../../simX/core.cpp:86: Fetch: rd=-1, rs1=-1, trs2=-1 +DEBUG ../../../../simX/core.cpp:87: Fetch: is_lw=0 +DEBUG ../../../../simX/core.cpp:88: Fetch: is_sw=0 +DEBUG ../../../../simX/core.cpp:89: Fetch: fetch_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:90: Fetch: mem_stall_cycles=0 +DEBUG ../../../../simX/core.cpp:91: Fetch: stall_warp=0 +DEBUG ../../../../simX/core.cpp:92: Fetch: wspawn=0 +DEBUG ../../../../simX/core.cpp:93: Fetch: stalled=0 +DEBUG ../../../../simX/core.cpp:437: active threads: 0 0 0 0 0 0 0 0 Device ready... +download destination buffer +verify result +cleanup Device shutdown... +FAILED! +Makefile:55: recipe for target 'run-simx' failed +make: *** [run-simx] Error 64 diff --git a/driver/tests/results.txt b/driver/tests/results.txt deleted file mode 100644 index e69de29b..00000000 diff --git a/rtl/Makefile b/rtl/Makefile index 348bdb62..d3ae30f5 100644 --- a/rtl/Makefile +++ b/rtl/Makefile @@ -48,7 +48,7 @@ VERILATORnoWarningsRel: build_config verilator $(VF) -cc $(SINGLE_CORE) $(INCLUDE) $(EXE) $(LIB) -CFLAGS '$(CF) -O3 -DVL_THREADED' $(WNO) --threads $(THREADS) VERILATORMULTInoWarnings: build_config - verilator $(VF) -cc $(MULTI_CORE) $(INCLUDE) $(MULTI_EXE) $(LIB) -CFLAGS '$(CF) -O3 -DVL_THREADED' $(WNO) $(DEB) --threads $(THREADS) + verilator $(VF) -cc $(MULTI_CORE) $(INCLUDE) $(MULTI_EXE) $(LIB) -CFLAGS '$(CF)' $(WNO) $(DEB) compdebug: build_config verilator_bin_dbg $(VF) -cc $(SINGLE_CORE) $(INCLUDE) $(EXE) $(LIB) -CFLAGS '$(CF) -DVCD_OUTPUT -DVL_DEBUG' $(WNO) $(DEB) diff --git a/runtime/intrinsics/vx_intrinsics.h b/runtime/intrinsics/vx_intrinsics.h index e7e097a2..26a765f3 100644 --- a/runtime/intrinsics/vx_intrinsics.h +++ b/runtime/intrinsics/vx_intrinsics.h @@ -8,29 +8,27 @@ extern "C" { #endif // Spawns Warps -void vx_wspawn (unsigned numWarps, unsigned PC_spawn); +void vx_wspawn(unsigned numWarps, unsigned PC_spawn); // Changes thread mask (activated/deactivates threads) -void vx_tmc (unsigned numThreads); +void vx_tmc(unsigned numThreads); // Warp Barrier void vx_barrier(unsigned barriedID, unsigned numWarps); // split on a predicate -void vx_split (unsigned predicate); - +void vx_split(unsigned predicate); // Join -void vx_join (void); - +void vx_join(void); // Get Hardware thread ID unsigned vx_threadID(void); - // Get hardware warp ID unsigned vx_warpID(void); +// Get global warp number unsigned vx_warpNum(void); // Get Number cycles/Inst @@ -39,16 +37,13 @@ unsigned vx_getInst(void); void vx_resetStack(void); - #define __if(b) vx_split(b); \ if (b) #define __else else - #define __endif vx_join(); - #ifdef __cplusplus } #endif diff --git a/runtime/intrinsics/vx_intrinsics.s b/runtime/intrinsics/vx_intrinsics.s index 5b328ee8..4ecdaa04 100644 --- a/runtime/intrinsics/vx_intrinsics.s +++ b/runtime/intrinsics/vx_intrinsics.s @@ -1,9 +1,5 @@ - - - .section .text - .type vx_wspawn, @function .global vx_wspawn vx_wspawn: @@ -16,7 +12,6 @@ vx_tmc: .word 0x0005006b # tmc a0 ret - .type vx_barrier, @function .global vx_barrier vx_barrier: @@ -35,12 +30,12 @@ vx_join: .word 0x0000306b #join ret - .type vx_warpID, @function .global vx_warpID vx_warpID: csrr a0, 0x21 # read warp IDs ret + .type vx_warpNum, @function .global vx_warpNum vx_warpNum: @@ -59,14 +54,12 @@ vx_getCycles: csrr a0, 0x26 # read thread IDs ret - .type vx_getInst, @function .global vx_getInst vx_getInst: csrr a0, 0x25 # read thread IDs ret - .type vx_resetStack, @function .global vx_resetStack vx_resetStack: @@ -89,4 +82,4 @@ vx_resetStack: .word 0x0005006b # tmc 0 RETURN: ret - + \ No newline at end of file diff --git a/runtime/mains/dev/Makefile b/runtime/mains/dev/Makefile index f78a9d66..9cd9d302 100644 --- a/runtime/mains/dev/Makefile +++ b/runtime/mains/dev/Makefile @@ -11,7 +11,7 @@ DMP = $(TOOLPATH)/riscv32-unknown-elf-objdump CPY = $(TOOLPATH)/riscv32-unknown-elf-objcopy -VX_STR = ../../startup/vx_start.s +VX_STR = ../../startup/vx_start.S VX_INT = ../../intrinsics/vx_intrinsics.s VX_IO = ../../io/vx_io.s ../../io/vx_io.c VX_API = ../../vx_api/vx_api.c diff --git a/runtime/mains/nativevecadd/Makefile b/runtime/mains/nativevecadd/Makefile index d6aceb81..d1b571b2 100644 --- a/runtime/mains/nativevecadd/Makefile +++ b/runtime/mains/nativevecadd/Makefile @@ -7,12 +7,12 @@ CC_FLAGS = -ffreestanding -O0 -Wl,--gc-sections -nostartfiles -nostdlib -nostart DMP = ../../../../riscv-gnu-toolchain/drops/bin/riscv32-unknown-elf-objdump CPY = ../../../../riscv-gnu-toolchain/drops/bin/riscv32-unknown-elf-objcopy -# VX_STR = ../../startup/vx_start.s +# VX_STR = ../../startup/vx_start.S NEWLIB = ../../newlib/newlib.c -VX_STR = ../../startup/vx_start.s +VX_STR = ../../startup/vx_start.S VX_INT = ../../intrinsics/vx_intrinsics.s VX_IO = ../../io/vx_io.s ../../io/vx_io.c VX_API = ../../vx_api/vx_api.c diff --git a/runtime/mains/nlTest/Makefile b/runtime/mains/nlTest/Makefile index f9f94a5b..83cc38fc 100644 --- a/runtime/mains/nlTest/Makefile +++ b/runtime/mains/nlTest/Makefile @@ -8,7 +8,7 @@ CPY = /opt/riscv/bin/riscv32-unknown-elf-objcopy NEWLIB = ../../newlib/newlib.c ../../newlib/newlib_notimp.c ../../newlib/newlib.s -VX_STR = ../../startup/vx_start.s +VX_STR = ../../startup/vx_start.S VX_INT = ../../intrinsics/vx_intrinsics.s VX_IO = ../../io/vx_io.s ../../io/vx_io.c VX_API = ../../vx_api/vx_api.c diff --git a/runtime/mains/simple/Makefile b/runtime/mains/simple/Makefile index 4f878ec0..118134f9 100644 --- a/runtime/mains/simple/Makefile +++ b/runtime/mains/simple/Makefile @@ -7,7 +7,7 @@ CPY = /opt/riscv-new/drops/bin/riscv32-unknown-elf-objcopy NEWLIB = ../../newlib/newlib.c -VX_STR = ../../startup/vx_start.s +VX_STR = ../../startup/vx_start.S VX_INT = ../../intrinsics/vx_intrinsics.s VX_IO = ../../io/vx_io.s ../../io/vx_io.c VX_API = ../../vx_api/vx_api.c diff --git a/runtime/mains/vecadd/Makefile b/runtime/mains/vecadd/Makefile index d6aceb81..d1b571b2 100644 --- a/runtime/mains/vecadd/Makefile +++ b/runtime/mains/vecadd/Makefile @@ -7,12 +7,12 @@ CC_FLAGS = -ffreestanding -O0 -Wl,--gc-sections -nostartfiles -nostdlib -nostart DMP = ../../../../riscv-gnu-toolchain/drops/bin/riscv32-unknown-elf-objdump CPY = ../../../../riscv-gnu-toolchain/drops/bin/riscv32-unknown-elf-objcopy -# VX_STR = ../../startup/vx_start.s +# VX_STR = ../../startup/vx_start.S NEWLIB = ../../newlib/newlib.c -VX_STR = ../../startup/vx_start.s +VX_STR = ../../startup/vx_start.S VX_INT = ../../intrinsics/vx_intrinsics.s VX_IO = ../../io/vx_io.s ../../io/vx_io.c VX_API = ../../vx_api/vx_api.c diff --git a/runtime/mains/vector_test/Makefile b/runtime/mains/vector_test/Makefile index 830dd1f0..c07722d8 100644 --- a/runtime/mains/vector_test/Makefile +++ b/runtime/mains/vector_test/Makefile @@ -9,12 +9,12 @@ DMP = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objdump CPY = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objcopy -# VX_STR = ../../startup/vx_start.s +# VX_STR = ../../startup/vx_start.S NEWLIB = ../../newlib/newlib.c -VX_STR = ../../startup/vx_start.s +VX_STR = ../../startup/vx_start.S VX_INT = ../../intrinsics/vx_intrinsics.s VX_IO = ../../io/vx_io.s ../../io/vx_io.c VX_API = ../../vx_api/vx_api.c diff --git a/runtime/startup/vx_start.S b/runtime/startup/vx_start.S new file mode 100644 index 00000000..95e060bb --- /dev/null +++ b/runtime/startup/vx_start.S @@ -0,0 +1,63 @@ +#include "../config.h" + +.section .init, "ax" +.global _start +.type _start, @function +_start: + la a1, vx_set_sp + li a0, NW # activate all warps + .word 0x00b5106b # wspawn a0(numWarps), a1(PC SPAWN) + jal vx_set_sp + li a0, 1 + .word 0x0005006b # back to single thread + # Initialize global pointerp + # call __cxx_global_var_init + # Clear the bss segment + la a0, _edata + la a2, _end + sub a2, a2, a0 + li a1, 0 + call memset + la a0, __libc_fini_array # Register global termination functions + call atexit # to be called upon exit + call __libc_init_array # Run global initialization functions + call main + tail exit +.size _start, .-_start + +.section .text +.type vx_set_sp, @function +.global vx_set_sp +vx_set_sp: + li a0, NT + .word 0x0005006b # activate all threads + + .option push + .option norelax + 1:auipc gp, %pcrel_hi(__global_pointer$) + addi gp, gp, %pcrel_lo(1b) + .option pop + + csrr a3, 0x22 # get global warp number + slli a3, a3, 0x1a # shift by wid + csrr a2, 0x20 # get tid + slli a1, a2, 10 # multiply tid by 1024 + slli a2, a2, 2 # multiply tid by 4 + lui sp, 0x6ffff # load base sp + sub sp, sp, a1 # sub sp - (1024*tid) + sub sp, sp, a3 # shoft per warp + add sp, sp, a2 # shift sp for better performance + + csrr a3, 0x21 # get wid + beqz a3, RETURN + li a0, 0 + .word 0x0005006b # tmc 0 +RETURN: + ret + +.section .data + .global __dso_handle + .weak __dso_handle +__dso_handle: + .long 0 + \ No newline at end of file diff --git a/runtime/startup/vx_start.s b/runtime/startup/vx_start.s deleted file mode 100644 index 5c20dc30..00000000 --- a/runtime/startup/vx_start.s +++ /dev/null @@ -1,87 +0,0 @@ -# .section .init, "ax" -# .global _start -# _start: -# .cfi_startproc -# .cfi_undefined ra -# .option push -# .option norelax -# la gp, __global_pointer$ -# .option pop -# la sp, __stack_top -# add s0, sp, zero -# jal zero, main -# .cfi_endproc - # .end - -.section .init, "ax" - .global _start - .type _start, @function -_start: - # li a0, 4 - # .word 0x0005006b # tmc 4 - # csrr a2, 0x20 # get tid - # slli a2, a2, 2 - # la a3, 0x80000000 - # add a3, a3, a2 - # lw a4, 0(a3) - la a1, vx_set_sp - li a0, 4 - .word 0x00b5106b # wspawn a0(numWarps), a1(PC SPAWN) - jal vx_set_sp - ########################################## - # li a0, 1 - # .word 0x0005006b # tmc 1 - # # Initialize global pointerp - # call __cxx_global_var_init - # # Clear the bss segment - # la a0, _edata - # la a2, _end - # sub a2, a2, a0 - # li a1, 0 - # call memset - # la a0, __libc_fini_array # Register global termination functions - # call atexit # to be called upon exit - # call __libc_init_array # Run global initialization functions - li a0, 4 - .word 0x0005006b # tmc 4 - ############################################## - call main - tail exit - .size _start, .-_start - -.section .text -.type vx_set_sp, @function -.global vx_set_sp -vx_set_sp: - li a0, 4 - .word 0x0005006b # tmc 4 - - .option push - .option norelax - 1:auipc gp, %pcrel_hi(__global_pointer$) - addi gp, gp, %pcrel_lo(1b) - .option pop - - csrr a3, 0x22 # get wid - slli a3, a3, 0x1a # shift by wid - csrr a2, 0x20 # get tid - slli a1, a2, 10 # multiply tid by 1024 - slli a2, a2, 2 # multiply tid by 4 - lui sp, 0x6ffff # load base sp - sub sp, sp, a1 # sub sp - (1024*tid) - sub sp, sp, a3 # shoft per warp - add sp, sp, a2 # shift sp for better performance - - csrr a3, 0x21 # get wid - beqz a3, RETURN - li a0, 0 - .word 0x0005006b # tmc 0 - RETURN: - ret - -.section .data - .global __dso_handle - .weak __dso_handle -__dso_handle: - .long 0 - diff --git a/runtime/vx_api/vx_api.c b/runtime/vx_api/vx_api.c index 98fa136a..c7fabd62 100644 --- a/runtime/vx_api/vx_api.c +++ b/runtime/vx_api/vx_api.c @@ -1,4 +1,4 @@ - +#include "../config.h" #include "../intrinsics/vx_intrinsics.h" #include "vx_api.h" #include @@ -11,24 +11,27 @@ func_t global_function_pointer; void * global_argument_struct; unsigned global_num_threads; -void setup_call() { +void spawn_warp_runonce() { + // active all threads vx_tmc(global_num_threads); + + // call user routine global_function_pointer(global_argument_struct); + // resume single-thread execution on exit unsigned wid = vx_warpID(); - if (wid != 0) { - vx_tmc(0); // Halt Warp Execution - } else { - vx_tmc(1); // Only activate one thread - } + unsigned tmask = (0 == wid) ? 0x1 : 0x0; + vx_tmc(tmask); } void vx_spawnWarps(unsigned numWarps, unsigned numThreads, func_t func_ptr, void * args) { global_function_pointer = func_ptr; global_argument_struct = args; global_num_threads = numThreads; - vx_wspawn(numWarps, (unsigned) setup_call); - setup_call(); + if (numWarps > 1) { + vx_wspawn(numWarps, (unsigned)spawn_warp_runonce); + } + spawn_warp_runonce(); } unsigned pocl_threads; @@ -36,20 +39,20 @@ struct context_t * pocl_ctx; vx_pocl_workgroup_func pocl_pfn; const void * pocl_args; -void pocl_spawn_runonce() { - +void pocl_spawn_warp_runonce() { + // active all threads vx_tmc(pocl_threads); int x = vx_threadID(); - int y = vx_warpID(); + int y = vx_warpNum(); + // call kernel routine (pocl_pfn)(pocl_args, pocl_ctx, x, y, 0); - if (y != 0) { - vx_tmc(0); - } - - vx_tmc(1); + // resume single-thread execution on exit + int wid = vx_warpID(); + unsigned tmask = (0 == wid) ? 0x1 : 0x0; + vx_tmc(tmask); } void pocl_spawn(struct context_t * ctx, vx_pocl_workgroup_func pfn, const void * args) { @@ -64,10 +67,10 @@ void pocl_spawn(struct context_t * ctx, vx_pocl_workgroup_func pfn, const void * pocl_args = args; if (ctx->num_groups[1] > 1) { - vx_wspawn(ctx->num_groups[1], (unsigned)&pocl_spawn_runonce); + vx_wspawn(ctx->num_groups[1], (unsigned)&pocl_spawn_warp_runonce); } - pocl_spawn_runonce(); + pocl_spawn_warp_runonce(); } #ifdef __cplusplus diff --git a/rvvector/basic/Makefile b/rvvector/basic/Makefile index 89d35c26..ff6561c1 100644 --- a/rvvector/basic/Makefile +++ b/rvvector/basic/Makefile @@ -9,12 +9,12 @@ CC_FLAGS = -ffreestanding -O0 -Wl,--gc-sections -nostartfiles -nostdlib -nostart DMP = /home/fares/dev/riscv-gnu-toolchain-vector/drops/bin/riscv32-unknown-elf-objdump CPY = /home/fares/dev/riscv-gnu-toolchain-vector/drops/bin/riscv32-unknown-elf-objcopy -# VX_STR = ../../startup/vx_start.s +# VX_STR = ../../startup/vx_start.S NEWLIB = $(LIB_PATH)/newlib/newlib.c -VX_STR = $(LIB_PATH)/startup/vx_start.s +VX_STR = $(LIB_PATH)/startup/vx_start.S VX_INT = $(LIB_PATH)/intrinsics/vx_intrinsics.s VX_IO = $(LIB_PATH)/io/vx_io.s $(LIB_PATH)/io/vx_io.c VX_API = $(LIB_PATH)/vx_api/vx_api.c diff --git a/rvvector/benchmark_temp/Makefile b/rvvector/benchmark_temp/Makefile index 93ddd08c..febb8076 100644 --- a/rvvector/benchmark_temp/Makefile +++ b/rvvector/benchmark_temp/Makefile @@ -7,10 +7,10 @@ CC_FLAGS = -ffreestanding -O0 -Wl,--gc-sections -nostartfiles -nostdlib -nostart DMP = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objdump CPY = /home/priya/dev/riscv_vec/riscv-gnu/bin/riscv32-unknown-elf-objcopy -# VX_STR = ../../startup/vx_start.s +# VX_STR = ../../startup/vx_start.S NEWLIB = $(LIB_PATH)/newlib/newlib.c -VX_STR = $(LIB_PATH)/startup/vx_start.s +VX_STR = $(LIB_PATH)/startup/vx_start.S VX_INT = $(LIB_PATH)/intrinsics/vx_intrinsics.s VX_IO = $(LIB_PATH)/io/vx_io.s $(LIB_PATH)/io/vx_io.c VX_API = $(LIB_PATH)/vx_api/vx_api.c diff --git a/simX/include/archdef.h b/simX/include/archdef.h index b2e871e2..80956c5f 100644 --- a/simX/include/archdef.h +++ b/simX/include/archdef.h @@ -16,17 +16,16 @@ namespace Harp { public: struct Undefined {}; - ArchDef(const std::string &s, bool cpu_mode = false, int num_warps =32, int num_threads = 32) - : cpu_mode_(cpu_mode) { + ArchDef(const std::string &s, int num_warps = 32, int num_threads = 32) { std::istringstream iss(s.c_str()); wordSize = 4; encChar = 'w'; nRegs = 32; nPRegs = 0; - nThds = num_warps; - nWarps = num_threads; - + nWarps = num_warps; + nThds = num_threads; + extent = EXT_WARPS; // if (!iss) { extent = EXT_NULL; return; } @@ -99,10 +98,6 @@ namespace Harp { ThdNum getNWarps() const { if (extent < EXT_WARPS) throw Undefined(); else return nWarps; } - - bool is_cpu_mode() const { - return cpu_mode_; - } private: enum Extent { @@ -115,7 +110,6 @@ namespace Harp { ThdNum nThds, nWarps; RegNum nRegs, nPRegs; char encChar; - bool cpu_mode_; }; } diff --git a/simX/instruction.cpp b/simX/instruction.cpp index 47272b0e..0c04eb6a 100644 --- a/simX/instruction.cpp +++ b/simX/instruction.cpp @@ -15,7 +15,7 @@ #include "include/qsim-harp.h" #endif #include - #include +#include #include using namespace Harp; @@ -24,7 +24,7 @@ using namespace std; /* It is important that this stays consistent with the Harp::Instruction::Opcode enum. */ -ostream &Harp::operator<<(ostream& os, Instruction &inst) { +ostream &Harp::operator<<(ostream &os, Instruction &inst) { os << dec; // if (inst.predicated) { @@ -50,8 +50,8 @@ ostream &Harp::operator<<(ostream& os, Instruction &inst) { return os; } -bool checkUnanimous(unsigned p, const std::vector > >& m, - const std::vector &tm) { +bool checkUnanimous(unsigned p, const std::vector>> &m, + const std::vector &tm) { bool same; unsigned i; for (i = 0; i < m.size(); ++i) { @@ -60,7 +60,8 @@ bool checkUnanimous(unsigned p, const std::vector > >& m, break; } } - if (i == m.size()) throw DivergentBranchException(); + if (i == m.size()) + throw DivergentBranchException(); //std::cout << "same: " << same << " with -> "; for (; i < m.size(); ++i) { @@ -70,19 +71,19 @@ bool checkUnanimous(unsigned p, const std::vector > >& m, //std::cout << " FALSE\n"; return false; } - } + } } //std::cout << " TRUE\n"; return true; } Word signExt(Word w, Size bit, Word mask) { - if (w>>(bit-1)) w |= ~mask; + if (w >> (bit - 1)) + w |= ~mask; return w; } -void upload(unsigned * addr, char * src, int size, Warp & c) -{ +void upload(unsigned *addr, char *src, int size, Warp &c) { // cerr << "WRITING FINAL: " << *src << " size: " << size << "\n"; @@ -91,9 +92,7 @@ void upload(unsigned * addr, char * src, int size, Warp & c) c.core->mem.write(current_addr, size, c.supervisorMode, 4); current_addr += 4; - - for (int i = 0; i < size; i++) - { + for (int i = 0; i < size; i++) { unsigned value = src[i] & 0x000000FF; // cerr << "UPLOAD: (" << hex << current_addr << dec << ") = " << hex << ( value) << dec << "\n"; c.core->mem.write(current_addr, value, c.supervisorMode, 1); @@ -105,8 +104,7 @@ void upload(unsigned * addr, char * src, int size, Warp & c) *addr = current_addr; } -void download(unsigned * addr, char * drain, Warp & c) -{ +void download(unsigned *addr, char *drain, Warp &c) { unsigned current_addr = *addr; int size; @@ -114,11 +112,9 @@ void download(unsigned * addr, char * drain, Warp & c) size = c.core->mem.read(current_addr, c.supervisorMode); current_addr += 4; - - for (int i = 0; i < size; i++) - { + for (int i = 0; i < size; i++) { unsigned read_word = c.core->mem.read(current_addr, c.supervisorMode); - char read_byte = (char) (read_word & 0x000000FF); + char read_byte = (char)(read_word & 0x000000FF); drain[i] = read_byte; current_addr += 1; } @@ -128,21 +124,19 @@ void download(unsigned * addr, char * drain, Warp & c) *addr = current_addr; } -void downloadAlloc(unsigned * addr, char ** drain_ptr, int & size, Warp & c) -{ +void downloadAlloc(unsigned *addr, char **drain_ptr, int &size, Warp &c) { unsigned current_addr = *addr; size = c.core->mem.read(current_addr, c.supervisorMode); current_addr += 4; - (*drain_ptr) = (char *) malloc(size); + (*drain_ptr) = (char *)malloc(size); - char * drain = *drain_ptr; + char *drain = *drain_ptr; - for (int i = 0; i < size; i++) - { + for (int i = 0; i < size; i++) { unsigned read_word = c.core->mem.read(current_addr, c.supervisorMode); - char read_byte = (char) (read_word & 0x000000FF); + char read_byte = (char)(read_word & 0x000000FF); drain[i] = read_byte; current_addr += 1; } @@ -150,203 +144,177 @@ void downloadAlloc(unsigned * addr, char ** drain_ptr, int & size, Warp & c) *addr = current_addr; } -#define CLOSE 1 +#define CLOSE 1 #define ISATTY 2 -#define LSEEK 3 -#define READ 4 -#define WRITE 5 -#define FSTAT 6 -#define OPEN 7 +#define LSEEK 3 +#define READ 4 +#define WRITE 5 +#define FSTAT 6 +#define OPEN 7 -void trap_to_simulator(Warp & c) -{ - unsigned read_buffer = 0x71000000; - unsigned write_buffer = 0x72000000; +void trap_to_simulator(Warp &c) { + unsigned read_buffer = 0x71000000; + unsigned write_buffer = 0x72000000; - // cerr << "RAW READ BUFFER:\n"; - // for (int i = 0; i < 10; i++) - // { - // unsigned new_addr = read_buffer + (4*i); - // unsigned data_read = c.core->mem.read(new_addr, c.supervisorMode); - // cerr << hex << new_addr << ": " << data_read << "\n"; - // } + // cerr << "RAW READ BUFFER:\n"; + // for (int i = 0; i < 10; i++) + // { + // unsigned new_addr = read_buffer + (4*i); + // unsigned data_read = c.core->mem.read(new_addr, c.supervisorMode); + // cerr << hex << new_addr << ": " << data_read << "\n"; + // } - for (int j = 0; j < 1024; j+=1) - { - c.core->mem.write((write_buffer+j), 0, c.supervisorMode, 1); + for (int j = 0; j < 1024; j += 1) { + c.core->mem.write((write_buffer + j), 0, c.supervisorMode, 1); + } + + int command; + download(&read_buffer, (char *)&command, c); + + // cerr << "Command: " << hex << command << dec << '\n'; + + switch (command) { + case (CLOSE): { + cerr << "trap_to_simulator: CLOSE not supported yet\n"; + } break; + case (ISATTY): { + + cerr << "trap_to_simulator: ISATTY not supported yet\n"; + } break; + case (LSEEK): { + + // cerr << "trap_to_simulator: LSEEK not supported yet\n"; + int fd; + int offset; + int whence; + + download(&read_buffer, (char *)&fd, c); + download(&read_buffer, (char *)&offset, c); + download(&read_buffer, (char *)&whence, c); + + int retval = lseek(fd, offset, whence); + + upload(&write_buffer, (char *)&retval, sizeof(int), c); + + } break; + case (READ): { + + // cerr << "trap_to_simulator: READ not supported yet\n"; + int file; + unsigned ptr; + int len; + + download(&read_buffer, (char *)&file, c); + download(&read_buffer, (char *)&ptr, c); + download(&read_buffer, (char *)&len, c); + + char *buff = (char *)malloc(len); + + int ret = read(file, buff, len); + + for (int i = 0; i < len; i++) { + c.core->mem.write(ptr, buff[i], c.supervisorMode, 1); + ptr++; } + // c.core->mem.write(ptr, 0, c.supervisorMode, 1); + free(buff); - int command; - download(&read_buffer, (char *) &command, c); + } break; + case (WRITE): { + int file; + download(&read_buffer, (char *)&file, c); - // cerr << "Command: " << hex << command << dec << '\n'; + file = (file == 1) ? 2 : file; - switch (command) - { - case(CLOSE): - { - cerr << "trap_to_simulator: CLOSE not supported yet\n"; - } - break; - case(ISATTY): - { + int size; + char *buf; + downloadAlloc(&read_buffer, &buf, size, c); - cerr << "trap_to_simulator: ISATTY not supported yet\n"; - } - break; - case (LSEEK): - { + int e = write(file, buf, size); + free(buf); + } break; + case (FSTAT): { + cerr << "trap_to_simulator: FSTAT not supported yet\n"; + int file; + download(&read_buffer, (char *)&file, c); - // cerr << "trap_to_simulator: LSEEK not supported yet\n"; - int fd; - int offset; - int whence; + struct stat st; + fstat(file, &st); - download(&read_buffer, (char *) &fd , c); - download(&read_buffer, (char *) &offset , c); - download(&read_buffer, (char *) &whence , c); + fprintf(stderr, "------------------------\n"); + fprintf(stderr, "Size of struct: %ld\n", sizeof(struct stat)); + fprintf(stderr, "st_mode: %x\n", st.st_mode); + fprintf(stderr, "st_dev: %ld\n", st.st_dev); + fprintf(stderr, "st_ino: %ld\n", st.st_ino); + fprintf(stderr, "st_uid: %x\n", st.st_uid); + fprintf(stderr, "st_gid: %x\n", st.st_gid); + fprintf(stderr, "st_rdev: %ld\n", st.st_rdev); + fprintf(stderr, "st_size: %ld\n", st.st_size); + fprintf(stderr, "st_blksize: %ld\n", st.st_blksize); + fprintf(stderr, "st_blocks: %ld\n", st.st_blocks); + fprintf(stderr, "^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n"); + upload(&write_buffer, (char *)&st.st_mode, sizeof(st.st_mode), c); + upload(&write_buffer, (char *)&st.st_dev, sizeof(st.st_dev), c); + // upload(&write_buffer, (char *) &st.st_uid , sizeof(st.st_uid), c); + // upload(&write_buffer, (char *) &st.st_gid , sizeof(st.st_gid), c); + // upload(&write_buffer, (char *) &st.st_size , sizeof(st.st_size), c); + // upload(&write_buffer, (char *) &st.st_blksize , sizeof(st.st_blksize), c); + // upload(&write_buffer, (char *) &st.st_blocks , sizeof(st.st_blocks), c); - int retval = lseek(fd, offset, whence); + // upload(&write_buffer, (char *) &st, sizeof(struct stat), c); - upload(&write_buffer, (char *) &retval, sizeof(int), c); - - } - break; - case (READ): - { - - // cerr << "trap_to_simulator: READ not supported yet\n"; - int file; - unsigned ptr; - int len; - - download(&read_buffer, (char *) &file , c); - download(&read_buffer, (char *) &ptr , c); - download(&read_buffer, (char *) &len , c); - - char * buff = (char *) malloc(len); - - int ret = read(file, buff, len); - - for (int i = 0; i < len; i++) - { - c.core->mem.write(ptr, buff[i], c.supervisorMode, 1); - ptr++; - } - // c.core->mem.write(ptr, 0, c.supervisorMode, 1); - free(buff); - - } - break; - case (WRITE): - { - int file; - download(&read_buffer, (char *) &file, c); - - file = (file == 1) ? 2 : file; - - int size; - char * buf; - downloadAlloc(&read_buffer, &buf, size, c); - - int e = write(file, buf, size); - free(buf); - } - break; - case (FSTAT): - { - cerr << "trap_to_simulator: FSTAT not supported yet\n"; - int file; - download(&read_buffer, (char *) &file, c); - - struct stat st; - fstat(file, &st); - - fprintf(stderr, "------------------------\n"); - fprintf(stderr, "Size of struct: %ld\n", sizeof(struct stat)); - fprintf(stderr, "st_mode: %x\n", st.st_mode); - fprintf(stderr, "st_dev: %ld\n", st.st_dev); - fprintf(stderr, "st_ino: %ld\n", st.st_ino); - fprintf(stderr, "st_uid: %x\n", st.st_uid); - fprintf(stderr, "st_gid: %x\n", st.st_gid); - fprintf(stderr, "st_rdev: %ld\n", st.st_rdev); - fprintf(stderr, "st_size: %ld\n", st.st_size); - fprintf(stderr, "st_blksize: %ld\n", st.st_blksize); - fprintf(stderr, "st_blocks: %ld\n", st.st_blocks); - fprintf(stderr, "^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^\n"); - - upload(&write_buffer, (char *) &st.st_mode , sizeof(st.st_mode), c); - upload(&write_buffer, (char *) &st.st_dev , sizeof(st.st_dev), c); - // upload(&write_buffer, (char *) &st.st_uid , sizeof(st.st_uid), c); - // upload(&write_buffer, (char *) &st.st_gid , sizeof(st.st_gid), c); - // upload(&write_buffer, (char *) &st.st_size , sizeof(st.st_size), c); - // upload(&write_buffer, (char *) &st.st_blksize , sizeof(st.st_blksize), c); - // upload(&write_buffer, (char *) &st.st_blocks , sizeof(st.st_blocks), c); - - // upload(&write_buffer, (char *) &st, sizeof(struct stat), c); - - cerr << "RAW Write BUFFER:\n"; - unsigned original_write_buffer = 0x72000000; - for (int i = 0; i < 10; i++) - { - unsigned new_addr = original_write_buffer + (4*i); - unsigned data_read = c.core->mem.read(new_addr, c.supervisorMode); - cerr << hex << new_addr << ": " << data_read << "\n"; - } - } - break; - case (OPEN): - { - // cerr << "$$$$$$$$$$$$$$$$$$$$$$$$$ OPEN FROM simX\n"; - unsigned name_ptr; - unsigned flags; - unsigned mode; - - download(&read_buffer, (char *) &name_ptr, c); - download(&read_buffer, (char *) &flags , c); - download(&read_buffer, (char *) &mode , c); - - char buffer[255]; - unsigned read_word; - char read_byte; - - int curr_ind = 0; - - read_word = c.core->mem.read(name_ptr, c.supervisorMode); - read_byte = (char) (read_word & 0x000000FF); - while (read_byte != 0) - { - buffer[curr_ind] = read_byte; - - name_ptr++; - curr_ind++; - read_word = c.core->mem.read(name_ptr, c.supervisorMode); - read_byte = (char) (read_word & 0x000000FF); - } - buffer[curr_ind] = 0; - - - int fd = open(buffer, flags, mode); - - // fprintf(stderr, "Name: --%s-- and fd: %d\n", buffer, fd); - - upload(&write_buffer, (char *) &fd, sizeof(int), c); - - - } - break; - default: - { - - cerr << "trap_to_simulator: DEFAULT not supported yet\n"; - } - break; + cerr << "RAW Write BUFFER:\n"; + unsigned original_write_buffer = 0x72000000; + for (int i = 0; i < 10; i++) { + unsigned new_addr = original_write_buffer + (4 * i); + unsigned data_read = c.core->mem.read(new_addr, c.supervisorMode); + cerr << hex << new_addr << ": " << data_read << "\n"; } + } break; + case (OPEN): { + // cerr << "$$$$$$$$$$$$$$$$$$$$$$$$$ OPEN FROM simX\n"; + unsigned name_ptr; + unsigned flags; + unsigned mode; + download(&read_buffer, (char *)&name_ptr, c); + download(&read_buffer, (char *)&flags, c); + download(&read_buffer, (char *)&mode, c); + + char buffer[255]; + unsigned read_word; + char read_byte; + + int curr_ind = 0; + + read_word = c.core->mem.read(name_ptr, c.supervisorMode); + read_byte = (char)(read_word & 0x000000FF); + while (read_byte != 0) { + buffer[curr_ind] = read_byte; + + name_ptr++; + curr_ind++; + read_word = c.core->mem.read(name_ptr, c.supervisorMode); + read_byte = (char)(read_word & 0x000000FF); + } + buffer[curr_ind] = 0; + + int fd = open(buffer, flags, mode); + + // fprintf(stderr, "Name: --%s-- and fd: %d\n", buffer, fd); + + upload(&write_buffer, (char *)&fd, sizeof(int), c); + + } break; + default: { + + cerr << "trap_to_simulator: DEFAULT not supported yet\n"; + } break; + } } -void Instruction::executeOn(Warp &c, trace_inst_t * trace_inst) { +void Instruction::executeOn(Warp &c, trace_inst_t *trace_inst) { /* If I try to execute a privileged instruction in user mode, throw an exception 3. */ if (instTable[op].privileged && !c.supervisorMode) { @@ -363,40 +331,35 @@ void Instruction::executeOn(Warp &c, trace_inst_t * trace_inst) { Word VLMAX; c.memAccesses.clear(); - unsigned real_pc = c.pc - 4; - if ((real_pc) == (0x70000000)) - { + if ((real_pc) == (0x70000000)) { trap_to_simulator(c); } bool sjOnce(true), // Has not yet split or joined once. - pcSet(false); // PC has already been set + pcSet(false); // PC has already been set for (Size t = 0; t < c.activeThreads; t++) { - vector > ®(c.reg[t]); - vector > &pReg(c.pred[t]); + vector> ®(c.reg[t]); + vector> &pReg(c.pred[t]); stack &domStack(c.domStack); - bool split = (op == GPGPU) && (func3 == 2); - bool join = (op == GPGPU) && (func3 == 3); + bool join = (op == GPGPU) && (func3 == 3); + bool is_gpgpu = (op == GPGPU); - bool is_gpgpu = (op == GPGPU); - - bool is_tmc = is_gpgpu && (func3 == 0); - bool is_wspawn = is_gpgpu && (func3 == 1); - bool is_barrier = is_gpgpu && (func3 == 4); - bool is_split = is_gpgpu && (func3 == 2); - bool is_join = is_gpgpu && (func3 == 3); + bool is_tmc = is_gpgpu && (func3 == 0); + bool is_wspawn = is_gpgpu && (func3 == 1); + bool is_barrier = is_gpgpu && (func3 == 4); + bool is_split = is_gpgpu && (func3 == 2); + bool is_join = is_gpgpu && (func3 == 3); bool gpgpu_zero = (is_tmc || is_barrier || is_wspawn) && (t != 0); bool not_active = !c.tmask[t]; - if (not_active || gpgpu_zero) - { + if (not_active || gpgpu_zero) { continue; } @@ -414,2026 +377,1880 @@ void Instruction::executeOn(Warp &c, trace_inst_t * trace_inst) { int num_to_wspawn; switch (op) { - case NOP: - //std::cout << "NOP_INST\n"; - break; - case R_INST: - // std::cout << "R_INST\n"; - m_exten = func7 & 0x1; - if (m_exten) - { - // std::cout << "FOUND A MUL/DIV\n"; + case NOP: + //std::cout << "NOP_INST\n"; + break; + case R_INST: + // std::cout << "R_INST\n"; + m_exten = func7 & 0x1; + if (m_exten) { + // std::cout << "FOUND A MUL/DIV\n"; - switch (func3) - { - case 0: - // MUL - D(3, "MUL: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - reg[rdest] = ((int) reg[rsrc[0]]) * ((int) reg[rsrc[1]]); - break; - case 1: - // MULH - D(3, "MULH: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - { - int64_t first = (int64_t) reg[rsrc[0]]; - if (reg[rsrc[0]] & 0x80000000) - { - first = first | 0xFFFFFFFF00000000; - } - int64_t second = (int64_t) reg[rsrc[1]]; - if (reg[rsrc[1]] & 0x80000000) - { - second = second | 0xFFFFFFFF00000000; - } - // cout << "mulh: " << std::dec << first << " * " << second; - uint64_t result = first * second; - reg[rdest] = ( result >> 32) & 0xFFFFFFFF; - // cout << " = " << result << " or " << reg[rdest] << "\n"; - } - break; - case 2: - // MULHSU - D(3, "MULHSU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - { - int64_t first = (int64_t) reg[rsrc[0]]; - if (reg[rsrc[0]] & 0x80000000) - { - first = first | 0xFFFFFFFF00000000; - } - int64_t second = (int64_t) reg[rsrc[1]]; - reg[rdest] = (( first * second ) >> 32) & 0xFFFFFFFF; - } - break; - case 3: - // MULHU - D(3, "MULHU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - { - uint64_t first = (uint64_t) reg[rsrc[0]]; - uint64_t second = (uint64_t) reg[rsrc[1]]; - // cout << "MULHU\n"; - reg[rdest] = (( first * second) >> 32) & 0xFFFFFFFF; - } - break; - case 4: - // DIV - D(3, "DIV: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - if (reg[rsrc[1]] == 0) - { - reg[rdest] = -1; - break; - } - // cout << "dividing: " << dec << ((int) reg[rsrc[0]]) << " / " << ((int) reg[rsrc[1]]); - reg[rdest] = ( (int) reg[rsrc[0]]) / ( (int) reg[rsrc[1]]); - // cout << " = " << ((int) reg[rdest]) << "\n"; - break; - case 5: - // DIVU - D(3, "DIVU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - if (reg[rsrc[1]] == 0) - { - reg[rdest] = -1; - break; - } - reg[rdest] = ((uint32_t) reg[rsrc[0]]) / ((uint32_t) reg[rsrc[1]]); - break; - case 6: - // REM - D(3, "REM: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - if (reg[rsrc[1]] == 0) - { - reg[rdest] = reg[rsrc[0]]; - break; - } - reg[rdest] = ((int) reg[rsrc[0]]) % ((int) reg[rsrc[1]]); - break; - case 7: - // REMU - D(3, "REMU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - if (reg[rsrc[1]] == 0) - { - reg[rdest] = reg[rsrc[0]]; - break; - } - reg[rdest] = ((uint32_t) reg[rsrc[0]]) % ((uint32_t) reg[rsrc[1]]); - break; - default: - cout << "unsupported MUL/DIV instr\n"; - std::abort(); - } - } - else - { - // std::cout << "NORMAL R-TYPE\n"; - switch (func3) - { - case 0: - if (func7) - { - D(3, "SUBI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - reg[rdest] = reg[rsrc[0]] - reg[rsrc[1]]; - reg[rdest].trunc(wordSz); - } - else - { - D(3, "ADDI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - reg[rdest] = reg[rsrc[0]] + reg[rsrc[1]]; - reg[rdest].trunc(wordSz); - } - break; - case 1: - D(3, "SLLI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - reg[rdest] = reg[rsrc[0]] << reg[rsrc[1]]; - reg[rdest].trunc(wordSz); - break; - case 2: - D(3, "SLTI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - if ( int(reg[rsrc[0]]) < int(reg[rsrc[1]])) - { - reg[rdest] = 1; - } - else - { - reg[rdest] = 0; - } - break; - case 3: - D(3, "SLTU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - if (Word_u(reg[rsrc[0]]) < Word_u(reg[rsrc[1]])) - { - reg[rdest] = 1; - } - else - { - reg[rdest] = 0; - } - break; - case 4: - D(3, "XORI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - reg[rdest] = reg[rsrc[0]] ^ reg[rsrc[1]]; - break; - case 5: - if (func7) - { - D(3, "SRLI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - reg[rdest] = int(reg[rsrc[0]]) >> int(reg[rsrc[1]]); - reg[rdest].trunc(wordSz); - } - else - { - D(3, "SRLU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - reg[rdest] = Word_u(reg[rsrc[0]]) >> Word_u(reg[rsrc[1]]); - reg[rdest].trunc(wordSz); - } - break; - case 6: - D(3, "ORI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - reg[rdest] = reg[rsrc[0]] | reg[rsrc[1]]; - break; - case 7: - D(3, "ANDI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); - reg[rdest] = reg[rsrc[0]] & reg[rsrc[1]]; - break; - default: - cout << "ERROR: UNSUPPORTED R INST\n"; - std::abort(); - } - } - break; - case L_INST: - memAddr = ((reg[rsrc[0]] + immsrc) & 0xFFFFFFFC); - shift_by = ((reg[rsrc[0]] + immsrc) & 0x00000003) * 8; - data_read = c.core->mem.read(memAddr, c.supervisorMode); - trace_inst->is_lw = true; - trace_inst->mem_addresses[t] = memAddr; switch (func3) { - case 0: - // LBI - D(3, "LBI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); - reg[rdest] = signExt((data_read >> shift_by) & 0xFF, 8, 0xFF); - break; - case 1: - // LWI - D(3, "LWI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); - reg[rdest] = signExt((data_read >> shift_by) & 0xFFFF, 16, 0xFFFF); - break; - case 2: - // LDI - D(3, "LDI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); - reg[rdest] = int(data_read & 0xFFFFFFFF); - break; - case 4: - // LBU - D(3, "LBU: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); - reg[rdest] = unsigned((data_read >> shift_by) & 0xFF); - break; - case 5: - // LWU - D(3, "LWU: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); - reg[rdest] = unsigned((data_read >> shift_by) & 0xFFFF); - break; - default: - cout << "ERROR: UNSUPPORTED L INST\n"; - std::abort(); - c.memAccesses.push_back(Warp::MemAccess(false, memAddr)); - } - D(3, "LOAD MEM ADDRESS: " << std::hex << memAddr); - D(3, "LOAD MEM DATA: " << std::hex << data_read); - break; - case I_INST: - //std::cout << "I_INST\n"; - switch (func3) - { - case 0: - // ADDI - D(3, "ADDI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << immsrc); - reg[rdest] = reg[rsrc[0]] + immsrc; - reg[rdest].trunc(wordSz); - break; - case 2: - // SLTI - D(3, "SLTI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << immsrc); - if ( int(reg[rsrc[0]]) < int(immsrc)) - { - reg[rdest] = 1; - } - else - { - reg[rdest] = 0; - } - break; - case 3: - // SLTIU - D(3, "SLTIU: r" << rdest << " <- r" << rsrc[0] << ", imm=" << immsrc); - op1 = (unsigned) reg[rsrc[0]]; - if ( unsigned(reg[rsrc[0]]) < unsigned(immsrc)) - { - reg[rdest] = 1; - } - else - { - reg[rdest] = 0; - } - break; - case 4: - // XORI - D(3, "XORI: r" << rdest << " <- r" << rsrc[0] << ", imm=0x" << hex << immsrc); - reg[rdest] = reg[rsrc[0]] ^ immsrc; - break; - case 6: - // ORI - D(3, "ORI: r" << rdest << " <- r" << rsrc[0] << ", imm=0x" << hex << immsrc); - reg[rdest] = reg[rsrc[0]] | immsrc; - break; - case 7: - // ANDI - D(3, "ANDI: r" << rdest << " <- r" << rsrc[0] << ", imm=0x" << hex << immsrc); - reg[rdest] = reg[rsrc[0]] & immsrc; - break; - case 1: - // SLLI - D(3, "SLLI: r" << rdest << " <- r" << rsrc[0] << ", imm=0x" << hex << immsrc); - reg[rdest] = reg[rsrc[0]] << immsrc; - reg[rdest].trunc(wordSz); - break; - case 5: - if ((func7 == 0)) - { - // SRLI - D(3, "SRLI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << immsrc); - bool isNeg = ((0x80000000 & reg[rsrc[0]])) > 0; - Word result = Word_u(reg[rsrc[0]]) >> Word_u(immsrc); - reg[rdest] = result; - reg[rdest].trunc(wordSz); - } - else - { - // SRAI - D(3, "SRAI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << immsrc); - op1 = reg[rsrc[0]]; - op2 = immsrc; - reg[rdest] = op1 >> op2; - reg[rdest].trunc(wordSz); - } - break; - default: - cout << "ERROR: UNSUPPORTED L INST\n"; - std::abort(); - } - break; - case S_INST: - ++c.stores; - memAddr = reg[rsrc[0]] + immsrc; - trace_inst->is_sw = true; - trace_inst->mem_addresses[t] = memAddr; - // //std::cout << "FUNC3: " << func3 << "\n"; - if ((memAddr == 0x00010000) && (t == 0)) - { - unsigned num = reg[rsrc[1]]; - fprintf(stderr, "%c", (char) reg[rsrc[1]]); + case 0: + // MUL + D(3, "MUL: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + reg[rdest] = ((int)reg[rsrc[0]]) * ((int)reg[rsrc[1]]); break; - } - switch (func3) - { - case 0: - // SB - D(3, "SB: r" << rsrc[1] << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); - c.core->mem.write(memAddr, reg[rsrc[1]] & 0x000000FF, c.supervisorMode, 1); - break; - case 1: - // SH - D(3, "SH: r" << rsrc[1] << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); - c.core->mem.write(memAddr, reg[rsrc[1]], c.supervisorMode, 2); - break; - case 2: - // SD - D(3, "SD: r" << rsrc[1] << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); - c.core->mem.write(memAddr, reg[rsrc[1]], c.supervisorMode, 4); - break; - default: - cout << "ERROR: UNSUPPORTED S INST\n"; - std::abort(); - } - D(3, "STORE MEM ADDRESS: " << std::hex << memAddr); - c.memAccesses.push_back(Warp::MemAccess(true, memAddr)); -#ifdef EMU_INSTRUMENTATION - Harp::OSDomain::osDomain-> - do_mem(0, memAddr, c.core->mem.virtToPhys(memAddr), 8, true); -#endif - break; - case B_INST: - trace_inst->stall_warp = true; - switch (func3) - { - case 0: - // BEQ - D(3,"BEQ: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); - if (int(reg[rsrc[0]]) == int(reg[rsrc[1]])) - { - if (!pcSet) nextPc = (c.pc - 4) + immsrc; - pcSet = true; - } - break; - case 1: - // BNE - D(3,"BNE: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); - if (int(reg[rsrc[0]]) != int(reg[rsrc[1]])) - { - if (!pcSet) nextPc = (c.pc - 4) + immsrc; - pcSet = true; - } - break; - case 4: - // BLT - D(3,"BLT: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); - if (int(reg[rsrc[0]]) < int(reg[rsrc[1]])) - { - if (!pcSet) nextPc = (c.pc - 4) + immsrc; - pcSet = true; - } - break; - case 5: - // BGE - D(3,"BGE: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); - if (int(reg[rsrc[0]]) >= int(reg[rsrc[1]])) - { - if (!pcSet) nextPc = (c.pc - 4) + immsrc; - pcSet = true; - } - break; - case 6: - // BLTU - D(3,"BLTU: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); - if (Word_u(reg[rsrc[0]]) < Word_u(reg[rsrc[1]])) - { - if (!pcSet) nextPc = (c.pc - 4) + immsrc; - pcSet = true; - } - break; - case 7: - // BGEU - D(3,"BGEU: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); - if (Word_u(reg[rsrc[0]]) >= Word_u(reg[rsrc[1]])) - { - if (!pcSet) nextPc = (c.pc - 4) + immsrc; - pcSet = true; - } - break; - } - break; - case LUI_INST: - D(3, "LUI: r" << rdest << " <- imm=0x" << hex << immsrc); - reg[rdest] = (immsrc << 12) & 0xfffff000; - break; - case AUIPC_INST: - D(3, "AUIPC: r" << rdest << " <- imm=0x" << hex << immsrc); - reg[rdest] = ((immsrc << 12) & 0xfffff000) + (c.pc - 4); - break; - case JAL_INST: - D(3, "JAL: r" << rdest << " <- imm=" << (int)immsrc); - trace_inst->stall_warp = true; - if (!pcSet) nextPc = (c.pc - 4) + immsrc; - if (!pcSet) {/*std::cout << "JAL... SETTING PC: " << nextPc << "\n"; */} - if (rdest != 0) { - reg[rdest] = c.pc; - } - pcSet = true; - break; - case JALR_INST: - D(3, "JALR: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); - trace_inst->stall_warp = true; - if (!pcSet) nextPc = reg[rsrc[0]] + immsrc; - if (!pcSet) {/*std::cout << "JALR... SETTING PC: " << nextPc << "\n";*/ } - if (rdest != 0) - { - reg[rdest] = c.pc; - } - pcSet = true; - break; - case SYS_INST: - //std::cout << "SYS_INST\n"; - temp = reg[rsrc[0]]; - - if (!c.core->a.is_cpu_mode()) { - // - // GPGPU CSR extension - // - if (immsrc == 0x20) // ThreadID + case 1: + // MULH + D(3, "MULH: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); { - reg[rdest] = t; - D(2, "CSR Reading tid " << hex << immsrc << dec << " and returning " << reg[rdest]); - } - else if (immsrc == 0x21) // WarpID - { - reg[rdest] = c.id; - D(2, "CSR Reading wid " << hex << immsrc << dec << " and returning " << reg[rdest]); - } - else if (immsrc == 0x25) - { - reg[rdest] = c.core->num_instructions; - } - else if (immsrc == 0x26) - { - reg[rdest] = c.core->num_cycles; + int64_t first = (int64_t)reg[rsrc[0]]; + if (reg[rsrc[0]] & 0x80000000) { + first = first | 0xFFFFFFFF00000000; + } + int64_t second = (int64_t)reg[rsrc[1]]; + if (reg[rsrc[1]] & 0x80000000) { + second = second | 0xFFFFFFFF00000000; + } + // cout << "mulh: " << std::dec << first << " * " << second; + uint64_t result = first * second; + reg[rdest] = (result >> 32) & 0xFFFFFFFF; + // cout << " = " << result << " or " << reg[rdest] << "\n"; } + break; + case 2: + // MULHSU + D(3, "MULHSU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + { + int64_t first = (int64_t)reg[rsrc[0]]; + if (reg[rsrc[0]] & 0x80000000) { + first = first | 0xFFFFFFFF00000000; + } + int64_t second = (int64_t)reg[rsrc[1]]; + reg[rdest] = ((first * second) >> 32) & 0xFFFFFFFF; + } + break; + case 3: + // MULHU + D(3, "MULHU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + { + uint64_t first = (uint64_t)reg[rsrc[0]]; + uint64_t second = (uint64_t)reg[rsrc[1]]; + // cout << "MULHU\n"; + reg[rdest] = ((first * second) >> 32) & 0xFFFFFFFF; + } + break; + case 4: + // DIV + D(3, "DIV: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + if (reg[rsrc[1]] == 0) { + reg[rdest] = -1; + break; + } + // cout << "dividing: " << dec << ((int) reg[rsrc[0]]) << " / " << ((int) reg[rsrc[1]]); + reg[rdest] = ((int)reg[rsrc[0]]) / ((int)reg[rsrc[1]]); + // cout << " = " << ((int) reg[rdest]) << "\n"; + break; + case 5: + // DIVU + D(3, "DIVU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + if (reg[rsrc[1]] == 0) { + reg[rdest] = -1; + break; + } + reg[rdest] = ((uint32_t)reg[rsrc[0]]) / ((uint32_t)reg[rsrc[1]]); + break; + case 6: + // REM + D(3, "REM: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + if (reg[rsrc[1]] == 0) { + reg[rdest] = reg[rsrc[0]]; + break; + } + reg[rdest] = ((int)reg[rsrc[0]]) % ((int)reg[rsrc[1]]); + break; + case 7: + // REMU + D(3, "REMU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + if (reg[rsrc[1]] == 0) { + reg[rdest] = reg[rsrc[0]]; + break; + } + reg[rdest] = ((uint32_t)reg[rsrc[0]]) % ((uint32_t)reg[rsrc[1]]); + break; + default: + cout << "unsupported MUL/DIV instr\n"; + std::abort(); + } + } else { + // std::cout << "NORMAL R-TYPE\n"; + switch (func3) { + case 0: + if (func7) { + D(3, "SUBI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + reg[rdest] = reg[rsrc[0]] - reg[rsrc[1]]; + reg[rdest].trunc(wordSz); + } else { + D(3, "ADDI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + reg[rdest] = reg[rsrc[0]] + reg[rsrc[1]]; + reg[rdest].trunc(wordSz); + } + break; + case 1: + D(3, "SLLI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + reg[rdest] = reg[rsrc[0]] << reg[rsrc[1]]; + reg[rdest].trunc(wordSz); + break; + case 2: + D(3, "SLTI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + if (int(reg[rsrc[0]]) < int(reg[rsrc[1]])) { + reg[rdest] = 1; + } else { + reg[rdest] = 0; + } + break; + case 3: + D(3, "SLTU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + if (Word_u(reg[rsrc[0]]) < Word_u(reg[rsrc[1]])) { + reg[rdest] = 1; + } else { + reg[rdest] = 0; + } + break; + case 4: + D(3, "XORI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + reg[rdest] = reg[rsrc[0]] ^ reg[rsrc[1]]; + break; + case 5: + if (func7) { + D(3, "SRLI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + reg[rdest] = int(reg[rsrc[0]]) >> int(reg[rsrc[1]]); + reg[rdest].trunc(wordSz); + } else { + D(3, "SRLU: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + reg[rdest] = Word_u(reg[rsrc[0]]) >> Word_u(reg[rsrc[1]]); + reg[rdest].trunc(wordSz); + } + break; + case 6: + D(3, "ORI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + reg[rdest] = reg[rsrc[0]] | reg[rsrc[1]]; + break; + case 7: + D(3, "ANDI: r" << rdest << " <- r" << rsrc[0] << ", r" << rsrc[1]); + reg[rdest] = reg[rsrc[0]] & reg[rsrc[1]]; + break; + default: + cout << "ERROR: UNSUPPORTED R INST\n"; + std::abort(); + } + } + break; + case L_INST: + memAddr = ((reg[rsrc[0]] + immsrc) & 0xFFFFFFFC); + shift_by = ((reg[rsrc[0]] + immsrc) & 0x00000003) * 8; + data_read = c.core->mem.read(memAddr, c.supervisorMode); + trace_inst->is_lw = true; + trace_inst->mem_addresses[t] = memAddr; + switch (func3) { + case 0: + // LBI + D(3, "LBI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); + reg[rdest] = signExt((data_read >> shift_by) & 0xFF, 8, 0xFF); + break; + case 1: + // LWI + D(3, "LWI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); + reg[rdest] = signExt((data_read >> shift_by) & 0xFFFF, 16, 0xFFFF); + break; + case 2: + // LDI + D(3, "LDI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); + reg[rdest] = int(data_read & 0xFFFFFFFF); + break; + case 4: + // LBU + D(3, "LBU: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); + reg[rdest] = unsigned((data_read >> shift_by) & 0xFF); + break; + case 5: + // LWU + D(3, "LWU: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); + reg[rdest] = unsigned((data_read >> shift_by) & 0xFFFF); + break; + default: + cout << "ERROR: UNSUPPORTED L INST\n"; + std::abort(); + c.memAccesses.push_back(Warp::MemAccess(false, memAddr)); + } + D(3, "LOAD MEM ADDRESS: " << std::hex << memAddr); + D(3, "LOAD MEM DATA: " << std::hex << data_read); + break; + case I_INST: + //std::cout << "I_INST\n"; + switch (func3) { + case 0: + // ADDI + D(3, "ADDI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << immsrc); + reg[rdest] = reg[rsrc[0]] + immsrc; + reg[rdest].trunc(wordSz); + break; + case 2: + // SLTI + D(3, "SLTI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << immsrc); + if (int(reg[rsrc[0]]) < int(immsrc)) { + reg[rdest] = 1; } else { - switch (func3) - { - case 1: - // printf("Case 1\n"); - if (rdest != 0) - { - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - c.csr[immsrc & 0x00000FFF] = temp; - - break; - case 2: - // printf("Case 2\n"); - if (rdest != 0) - { - // printf("Reading from CSR: %d = %d\n", (immsrc & 0x00000FFF), c.csr[immsrc & 0x00000FFF]); - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - // printf("Writing to CSR --> %d = %d\n", immsrc, (temp | c.csr[immsrc & 0x00000FFF])); - c.csr[immsrc & 0x00000FFF] = temp | c.csr[immsrc & 0x00000FFF]; - - break; - case 3: - // printf("Case 3\n"); - if (rdest != 0) - { - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - c.csr[immsrc & 0x00000FFF] = temp & (~c.csr[immsrc & 0x00000FFF]); - - break; - case 5: - // printf("Case 5\n"); - if (rdest != 0) - { - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - c.csr[immsrc & 0x00000FFF] = rsrc[0]; - - break; - case 6: - // printf("Case 6\n"); - if (rdest != 0) - { - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - c.csr[immsrc & 0x00000FFF] = rsrc[0] | c.csr[immsrc & 0x00000FFF]; - - break; - case 7: - // printf("Case 7\n"); - if (rdest != 0) - { - reg[rdest] = c.csr[immsrc & 0x00000FFF]; - } - c.csr[immsrc & 0x00000FFF] = rsrc[0] & (~c.csr[immsrc & 0x00000FFF]); - - break; - case 0: - if (immsrc < 2) - { - //std::cout << "INTERRUPT ECALL/EBREAK\n"; - nextActiveThreads = 0; - c.spawned = false; - // c.interrupt(0); - } - break; - default: - break; - } + reg[rdest] = 0; } break; - case TRAP: - D(3, "TRAP"); - nextActiveThreads = 0; - c.interrupt(0); + case 3: + // SLTIU + D(3, "SLTIU: r" << rdest << " <- r" << rsrc[0] << ", imm=" << immsrc); + op1 = (unsigned)reg[rsrc[0]]; + if (unsigned(reg[rsrc[0]]) < unsigned(immsrc)) { + reg[rdest] = 1; + } else { + reg[rdest] = 0; + } break; - case FENCE: - D(3, "FENCE"); + case 4: + // XORI + D(3, "XORI: r" << rdest << " <- r" << rsrc[0] << ", imm=0x" << hex << immsrc); + reg[rdest] = reg[rsrc[0]] ^ immsrc; break; - case PJ_INST: - // pred jump reg - //std::cout << "pred jump... src: " << rsrc[0] << std::hex << " val: " << reg[rsrc[0]] << " dest: " << reg[rsrc[1]] << "\n"; - if (reg[rsrc[0]]) - { - if (!pcSet) nextPc = reg[rsrc[1]]; + case 6: + // ORI + D(3, "ORI: r" << rdest << " <- r" << rsrc[0] << ", imm=0x" << hex << immsrc); + reg[rdest] = reg[rsrc[0]] | immsrc; + break; + case 7: + // ANDI + D(3, "ANDI: r" << rdest << " <- r" << rsrc[0] << ", imm=0x" << hex << immsrc); + reg[rdest] = reg[rsrc[0]] & immsrc; + break; + case 1: + // SLLI + D(3, "SLLI: r" << rdest << " <- r" << rsrc[0] << ", imm=0x" << hex << immsrc); + reg[rdest] = reg[rsrc[0]] << immsrc; + reg[rdest].trunc(wordSz); + break; + case 5: + if ((func7 == 0)) { + // SRLI + D(3, "SRLI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << immsrc); + bool isNeg = ((0x80000000 & reg[rsrc[0]])) > 0; + Word result = Word_u(reg[rsrc[0]]) >> Word_u(immsrc); + reg[rdest] = result; + reg[rdest].trunc(wordSz); + } else { + // SRAI + D(3, "SRAI: r" << rdest << " <- r" << rsrc[0] << ", imm=" << immsrc); + op1 = reg[rsrc[0]]; + op2 = immsrc; + reg[rdest] = op1 >> op2; + reg[rdest].trunc(wordSz); + } + break; + default: + cout << "ERROR: UNSUPPORTED L INST\n"; + std::abort(); + } + break; + case S_INST: + ++c.stores; + memAddr = reg[rsrc[0]] + immsrc; + trace_inst->is_sw = true; + trace_inst->mem_addresses[t] = memAddr; + // //std::cout << "FUNC3: " << func3 << "\n"; + if ((memAddr == 0x00010000) && (t == 0)) { + unsigned num = reg[rsrc[1]]; + fprintf(stderr, "%c", (char)reg[rsrc[1]]); + break; + } + switch (func3) { + case 0: + // SB + D(3, "SB: r" << rsrc[1] << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); + c.core->mem.write(memAddr, reg[rsrc[1]] & 0x000000FF, c.supervisorMode, 1); + break; + case 1: + // SH + D(3, "SH: r" << rsrc[1] << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); + c.core->mem.write(memAddr, reg[rsrc[1]], c.supervisorMode, 2); + break; + case 2: + // SD + D(3, "SD: r" << rsrc[1] << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); + c.core->mem.write(memAddr, reg[rsrc[1]], c.supervisorMode, 4); + break; + default: + cout << "ERROR: UNSUPPORTED S INST\n"; + std::abort(); + } + D(3, "STORE MEM ADDRESS: " << std::hex << memAddr); + c.memAccesses.push_back(Warp::MemAccess(true, memAddr)); +#ifdef EMU_INSTRUMENTATION + Harp::OSDomain::osDomain->do_mem(0, memAddr, c.core->mem.virtToPhys(memAddr), 8, true); +#endif + break; + case B_INST: + trace_inst->stall_warp = true; + switch (func3) { + case 0: + // BEQ + D(3, "BEQ: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); + if (int(reg[rsrc[0]]) == int(reg[rsrc[1]])) { + if (!pcSet) + nextPc = (c.pc - 4) + immsrc; pcSet = true; } break; - case GPGPU: - //std::cout << "GPGPU\n"; - switch(func3) - { - case 1: - // WSPAWN - D(3, "WSPAWN"); - trace_inst->wspawn = true; - if (sjOnce) - { - sjOnce = false; - // //std::cout << "SIZE: " << c.core->w.size() << "\n"; - num_to_wspawn = std::min(reg[rsrc[0]], c.core->a.getNWarps()); - - D(0, "Spawning " << num_to_wspawn << " new warps at PC: " << hex << reg[rsrc[1]]); - for (unsigned i = 1; i < num_to_wspawn; ++i) - { - // std::cout << "SPAWNING WARP\n"; - Warp &newWarp(c.core->w[i]); - // //std::cout << "STARTING\n"; - // if (newWarp.spawned == false) - { - // //std::cout << "ABOUT TO START\n"; - newWarp.pc = reg[rsrc[1]]; - // newWarp.reg[0] = reg; - // newWarp.csr = c.csr; - for (int kk = 0; kk < newWarp.tmask.size(); kk++) - { - if (kk == 0) - { - newWarp.tmask[kk] = true; - } - else - { - newWarp.tmask[kk] = false; - } - } - newWarp.activeThreads = 1; - newWarp.supervisorMode = false; - newWarp.spawned = true; - } - } - break; - } - break; - case 2: - { - // SPLIT - D(3, "SPLIT"); - trace_inst->stall_warp = true; - if (sjOnce) - { - sjOnce = false; - if (checkUnanimous(pred, c.reg, c.tmask)) { - D(3, "Unanimous pred: " << pred << " val: " << reg[pred] << "\n"); - DomStackEntry e(c.tmask); - e.uni = true; - c.domStack.push(e); - break; - } - D(3, "Split: Original TM: "); - for (auto y : c.tmask) D(3, y << " "); - - DomStackEntry e(pred, c.reg, c.tmask, c.pc); - c.domStack.push(c.tmask); - c.domStack.push(e); - for (unsigned i = 0; i < e.tmask.size(); ++i) - { - c.tmask[i] = !e.tmask[i] && c.tmask[i]; - } - - - D(3, "Split: New TM"); - for (auto y : c.tmask) D(3, y << " "); - D(3, "Split: Pushed TM PC: " << hex << e.pc << dec << "\n"); - for (auto y : e.tmask) D(3, y << " "); - } - break; - } - case 3: - // JOIN - D(3, "JOIN"); - if (sjOnce) - { - sjOnce = false; - if (!c.domStack.empty() && c.domStack.top().uni) { - D(2, "Uni branch at join"); - printf("NEW DOMESTACK: \n"); - c.tmask = c.domStack.top().tmask; - c.domStack.pop(); - break; - } - if (!c.domStack.top().fallThrough) { - if (!pcSet) { - nextPc = c.domStack.top().pc; - D(3, "join: NOT FALLTHROUGH PC: " << hex << nextPc << dec); - } - pcSet = true; - } - - D(3, "Join: Old TM: "); - for (auto y : c.tmask) D(3, y << " "); - cout << "\n"; - c.tmask = c.domStack.top().tmask; - - D(3, "Join: New TM: "); - for (auto y : c.tmask) D(3, y << " "); - - c.domStack.pop(); - } - break; - case 4: - trace_inst->stall_warp = true; - // is_barrier - break; - case 0: - // TMC - D(3, "TMC"); - trace_inst->stall_warp = true; - nextActiveThreads = std::min(reg[rsrc[0]], c.core->a.getNThds()); - { - for (int ff = 0; ff < c.tmask.size(); ff++) - { - if (ff < nextActiveThreads) - { - c.tmask[ff] = true; - } - else - { - c.tmask[ff] = false; - } - } - } - if (nextActiveThreads == 0) - { - c.spawned = false; - } - // reg[rdest] = c.pc; - // if (!pcSet) nextPc = reg[rsrc[0]]; - // pcSet = true; - // //std::cout << "ACTIVE_THREDS: " << rsrc[1] << " val: " << reg[rsrc[1]] << "\n"; - // //std::cout << "nextPC: " << rsrc[0] << " val: " << std::hex << reg[rsrc[0]] << "\n"; - break; - default: - cout << "ERROR: UNSUPPORTED GPGPU INSTRUCTION " << *this << "\n"; + case 1: + // BNE + D(3, "BNE: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); + if (int(reg[rsrc[0]]) != int(reg[rsrc[1]])) { + if (!pcSet) + nextPc = (c.pc - 4) + immsrc; + pcSet = true; } break; - case VSET_ARITH: - D(3,"VSET_ARITH"); - is_vec = true; - switch(func3) { - case 0: // vector-vector - trace_inst->vs1 = rsrc[0]; - trace_inst->vs2 = rsrc[1]; - trace_inst->vd = rdest; - switch(func6) - { - case 0: - { - is_vec = true; - D(3, "Addition " << rsrc[0] << " " << rsrc[1] << " Dest:" << rdest); - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - vector> & mask = c.vreg[0]; - - if (c.vtype.vsew == 8) - { - for (uint8_t i = 0; i < c.vl; i++) - { - uint8_t *mask_ptr = (uint8_t*) mask[i].val; - uint8_t value = (*mask_ptr & 0x1); - if(vmask || (!vmask && value)){ - uint8_t * first_ptr = (uint8_t *) vr1[i].val; - uint8_t * second_ptr = (uint8_t *) vr2[i].val; - uint8_t result = *first_ptr + *second_ptr; - D(3, "Adding " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - - } - - } else if (c.vtype.vsew == 16) - { - - for (uint16_t i = 0; i < c.vl; i++) - { - uint16_t *mask_ptr = (uint16_t*) mask[i].val; - uint16_t value = (*mask_ptr & 0x1); - if(vmask || (!vmask && value)){ - uint16_t * first_ptr = (uint16_t *) vr1[i].val; - uint16_t * second_ptr = (uint16_t *) vr2[i].val; - uint16_t result = *first_ptr + *second_ptr; - D(3, "Adding " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - - } - } else if (c.vtype.vsew == 32) - { - D(3, "Doing 32 bit vector addition"); - for (Word i = 0; i < c.vl; i++) - { - int *mask_ptr = (int*) mask[i].val; - int value = (*mask_ptr & 0x1); - if(vmask || (!vmask && value)){ - int * first_ptr = (int *) vr1[i].val; - int * second_ptr = (int *) vr2[i].val; - int result = *first_ptr + *second_ptr; - D(3, "Adding " << *first_ptr << " + " << *second_ptr << " = " << result); - - int * result_ptr = (int *) vd[i].val; - *result_ptr = result; - } - - } - } - - D(3, "Vector Register state after addition:" << flush); - for(int i=0; i < c.vreg.size(); i++) - { - for(int j=0; j< c.vreg[0].size(); j++) - { - if (c.vtype.vsew == 8) - { - uint8_t * ptr_val = (uint8_t *) c.vreg[i][j].val; - D(3, "reg[" << i << "][" << j << "] = " << *ptr_val); - } else if (c.vtype.vsew == 16) - { - uint16_t * ptr_val = (uint16_t *) c.vreg[i][j].val; - D(3, "reg[" << i << "][" << j << "] = " << *ptr_val); - } else if (c.vtype.vsew == 32) - { - uint32_t * ptr_val = (uint32_t *) c.vreg[i][j].val; - D(3, "reg[" << i << "][" << j << "] = " << *ptr_val); - } - } - } - - D(3, "After vector register state after addition" << flush); - } - break; - case 24: //vmseq - { - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t result = (*first_ptr == *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 16) { - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t result = (*first_ptr == *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 32) { - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t result = (*first_ptr == *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint32_t * result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - } - - } - break; - case 25: //vmsne - { - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t result = (*first_ptr != *second_ptr) ? 1 : 0; - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 16) { - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t result = (*first_ptr != *second_ptr) ? 1 : 0; - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 32) { - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t result = (*first_ptr != *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint32_t * result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - } - - } - break; - case 26: //vmsltu - { - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t result = (*first_ptr < *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 16) { - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t result = (*first_ptr < *second_ptr) ? 1 : 0; - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 32) { - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t result = (*first_ptr < *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint32_t * result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - } - - } - break; - case 27: //vmslt - { - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(int8_t i = 0; i < c.vl; i++){ - int8_t *first_ptr = (int8_t *)vr1[i].val; - int8_t *second_ptr = (int8_t *)vr2[i].val; - int8_t result = (*first_ptr < *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - int8_t * result_ptr = (int8_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 16) { - for(int16_t i = 0; i < c.vl; i++){ - int16_t *first_ptr = (int16_t *)vr1[i].val; - int16_t *second_ptr = (int16_t *)vr2[i].val; - int16_t result = (*first_ptr < *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - int16_t * result_ptr = (int16_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 32) { - for(int32_t i = 0; i < c.vl; i++){ - int32_t *first_ptr = (int32_t *)vr1[i].val; - int32_t *second_ptr = (int32_t *)vr2[i].val; - int32_t result = (*first_ptr < *second_ptr) ? 1 : 0; - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - int32_t * result_ptr = (int32_t *) vd[i].val; - *result_ptr = result; - } - } - } - break; - case 28: //vmsleu - { - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t result = (*first_ptr <= *second_ptr) ? 1 : 0; - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 16) { - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t result = (*first_ptr <= *second_ptr) ? 1 : 0; - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 32) { - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t result = (*first_ptr <= *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint32_t * result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - } - } - break; - case 29: //vmsle - { - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(int8_t i = 0; i < c.vl; i++){ - int8_t *first_ptr = (int8_t *)vr1[i].val; - int8_t *second_ptr = (int8_t *)vr2[i].val; - int8_t result = (*first_ptr <= *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - int8_t * result_ptr = (int8_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 16) { - for(int16_t i = 0; i < c.vl; i++){ - int16_t *first_ptr = (int16_t *)vr1[i].val; - int16_t *second_ptr = (int16_t *)vr2[i].val; - int16_t result = (*first_ptr <= *second_ptr) ? 1 : 0; - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - int16_t * result_ptr = (int16_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 32) { - for(int32_t i = 0; i < c.vl; i++){ - int32_t *first_ptr = (int32_t *)vr1[i].val; - int32_t *second_ptr = (int32_t *)vr2[i].val; - int32_t result = (*first_ptr <= *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - int32_t * result_ptr = (int32_t *) vd[i].val; - *result_ptr = result; - } - } - } - break; - case 30: //vmsgtu - { - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t result = (*first_ptr > *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 16) { - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t result = (*first_ptr > *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 32) { - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t result = (*first_ptr > *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint32_t * result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - } - } - break; - case 31: //vmsgt - { - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(int8_t i = 0; i < c.vl; i++){ - int8_t *first_ptr = (int8_t *)vr1[i].val; - int8_t *second_ptr = (int8_t *)vr2[i].val; - int8_t result = (*first_ptr > *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - int8_t * result_ptr = (int8_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 16) { - for(int16_t i = 0; i < c.vl; i++){ - int16_t *first_ptr = (int16_t *)vr1[i].val; - int16_t *second_ptr = (int16_t *)vr2[i].val; - int16_t result = (*first_ptr > *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - int16_t * result_ptr = (int16_t *) vd[i].val; - *result_ptr = result; - } - - } else if(c.vtype.vsew == 32) { - for(int32_t i = 0; i < c.vl; i++){ - int32_t *first_ptr = (int32_t *)vr1[i].val; - int32_t *second_ptr = (int32_t *)vr2[i].val; - int32_t result = (*first_ptr > *second_ptr) ? 1 : 0; - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - int32_t * result_ptr = (int32_t *) vd[i].val; - *result_ptr = result; - } - } - } - break; - } - break; - case 2: - { - trace_inst->vs1 = rsrc[0]; - trace_inst->vs2 = rsrc[1]; - trace_inst->vd = rdest; - Word VLMAX = (c.vtype.vlmul * c.VLEN)/c.vtype.vsew; - - switch(func6){ - case 24: //vmandnot - { - D(3, "vmandnot"); - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t first_value = (*first_ptr & 0x1); - uint8_t second_value = (*second_ptr & 0x1); - uint8_t result = (first_value & !second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - uint8_t *result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - - - } else if(c.vtype.vsew == 16) { - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t first_value = (*first_ptr & 0x1); - uint16_t second_value = (*second_ptr & 0x1); - uint16_t result = (first_value & !second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - for(uint16_t i = c.vl; i < VLMAX; i++){ - uint16_t *result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - - } else if(c.vtype.vsew == 32) { - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t first_value = (*first_ptr & 0x1); - uint32_t second_value = (*second_ptr & 0x1); - uint32_t result = (first_value & !second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint32_t * result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - for(Word i = c.vl; i < VLMAX; i++){ - uint32_t *result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - - } - } - break; - case 25: //vmand - { - D(3, "vmand"); - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t first_value = (*first_ptr & 0x1); - uint8_t second_value = (*second_ptr & 0x1); - uint8_t result = (first_value & second_value); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - uint8_t *result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 16) { - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t first_value = (*first_ptr & 0x1); - uint16_t second_value = (*second_ptr & 0x1); - uint16_t result = (first_value & second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - - for(uint16_t i = c.vl; i < VLMAX; i++){ - uint16_t *result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 32) { - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t first_value = (*first_ptr & 0x1); - uint32_t second_value = (*second_ptr & 0x1); - uint32_t result = (first_value & second_value); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint32_t * result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - - for(Word i = c.vl; i < VLMAX; i++){ - uint32_t *result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - } - } - break; - case 26: //vmor - { - D(3, "vmor"); - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t first_value = (*first_ptr & 0x1); - uint8_t second_value = (*second_ptr & 0x1); - uint8_t result = (first_value | second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - uint8_t *result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 16) { - uint16_t *result_ptr; - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t first_value = (*first_ptr & 0x1); - uint16_t second_value = (*second_ptr & 0x1); - uint16_t result = (first_value | second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - for(uint16_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - } else if(c.vtype.vsew == 32) { - uint32_t *result_ptr; - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t first_value = (*first_ptr & 0x1); - uint32_t second_value = (*second_ptr & 0x1); - uint32_t result = (first_value | second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - D(3, "VLMAX: " << VLMAX); - for(Word i = c.vl; i < VLMAX; i++){ - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - } - } - break; - case 27: //vmxor - { - D(3, "vmxor"); - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - uint8_t *result_ptr; - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t first_value = (*first_ptr & 0x1); - uint8_t second_value = (*second_ptr & 0x1); - uint8_t result = (first_value ^ second_value); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - } else if(c.vtype.vsew == 16) { - uint16_t *result_ptr; - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t first_value = (*first_ptr & 0x1); - uint16_t second_value = (*second_ptr & 0x1); - uint16_t result = (first_value ^ second_value); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - for(uint16_t i = c.vl; i < VLMAX; i++){ - uint16_t *result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 32) { - uint32_t *result_ptr; - - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t first_value = (*first_ptr & 0x1); - uint32_t second_value = (*second_ptr & 0x1); - uint32_t result = (first_value ^ second_value); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - for(Word i = c.vl; i < VLMAX; i++){ - uint32_t *result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - } - } - break; - case 28: //vmornot - { - D(3, "vmornot"); - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t first_value = (*first_ptr & 0x1); - uint8_t second_value = (*second_ptr & 0x1); - uint8_t result = (first_value | !second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - uint8_t *result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - } else if(c.vtype.vsew == 16) { - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t first_value = (*first_ptr & 0x1); - uint16_t second_value = (*second_ptr & 0x1); - uint16_t result = (first_value | !second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - for(uint16_t i = c.vl; i < VLMAX; i++){ - uint16_t *result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 32) { - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t first_value = (*first_ptr & 0x1); - uint32_t second_value = (*second_ptr & 0x1); - uint32_t result = (first_value | !second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint32_t * result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - for(Word i = c.vl; i < VLMAX; i++){ - uint32_t *result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - } - } - break; - case 29: //vmnand - { - D(3, "vmnand"); - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t first_value = (*first_ptr & 0x1); - uint8_t second_value = (*second_ptr & 0x1); - uint8_t result = !(first_value & second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint8_t * result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - uint8_t *result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 16) { - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t first_value = (*first_ptr & 0x1); - uint16_t second_value = (*second_ptr & 0x1); - uint16_t result = !(first_value & second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - - for(uint16_t i = c.vl; i < VLMAX; i++){ - uint16_t *result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 32) { - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t first_value = (*first_ptr & 0x1); - uint32_t second_value = (*second_ptr & 0x1); - uint32_t result = !(first_value & second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint32_t * result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - - for(Word i = c.vl; i < VLMAX; i++){ - uint32_t *result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - - } - } - break; - case 30: //vmnor - { - D(3, "vmnor"); - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - uint8_t *result_ptr; - - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t first_value = (*first_ptr & 0x1); - uint8_t second_value = (*second_ptr & 0x1); - uint8_t result = !(first_value | second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - } else if(c.vtype.vsew == 16) { - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t first_value = (*first_ptr & 0x1); - uint16_t second_value = (*second_ptr & 0x1); - uint16_t result = !(first_value | second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint16_t * result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - for(uint16_t i = c.vl; i < VLMAX; i++){ - uint16_t *result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 32) { - - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t first_value = (*first_ptr & 0x1); - uint32_t second_value = (*second_ptr & 0x1); - uint32_t result = !(first_value | second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - uint32_t * result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - for(Word i = c.vl; i < VLMAX; i++){ - uint32_t *result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - - } - } - break; - case 31: //vmxnor - { - D(3, "vmxnor"); - uint8_t *result_ptr; - - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t first_value = (*first_ptr & 0x1); - uint8_t second_value = (*second_ptr & 0x1); - uint8_t result = !(first_value ^ second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - } - else if(c.vtype.vsew == 16) { - uint16_t *result_ptr; - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t first_value = (*first_ptr & 0x1); - uint16_t second_value = (*second_ptr & 0x1); - uint16_t result = !(first_value ^ second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - for(uint16_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 32) { - uint32_t *result_ptr; - - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t first_value = (*first_ptr & 0x1); - uint32_t second_value = (*second_ptr & 0x1); - uint32_t result = !(first_value ^ second_value); - D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - for(Word i = c.vl; i < VLMAX; i++){ - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - - } - } - break; - case 37: //vmul - { - D(3, "vmul"); - uint8_t *result_ptr; - - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t result = (*first_ptr * *second_ptr); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - } - else if(c.vtype.vsew == 16) { - uint16_t *result_ptr; - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t result = (*first_ptr * *second_ptr); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - for(uint16_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 32) { - uint32_t *result_ptr; - - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t result = (*first_ptr * *second_ptr); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - for(Word i = c.vl; i < VLMAX; i++){ - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - } - } - break; - case 45: //vmacc - { - D(3, "vmacc"); - uint8_t *result_ptr; - - vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t result = (*first_ptr * *second_ptr); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint8_t *) vd[i].val; - *result_ptr += result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - } - else if(c.vtype.vsew == 16) { - uint16_t *result_ptr; - for(uint16_t i = 0; i < c.vl; i++){ - uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t result = (*first_ptr * *second_ptr); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint16_t *) vd[i].val; - *result_ptr += result; - } - for(uint16_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 32) { - uint32_t *result_ptr; - - for(uint32_t i = 0; i < c.vl; i++){ - uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t result = (*first_ptr * *second_ptr); - D(3,"Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); - - result_ptr = (uint32_t *) vd[i].val; - *result_ptr += result; - } - for(Word i = c.vl; i < VLMAX; i++){ - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - } - } - break; - } - } - break; - case 6: - { - switch(func6) - { - case 0: - { - D(3, "vmadd.vx"); - uint8_t *result_ptr; - - //vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - //uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t result = (reg[rsrc[0]] + *second_ptr); - D(3,"Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); - - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - } - else if(c.vtype.vsew == 16) { - uint16_t *result_ptr; - for(uint16_t i = 0; i < c.vl; i++){ - //uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t result = (reg[rsrc[0]] + *second_ptr); - D(3,"Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); - - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - for(uint16_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 32) { - uint32_t *result_ptr; - - for(uint32_t i = 0; i < c.vl; i++){ - //uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t result = (reg[rsrc[0]] + *second_ptr); - D(3,"Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); - - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - for(Word i = c.vl; i < VLMAX; i++){ - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - } - } - break; - case 37: //vmul.vx - { - D(3, "vmul.vx"); - uint8_t *result_ptr; - - //vector> & vr1 = c.vreg[rsrc[0]]; - vector> & vr2 = c.vreg[rsrc[1]]; - vector> & vd = c.vreg[rdest]; - if(c.vtype.vsew == 8){ - for(uint8_t i = 0; i < c.vl; i++){ - //uint8_t *first_ptr = (uint8_t *)vr1[i].val; - uint8_t *second_ptr = (uint8_t *)vr2[i].val; - uint8_t result = (reg[rsrc[0]] * *second_ptr); - D(3,"Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); - - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = result; - } - for(uint8_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint8_t *) vd[i].val; - *result_ptr = 0; - } - } - else if(c.vtype.vsew == 16) { - uint16_t *result_ptr; - for(uint16_t i = 0; i < c.vl; i++){ - //uint16_t *first_ptr = (uint16_t *)vr1[i].val; - uint16_t *second_ptr = (uint16_t *)vr2[i].val; - uint16_t result = (reg[rsrc[0]] * *second_ptr); - D(3,"Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); - - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = result; - } - for(uint16_t i = c.vl; i < VLMAX; i++){ - result_ptr = (uint16_t *) vd[i].val; - *result_ptr = 0; - } - - } else if(c.vtype.vsew == 32) { - uint32_t *result_ptr; - - for(uint32_t i = 0; i < c.vl; i++){ - //uint32_t *first_ptr = (uint32_t *)vr1[i].val; - uint32_t *second_ptr = (uint32_t *)vr2[i].val; - uint32_t result = (reg[rsrc[0]] * *second_ptr); - D(3,"Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); - - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = result; - } - for(Word i = c.vl; i < VLMAX; i++){ - result_ptr = (uint32_t *) vd[i].val; - *result_ptr = 0; - } - } - } - break; - } - } - break; - case 7: - { - is_vec = true; - c.vtype.vill = 0; //TODO - c.vtype.vediv = vediv; - c.vtype.vsew = vsew; - c.vtype.vlmul = vlmul; - - Word VLMAX = (vlmul * c.VLEN)/vsew; - D(3, "lmul:" << vlmul << " sew:" << vsew << " ediv: " << vediv << "rsrc" << reg[rsrc[0]] << "VLMAX" << VLMAX); - - if(reg[rsrc[0]] <= VLMAX){ - c.vl = reg[rsrc[0]]; - } - else if(reg[rsrc[0]] < 2*VLMAX) { - c.vl = (int)ceil((reg[rsrc[0]]*1.0)/2.0); - D(3, "Length:" << c.vl << ceil(reg[rsrc[0]]/2)); - } - else if(reg[rsrc[0]] >= (2*VLMAX)) { - c.vl = VLMAX; - } - reg[rdest] = c.vl; - D(3, "VL:" << reg[rdest]); - - Word regNum(0); - - c.vreg.clear(); - for (int j = 0; j < 32; j++) - { - c.vreg.push_back(vector>()); - for (int i = 0; i < (c.VLEN/vsew); ++i) - { - int * elem_ptr = (int *) malloc(vsew/8); - for (int f = 0; f < (vsew/32); f++) elem_ptr[f] = 0; - c.vreg[j].push_back(Reg(c.id, regNum++, (char *) elem_ptr)); - } - } - } - break; - default: - { - cout << "default???\n" << flush; - - } + case 4: + // BLT + D(3, "BLT: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); + if (int(reg[rsrc[0]]) < int(reg[rsrc[1]])) { + if (!pcSet) + nextPc = (c.pc - 4) + immsrc; + pcSet = true; } - break; - case VL: - { - is_vec = true; - D(3, "Executing vector load"); - VLMAX = (c.vtype.vlmul * c.VLEN)/c.vtype.vsew; - D(3, "lmul: " << c.vtype.vlmul << " VLEN:" << c.VLEN << "sew: " << c.vtype.vsew); - D(3, "src: " << rsrc[0] << " " << reg[rsrc[0]]); - D(3, "dest" << rdest); - D(3, "width" << vlsWidth); - vector> & vd = c.vreg[rdest]; - - switch(vlsWidth) - { - case 6: //load word and unit strided (not checking for unit stride) - { - for(Word i = 0; i < c.vl; i++) { - memAddr = ((reg[rsrc[0]]) & 0xFFFFFFFC) + (i*c.vtype.vsew/8); - data_read = c.core->mem.read(memAddr, c.supervisorMode); - D(3, "Mem addr: " << std::hex << memAddr << " Data read " << data_read); - int * result_ptr = (int *) vd[i].val; - *result_ptr = data_read; - - trace_inst->is_lw = true; - trace_inst->mem_addresses[i] = memAddr; - } - /*for(Word i = c.vl; i < VLMAX; i++){ - int * result_ptr = (int *) vd[i].val; - *result_ptr = 0; - }*/ - - D(3, "Vector Register state ----:"); - // for(int i=0; i < 32; i++) - // { - // for(int j=0; j< c.vl; j++) - // { - // cout << "starting iter" << endl; - // if (c.vtype.vsew == 8) - // { - // uint8_t * ptr_val = (uint8_t *) c.vreg[i][j].val; - // std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl; - // } else if (c.vtype.vsew == 16) - // { - // uint16_t * ptr_val = (uint16_t *) c.vreg[i][j].val; - // std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl; - // } else if (c.vtype.vsew == 32) - // { - // uint32_t * ptr_val = (uint32_t *) c.vreg[i][j].val; - // std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl; - // } - - // cout << "Finished iter" << endl; - // } - // } - - // cout << "Finished loop" << endl; - } - // cout << "aaaaaaaaaaaaaaaaaaaaaa" << endl; - break; - default: - { - cout << "Serious default??\n" << flush; - } - break; + break; + case 5: + // BGE + D(3, "BGE: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); + if (int(reg[rsrc[0]]) >= int(reg[rsrc[1]])) { + if (!pcSet) + nextPc = (c.pc - 4) + immsrc; + pcSet = true; + } + break; + case 6: + // BLTU + D(3, "BLTU: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); + if (Word_u(reg[rsrc[0]]) < Word_u(reg[rsrc[1]])) { + if (!pcSet) + nextPc = (c.pc - 4) + immsrc; + pcSet = true; + } + break; + case 7: + // BGEU + D(3, "BGEU: r" << rsrc[0] << ", r" << rsrc[1] << ", imm=" << (int)immsrc); + if (Word_u(reg[rsrc[0]]) >= Word_u(reg[rsrc[1]])) { + if (!pcSet) + nextPc = (c.pc - 4) + immsrc; + pcSet = true; } break; } break; - case VS: - is_vec = true; - VLMAX = (c.vtype.vlmul * c.VLEN)/c.vtype.vsew; - for(Word i = 0; i < c.vl; i++) - { - // cout << "iter" << endl; - ++c.stores; - memAddr = reg[rsrc[0]] + (i*c.vtype.vsew/8); - // std::cout << "STORE MEM ADDRESS *** : " << std::hex << memAddr << "\n"; - - - trace_inst->is_sw = true; - trace_inst->mem_addresses[i] = memAddr; - - switch (vlsWidth) - { - case 6: //store word and unit strided (not checking for unit stride) - { - uint32_t * ptr_val = (uint32_t *) c.vreg[vs3][i].val; - D(3, "value: " << flush << (*ptr_val) << flush); - c.core->mem.write(memAddr, *ptr_val, c.supervisorMode, 4); - D(3, "store: " << memAddr << " value:" << *ptr_val << flush); - } - break; - default: - cout << "ERROR: UNSUPPORTED S INST\n" << flush; - std::abort(); - } - // cout << "Loop finished" << endl; - // c.memAccesses.push_back(Warp::MemAccess(true, memAddr)); - } - - // cout << "After for loop" << endl; + case LUI_INST: + D(3, "LUI: r" << rdest << " <- imm=0x" << hex << immsrc); + reg[rdest] = (immsrc << 12) & 0xfffff000; break; + case AUIPC_INST: + D(3, "AUIPC: r" << rdest << " <- imm=0x" << hex << immsrc); + reg[rdest] = ((immsrc << 12) & 0xfffff000) + (c.pc - 4); + break; + case JAL_INST: + D(3, "JAL: r" << rdest << " <- imm=" << (int)immsrc); + trace_inst->stall_warp = true; + if (!pcSet) + nextPc = (c.pc - 4) + immsrc; + if (!pcSet) { /*std::cout << "JAL... SETTING PC: " << nextPc << "\n"; */ + } + if (rdest != 0) { + reg[rdest] = c.pc; + } + pcSet = true; + break; + case JALR_INST: + D(3, "JALR: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); + trace_inst->stall_warp = true; + if (!pcSet) + nextPc = reg[rsrc[0]] + immsrc; + if (!pcSet) { /*std::cout << "JALR... SETTING PC: " << nextPc << "\n";*/ + } + if (rdest != 0) { + reg[rdest] = c.pc; + } + pcSet = true; + break; + case SYS_INST: + D(3, "SYS_INST: r" << rdest << " <- r" << rsrc[0] << ", imm=" << (int)immsrc); + temp = reg[rsrc[0]]; + // GPGPU CSR extension + if (immsrc == 0x20) { + // ThreadID + reg[rdest] = t; + D(3, "vx_threadID: r" << rdest << "=" << reg[rdest]); + } else if (immsrc == 0x21) { + // WarpID + reg[rdest] = c.id; + D(3, "vx_warpID: r" << rdest << "=" << reg[rdest]); + } else if (immsrc == 0x22) { + // WarpNum + reg[rdest] = c.id; + D(3, "vx_warpNum: r" << rdest << "=" << reg[rdest]); + } else if (immsrc == 0x25) { + // NumInsts + reg[rdest] = c.core->num_instructions; + D(3, "vx_getInst: r" << rdest << "=" << reg[rdest]); + } else if (immsrc == 0x26) { + // NumCycles + reg[rdest] = c.core->num_cycles; + D(3, "vx_getCycle: r" << rdest << "=" << reg[rdest]); + } else { + switch (func3) { + case 0: + if (immsrc < 2) { + //std::cout << "INTERRUPT ECALL/EBREAK\n"; + nextActiveThreads = 0; + c.spawned = false; + // c.interrupt(0); + } + break; + case 1: + // printf("Case 1\n"); + if (rdest != 0) { + reg[rdest] = c.csr[immsrc & 0x00000FFF]; + } + c.csr[immsrc & 0x00000FFF] = temp; + break; + case 2: + // printf("Case 2\n"); + if (rdest != 0) { + // printf("Reading from CSR: %d = %d\n", (immsrc & 0x00000FFF), c.csr[immsrc & 0x00000FFF]); + reg[rdest] = c.csr[immsrc & 0x00000FFF]; + } + // printf("Writing to CSR --> %d = %d\n", immsrc, (temp | c.csr[immsrc & 0x00000FFF])); + c.csr[immsrc & 0x00000FFF] = temp | c.csr[immsrc & 0x00000FFF]; + break; + case 3: + // printf("Case 3\n"); + if (rdest != 0) { + reg[rdest] = c.csr[immsrc & 0x00000FFF]; + } + c.csr[immsrc & 0x00000FFF] = temp & (~c.csr[immsrc & 0x00000FFF]); + break; + case 5: + // printf("Case 5\n"); + if (rdest != 0) { + reg[rdest] = c.csr[immsrc & 0x00000FFF]; + } + c.csr[immsrc & 0x00000FFF] = rsrc[0]; + break; + case 6: + // printf("Case 6\n"); + if (rdest != 0) { + reg[rdest] = c.csr[immsrc & 0x00000FFF]; + } + c.csr[immsrc & 0x00000FFF] = rsrc[0] | c.csr[immsrc & 0x00000FFF]; + break; + case 7: + // printf("Case 7\n"); + if (rdest != 0) { + reg[rdest] = c.csr[immsrc & 0x00000FFF]; + } + c.csr[immsrc & 0x00000FFF] = rsrc[0] & (~c.csr[immsrc & 0x00000FFF]); + break; + default: + break; + } + } + break; + case TRAP: + D(3, "TRAP"); + nextActiveThreads = 0; + c.interrupt(0); + break; + case FENCE: + D(3, "FENCE"); + break; + case PJ_INST: + D(3, "PJ_INST: r" << rsrc[0] << ", r" << rsrc[1]); + if (reg[rsrc[0]]) { + if (!pcSet) + nextPc = reg[rsrc[1]]; + pcSet = true; + } + break; + case GPGPU: + switch (func3) { + case 1: + // WSPAWN + D(3, "WSPAWN: r" << rsrc[0] << ", r" << rsrc[1]); + trace_inst->wspawn = true; + if (sjOnce) { + sjOnce = false; + num_to_wspawn = std::min(reg[rsrc[0]], c.core->a.getNWarps()); + D(0, "Spawning " << num_to_wspawn << " new warps at PC: " << hex << reg[rsrc[1]]); + for (unsigned i = 1; i < num_to_wspawn; ++i) { + Warp &newWarp(c.core->w[i]); + { + newWarp.pc = reg[rsrc[1]]; + for (int kk = 0; kk < newWarp.tmask.size(); kk++) { + if (kk == 0) { + newWarp.tmask[kk] = true; + } else { + newWarp.tmask[kk] = false; + } + } + newWarp.activeThreads = 1; + newWarp.supervisorMode = false; + newWarp.spawned = true; + } + } + break; + } + break; + case 2: { + // SPLIT + D(3, "SPLIT: r" << pred); + trace_inst->stall_warp = true; + if (sjOnce) { + sjOnce = false; + if (checkUnanimous(pred, c.reg, c.tmask)) { + D(3, "Unanimous pred: " << pred << " val: " << reg[pred] << "\n"); + DomStackEntry e(c.tmask); + e.uni = true; + c.domStack.push(e); + break; + } + D(3, "Split: Original TM: "); + for (auto y : c.tmask) + D(3, y << " "); + + DomStackEntry e(pred, c.reg, c.tmask, c.pc); + c.domStack.push(c.tmask); + c.domStack.push(e); + for (unsigned i = 0; i < e.tmask.size(); ++i) { + c.tmask[i] = !e.tmask[i] && c.tmask[i]; + } + + D(3, "Split: New TM"); + for (auto y : c.tmask) + D(3, y << " "); + D(3, "Split: Pushed TM PC: " << hex << e.pc << dec << "\n"); + for (auto y : e.tmask) + D(3, y << " "); + } + break; + } + case 3: + // JOIN + D(3, "JOIN"); + if (sjOnce) { + sjOnce = false; + if (!c.domStack.empty() && c.domStack.top().uni) { + D(2, "Uni branch at join"); + printf("NEW DOMESTACK: \n"); + c.tmask = c.domStack.top().tmask; + c.domStack.pop(); + break; + } + if (!c.domStack.top().fallThrough) { + if (!pcSet) { + nextPc = c.domStack.top().pc; + D(3, "join: NOT FALLTHROUGH PC: " << hex << nextPc << dec); + } + pcSet = true; + } + + D(3, "Join: Old TM: "); + for (auto y : c.tmask) + D(3, y << " "); + cout << "\n"; + c.tmask = c.domStack.top().tmask; + + D(3, "Join: New TM: "); + for (auto y : c.tmask) + D(3, y << " "); + + c.domStack.pop(); + } + break; + case 4: + trace_inst->stall_warp = true; + // is_barrier + break; + case 0: + // TMC + D(3, "TMC: r" << rsrc[0]); + trace_inst->stall_warp = true; + nextActiveThreads = std::min(reg[rsrc[0]], c.core->a.getNThds()); + { + for (int ff = 0; ff < c.tmask.size(); ff++) { + if (ff < nextActiveThreads) { + c.tmask[ff] = true; + } else { + c.tmask[ff] = false; + } + } + } + if (nextActiveThreads == 0) { + c.spawned = false; + } + break; default: - D(3, "pc: " << hex << (c.pc-4)); - D(3, "aERROR: Unsupported instruction: " << *this); - std::abort(); + cout << "ERROR: UNSUPPORTED GPGPU INSTRUCTION " << *this << "\n"; + } + break; + case VSET_ARITH: + D(3, "VSET_ARITH"); + is_vec = true; + switch (func3) { + case 0: // vector-vector + trace_inst->vs1 = rsrc[0]; + trace_inst->vs2 = rsrc[1]; + trace_inst->vd = rdest; + switch (func6) { + case 0: { + is_vec = true; + D(3, "Addition " << rsrc[0] << " " << rsrc[1] << " Dest:" << rdest); + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + vector> &mask = c.vreg[0]; + + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *mask_ptr = (uint8_t *)mask[i].val; + uint8_t value = (*mask_ptr & 0x1); + if (vmask || (!vmask && value)) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t result = *first_ptr + *second_ptr; + D(3, "Adding " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + } + + } else if (c.vtype.vsew == 16) { + + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *mask_ptr = (uint16_t *)mask[i].val; + uint16_t value = (*mask_ptr & 0x1); + if (vmask || (!vmask && value)) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t result = *first_ptr + *second_ptr; + D(3, "Adding " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + } + } else if (c.vtype.vsew == 32) { + D(3, "Doing 32 bit vector addition"); + for (Word i = 0; i < c.vl; i++) { + int *mask_ptr = (int *)mask[i].val; + int value = (*mask_ptr & 0x1); + if (vmask || (!vmask && value)) { + int *first_ptr = (int *)vr1[i].val; + int *second_ptr = (int *)vr2[i].val; + int result = *first_ptr + *second_ptr; + D(3, "Adding " << *first_ptr << " + " << *second_ptr << " = " << result); + + int *result_ptr = (int *)vd[i].val; + *result_ptr = result; + } + } + } + + D(3, "Vector Register state after addition:" << flush); + for (int i = 0; i < c.vreg.size(); i++) { + for (int j = 0; j < c.vreg[0].size(); j++) { + if (c.vtype.vsew == 8) { + uint8_t *ptr_val = (uint8_t *)c.vreg[i][j].val; + D(3, "reg[" << i << "][" << j << "] = " << *ptr_val); + } else if (c.vtype.vsew == 16) { + uint16_t *ptr_val = (uint16_t *)c.vreg[i][j].val; + D(3, "reg[" << i << "][" << j << "] = " << *ptr_val); + } else if (c.vtype.vsew == 32) { + uint32_t *ptr_val = (uint32_t *)c.vreg[i][j].val; + D(3, "reg[" << i << "][" << j << "] = " << *ptr_val); + } + } + } + + D(3, "After vector register state after addition" << flush); + } break; + case 24: //vmseq + { + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t result = (*first_ptr == *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 16) { + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t result = (*first_ptr == *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 32) { + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t result = (*first_ptr == *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + } + + } break; + case 25: //vmsne + { + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t result = (*first_ptr != *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 16) { + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t result = (*first_ptr != *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 32) { + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t result = (*first_ptr != *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + } + + } break; + case 26: //vmsltu + { + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t result = (*first_ptr < *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 16) { + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t result = (*first_ptr < *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 32) { + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t result = (*first_ptr < *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + } + + } break; + case 27: //vmslt + { + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (int8_t i = 0; i < c.vl; i++) { + int8_t *first_ptr = (int8_t *)vr1[i].val; + int8_t *second_ptr = (int8_t *)vr2[i].val; + int8_t result = (*first_ptr < *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + int8_t *result_ptr = (int8_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 16) { + for (int16_t i = 0; i < c.vl; i++) { + int16_t *first_ptr = (int16_t *)vr1[i].val; + int16_t *second_ptr = (int16_t *)vr2[i].val; + int16_t result = (*first_ptr < *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + int16_t *result_ptr = (int16_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 32) { + for (int32_t i = 0; i < c.vl; i++) { + int32_t *first_ptr = (int32_t *)vr1[i].val; + int32_t *second_ptr = (int32_t *)vr2[i].val; + int32_t result = (*first_ptr < *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + int32_t *result_ptr = (int32_t *)vd[i].val; + *result_ptr = result; + } + } + } break; + case 28: //vmsleu + { + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t result = (*first_ptr <= *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 16) { + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t result = (*first_ptr <= *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 32) { + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t result = (*first_ptr <= *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + } + } break; + case 29: //vmsle + { + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (int8_t i = 0; i < c.vl; i++) { + int8_t *first_ptr = (int8_t *)vr1[i].val; + int8_t *second_ptr = (int8_t *)vr2[i].val; + int8_t result = (*first_ptr <= *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + int8_t *result_ptr = (int8_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 16) { + for (int16_t i = 0; i < c.vl; i++) { + int16_t *first_ptr = (int16_t *)vr1[i].val; + int16_t *second_ptr = (int16_t *)vr2[i].val; + int16_t result = (*first_ptr <= *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + int16_t *result_ptr = (int16_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 32) { + for (int32_t i = 0; i < c.vl; i++) { + int32_t *first_ptr = (int32_t *)vr1[i].val; + int32_t *second_ptr = (int32_t *)vr2[i].val; + int32_t result = (*first_ptr <= *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + int32_t *result_ptr = (int32_t *)vd[i].val; + *result_ptr = result; + } + } + } break; + case 30: //vmsgtu + { + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t result = (*first_ptr > *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 16) { + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t result = (*first_ptr > *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 32) { + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t result = (*first_ptr > *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + } + } break; + case 31: //vmsgt + { + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (int8_t i = 0; i < c.vl; i++) { + int8_t *first_ptr = (int8_t *)vr1[i].val; + int8_t *second_ptr = (int8_t *)vr2[i].val; + int8_t result = (*first_ptr > *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + int8_t *result_ptr = (int8_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 16) { + for (int16_t i = 0; i < c.vl; i++) { + int16_t *first_ptr = (int16_t *)vr1[i].val; + int16_t *second_ptr = (int16_t *)vr2[i].val; + int16_t result = (*first_ptr > *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + int16_t *result_ptr = (int16_t *)vd[i].val; + *result_ptr = result; + } + + } else if (c.vtype.vsew == 32) { + for (int32_t i = 0; i < c.vl; i++) { + int32_t *first_ptr = (int32_t *)vr1[i].val; + int32_t *second_ptr = (int32_t *)vr2[i].val; + int32_t result = (*first_ptr > *second_ptr) ? 1 : 0; + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + int32_t *result_ptr = (int32_t *)vd[i].val; + *result_ptr = result; + } + } + } break; + } + break; + case 2: { + trace_inst->vs1 = rsrc[0]; + trace_inst->vs2 = rsrc[1]; + trace_inst->vd = rdest; + Word VLMAX = (c.vtype.vlmul * c.VLEN) / c.vtype.vsew; + + switch (func6) { + case 24: //vmandnot + { + D(3, "vmandnot"); + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t first_value = (*first_ptr & 0x1); + uint8_t second_value = (*second_ptr & 0x1); + uint8_t result = (first_value & !second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 16) { + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t first_value = (*first_ptr & 0x1); + uint16_t second_value = (*second_ptr & 0x1); + uint16_t result = (first_value & !second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + for (uint16_t i = c.vl; i < VLMAX; i++) { + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t first_value = (*first_ptr & 0x1); + uint32_t second_value = (*second_ptr & 0x1); + uint32_t result = (first_value & !second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + for (Word i = c.vl; i < VLMAX; i++) { + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + case 25: //vmand + { + D(3, "vmand"); + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t first_value = (*first_ptr & 0x1); + uint8_t second_value = (*second_ptr & 0x1); + uint8_t result = (first_value & second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 16) { + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t first_value = (*first_ptr & 0x1); + uint16_t second_value = (*second_ptr & 0x1); + uint16_t result = (first_value & second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + + for (uint16_t i = c.vl; i < VLMAX; i++) { + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t first_value = (*first_ptr & 0x1); + uint32_t second_value = (*second_ptr & 0x1); + uint32_t result = (first_value & second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + + for (Word i = c.vl; i < VLMAX; i++) { + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + case 26: //vmor + { + D(3, "vmor"); + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t first_value = (*first_ptr & 0x1); + uint8_t second_value = (*second_ptr & 0x1); + uint8_t result = (first_value | second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 16) { + uint16_t *result_ptr; + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t first_value = (*first_ptr & 0x1); + uint16_t second_value = (*second_ptr & 0x1); + uint16_t result = (first_value | second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + for (uint16_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + } else if (c.vtype.vsew == 32) { + uint32_t *result_ptr; + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t first_value = (*first_ptr & 0x1); + uint32_t second_value = (*second_ptr & 0x1); + uint32_t result = (first_value | second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + D(3, "VLMAX: " << VLMAX); + for (Word i = c.vl; i < VLMAX; i++) { + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + case 27: //vmxor + { + D(3, "vmxor"); + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + uint8_t *result_ptr; + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t first_value = (*first_ptr & 0x1); + uint8_t second_value = (*second_ptr & 0x1); + uint8_t result = (first_value ^ second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + } else if (c.vtype.vsew == 16) { + uint16_t *result_ptr; + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t first_value = (*first_ptr & 0x1); + uint16_t second_value = (*second_ptr & 0x1); + uint16_t result = (first_value ^ second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + for (uint16_t i = c.vl; i < VLMAX; i++) { + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + uint32_t *result_ptr; + + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t first_value = (*first_ptr & 0x1); + uint32_t second_value = (*second_ptr & 0x1); + uint32_t result = (first_value ^ second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + for (Word i = c.vl; i < VLMAX; i++) { + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + case 28: //vmornot + { + D(3, "vmornot"); + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t first_value = (*first_ptr & 0x1); + uint8_t second_value = (*second_ptr & 0x1); + uint8_t result = (first_value | !second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + } else if (c.vtype.vsew == 16) { + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t first_value = (*first_ptr & 0x1); + uint16_t second_value = (*second_ptr & 0x1); + uint16_t result = (first_value | !second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + for (uint16_t i = c.vl; i < VLMAX; i++) { + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t first_value = (*first_ptr & 0x1); + uint32_t second_value = (*second_ptr & 0x1); + uint32_t result = (first_value | !second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + for (Word i = c.vl; i < VLMAX; i++) { + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + case 29: //vmnand + { + D(3, "vmnand"); + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t first_value = (*first_ptr & 0x1); + uint8_t second_value = (*second_ptr & 0x1); + uint8_t result = !(first_value & second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + uint8_t *result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 16) { + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t first_value = (*first_ptr & 0x1); + uint16_t second_value = (*second_ptr & 0x1); + uint16_t result = !(first_value & second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + + for (uint16_t i = c.vl; i < VLMAX; i++) { + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t first_value = (*first_ptr & 0x1); + uint32_t second_value = (*second_ptr & 0x1); + uint32_t result = !(first_value & second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + + for (Word i = c.vl; i < VLMAX; i++) { + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + case 30: //vmnor + { + D(3, "vmnor"); + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + uint8_t *result_ptr; + + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t first_value = (*first_ptr & 0x1); + uint8_t second_value = (*second_ptr & 0x1); + uint8_t result = !(first_value | second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + } else if (c.vtype.vsew == 16) { + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t first_value = (*first_ptr & 0x1); + uint16_t second_value = (*second_ptr & 0x1); + uint16_t result = !(first_value | second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + for (uint16_t i = c.vl; i < VLMAX; i++) { + uint16_t *result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t first_value = (*first_ptr & 0x1); + uint32_t second_value = (*second_ptr & 0x1); + uint32_t result = !(first_value | second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + for (Word i = c.vl; i < VLMAX; i++) { + uint32_t *result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + case 31: //vmxnor + { + D(3, "vmxnor"); + uint8_t *result_ptr; + + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t first_value = (*first_ptr & 0x1); + uint8_t second_value = (*second_ptr & 0x1); + uint8_t result = !(first_value ^ second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + } else if (c.vtype.vsew == 16) { + uint16_t *result_ptr; + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t first_value = (*first_ptr & 0x1); + uint16_t second_value = (*second_ptr & 0x1); + uint16_t result = !(first_value ^ second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + for (uint16_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + uint32_t *result_ptr; + + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t first_value = (*first_ptr & 0x1); + uint32_t second_value = (*second_ptr & 0x1); + uint32_t result = !(first_value ^ second_value); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + for (Word i = c.vl; i < VLMAX; i++) { + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + case 37: //vmul + { + D(3, "vmul"); + uint8_t *result_ptr; + + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t result = (*first_ptr * *second_ptr); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + } else if (c.vtype.vsew == 16) { + uint16_t *result_ptr; + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t result = (*first_ptr * *second_ptr); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + for (uint16_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + uint32_t *result_ptr; + + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t result = (*first_ptr * *second_ptr); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + for (Word i = c.vl; i < VLMAX; i++) { + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + case 45: //vmacc + { + D(3, "vmacc"); + uint8_t *result_ptr; + + vector> &vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t result = (*first_ptr * *second_ptr); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint8_t *)vd[i].val; + *result_ptr += result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + } else if (c.vtype.vsew == 16) { + uint16_t *result_ptr; + for (uint16_t i = 0; i < c.vl; i++) { + uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t result = (*first_ptr * *second_ptr); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint16_t *)vd[i].val; + *result_ptr += result; + } + for (uint16_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + uint32_t *result_ptr; + + for (uint32_t i = 0; i < c.vl; i++) { + uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t result = (*first_ptr * *second_ptr); + D(3, "Comparing " << *first_ptr << " + " << *second_ptr << " = " << result); + + result_ptr = (uint32_t *)vd[i].val; + *result_ptr += result; + } + for (Word i = c.vl; i < VLMAX; i++) { + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + } + } break; + case 6: { + switch (func6) { + case 0: { + D(3, "vmadd.vx"); + uint8_t *result_ptr; + + //vector> & vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + //uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t result = (reg[rsrc[0]] + *second_ptr); + D(3, "Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); + + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + } else if (c.vtype.vsew == 16) { + uint16_t *result_ptr; + for (uint16_t i = 0; i < c.vl; i++) { + //uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t result = (reg[rsrc[0]] + *second_ptr); + D(3, "Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); + + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + for (uint16_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + uint32_t *result_ptr; + + for (uint32_t i = 0; i < c.vl; i++) { + //uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t result = (reg[rsrc[0]] + *second_ptr); + D(3, "Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); + + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + for (Word i = c.vl; i < VLMAX; i++) { + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + case 37: //vmul.vx + { + D(3, "vmul.vx"); + uint8_t *result_ptr; + + //vector> & vr1 = c.vreg[rsrc[0]]; + vector> &vr2 = c.vreg[rsrc[1]]; + vector> &vd = c.vreg[rdest]; + if (c.vtype.vsew == 8) { + for (uint8_t i = 0; i < c.vl; i++) { + //uint8_t *first_ptr = (uint8_t *)vr1[i].val; + uint8_t *second_ptr = (uint8_t *)vr2[i].val; + uint8_t result = (reg[rsrc[0]] * *second_ptr); + D(3, "Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); + + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = result; + } + for (uint8_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint8_t *)vd[i].val; + *result_ptr = 0; + } + } else if (c.vtype.vsew == 16) { + uint16_t *result_ptr; + for (uint16_t i = 0; i < c.vl; i++) { + //uint16_t *first_ptr = (uint16_t *)vr1[i].val; + uint16_t *second_ptr = (uint16_t *)vr2[i].val; + uint16_t result = (reg[rsrc[0]] * *second_ptr); + D(3, "Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); + + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = result; + } + for (uint16_t i = c.vl; i < VLMAX; i++) { + result_ptr = (uint16_t *)vd[i].val; + *result_ptr = 0; + } + + } else if (c.vtype.vsew == 32) { + uint32_t *result_ptr; + + for (uint32_t i = 0; i < c.vl; i++) { + //uint32_t *first_ptr = (uint32_t *)vr1[i].val; + uint32_t *second_ptr = (uint32_t *)vr2[i].val; + uint32_t result = (reg[rsrc[0]] * *second_ptr); + D(3, "Comparing " << reg[rsrc[0]] << " + " << *second_ptr << " = " << result); + + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = result; + } + for (Word i = c.vl; i < VLMAX; i++) { + result_ptr = (uint32_t *)vd[i].val; + *result_ptr = 0; + } + } + } break; + } + } break; + case 7: { + is_vec = true; + c.vtype.vill = 0; //TODO + c.vtype.vediv = vediv; + c.vtype.vsew = vsew; + c.vtype.vlmul = vlmul; + + Word VLMAX = (vlmul * c.VLEN) / vsew; + D(3, "lmul:" << vlmul << " sew:" << vsew << " ediv: " << vediv << "rsrc" << reg[rsrc[0]] << "VLMAX" << VLMAX); + + if (reg[rsrc[0]] <= VLMAX) { + c.vl = reg[rsrc[0]]; + } else if (reg[rsrc[0]] < 2 * VLMAX) { + c.vl = (int)ceil((reg[rsrc[0]] * 1.0) / 2.0); + D(3, "Length:" << c.vl << ceil(reg[rsrc[0]] / 2)); + } else if (reg[rsrc[0]] >= (2 * VLMAX)) { + c.vl = VLMAX; + } + reg[rdest] = c.vl; + D(3, "VL:" << reg[rdest]); + + Word regNum(0); + + c.vreg.clear(); + for (int j = 0; j < 32; j++) { + c.vreg.push_back(vector>()); + for (int i = 0; i < (c.VLEN / vsew); ++i) { + int *elem_ptr = (int *)malloc(vsew / 8); + for (int f = 0; f < (vsew / 32); f++) + elem_ptr[f] = 0; + c.vreg[j].push_back(Reg(c.id, regNum++, (char *)elem_ptr)); + } + } + } break; + default: { + cout << "default???\n" + << flush; + } + } + break; + case VL: { + is_vec = true; + D(3, "Executing vector load"); + VLMAX = (c.vtype.vlmul * c.VLEN) / c.vtype.vsew; + D(3, "lmul: " << c.vtype.vlmul << " VLEN:" << c.VLEN << "sew: " << c.vtype.vsew); + D(3, "src: " << rsrc[0] << " " << reg[rsrc[0]]); + D(3, "dest" << rdest); + D(3, "width" << vlsWidth); + vector> &vd = c.vreg[rdest]; + + switch (vlsWidth) { + case 6: //load word and unit strided (not checking for unit stride) + { + for (Word i = 0; i < c.vl; i++) { + memAddr = ((reg[rsrc[0]]) & 0xFFFFFFFC) + (i * c.vtype.vsew / 8); + data_read = c.core->mem.read(memAddr, c.supervisorMode); + D(3, "Mem addr: " << std::hex << memAddr << " Data read " << data_read); + int *result_ptr = (int *)vd[i].val; + *result_ptr = data_read; + + trace_inst->is_lw = true; + trace_inst->mem_addresses[i] = memAddr; + } + /*for(Word i = c.vl; i < VLMAX; i++){ + int * result_ptr = (int *) vd[i].val; + *result_ptr = 0; + }*/ + + D(3, "Vector Register state ----:"); + // for(int i=0; i < 32; i++) + // { + // for(int j=0; j< c.vl; j++) + // { + // cout << "starting iter" << endl; + // if (c.vtype.vsew == 8) + // { + // uint8_t * ptr_val = (uint8_t *) c.vreg[i][j].val; + // std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl; + // } else if (c.vtype.vsew == 16) + // { + // uint16_t * ptr_val = (uint16_t *) c.vreg[i][j].val; + // std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl; + // } else if (c.vtype.vsew == 32) + // { + // uint32_t * ptr_val = (uint32_t *) c.vreg[i][j].val; + // std::cout << "reg[" << i << "][" << j << "] = " << *ptr_val << std::endl; + // } + + // cout << "Finished iter" << endl; + // } + // } + + // cout << "Finished loop" << endl; + } + // cout << "aaaaaaaaaaaaaaaaaaaaaa" << endl; + break; + default: { + cout << "Serious default??\n" + << flush; + } break; + } + break; + } break; + case VS: + is_vec = true; + VLMAX = (c.vtype.vlmul * c.VLEN) / c.vtype.vsew; + for (Word i = 0; i < c.vl; i++) { + // cout << "iter" << endl; + ++c.stores; + memAddr = reg[rsrc[0]] + (i * c.vtype.vsew / 8); + // std::cout << "STORE MEM ADDRESS *** : " << std::hex << memAddr << "\n"; + + trace_inst->is_sw = true; + trace_inst->mem_addresses[i] = memAddr; + + switch (vlsWidth) { + case 6: //store word and unit strided (not checking for unit stride) + { + uint32_t *ptr_val = (uint32_t *)c.vreg[vs3][i].val; + D(3, "value: " << flush << (*ptr_val) << flush); + c.core->mem.write(memAddr, *ptr_val, c.supervisorMode, 4); + D(3, "store: " << memAddr << " value:" << *ptr_val << flush); + } break; + default: + cout << "ERROR: UNSUPPORTED S INST\n" + << flush; + std::abort(); + } + // cout << "Loop finished" << endl; + // c.memAccesses.push_back(Warp::MemAccess(true, memAddr)); + } + + // cout << "After for loop" << endl; + break; + default: + D(3, "pc: " << hex << (c.pc - 4)); + D(3, "aERROR: Unsupported instruction: " << *this); + std::abort(); } // break; // cout << "outside case" << endl << flush; - } // std::cout << "finished instruction" << endl << flush; @@ -2454,12 +2271,11 @@ void Instruction::executeOn(Warp &c, trace_inst_t * trace_inst) { // This way, if pc was set by a side effect (such as interrupt), it will // retain its new value. - if (pcSet) - { + if (pcSet) { c.pc = nextPc; - D(3,"Next PC: " << hex << nextPc << dec); + D(3, "Next PC: " << hex << nextPc << dec); } - + if (nextActiveThreads > c.reg.size()) { cerr << "Error: attempt to spawn " << nextActiveThreads << " threads. " << c.reg.size() << " available.\n"; diff --git a/simX/simX.cpp b/simX/simX.cpp index 00e86d52..46e836b9 100644 --- a/simX/simX.cpp +++ b/simX/simX.cpp @@ -21,6 +21,8 @@ #include "include/args.h" #include "include/help.h" +#include "../runtime/config.h" + #include ////////////// @@ -58,9 +60,8 @@ int emu_main(int argc, char **argv) { string archString("rv32i"); string imgFileName("a.dsfsdout.bin"); bool showHelp(false), showStats(false), basicMachine(true); - bool cpu_mode(false); - int max_warps(32); - int max_threads(32); + int max_warps(NW); + int max_threads(NT); /* Read the command line arguments. */ CommandLineArgFlag fh("-h", "--help", "", showHelp); @@ -68,7 +69,6 @@ int emu_main(int argc, char **argv) { CommandLineArgSetterfa("-a", "--arch", "", archString); CommandLineArgFlag fs("-s", "--stats", "", showStats); CommandLineArgFlag fb("-b", "--basic", "", basicMachine); - CommandLineArgFlag fx("-x", "--cpu", "", cpu_mode); CommandLineArgSetter fw("-w", "--warps", "", max_warps); CommandLineArgSetter ft("-t", "--threads", "", max_threads); @@ -80,7 +80,7 @@ int emu_main(int argc, char **argv) { } /* Instantiate a Core, RAM, and console output. */ - ArchDef arch(archString, cpu_mode, max_warps, max_threads); + ArchDef arch(archString, max_warps, max_threads); Decoder *dec; diff --git a/simX/test_riscv.sh b/simX/test_riscv.sh index 77ebb254..c49e8c9f 100755 --- a/simX/test_riscv.sh +++ b/simX/test_riscv.sh @@ -3,139 +3,139 @@ cd obj_dir echo start > results.txt echo ./riscv_tests/rv32ui-p-add.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-add.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-add.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-addi.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-addi.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-addi.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-and.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-and.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-and.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-andi.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-andi.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-andi.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-auipc.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-auipc.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-auipc.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-beq.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-beq.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-beq.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-bge.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bge.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-bge.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-bgeu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bgeu.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-bgeu.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-blt.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-blt.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-blt.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-bltu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bltu.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-bltu.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-bne.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-bne.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-bne.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-jal.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-jal.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-jal.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-jalr.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-jalr.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-jalr.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-lb.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lb.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-lb.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-lbu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lbu.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-lbu.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-lh.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lh.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-lh.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-lhu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lhu.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-lhu.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-lui.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lui.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-lui.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-lw.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-lw.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-lw.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-or.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-or.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-or.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-ori.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-ori.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-ori.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-sb.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sb.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-sb.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-sh.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sh.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-sh.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-simple.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-simple.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-simple.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-sll.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sll.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-sll.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-slli.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-slli.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-slli.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-slt.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-slt.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-slt.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-slti.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-slti.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-slti.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-sltiu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sltiu.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-sltiu.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-sltu.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sltu.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-sltu.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-sra.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sra.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-sra.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-srai.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-srai.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-srai.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-srl.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-srl.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-srl.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-srli.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-srli.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-srli.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-sub.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sub.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-sub.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-sw.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-sw.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-sw.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-xor.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-xor.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-xor.hex -s -b >> results.txt echo ./riscv_tests/rv32ui-p-xori.hex >> results.txt -./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32ui-p-xori.hex -s -b >> results.txt +./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32ui-p-xori.hex -s -b >> results.txt # echo ./riscv_tests/rv32um-p-div.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-div.hex -s -b >> results.txt +# ./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32um-p-div.hex -s -b >> results.txt # echo ./riscv_tests/rv32um-p-divu.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-divu.hex -s -b >> results.txt +# ./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32um-p-divu.hex -s -b >> results.txt # echo ./riscv_tests/rv32um-p-mul.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mul.hex -s -b >> results.txt +# ./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32um-p-mul.hex -s -b >> results.txt # echo ./riscv_tests/rv32um-p-mulh.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mulh.hex -s -b >> results.txt +# ./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32um-p-mulh.hex -s -b >> results.txt # echo ./riscv_tests/rv32um-p-mulhsu.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mulhsu.hex -s -b >> results.txt +# ./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32um-p-mulhsu.hex -s -b >> results.txt # echo ./riscv_tests/rv32um-p-mulhu.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-mulhu.hex -s -b >> results.txt +# ./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32um-p-mulhu.hex -s -b >> results.txt # echo ./riscv_tests/rv32um-p-rem.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-rem.hex -s -b >> results.txt +# ./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32um-p-rem.hex -s -b >> results.txt # echo ./riscv_tests/rv32um-p-remu.hex >> results.txt -# ./Vcache_simX -E --cpu -a rv32i --core ../riscv_tests/rv32um-p-remu.hex -s -b >> results.txt \ No newline at end of file +# ./Vcache_simX -E -a rv32i --core ../riscv_tests/rv32um-p-remu.hex -s -b >> results.txt \ No newline at end of file